Re: [PATCH] rs6000: Define movsf_from_si2 to extract high part SF element from DImode[PR89310]

[luoxhu <luoxhu@linux.ibm.com>]

On 2020/7/20 23:31, Segher Boessenkool wrote:
> On Mon, Jul 13, 2020 at 02:30:28PM +0800, luoxhu wrote:
>> For extracting high part element from DImode register like:
>>
>> {%1:SF=unspec[r122:DI>>0x20#0] 86;clobber scratch;}
>>
>> split it before reload with "and mask" to avoid generating shift right
>> 32 bit then shift left 32 bit.  This pattern also exists in PR42475 and
>> PR67741, etc.
>>
>> srdi 3,3,32
>> sldi 9,3,32
>> mtvsrd 1,9
>> xscvspdpn 1,1
>>
>> =>
>>
>> rldicr 3,3,0,31
>> mtvsrd 1,3
>> xscvspdpn 1,1
> 
>> 	* config/rs6000/rs6000.md (movsf_from_si2): New
>> 	define_insn_and_split.
> 
> (That fits on one line).
> 
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/powerpc/pr89310.c
>> @@ -0,0 +1,17 @@
>> +/* { dg-do compile } */
>> +/* { dg-options "-O2" } */
> 
>> +/* { dg-final { scan-assembler-not {\msrdi\M} } } */
>> +/* { dg-final { scan-assembler-not {\msldi\M} } } */
>> +/* { dg-final { scan-assembler-times {\mrldicr\M} 1 } } */
> 
> I'm not sure that works on older cpus?  Please test there, and add
> -mdejagnu-cpu=power8 to the dg-options if needed.  Also test on BE please.
> 
> Okay for trunk with those last details taking care of.  Thank you!

Thanks for the remind.  Addressed the comments and committed in r11-2245.

Xionghu