From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 4007C3858D32 for ; Mon, 24 Jul 2023 11:38:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4007C3858D32 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:To:From:Sender:Reply-To:Cc:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=/aKiqWkO4v0RbxRBUf/MsixVt9AGjQXY+KvR9htS2u4=; b=cUYbBWyG3NVFTEQLqglL7GXFPL RuQFveF/xLUxIb4RdDEh2iwY11PDGTAnFTreVT1dz9vI6xzyZ1c1Mw2ywdbGROcdqIkoXQlfkqSfb GsszI4rg40zRDsvaqPHo/C8Kt+VxSGDt+X3WFK5c3rxIf2v8ULRv2TdHIS6BQVJhGhJ3aMdmveI7l TH5c+cj5cweB42V+84H+CKnGNwjsiNaltASgZQrJmfM3I+ICyBv1XGhmDzFx65mkTESPVmfW1I/iG 8fQy67+zEvZfBFaxU+XImuw/qx1A69FElg3jojxWhDn09BOBsirJuHmFWQIc6ahMWYapN2AH9DnTP 4kFcCr8g==; Received: from [185.62.158.67] (port=55096 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1qNtt2-0006lA-1Y for gcc-patches@gcc.gnu.org; Mon, 24 Jul 2023 07:38:00 -0400 From: "Roger Sayle" To: Subject: [Committed] PR target/110787: Revert QImode offsets in {zero,sign}_extract. Date: Mon, 24 Jul 2023 12:37:59 +0100 Message-ID: <021501d9be23$4cc964a0$e65c2de0$@nextmovesoftware.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0216_01D9BE2B.AE8DCCA0" X-Mailer: Microsoft Outlook 16.0 Content-Language: en-gb Thread-Index: Adm+IwFAIQAjlvJCQPKSjmGkQZrbcQ== X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,HTML_MESSAGE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This is a multipart message in MIME format. ------=_NextPart_000_0216_01D9BE2B.AE8DCCA0 Content-Type: multipart/alternative; boundary="----=_NextPart_001_0217_01D9BE2B.AE8DCCA0" ------=_NextPart_001_0217_01D9BE2B.AE8DCCA0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit My recent patch to use QImode for bit offsets in ZERO_EXTRACTs and SIGN_EXTRACTs in the i386 backend shouldn't have resulted in any change behaviour, but as reported by Rainer it produces a bootstrap failure in gm2. This reverts the problematic patch whilst we investigate the underlying cause. Committed as obvious. 2023-07-23 Roger Sayle gcc/ChangeLog PR target/110787 PR target/110790 Revert patch. * config/i386/i386.md (extv): Use QImode for offsets. (extzv): Likewise. (insv): Likewise. (*testqi_ext_3): Likewise. (*btr_2): Likewise. (define_split): Likewise. (*btsq_imm): Likewise. (*btrq_imm): Likewise. (*btcq_imm): Likewise. (define_peephole2 x3): Likewise. (*bt): Likewise (*bt_mask): New define_insn_and_split. (*jcc_bt): Use QImode for offsets. (*jcc_bt_1): Delete obsolete pattern. (*jcc_bt_mask): Use QImode offsets. (*jcc_bt_mask_1): Likewise. (define_split): Likewise. (*bt_setcqi): Likewise. (*bt_setncqi): Likewise. (*bt_setnc): Likewise. (*bt_setncqi_2): Likewise. (*bt_setc_mask): New define_insn_and_split. (bmi2_bzhi_3): Use QImode offsets. (*bmi2_bzhi_3): Likewise. (*bmi2_bzhi_3_1): Likewise. (*bmi2_bzhi_3_1_ccz): Likewise. (@tbm_bextri_): Likewise. Sorry for the inconvenience, Roger -- ------=_NextPart_001_0217_01D9BE2B.AE8DCCA0-- ------=_NextPart_000_0216_01D9BE2B.AE8DCCA0 Content-Type: text/plain; name="rpatchqi.txt" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="rpatchqi.txt" diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 2ce8e958565..4db210cc795 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -3312,8 +3312,8 @@ (define_expand "extv" [(set (match_operand:SWI24 0 "register_operand") (sign_extract:SWI24 (match_operand:SWI24 1 "register_operand") - (match_operand:QI 2 "const_int_operand") - (match_operand:QI 3 "const_int_operand")))] + (match_operand:SI 2 "const_int_operand") + (match_operand:SI 3 "const_int_operand")))] "" { /* Handle extractions from %ah et al. */ @@ -3340,8 +3340,8 @@ (define_expand "extzv" [(set (match_operand:SWI248 0 "register_operand") (zero_extract:SWI248 (match_operand:SWI248 1 "register_operand") - (match_operand:QI 2 "const_int_operand") - (match_operand:QI 3 "const_int_operand")))] + (match_operand:SI 2 "const_int_operand") + (match_operand:SI 3 "const_int_operand")))] "" { if (ix86_expand_pextr (operands)) @@ -3428,8 +3428,8 @@ =20 (define_expand "insv" [(set (zero_extract:SWI248 (match_operand:SWI248 0 "register_operand") - (match_operand:QI 1 "const_int_operand") - (match_operand:QI 2 "const_int_operand")) + (match_operand:SI 1 "const_int_operand") + (match_operand:SI 2 "const_int_operand")) (match_operand:SWI248 3 "register_operand"))] "" { @@ -10788,8 +10788,8 @@ (match_operator 1 "compare_operator" [(zero_extract:SWI248 (match_operand 2 "int_nonimmediate_operand" "rm") - (match_operand:QI 3 "const_int_operand") - (match_operand:QI 4 "const_int_operand")) + (match_operand 3 "const_int_operand") + (match_operand 4 "const_int_operand")) (const_int 0)]))] "/* Ensure that resulting mask is zero or sign extended operand. */ INTVAL (operands[4]) >=3D 0 @@ -15965,7 +15965,7 @@ [(set (zero_extract:HI (match_operand:SWI12 0 "nonimmediate_operand") (const_int 1) - (match_operand:QI 1 "register_operand")) + (zero_extend:SI (match_operand:QI 1 "register_operand"))) (const_int 0)) (clobber (reg:CC FLAGS_REG))] "TARGET_USE_BT && ix86_pre_reload_split ()" @@ -15989,7 +15989,7 @@ [(set (zero_extract:HI (match_operand:SWI12 0 "register_operand") (const_int 1) - (match_operand:QI 1 "register_operand")) + (zero_extend:SI (match_operand:QI 1 "register_operand"))) (const_int 0)) (clobber (reg:CC FLAGS_REG))] "TARGET_USE_BT && ix86_pre_reload_split ()" @@ -16016,7 +16016,7 @@ (define_insn "*btsq_imm" [(set (zero_extract:DI (match_operand:DI 0 "nonimmediate_operand" "+rm") (const_int 1) - (match_operand:QI 1 "const_0_to_63_operand")) + (match_operand 1 "const_0_to_63_operand")) (const_int 1)) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && (TARGET_USE_BT || reload_completed)" @@ -16029,7 +16029,7 @@ (define_insn "*btrq_imm" [(set (zero_extract:DI (match_operand:DI 0 "nonimmediate_operand" "+rm") (const_int 1) - (match_operand:QI 1 "const_0_to_63_operand")) + (match_operand 1 "const_0_to_63_operand")) (const_int 0)) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && (TARGET_USE_BT || reload_completed)" @@ -16042,7 +16042,7 @@ (define_insn "*btcq_imm" [(set (zero_extract:DI (match_operand:DI 0 "nonimmediate_operand" "+rm") (const_int 1) - (match_operand:QI 1 "const_0_to_63_operand")) + (match_operand 1 "const_0_to_63_operand")) (not:DI (zero_extract:DI (match_dup 0) (const_int 1) (match_dup 1)))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && (TARGET_USE_BT || reload_completed)" @@ -16059,7 +16059,7 @@ (parallel [(set (zero_extract:DI (match_operand:DI 0 "nonimmediate_operand") (const_int 1) - (match_operand:QI 1 "const_0_to_63_operand")) + (match_operand 1 "const_0_to_63_operand")) (const_int 1)) (clobber (reg:CC FLAGS_REG))])] "TARGET_64BIT && !TARGET_USE_BT" @@ -16083,7 +16083,7 @@ (parallel [(set (zero_extract:DI (match_operand:DI 0 "nonimmediate_operand") (const_int 1) - (match_operand:QI 1 "const_0_to_63_operand")) + (match_operand 1 "const_0_to_63_operand")) (const_int 0)) (clobber (reg:CC FLAGS_REG))])] "TARGET_64BIT && !TARGET_USE_BT" @@ -16107,7 +16107,7 @@ (parallel [(set (zero_extract:DI (match_operand:DI 0 "nonimmediate_operand") (const_int 1) - (match_operand:QI 1 "const_0_to_63_operand")) + (match_operand 1 "const_0_to_63_operand")) (not:DI (zero_extract:DI (match_dup 0) (const_int 1) (match_dup 1)))) (clobber (reg:CC FLAGS_REG))])] @@ -16135,14 +16135,14 @@ (zero_extract:SWI48 (match_operand:SWI48 0 "nonimmediate_operand" "r,m") (const_int 1) - (match_operand:QI 1 "nonmemory_operand" "q,")) + (match_operand:SI 1 "nonmemory_operand" "r,")) (const_int 0)))] "" { switch (get_attr_mode (insn)) { case MODE_SI: - return "bt{l}\t{%k1, %k0|%k0, %k1}"; + return "bt{l}\t{%1, %k0|%k0, %1}"; =20 case MODE_DI: return "bt{q}\t{%q1, %0|%0, %q1}"; @@ -16160,36 +16160,13 @@ (const_string "SI") (const_string "")))]) =20 -(define_insn_and_split "*bt_mask" - [(set (reg:CCC FLAGS_REG) - (compare:CCC - (zero_extract:SWI48 - (match_operand:SWI48 0 "nonimmediate_operand" "r,m") - (const_int 1) - (subreg:QI - (and:SWI248 - (match_operand:SWI248 1 "register_operand") - (match_operand 2 "const_int_operand")) 0)) - (const_int 0)))] - "TARGET_USE_BT - && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (mode)-1)) - =3D=3D GET_MODE_BITSIZE (mode)-1 - && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (reg:CCC FLAGS_REG) - (compare:CCC - (zero_extract:SWI48 (match_dup 0) (const_int 1) (match_dup 1)) - (const_int 0)))] - "operands[1] =3D gen_lowpart (QImode, operands[1]);") - (define_insn_and_split "*jcc_bt" [(set (pc) (if_then_else (match_operator 0 "bt_comparison_operator" [(zero_extract:SWI48 (match_operand:SWI48 1 "nonimmediate_operand") (const_int 1) - (match_operand:QI 2 "nonmemory_operand")) + (match_operand:SI 2 "nonmemory_operand")) (const_int 0)]) (label_ref (match_operand 3)) (pc))) @@ -16219,6 +16196,39 @@ PUT_CODE (operands[0], reverse_condition (GET_CODE (operands[0]))); }) =20 +(define_insn_and_split "*jcc_bt_1" + [(set (pc) + (if_then_else (match_operator 0 "bt_comparison_operator" + [(zero_extract:SWI48 + (match_operand:SWI48 1 "register_operand") + (const_int 1) + (zero_extend:SI + (match_operand:QI 2 "register_operand"))) + (const_int 0)]) + (label_ref (match_operand 3)) + (pc))) + (clobber (reg:CC FLAGS_REG))] + "(TARGET_USE_BT || optimize_function_for_size_p (cfun)) + && ix86_pre_reload_split ()" + "#" + "&& 1" + [(set (reg:CCC FLAGS_REG) + (compare:CCC + (zero_extract:SWI48 + (match_dup 1) + (const_int 1) + (match_dup 2)) + (const_int 0))) + (set (pc) + (if_then_else (match_op_dup 0 [(reg:CCC FLAGS_REG) (const_int 0)]) + (label_ref (match_dup 3)) + (pc)))] +{ + operands[2] =3D lowpart_subreg (SImode, operands[2], QImode); + operands[0] =3D shallow_copy_rtx (operands[0]); + PUT_CODE (operands[0], reverse_condition (GET_CODE (operands[0]))); +}) + ;; Avoid useless masking of bit offset operand. (define_insn_and_split "*jcc_bt_mask" [(set (pc) @@ -16226,8 +16236,8 @@ [(zero_extract:SWI48 (match_operand:SWI48 1 "register_operand") (const_int 1) - (and:QI - (match_operand:QI 2 "register_operand") + (and:SI + (match_operand:SI 2 "register_operand") (match_operand 3 "const_int_operand")))]) (label_ref (match_operand 4)) (pc))) @@ -16254,23 +16264,23 @@ PUT_CODE (operands[0], reverse_condition (GET_CODE (operands[0]))); }) =20 -;; Avoid useless masking of bit offset operand. -(define_insn_and_split "*jcc_bt_mask_1" +(define_insn_and_split "*jcc_bt_mask_1" [(set (pc) - (if_then_else (match_operator 0 "bt_comparison_operator" + (if_then_else (match_operator 0 "bt_comparison_operator" [(zero_extract:SWI48 (match_operand:SWI48 1 "register_operand") (const_int 1) - (subreg:QI - (and:SWI248 - (match_operand:SWI248 2 "register_operand") - (match_operand 3 "const_int_operand")) 0))]) + (zero_extend:SI + (subreg:QI + (and + (match_operand 2 "int248_register_operand") + (match_operand 3 "const_int_operand")) 0)))]) (label_ref (match_operand 4)) (pc))) (clobber (reg:CC FLAGS_REG))] "(TARGET_USE_BT || optimize_function_for_size_p (cfun)) - && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode)-1)) - =3D=3D GET_MODE_BITSIZE (mode)-1 + && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode)-1)) + =3D=3D GET_MODE_BITSIZE (mode)-1 && ix86_pre_reload_split ()" "#" "&& 1" @@ -16286,9 +16296,10 @@ (label_ref (match_dup 4)) (pc)))] { + operands[2] =3D force_reg (GET_MODE (operands[2]), operands[2]); + operands[2] =3D gen_lowpart (SImode, operands[2]); operands[0] =3D shallow_copy_rtx (operands[0]); PUT_CODE (operands[0], reverse_condition (GET_CODE (operands[0]))); - operands[2] =3D gen_lowpart (QImode, operands[2]); }) =20 ;; Help combine recognize bt followed by cmov @@ -16299,7 +16310,7 @@ [(zero_extract:SWI48 (match_operand:SWI48 1 "register_operand") (const_int 1) - (match_operand:QI 2 "register_operand")) + (zero_extend:SI (match_operand:QI 2 "register_operand"))) (const_int 0)]) (match_operand:SWI248 3 "nonimmediate_operand") (match_operand:SWI248 4 "nonimmediate_operand")))] @@ -16317,6 +16328,7 @@ { if (GET_CODE (operands[5]) =3D=3D EQ) std::swap (operands[3], operands[4]); + operands[2] =3D lowpart_subreg (SImode, operands[2], QImode); }) =20 ;; Help combine recognize bt followed by setc @@ -16325,7 +16337,7 @@ (zero_extract:SWI48 (match_operand:SWI48 1 "register_operand") (const_int 1) - (match_operand:QI 2 "register_operand"))) + (zero_extend:SI (match_operand:QI 2 "register_operand")))) (clobber (reg:CC FLAGS_REG))] "TARGET_USE_BT && ix86_pre_reload_split ()" "#" @@ -16335,7 +16347,8 @@ (zero_extract:SWI48 (match_dup 1) (const_int 1) (match_dup 2)) (const_int 0))) (set (match_dup 0) - (eq:QI (reg:CCC FLAGS_REG) (const_int 0)))]) + (eq:QI (reg:CCC FLAGS_REG) (const_int 0)))] + "operands[2] =3D lowpart_subreg (SImode, operands[2], QImode);") =20 ;; Help combine recognize bt followed by setnc (define_insn_and_split "*bt_setncqi" @@ -16355,7 +16368,8 @@ (zero_extract:SWI48 (match_dup 1) (const_int 1) (match_dup 2)) (const_int 0))) (set (match_dup 0) - (ne:QI (reg:CCC FLAGS_REG) (const_int 0)))]) + (ne:QI (reg:CCC FLAGS_REG) (const_int 0)))] + "operands[2] =3D lowpart_subreg (SImode, operands[2], QImode);") =20 (define_insn_and_split "*bt_setnc" [(set (match_operand:SWI48 0 "register_operand") @@ -16375,7 +16389,10 @@ (set (match_dup 3) (ne:QI (reg:CCC FLAGS_REG) (const_int 0))) (set (match_dup 0) (zero_extend:SWI48 (match_dup 3)))] - "operands[3] =3D gen_reg_rtx (QImode);") +{ + operands[2] =3D lowpart_subreg (SImode, operands[2], QImode); + operands[3] =3D gen_reg_rtx (QImode); +}) =20 ;; Help combine recognize bt followed by setnc (PR target/110588) (define_insn_and_split "*bt_setncqi_2" @@ -16384,7 +16401,7 @@ (zero_extract:SWI48 (match_operand:SWI48 1 "register_operand") (const_int 1) - (match_operand:QI 2 "register_operand")) + (zero_extend:SI (match_operand:QI 2 "register_operand"))) (const_int 0))) (clobber (reg:CC FLAGS_REG))] "TARGET_USE_BT && ix86_pre_reload_split ()" @@ -16395,36 +16412,8 @@ (zero_extract:SWI48 (match_dup 1) (const_int 1) (match_dup 2)) (const_int 0))) (set (match_dup 0) - (ne:QI (reg:CCC FLAGS_REG) (const_int 0)))]) - -;; Help combine recognize bt followed by setc -(define_insn_and_split "*bt_setc_mask" - [(set (match_operand:SWI48 0 "register_operand") - (zero_extract:SWI48 - (match_operand:SWI48 1 "register_operand") - (const_int 1) - (subreg:QI - (and:SWI48 - (match_operand:SWI48 2 "register_operand") - (match_operand 3 "const_int_operand")) 0))) - (clobber (reg:CC FLAGS_REG))] - "TARGET_USE_BT - && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode)-1)) - =3D=3D GET_MODE_BITSIZE (mode)-1 - && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (reg:CCC FLAGS_REG) - (compare:CCC - (zero_extract:SWI48 (match_dup 1) (const_int 1) (match_dup 2)) - (const_int 0))) - (set (match_dup 3) - (ne:QI (reg:CCC FLAGS_REG) (const_int 0))) - (set (match_dup 0) (zero_extend:SWI48 (match_dup 3)))] -{ - operands[2] =3D gen_lowpart (QImode, operands[2]); - operands[3] =3D gen_reg_rtx (QImode); -}) + (ne:QI (reg:CCC FLAGS_REG) (const_int 0)))] + "operands[2] =3D lowpart_subreg (SImode, operands[2], QImode);") =0C ;; Store-flag instructions. =20 @@ -18719,29 +18708,46 @@ [(parallel [(set (match_operand:SWI48 0 "register_operand") (if_then_else:SWI48 - (ne:QI (match_operand:QI 2 "register_operand") + (ne:QI (and:SWI48 (match_operand:SWI48 2 "register_operand") + (const_int 255)) (const_int 0)) (zero_extract:SWI48 (match_operand:SWI48 1 "nonimmediate_operand") - (umin:QI (match_dup 2) (match_dup 3)) + (umin:SWI48 (and:SWI48 (match_dup 2) (const_int 255)) + (match_dup 3)) (const_int 0)) (const_int 0))) (clobber (reg:CC FLAGS_REG))])] "TARGET_BMI2" -{ - operands[2] =3D gen_lowpart (QImode, operands[2]); - operands[3] =3D GEN_INT ( * BITS_PER_UNIT); -}) + "operands[3] =3D GEN_INT ( * BITS_PER_UNIT);") =20 (define_insn "*bmi2_bzhi_3" [(set (match_operand:SWI48 0 "register_operand" "=3Dr") (if_then_else:SWI48 - (ne:QI (match_operand:QI 2 "register_operand" "q") + (ne:QI (and:SWI48 (match_operand:SWI48 2 "register_operand" "r") + (const_int 255)) (const_int 0)) (zero_extract:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "rm") - (umin:QI (match_dup 2) - (match_operand:QI 3 "const_int_operand")) + (umin:SWI48 (and:SWI48 (match_dup 2) (const_int 255)) + (match_operand:SWI48 3 "const_int_operand")) + (const_int 0)) + (const_int 0))) + (clobber (reg:CC FLAGS_REG))] + "TARGET_BMI2 && INTVAL (operands[3]) =3D=3D * BITS_PER_UNIT" + "bzhi\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "type" "bitmanip") + (set_attr "prefix" "vex") + (set_attr "mode" "")]) + +(define_insn "*bmi2_bzhi_3_1" + [(set (match_operand:SWI48 0 "register_operand" "=3Dr") + (if_then_else:SWI48 + (ne:QI (match_operand:QI 2 "register_operand" "r") (const_int 0)) + (zero_extract:SWI48 + (match_operand:SWI48 1 "nonimmediate_operand" "rm") + (umin:SWI48 (zero_extend:SWI48 (match_dup 2)) + (match_operand:SWI48 3 "const_int_operand")) (const_int 0)) (const_int 0))) (clobber (reg:CC FLAGS_REG))] @@ -18758,8 +18764,8 @@ (ne:QI (match_operand:QI 2 "register_operand" "r") (const_int 0)) (zero_extract:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "rm") - (umin:QI (match_dup 2) - (match_operand:QI 3 "const_int_operand")) + (umin:SWI48 (zero_extend:SWI48 (match_dup 2)) + (match_operand:SWI48 3 "const_int_operand")) (const_int 0)) (const_int 0)) (const_int 0))) @@ -18858,8 +18864,8 @@ [(set (match_operand:SWI48 0 "register_operand" "=3Dr") (zero_extract:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "rm") - (match_operand:QI 2 "const_0_to_255_operand") - (match_operand:QI 3 "const_0_to_255_operand"))) + (match_operand 2 "const_0_to_255_operand") + (match_operand 3 "const_0_to_255_operand"))) (clobber (reg:CC FLAGS_REG))] "TARGET_TBM" { ------=_NextPart_000_0216_01D9BE2B.AE8DCCA0--