From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 5D5E9385350F for ; Sat, 28 Oct 2023 16:47:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5D5E9385350F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 5D5E9385350F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=162.254.253.69 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1698511679; cv=none; b=bXgOqHFEhwDNX3zn5F6QmBX8hz+Xq5T8fGPL8OeV6cFZ1nf9r2HyJYNMdFtKyqRw5OjhFoNQGfSVfAcWmAp7zKcBC+ulKf4AADqlSZ+IBeBRuAbTxocAJ2kfM+DCM+XZFn0xzSdCddx0wA2SSXc5w42/JbTmRnwx0UH8/FRGwfY= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1698511679; c=relaxed/simple; bh=vujTpygndYrKZj8tKaDIr2QPLO6vFqx5V+yqmu1FE88=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=mZVcnsJLos1elkDms9qbCAkgYPO5L/A+hiTUsHoQ09u5nFGhyIPPQ1UjNosQT3wHJce13NGKkeQp+yiKkmsGv02cq3w1XniUMHRswe4Krp1Bx+lOjWgPwka5s1tlbNiZDoy64WCPf83q8afyMRKVar+dJYamtsDWX4pB5K8jNs8= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=k5fY4xbVU+imE8QVeYplVhq0oj9TugQPTvRqdqycAVY=; b=kXbkx0pvg/T1GWFslB1T6gR8OP FU1enSEaZR9oUFFGvLI3wtSg6MOiC82O9NpqByfDqV6EYRISVa0p0nHbI4jHfHq2MJK0omsunirDb gnNKQCmQFolw6K+bl3xNc3RUIxYrDKmFXFILyBFrE0oKeAutTTxMEdKk+Objz2fOG/besx9FCO4xx au3LQMFOvKbtm5DU6Tv8QRmZQ51ce4NPmdK4H+5YZJXyBjLZcWNSeIpfngwuchS4rpVdKRwXPm/dc KsNXl5ZgkbtVQuWjg+YmTszuBs+4llJ6WFMTIF3yJyBFG3NUBH6npkI2jsmVR3QG9V8msD+8CZL9d rBlnMa4g==; Received: from [185.62.158.67] (port=59446 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1qwmTd-0001Cs-2g; Sat, 28 Oct 2023 12:47:58 -0400 From: "Roger Sayle" To: Cc: "'Claudiu Zissulescu'" Subject: [ARC PATCH] Convert (signed<<31)>>31 to -(signed&1) without barrel shifter. Date: Sat, 28 Oct 2023 17:47:55 +0100 Message-ID: <023f01da09be$81123020$83369060$@nextmovesoftware.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0240_01DA09C6.E2D69820" X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdoJvdv8Mmn42qRGTg+gm4dnrbE+XQ== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This is a multipart message in MIME format. ------=_NextPart_000_0240_01DA09C6.E2D69820 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit This patch optimizes PR middle-end/101955 for the ARC backend. On ARC CPUs with a barrel shifter, using two shifts is (probably) optimal as: asl_s r0,r0,31 asr_s r0,r0,31 but without a barrel shifter, GCC -O2 -mcpu=em currently generates: and r2,r0,1 ror r2,r2 add.f 0,r2,r2 sbc r0,r0,r0 with this patch, we now generate the smaller, faster and non-flags clobbering: bmsk_s r0,r0,0 neg_s r0,r0 Tested with a cross-compiler to arc-linux hosted on x86_64, with no new (compile-only) regressions from make -k check. Ok for mainline if this passes Claudiu's nightly testing? 2023-10-28 Roger Sayle gcc/ChangeLog PR middle-end/101955 * config/arc/arc.md (*extvsi_1_0): New define_insn_and_split to convert sign extract of the least significant bit into an AND $1 then a NEG when !TARGET_BARREL_SHIFTER. gcc/testsuite/ChangeLog PR middle-end/101955 * gcc.target/arc/pr101955.c: New test case. Thanks again, Roger -- ------=_NextPart_000_0240_01DA09C6.E2D69820 Content-Type: text/plain; name="patchar3.txt" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="patchar3.txt" diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md=0A= index ee43887..6471344 100644=0A= --- a/gcc/config/arc/arc.md=0A= +++ b/gcc/config/arc/arc.md=0A= @@ -5873,6 +5873,20 @@ archs4x, archs4xd"=0A= (zero_extract:SI (match_dup 1) (match_dup 5) (match_dup 7)))])=0A= (match_dup 1)])=0A= =0A= +;; Split sign-extension of single least significant bit as and x,$1;neg = x=0A= +(define_insn_and_split "*extvsi_1_0"=0A= + [(set (match_operand:SI 0 "register_operand" "=3Dr")=0A= + (sign_extract:SI (match_operand:SI 1 "register_operand" "0")=0A= + (const_int 1)=0A= + (const_int 0)))]=0A= + "!TARGET_BARREL_SHIFTER"=0A= + "#"=0A= + "&& 1"=0A= + [(set (match_dup 0) (and:SI (match_dup 1) (const_int 1)))=0A= + (set (match_dup 0) (neg:SI (match_dup 0)))]=0A= + ""=0A= + [(set_attr "length" "8")])=0A= +=0A= (define_insn_and_split "rotlsi3_cnt1"=0A= [(set (match_operand:SI 0 "dest_reg_operand" "=3Dr")=0A= (rotate:SI (match_operand:SI 1 "register_operand" "r")=0A= diff --git a/gcc/testsuite/gcc.target/arc/pr101955.c = b/gcc/testsuite/gcc.target/arc/pr101955.c=0A= new file mode 100644=0A= index 0000000..74bca3c=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/arc/pr101955.c=0A= @@ -0,0 +1,10 @@=0A= +/* { dg-do compile } */=0A= +/* { dg-options "-O2 -mcpu=3Dem" } */=0A= +=0A= +int f(int a)=0A= +{=0A= + return (a << 31) >> 31;=0A= +}=0A= +=0A= +/* { dg-final { scan-assembler "msk_s\\s+r0,r0,0" } } */=0A= +/* { dg-final { scan-assembler "neg_s\\s+r0,r0" } } */=0A= ------=_NextPart_000_0240_01DA09C6.E2D69820--