From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 1A7F93858297 for ; Sun, 26 Jun 2022 12:04:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1A7F93858297 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=NV/uk4w26viasDufkLS6xOtiLQW9y2/RRhGA5g31ZbA=; b=PMz9R/Hh5gxwXB6O3CGOOCEWrS s+M/S0gVZ+n7Gu7Jd+flMIKOlyKGyZw0P0+wJDP/agvt1lgKFbIGSS3Y9v+xkRihqedleZLOdIC78 NAsnICQYWcLcvAJIt3bZpHlSQpehFEwd9CAikg9pfno2YwJtmzwzBZAp3qfCBaS9uEFnHJirO2Ghc VSZv3xuIm0EJwLbK6QYB8P/RcqiibI17uH6Pvfm/sYbOkm89nQ0MjZuSPW4kJXlDUmIibvsH8/YTv 0D9lrs5afEbRapL1SWEoAcm2YhdUrtr81m/+WVnGKvCSOHsHZd64Hp/vyqXS6bF+dGfncNot84GVl BcS25GnQ==; Received: from host86-130-134-60.range86-130.btcentralplus.com ([86.130.134.60]:55317 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o5R0Y-0001BW-Fl; Sun, 26 Jun 2022 08:04:54 -0400 From: "Roger Sayle" To: Subject: [x86 PATCH] PR rtl-optimization/96692: ((A|B)^C)^A using andn with -mbmi. Date: Sun, 26 Jun 2022 13:04:53 +0100 Message-ID: <025701d88954$f281ca40$d7855ec0$@nextmovesoftware.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0258_01D8895D.54463240" X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdiJVIwyClevf3qCR3OH19wR4h9M/g== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 26 Jun 2022 12:04:56 -0000 This is a multipart message in MIME format. ------=_NextPart_000_0258_01D8895D.54463240 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit This patch addresses PR rtl-optimization/96692 on x86_64, by providing a define_split for combine to convert the three operation ((A|B)^C)^D into a two operation sequence using andn when either A or B is the same register as C or D. This is essentially a reassociation problem that's only a win if the target supports an and-not instruction (as with -mbmi). Hence for the new test case: int f(int a, int b, int c) { return (a ^ b) ^ (a | c); } GCC on x86_64-pc-linux-gnu wth -O2 -mbmi would previously generate: xorl %edi, %esi orl %edx, %edi movl %esi, %eax xorl %edi, %eax ret but with this patch now generates: andn %edx, %edi, %eax xorl %esi, %eax ret I'll investigate whether this optimization can also be implemented more generically in simplify_rtx when the backend provides accurate rtx_costs for "(and (not ..." (as there's no optab for andn). This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-06-26 Roger Sayle gcc/ChangeLog PR rtl-optimization/96692 * config/i386/i386.md (define_split): Split ((A | B) ^ C) ^ D as (X & ~Y) ^ Z on target BMI when either C or D is A or B. gcc/testsuite/ChangeLog PR rtl-optimization/96692 * gcc.target/i386/bmi-andn-4.c: New test case. Thanks in advance, Roger -- ------=_NextPart_000_0258_01D8895D.54463240 Content-Type: text/plain; name="patchbm2.txt" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="patchbm2.txt" diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md=0A= index 3093cb5..27dddaf 100644=0A= --- a/gcc/config/i386/i386.md=0A= +++ b/gcc/config/i386/i386.md=0A= @@ -10525,6 +10525,57 @@=0A= (set (match_dup 0) (match_op_dup 1=0A= [(and:SI (match_dup 3) (match_dup 2))=0A= (const_int 0)]))])=0A= +=0A= +;; Split ((A | B) ^ C) ^ D as (X & ~Y) ^ Z.=0A= +(define_split=0A= + [(set (match_operand:SWI48 0 "register_operand")=0A= + (xor:SWI48=0A= + (xor:SWI48=0A= + (ior:SWI48 (match_operand:SWI48 1 "register_operand")=0A= + (match_operand:SWI48 2 "nonimmediate_operand"))=0A= + (match_operand:SWI48 3 "nonimmediate_operand"))=0A= + (match_operand:SWI48 4 "nonimmediate_operand")))=0A= + (clobber (reg:CC FLAGS_REG))]=0A= + "TARGET_BMI=0A= + && ix86_pre_reload_split ()=0A= + && (rtx_equal_p (operands[1], operands[3])=0A= + || rtx_equal_p (operands[1], operands[4])=0A= + || (REG_P (operands[2])=0A= + && (rtx_equal_p (operands[2], operands[3])=0A= + || rtx_equal_p (operands[2], operands[4]))))"=0A= + [(parallel=0A= + [(set (match_dup 5) (and:SWI48 (not:SWI48 (match_dup 6)) = (match_dup 7)))=0A= + (clobber (reg:CC FLAGS_REG))])=0A= + (parallel=0A= + [(set (match_dup 0) (xor:SWI48 (match_dup 5) (match_dup 8)))=0A= + (clobber (reg:CC FLAGS_REG))])]=0A= +{=0A= + operands[5] =3D gen_reg_rtx (mode);=0A= + if (rtx_equal_p (operands[1], operands[3]))=0A= + {=0A= + operands[6] =3D operands[1];=0A= + operands[7] =3D operands[2];=0A= + operands[8] =3D operands[4];=0A= + }=0A= + else if (rtx_equal_p (operands[1], operands[4]))=0A= + {=0A= + operands[6] =3D operands[1];=0A= + operands[7] =3D operands[2];=0A= + operands[8] =3D operands[3];=0A= + }=0A= + else if (rtx_equal_p (operands[2], operands[3]))=0A= + {=0A= + operands[6] =3D operands[2];=0A= + operands[7] =3D operands[1];=0A= + operands[8] =3D operands[4];=0A= + }=0A= + else=0A= + {=0A= + operands[6] =3D operands[2];=0A= + operands[7] =3D operands[1];=0A= + operands[8] =3D operands[3];=0A= + }=0A= +})=0A= =0C=0A= ;; Logical inclusive and exclusive OR instructions=0A= =0A= diff --git a/gcc/testsuite/gcc.target/i386/bmi-andn-4.c = b/gcc/testsuite/gcc.target/i386/bmi-andn-4.c=0A= new file mode 100644=0A= index 0000000..fb89529=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/i386/bmi-andn-4.c=0A= @@ -0,0 +1,9 @@=0A= +/* { dg-do compile } */=0A= +/* { dg-options "-O2 -mbmi" } */=0A= +=0A= +int f(int a, int b, int c)=0A= +{=0A= + return (a ^ b) ^ (a | c);=0A= +}=0A= +=0A= +/* { dg-final { scan-assembler "andn\[ \\t\]+" } } */=0A= ------=_NextPart_000_0258_01D8895D.54463240--