From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 941FA385770D for ; Thu, 2 Nov 2023 11:54:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 941FA385770D Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 941FA385770D Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=162.254.253.69 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1698926053; cv=none; b=HoqUkB9hhjAENaGixWq7983rvMjtpBZ0uNzT/YvHahEgzt379uVdAFxe+P9rFHQpOfs8qcbk1MbwtzqG0wEsQsMGDdpEm+F/jTUdXYhKG8YSTP6blFwYvD9yDjkMBHuB/ueP1W3sbNuiP1TMKmelVXFTgayxGV0rsZ3LELSB0Wc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1698926053; c=relaxed/simple; bh=balLguFur2zchDyTzJPnZMGL/5GZ4bjV+a2CqgoOEZ0=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=JlVJobm+6DgZP4yg85hKlAaCjg0xnlAYBpNLlDbny537fDNOsoWANXTpP7DMtYnNpsUfpGbTXJFhfXDjK0JJp002HbVOwJr7Z19/UUIw+HNvMf1nNLwxDPC24iZFSK1QjVAO2LgFGL8ZIyUED2RnfDKiQHni41dy+P5BGQb8UfY= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=NY3cheYjn6G/Y8NPf32N0zJP6ePjfVHsbUIy6PMKTl0=; b=qj+wnFnAd+enh9vJQ8LwPgrABd g44Iq2IifD1Lf8rajyCSf1TNNGx9stKjxA85HszzT5ld4fSBEkBTNKp1HdEtxLh8ozCjKzJPcRpz1 aefs1YIYAvfA+6S/tpw4NI2FytBv+fnYU8B/m3Hce0rHRReCbr6jq/RM7e1Jue91YKOCc9RwTMeRJ DCxYo6KHOPPQ+mU/oPFhUhH1l9aC6lsIQ84OjhnCgoi95TebrZJf1N8M0wIlft3i0fLUM3hw7+OAq k+/axCJ+vtfhmKCQKLz1DS8o23BAAbKtPdk/EEPvF7ulrKQmnovq0u+GFwRic5GdpzTHSndx7gRHw 9l2yagNQ==; Received: from host86-160-20-38.range86-160.btcentralplus.com ([86.160.20.38]:64325 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1qyWGw-00025p-0B; Thu, 02 Nov 2023 07:54:02 -0400 From: "Roger Sayle" To: Cc: "'Denis Chertykov'" , "'Georg-Johann Lay'" Subject: [AVR PATCH] Improvements to SImode and PSImode shifts by constants. Date: Thu, 2 Nov 2023 11:54:00 -0000 Message-ID: <026501da0d83$457b0d20$d0712760$@nextmovesoftware.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0266_01DA0D83.457B0D20" X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdoNguWewaAklJA2Rk2RDfV2pSuW5A== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This is a multipart message in MIME format. ------=_NextPart_000_0266_01DA0D83.457B0D20 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit This patch provides non-looping implementations for more SImode (32-bit) and PSImode (24-bit) shifts on AVR. For most cases, these are shorter and faster than using a loop, but for a few (controlled by optimize_size) they are a little larger but significantly faster, The approach is to perform byte-based shifts by 1, 2 or 3 bytes, followed by bit-based shifts (effectively in a narrower type) for the remaining bits, beyond 8, 16 or 24. For example, the simple test case below (inspired by PR 112268): unsigned long foo(unsigned long x) { return x >> 26; } gcc -O2 currently generates: foo: ldi r18,26 1: lsr r25 ror r24 ror r23 ror r22 dec r18 brne 1b ret which is 8 instructions, and takes ~158 cycles. With this patch, we now generate: foo: mov r22,r25 clr r23 clr r24 clr r25 lsr r22 lsr r22 ret which is 7 instructions, and takes ~7 cycles. One complication is that the modified functions sometimes use spaces instead of TABs, with occasional mistakes in GNU-style formatting, so I've fixed these indentation/whitespace issues. There's no change in the code for the cases previously handled/special-cased, with the exception of ashrqi3 reg,5 where with -Os a (4-instruction) loop is shorter than the five single-bit shifts of a fully unrolled implementation. This patch has been (partially) tested with a cross-compiler to avr-elf hosted on x86_64, without a simulator, where the compile-only tests in the gcc testsuite show no regressions. If someone could test this more thoroughly that would be great. 2023-11-02 Roger Sayle gcc/ChangeLog * config/avr/avr.cc (ashlqi3_out): Fix indentation whitespace. (ashlhi3_out): Likewise. (avr_out_ashlpsi3): Likewise. Handle shifts by 9 and 17-22. (ashlsi3_out): Fix formatting. Handle shifts by 9 and 25-30. (ashrqi3_our): Use loop for shifts by 5 when optimizing for size. Fix indentation whitespace. (ashrhi3_out): Likewise. (avr_out_ashrpsi3): Likewise. Handle shifts by 17. (ashrsi3_out): Fix indentation. Handle shifts by 17 and 25. (lshrqi3_out): Fix whitespace. (lshrhi3_out): Likewise. (avr_out_lshrpsi3): Likewise. Handle shifts by 9 and 17-22. (lshrsi3_out): Fix indentation. Handle shifts by 9,17,18 and 25-30. gcc/testsuite/ChangeLog * gcc.target/avr/ashlsi-1.c: New test case. * gcc.target/avr/ashlsi-2.c: Likewise. * gcc.target/avr/ashrsi-1.c: Likewise. * gcc.target/avr/ashrsi-2.c: Likewise. * gcc.target/avr/lshrsi-1.c: Likewise. * gcc.target/avr/lshrsi-2.c: Likewise. Thanks in advance, Roger -- ------=_NextPart_000_0266_01DA0D83.457B0D20 Content-Type: text/plain; name="patchav2.txt" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="patchav2.txt" diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc=0A= index 5e0217de36fc..706599b4aa6a 100644=0A= --- a/gcc/config/avr/avr.cc=0A= +++ b/gcc/config/avr/avr.cc=0A= @@ -6715,7 +6715,7 @@ ashlqi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= fatal_insn ("internal compiler error. Incorrect shift:", insn);=0A= =0A= out_shift_with_cnt ("lsl %0",=0A= - insn, operands, len, 1);=0A= + insn, operands, len, 1);=0A= return "";=0A= }=0A= =0A= @@ -6728,8 +6728,8 @@ ashlhi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= if (CONST_INT_P (operands[2]))=0A= {=0A= int scratch =3D (GET_CODE (PATTERN (insn)) =3D=3D PARALLEL=0A= - && XVECLEN (PATTERN (insn), 0) =3D=3D 3=0A= - && REG_P (operands[3]));=0A= + && XVECLEN (PATTERN (insn), 0) =3D=3D 3=0A= + && REG_P (operands[3]));=0A= int ldi_ok =3D test_hard_reg_class (LD_REGS, operands[0]);=0A= int k;=0A= int *t =3D len;=0A= @@ -6826,8 +6826,9 @@ ashlhi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= "ror %A0");=0A= =0A= case 8:=0A= - return *len =3D 2, ("mov %B0,%A1" CR_TAB=0A= - "clr %A0");=0A= + *len =3D 2;=0A= + return ("mov %B0,%A1" CR_TAB=0A= + "clr %A0");=0A= =0A= case 9:=0A= *len =3D 3;=0A= @@ -6974,7 +6975,7 @@ ashlhi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= len =3D t;=0A= }=0A= out_shift_with_cnt ("lsl %A0" CR_TAB=0A= - "rol %B0", insn, operands, len, 2);=0A= + "rol %B0", insn, operands, len, 2);=0A= return "";=0A= }=0A= =0A= @@ -6990,54 +6991,126 @@ avr_out_ashlpsi3 (rtx_insn *insn, rtx *op, int = *plen)=0A= if (CONST_INT_P (op[2]))=0A= {=0A= switch (INTVAL (op[2]))=0A= - {=0A= - default:=0A= - if (INTVAL (op[2]) < 24)=0A= - break;=0A= + {=0A= + default:=0A= + if (INTVAL (op[2]) < 24)=0A= + break;=0A= =0A= - return avr_asm_len ("clr %A0" CR_TAB=0A= - "clr %B0" CR_TAB=0A= - "clr %C0", op, plen, 3);=0A= + return avr_asm_len ("clr %A0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %C0", op, plen, 3);=0A= =0A= - case 8:=0A= - {=0A= - int reg0 =3D REGNO (op[0]);=0A= - int reg1 =3D REGNO (op[1]);=0A= -=0A= - if (reg0 >=3D reg1)=0A= - return avr_asm_len ("mov %C0,%B1" CR_TAB=0A= - "mov %B0,%A1" CR_TAB=0A= - "clr %A0", op, plen, 3);=0A= - else=0A= - return avr_asm_len ("clr %A0" CR_TAB=0A= - "mov %B0,%A1" CR_TAB=0A= - "mov %C0,%B1", op, plen, 3);=0A= - }=0A= + case 8:=0A= + if (REGNO (op[0]) >=3D REGNO (op[1]))=0A= + return avr_asm_len ("mov %C0,%B1" CR_TAB=0A= + "mov %B0,%A1" CR_TAB=0A= + "clr %A0", op, plen, 3);=0A= + else=0A= + return avr_asm_len ("clr %A0" CR_TAB=0A= + "mov %B0,%A1" CR_TAB=0A= + "mov %C0,%B1", op, plen, 3);=0A= =0A= - case 16:=0A= - {=0A= - int reg0 =3D REGNO (op[0]);=0A= - int reg1 =3D REGNO (op[1]);=0A= + case 9:=0A= + if (REGNO (op[0]) >=3D REGNO (op[1]))=0A= + return avr_asm_len ("mov %C0,%B1" CR_TAB=0A= + "mov %B0,%A1" CR_TAB=0A= + "lsl %B0" CR_TAB=0A= + "rol %C0" CR_TAB=0A= + "clr %A0", op, plen, 5);=0A= + else=0A= + return avr_asm_len ("clr %A0" CR_TAB=0A= + "mov %B0,%A1" CR_TAB=0A= + "mov %C0,%B1" CR_TAB=0A= + "lsl %B0" CR_TAB=0A= + "rol %C0", op, plen, 5);=0A= =0A= - if (reg0 + 2 !=3D reg1)=0A= - avr_asm_len ("mov %C0,%A0", op, plen, 1);=0A= + case 16:=0A= + if (REGNO (op[0]) + 2 !=3D REGNO (op[1]))=0A= + avr_asm_len ("mov %C0,%A0", op, plen, 1);=0A= + return avr_asm_len ("clr %B0" CR_TAB=0A= + "clr %A0", op, plen, 2);=0A= +=0A= + case 17:=0A= + if (REGNO (op[0]) + 2 !=3D REGNO (op[1]))=0A= + avr_asm_len ("mov %C0,%A0", op, plen, 1);=0A= + return avr_asm_len ("lsl %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0", op, plen, 3);=0A= +=0A= + case 18:=0A= + if (REGNO (op[0]) + 2 !=3D REGNO (op[1]))=0A= + avr_asm_len ("mov %C0,%A0", op, plen, 1);=0A= + return avr_asm_len ("lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0", op, plen, 4);=0A= +=0A= + case 19:=0A= + if (REGNO (op[0]) + 2 !=3D REGNO (op[1]))=0A= + avr_asm_len ("mov %C0,%A0", op, plen, 1);=0A= + return avr_asm_len ("lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0", op, plen, 5);=0A= +=0A= + case 20:=0A= + if (!optimize_size)=0A= + {=0A= + if (REGNO (op[0]) + 2 !=3D REGNO (op[1]))=0A= + avr_asm_len ("mov %C0,%A0", op, plen, 1);=0A= + return avr_asm_len ("lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0", op, plen, 6);=0A= + }=0A= + break;=0A= =0A= - return avr_asm_len ("clr %B0" CR_TAB=0A= - "clr %A0", op, plen, 2);=0A= - }=0A= + case 21:=0A= + if (!optimize_size)=0A= + {=0A= + if (REGNO (op[0]) + 2 !=3D REGNO (op[1]))=0A= + avr_asm_len ("mov %C0,%A0", op, plen, 1);=0A= + return avr_asm_len ("lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0", op, plen, 7);=0A= + }=0A= + break;=0A= =0A= - case 23:=0A= - return avr_asm_len ("clr %C0" CR_TAB=0A= - "lsr %A0" CR_TAB=0A= - "ror %C0" CR_TAB=0A= - "clr %B0" CR_TAB=0A= - "clr %A0", op, plen, 5);=0A= - }=0A= + case 22:=0A= + if (!optimize_size)=0A= + {=0A= + if (REGNO (op[0]) + 2 !=3D REGNO (op[1]))=0A= + avr_asm_len ("mov %C0,%A0", op, plen, 1);=0A= + return avr_asm_len ("lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "lsl %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0", op, plen, 8);=0A= + }=0A= + break;=0A= +=0A= + case 23:=0A= + return avr_asm_len ("clr %C0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "ror %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0", op, plen, 5);=0A= + }=0A= }=0A= =0A= out_shift_with_cnt ("lsl %A0" CR_TAB=0A= - "rol %B0" CR_TAB=0A= - "rol %C0", insn, op, plen, 3);=0A= + "rol %B0" CR_TAB=0A= + "rol %C0", insn, op, plen, 3);=0A= return "";=0A= }=0A= =0A= @@ -7072,39 +7145,56 @@ ashlsi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= "clr %A0");=0A= =0A= case 8:=0A= - {=0A= - int reg0 =3D true_regnum (operands[0]);=0A= - int reg1 =3D true_regnum (operands[1]);=0A= - *len =3D 4;=0A= - if (reg0 >=3D reg1)=0A= - return ("mov %D0,%C1" CR_TAB=0A= - "mov %C0,%B1" CR_TAB=0A= - "mov %B0,%A1" CR_TAB=0A= - "clr %A0");=0A= - else=0A= - return ("clr %A0" CR_TAB=0A= - "mov %B0,%A1" CR_TAB=0A= - "mov %C0,%B1" CR_TAB=0A= - "mov %D0,%C1");=0A= - }=0A= + *len =3D 4;=0A= + if (true_regnum (operands[0]) >=3D true_regnum (operands[1]))=0A= + return ("mov %D0,%C1" CR_TAB=0A= + "mov %C0,%B1" CR_TAB=0A= + "mov %B0,%A1" CR_TAB=0A= + "clr %A0");=0A= + else=0A= + return ("clr %A0" CR_TAB=0A= + "mov %B0,%A1" CR_TAB=0A= + "mov %C0,%B1" CR_TAB=0A= + "mov %D0,%C1");=0A= +=0A= + case 9:=0A= + *len =3D 7;=0A= + if (true_regnum (operands[0]) >=3D true_regnum (operands[1]))=0A= + return ("mov %D0,%C1" CR_TAB=0A= + "mov %C0,%B1" CR_TAB=0A= + "mov %B0,%A1" CR_TAB=0A= + "clr %A0" CR_TAB=0A= + "lsl %B0" CR_TAB=0A= + "rol %C0" CR_TAB=0A= + "rol %D0");=0A= + else=0A= + return ("clr %A0" CR_TAB=0A= + "mov %B0,%A1" CR_TAB=0A= + "mov %C0,%B1" CR_TAB=0A= + "mov %D0,%C1" CR_TAB=0A= + "lsl %B0" CR_TAB=0A= + "rol %C0" CR_TAB=0A= + "rol %D0");=0A= =0A= case 16:=0A= - {=0A= - int reg0 =3D true_regnum (operands[0]);=0A= - int reg1 =3D true_regnum (operands[1]);=0A= - if (reg0 + 2 =3D=3D reg1)=0A= - return *len =3D 2, ("clr %B0" CR_TAB=0A= - "clr %A0");=0A= - if (AVR_HAVE_MOVW)=0A= - return *len =3D 3, ("movw %C0,%A1" CR_TAB=0A= - "clr %B0" CR_TAB=0A= - "clr %A0");=0A= - else=0A= - return *len =3D 4, ("mov %C0,%A1" CR_TAB=0A= - "mov %D0,%B1" CR_TAB=0A= - "clr %B0" CR_TAB=0A= - "clr %A0");=0A= - }=0A= + if (true_regnum (operands[0]) + 2 =3D=3D true_regnum (operands[1]))=0A= + {=0A= + *len =3D 2;=0A= + return ("clr %B0" CR_TAB=0A= + "clr %A0");=0A= + }=0A= + if (AVR_HAVE_MOVW)=0A= + {=0A= + *len =3D 3;=0A= + return ("movw %C0,%A1" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0");=0A= + }=0A= + *len =3D 4;=0A= + return ("mov %C0,%A1" CR_TAB=0A= + "mov %D0,%B1" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0");=0A= =0A= case 24:=0A= *len =3D 4;=0A= @@ -7113,6 +7203,74 @@ ashlsi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= "clr %B0" CR_TAB=0A= "clr %A0");=0A= =0A= + case 25:=0A= + *len =3D 5;=0A= + return ("mov %D0,%A1" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0");=0A= +=0A= + case 26:=0A= + *len =3D 6;=0A= + return ("mov %D0,%A1" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0");=0A= +=0A= + case 27:=0A= + *len =3D 7;=0A= + return ("mov %D0,%A1" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0");=0A= +=0A= + case 28:=0A= + if (optimize_size)=0A= + break;=0A= + *len =3D 8;=0A= + return ("mov %D0,%A1" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0");=0A= +=0A= + case 29:=0A= + if (optimize_size)=0A= + break;=0A= + *len =3D 9;=0A= + return ("mov %D0,%A1" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0");=0A= +=0A= + case 30:=0A= + if (optimize_size)=0A= + break;=0A= + *len =3D 10;=0A= + return ("mov %D0,%A1" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "lsl %D0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %A0");=0A= +=0A= case 31:=0A= *len =3D 6;=0A= return ("clr %D0" CR_TAB=0A= @@ -7125,9 +7283,9 @@ ashlsi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= len =3D t;=0A= }=0A= out_shift_with_cnt ("lsl %A0" CR_TAB=0A= - "rol %B0" CR_TAB=0A= - "rol %C0" CR_TAB=0A= - "rol %D0", insn, operands, len, 4);=0A= + "rol %B0" CR_TAB=0A= + "rol %C0" CR_TAB=0A= + "rol %D0", insn, operands, len, 4);=0A= return "";=0A= }=0A= =0A= @@ -7168,6 +7326,8 @@ ashrqi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= "asr %0");=0A= =0A= case 5:=0A= + if (optimize_size)=0A= + break;=0A= *len =3D 5;=0A= return ("asr %0" CR_TAB=0A= "asr %0" CR_TAB=0A= @@ -7198,7 +7358,7 @@ ashrqi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= fatal_insn ("internal compiler error. Incorrect shift:", insn);=0A= =0A= out_shift_with_cnt ("asr %0",=0A= - insn, operands, len, 1);=0A= + insn, operands, len, 1);=0A= return "";=0A= }=0A= =0A= @@ -7211,8 +7371,8 @@ ashrhi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= if (CONST_INT_P (operands[2]))=0A= {=0A= int scratch =3D (GET_CODE (PATTERN (insn)) =3D=3D PARALLEL=0A= - && XVECLEN (PATTERN (insn), 0) =3D=3D 3=0A= - && REG_P (operands[3]));=0A= + && XVECLEN (PATTERN (insn), 0) =3D=3D 3=0A= + && REG_P (operands[3]));=0A= int ldi_ok =3D test_hard_reg_class (LD_REGS, operands[0]);=0A= int k;=0A= int *t =3D len;=0A= @@ -7248,25 +7408,23 @@ ashrhi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= "sbc %B0,%B0");=0A= =0A= case 8:=0A= - {=0A= - int reg0 =3D true_regnum (operands[0]);=0A= - int reg1 =3D true_regnum (operands[1]);=0A= -=0A= - if (reg0 =3D=3D reg1)=0A= - return *len =3D 3, ("mov %A0,%B0" CR_TAB=0A= - "lsl %B0" CR_TAB=0A= - "sbc %B0,%B0");=0A= - else=0A= - return *len =3D 4, ("mov %A0,%B1" CR_TAB=0A= - "clr %B0" CR_TAB=0A= - "sbrc %A0,7" CR_TAB=0A= - "dec %B0");=0A= - }=0A= + if (true_regnum (operands[0]) =3D=3D true_regnum (operands[1]))=0A= + {=0A= + *len =3D 3;=0A= + return ("mov %A0,%B0" CR_TAB=0A= + "lsl %B0" CR_TAB=0A= + "sbc %B0,%B0");=0A= + }=0A= + *len =3D 4;=0A= + return ("mov %A0,%B1" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "sbrc %A0,7" CR_TAB=0A= + "dec %B0");=0A= =0A= case 9:=0A= *len =3D 4;=0A= return ("mov %A0,%B0" CR_TAB=0A= - "lsl %B0" CR_TAB=0A= + "lsl %B0" CR_TAB=0A= "sbc %B0,%B0" CR_TAB=0A= "asr %A0");=0A= =0A= @@ -7356,14 +7514,15 @@ ashrhi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= /* fall through */=0A= =0A= case 15:=0A= - return *len =3D 3, ("lsl %B0" CR_TAB=0A= - "sbc %A0,%A0" CR_TAB=0A= - "mov %B0,%A0");=0A= + *len =3D 3;=0A= + return ("lsl %B0" CR_TAB=0A= + "sbc %A0,%A0" CR_TAB=0A= + "mov %B0,%A0");=0A= }=0A= len =3D t;=0A= }=0A= out_shift_with_cnt ("asr %B0" CR_TAB=0A= - "ror %A0", insn, operands, len, 2);=0A= + "ror %A0", insn, operands, len, 2);=0A= return "";=0A= }=0A= =0A= @@ -7379,50 +7538,58 @@ avr_out_ashrpsi3 (rtx_insn *insn, rtx *op, int = *plen)=0A= if (CONST_INT_P (op[2]))=0A= {=0A= if (plen)=0A= - *plen =3D 0;=0A= + *plen =3D 0;=0A= =0A= switch (INTVAL (op[2]))=0A= - {=0A= - case 8:=0A= - if (dest <=3D src)=0A= - return avr_asm_len ("mov %A0,%B1" CR_TAB=0A= - "mov %B0,%C1" CR_TAB=0A= - "clr %C0" CR_TAB=0A= - "sbrc %B0,7" CR_TAB=0A= - "dec %C0", op, plen, 5);=0A= - else=0A= - return avr_asm_len ("clr %C0" CR_TAB=0A= - "sbrc %C1,7" CR_TAB=0A= - "dec %C0" CR_TAB=0A= - "mov %B0,%C1" CR_TAB=0A= - "mov %A0,%B1", op, plen, 5);=0A= -=0A= - case 16:=0A= - if (dest !=3D src + 2)=0A= - avr_asm_len ("mov %A0,%C1", op, plen, 1);=0A= + {=0A= + case 8:=0A= + if (dest <=3D src)=0A= + return avr_asm_len ("mov %A0,%B1" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "sbrc %B0,7" CR_TAB=0A= + "dec %C0", op, plen, 5);=0A= + else=0A= + return avr_asm_len ("clr %C0" CR_TAB=0A= + "sbrc %C1,7" CR_TAB=0A= + "dec %C0" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "mov %A0,%B1", op, plen, 5);=0A= =0A= - return avr_asm_len ("clr %B0" CR_TAB=0A= - "sbrc %A0,7" CR_TAB=0A= - "com %B0" CR_TAB=0A= - "mov %C0,%B0", op, plen, 4);=0A= + case 16:=0A= + if (dest !=3D src + 2)=0A= + avr_asm_len ("mov %A0,%C1", op, plen, 1);=0A= + return avr_asm_len ("clr %B0" CR_TAB=0A= + "sbrc %A0,7" CR_TAB=0A= + "com %B0" CR_TAB=0A= + "mov %C0,%B0", op, plen, 4);=0A= +=0A= + case 17:=0A= + if (dest !=3D src + 2)=0A= + avr_asm_len ("mov %A0,%C1", op, plen, 1);=0A= + return avr_asm_len ("clr %B0" CR_TAB=0A= + "sbrc %A0,7" CR_TAB=0A= + "com %B0" CR_TAB=0A= + "mov %C0,%B0" CR_TAB=0A= + "asr %A0", op, plen, 5);=0A= =0A= - default:=0A= - if (INTVAL (op[2]) < 24)=0A= - break;=0A= + default:=0A= + if (INTVAL (op[2]) < 24)=0A= + break;=0A= =0A= - /* fall through */=0A= + /* fall through */=0A= =0A= - case 23:=0A= - return avr_asm_len ("lsl %C0" CR_TAB=0A= - "sbc %A0,%A0" CR_TAB=0A= - "mov %B0,%A0" CR_TAB=0A= - "mov %C0,%A0", op, plen, 4);=0A= - } /* switch */=0A= + case 23:=0A= + return avr_asm_len ("lsl %C0" CR_TAB=0A= + "sbc %A0,%A0" CR_TAB=0A= + "mov %B0,%A0" CR_TAB=0A= + "mov %C0,%A0", op, plen, 4);=0A= + } /* switch */=0A= }=0A= =0A= out_shift_with_cnt ("asr %C0" CR_TAB=0A= - "ror %B0" CR_TAB=0A= - "ror %A0", insn, op, plen, 3);=0A= + "ror %B0" CR_TAB=0A= + "ror %A0", insn, op, plen, 3);=0A= return "";=0A= }=0A= =0A= @@ -7443,58 +7610,99 @@ ashrsi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= switch (INTVAL (operands[2]))=0A= {=0A= case 8:=0A= - {=0A= - int reg0 =3D true_regnum (operands[0]);=0A= - int reg1 =3D true_regnum (operands[1]);=0A= - *len=3D6;=0A= - if (reg0 <=3D reg1)=0A= - return ("mov %A0,%B1" CR_TAB=0A= - "mov %B0,%C1" CR_TAB=0A= - "mov %C0,%D1" CR_TAB=0A= - "clr %D0" CR_TAB=0A= - "sbrc %C0,7" CR_TAB=0A= - "dec %D0");=0A= - else=0A= - return ("clr %D0" CR_TAB=0A= - "sbrc %D1,7" CR_TAB=0A= - "dec %D0" CR_TAB=0A= - "mov %C0,%D1" CR_TAB=0A= - "mov %B0,%C1" CR_TAB=0A= - "mov %A0,%B1");=0A= - }=0A= + *len =3D 6;=0A= + if (true_regnum (operands[0]) <=3D true_regnum (operands[1]))=0A= + return ("mov %A0,%B1" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "mov %C0,%D1" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "sbrc %C0,7" CR_TAB=0A= + "dec %D0");=0A= + return ("clr %D0" CR_TAB=0A= + "sbrc %D1,7" CR_TAB=0A= + "dec %D0" CR_TAB=0A= + "mov %C0,%D1" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "mov %A0,%B1");=0A= =0A= case 16:=0A= - {=0A= - int reg0 =3D true_regnum (operands[0]);=0A= - int reg1 =3D true_regnum (operands[1]);=0A= -=0A= - if (reg0 =3D=3D reg1 + 2)=0A= - return *len =3D 4, ("clr %D0" CR_TAB=0A= - "sbrc %B0,7" CR_TAB=0A= - "com %D0" CR_TAB=0A= - "mov %C0,%D0");=0A= - if (AVR_HAVE_MOVW)=0A= - return *len =3D 5, ("movw %A0,%C1" CR_TAB=0A= - "clr %D0" CR_TAB=0A= - "sbrc %B0,7" CR_TAB=0A= - "com %D0" CR_TAB=0A= - "mov %C0,%D0");=0A= - else=0A= - return *len =3D 6, ("mov %B0,%D1" CR_TAB=0A= - "mov %A0,%C1" CR_TAB=0A= - "clr %D0" CR_TAB=0A= - "sbrc %B0,7" CR_TAB=0A= - "com %D0" CR_TAB=0A= - "mov %C0,%D0");=0A= - }=0A= + if (true_regnum (operands[0]) =3D=3D true_regnum (operands[1]) + 2)=0A= + {=0A= + *len =3D 4;=0A= + return ("clr %D0" CR_TAB=0A= + "sbrc %B0,7" CR_TAB=0A= + "com %D0" CR_TAB=0A= + "mov %C0,%D0");=0A= + }=0A= + if (AVR_HAVE_MOVW)=0A= + {=0A= + *len =3D 5;=0A= + return ("movw %A0,%C1" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "sbrc %B0,7" CR_TAB=0A= + "com %D0" CR_TAB=0A= + "mov %C0,%D0");=0A= + }=0A= + *len =3D 6;=0A= + return ("mov %B0,%D1" CR_TAB=0A= + "mov %A0,%C1" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "sbrc %B0,7" CR_TAB=0A= + "com %D0" CR_TAB=0A= + "mov %C0,%D0");=0A= +=0A= + case 17:=0A= + if (true_regnum (operands[0]) =3D=3D true_regnum (operands[1]) + 2)=0A= + {=0A= + *len =3D 6;=0A= + return ("clr %D0" CR_TAB=0A= + "sbrc %B0,7" CR_TAB=0A= + "com %D0" CR_TAB=0A= + "mov %C0,%D0" CR_TAB=0A= + "asr %B0" CR_TAB=0A= + "ror %A0");=0A= + }=0A= + if (AVR_HAVE_MOVW)=0A= + {=0A= + *len =3D 7;=0A= + return ("movw %A0,%C1" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "sbrc %B0,7" CR_TAB=0A= + "com %D0" CR_TAB=0A= + "mov %C0,%D0" CR_TAB=0A= + "asr %B0" CR_TAB=0A= + "ror %A0");=0A= + }=0A= + if (optimize_size)=0A= + break;=0A= + *len =3D 8;=0A= + return ("mov %B0,%D1" CR_TAB=0A= + "mov %A0,%C1" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "sbrc %B0,7" CR_TAB=0A= + "com %D0" CR_TAB=0A= + "mov %C0,%D0" CR_TAB=0A= + "asr %B0" CR_TAB=0A= + "ror %A0");=0A= =0A= case 24:=0A= - return *len =3D 6, ("mov %A0,%D1" CR_TAB=0A= - "clr %D0" CR_TAB=0A= - "sbrc %A0,7" CR_TAB=0A= - "com %D0" CR_TAB=0A= - "mov %B0,%D0" CR_TAB=0A= - "mov %C0,%D0");=0A= + *len =3D 6;=0A= + return ("mov %A0,%D1" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "sbrc %A0,7" CR_TAB=0A= + "com %D0" CR_TAB=0A= + "mov %B0,%D0" CR_TAB=0A= + "mov %C0,%D0");=0A= +=0A= + case 25:=0A= + *len =3D 7;=0A= + return ("mov %A0,%D1" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "sbrc %A0,7" CR_TAB=0A= + "com %D0" CR_TAB=0A= + "mov %B0,%D0" CR_TAB=0A= + "mov %C0,%D0" CR_TAB=0A= + "asr %A0");=0A= =0A= default:=0A= if (INTVAL (operands[2]) < 32)=0A= @@ -7504,23 +7712,26 @@ ashrsi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= =0A= case 31:=0A= if (AVR_HAVE_MOVW)=0A= - return *len =3D 4, ("lsl %D0" CR_TAB=0A= - "sbc %A0,%A0" CR_TAB=0A= - "mov %B0,%A0" CR_TAB=0A= - "movw %C0,%A0");=0A= - else=0A= - return *len =3D 5, ("lsl %D0" CR_TAB=0A= - "sbc %A0,%A0" CR_TAB=0A= - "mov %B0,%A0" CR_TAB=0A= - "mov %C0,%A0" CR_TAB=0A= - "mov %D0,%A0");=0A= + {=0A= + *len =3D 4;=0A= + return ("lsl %D0" CR_TAB=0A= + "sbc %A0,%A0" CR_TAB=0A= + "mov %B0,%A0" CR_TAB=0A= + "movw %C0,%A0");=0A= + }=0A= + *len =3D 5;=0A= + return ("lsl %D0" CR_TAB=0A= + "sbc %A0,%A0" CR_TAB=0A= + "mov %B0,%A0" CR_TAB=0A= + "mov %C0,%A0" CR_TAB=0A= + "mov %D0,%A0");=0A= }=0A= len =3D t;=0A= }=0A= out_shift_with_cnt ("asr %D0" CR_TAB=0A= - "ror %C0" CR_TAB=0A= - "ror %B0" CR_TAB=0A= - "ror %A0", insn, operands, len, 4);=0A= + "ror %C0" CR_TAB=0A= + "ror %B0" CR_TAB=0A= + "ror %A0", insn, operands, len, 4);=0A= return "";=0A= }=0A= =0A= @@ -7562,7 +7773,7 @@ lshrqi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= case 4:=0A= if (test_hard_reg_class (LD_REGS, operands[0]))=0A= {=0A= - *len=3D2;=0A= + *len =3D 2;=0A= return ("swap %0" CR_TAB=0A= "andi %0,0x0f");=0A= }=0A= @@ -7615,7 +7826,7 @@ lshrqi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= fatal_insn ("internal compiler error. Incorrect shift:", insn);=0A= =0A= out_shift_with_cnt ("lsr %0",=0A= - insn, operands, len, 1);=0A= + insn, operands, len, 1);=0A= return "";=0A= }=0A= =0A= @@ -7627,8 +7838,8 @@ lshrhi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= if (CONST_INT_P (operands[2]))=0A= {=0A= int scratch =3D (GET_CODE (PATTERN (insn)) =3D=3D PARALLEL=0A= - && XVECLEN (PATTERN (insn), 0) =3D=3D 3=0A= - && REG_P (operands[3]));=0A= + && XVECLEN (PATTERN (insn), 0) =3D=3D 3=0A= + && REG_P (operands[3]));=0A= int ldi_ok =3D test_hard_reg_class (LD_REGS, operands[0]);=0A= int k;=0A= int *t =3D len;=0A= @@ -7725,8 +7936,9 @@ lshrhi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= "neg %B0");=0A= =0A= case 8:=0A= - return *len =3D 2, ("mov %A0,%B1" CR_TAB=0A= - "clr %B0");=0A= + *len =3D 2;=0A= + return ("mov %A0,%B1" CR_TAB=0A= + "clr %B0");=0A= =0A= case 9:=0A= *len =3D 3;=0A= @@ -7873,7 +8085,7 @@ lshrhi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= len =3D t;=0A= }=0A= out_shift_with_cnt ("lsr %B0" CR_TAB=0A= - "ror %A0", insn, operands, len, 2);=0A= + "ror %A0", insn, operands, len, 2);=0A= return "";=0A= }=0A= =0A= @@ -7889,45 +8101,121 @@ avr_out_lshrpsi3 (rtx_insn *insn, rtx *op, int = *plen)=0A= if (CONST_INT_P (op[2]))=0A= {=0A= if (plen)=0A= - *plen =3D 0;=0A= + *plen =3D 0;=0A= =0A= switch (INTVAL (op[2]))=0A= - {=0A= - case 8:=0A= - if (dest <=3D src)=0A= - return avr_asm_len ("mov %A0,%B1" CR_TAB=0A= - "mov %B0,%C1" CR_TAB=0A= - "clr %C0", op, plen, 3);=0A= - else=0A= - return avr_asm_len ("clr %C0" CR_TAB=0A= - "mov %B0,%C1" CR_TAB=0A= - "mov %A0,%B1", op, plen, 3);=0A= + {=0A= + case 8:=0A= + if (dest <=3D src)=0A= + return avr_asm_len ("mov %A0,%B1" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "clr %C0", op, plen, 3);=0A= + else=0A= + return avr_asm_len ("clr %C0" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "mov %A0,%B1", op, plen, 3);=0A= =0A= - case 16:=0A= - if (dest !=3D src + 2)=0A= - avr_asm_len ("mov %A0,%C1", op, plen, 1);=0A= + case 9:=0A= + if (dest <=3D src)=0A= + return avr_asm_len ("mov %A0,%B1" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "lsr %B0" CR_TAB=0A= + "ror %A0", op, plen, 5);=0A= + else=0A= + return avr_asm_len ("clr %C0" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "mov %A0,%B1" CR_TAB=0A= + "lsr %B0" CR_TAB=0A= + "ror %A0", op, plen, 5);=0A= =0A= - return avr_asm_len ("clr %B0" CR_TAB=0A= - "clr %C0", op, plen, 2);=0A= + case 16:=0A= + if (dest !=3D src + 2)=0A= + avr_asm_len ("mov %A0,%C1", op, plen, 1);=0A= + return avr_asm_len ("clr %B0" CR_TAB=0A= + "clr %C0", op, plen, 2);=0A= +=0A= + case 17:=0A= + if (dest !=3D src + 2)=0A= + avr_asm_len ("mov %A0,%C1", op, plen, 1);=0A= + return avr_asm_len ("clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "lsr %A0", op, plen, 3);=0A= +=0A= + case 18:=0A= + if (dest !=3D src + 2)=0A= + avr_asm_len ("mov %A0,%C1", op, plen, 1);=0A= + return avr_asm_len ("clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0", op, plen, 4);=0A= +=0A= + case 19:=0A= + if (dest !=3D src + 2)=0A= + avr_asm_len ("mov %A0,%C1", op, plen, 1);=0A= + return avr_asm_len ("clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0", op, plen, 5);=0A= +=0A= + case 20:=0A= + if (optimize_size)=0A= + break;=0A= + if (dest !=3D src + 2)=0A= + avr_asm_len ("mov %A0,%C1", op, plen, 1);=0A= + return avr_asm_len ("clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0", op, plen, 6);=0A= +=0A= + case 21:=0A= + if (optimize_size)=0A= + break;=0A= + if (dest !=3D src + 2)=0A= + avr_asm_len ("mov %A0,%C1", op, plen, 1);=0A= + return avr_asm_len ("clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0", op, plen, 7);=0A= +=0A= + case 22:=0A= + if (optimize_size)=0A= + break;=0A= + if (dest !=3D src + 2)=0A= + avr_asm_len ("mov %A0,%C1", op, plen, 1);=0A= + return avr_asm_len ("clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0", op, plen, 8);=0A= =0A= - default:=0A= - if (INTVAL (op[2]) < 24)=0A= - break;=0A= + default:=0A= + if (INTVAL (op[2]) < 24)=0A= + break;=0A= =0A= - /* fall through */=0A= + /* fall through */=0A= =0A= - case 23:=0A= - return avr_asm_len ("bst %C1,7" CR_TAB=0A= - "clr %A0" CR_TAB=0A= - "clr %B0" CR_TAB=0A= - "clr %C0" CR_TAB=0A= - "bld %A0,0", op, plen, 5);=0A= - } /* switch */=0A= + case 23:=0A= + return avr_asm_len ("bst %C1,7" CR_TAB=0A= + "clr %A0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "bld %A0,0", op, plen, 5);=0A= + } /* switch */=0A= }=0A= =0A= out_shift_with_cnt ("lsr %C0" CR_TAB=0A= - "ror %B0" CR_TAB=0A= - "ror %A0", insn, op, plen, 3);=0A= + "ror %B0" CR_TAB=0A= + "ror %A0", insn, op, plen, 3);=0A= return "";=0A= }=0A= =0A= @@ -7952,9 +8240,12 @@ lshrsi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= break;=0A= =0A= if (AVR_HAVE_MOVW)=0A= - return *len =3D 3, ("clr %D0" CR_TAB=0A= - "clr %C0" CR_TAB=0A= - "movw %A0,%C0");=0A= + {=0A= + *len =3D 3;=0A= + return ("clr %D0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "movw %A0,%C0");=0A= + }=0A= *len =3D 4;=0A= return ("clr %D0" CR_TAB=0A= "clr %C0" CR_TAB=0A= @@ -7962,54 +8253,203 @@ lshrsi3_out (rtx_insn *insn, rtx operands[], = int *len)=0A= "clr %A0");=0A= =0A= case 8:=0A= - {=0A= - int reg0 =3D true_regnum (operands[0]);=0A= - int reg1 =3D true_regnum (operands[1]);=0A= - *len =3D 4;=0A= - if (reg0 <=3D reg1)=0A= - return ("mov %A0,%B1" CR_TAB=0A= - "mov %B0,%C1" CR_TAB=0A= - "mov %C0,%D1" CR_TAB=0A= - "clr %D0");=0A= - else=0A= - return ("clr %D0" CR_TAB=0A= - "mov %C0,%D1" CR_TAB=0A= - "mov %B0,%C1" CR_TAB=0A= - "mov %A0,%B1");=0A= - }=0A= + *len =3D 4;=0A= + if (true_regnum (operands[0]) <=3D true_regnum (operands[1]))=0A= + return ("mov %A0,%B1" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "mov %C0,%D1" CR_TAB=0A= + "clr %D0");=0A= + else=0A= + return ("clr %D0" CR_TAB=0A= + "mov %C0,%D1" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "mov %A0,%B1");=0A= +=0A= + case 9:=0A= + *len =3D 7;=0A= + if (true_regnum (operands[0]) <=3D true_regnum (operands[1]))=0A= + return ("mov %A0,%B1" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "mov %C0,%D1" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %C0" CR_TAB=0A= + "ror %B0" CR_TAB=0A= + "ror %A0");=0A= + else=0A= + return ("clr %D0" CR_TAB=0A= + "mov %C0,%D1" CR_TAB=0A= + "mov %B0,%C1" CR_TAB=0A= + "mov %A0,%B1" CR_TAB=0A= + "lsr %C0" CR_TAB=0A= + "ror %B0" CR_TAB=0A= + "ror %A0");=0A= =0A= case 16:=0A= - {=0A= - int reg0 =3D true_regnum (operands[0]);=0A= - int reg1 =3D true_regnum (operands[1]);=0A= -=0A= - if (reg0 =3D=3D reg1 + 2)=0A= - return *len =3D 2, ("clr %C0" CR_TAB=0A= - "clr %D0");=0A= - if (AVR_HAVE_MOVW)=0A= - return *len =3D 3, ("movw %A0,%C1" CR_TAB=0A= - "clr %C0" CR_TAB=0A= - "clr %D0");=0A= - else=0A= - return *len =3D 4, ("mov %B0,%D1" CR_TAB=0A= - "mov %A0,%C1" CR_TAB=0A= - "clr %C0" CR_TAB=0A= - "clr %D0");=0A= - }=0A= + if (true_regnum (operands[0]) =3D=3D true_regnum (operands[1]) + 2)=0A= + {=0A= + *len =3D 2;=0A= + return ("clr %C0" CR_TAB=0A= + "clr %D0");=0A= + }=0A= + if (AVR_HAVE_MOVW)=0A= + {=0A= + *len =3D 3;=0A= + return ("movw %A0,%C1" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0");=0A= + }=0A= + *len =3D 4;=0A= + return ("mov %B0,%D1" CR_TAB=0A= + "mov %A0,%C1" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0");=0A= +=0A= + case 17:=0A= + if (true_regnum (operands[0]) =3D=3D true_regnum (operands[1]) + 2)=0A= + {=0A= + *len =3D 4;=0A= + return ("clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %B0" CR_TAB=0A= + "ror %A0");=0A= + }=0A= + if (AVR_HAVE_MOVW)=0A= + {=0A= + *len =3D 5;=0A= + return ("movw %A0,%C1" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %B0" CR_TAB=0A= + "ror %A0");=0A= + }=0A= + *len =3D 6;=0A= + return ("mov %B0,%D1" CR_TAB=0A= + "mov %A0,%C1" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %B0" CR_TAB=0A= + "ror %A0");=0A= +=0A= + case 18:=0A= + if (true_regnum (operands[0]) =3D=3D true_regnum (operands[1]) + 2)=0A= + {=0A= + *len =3D 6;=0A= + return ("clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %B0" CR_TAB=0A= + "ror %A0" CR_TAB=0A= + "lsr %B0" CR_TAB=0A= + "ror %A0");=0A= + }=0A= + if (AVR_HAVE_MOVW)=0A= + {=0A= + *len =3D 7;=0A= + return ("movw %A0,%C1" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %B0" CR_TAB=0A= + "ror %A0" CR_TAB=0A= + "lsr %B0" CR_TAB=0A= + "ror %A0");=0A= + }=0A= + if (optimize_size)=0A= + break;=0A= + *len =3D 8;=0A= + return ("mov %B0,%D1" CR_TAB=0A= + "mov %A0,%C1" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %B0" CR_TAB=0A= + "ror %A0" CR_TAB=0A= + "lsr %B0" CR_TAB=0A= + "ror %A0");=0A= =0A= case 24:=0A= - return *len =3D 4, ("mov %A0,%D1" CR_TAB=0A= - "clr %B0" CR_TAB=0A= - "clr %C0" CR_TAB=0A= - "clr %D0");=0A= + *len =3D 4;=0A= + return ("mov %A0,%D1" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0");=0A= +=0A= + case 25:=0A= + *len =3D 5;=0A= + return ("mov %A0,%D1" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %A0");=0A= +=0A= + case 26:=0A= + *len =3D 6;=0A= + return ("mov %A0,%D1" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0");=0A= +=0A= + case 27:=0A= + *len =3D 7;=0A= + return ("mov %A0,%D1" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0");=0A= +=0A= + case 28:=0A= + if (optimize_size)=0A= + break;=0A= + *len =3D 8;=0A= + return ("mov %A0,%D1" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0");=0A= +=0A= + case 29:=0A= + if (optimize_size)=0A= + break;=0A= + *len =3D 9;=0A= + return ("mov %A0,%D1" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0");=0A= +=0A= + case 30:=0A= + if (optimize_size)=0A= + break;=0A= + *len =3D 10;=0A= + return ("mov %A0,%D1" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "clr %C0" CR_TAB=0A= + "clr %D0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0" CR_TAB=0A= + "lsr %A0");=0A= =0A= case 31:=0A= if (AVR_HAVE_MOVW)=0A= - return *len =3D 5, ("bst %D1,7" CR_TAB=0A= - "clr %A0" CR_TAB=0A= - "clr %B0" CR_TAB=0A= - "movw %C0,%A0" CR_TAB=0A= - "bld %A0,0");=0A= + {=0A= + *len =3D 5;=0A= + return ("bst %D1,7" CR_TAB=0A= + "clr %A0" CR_TAB=0A= + "clr %B0" CR_TAB=0A= + "movw %C0,%A0" CR_TAB=0A= + "bld %A0,0");=0A= + }=0A= *len =3D 6;=0A= return ("bst %D1,7" CR_TAB=0A= "clr %A0" CR_TAB=0A= @@ -8021,9 +8461,9 @@ lshrsi3_out (rtx_insn *insn, rtx operands[], int = *len)=0A= len =3D t;=0A= }=0A= out_shift_with_cnt ("lsr %D0" CR_TAB=0A= - "ror %C0" CR_TAB=0A= - "ror %B0" CR_TAB=0A= - "ror %A0", insn, operands, len, 4);=0A= + "ror %C0" CR_TAB=0A= + "ror %B0" CR_TAB=0A= + "ror %A0", insn, operands, len, 4);=0A= return "";=0A= }=0A= =0A= diff --git a/gcc/testsuite/gcc.target/avr/ashlsi-1.c = b/gcc/testsuite/gcc.target/avr/ashlsi-1.c=0A= new file mode 100644=0A= index 000000000000..514e9887dfb2=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/avr/ashlsi-1.c=0A= @@ -0,0 +1,10 @@=0A= +/* { dg-do compile } */=0A= +/* { dg-options "-O2" } */=0A= +=0A= +unsigned long foo(unsigned long x)=0A= +{=0A= + return x << 1;=0A= +}=0A= +=0A= +/* { dg-final { scan-assembler "lsl r22" } } */=0A= +/* { dg-final { scan-assembler-times "rol r2\\d" 3 } } */=0A= diff --git a/gcc/testsuite/gcc.target/avr/ashlsi-2.c = b/gcc/testsuite/gcc.target/avr/ashlsi-2.c=0A= new file mode 100644=0A= index 000000000000..75c4b7d4bf22=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/avr/ashlsi-2.c=0A= @@ -0,0 +1,10 @@=0A= +/* { dg-do compile } */=0A= +/* { dg-options "-O2" } */=0A= +=0A= +unsigned long foo(unsigned long x)=0A= +{=0A= + return x << 26;=0A= +}=0A= +=0A= +/* { dg-final { scan-assembler-times "lsl r25" 2 } } */=0A= +/* { dg-final { scan-assembler-times "clr r2\\d" 3 } } */=0A= diff --git a/gcc/testsuite/gcc.target/avr/ashrsi-1.c = b/gcc/testsuite/gcc.target/avr/ashrsi-1.c=0A= new file mode 100644=0A= index 000000000000..2bc361ed9e74=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/avr/ashrsi-1.c=0A= @@ -0,0 +1,10 @@=0A= +/* { dg-do compile } */=0A= +/* { dg-options "-O2" } */=0A= +=0A= +long foo(long x)=0A= +{=0A= + return x >> 1;=0A= +}=0A= +=0A= +/* { dg-final { scan-assembler "asr r25" } } */=0A= +/* { dg-final { scan-assembler-times "ror r2\\d" 3 } } */=0A= diff --git a/gcc/testsuite/gcc.target/avr/ashrsi-2.c = b/gcc/testsuite/gcc.target/avr/ashrsi-2.c=0A= new file mode 100644=0A= index 000000000000..7a0e660c0aaf=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/avr/ashrsi-2.c=0A= @@ -0,0 +1,11 @@=0A= +/* { dg-do compile } */=0A= +/* { dg-options "-O2" } */=0A= +=0A= +long foo(long x)=0A= +{=0A= + return x >> 25;=0A= +}=0A= +=0A= +/* { dg-final { scan-assembler "sbrc r22,7" } } */=0A= +/* { dg-final { scan-assembler-times "mov r2\\d,r25" 3 } } */=0A= +/* { dg-final { scan-assembler-times "asr r22" 1 } } */=0A= diff --git a/gcc/testsuite/gcc.target/avr/lshrsi-1.c = b/gcc/testsuite/gcc.target/avr/lshrsi-1.c=0A= new file mode 100644=0A= index 000000000000..efe3c3311d1f=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/avr/lshrsi-1.c=0A= @@ -0,0 +1,10 @@=0A= +/* { dg-do compile } */=0A= +/* { dg-options "-O2" } */=0A= +=0A= +unsigned long foo(unsigned long x)=0A= +{=0A= + return x >> 1;=0A= +}=0A= +=0A= +/* { dg-final { scan-assembler "lsr r25" } } */=0A= +/* { dg-final { scan-assembler-times "ror r2\\d" 3 } } */=0A= diff --git a/gcc/testsuite/gcc.target/avr/lshrsi-2.c = b/gcc/testsuite/gcc.target/avr/lshrsi-2.c=0A= new file mode 100644=0A= index 000000000000..28a6412ae40a=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/avr/lshrsi-2.c=0A= @@ -0,0 +1,10 @@=0A= +/* { dg-do compile } */=0A= +/* { dg-options "-O2" } */=0A= +=0A= +unsigned long foo(unsigned long x)=0A= +{=0A= + return x >> 26;=0A= +}=0A= +=0A= +/* { dg-final { scan-assembler-times "clr r2\\d" 3 } } */=0A= +/* { dg-final { scan-assembler-times "lsr r22" 2 } } */=0A= ------=_NextPart_000_0266_01DA0D83.457B0D20--