diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 8b809c4..a4f512f 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -6755,6 +6755,29 @@ ? GEU : LTU, VOIDmode, cc, const0_rtx); }) +;; Help combine use borrow flag to test for -1 after dec (add $-1). +(define_insn_and_split "*dec_cmov" + [(set (match_operand:SWI248 0 "register_operand" "=r") + (if_then_else:SWI248 + (match_operator 1 "bt_comparison_operator" + [(match_operand:SWI248 2 "register_operand" "0") (const_int 0)]) + (plus:SWI248 (match_dup 2) (const_int -1)) + (match_operand:SWI248 3 "nonimmediate_operand" "rm"))) + (clobber (reg:CC FLAGS_REG))] + "TARGET_CMOVE" + "#" + "&& reload_completed" + [(parallel [(set (reg:CC FLAGS_REG) + (compare:CC (match_dup 2) (const_int 1))) + (set (match_dup 0) (minus:SWI248 (match_dup 2) (const_int 1)))]) + (set (match_dup 0) + (if_then_else:SWI248 (match_dup 4) (match_dup 0) (match_dup 3)))] +{ + rtx cc = gen_rtx_REG (CCCmode, FLAGS_REG); + operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[1]) == NE + ? GEU : LTU, VOIDmode, cc, const0_rtx); +}) + (define_insn "*subsi_3_zext" [(set (reg FLAGS_REG) (compare (match_operand:SI 1 "register_operand" "0") @@ -19068,6 +19091,70 @@ gcc_unreachable (); }) +;; Eliminate a reg-reg mov by inverting the condition of a cmov (#1). +;; mov r0,r1; dec r0; mov r2,r3; cmov r0,r2 -> dec r1; mov r0,r3; cmov r0, r1 +(define_peephole2 + [(set (match_operand:SWI248 0 "register_operand") + (match_operand:SWI248 1 "register_operand")) + (parallel [(set (reg FLAGS_REG) (match_operand 5)) + (set (match_dup 0) (match_operand:SWI248 6))]) + (set (match_operand:SWI248 2 "register_operand") + (match_operand:SWI248 3)) + (set (match_dup 0) + (if_then_else:SWI248 (match_operator 4 "ix86_comparison_operator" + [(reg FLAGS_REG) (const_int 0)]) + (match_dup 0) + (match_dup 2)))] + "TARGET_CMOVE + && REGNO (operands[2]) != REGNO (operands[0]) + && REGNO (operands[2]) != REGNO (operands[1]) + && peep2_reg_dead_p (1, operands[1]) + && peep2_reg_dead_p (4, operands[2]) + && !reg_overlap_mentioned_p (operands[0], operands[3])" + [(parallel [(set (match_dup 7) (match_dup 8)) + (set (match_dup 1) (match_dup 9))]) + (set (match_dup 0) (match_dup 3)) + (set (match_dup 0) (if_then_else:SWI248 (match_dup 4) + (match_dup 1) + (match_dup 0)))] +{ + operands[7] = SET_DEST (XVECEXP (PATTERN (peep2_next_insn (1)), 0, 0)); + operands[8] = replace_rtx (operands[5], operands[0], operands[1]); + operands[9] = replace_rtx (operands[6], operands[0], operands[1]); +}) + +;; Eliminate a reg-reg mov by inverting the condition of a cmov (#2). +;; mov r2,r3; mov r0,r1; dec r0; cmov r0,r2 -> dec r1; mov r0,r3; cmov r0, r1 +(define_peephole2 + [(set (match_operand:SWI248 2 "register_operand") + (match_operand:SWI248 3)) + (set (match_operand:SWI248 0 "register_operand") + (match_operand:SWI248 1 "register_operand")) + (parallel [(set (reg FLAGS_REG) (match_operand 5)) + (set (match_dup 0) (match_operand:SWI248 6))]) + (set (match_dup 0) + (if_then_else:SWI248 (match_operator 4 "ix86_comparison_operator" + [(reg FLAGS_REG) (const_int 0)]) + (match_dup 0) + (match_dup 2)))] + "TARGET_CMOVE + && REGNO (operands[2]) != REGNO (operands[0]) + && REGNO (operands[2]) != REGNO (operands[1]) + && peep2_reg_dead_p (2, operands[1]) + && peep2_reg_dead_p (4, operands[2]) + && !reg_overlap_mentioned_p (operands[0], operands[3])" + [(parallel [(set (match_dup 7) (match_dup 8)) + (set (match_dup 1) (match_dup 9))]) + (set (match_dup 0) (match_dup 3)) + (set (match_dup 0) (if_then_else:SWI248 (match_dup 4) + (match_dup 1) + (match_dup 0)))] +{ + operands[7] = SET_DEST (XVECEXP (PATTERN (peep2_next_insn (2)), 0, 0)); + operands[8] = replace_rtx (operands[5], operands[0], operands[1]); + operands[9] = replace_rtx (operands[6], operands[0], operands[1]); +}) + (define_expand "movcc" [(set (match_operand:X87MODEF 0 "register_operand") (if_then_else:X87MODEF