From: Andrew Stubbs <ams@codesourcery.com>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: [PATCH] openmp-simd-clone: Match shift type
Date: Fri, 29 Jul 2022 16:53:51 +0100 [thread overview]
Message-ID: <02ee1acd-1951-8cf9-345b-ca230ae432bb@codesourcery.com> (raw)
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This patch adjusts the generation of SIMD "inbranch" clones that use
integer masks to ensure that it vectorizes on amdgcn.
The problem was only that an amdgcn mask is DImode and the shift amount
was SImode, and the difference causes vectorization to fail.
OK for mainline?
Andrew
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openmp-simd-clone: Match shift types
Ensure that both parameters to vector shifts use the same mode. This is most
important for amdgcn where the masks are DImode.
gcc/ChangeLog:
* omp-simd-clone.cc (simd_clone_adjust): Convert shift_cnt to match
the mask type.
diff --git a/gcc/omp-simd-clone.cc b/gcc/omp-simd-clone.cc
index 32649bc3f9a..5d3a90730e7 100644
--- a/gcc/omp-simd-clone.cc
+++ b/gcc/omp-simd-clone.cc
@@ -1305,8 +1305,12 @@ simd_clone_adjust (struct cgraph_node *node)
build_int_cst (TREE_TYPE (iter1), c));
gsi_insert_after (&gsi, g, GSI_CONTINUE_LINKING);
}
+ tree shift_cnt_conv = make_ssa_name (TREE_TYPE (mask));
+ g = gimple_build_assign (shift_cnt_conv,
+ fold_convert (TREE_TYPE (mask), shift_cnt));
+ gsi_insert_after (&gsi, g, GSI_CONTINUE_LINKING);
g = gimple_build_assign (make_ssa_name (TREE_TYPE (mask)),
- RSHIFT_EXPR, mask, shift_cnt);
+ RSHIFT_EXPR, mask, shift_cnt_conv);
gsi_insert_after (&gsi, g, GSI_CONTINUE_LINKING);
mask = gimple_assign_lhs (g);
g = gimple_build_assign (make_ssa_name (TREE_TYPE (mask)),
next reply other threads:[~2022-07-29 15:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-29 15:53 Andrew Stubbs [this message]
2022-07-29 15:59 ` Jakub Jelinek
2022-07-29 17:03 ` Andrew Stubbs
2022-07-29 20:09 ` Jakub Jelinek
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