From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 9AE0038582A4 for ; Thu, 28 Jul 2022 22:18:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9AE0038582A4 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=rhl//RD+WvGbT4+Grr2nfvx2utq7Ryl9GBwlYTh9SLk=; b=rukAWG8fXqjzRljLskNJFRRNJl Vmz1iH9b95owFCH2guC8af7fqpTYkGGdCIhxqP3SIvcVwOiUuiqNhfMc7uBpy1k9KgvUwnyfgmEDo 7JctjDV7DkonWE/k6VaVXnWsq1Lcp2XoBO1AMvCpvBWcGCuqNOS4/fwktUCy8wLzDWva+ye9882d4 kedsWFw2BGSEb18LKVn+ML+Ww8Z9D2Cn4KhevLcguyBjDGVNvTFYzqTSWYueYPkxn/34lgS0QhrR3 AbGTTBvIacBH0DURN98dBQHhFzN2t8R39PUqXsPImoL5h/6qoVuIqFBnh/ZANOQ4k1KtHhPC/hEMZ SPcXGGWw==; Received: from host86-169-41-119.range86-169.btcentralplus.com ([86.169.41.119]:61682 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1oHBq1-00069H-RV; Thu, 28 Jul 2022 18:18:38 -0400 From: "Roger Sayle" To: Subject: [x86 PATCH] Support logical shifts by (some) integer constants in TImode STV. Date: Thu, 28 Jul 2022 23:18:36 +0100 Message-ID: <032901d8a2cf$fc07cfd0$f4176f70$@nextmovesoftware.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_032A_01D8A2D8.5DCC37D0" X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdiizyfTDo7NmXGBSnqaoLwU/+UPrw== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 28 Jul 2022 22:18:40 -0000 This is a multipart message in MIME format. ------=_NextPart_000_032A_01D8A2D8.5DCC37D0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit This patch improves TImode STV by adding support for logical shifts by integer constants that are multiples of 8. For the test case: __int128 a, b; void foo() { a = b << 16; } on x86_64, gcc -O2 currently generates: movq b(%rip), %rax movq b+8(%rip), %rdx shldq $16, %rax, %rdx salq $16, %rax movq %rax, a(%rip) movq %rdx, a+8(%rip) ret with this patch we now generate: movdqa b(%rip), %xmm0 pslldq $2, %xmm0 movaps %xmm0, a(%rip) ret This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check. both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-07-28 Roger Sayle gcc/ChangeLog * config/i386/i386-features.cc (compute_convert_gain): Add gain for converting suitable TImode shift to a V1TImode shift. (timode_scalar_chain::convert_insn): Add support for converting suitable ASHIFT and LSHIFTRT. (timode_scalar_to_vector_candidate_p): Consider logical shifts by integer constants that are multiples of 8 to be candidates. gcc/testsuite/ChangeLog * gcc.target/i386/sse4_1-stv-7.c: New test case. Thanks again, Roger -- ------=_NextPart_000_032A_01D8A2D8.5DCC37D0 Content-Type: text/plain; name="patchvs.txt" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="patchvs.txt" diff --git a/gcc/config/i386/i386-features.cc = b/gcc/config/i386/i386-features.cc=0A= index aa5de71..e1e0645 100644=0A= --- a/gcc/config/i386/i386-features.cc=0A= +++ b/gcc/config/i386/i386-features.cc=0A= @@ -1221,6 +1221,13 @@ timode_scalar_chain::compute_convert_gain ()=0A= igain =3D COSTS_N_INSNS (1);=0A= break;=0A= =0A= + case ASHIFT:=0A= + case LSHIFTRT:=0A= + /* For logical shifts by constant multiples of 8. */=0A= + igain =3D optimize_insn_for_size_p () ? COSTS_N_BYTES (4)=0A= + : COSTS_N_INSNS (1);=0A= + break;=0A= +=0A= default:=0A= break;=0A= }=0A= @@ -1462,6 +1469,12 @@ timode_scalar_chain::convert_insn (rtx_insn *insn)=0A= src =3D convert_compare (XEXP (src, 0), XEXP (src, 1), insn);=0A= break;=0A= =0A= + case ASHIFT:=0A= + case LSHIFTRT:=0A= + convert_op (&XEXP (src, 0), insn);=0A= + PUT_MODE (src, V1TImode);=0A= + break;=0A= +=0A= default:=0A= gcc_unreachable ();=0A= }=0A= @@ -1796,6 +1809,14 @@ timode_scalar_to_vector_candidate_p (rtx_insn = *insn)=0A= case NOT:=0A= return REG_P (XEXP (src, 0)) || timode_mem_p (XEXP (src, 0));=0A= =0A= + case ASHIFT:=0A= + case LSHIFTRT:=0A= + /* Handle logical shifts by integer constants between 0 and 120=0A= + that are multiples of 8. */=0A= + return REG_P (XEXP (src, 0))=0A= + && CONST_INT_P (XEXP (src, 1))=0A= + && (INTVAL (XEXP (src, 1)) & ~0x78) =3D=3D 0;=0A= +=0A= default:=0A= return false;=0A= }=0A= diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-stv-7.c = b/gcc/testsuite/gcc.target/i386/sse4_1-stv-7.c=0A= new file mode 100644=0A= index 0000000..b0d5fce=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/i386/sse4_1-stv-7.c=0A= @@ -0,0 +1,18 @@=0A= +/* { dg-do compile { target int128 } } */=0A= +/* { dg-options "-O2 -msse4.1 -mstv -mno-stackrealign" } */=0A= +=0A= +unsigned __int128 a;=0A= +unsigned __int128 b;=0A= +=0A= +void foo()=0A= +{=0A= + a =3D b << 16;=0A= +}=0A= +=0A= +void bar()=0A= +{=0A= + a =3D b >> 16;=0A= +}=0A= +=0A= +/* { dg-final { scan-assembler "pslldq" } } */=0A= +/* { dg-final { scan-assembler "psrldq" } } */=0A= ------=_NextPart_000_032A_01D8A2D8.5DCC37D0--