From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id B2DFB3858D39 for ; Sat, 16 Jul 2022 19:10:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B2DFB3858D39 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=D64AlzMnMM1z9PdfbcMi+RJtiNyiVB+W/B7ChUmmzdM=; b=QWgCyj4CKl3DRIllmRslgFXQK1 NjcPkVbtXxDclclg4IoJhRje1xh/Y6yHFTLNzpDB+Q+Dlt408DFdv79yOD11Jl0JbI5yvvV4t15KR gndi7fy9S/zzY9CO0ynmntTjrgRAggllRG/IFjVvIYdag6NqqFCG0Y3cS6o1kzLlH+iYYl9ymmBO3 F6tQ5hwzpo4KkDr9RQAWe2DGb6ZIrwEX5paa0sVVucUHBLXi72JY8q56CcDyqWtHlaKrWeej5pVKj zs01X90QFo3zPiD5PuF209QGeGejCgAMGTXDswn99Et2jmVH4GOYuCRqkFT47W5hEi6VvhGQEjkNf 2HaGFcTQ==; Received: from host109-154-33-170.range109-154.btcentralplus.com ([109.154.33.170]:52133 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1oCnBi-0008RE-UF; Sat, 16 Jul 2022 15:10:51 -0400 From: "Roger Sayle" To: "'GCC Patches'" Subject: [x86_64 PATCH] PR target/106231: Optimize (any_extend:DI (ctz:SI ...)). Date: Sat, 16 Jul 2022 20:10:50 +0100 Message-ID: <036601d89947$c425d0d0$4c717270$@nextmovesoftware.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0367_01D89950.25ECA9D0" X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdiZRpb901VjiJR6QJ6Dx5nsvyuyYA== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 16 Jul 2022 19:10:53 -0000 This is a multipart message in MIME format. ------=_NextPart_000_0367_01D89950.25ECA9D0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit This patch resolves PR target/106231 by providing insns that recognize (zero_extend:DI (ctz:SI ...)) and (sign_extend:DI (ctz:SI ...)). The result of ctz:SI is always between 0 and 32 (or undefined), so sign_extension is the same as zero_extension, and the result is already extended in the destination register. Things are a little complicated, because the existing implementation of *ctzsi2 handles multiple cases, including false dependencies, which we continue to support in this patch. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check with no new failures. Ok for mainline? 2022-07-16 Roger Sayle gcc/ChangeLog PR target/106231 * config/i386/i386.md (*ctzsidi2_ext): New insn_and_split to recognize any_extend:DI of ctz:SI which is implicitly extended. (*ctzsidi2_ext_falsedep): New define_insn to model a DImode extended ctz:SI that has preceding xor to break false dependency. gcc/testsuite/ChangeLog PR target/106231 * gcc.target/i386/pr106231-1.c: New test case. * gcc.target/i386/pr106231-2.c: New test case. Thanks in advance, Roger -- ------=_NextPart_000_0367_01D89950.25ECA9D0 Content-Type: text/plain; name="patchet.txt" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="patchet.txt" diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md=0A= index 3b02d0c..164b0c2 100644=0A= --- a/gcc/config/i386/i386.md=0A= +++ b/gcc/config/i386/i386.md=0A= @@ -16431,6 +16431,66 @@=0A= (set_attr "prefix_rep" "1")=0A= (set_attr "mode" "SI")])=0A= =0A= +(define_insn_and_split "*ctzsidi2_ext"=0A= + [(set (match_operand:DI 0 "register_operand" "=3Dr")=0A= + (any_extend:DI=0A= + (ctz:SI=0A= + (match_operand:SI 1 "nonimmediate_operand" "rm"))))=0A= + (clobber (reg:CC FLAGS_REG))]=0A= + "TARGET_64BIT"=0A= +{=0A= + if (TARGET_BMI)=0A= + return "tzcnt{l}\t{%1, %k0|%k0, %1}";=0A= + else if (TARGET_CPU_P (GENERIC)=0A= + && !optimize_function_for_size_p (cfun))=0A= + /* tzcnt expands to 'rep bsf' and we can use it even if = !TARGET_BMI. */=0A= + return "rep%; bsf{l}\t{%1, %k0|%k0, %1}";=0A= + return "bsf{l}\t{%1, %k0|%k0, %1}";=0A= +}=0A= + "(TARGET_BMI || TARGET_CPU_P (GENERIC))=0A= + && TARGET_AVOID_FALSE_DEP_FOR_BMI && epilogue_completed=0A= + && optimize_function_for_speed_p (cfun)=0A= + && !reg_mentioned_p (operands[0], operands[1])"=0A= + [(parallel=0A= + [(set (match_dup 0)=0A= + (any_extend:DI (ctz:SI (match_dup 1))))=0A= + (unspec [(match_dup 0)] UNSPEC_INSN_FALSE_DEP)=0A= + (clobber (reg:CC FLAGS_REG))])]=0A= + "ix86_expand_clear (operands[0]);"=0A= + [(set_attr "type" "alu1")=0A= + (set_attr "prefix_0f" "1")=0A= + (set (attr "prefix_rep")=0A= + (if_then_else=0A= + (ior (match_test "TARGET_BMI")=0A= + (and (not (match_test "optimize_function_for_size_p (cfun)"))=0A= + (match_test "TARGET_CPU_P (GENERIC)")))=0A= + (const_string "1")=0A= + (const_string "0")))=0A= + (set_attr "mode" "SI")])=0A= +=0A= +(define_insn "*ctzsidi2_ext_falsedep"=0A= + [(set (match_operand:DI 0 "register_operand" "=3Dr")=0A= + (any_extend:DI=0A= + (ctz:SI=0A= + (match_operand:SI 1 "nonimmediate_operand" "rm"))))=0A= + (unspec [(match_operand:DI 2 "register_operand" "0")]=0A= + UNSPEC_INSN_FALSE_DEP)=0A= + (clobber (reg:CC FLAGS_REG))]=0A= + "TARGET_64BIT"=0A= +{=0A= + if (TARGET_BMI)=0A= + return "tzcnt{l}\t{%1, %k0|%k0, %1}";=0A= + else if (TARGET_CPU_P (GENERIC))=0A= + /* tzcnt expands to 'rep bsf' and we can use it even if = !TARGET_BMI. */=0A= + return "rep%; bsf{l}\t{%1, %k0|%k0, %1}";=0A= + else=0A= + gcc_unreachable ();=0A= +}=0A= + [(set_attr "type" "alu1")=0A= + (set_attr "prefix_0f" "1")=0A= + (set_attr "prefix_rep" "1")=0A= + (set_attr "mode" "SI")])=0A= +=0A= (define_insn "bsr_rex64"=0A= [(set (reg:CCZ FLAGS_REG)=0A= (compare:CCZ (match_operand:DI 1 "nonimmediate_operand" "rm")=0A= diff --git a/gcc/testsuite/gcc.target/i386/pr106231-1.c = b/gcc/testsuite/gcc.target/i386/pr106231-1.c=0A= new file mode 100644=0A= index 0000000..d17297f=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/i386/pr106231-1.c=0A= @@ -0,0 +1,8 @@=0A= +/* { dg-do compile { target { ! ia32 } } } */=0A= +/* { dg-options "-O2 -mtune=3Dgeneric" } */=0A= +long long=0A= +foo(long long x, unsigned bits)=0A= +{=0A= + return x + (unsigned) __builtin_ctz(bits);=0A= +}=0A= +/* { dg-final { scan-assembler-not "cltq" } } */=0A= diff --git a/gcc/testsuite/gcc.target/i386/pr106231-2.c = b/gcc/testsuite/gcc.target/i386/pr106231-2.c=0A= new file mode 100644=0A= index 0000000..fd3a8e3=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/i386/pr106231-2.c=0A= @@ -0,0 +1,8 @@=0A= +/* { dg-do compile { target { ! ia32 } } } */=0A= +/* { dg-options "-O2 -mtune=3Divybridge" } */=0A= +long long=0A= +foo(long long x, unsigned bits)=0A= +{=0A= + return x + (unsigned) __builtin_ctz(bits);=0A= +}=0A= +/* { dg-final { scan-assembler-not "cltq" } } */=0A= ------=_NextPart_000_0367_01D89950.25ECA9D0--