This patch addresses the last remaining issue with PR target/31985, that
GCC could make better use of memory addressing modes when implementing
double word addition.  This is achieved by adding a define_insn_and_split
that combines an *add<dwi>3_doubleword with a *concat<mode><dwi>3, so
that the components of the concat can be used directly, without first
being loaded into a double word register.

For test_c in the bugzilla PR:

Before:
        pushl   %ebx
        subl    $16, %esp
        movl    28(%esp), %eax
        movl    36(%esp), %ecx
        movl    32(%esp), %ebx
        movl    24(%esp), %edx
        addl    %ecx, %eax
        adcl    %ebx, %edx
        movl    %eax, 8(%esp)
        movl    %edx, 12(%esp)
        addl    $16, %esp
        popl    %ebx
        ret

After:
test_c:
        subl    $20, %esp
        movl    36(%esp), %eax
        movl    32(%esp), %edx
        addl    28(%esp), %eax
        adcl    24(%esp), %edx
        movl    %eax, 8(%esp)
        movl    %edx, 12(%esp)
        addl    $20, %esp
        ret


If this approach is considered acceptable, similar splitters can be
used for other doubleword operations.

This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
and make -k check, both with and without --target_board=unix{-m32}
with no new failures.  Ok for mainline?

2023-06-07  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
        PR target/31985
        * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
        define_insn_and_split combine *add<dwi>3_doubleword with a
        *concat<mode><dwi>3 for more efficient lowering after reload.

gcc/testsuite/ChangeLog
        PR target/31985
        * gcc.target/i386/pr31985.c: New test case.


Roger
--