[PATCH 00/29] rs6000: Auto-generate builtins from descriptions [V2]

[PATCH 00/29] rs6000: Auto-generate builtins from descriptions [V2]

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

This is a slight reworking of the patches posted on June 17.  I have
made a couple of improvements, but the general arrangement of the patches
is the same as before.  Two major things to call out:

 - I've introduced a uniform set of parsing error codes to make it easier
   to follow some of the logic when certain conditions occur during parsing.

 - I reorganized the treatment of built-in stanzas.  Before, the stanza
   conditions were checked prior to initializing entries in the built-in
   table.  Now, all built-ins are initialized, but we check the conditions
   at expand time to determine whether they should be enabled.  This
   addresses a frequent problem we have with the existing methods, where
   "#pragma target" doesn't work as expected when changing the target
   CPU for a single function.

As described before, the current built-in support in the rs6000 back end
requires at least a master's degree in spelunking to comprehend.  It's
full of cruft, redundancy, and unused bits of code, and long overdue for a
replacement.  This is the first part of my project to do that.

My intent is to make adding new built-in functions as simple as adding a
few lines to a couple of files, and automatically generating as much of
the initialization, overload resolution, and expansion logic as possible.
This patch series establishes the format of the input files and creates
a new program (rs600-gen-builtins) to:

 * Parse the input files into an internal representation;
 * Generate a file of #defines (rs6000-vecdefines.h) for eventual
   inclusion into altivec.h; and
 * Generate an initialization file to create and initialize tables of
   built-in functions and overloads.

Patches 1, 3-7, and 9-19 contain the logic for rs6000-gen-builtins.
Patch 8 provides balanced tree search support for parsing scalability.
Patches 2 and 21-27 provide a first cut at the input files.
Patch 20 incorporates the new code into the GCC build.
Patch 28 adds comments to some existing files that will help during the
transition from the previous built-in mechanism.
Patch 29 turns on the initialization logic, while leaving GCC's behavior
unchanged otherwise.

The patch series is constructed so that any prefix set of the patches
can be upstreamed without breaking anything.  There's still plenty of
work left, but I think it will be helpful to get this big chunk of
patches upstream to make further progress easier (translation: avoid
complex rebases like the one I just went through :-).

Following is some additional information about the present and future
design that may be of help.

The set of patches submitted upstream so far does the relatively
straightforward work of reading builtin descriptions from flat files and
generating initialization code for builtin and overload tables.  It also
generates an include file meant to be included in altivec.h, which produces
the #defines that map vec_* to __builtin_* functions for external consumption.

Data structures are automatically initialized in rs6000_builtins.c:
rs6000_autoinit_builtins.  Initialized data structures are:

 - rs6000_gen_builtins:  An enumeration of builtin identifiers, such as
RS6000_BIF_CPU_SUPPORTS.  These names are deliberately different from the
existing builtin identifiers so they can co-exist for a while.

 - rs6000_gen_overloads:  An enumeration of overload identifiers, such as
RS6000_OVLD_MAX.  Again, deliberately different from the old names.  Right
now I have the two enumerations using nonoverlapping numbers.  This is
because the two tables were part of one table in the old design, and I
haven't yet proven for sure that I can separate them without problems.
I think that I can, in which case I will have both enumerations start from
zero.

 - A number of filescope variables representing TREE_TYPEs of functions.
These are named <return-type>_ftype_<param1-type>_ ... _<paramN-type> and
initialized as tree lists from the prototypes in the input files.  The
naming scheme for types is described in the code. 

 - rs6000_builtin_info_x:  An array indexed by rs6000_gen_builtins containing
all the fun stuff for each builtin.  The "_x" is because we already have
rs6000_builtin_info as the old table, and they need to coexist for a while.

 - rs6000_overload_info:  An array indexed by rs6000_gen_overloads containing
all the fun stuff for each overload.

 - bif_hash:  A hash table mapping builtin function names to pointers to
their rs6000_builtin_info_x entries.

 - ovld_hash:  A hash table mapping overload names to pointers to their
rs6000_overload_info entries. 

The new initialization code is called from rs6000_init_builtins. Currently
this function continues to do its existing initialization work, but also
initializes the new tables (and then ignores them). 

The old initialization code contains a lot of ad hoc hackery to handle
different kinds of functions that require extra behavior. The new design
removes as much of that as possible, and instead uses syntax in the flat
file to generate flags and other information that allows initialization
to be done uniformly for all functions.  It also means that all
initialization is done as a single pass over the builtins, as opposed to
the current methods that require multiple passes over all the builtins
to find the particular special code required for a single one.

Now, it's important to keep both the old and the new initialization code
functional at once.  There is a static variable new_builtins_are_live
that's used to select which tables will be used during compilation.  Its
value can be set via a macro when building the compiler, or adjusted at
runtime under debugger control.  The important thing is to ensure that
all differences in supported builtins between the old methods and the new
ones are expected.  We do want some differences, because we are removing
a lot of long-deprecated functions.  It will be important to test for
differences on BE, LE, 64-bit, 32-bit, AIX, and Darwin, as I'm also
trying to remove dependences on the "long" integer types wherever possible.
We'll see how successful that is.

A future patch will update the debug code to print out type signature
information for each initialized builtin, to make it easier to compare the
old and new functions for type equivalence.

So that explains stage 1 of the code, mostly done in the patches I've posted,
except as noted above.

There are three remaining stages to be completed:

 - Gimple folding
 - Overload resolution
 - Builtin expansion

The order above is the order that they take place during compilation.

Gimple folding changes will be simple.  The only change here is that the
builtin names are different, so we'll need to check the different names
depending on whether new_builtins_are_live is set or unset.

Overload resolution changes should be mostly simple also.  The new
rs6000_overload_info table will be used instead of the handwritten table in
rs6000-call.c.  The new table does not have any limits on the number of
operands, so all the hackery around unary, binary, ternary, quaternary, etc.
will go away.  The code for resolving an AltiVec builtin will be required to
use the new table, and there is still some special case code in there that
will need to be updated for the new naming scheme.  But all in all I don't
expect a lot of work here, except for adding all the new overload entries
into the input file (not yet started).

I have been working on the builtin expansion part next, which is the most
complicated.  rs6000_expand_builtin and its support functions are where all
the worst offenses in the code exist. Most of the changes here involve
removing as much of the special casing as possible, and replacing it with
table-driven logic.  In particular, this allows us to get rid of a lot of
hand-written code checking for constant arguments that have a restricted set
of allowable values.  I can't get rid of all the special cases, but I can
make them driven by flags in the builtin table instead of the ad hoc checking
for specific builtins that occurs today.  A lot of this has been written but
not yet tested.

My current plans are:

 - Get the first set of patches committed
 - Add debug code to make it easier to test which builtins (with type
   signatures) are created using the old and new methods
 - Test this on all the platforms that matter until I have everything matching
 - Complete writing the builtin expansion code
 - Write the Gimple folding and overload resolution pieces
 - Test and revise until the testsuite passes
 - Enable the new version of the code as the default
 - Let it burn in for a while and deal with bug reports
 - Remove the now-dead code supporting the old methods (around end of stage 3)

That's it!  Easy peasy. :-)

Thanks in advance for reviewing this code, and I welcome comments on the
overall design.  I'd really like to get these patches upstream soon, as
it's becoming clumsy to maintain them out of tree.

Thanks!

 -- Bill

Bill Schmidt (29):
  rs6000: Initial create of rs6000-gen-builtins.c
  rs6000: Add initial input files
  rs6000: Add file support and functions for diagnostic support
  rs6000: Add helper functions for parsing
  rs6000: Add functions for matching types, part 1 of 3
  rs6000: Add functions for matching types, part 2 of 3
  rs6000: Add functions for matching types, part 3 of 3
  rs6000: Red-black tree implementation for balanced tree search
  rs6000: Main function with stubs for parsing and output
  rs6000: Parsing built-in input file, part 1 of 3
  rs6000: Parsing built-in input file, part 2 of 3
  rs6000: Parsing built-in input file, part 3 of 3
  rs6000: Parsing of overload input file
  rs6000: Build and store function type identifiers
  rs6000: Write output to the vector definition include file
  rs6000: Write output to the builtins header file
  rs6000: Write output to the builtins init file, part 1 of 3
  rs6000: Write output to the builtins init file, part 2 of 3
  rs6000: Write output to the builtins init file, part 3 of 3
  rs6000: Incorporate new builtins code into the build machinery
  rs6000: Add remaining AltiVec builtins
  rs6000: Add VSX builtins
  rs6000: Add available-everywhere and ancient builtins
  rs6000: Add Power7 builtins
  rs6000: Add Power8 vector builtins
  rs6000: Add Power9 builtins
  rs6000: Add remaining builtins
  rs6000: Add comments to help with transition
  rs6000: Call rs6000_autoinit_builtins from rs6000_builtins

 gcc/config.gcc                           |    3 +-
 gcc/config/rs6000/rbtree.c               |  233 ++
 gcc/config/rs6000/rbtree.h               |   51 +
 gcc/config/rs6000/rs6000-builtin-new.def | 2967 ++++++++++++++++++++++
 gcc/config/rs6000/rs6000-builtin.def     |   15 +
 gcc/config/rs6000/rs6000-call.c          |  170 ++
 gcc/config/rs6000/rs6000-gen-builtins.c  | 2660 +++++++++++++++++++
 gcc/config/rs6000/rs6000-overload.def    |   57 +
 gcc/config/rs6000/t-rs6000               |   25 +-
 9 files changed, 6179 insertions(+), 2 deletions(-)
 create mode 100644 gcc/config/rs6000/rbtree.c
 create mode 100644 gcc/config/rs6000/rbtree.h
 create mode 100644 gcc/config/rs6000/rs6000-builtin-new.def
 create mode 100644 gcc/config/rs6000/rs6000-gen-builtins.c
 create mode 100644 gcc/config/rs6000/rs6000-overload.def

-- 
2.17.1

[PATCH 01/29] rs6000: Initial create of rs6000-gen-builtins.c

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

Add header commentary explaining the purpose of rs6000-gen-builtins.c,
along with an initial set of includes.

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c: New.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 141 ++++++++++++++++++++++++
 1 file changed, 141 insertions(+)
 create mode 100644 gcc/config/rs6000/rs6000-gen-builtins.c

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
new file mode 100644
index 00000000000..462387f4b44
--- /dev/null
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -0,0 +1,141 @@
+/* Generate built-in function initialization and recognition for Power.
+   Copyright (C) 2020 Free Software Foundation, Inc.
+   Contributed by Bill Schmidt, IBM <wschmidt@linux.ibm.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* This program generates built-in function initialization and
+   recognition code for Power targets, based on text files that
+   describe the built-in functions and vector overloads:
+
+     rs6000-builtin-new.def     Table of built-in functions
+     rs6000-overload.def        Table of overload functions
+
+   Both files group similar functions together in "stanzas," as
+   described below.
+
+   Each stanza in the built-in function file starts with a line
+   identifying the circumstances in which the group of functions is
+   permitted, with the gating predicate in square brackets.  For
+   example, this could be
+
+     [altivec]
+
+   or it could be
+
+     [power9]
+
+   The bracketed gating predicate is the only information allowed on
+   the stanza header line, other than whitespace.
+
+   Following the stanza header are two lines for each function: the
+   prototype line and the attributes line.  The prototype line has
+   this format, where the square brackets indicate optional
+   information and angle brackets indicate required information:
+
+     [kind] <return-type> <bif-name> (<argument-list>);
+
+   Here [kind] can be one of "const", "pure", or "fpmath";
+   <return-type> is a legal type for a built-in function result;
+   <bif-name> is the name by which the function can be called;
+   and <argument-list> is a comma-separated list of legal types
+   for built-in function arguments.  The argument list may be
+   empty, but the parentheses and semicolon are required.
+
+   The attributes line looks like this:
+
+     <bif-id> <bif-pattern> {<attribute-list>}
+
+   Here <bif-id> is a unique internal identifier for the built-in
+   function that will be used as part of an enumeration of all
+   built-in functions; <bif-pattern> is the define_expand or
+   define_insn that will be invoked when the call is expanded;
+   and <attribute-list> is a comma-separated list of special
+   conditions that apply to the built-in function.  The attribute
+   list may be empty, but the braces are required.
+
+   Attributes are strings, such as these:
+
+     init     Process as a vec_init function
+     set      Process as a vec_set function
+     extract  Process as a vec_extract function
+     nosoft   Not valid with -msoft-float
+     ldvec    Needs special handling for vec_ld semantics
+     stvec    Needs special handling for vec_st semantics
+     reve     Needs special handling for element reversal
+     pred     Needs special handling for comparison predicates
+     htm      Needs special handling for transactional memory
+     htmspr   HTM function using an SPR
+     htmcr    HTM function using a CR
+     mma      Needs special handling for MMA instructions
+     no32bit  Not valid for TARGET_32BIT
+     cpu      This is a "cpu_is" or "cpu_supports" builtin
+     ldstmask Altivec mask for load or store
+
+   An example stanza might look like this:
+
+[altivec]
+  const vsc __builtin_altivec_abs_v16qi (vsc);
+    ABS_V16QI absv16qi2 {}
+  const vss __builtin_altivec_abs_v8hi (vss);
+    ABS_V8HI absv8hi2 {}
+
+   Here "vsc" and "vss" are shorthand for "vector signed char" and
+   "vector signed short" to shorten line lengths and improve readability.
+   Note the use of indentation, which is recommended but not required.
+
+   The overload file has more complex stanza headers.  Here the stanza
+   represents all functions with the same overloaded function name:
+
+     [<overload-id>, <abi-name>, <builtin-name>]
+
+   Here the square brackets are part of the syntax, <overload-id> is a
+   unique internal identifier for the overload that will be used as part
+   of an enumeration of all overloaded functions; <abi-name> is the name
+   that will appear as a #define in altivec.h; and <builtin-name> is the
+   name that is overloaded in the back end.
+
+   Each function entry again has two lines.  The first line is again a
+   prototype line (this time without [kind]):
+
+     <return-type> <internal-name> (<argument-list>);
+
+   The second line contains only one token: the <bif-id> that this
+   particular instance of the overloaded function maps to.  It must
+   match a token that appears in the bif file.
+
+   An example stanza might look like this:
+
+[VEC_ABS, vec_abs, __builtin_vec_abs]
+  vsc __builtin_vec_abs (vsc);
+    ABS_V16QI
+  vss __builtin_vec_abs (vss);
+    ABS_V8HI
+
+  Blank lines may be used as desired in these files between the lines as
+  defined above; that is, you can introduce as many extra newlines as you
+  like after a required newline, but nowhere else.  Lines beginning with
+  a semicolon are also treated as blank lines.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+#include <stdint.h>
+#include <ctype.h>
+#include <string.h>
+#include <assert.h>
+#include <unistd.h>
-- 
2.17.1

[PATCH 02/29] rs6000: Add initial input files

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

This patch adds a tiny subset of the built-in and overload descriptions.

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-builtin-new.def: New.
	* config/rs6000/rs6000-overload.def: New.
---
 gcc/config/rs6000/rs6000-builtin-new.def | 179 +++++++++++++++++++++++
 gcc/config/rs6000/rs6000-overload.def    |  57 ++++++++
 2 files changed, 236 insertions(+)
 create mode 100644 gcc/config/rs6000/rs6000-builtin-new.def
 create mode 100644 gcc/config/rs6000/rs6000-overload.def

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
new file mode 100644
index 00000000000..5fc7e1301c3
--- /dev/null
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -0,0 +1,179 @@
+; Built-in functions for PowerPC.
+; Copyright (C) 2020 Free Software Foundation, Inc.
+; Contributed by Bill Schmidt, IBM <wschmidt@linux.ibm.com>
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3.  If not see
+; <http://www.gnu.org/licenses/>.  */
+
+
+; Built-in functions in this file are organized into "stanzas", where
+; all built-ins in a given stanza are enabled together.  Each stanza
+; starts with a line identifying the circumstances in which the group of
+; functions is permitted, with the gating predicate in square brackets.
+; This is the only information allowed on the stanza header line, other
+; than whitespace.
+;
+; Following the stanza header are two lines for each function: the
+; prototype line and the attributes line.  The prototype line has
+; this format, where the square brackets indicate optional
+; information and angle brackets indicate required information:
+;
+;   [kind] <return-type> <bif-name> (<argument-list>);
+;
+; Here [kind] can be one of "const", "pure", or "fpmath";
+; <return-type> is a legal type for a built-in function result;
+; <bif-name> is the name by which the function can be called;
+; and <argument-list> is a comma-separated list of legal types
+; for built-in function arguments.  The argument list may be
+; empty, but the parentheses and semicolon are required.
+;
+; A legal type is of the form:
+;
+;   [const] [[signed|unsigned] <basetype> | <vectype>] [*]
+;
+; where "const" applies only to a <basetype> of "int".  Legal values
+; of <basetype> are (for now):
+;
+;   char
+;   short
+;   int
+;   long long
+;   float
+;   double
+;   __int128
+;   _Float128
+;   _Decimal32
+;   _Decimal64
+;   _Decimal128
+;   __ibm128
+;
+; Legal values of <vectype> are as follows, and are shorthand for
+; the associated meaning:
+;
+;   vsc		vector signed char
+;   vuc		vector unsigned char
+;   vbc		vector bool char
+;   vss		vector signed short
+;   vus		vector unsigned short
+;   vbs		vector bool short
+;   vsi		vector signed int
+;   vui		vector unsigned int
+;   vbi		vector bool int
+;   vsll	vector signed long long
+;   vull	vector unsigned long long
+;   vbll	vector bool long long
+;   vsq		vector signed __int128
+;   vuq		vector unsigned __int128
+;   vbq		vector bool __int128
+;   vp		vector pixel
+;   vf		vector float
+;   vd		vector double
+;   vop		opaque vector (matches all vectors)
+;
+; For simplicity, We don't support "short int" and "long long int".
+; We don't currently support a <basetype> of "bool", "long double",
+; or "_Float16".  "signed" and "unsigned" only apply to integral base
+; types.  The optional * indicates a pointer type, which can be used
+; only with "void" and "const char" in this file.  (More specific
+; pointer types are allowed in overload prototypes.)
+;
+; The attributes line looks like this:
+;
+;   <bif-id> <bif-pattern> {<attribute-list>}
+;
+; Here <bif-id> is a unique internal identifier for the built-in
+; function that will be used as part of an enumeration of all
+; built-in functions; <bif-pattern> is the define_expand or
+; define_insn that will be invoked when the call is expanded;
+; and <attribute-list> is a comma-separated list of special
+; conditions that apply to the built-in function.  The attribute
+; list may be empty, but the braces are required.
+;
+; Attributes are strings, and the allowed ones are listed below.
+;
+;   init     Process as a vec_init function
+;   set      Process as a vec_set function
+;   extract  Process as a vec_extract function
+;   nosoft   Not valid with -msoft-float
+;   ldvec    Needs special handling for vec_ld semantics
+;   stvec    Needs special handling for vec_st semantics
+;   reve     Needs special handling for element reversal
+;   pred     Needs special handling for comparison predicates
+;   htm      Needs special handling for transactional memory
+;   htmspr   HTM function using an SPR
+;   htmcr    HTM function using a CR
+;   mma      Needs special handling for MMA
+;   no32bit  Not valid for TARGET_32BIT
+;   cpu      This is a "cpu_is" or "cpu_supports" builtin
+;   ldstmask Altivec mask for load or store
+;
+; Each attribute corresponds to extra processing required when
+; the built-in is expanded.  All such special processing should
+; be controlled by an attribute from now on.
+;
+; It is important to note that each entry's <bif-name> must be
+; unique.  The code generated from this file will call def_builtin
+; for each entry, and this can only happen once per name.  This
+; means that in some cases we currently retain some tricks from
+; the old builtin support to aid with overloading.  This 
+; unfortunately seems to be necessary for backward compatibility.
+;
+; The two tricks at our disposal are the void pointer and the "vop"
+; vector type.  We use void pointers anywhere that pointer types
+; are accepted (primarily for vector load/store built-ins).  In
+; practice this means that we accept pointers to anything, not
+; just to the types that we intend.  We use the "vop" vector type
+; anytime that a built-in must accept vector types that have
+; different modes.  This is an opaque type that will match any
+; vector type, which may mean matching vector types that we don't
+; intend.
+;
+; We can improve on "vop" when a vector argument or return type is
+; limited to one mode.  For example, "vsll" and "vull" both map to
+; V2DImode.  In this case, we can arbitrarily pick one of the
+; acceptable types to use in the prototype.  The signature used by
+; def_builtin is based on modes, not types, so this works well.
+; Only use "vop" when there is no alternative.  When there is a
+; choice, best practice is to use the signed type ("vsll" in the
+; example above) unless the choices are unsigned and bool, in
+; which case the unsigned type should be used.
+;
+; Eventually we want to automatically generate built-in documentation
+; from the entries in this file.  Documenting of built-ins with more
+; than one acceptable prototype can be done by cross-referencing
+; against rs6000-overload.def and picking up the allowable prototypes
+; from there.
+;
+; Blank lines may be used as desired in this file between the lines as
+; defined above; that is, you can introduce as many extra newlines as you
+; like after a required newline, but nowhere else.  Lines beginning with
+; a semicolon are also treated as blank lines.
+
+
+; AltiVec builtins.
+[altivec]
+  const vsc __builtin_altivec_abs_v16qi (vsc);
+    ABS_V16QI absv16qi2 {}
+
+  const vf __builtin_altivec_abs_v4sf (vf);
+    ABS_V4SF absv4sf2 {}
+
+  const vsi __builtin_altivec_abs_v4si (vsi);
+    ABS_V4SI absv4si2 {}
+
+  const vss __builtin_altivec_abs_v8hi (vss);
+    ABS_V8HI absv8hi2 {}
+
diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
new file mode 100644
index 00000000000..644e8ad8ffa
--- /dev/null
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -0,0 +1,57 @@
+; Overloaded built-in functions for PowerPC.
+; Copyright (C) 2020 Free Software Foundation, Inc.
+; Contributed by Bill Schmidt, IBM <wschmidt@linux.ibm.com>
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3.  If not see
+; <http://www.gnu.org/licenses/>.  */
+
+
+; Overloaded built-in functions in this file are organized into "stanzas",
+; where all built-ins in a given stanza have the same overloaded function
+; name:
+;
+;   [<overload-id>, <abi-name>, <builtin-name>]
+;
+; Here the square brackets are part of the syntax, <overload-id> is a
+; unique internal identifier for the overload that will be used as part
+; of an enumeration of all overloaded functions; <abi-name> is the name
+; that will appear as a #define in altivec.h; and <builtin-name> is the
+; name that is overloaded in the back end.
+;
+; Each function entry has two lines.  The first line is a prototype line.
+; See rs6000-builtin-new.def for a description of the prototype line.
+; A prototype line in the file differs in that it doesn't have an
+; optional [kind] token:
+;
+;   <return-type> <internal-name> (<argument-list>);
+;
+; The second line contains only one token: the <bif-id> that this
+; particular instance of the overloaded function maps to.  It must
+; match a token that appears in rs6000-builtin-new.def.
+;
+; Blank lines may be used as desired in this file between the lines as
+; defined above; that is, you can introduce as many extra newlines as you
+; like after a required newline, but nowhere else.  Lines beginning with
+; a semicolon are also treated as blank lines.
+
+
+
+[VEC_ABS, vec_abs, __builtin_vec_abs]
+  vsc __builtin_vec_abs (vsc);
+    ABS_V16QI
+
+  vss __builtin_vec_abs (vss);
+    ABS_V8HI
-- 
2.17.1

[PATCH 03/29] rs6000: Add file support and functions for diagnostic support

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (bif_file): New filescope
	variable.
	(ovld_file): Likewise.
	(header_file): Likewise.
	(init_file): Likewise.
	(defines_file): Likewise.
	(pgm_path): Likewise.
	(bif_path): Likewise.
	(ovld_path): Likewise.
	(header_path): Likewise.
	(init_path): Likewise.
	(defines_path): Likewise.
	(LINELEN): New defined constant.
	(linebuf): New filescope variable.
	(line): Likewise.
	(pos): Likewise.
	(diag): Likewise.
	(bif_diag): New function.
	(ovld_diag): New function.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 48 +++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 462387f4b44..8c8fad66edf 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -139,3 +139,51 @@ along with GCC; see the file COPYING3.  If not see
 #include <string.h>
 #include <assert.h>
 #include <unistd.h>
+
+/* Input and output file descriptors and pathnames.  */
+static FILE *bif_file;
+static FILE *ovld_file;
+static FILE *header_file;
+static FILE *init_file;
+static FILE *defines_file;
+
+static const char *pgm_path;
+static const char *bif_path;
+static const char *ovld_path;
+static const char *header_path;
+static const char *init_path;
+static const char *defines_path;
+
+/* Position information.  Note that "pos" is zero-indexed, but users
+   expect one-indexed column information, so representations of "pos"
+   as columns in diagnostic messages must be adjusted.  */
+#define LINELEN 1024
+static char linebuf[LINELEN];
+static int line;
+static int pos;
+
+/* Pointer to a diagnostic function.  */
+void (*diag) (const char *, ...) __attribute__ ((format (printf, 1, 2)))
+  = NULL;
+
+/* Custom diagnostics.  */
+static void __attribute__ ((format (printf, 1, 2)))
+bif_diag (const char * fmt, ...)
+{
+  va_list args;
+  fprintf (stderr, "%s:%d: ", bif_path, line);
+  va_start (args, fmt);
+  vfprintf (stderr, fmt, args);
+  va_end (args);
+}
+
+static void __attribute__ ((format (printf, 1, 2)))
+ovld_diag (const char * fmt, ...)
+{
+  va_list args;
+  fprintf (stderr, "%s:%d: ", ovld_path, line);
+  va_start (args, fmt);
+  vfprintf (stderr, fmt, args);
+  va_end (args);
+}
+
-- 
2.17.1

[PATCH 04/29] rs6000: Add helper functions for parsing

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (MININT): New defined
	constant.
	(exit_codes): New enum.
	(consume_whitespace): New function.
	(advance_line): Likewise.
	(safe_inc_pos): Likewise.
	(match_identifier): Likewise.
	(match_integer): Likewise.
	(match_to_right_bracket): Likewise.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 121 ++++++++++++++++++++++++
 1 file changed, 121 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 8c8fad66edf..e2a9b28eb16 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -140,6 +140,10 @@ along with GCC; see the file COPYING3.  If not see
 #include <assert.h>
 #include <unistd.h>
 
+/* Used as a sentinel for range constraints on integer fields.  No field can
+   be 32 bits wide, so this is a safe sentinel value.  */
+#define MININT INT32_MIN
+
 /* Input and output file descriptors and pathnames.  */
 static FILE *bif_file;
 static FILE *ovld_file;
@@ -162,6 +166,11 @@ static char linebuf[LINELEN];
 static int line;
 static int pos;
 
+/* Exit codes for the shell.  */
+enum exit_codes {
+  EC_INTERR
+};
+
 /* Pointer to a diagnostic function.  */
 void (*diag) (const char *, ...) __attribute__ ((format (printf, 1, 2)))
   = NULL;
@@ -187,3 +196,115 @@ ovld_diag (const char * fmt, ...)
   va_end (args);
 }
 
+/* Pass over unprintable characters and whitespace (other than a newline,
+   which terminates the scan).  */
+static void
+consume_whitespace ()
+{
+  while (pos < LINELEN && isspace(linebuf[pos]) && linebuf[pos] != '\n')
+    pos++;
+  return;
+}
+
+/* Get the next nonblank, noncomment line, returning 0 on EOF, 1 otherwise.  */
+static int
+advance_line (FILE *file)
+{
+  while (1)
+    {
+      /* Read ahead one line and check for EOF.  */
+      if (!fgets (linebuf, sizeof(linebuf), file))
+	return 0;
+      line++;
+      pos = 0;
+      consume_whitespace ();
+      if (linebuf[pos] != '\n' && linebuf[pos] != ';')
+	return 1;
+    }
+}
+
+static inline void
+safe_inc_pos ()
+{
+  if (pos++ >= LINELEN)
+    {
+      (*diag) ("line length overrun.\n");
+      exit (EC_INTERR);
+    }
+}
+
+/* Match an identifier, returning NULL on failure, else a pointer to a
+   buffer containing the identifier.  */
+static char *
+match_identifier ()
+{
+  int lastpos = pos - 1;
+  while (isalnum (linebuf[lastpos + 1]) || linebuf[lastpos + 1] == '_')
+    if (++lastpos >= LINELEN - 1)
+      {
+	(*diag) ("line length overrun.\n");
+	exit (EC_INTERR);
+      }
+
+  if (lastpos < pos)
+    return 0;
+
+  char *buf = (char *) malloc (lastpos - pos + 2);
+  memcpy (buf, &linebuf[pos], lastpos - pos + 1);
+  buf[lastpos - pos + 1] = '\0';
+
+  pos = lastpos + 1;
+  return buf;
+}
+
+/* Match an integer and return its value, or MININT on failure.  */
+static int
+match_integer ()
+{
+  int startpos = pos;
+  if (linebuf[pos] == '-')
+    safe_inc_pos ();
+
+  int lastpos = pos - 1;
+  while (isdigit (linebuf[lastpos + 1]))
+    if (++lastpos >= LINELEN - 1)
+      {
+	(*diag) ("line length overrun in match_integer.\n");
+	exit (EC_INTERR);
+      }
+
+  if (lastpos < pos)
+    return MININT;
+
+  pos = lastpos + 1;
+  char *buf = (char *) malloc (lastpos - startpos + 2);
+  memcpy (buf, &linebuf[startpos], lastpos - startpos + 1);
+  buf[lastpos - startpos + 1] = '\0';
+
+  int x;
+  sscanf (buf, "%d", &x);
+  return x;
+}
+
+static const char *
+match_to_right_bracket ()
+{
+  int lastpos = pos - 1;
+  while (linebuf[lastpos + 1] != ']')
+    if (++lastpos >= LINELEN - 1)
+      {
+	(*diag) ("line length overrun.\n");
+	exit (EC_INTERR);
+      }
+
+  if (lastpos < pos)
+    return 0;
+
+  char *buf = (char *) malloc (lastpos - pos + 2);
+  memcpy (buf, &linebuf[pos], lastpos - pos + 1);
+  buf[lastpos - pos + 1] = '\0';
+
+  pos = lastpos + 1;
+  return buf;
+}
+
-- 
2.17.1

[PATCH 05/29] rs6000: Add functions for matching types, part 1 of 3

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (void_status): New enum.
	(basetype): Likewise.
	(typeinfo): New struct.
	(handle_pointer): New function.
	(match_basetype): New stub function.
	(match_const_restriction): Likewise.
	(match_type): New function.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 382 ++++++++++++++++++++++++
 1 file changed, 382 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index e2a9b28eb16..ea1ebedfa52 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -166,6 +166,44 @@ static char linebuf[LINELEN];
 static int line;
 static int pos;
 
+/* Used to determine whether a type can be void (only return types).  */
+enum void_status {
+  VOID_NOTOK,
+  VOID_OK
+};
+
+/* Legal base types for an argument or return type.  */
+enum basetype {
+  BT_CHAR,
+  BT_SHORT,
+  BT_INT,
+  BT_LONGLONG,
+  BT_FLOAT,
+  BT_DOUBLE,
+  BT_INT128,
+  BT_FLOAT128,
+  BT_DECIMAL32,
+  BT_DECIMAL64,
+  BT_DECIMAL128,
+  BT_IBM128
+};
+
+/* Type modifiers for an argument or return type.  */
+struct typeinfo {
+  char isvoid;
+  char isconst;
+  char isvector;
+  char issigned;
+  char isunsigned;
+  char isbool;
+  char ispixel;
+  char ispointer;
+  char isopaque;
+  basetype base;
+  int val1;
+  int val2;
+};
+
 /* Exit codes for the shell.  */
 enum exit_codes {
   EC_INTERR
@@ -308,3 +346,347 @@ match_to_right_bracket ()
   return buf;
 }
 
+static inline void
+handle_pointer (typeinfo *typedata)
+{
+  consume_whitespace ();
+  if (linebuf[pos] == '*')
+    {
+      typedata->ispointer = 1;
+      safe_inc_pos ();
+    }
+}
+
+/* Match one of the allowable base types.  Consumes one token unless the
+   token is "long", which must be paired with a second "long".  Optionally
+   consumes a following '*' token for pointers.  Return 1 for success,
+   0 for failure.  */
+static int
+match_basetype (typeinfo *typedata)
+{
+  return 1;
+}
+
+/* A const int argument may be restricted to certain values.  This is
+   indicated by one of the following occurring after the "int' token:
+
+     <x>   restricts the constant to x bits, interpreted as unsigned
+     <x,y> restricts the constant to the inclusive range [x,y]
+     [x,y] restricts the constant to the inclusive range [x,y],
+	   but only applies if the argument is constant.
+     {x,y} restricts the constant to one of two values, x or y.
+
+   Here x and y are integer tokens.  Note that the "const" token is a
+   lie when the restriction is [x,y], but this simplifies the parsing
+   significantly and is hopefully forgivable.
+
+   Return 1 for success, else 0.  */
+static int
+match_const_restriction (typeinfo *typedata)
+{
+  return 1;
+}
+
+/* Look for a type, which can be terminated by a token that is not part of
+   a type, a comma, or a closing parenthesis.  Place information about the
+   type in TYPEDATA.  Return 1 for success, 0 for failure.  */
+static int
+match_type (typeinfo *typedata, int voidok)
+{
+  /* A legal type is of the form:
+
+       [const] [[signed|unsigned] <basetype> | <vectype>] [*]
+
+     where "const" applies only to a <basetype> of "int".  Legal values
+     of <basetype> are (for now):
+
+       char
+       short
+       int
+       long long
+       float
+       double
+       __int128
+       _Float128
+       _Decimal32
+       _Decimal64
+       _Decimal128
+       __ibm128
+
+     Legal values of <vectype> are as follows, and are shorthand for
+     the associated meaning:
+
+       vsc	vector signed char
+       vuc	vector unsigned char
+       vbc	vector bool char
+       vss	vector signed short
+       vus	vector unsigned short
+       vbs	vector bool short
+       vsi	vector signed int
+       vui	vector unsigned int
+       vbi	vector bool int
+       vsll	vector signed long long
+       vull	vector unsigned long long
+       vbll	vector bool long long
+       vsq	vector signed __int128
+       vuq	vector unsigned __int128
+       vbq	vector bool __int128
+       vp	vector pixel
+       vf	vector float
+       vd	vector double
+       vop	opaque vector (matches all vectors)
+
+     For simplicity, We don't support "short int" and "long long int".
+     We don't support a <basetype> of "bool", "long double", or "_Float16",
+     but will add these if builtins require it.  "signed" and "unsigned"
+     only apply to integral base types.  The optional * indicates a pointer
+     type, which can be used with any base type, but is treated for type
+     signature purposes as a pointer to void.  */
+
+  consume_whitespace ();
+  memset (typedata, 0, sizeof(*typedata));
+  int oldpos = pos;
+
+  char *token = match_identifier ();
+  if (!token)
+    return 0;
+
+  if (!strcmp (token, "void"))
+    typedata->isvoid = 1;
+
+  if (!strcmp (token, "const"))
+    {
+      typedata->isconst = 1;
+      consume_whitespace ();
+      oldpos = pos;
+      token = match_identifier ();
+    }
+
+  if (!strcmp (token, "vsc"))
+    {
+      typedata->isvector = 1;
+      typedata->issigned = 1;
+      typedata->base = BT_CHAR;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vuc"))
+    {
+      typedata->isvector = 1;
+      typedata->isunsigned = 1;
+      typedata->base = BT_CHAR;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vbc"))
+    {
+      typedata->isvector = 1;
+      typedata->isbool = 1;
+      typedata->base = BT_CHAR;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vss"))
+    {
+      typedata->isvector = 1;
+      typedata->issigned = 1;
+      typedata->base = BT_SHORT;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vus"))
+    {
+      typedata->isvector = 1;
+      typedata->isunsigned = 1;
+      typedata->base = BT_SHORT;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vbs"))
+    {
+      typedata->isvector = 1;
+      typedata->isbool = 1;
+      typedata->base = BT_SHORT;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vsi"))
+    {
+      typedata->isvector = 1;
+      typedata->issigned = 1;
+      typedata->base = BT_INT;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vui"))
+    {
+      typedata->isvector = 1;
+      typedata->isunsigned = 1;
+      typedata->base = BT_INT;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vbi"))
+    {
+      typedata->isvector = 1;
+      typedata->isbool = 1;
+      typedata->base = BT_INT;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vsll"))
+    {
+      typedata->isvector = 1;
+      typedata->issigned = 1;
+      typedata->base = BT_LONGLONG;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vull"))
+    {
+      typedata->isvector = 1;
+      typedata->isunsigned = 1;
+      typedata->base = BT_LONGLONG;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vbll"))
+    {
+      typedata->isvector = 1;
+      typedata->isbool = 1;
+      typedata->base = BT_LONGLONG;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vsq"))
+    {
+      typedata->isvector = 1;
+      typedata->issigned = 1;
+      typedata->base = BT_INT128;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vuq"))
+    {
+      typedata->isvector = 1;
+      typedata->isunsigned = 1;
+      typedata->base = BT_INT128;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vbq"))
+    {
+      typedata->isvector = 1;
+      typedata->isbool = 1;
+      typedata->base = BT_INT128;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vp"))
+    {
+      typedata->isvector = 1;
+      typedata->ispixel = 1;
+      typedata->base = BT_SHORT;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vf"))
+    {
+      typedata->isvector = 1;
+      typedata->base = BT_FLOAT;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vd"))
+    {
+      typedata->isvector = 1;
+      typedata->base = BT_DOUBLE;
+      handle_pointer (typedata);
+      return 1;
+    }
+  else if (!strcmp (token, "vop"))
+    {
+      typedata->isopaque = 1;
+      return 1;
+    }
+  else if (!strcmp (token, "signed"))
+    typedata->issigned = 1;
+  else if (!strcmp (token, "unsigned"))
+    typedata->isunsigned = 1;
+  else if (!typedata->isvoid && !typedata->isconst)
+    {
+      /* Push back token.  */
+      pos = oldpos;
+      return match_basetype (typedata);
+    }
+
+  if (typedata->isvoid)
+    {
+      consume_whitespace ();
+      if (linebuf[pos] == '*')
+	{
+	  typedata->ispointer = 1;
+	  safe_inc_pos ();
+	}
+      else if (!voidok)
+	return 0;
+      return 1;
+    }
+
+  if (typedata->isconst)
+    {
+      consume_whitespace ();
+      pos = oldpos;
+      token = match_identifier ();
+      if (!strcmp (token, "char"))
+	{
+	  typedata->base = BT_CHAR;
+	  handle_pointer (typedata);
+	  return 1;
+	}
+      else if (!strcmp (token, "signed"))
+	{
+	  typedata->issigned = 1;
+	  consume_whitespace ();
+	  oldpos = pos;
+	  token = match_identifier ();
+	  if (strcmp (token, "int"))
+	    {
+	      (*diag) ("'signed' not followed by 'int' at column %d.\n",
+		       oldpos + 1);
+	      return 0;
+	    }
+	}
+      else if (!strcmp (token, "unsigned"))
+	{
+	  typedata->isunsigned = 1;
+	  consume_whitespace ();
+	  oldpos = pos;
+	  token = match_identifier ();
+	  if (strcmp (token, "int"))
+	    {
+	      (*diag) ("'unsigned' not followed by 'int' at column %d.\n",
+		       oldpos + 1);
+	      return 0;
+	    }
+	}
+      else if (strcmp (token, "int"))
+	{
+	  (*diag) ("'const' not followed by 'int' at column %d.\n",
+		   oldpos + 1);
+	  return 0;
+	}
+
+      typedata->base = BT_INT;
+
+      consume_whitespace ();
+      if (linebuf[pos] == '<' || linebuf[pos] == '{' || linebuf[pos] == '[')
+	return match_const_restriction (typedata);
+
+      return 1;
+    }
+
+  consume_whitespace ();
+  return match_basetype (typedata);
+}
+
-- 
2.17.1

[PATCH 06/29] rs6000: Add functions for matching types, part 2 of 3

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (match_basetype):
	Implement.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 49 +++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index ea1ebedfa52..efc0b2dec65 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -364,6 +364,55 @@ handle_pointer (typeinfo *typedata)
 static int
 match_basetype (typeinfo *typedata)
 {
+  consume_whitespace ();
+  int oldpos = pos;
+  char *token = match_identifier ();
+  if (!token)
+    {
+      (*diag) ("missing base type in return type at column %d\n", pos + 1);
+      return 0;
+    }
+
+  if (!strcmp (token, "char"))
+    typedata->base = BT_CHAR;
+  else if (!strcmp (token, "short"))
+    typedata->base = BT_SHORT;
+  else if (!strcmp (token, "int"))
+    typedata->base = BT_INT;
+  else if (!strcmp (token, "long"))
+    {
+      consume_whitespace ();
+      char *mustbelong = match_identifier ();
+      if (!mustbelong || strcmp (mustbelong, "long"))
+	{
+	  (*diag) ("incomplete 'long long' at column %d\n", oldpos + 1);
+	  return 0;
+	}
+      typedata->base = BT_LONGLONG;
+    }
+  else if (!strcmp (token, "float"))
+    typedata->base = BT_FLOAT;
+  else if (!strcmp (token, "double"))
+    typedata->base = BT_DOUBLE;
+  else if (!strcmp (token, "__int128"))
+    typedata->base = BT_INT128;
+  else if (!strcmp (token, "_Float128"))
+    typedata->base = BT_FLOAT128;
+  else if (!strcmp (token, "_Decimal32"))
+    typedata->base = BT_DECIMAL32;
+  else if (!strcmp (token, "_Decimal64"))
+    typedata->base = BT_DECIMAL64;
+  else if (!strcmp (token, "_Decimal128"))
+    typedata->base = BT_DECIMAL128;
+  else if (!strcmp (token, "__ibm128"))
+    typedata->base = BT_IBM128;
+  else
+    {
+      (*diag) ("unrecognized base type at column %d\n", oldpos + 1);
+      return 0;
+    }
+
+  handle_pointer (typedata);
   return 1;
 }
 
-- 
2.17.1

[PATCH 07/29] rs6000: Add functions for matching types, part 3 of 3

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (restriction): New enum.
	(typeinfo): Add restriction field.
	(match_const_restriction): Implement.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 136 ++++++++++++++++++++++++
 1 file changed, 136 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index efc0b2dec65..18c67ce2202 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -188,6 +188,21 @@ enum basetype {
   BT_IBM128
 };
 
+/* Ways in which a const int value can be restricted.  RES_BITS indicates
+   that the integer is restricted to val1 bits, interpreted as an unsigned
+   number.  RES_RANGE indicates that the integer is restricted to values
+   between val1 and val2, inclusive.  RES_VAR_RANGE is like RES_RANGE, but
+   the argument may be variable, so it can only be checked if it is constant.
+   RES_VALUES indicates that the integer must have one of the values val1
+   or val2.  */
+enum restriction {
+  RES_NONE,
+  RES_BITS,
+  RES_RANGE,
+  RES_VAR_RANGE,
+  RES_VALUES
+};
+
 /* Type modifiers for an argument or return type.  */
 struct typeinfo {
   char isvoid;
@@ -200,6 +215,7 @@ struct typeinfo {
   char ispointer;
   char isopaque;
   basetype base;
+  restriction restr;
   int val1;
   int val2;
 };
@@ -433,6 +449,126 @@ match_basetype (typeinfo *typedata)
 static int
 match_const_restriction (typeinfo *typedata)
 {
+  int oldpos = pos;
+  if (linebuf[pos] == '<')
+    {
+      safe_inc_pos ();
+      oldpos = pos;
+      int x = match_integer ();
+      if (x == MININT)
+	{
+	  (*diag) ("malformed integer at column %d.\n", oldpos + 1);
+	  return 0;
+	}
+      consume_whitespace ();
+      if (linebuf[pos] == '>')
+	{
+	  typedata->restr = RES_BITS;
+	  typedata->val1 = x;
+	  safe_inc_pos ();
+	  return 1;
+	}
+      else if (linebuf[pos] != ',')
+	{
+	  (*diag) ("malformed restriction at column %d.\n", pos + 1);
+	  return 0;
+	}
+      safe_inc_pos ();
+      oldpos = pos;
+      int y = match_integer ();
+      if (y == MININT)
+	{
+	  (*diag) ("malformed integer at column %d.\n", oldpos + 1);
+	  return 0;
+	}
+      typedata->restr = RES_RANGE;
+      typedata->val1 = x;
+      typedata->val2 = y;
+
+      consume_whitespace ();
+      if (linebuf[pos] != '>')
+	{
+	  (*diag) ("malformed restriction at column %d.\n", pos + 1);
+	  return 0;
+	}
+      safe_inc_pos ();
+    }
+  else if (linebuf[pos] == '{')
+    {
+      safe_inc_pos ();
+      oldpos = pos;
+      int x = match_integer ();
+      if (x == MININT)
+	{
+	  (*diag) ("malformed integer at column %d.\n", oldpos + 1);
+	  return 0;
+	}
+      consume_whitespace ();
+      if (linebuf[pos] != ',')
+	{
+	  (*diag) ("missing comma at column %d.\n", pos + 1);
+	  return 0;
+	}
+      safe_inc_pos ();
+      consume_whitespace ();
+      oldpos = pos;
+      int y = match_integer ();
+      if (y == MININT)
+	{
+	  (*diag) ("malformed integer at column %d.\n", oldpos + 1);
+	  return 0;
+	}
+      typedata->restr = RES_VALUES;
+      typedata->val1 = x;
+      typedata->val2 = y;
+
+      consume_whitespace ();
+      if (linebuf[pos] != '}')
+	{
+	  (*diag) ("malformed restriction at column %d.\n", pos + 1);
+	  return 0;
+	}
+      safe_inc_pos ();
+    }
+  else
+    {
+      assert (linebuf[pos] == '[');
+      safe_inc_pos ();
+      oldpos = pos;
+      int x = match_integer ();
+      if (x == MININT)
+	{
+	  (*diag) ("malformed integer at column %d.\n", oldpos + 1);
+	  return 0;
+	}
+      consume_whitespace ();
+      if (linebuf[pos] != ',')
+	{
+	  (*diag) ("missing comma at column %d.\n", pos + 1);
+	  return 0;
+	}
+      safe_inc_pos ();
+      consume_whitespace ();
+      oldpos = pos;
+      int y = match_integer ();
+      if (y == MININT)
+	{
+	  (*diag) ("malformed integer at column %d.\n", oldpos + 1);
+	  return 0;
+	}
+      typedata->restr = RES_VAR_RANGE;
+      typedata->val1 = x;
+      typedata->val2 = y;
+
+      consume_whitespace ();
+      if (linebuf[pos] != ']')
+	{
+	  (*diag) ("malformed restriction at column %d.\n", pos + 1);
+	  return 0;
+	}
+      safe_inc_pos ();
+    }
+
   return 1;
 }
 
-- 
2.17.1

[PATCH 08/29] rs6000: Red-black tree implementation for balanced tree search

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rbtree.c: New file.
	* config/rs6000/rbtree.h: New file.
---
 gcc/config/rs6000/rbtree.c | 233 +++++++++++++++++++++++++++++++++++++
 gcc/config/rs6000/rbtree.h |  51 ++++++++
 2 files changed, 284 insertions(+)
 create mode 100644 gcc/config/rs6000/rbtree.c
 create mode 100644 gcc/config/rs6000/rbtree.h

diff --git a/gcc/config/rs6000/rbtree.c b/gcc/config/rs6000/rbtree.c
new file mode 100644
index 00000000000..50e5f57a50c
--- /dev/null
+++ b/gcc/config/rs6000/rbtree.c
@@ -0,0 +1,233 @@
+/* Partial red-black tree implementation for rs6000-gen-builtins.c.
+   Copyright (C) 2020 Free Software Foundation, Inc.
+   Contributed by Bill Schmidt, IBM <wschmidt@linux.ibm.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+#include "rbtree.h"
+
+/* Create a new node to be inserted into the red-black tree.  An inserted
+   node starts out red.  */
+static struct rbt_string_node *
+rbt_create_node (struct rbt_strings *t, char *str)
+{
+  struct rbt_string_node *nodeptr
+    = (struct rbt_string_node *) malloc (sizeof (struct rbt_string_node));
+  nodeptr->str = str;
+  nodeptr->left = t->rbt_nil;
+  nodeptr->right = t->rbt_nil;
+  nodeptr->par = NULL;
+  nodeptr->color = RBT_RED;
+  return nodeptr;
+}
+
+/* Perform a left-rotate operation on NODE in the red-black tree.  */
+static void
+rbt_left_rotate (struct rbt_strings *t, struct rbt_string_node *node)
+{
+  struct rbt_string_node *right = node->right;
+  assert (right);
+
+  /* Turn RIGHT's left subtree into NODE's right subtree.  */
+  node->right = right->left;
+  if (right->left != t->rbt_nil)
+    right->left->par = node;
+
+  /* Link NODE's parent to RIGHT.  */
+  right->par = node->par;
+
+  if (node->par == t->rbt_nil)
+    t->rbt_root = right;
+  else if (node == node->par->left)
+    node->par->left = right;
+  else
+    node->par->right = right;
+
+  /* Put NODE on RIGHT's left.  */
+  right->left = node;
+  node->par = right;
+}
+
+/* Perform a right-rotate operation on NODE in the red-black tree.  */
+static void
+rbt_right_rotate (struct rbt_strings *t, struct rbt_string_node *node)
+{
+  struct rbt_string_node *left = node->left;
+  assert (left);
+
+  /* Turn LEFT's right subtree into NODE's left subtree.  */
+  node->left = left->right;
+  if (left->right != t->rbt_nil)
+    left->right->par = node;
+
+  /* Link NODE's parent to LEFT.  */
+  left->par = node->par;
+
+  if (node->par == t->rbt_nil)
+    t->rbt_root = left;
+  else if (node == node->par->right)
+    node->par->right = left;
+  else
+    node->par->left = left;
+
+  /* Put NODE on LEFT's right.  */
+  left->right = node;
+  node->par = left;
+}
+
+/* Insert STR into the tree, returning 1 for success and 0 if STR already
+   appears in the tree.  */
+int
+rbt_insert (struct rbt_strings *t, char *str)
+{
+  struct rbt_string_node *curr = t->rbt_root;
+  struct rbt_string_node *trail = t->rbt_nil;
+
+  while (curr != t->rbt_nil)
+    {
+      trail = curr;
+      int cmp = strcmp (str, curr->str);
+      if (cmp < 0)
+	curr = curr->left;
+      else if (cmp > 0)
+	curr = curr->right;
+      else
+	return 0;
+    }
+
+  struct rbt_string_node *fresh = rbt_create_node (t, str);
+  fresh->par = trail;
+
+  if (trail == t->rbt_nil)
+    t->rbt_root = fresh;
+  else if (strcmp (fresh->str, trail->str) < 0)
+    trail->left = fresh;
+  else
+    trail->right = fresh;
+
+  fresh->left = t->rbt_nil;
+  fresh->right = t->rbt_nil;
+
+  /* FRESH has now been inserted as a red leaf.  If we have invalidated
+     one of the following preconditions, we must fix things up:
+      (a) If a node is red, both of its children are black.
+      (b) The root must be black.
+     Note that only (a) or (b) applies at any given time during the
+     process.  This algorithm works up the tree from NEW looking
+     for a red child with a red parent, and cleaning that up.  If the
+     root ends up red, it gets turned black at the end.  */
+  curr = fresh;
+  while (curr->par->color == RBT_RED)
+    if (curr->par == curr->par->par->left)
+      {
+	struct rbt_string_node *uncle = curr->par->par->right;
+	if (uncle->color == RBT_RED)
+	  {
+	    curr->par->color = RBT_BLACK;
+	    uncle->color = RBT_BLACK;
+	    curr->par->par->color = RBT_RED;
+	    curr = curr->par->par;
+	  }
+	else if (curr == curr->par->right)
+	  {
+	    curr = curr->par;
+	    rbt_left_rotate (t, curr);
+	  }
+	else
+	  {
+	    curr->par->color = RBT_BLACK;
+	    curr->par->par->color = RBT_RED;
+	    rbt_right_rotate (t, curr->par->par);
+	  }
+      }
+    else /* curr->par == curr->par->par->right  */
+      {
+	/* Gender-neutral formations are awkward, so let's be fair. ;-)
+	   ("Parent-sibling" is just awful.)  */
+	struct rbt_string_node *aunt = curr->par->par->left;
+	if (aunt->color == RBT_RED)
+	  {
+	    curr->par->color = RBT_BLACK;
+	    aunt->color = RBT_BLACK;
+	    curr->par->par->color = RBT_RED;
+	    curr = curr->par->par;
+	  }
+	else if (curr == curr->par->left)
+	  {
+	    curr = curr->par;
+	    rbt_right_rotate (t, curr);
+	  }
+	else
+	  {
+	    curr->par->color = RBT_BLACK;
+	    curr->par->par->color = RBT_RED;
+	    rbt_left_rotate (t, curr->par->par);
+	  }
+      }
+
+  t->rbt_root->color = RBT_BLACK;
+  return 1;
+}
+
+/* Return 1 if STR is in the red-black tree, else 0.  */
+int
+rbt_find (struct rbt_strings *t, char *str)
+{
+  struct rbt_string_node *curr = t->rbt_root;
+
+  while (curr != t->rbt_nil)
+    {
+      int cmp = strcmp (str, curr->str);
+      if (cmp < 0)
+	curr = curr->left;
+      else if (cmp > 0)
+	curr = curr->right;
+      else
+	return 1;
+    }
+
+  return 0;
+}
+
+/* Inorder dump of the binary search tree.  */
+void
+rbt_dump (struct rbt_strings *t, struct rbt_string_node *subtree)
+{
+  if (subtree != t->rbt_nil)
+    {
+      rbt_dump (t, subtree->left);
+      fprintf (stderr, "%s\n", subtree->str);
+      rbt_dump (t, subtree->right);
+    }
+}
+
+/* Inorder call-back for iteration over the tree.  */
+void
+rbt_inorder_callback (struct rbt_strings *t, struct rbt_string_node *subtree,
+		      void (*fn) (char *))
+{
+  if (subtree != t->rbt_nil)
+    {
+      rbt_inorder_callback (t, subtree->left, fn);
+      (*fn) (subtree->str);
+      rbt_inorder_callback (t, subtree->right, fn);
+    }
+}
diff --git a/gcc/config/rs6000/rbtree.h b/gcc/config/rs6000/rbtree.h
new file mode 100644
index 00000000000..f20f94028e4
--- /dev/null
+++ b/gcc/config/rs6000/rbtree.h
@@ -0,0 +1,51 @@
+/* Partial red-black tree implementation for rs6000-gen-builtins.c.
+   Copyright (C) 2020 Free Software Foundation, Inc.
+   Contributed by Bill Schmidt, IBM <wschmidt@linux.ibm.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* Red-black binary search tree on strings.  Presently we don't support
+   deletes; only insert/find operations are implemented.  */
+enum rbt_color
+  {
+    RBT_BLACK,
+    RBT_RED
+  };
+
+struct rbt_string_node {
+  char *str;
+  struct rbt_string_node *left;
+  struct rbt_string_node *right;
+  struct rbt_string_node *par;
+  enum rbt_color color;
+};
+
+/* Root and sentinel nodes of a red-black tree.
+   rbt_nil points to a sentinel node, which is the parent of root
+   and the child of every node without a "real" left or right child.
+   rbt_root points to the root of the tree, if it exists yet.  The
+   root and sentinel nodes are always black.  */
+struct rbt_strings {
+  struct rbt_string_node *rbt_nil;
+  struct rbt_string_node *rbt_root;
+};
+
+int rbt_insert (struct rbt_strings *, char *);
+int rbt_find (struct rbt_strings *, char *);
+void rbt_dump (struct rbt_strings *, struct rbt_string_node *);
+void rbt_inorder_callback (struct rbt_strings *, struct rbt_string_node *,
+			   void (*) (char *));
-- 
2.17.1

[PATCH 09/29] rs6000: Main function with stubs for parsing and output

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (rbtree.h): New #include.
	(num_bifs): Likewise.
	(num_ovld_stanzas): Likewise.
	(num_ovlds): Likewise.
	(exit_codes): Add more enum values.
	(parse_codes): New enum.
	(bif_rbt): New filescope variable.
	(ovld_rbt): Likewise.
	(fntype_rbt): Likewise.
	(parse_bif): New stub function.
	(parse_ovld): Likewise.
	(write_header_file): Likewise.
	(write_init_file): Likewise.
	(write_defines_file): Likewise.
	(delete_output_files): New function.
	(main): Likewise.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 210 ++++++++++++++++++++++++
 1 file changed, 210 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 18c67ce2202..d6058a8e73b 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -139,6 +139,7 @@ along with GCC; see the file COPYING3.  If not see
 #include <string.h>
 #include <assert.h>
 #include <unistd.h>
+#include "rbtree.h"
 
 /* Used as a sentinel for range constraints on integer fields.  No field can
    be 32 bits wide, so this is a safe sentinel value.  */
@@ -220,11 +221,41 @@ struct typeinfo {
   int val2;
 };
 
+static int num_bifs;
+static int num_ovld_stanzas;
+static int num_ovlds;
+
 /* Exit codes for the shell.  */
 enum exit_codes {
+  EC_OK,
+  EC_BADARGS,
+  EC_NOBIF,
+  EC_NOOVLD,
+  EC_NOHDR,
+  EC_NOINIT,
+  EC_NODEFINES,
+  EC_PARSEBIF,
+  EC_PARSEOVLD,
+  EC_WRITEHDR,
+  EC_WRITEINIT,
+  EC_WRITEDEFINES,
   EC_INTERR
 };
 
+/* Return codes for parsing routines.  */
+enum parse_codes {
+  PC_OK,
+  PC_EOFILE,
+  PC_EOSTANZA,
+  PC_PARSEFAIL
+};
+
+/* The red-black trees for built-in function identifiers, built-in
+   overload identifiers, and function type descriptors.  */
+static rbt_strings bif_rbt;
+static rbt_strings ovld_rbt;
+static rbt_strings fntype_rbt;
+
 /* Pointer to a diagnostic function.  */
 void (*diag) (const char *, ...) __attribute__ ((format (printf, 1, 2)))
   = NULL;
@@ -875,3 +906,182 @@ match_type (typeinfo *typedata, int voidok)
   return match_basetype (typedata);
 }
 
+/* Parse the built-in file.  */
+static parse_codes
+parse_bif ()
+{
+  return PC_OK;
+}
+
+/* Parse the overload file.  */
+static parse_codes
+parse_ovld ()
+{
+  return PC_OK;
+}
+
+/* Write everything to the header file (rs6000-builtins.h).  */
+static int
+write_header_file ()
+{
+  return 1;
+}
+
+/* Write everything to the initialization file (rs6000-builtins.c).  */
+static int
+write_init_file ()
+{
+  return 1;
+}
+
+/* Write everything to the include file (rs6000-vecdefines.h).  */
+static int
+write_defines_file ()
+{
+  return 1;
+}
+
+/* Close and delete output files after any failure, so that subsequent
+   build dependencies will fail.  */
+static void
+delete_output_files ()
+{
+  /* Depending on whence we're called, some of these may already be
+     closed.  Don't check for errors.  */
+  fclose (header_file);
+  fclose (init_file);
+  fclose (defines_file);
+
+  unlink (header_path);
+  unlink (init_path);
+  unlink (defines_path);
+}
+
+/* Main program to convert flat files into built-in initialization code.  */
+int
+main (int argc, const char **argv)
+{
+  if (argc != 6)
+    {
+      fprintf (stderr,
+	       "Five arguments required: two input file and three output "
+	       "files.\n");
+      exit (EC_BADARGS);
+    }
+
+  pgm_path = argv[0];
+  bif_path = argv[1];
+  ovld_path = argv[2];
+  header_path = argv[3];
+  init_path = argv[4];
+  defines_path = argv[5];
+
+  bif_file = fopen (bif_path, "r");
+  if (!bif_file)
+    {
+      fprintf (stderr, "Cannot find input built-in file '%s'.\n", bif_path);
+      exit (EC_NOBIF);
+    }
+  ovld_file = fopen (ovld_path, "r");
+  if (!ovld_file)
+    {
+      fprintf (stderr, "Cannot find input overload file '%s'.\n", ovld_path);
+      exit (EC_NOOVLD);
+    }
+  header_file = fopen (header_path, "w");
+  if (!header_file)
+    {
+      fprintf (stderr, "Cannot open header file '%s' for output.\n",
+	       header_path);
+      exit (EC_NOHDR);
+    }
+  init_file = fopen (init_path, "w");
+  if (!init_file)
+    {
+      fprintf (stderr, "Cannot open init file '%s' for output.\n", init_path);
+      exit (EC_NOINIT);
+    }
+  defines_file = fopen (defines_path, "w");
+  if (!defines_file)
+    {
+      fprintf (stderr, "Cannot open defines file '%s' for output.\n",
+	       defines_path);
+      exit (EC_NODEFINES);
+    }
+
+  /* Initialize the balanced trees containing built-in function ids,
+     overload function ids, and function type declaration ids.  */
+  bif_rbt.rbt_nil = (rbt_string_node *) malloc (sizeof (rbt_string_node));
+  bif_rbt.rbt_nil->color = RBT_BLACK;
+  bif_rbt.rbt_root = bif_rbt.rbt_nil;
+
+  ovld_rbt.rbt_nil = (rbt_string_node *) malloc (sizeof (rbt_string_node));
+  ovld_rbt.rbt_nil->color = RBT_BLACK;
+  ovld_rbt.rbt_root = ovld_rbt.rbt_nil;
+
+  fntype_rbt.rbt_nil = (rbt_string_node *) malloc (sizeof (rbt_string_node));
+  fntype_rbt.rbt_nil->color = RBT_BLACK;
+  fntype_rbt.rbt_root = fntype_rbt.rbt_nil;
+
+  /* Parse the built-in function file.  */
+  num_bifs = 0;
+  line = 0;
+  if (parse_bif () == PC_PARSEFAIL)
+    {
+      fprintf (stderr, "Parsing of '%s' failed, aborting.\n", bif_path);
+      delete_output_files ();
+      exit (EC_PARSEBIF);
+    }
+  fclose (bif_file);
+
+#ifdef DEBUG
+  fprintf (stderr, "\nFunction ID list:\n");
+  rbt_dump (&bif_rbt, bif_rbt.rbt_root);
+  fprintf (stderr, "\n");
+#endif
+
+  /* Parse the overload file.  */
+  num_ovld_stanzas = 0;
+  num_ovlds = 0;
+  line = 0;
+  if (parse_ovld () == PC_PARSEFAIL)
+    {
+      fprintf (stderr, "Parsing of '%s' failed, aborting.\n", ovld_path);
+      delete_output_files ();
+      exit (EC_PARSEOVLD);
+    }
+  fclose (ovld_file);
+
+#ifdef DEBUG
+  fprintf (stderr, "\nFunction type decl list:\n");
+  rbt_dump (&fntype_rbt, fntype_rbt.rbt_root);
+  fprintf (stderr, "\n");
+#endif
+
+  /* Write the header file and the file containing initialization code.  */
+  if (!write_header_file ())
+    {
+      fprintf (stderr, "Output to '%s' failed, aborting.\n", header_path);
+      delete_output_files ();
+      exit (EC_WRITEHDR);
+    }
+  fclose (header_file);
+  if (!write_init_file ())
+    {
+      fprintf (stderr, "Output to '%s' failed, aborting.\n", init_path);
+      delete_output_files ();
+      exit (EC_WRITEINIT);
+    }
+  fclose (init_file);
+
+  /* Write the defines file to be included into altivec.h.  */
+  if (!write_defines_file ())
+    {
+      fprintf (stderr, "Output to '%s' failed, aborting.\n", defines_path);
+      delete_output_files ();
+      exit (EC_WRITEDEFINES);
+    }
+  fclose (defines_file);
+
+  return EC_OK;
+}
-- 
2.17.1

[PATCH 10/29] rs6000: Parsing built-in input file, part 1 of 3

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (bif_stanza): New enum.
	(curr_bif_stanza): Likewise.
	(stanza_entry): New struct.
	(stanza_map): New initialized filescope variable.
	(enable_string): Likewise.
	(fnkinds): New enum.
	(typelist): New struct.
	(attrinfo): Likewise.
	(prototype): Likewise.
	(MAXBIFS): New defined constant.
	(bifdata): New struct.
	(bifs): New filescope variable.
	(curr_bif): Likewise.
	(stanza_name_to_stanza): New function.
	(parse_bif_attrs): New stub function.
	(parse_prototype): Likewise.
	(parse_bif_entry): New function.
	(parse_bif_stanza): Likewise.
	(parse_bif): Implement.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 320 +++++++++++++++++++++++-
 1 file changed, 319 insertions(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index d6058a8e73b..a8b0d8e4288 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -173,6 +173,93 @@ enum void_status {
   VOID_OK
 };
 
+/* Stanzas are groupings of built-in functions and overloads by some
+   common feature/attribute.  These definitions are for built-in function
+   stanzas.  */
+enum bif_stanza {
+  BSTZ_ALWAYS,
+  BSTZ_P5,
+  BSTZ_P6,
+  BSTZ_ALTIVEC,
+  BSTZ_VSX,
+  BSTZ_P7,
+  BSTZ_P7_64,
+  BSTZ_P8,
+  BSTZ_P8V,
+  BSTZ_P9,
+  BSTZ_P9_64,
+  BSTZ_P9V,
+  BSTZ_IEEE128_HW,
+  BSTZ_DFP,
+  BSTZ_CRYPTO,
+  BSTZ_HTM,
+  BSTZ_P10,
+  BSTZ_MMA,
+  NUMBIFSTANZAS
+};
+
+static bif_stanza curr_bif_stanza;
+
+struct stanza_entry
+{
+  const char *stanza_name;
+  bif_stanza stanza;
+};
+
+static stanza_entry stanza_map[NUMBIFSTANZAS] =
+  {
+    { "always",		BSTZ_ALWAYS	},
+    { "power5",		BSTZ_P5		},
+    { "power6",		BSTZ_P6		},
+    { "altivec",	BSTZ_ALTIVEC	},
+    { "vsx",		BSTZ_VSX	},
+    { "power7",		BSTZ_P7		},
+    { "power7-64",	BSTZ_P7_64	},
+    { "power8",		BSTZ_P8		},
+    { "power8-vector",	BSTZ_P8V	},
+    { "power9",		BSTZ_P9		},
+    { "power9-64",	BSTZ_P9_64	},
+    { "power9-vector",	BSTZ_P9V	},
+    { "ieee128-hw",	BSTZ_IEEE128_HW	},
+    { "dfp",		BSTZ_DFP	},
+    { "crypto",		BSTZ_CRYPTO	},
+    { "htm",		BSTZ_HTM	},
+    { "power10",	BSTZ_P10	},
+    { "mma",		BSTZ_MMA	}
+  };
+
+static const char *enable_string[NUMBIFSTANZAS] =
+  {
+    "ENB_ALWAYS",
+    "ENB_P5",
+    "ENB_P6",
+    "ENB_ALTIVEC",
+    "ENB_VSX",
+    "ENB_P7",
+    "ENB_P7_64",
+    "ENB_P8",
+    "ENB_P8V",
+    "ENB_P9",
+    "ENB_P9_64",
+    "ENB_P9V",
+    "ENB_IEEE128_HW",
+    "ENB_DFP",
+    "ENB_CRYPTO",
+    "ENB_HTM",
+    "ENB_P10",
+    "ENB_MMA"
+  };
+
+/* Function modifiers provide special handling for const, pure, and fpmath
+   functions.  These are mutually exclusive, and therefore kept separate
+   from other bif attributes.  */
+enum fnkinds {
+  FNK_NONE,
+  FNK_CONST,
+  FNK_PURE,
+  FNK_FPMATH
+};
+
 /* Legal base types for an argument or return type.  */
 enum basetype {
   BT_CHAR,
@@ -221,7 +308,58 @@ struct typeinfo {
   int val2;
 };
 
+/* A list of argument types.  */
+struct typelist {
+  typeinfo info;
+  typelist *next;
+};
+
+/* Attributes of a builtin function.  */
+struct attrinfo {
+  char isinit;
+  char isset;
+  char isextract;
+  char isnosoft;
+  char isldvec;
+  char isstvec;
+  char isreve;
+  char ispred;
+  char ishtm;
+  char ishtmspr;
+  char ishtmcr;
+  char ismma;
+  char isno32bit;
+  char iscpu;
+  char isldstmask;
+};
+
+/* Fields associated with a function prototype (bif or overload).  */
+struct prototype {
+  typeinfo rettype;
+  char *bifname;
+  int nargs;
+  typelist *args;
+  int restr_opnd[2];
+  restriction restr[2];
+  int restr_val1[2];
+  int restr_val2[2];
+};
+
+/* Data associated with a builtin function, and a table of such data.  */
+#define MAXBIFS 16384
+struct bifdata {
+  int stanza;
+  fnkinds kind;
+  prototype proto;
+  char *idname;
+  char *patname;
+  attrinfo attrs;
+  char *fndecl;
+};
+
+static bifdata bifs[MAXBIFS];
 static int num_bifs;
+static int curr_bif;
 static int num_ovld_stanzas;
 static int num_ovlds;
 
@@ -404,6 +542,15 @@ handle_pointer (typeinfo *typedata)
     }
 }
 
+static bif_stanza
+stanza_name_to_stanza (const char *stanza_name)
+{
+  for (int i = 0; i < NUMBIFSTANZAS; i++)
+    if (!strcmp (stanza_name, stanza_map[i].stanza_name))
+      return stanza_map[i].stanza;
+  assert (false);
+}
+
 /* Match one of the allowable base types.  Consumes one token unless the
    token is "long", which must be paired with a second "long".  Optionally
    consumes a following '*' token for pointers.  Return 1 for success,
@@ -906,11 +1053,182 @@ match_type (typeinfo *typedata, int voidok)
   return match_basetype (typedata);
 }
 
+/* Parse the attribute list.  */
+static parse_codes
+parse_bif_attrs (attrinfo *attrptr)
+{
+  return PC_OK;
+}
+
+/* Parse a function prototype.  This code is shared by the bif and overload
+   file processing.  */
+static parse_codes
+parse_prototype (prototype *protoptr)
+{
+  return PC_OK;
+}
+
+/* Parse a two-line entry for a built-in function.  */
+static parse_codes
+parse_bif_entry ()
+{
+  /* Check for end of stanza.  */
+  pos = 0;
+  consume_whitespace ();
+  if (linebuf[pos] == '[')
+    return PC_EOSTANZA;
+
+  /* Allocate an entry in the bif table.  */
+  if (num_bifs >= MAXBIFS - 1)
+    {
+      (*diag) ("too many built-in functions.\n");
+      return PC_PARSEFAIL;
+    }
+
+  curr_bif = num_bifs++;
+  bifs[curr_bif].stanza = curr_bif_stanza;
+
+  /* Read the first token and see if it is a function modifier.  */
+  consume_whitespace ();
+  int oldpos = pos;
+  char *token = match_identifier ();
+  if (!token)
+    {
+      (*diag) ("malformed entry at column %d\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+
+  if (!strcmp (token, "const"))
+    bifs[curr_bif].kind = FNK_CONST;
+  else if (!strcmp (token, "pure"))
+    bifs[curr_bif].kind = FNK_PURE;
+  else if (!strcmp (token, "fpmath"))
+    bifs[curr_bif].kind = FNK_FPMATH;
+  else
+    {
+      /* No function modifier, so push the token back.  */
+      pos = oldpos;
+      bifs[curr_bif].kind = FNK_NONE;
+    }
+
+  if (parse_prototype (&bifs[curr_bif].proto) == PC_PARSEFAIL)
+    return PC_PARSEFAIL;
+
+  /* Now process line 2.  First up is the builtin id.  */
+  if (!advance_line (bif_file))
+    {
+      (*diag) ("unexpected EOF.\n");
+      return PC_PARSEFAIL;
+    }
+
+  pos = 0;
+  consume_whitespace ();
+  oldpos = pos;
+  bifs[curr_bif].idname = match_identifier ();
+  if (!bifs[curr_bif].idname)
+    {
+      (*diag) ("missing builtin id at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+
+#ifdef DEBUG
+  (*diag) ("ID name is '%s'.\n", bifs[curr_bif].idname);
+#endif
+
+  /* Save the ID in a lookup structure.  */
+  if (!rbt_insert (&bif_rbt, bifs[curr_bif].idname))
+    {
+      (*diag) ("duplicate function ID '%s' at column %d.\n",
+	       bifs[curr_bif].idname, oldpos + 1);
+      return PC_PARSEFAIL;
+    }
+
+  /* Now the pattern name.  */
+  consume_whitespace ();
+  bifs[curr_bif].patname = match_identifier ();
+  if (!bifs[curr_bif].patname)
+    {
+      (*diag) ("missing pattern name at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+
+#ifdef DEBUG
+  (*diag) ("pattern name is '%s'.\n", bifs[curr_bif].patname);
+#endif
+
+  /* Process attributes.  */
+  return parse_bif_attrs (&bifs[curr_bif].attrs);
+}
+
+/* Parse one stanza of the input BIF file.  linebuf already contains the
+   first line to parse.  */
+static parse_codes
+parse_bif_stanza ()
+{
+  /* Parse the stanza header.  */
+  pos = 0;
+  consume_whitespace ();
+
+  if (linebuf[pos] != '[')
+    {
+      (*diag) ("ill-formed stanza header at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+  safe_inc_pos ();
+
+  const char *stanza_name = match_to_right_bracket ();
+  if (!stanza_name)
+    {
+      (*diag) ("no expression found in stanza header.\n");
+      return PC_PARSEFAIL;
+    }
+
+  curr_bif_stanza = stanza_name_to_stanza (stanza_name);
+
+  if (linebuf[pos] != ']')
+    {
+      (*diag) ("ill-formed stanza header at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+  safe_inc_pos ();
+
+  consume_whitespace ();
+  if (linebuf[pos] != '\n' && pos != LINELEN - 1)
+    {
+      (*diag) ("garbage after stanza header.\n");
+      return PC_PARSEFAIL;
+    }
+
+  parse_codes result = PC_OK;
+
+  while (result != PC_EOSTANZA)
+    {
+      if (!advance_line (bif_file))
+	return PC_EOFILE;
+      result = parse_bif_entry ();
+      if (result == PC_PARSEFAIL)
+	return PC_PARSEFAIL;
+    }
+
+  return PC_OK;
+}
+
 /* Parse the built-in file.  */
 static parse_codes
 parse_bif ()
 {
-  return PC_OK;
+  parse_codes result;
+  diag = &bif_diag;
+  if (!advance_line (bif_file))
+    return PC_OK;
+
+  do
+    result = parse_bif_stanza ();
+  while (result == PC_OK);
+
+  if (result == PC_EOFILE)
+    return PC_OK;
+  return result;
 }
 
 /* Parse the overload file.  */
-- 
2.17.1

[PATCH 11/29] rs6000: Parsing built-in input file, part 2 of 3

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (parse_args): New function.
	(parse_prototype): Implement.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 143 ++++++++++++++++++++++++
 1 file changed, 143 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index a8b0d8e4288..5265b591ec6 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -1053,6 +1053,91 @@ match_type (typeinfo *typedata, int voidok)
   return match_basetype (typedata);
 }
 
+/* Parse the argument list.  */
+static parse_codes
+parse_args (prototype *protoptr)
+{
+  typelist **argptr = &protoptr->args;
+  int *nargs = &protoptr->nargs;
+  int *restr_opnd = protoptr->restr_opnd;
+  restriction *restr = protoptr->restr;
+  int *val1 = protoptr->restr_val1;
+  int *val2 = protoptr->restr_val2;
+  int restr_cnt = 0;
+
+  int success;
+  *nargs = 0;
+
+  /* Start the argument list.  */
+  consume_whitespace ();
+  if (linebuf[pos] != '(')
+    {
+      (*diag) ("missing '(' at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+  safe_inc_pos ();
+
+  do {
+    consume_whitespace ();
+    int oldpos = pos;
+    typelist *argentry = (typelist *) malloc (sizeof (typelist));
+    memset (argentry, 0, sizeof (*argentry));
+    typeinfo *argtype = &argentry->info;
+    success = match_type (argtype, VOID_NOTOK);
+    if (success)
+      {
+	if (argtype->restr)
+	  {
+	    if (restr_cnt >= 2)
+	      {
+		(*diag) ("More than two restricted operands\n");
+		return PC_PARSEFAIL;
+	      }
+	    restr_opnd[restr_cnt] = *nargs + 1;
+	    restr[restr_cnt] = argtype->restr;
+	    val1[restr_cnt] = argtype->val1;
+	    val2[restr_cnt++] = argtype->val2;
+	  }
+	(*nargs)++;
+	*argptr = argentry;
+	argptr = &argentry->next;
+	consume_whitespace ();
+	if (linebuf[pos] == ',')
+	  safe_inc_pos ();
+	else if (linebuf[pos] != ')')
+	  {
+	    (*diag) ("arg not followed by ',' or ')' at column %d.\n",
+		     pos + 1);
+	    return PC_PARSEFAIL;
+	  }
+
+#ifdef DEBUG
+	(*diag) ("argument type: isvoid = %d, isconst = %d, isvector = %d, \
+issigned = %d, isunsigned = %d, isbool = %d, ispixel = %d, ispointer = %d, \
+base = %d, restr = %d, val1 = %d, val2 = %d, pos = %d.\n",
+		 argtype->isvoid, argtype->isconst, argtype->isvector,
+		 argtype->issigned, argtype->isunsigned, argtype->isbool,
+		 argtype->ispixel, argtype->ispointer, argtype->base,
+		 argtype->restr, argtype->val1, argtype->val2, pos + 1);
+#endif
+      }
+    else
+      {
+	free (argentry);
+	*argptr = NULL;
+	pos = oldpos;
+	if (linebuf[pos] != ')')
+	  {
+	    (*diag) ("badly terminated arg list at column %d.\n", pos + 1);
+	    return PC_PARSEFAIL;
+	  }
+	safe_inc_pos ();
+      }
+  } while (success);
+
+  return PC_OK;
+}
+
 /* Parse the attribute list.  */
 static parse_codes
 parse_bif_attrs (attrinfo *attrptr)
@@ -1065,6 +1150,64 @@ parse_bif_attrs (attrinfo *attrptr)
 static parse_codes
 parse_prototype (prototype *protoptr)
 {
+  typeinfo *ret_type = &protoptr->rettype;
+  char **bifname = &protoptr->bifname;
+
+  /* Get the return type.  */
+  consume_whitespace ();
+  int oldpos = pos;
+  int success = match_type (ret_type, VOID_OK);
+  if (!success)
+    {
+      (*diag) ("missing or badly formed return type at column %d.\n",
+	       oldpos + 1);
+      return PC_PARSEFAIL;
+    }
+
+#ifdef DEBUG
+  (*diag) ("return type: isvoid = %d, isconst = %d, isvector = %d, \
+issigned = %d, isunsigned = %d, isbool = %d, ispixel = %d, ispointer = %d, \
+base = %d, restr[0] = %d, val1[0] = %d, val2[0] = %d, restr1[1] = %d, \
+val1[1] = %d, val2[1] = %d, pos = %d.\n",
+	   ret_type->isvoid, ret_type->isconst, ret_type->isvector,
+	   ret_type->issigned, ret_type->isunsigned, ret_type->isbool,
+	   ret_type->ispixel, ret_type->ispointer, ret_type->base,
+	   ret_type->restr, ret_type->val1, ret_type->val2, pos + 1);
+#endif
+
+  /* Get the bif name.  */
+  consume_whitespace ();
+  oldpos = pos;
+  *bifname = match_identifier ();
+  if (!*bifname)
+    {
+      (*diag) ("missing function name at column %d.\n", oldpos + 1);
+      return PC_PARSEFAIL;
+    }
+
+#ifdef DEBUG
+  (*diag) ("function name is '%s'.\n", *bifname);
+#endif
+
+  /* Process arguments.  */
+  if (parse_args (protoptr) == PC_PARSEFAIL)
+    return PC_PARSEFAIL;
+
+  /* Process terminating semicolon.  */
+  consume_whitespace ();
+  if (linebuf[pos] != ';')
+    {
+      (*diag) ("missing semicolon at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+  safe_inc_pos ();
+  consume_whitespace ();
+  if (linebuf[pos] != '\n')
+    {
+      (*diag) ("garbage at end of line at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+
   return PC_OK;
 }
 
-- 
2.17.1

[PATCH 12/29] rs6000: Parsing built-in input file, part 3 of 3

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (parse_bif_attrs):
	Implement.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 86 +++++++++++++++++++++++++
 1 file changed, 86 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 5265b591ec6..c4bc5c724a3 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -1142,6 +1142,92 @@ base = %d, restr = %d, val1 = %d, val2 = %d, pos = %d.\n",
 static parse_codes
 parse_bif_attrs (attrinfo *attrptr)
 {
+  consume_whitespace ();
+  if (linebuf[pos] != '{')
+    {
+      (*diag) ("missing attribute set at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+  safe_inc_pos ();
+
+  memset (attrptr, 0, sizeof (*attrptr));
+  char *attrname = NULL;
+
+  do {
+    consume_whitespace ();
+    int oldpos = pos;
+    attrname = match_identifier ();
+    if (attrname)
+      {
+	if (!strcmp (attrname, "init"))
+	  attrptr->isinit = 1;
+	else if (!strcmp (attrname, "set"))
+	  attrptr->isset = 1;
+	else if (!strcmp (attrname, "extract"))
+	  attrptr->isextract = 1;
+	else if (!strcmp (attrname, "nosoft"))
+	  attrptr->isnosoft = 1;
+	else if (!strcmp (attrname, "ldvec"))
+	  attrptr->isldvec = 1;
+	else if (!strcmp (attrname, "stvec"))
+	  attrptr->isstvec = 1;
+	else if (!strcmp (attrname, "reve"))
+	  attrptr->isreve = 1;
+	else if (!strcmp (attrname, "pred"))
+	  attrptr->ispred = 1;
+	else if (!strcmp (attrname, "htm"))
+	  attrptr->ishtm = 1;
+	else if (!strcmp (attrname, "htmspr"))
+	  attrptr->ishtmspr = 1;
+	else if (!strcmp (attrname, "htmcr"))
+	  attrptr->ishtmcr = 1;
+	else if (!strcmp (attrname, "mma"))
+	  attrptr->ismma = 1;
+	else if (!strcmp (attrname, "no32bit"))
+	  attrptr->isno32bit = 1;
+	else if (!strcmp (attrname, "cpu"))
+	  attrptr->iscpu = 1;
+	else if (!strcmp (attrname, "ldstmask"))
+	  attrptr->isldstmask = 1;
+	else
+	  {
+	    (*diag) ("unknown attribute at column %d.\n", oldpos + 1);
+	    return PC_PARSEFAIL;
+	  }
+
+	consume_whitespace ();
+	if (linebuf[pos] == ',')
+	  safe_inc_pos ();
+	else if (linebuf[pos] != '}')
+	  {
+	    (*diag) ("arg not followed by ',' or '}' at column %d.\n",
+		     pos + 1);
+	    return PC_PARSEFAIL;
+	  }
+      }
+    else
+      {
+	pos = oldpos;
+	if (linebuf[pos] != '}')
+	  {
+	    (*diag) ("badly terminated attr set at column %d.\n", pos + 1);
+	    return PC_PARSEFAIL;
+	  }
+	safe_inc_pos ();
+      }
+  } while (attrname);
+
+#ifdef DEBUG
+  (*diag) ("attribute set: init = %d, set = %d, extract = %d, \
+nosoft = %d, ldvec = %d, stvec = %d, reve = %d, pred = %d, htm = %d, \
+htmspr = %d, htmcr = %d, mma = %d, no32bit = %d, cpu = %d, ldstmask = %d.\n",
+	   attrptr->isinit, attrptr->isset, attrptr->isextract,
+	   attrptr->isnosoft, attrptr->isldvec, attrptr->isstvec,
+	   attrptr->isreve, attrptr->ispred, attrptr->ishtm, attrptr->ishtmspr,
+	   attrptr->ishtmcr, attrptr->ismma, attrptr->isno32bit,
+	   attrptr->iscpu, attrptr->isldstmask);
+#endif
+
   return PC_OK;
 }
 
-- 
2.17.1

[PATCH 13/29] rs6000: Parsing of overload input file

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (ovld_stanza): New struct.
	(MAXOVLDSTANZAS): New defined constant.
	(ovld_stanzas): New filescope variable.
	(curr_ovld_stanza): Likewise.
	(MAXOVLDS): New defined constant.
	(ovlddata): New struct.
	(ovlds): New filescope variable.
	(curr_ovld): Likewise.
	(parse_ovld_entry): New function.
	(parse_ovld_stanza): Likewise.
	(parse_ovld): Implement.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 202 +++++++++++++++++++++++-
 1 file changed, 201 insertions(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index c4bc5c724a3..5413cc2681e 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -360,8 +360,31 @@ struct bifdata {
 static bifdata bifs[MAXBIFS];
 static int num_bifs;
 static int curr_bif;
+
+/* Stanzas are groupings of built-in functions and overloads by some
+   common feature/attribute.  These definitions are for overload stanzas.  */
+struct ovld_stanza {
+  char *stanza_id;
+  char *extern_name;
+  char *intern_name;
+};
+
+#define MAXOVLDSTANZAS 256
+static ovld_stanza ovld_stanzas[MAXOVLDSTANZAS];
 static int num_ovld_stanzas;
+static int curr_ovld_stanza;
+
+#define MAXOVLDS 16384
+struct ovlddata {
+  int stanza;
+  prototype proto;
+  char *idname;
+  char *fndecl;
+};
+
+static ovlddata ovlds[MAXOVLDS];
 static int num_ovlds;
+static int curr_ovld;
 
 /* Exit codes for the shell.  */
 enum exit_codes {
@@ -1460,11 +1483,188 @@ parse_bif ()
   return result;
 }
 
+/* Parse one two-line entry in the overload file.  */
+static parse_codes
+parse_ovld_entry ()
+{
+  /* Check for end of stanza.  */
+  pos = 0;
+  consume_whitespace ();
+  if (linebuf[pos] == '[')
+    return PC_EOSTANZA;
+
+  /* Allocate an entry in the overload table.  */
+  if (num_ovlds >= MAXOVLDS - 1)
+    {
+      (*diag) ("too many overloads.\n");
+      return PC_PARSEFAIL;
+    }
+
+  curr_ovld = num_ovlds++;
+  ovlds[curr_ovld].stanza = curr_ovld_stanza;
+
+  if (parse_prototype (&ovlds[curr_ovld].proto) == PC_PARSEFAIL)
+    return PC_PARSEFAIL;
+
+  /* Now process line 2, which just contains the builtin id.  */
+  if (!advance_line (ovld_file))
+    {
+      (*diag) ("unexpected EOF.\n");
+      return PC_EOFILE;
+    }
+
+  pos = 0;
+  consume_whitespace ();
+  int oldpos = pos;
+  char *id = match_identifier ();
+  ovlds[curr_ovld].idname = id;
+  if (!id)
+    {
+      (*diag) ("missing overload id at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+
+#ifdef DEBUG
+  (*diag) ("ID name is '%s'.\n", id);
+#endif
+
+  /* The builtin id has to match one from the bif file.  */
+  if (!rbt_find (&bif_rbt, id))
+    {
+      (*diag) ("builtin ID '%s' not found in bif file.\n", id);
+      return PC_PARSEFAIL;
+    }
+
+  /* Save the ID in a lookup structure.  */
+  if (!rbt_insert (&ovld_rbt, id))
+    {
+      (*diag) ("duplicate function ID '%s' at column %d.\n", id, oldpos + 1);
+      return PC_PARSEFAIL;
+    }
+
+  consume_whitespace ();
+  if (linebuf[pos] != '\n')
+    {
+      (*diag) ("garbage at end of line at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+  return PC_OK;
+}
+
+/* Parse one stanza of the input overload file.  linebuf already contains the
+   first line to parse.  */
+static parse_codes
+parse_ovld_stanza ()
+{
+  /* Parse the stanza header.  */
+  pos = 0;
+  consume_whitespace ();
+
+  if (linebuf[pos] != '[')
+    {
+      (*diag) ("ill-formed stanza header at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+  safe_inc_pos ();
+
+  char *stanza_name = match_identifier ();
+  if (!stanza_name)
+    {
+      (*diag) ("no identifier found in stanza header.\n");
+      return PC_PARSEFAIL;
+    }
+
+  /* Add the identifier to a table and set the number to be recorded
+     with subsequent overload entries.  */
+  if (num_ovld_stanzas >= MAXOVLDSTANZAS)
+    {
+      (*diag) ("too many stanza headers.\n");
+      return PC_PARSEFAIL;
+    }
+
+  curr_ovld_stanza = num_ovld_stanzas++;
+  ovld_stanza *stanza = &ovld_stanzas[curr_ovld_stanza];
+  stanza->stanza_id = stanza_name;
+
+  consume_whitespace ();
+  if (linebuf[pos] != ',')
+    {
+      (*diag) ("missing comma at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+  safe_inc_pos ();
+
+  consume_whitespace ();
+  stanza->extern_name = match_identifier ();
+  if (!stanza->extern_name)
+    {
+      (*diag) ("missing external name at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+
+  consume_whitespace ();
+  if (linebuf[pos] != ',')
+    {
+      (*diag) ("missing comma at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+  safe_inc_pos ();
+
+  consume_whitespace ();
+  stanza->intern_name = match_identifier ();
+  if (!stanza->intern_name)
+    {
+      (*diag) ("missing internal name at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+
+  if (linebuf[pos] != ']')
+    {
+      (*diag) ("ill-formed stanza header at column %d.\n", pos + 1);
+      return PC_PARSEFAIL;
+    }
+  safe_inc_pos ();
+
+  consume_whitespace ();
+  if (linebuf[pos] != '\n' && pos != LINELEN - 1)
+    {
+      (*diag) ("garbage after stanza header.\n");
+      return PC_PARSEFAIL;
+    }
+
+  parse_codes result = PC_OK;
+
+  while (result != PC_EOSTANZA)
+    {
+      if (!advance_line (ovld_file))
+	return PC_EOFILE;
+
+      result = parse_ovld_entry ();
+      if (result == PC_EOFILE || result == PC_PARSEFAIL)
+	return result;
+    }
+
+  return PC_OK;
+}
+
 /* Parse the overload file.  */
 static parse_codes
 parse_ovld ()
 {
-  return PC_OK;
+  parse_codes result = PC_OK;
+  diag = &ovld_diag;
+  while (result == PC_OK)
+    {
+      /* Read ahead one line and check for EOF.  */
+      if (!advance_line (ovld_file))
+	return PC_OK;
+
+      /* Parse a stanza beginning at this line.  */
+      result = parse_ovld_stanza ();
+    }
+  if (result == PC_EOFILE)
+    return PC_OK;
+  return result;
 }
 
 /* Write everything to the header file (rs6000-builtins.h).  */
-- 
2.17.1

[PATCH 14/29] rs6000: Build and store function type identifiers

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (complete_vector_type): New
	function.
	(complete_base_type): Likewise.
	(construct_fntype_id): Likewise.
	(parse_bif_entry): Call construct_fntype_id.
	(parse_ovld_entry): Likewise.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 211 ++++++++++++++++++++++++
 1 file changed, 211 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 5413cc2681e..b31b666e071 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -1254,6 +1254,209 @@ htmspr = %d, htmcr = %d, mma = %d, no32bit = %d, cpu = %d, ldstmask = %d.\n",
   return PC_OK;
 }
 
+/* Convert a vector type into a mode string.  */
+static void
+complete_vector_type (typeinfo *typeptr, char *buf, int *bufi)
+{
+  if (typeptr->isbool)
+    buf[(*bufi)++] = 'b';
+  buf[(*bufi)++] = 'v';
+  if (typeptr->ispixel)
+    {
+      memcpy (&buf[*bufi], "p8hi", 4);
+      *bufi += 4;
+    }
+  else
+    {
+      switch (typeptr->base)
+	{
+	case BT_CHAR:
+	  memcpy (&buf[*bufi], "16qi", 4);
+	  *bufi += 4;
+	  break;
+	case BT_SHORT:
+	  memcpy (&buf[*bufi], "8hi", 3);
+	  *bufi += 3;
+	  break;
+	case BT_INT:
+	  memcpy (&buf[*bufi], "4si", 3);
+	  *bufi += 3;
+	  break;
+	case BT_LONGLONG:
+	  memcpy (&buf[*bufi], "2di", 3);
+	  *bufi += 3;
+	  break;
+	case BT_FLOAT:
+	  memcpy (&buf[*bufi], "4sf", 3);
+	  *bufi += 3;
+	  break;
+	case BT_DOUBLE:
+	  memcpy (&buf[*bufi], "2df", 3);
+	  *bufi += 3;
+	  break;
+	case BT_INT128:
+	  memcpy (&buf[*bufi], "1ti", 3);
+	  *bufi += 3;
+	  break;
+	case BT_FLOAT128:
+	  memcpy (&buf[*bufi], "1tf", 3);
+	  *bufi += 3;
+	  break;
+	default:
+	  (*diag) ("unhandled basetype %d.\n", typeptr->base);
+	  exit (EC_INTERR);
+	}
+    }
+}
+
+/* Convert a base type into a mode string.  */
+static void
+complete_base_type (typeinfo *typeptr, char *buf, int *bufi)
+{
+  switch (typeptr->base)
+    {
+    case BT_CHAR:
+      memcpy (&buf[*bufi], "qi", 2);
+      break;
+    case BT_SHORT:
+      memcpy (&buf[*bufi], "hi", 2);
+      break;
+    case BT_INT:
+      memcpy (&buf[*bufi], "si", 2);
+      break;
+    case BT_LONGLONG:
+      memcpy (&buf[*bufi], "di", 2);
+      break;
+    case BT_FLOAT:
+      memcpy (&buf[*bufi], "sf", 2);
+      break;
+    case BT_DOUBLE:
+      memcpy (&buf[*bufi], "df", 2);
+      break;
+    case BT_INT128:
+      memcpy (&buf[*bufi], "ti", 2);
+      break;
+    case BT_FLOAT128:
+      memcpy (&buf[*bufi], "tf", 2);
+      break;
+    case BT_DECIMAL32:
+      memcpy (&buf[*bufi], "sd", 2);
+      break;
+    case BT_DECIMAL64:
+      memcpy (&buf[*bufi], "dd", 2);
+      break;
+    case BT_DECIMAL128:
+      memcpy (&buf[*bufi], "td", 2);
+      break;
+    case BT_IBM128:
+      memcpy (&buf[*bufi], "if", 2);
+      break;
+    default:
+      (*diag) ("unhandled basetype %d.\n", typeptr->base);
+      exit (EC_INTERR);
+    }
+
+  *bufi += 2;
+}
+
+/* Build a function type descriptor identifier from the return type
+   and argument types described by PROTOPTR, and store it if it does
+   not already exist.  Return the identifier.  */
+static char *
+construct_fntype_id (prototype *protoptr)
+{
+  /* Determine the maximum space for a function type descriptor id.
+     Each type requires at most 8 characters (6 for the mode*, 1 for
+     the optional 'u' preceding the mode, and 1 for an underscore
+     following the mode).  We also need 5 characters for the string
+     "ftype" that separates the return mode from the argument modes.
+     The last argument doesn't need a trailing underscore, but we
+     count that as the one trailing "ftype" instead.  For the special
+     case of zero arguments, we need 8 for the return type and 7
+     for "ftype_v".  Finally, we need one character for the
+     terminating null.  Thus for a function with N arguments, we
+     need at most 8N+14 characters for N>0, otherwise 16.
+     ----
+       *Worst case is bv16qi for "vector bool char".  */
+  int len = protoptr->nargs ? (protoptr->nargs + 1) * 8 + 6 : 16;
+  char *buf = (char *) malloc (len);
+  int bufi = 0;
+
+  if (protoptr->rettype.ispointer)
+    {
+      assert (protoptr->rettype.isvoid);
+      buf[bufi++] = 'p';
+    }
+  if (protoptr->rettype.isvoid)
+    buf[bufi++] = 'v';
+  else
+    {
+      if (protoptr->rettype.isopaque)
+	{
+	  memcpy (&buf[bufi], "opaque", 6);
+	  bufi += 6;
+	}
+      else
+	{
+	  if (protoptr->rettype.isunsigned)
+	    buf[bufi++] = 'u';
+	  if (protoptr->rettype.isvector)
+	    complete_vector_type (&protoptr->rettype, buf, &bufi);
+	  else
+	    complete_base_type (&protoptr->rettype, buf, &bufi);
+	}
+    }
+
+  memcpy (&buf[bufi], "_ftype", 6);
+  bufi += 6;
+
+  if (!protoptr->nargs)
+    {
+      memcpy (&buf[bufi], "_v", 2);
+      bufi += 2;
+    }
+  else
+    {
+      typelist *argptr = protoptr->args;
+      for (int i = 0; i < protoptr->nargs; i++)
+	{
+	  assert (argptr);
+	  buf[bufi++] = '_';
+	  if (argptr->info.ispointer)
+	    {
+	      buf[bufi++] = 'p';
+	      buf[bufi++] = 'v';
+	    }
+	  else
+	    {
+	      if (argptr->info.isopaque)
+		{
+		  memcpy (&buf[bufi], "opaque", 6);
+		  bufi += 6;
+		}
+	      else
+		{
+		  if (argptr->info.isunsigned)
+		    buf[bufi++] = 'u';
+		  if (argptr->info.isvector)
+		    complete_vector_type (&argptr->info, buf, &bufi);
+		  else
+		    complete_base_type (&argptr->info, buf, &bufi);
+		}
+	    }
+	  argptr = argptr->next;
+	}
+      assert (!argptr);
+      }
+
+  buf[bufi] = '\0';
+
+  /* Ignore return value, as duplicates are expected.  */
+  (void) rbt_insert (&fntype_rbt, buf);
+
+  return buf;
+}
+
 /* Parse a function prototype.  This code is shared by the bif and overload
    file processing.  */
 static parse_codes
@@ -1366,6 +1569,10 @@ parse_bif_entry ()
   if (parse_prototype (&bifs[curr_bif].proto) == PC_PARSEFAIL)
     return PC_PARSEFAIL;
 
+  /* Build a function type descriptor identifier from the return type
+     and argument types, and store it if it does not already exist.  */
+  bifs[curr_bif].fndecl = construct_fntype_id (&bifs[curr_bif].proto);
+
   /* Now process line 2.  First up is the builtin id.  */
   if (!advance_line (bif_file))
     {
@@ -1506,6 +1713,10 @@ parse_ovld_entry ()
   if (parse_prototype (&ovlds[curr_ovld].proto) == PC_PARSEFAIL)
     return PC_PARSEFAIL;
 
+  /* Build a function type descriptor identifier from the return type
+     and argument types, and store it if it does not already exist.  */
+  ovlds[curr_ovld].fndecl = construct_fntype_id (&ovlds[curr_ovld].proto);
+
   /* Now process line 2, which just contains the builtin id.  */
   if (!advance_line (ovld_file))
     {
-- 
2.17.1

[PATCH 15/29] rs6000: Write output to the vector definition include file

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (write_defines_file):
	Implement.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index b31b666e071..67336152550 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -1896,6 +1896,10 @@ write_init_file ()
 static int
 write_defines_file ()
 {
+  for (int i = 0; i < num_ovld_stanzas; i++)
+    fprintf (defines_file, "#define %s %s\n",
+	     ovld_stanzas[i].extern_name,
+	     ovld_stanzas[i].intern_name);
   return 1;
 }
 
-- 
2.17.1

[PATCH 16/29] rs6000: Write output to the builtins header file

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c
	(write_autogenerated_header): New function.
	(write_bif_enum): Likewise.
	(write_ovld_enum): Likewise.
	(write_decls): Likewise.
	(write_extern_fntype): Likewise.
	(write_header_file): Implement.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 193 ++++++++++++++++++++++++
 1 file changed, 193 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 67336152550..67c7b22aad6 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -1878,10 +1878,203 @@ parse_ovld ()
   return result;
 }
 
+/* Write a comment at the top of FILE about how the code was generated.  */
+static void
+write_autogenerated_header (FILE *file)
+{
+  fprintf (file, "/* Automatically generated by the program '%s'\n",
+	   pgm_path);
+  fprintf (file, "   from the files '%s' and '%s'.  */\n\n",
+	   bif_path, ovld_path);
+}
+
+/* Callback functions used in creating enumerations.  */
+void write_bif_enum (char *str)
+{
+  fprintf (header_file, "  RS6000_BIF_%s,\n", str);
+}
+
+void write_ovld_enum (char *str)
+{
+  fprintf (header_file, "  RS6000_OVLD_%s,\n", str);
+}
+
+/* Write declarations into the header file.  */
+static void
+write_decls ()
+{
+  fprintf (header_file, "enum rs6000_gen_builtins\n{\n  RS6000_BIF_NONE,\n");
+  rbt_inorder_callback (&bif_rbt, bif_rbt.rbt_root, write_bif_enum);
+  fprintf (header_file, "  RS6000_BIF_MAX\n};\n\n");
+
+  fprintf (header_file, "enum restriction {\n");
+  fprintf (header_file, "  RES_NONE,\n");
+  fprintf (header_file, "  RES_BITS,\n");
+  fprintf (header_file, "  RES_RANGE,\n");
+  fprintf (header_file, "  RES_VAR_RANGE,\n");
+  fprintf (header_file, "  RES_VALUES\n");
+  fprintf (header_file, "};\n\n");
+
+  fprintf (header_file, "enum bif_enable {\n");
+  fprintf (header_file, "  ENB_ALWAYS,\n");
+  fprintf (header_file, "  ENB_P5,\n");
+  fprintf (header_file, "  ENB_P6,\n");
+  fprintf (header_file, "  ENB_ALTIVEC,\n");
+  fprintf (header_file, "  ENB_VSX,\n");
+  fprintf (header_file, "  ENB_P7,\n");
+  fprintf (header_file, "  ENB_P7_64,\n");
+  fprintf (header_file, "  ENB_P8,\n");
+  fprintf (header_file, "  ENB_P8V,\n");
+  fprintf (header_file, "  ENB_P9,\n");
+  fprintf (header_file, "  ENB_P9_64,\n");
+  fprintf (header_file, "  ENB_P9V,\n");
+  fprintf (header_file, "  ENB_IEEE128_HW,\n");
+  fprintf (header_file, "  ENB_DFP,\n");
+  fprintf (header_file, "  ENB_CRYPTO,\n");
+  fprintf (header_file, "  ENB_HTM,\n");
+  fprintf (header_file, "  ENB_P10,\n");
+  fprintf (header_file, "  ENB_MMA\n");
+  fprintf (header_file, "};\n\n");
+
+  fprintf (header_file, "struct bifdata\n");
+  fprintf (header_file, "{\n");
+  fprintf (header_file, "  const char *bifname;\n");
+  fprintf (header_file, "  bif_enable enable;\n");
+  fprintf (header_file, "  tree fntype;\n");
+  fprintf (header_file, "  insn_code icode;\n");
+  fprintf (header_file, "  int  nargs;\n");
+  fprintf (header_file, "  int  bifattrs;\n");
+  fprintf (header_file, "  int  restr_opnd[2];\n");
+  fprintf (header_file, "  restriction restr[2];\n");
+  fprintf (header_file, "  int  restr_val1[2];\n");
+  fprintf (header_file, "  int  restr_val2[2];\n");
+  fprintf (header_file, "};\n\n");
+
+  fprintf (header_file, "#define bif_init_bit\t\t(0x00000001)\n");
+  fprintf (header_file, "#define bif_set_bit\t\t(0x00000002)\n");
+  fprintf (header_file, "#define bif_extract_bit\t\t(0x00000004)\n");
+  fprintf (header_file, "#define bif_nosoft_bit\t\t(0x00000008)\n");
+  fprintf (header_file, "#define bif_ldvec_bit\t\t(0x00000010)\n");
+  fprintf (header_file, "#define bif_stvec_bit\t\t(0x00000020)\n");
+  fprintf (header_file, "#define bif_reve_bit\t\t(0x00000040)\n");
+  fprintf (header_file, "#define bif_pred_bit\t\t(0x00000080)\n");
+  fprintf (header_file, "#define bif_htm_bit\t\t(0x00000100)\n");
+  fprintf (header_file, "#define bif_htmspr_bit\t\t(0x00000200)\n");
+  fprintf (header_file, "#define bif_htmcr_bit\t\t(0x00000400)\n");
+  fprintf (header_file, "#define bif_mma_bit\t\t(0x00000800)\n");
+  fprintf (header_file, "#define bif_no32bit_bit\t\t(0x00001000)\n");
+  fprintf (header_file, "#define bif_cpu_bit\t\t(0x00002000)\n");
+  fprintf (header_file, "#define bif_ldstmask_bit\t(0x00004000)\n");
+  fprintf (header_file, "\n");
+  fprintf (header_file,
+	   "#define bif_is_init(x)\t\t((x).bifattrs & bif_init_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_set(x)\t\t((x).bifattrs & bif_set_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_extract(x)\t((x).bifattrs & bif_extract_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_nosoft(x)\t((x).bifattrs & bif_nosoft_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_ldvec(x)\t\t((x).bifattrs & bif_ldvec_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_stvec(x)\t\t((x).bifattrs & bif_stvec_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_reve(x)\t\t((x).bifattrs & bif_reve_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_predicate(x)\t((x).bifattrs & bif_pred_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_htm(x)\t\t((x).bifattrs & bif_htm_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_htmspr(x)\t((x).bifattrs & bif_htmspr_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_htmcr(x)\t\t((x).bifattrs & bif_htmcr_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_mma(x)\t\t((x).bifattrs & bif_mma_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_no32bit(x)\t((x).bifattrs & bif_no32bit_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_cpu(x)\t\t((x).bifattrs & bif_cpu_bit)\n");
+  fprintf (header_file,
+	   "#define bif_is_ldstmask(x)\t((x).bifattrs "
+	   "& bif_ldstmask_bit)\n");
+  fprintf (header_file, "\n");
+
+  /* #### Note that the _x is added for now to avoid conflict with
+     the existing rs6000_builtin_info[] file while testing.  It will
+     be removed as we progress.  */
+  fprintf (header_file, "extern bifdata rs6000_builtin_info_x[];\n\n");
+
+  fprintf (header_file,
+	   "struct rs6000_bif_hasher : nofree_ptr_hash<bifdata>\n");
+  fprintf (header_file, "{\n");
+  fprintf (header_file, "  typedef const char *compare_type;\n\n");
+  fprintf (header_file, "  static hashval_t hash (bifdata *);\n");
+  fprintf (header_file, "  static bool equal (bifdata *, const char *);\n");
+  fprintf (header_file, "};\n\n");
+
+  fprintf (header_file, "extern hash_table<rs6000_bif_hasher> bif_hash;\n\n");
+
+  /* Right now we use nonoverlapping numbers for rs6000_gen_builtins
+     and rs6000_gen_overloads.  In the old design, these were all in the
+     same enum, and I can't yet prove there isn't a dependency on these
+     numbers being distinct.  Once this is more clear, I may change
+     this to start at zero.  */
+  fprintf (header_file, "enum rs6000_gen_overloads\n{\n");
+  fprintf (header_file, "  RS6000_OVLD_NONE = RS6000_BIF_MAX + 1,\n");
+  rbt_inorder_callback (&ovld_rbt, ovld_rbt.rbt_root, write_ovld_enum);
+  fprintf (header_file, "  RS6000_OVLD_MAX\n};\n\n");
+
+  fprintf (header_file, "struct ovlddata\n");
+  fprintf (header_file, "{\n");
+  fprintf (header_file, "  const char *bifname;\n");
+  fprintf (header_file, "  rs6000_gen_builtins bifid;\n");
+  fprintf (header_file, "  tree fntype;\n");
+  fprintf (header_file, "  ovlddata *next;\n");
+  fprintf (header_file, "};\n\n");
+
+  fprintf (header_file, "extern ovlddata rs6000_overload_info[];\n\n");
+
+  fprintf (header_file,
+	   "struct rs6000_ovld_hasher : nofree_ptr_hash<ovlddata>\n");
+  fprintf (header_file, "{\n");
+  fprintf (header_file, "  typedef const char *compare_type;\n\n");
+  fprintf (header_file, "  static hashval_t hash (ovlddata *);\n");
+  fprintf (header_file, "  static bool equal (ovlddata *, const char *);\n");
+  fprintf (header_file, "};\n\n");
+
+  fprintf (header_file,
+	   "extern hash_table<rs6000_ovld_hasher> ovld_hash;\n\n");
+
+  fprintf (header_file, "extern void rs6000_autoinit_builtins ();\n\n");
+}
+
+/* Callback functions used for generating trees for function types.  */
+void
+write_extern_fntype (char *str)
+{
+  fprintf (header_file, "extern tree %s;\n", str);
+}
+
 /* Write everything to the header file (rs6000-builtins.h).  */
 static int
 write_header_file ()
 {
+  write_autogenerated_header (header_file);
+  fprintf (header_file, "#include \"config.h\"\n");
+  fprintf (header_file, "#include \"system.h\"\n");
+  fprintf (header_file, "#include \"coretypes.h\"\n");
+  fprintf (header_file, "#include \"backend.h\"\n");
+  fprintf (header_file, "#include \"rtl.h\"\n");
+  fprintf (header_file, "#include \"tree.h\"\n");
+  fprintf (header_file, "\n");
+  fprintf (header_file, "extern int new_builtins_are_live;\n\n");
+
+  write_decls ();
+
+  /* Write function type list declarators to the header file.  */
+  rbt_inorder_callback (&fntype_rbt, fntype_rbt.rbt_root, write_extern_fntype);
+  fprintf (header_file, "\n");
+
   return 1;
 }
 
-- 
2.17.1

[PATCH 17/29] rs6000: Write output to the builtins init file, part 1 of 3

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (write_fntype): New
	function.
	(write_fntype_init): New stub function.
	(write_init_bif_table): Likewise.
	(write_init_ovld_table): New function.
	(write_init_file): Implement.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 149 ++++++++++++++++++++++++
 1 file changed, 149 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 67c7b22aad6..3ac199ff2e5 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -2055,6 +2055,18 @@ write_extern_fntype (char *str)
   fprintf (header_file, "extern tree %s;\n", str);
 }
 
+void
+write_fntype (char *str)
+{
+  fprintf (init_file, "tree %s;\n", str);
+}
+
+/* Write an initializer for a function type identified by STR.  */
+void
+write_fntype_init (char *str)
+{
+}
+
 /* Write everything to the header file (rs6000-builtins.h).  */
 static int
 write_header_file ()
@@ -2078,10 +2090,147 @@ write_header_file ()
   return 1;
 }
 
+/* Write code to initialize the built-in function table.  */
+static void
+write_init_bif_table ()
+{
+}
+
+/* Write code to initialize the overload table.  */
+static void
+write_init_ovld_table ()
+{
+  fprintf (init_file, "  int base = RS6000_BIF_MAX;\n\n");
+
+  for (int i = 0; i <= curr_ovld; i++)
+    {
+      fprintf (init_file,
+	       "  rs6000_overload_info[RS6000_OVLD_%s - base].bifname"
+	       "\n    = \"%s\";\n",
+	       ovlds[i].idname, ovlds[i].proto.bifname);
+      fprintf (init_file,
+	       "  rs6000_overload_info[RS6000_OVLD_%s - base].bifid"
+	       "\n    = RS6000_BIF_%s;\n",
+	       ovlds[i].idname, ovlds[i].idname);
+      fprintf (init_file,
+	       "  rs6000_overload_info[RS6000_OVLD_%s - base].fntype"
+	       "\n    = %s;\n",
+	       ovlds[i].idname, ovlds[i].fndecl);
+      fprintf (init_file,
+	       "  rs6000_overload_info[RS6000_OVLD_%s - base].next"
+	       "\n    = ", ovlds[i].idname);
+      if (i < curr_ovld
+	  && !strcmp (ovlds[i+1].proto.bifname, ovlds[i].proto.bifname))
+	fprintf (init_file,
+		 "&rs6000_overload_info[RS6000_OVLD_%s - base];\n",
+		 ovlds[i+1].idname);
+      else
+	fprintf (init_file, "NULL;\n");
+
+      if (i == 0 || ovlds[i].stanza != ovlds[i-1].stanza)
+	{
+	  fprintf (init_file, "\n");
+
+	  fprintf (init_file,
+		   "  ovldaddr = &rs6000_overload_info"
+		   "[RS6000_OVLD_%s - base];\n",
+		   ovlds[i].idname);
+	  fprintf (init_file,
+		   "  hash = rs6000_ovld_hasher::hash (ovldaddr);\n");
+	  fprintf (init_file,
+		   "  oslot = ovld_hash.find_slot_with_hash (\n");
+	  fprintf (init_file,
+		   "            \"%s\", hash, INSERT\n",
+		   ovlds[i].proto.bifname);
+	  fprintf (init_file,
+		   "         );\n");
+	  fprintf (init_file,
+		   "  *oslot = ovldaddr;\n");
+	}
+
+      if (i < curr_ovld)
+	fprintf (init_file, "\n");
+    }
+}
+
 /* Write everything to the initialization file (rs6000-builtins.c).  */
 static int
 write_init_file ()
 {
+  write_autogenerated_header (init_file);
+
+  fprintf (init_file, "#include \"config.h\"\n");
+  fprintf (init_file, "#include \"system.h\"\n");
+  fprintf (init_file, "#include \"coretypes.h\"\n");
+  fprintf (init_file, "#include \"backend.h\"\n");
+  fprintf (init_file, "#include \"rtl.h\"\n");
+  fprintf (init_file, "#include \"tree.h\"\n");
+  fprintf (init_file, "#include \"langhooks.h\"\n");
+  fprintf (init_file, "#include \"insn-codes.h\"\n");
+  fprintf (init_file, "#include \"rs6000-builtins.h\"\n");
+  fprintf (init_file, "\n");
+
+#ifdef DEBUG_NEW_BUILTINS
+  fprintf (init_file, "int new_builtins_are_live = 1;\n\n");
+#else
+  fprintf (init_file, "int new_builtins_are_live = 0;\n\n");
+#endif
+
+  fprintf (init_file,
+	   "bifdata rs6000_builtin_info_x[RS6000_BIF_MAX];\n\n");
+  fprintf (init_file,
+	   "ovlddata rs6000_overload_info[RS6000_OVLD_MAX"
+	   " - RS6000_BIF_MAX];\n\n");
+
+  rbt_inorder_callback (&fntype_rbt, fntype_rbt.rbt_root, write_fntype);
+  fprintf (init_file, "\n");
+
+  fprintf (init_file, "hashval_t\n");
+  fprintf (init_file, "rs6000_bif_hasher::hash (bifdata *bd)\n");
+  fprintf (init_file, "{\n");
+  fprintf (init_file, "  return htab_hash_string (bd->bifname);\n");
+  fprintf (init_file, "}\n\n");
+
+  fprintf (init_file, "bool\n");
+  fprintf (init_file,
+	   "rs6000_bif_hasher::equal (bifdata *bd, const char *name)\n");
+  fprintf (init_file, "{\n");
+  fprintf (init_file, "  return bd && name && !strcmp (bd->bifname, name);\n");
+  fprintf (init_file, "}\n\n");
+
+  fprintf (init_file, "hash_table<rs6000_bif_hasher> bif_hash (1024);\n\n");
+
+  fprintf (init_file, "hashval_t\n");
+  fprintf (init_file, "rs6000_ovld_hasher::hash (ovlddata *od)\n");
+  fprintf (init_file, "{\n");
+  fprintf (init_file, "  return htab_hash_string (od->bifname);\n");
+  fprintf (init_file, "}\n\n");
+
+  fprintf (init_file, "bool\n");
+  fprintf (init_file,
+	   "rs6000_ovld_hasher::equal (ovlddata *od, const char *name)\n");
+  fprintf (init_file, "{\n");
+  fprintf (init_file, "  return od && name && !strcmp (od->bifname, name);\n");
+  fprintf (init_file, "}\n\n");
+
+  fprintf (init_file, "hash_table<rs6000_ovld_hasher> ovld_hash (512);\n\n");
+
+  fprintf (init_file, "void\n");
+  fprintf (init_file, "rs6000_autoinit_builtins ()\n");
+  fprintf (init_file, "{\n");
+  fprintf (init_file, "  tree t;\n");
+  fprintf (init_file, "  bifdata **slot;\n");
+  fprintf (init_file, "  bifdata *bifaddr;\n");
+  fprintf (init_file, "  hashval_t hash;\n");
+  fprintf (init_file, "  ovlddata **oslot;\n");
+  fprintf (init_file, "  ovlddata *ovldaddr;\n\n");
+  rbt_inorder_callback (&fntype_rbt, fntype_rbt.rbt_root, write_fntype_init);
+  fprintf (init_file, "\n");
+
+  write_init_bif_table ();
+  write_init_ovld_table ();
+
+  fprintf (init_file, "}\n");
   return 1;
 }
 
-- 
2.17.1

[PATCH 18/29] rs6000: Write output to the builtins init file, part 2 of 3

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (write_init_bif_table):
	Implement.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 153 ++++++++++++++++++++++++
 1 file changed, 153 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 3ac199ff2e5..43d13b46a43 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -2094,6 +2094,159 @@ write_header_file ()
 static void
 write_init_bif_table ()
 {
+  const char *attr_string;
+
+  for (int i = 0; i <= curr_bif; i++)
+    {
+      fprintf (init_file,
+	       "  rs6000_builtin_info_x[RS6000_BIF_%s].bifname"
+	       "\n    = \"%s\";\n",
+	       bifs[i].idname, bifs[i].proto.bifname);
+      fprintf (init_file,
+	       "  rs6000_builtin_info_x[RS6000_BIF_%s].enable"
+	       "\n    = %s;\n",
+	       bifs[i].idname, enable_string[bifs[i].stanza]);
+      fprintf (init_file,
+	       "  rs6000_builtin_info_x[RS6000_BIF_%s].fntype"
+	       "\n    = %s;\n",
+	       bifs[i].idname, bifs[i].fndecl);
+      fprintf (init_file,
+	       "  rs6000_builtin_info_x[RS6000_BIF_%s].nargs"
+	       "\n    = %d;\n",
+	       bifs[i].idname, bifs[i].proto.nargs);
+      fprintf (init_file,
+	       "  rs6000_builtin_info_x[RS6000_BIF_%s].icode"
+	       "\n    = CODE_FOR_%s;\n",
+	       bifs[i].idname, bifs[i].patname);
+      fprintf (init_file,
+	       "  rs6000_builtin_info_x[RS6000_BIF_%s].bifattrs"
+	       "\n    = 0",
+	       bifs[i].idname);
+      if (bifs[i].attrs.isinit)
+	fprintf (init_file, " | bif_init_bit");
+      if (bifs[i].attrs.isset)
+	fprintf (init_file, " | bif_set_bit");
+      if (bifs[i].attrs.isextract)
+	fprintf (init_file, " | bif_extract_bit");
+      if (bifs[i].attrs.isnosoft)
+	fprintf (init_file, " | bif_nosoft_bit");
+      if (bifs[i].attrs.isldvec)
+	fprintf (init_file, " | bif_ldvec_bit");
+      if (bifs[i].attrs.isstvec)
+	fprintf (init_file, " | bif_stvec_bit");
+      if (bifs[i].attrs.isreve)
+	fprintf (init_file, " | bif_reve_bit");
+      if (bifs[i].attrs.ispred)
+	fprintf (init_file, " | bif_pred_bit");
+      if (bifs[i].attrs.ishtm)
+	fprintf (init_file, " | bif_htm_bit");
+      if (bifs[i].attrs.ishtmspr)
+	fprintf (init_file, " | bif_htmspr_bit");
+      if (bifs[i].attrs.ishtmcr)
+	fprintf (init_file, " | bif_htmcr_bit");
+      if (bifs[i].attrs.ismma)
+	fprintf (init_file, " | bif_mma_bit");
+      if (bifs[i].attrs.isno32bit)
+	fprintf (init_file, " | bif_no32bit_bit");
+      if (bifs[i].attrs.iscpu)
+	fprintf (init_file, " | bif_cpu_bit");
+      if (bifs[i].attrs.isldstmask)
+	fprintf (init_file, " | bif_ldstmask_bit");
+      fprintf (init_file, ";\n");
+      for (int j = 0; j < 1; j++)
+	{
+	  fprintf (init_file,
+		   "  rs6000_builtin_info_x[RS6000_BIF_%s].restr_opnd[%d]"
+		   "\n    = %d;\n",
+		   bifs[i].idname, j, bifs[i].proto.restr_opnd[j]);
+	  if (bifs[i].proto.restr_opnd[j])
+	    {
+	      const char *res
+		= (bifs[i].proto.restr[j] == RES_BITS ? "RES_BITS"
+		   : (bifs[i].proto.restr[j] == RES_RANGE ? "RES_RANGE"
+		      : (bifs[i].proto.restr[j] == RES_VALUES ? "RES_VALUES"
+			 : (bifs[i].proto.restr[j] == RES_VAR_RANGE
+			    ? "RES_VAR_RANGE" : "ERROR"))));
+	      fprintf (init_file,
+		       "  rs6000_builtin_info_x[RS6000_BIF_%s].restr[%d]"
+		       "\n    = %s;\n",
+		       bifs[i].idname, j, res);
+	      fprintf (init_file,
+		       "  rs6000_builtin_info_x[RS6000_BIF_%s].restr_val1[%d]"
+		       "\n    = %d;\n",
+		       bifs[i].idname, j, bifs[i].proto.restr_val1[j]);
+	      fprintf (init_file,
+		       "  rs6000_builtin_info_x[RS6000_BIF_%s].restr_val2[%d]"
+		       "\n    = %d;\n",
+		       bifs[i].idname, j, bifs[i].proto.restr_val2[j]);
+	    }
+	  fprintf (init_file, "\n");
+	}
+
+      fprintf (init_file,
+	       "  bifaddr = &rs6000_builtin_info_x[RS6000_BIF_%s];\n",
+	       bifs[i].idname);
+      fprintf (init_file,
+	       "  hash = rs6000_bif_hasher::hash (bifaddr);\n");
+      fprintf (init_file,
+	       "  slot = bif_hash.find_slot_with_hash (\n");
+      fprintf (init_file,
+	       "           \"%s\", hash, INSERT\n",
+	       bifs[i].proto.bifname);
+      fprintf (init_file,
+	       "         );\n");
+      fprintf (init_file,
+	       "  *slot = bifaddr;\n\n");
+
+      fprintf (init_file,
+	       "  if (new_builtins_are_live)\n");
+      fprintf (init_file, "    {\n");
+      fprintf (init_file,
+	       "      rs6000_builtin_decls[(int)RS6000_BIF_%s] = t\n",
+	       bifs[i].idname);
+      fprintf (init_file,
+	       "        = add_builtin_function (\"%s\",\n",
+	       bifs[i].proto.bifname);
+      fprintf (init_file,
+	       "                                %s,\n",
+	       bifs[i].fndecl);
+      fprintf (init_file,
+	       "                                (int)RS6000_BIF_%s,"
+	       " BUILT_IN_MD,\n",
+	       bifs[i].idname);
+      fprintf (init_file,
+	       "                                NULL, NULL_TREE);\n");
+      if (bifs[i].kind == FNK_CONST)
+	{
+	  fprintf (init_file, "      TREE_READONLY (t) = 1;\n");
+	  fprintf (init_file, "      TREE_NOTHROW (t) = 1;\n");
+	  attr_string = ", const";
+	}
+      else if (bifs[i].kind == FNK_PURE)
+	{
+	  fprintf (init_file, "      DECL_PURE_P (t) = 1;\n");
+	  fprintf (init_file, "      TREE_NOTHROW (t) = 1;\n");
+	  attr_string = ", pure";
+	}
+      else if (bifs[i].kind == FNK_FPMATH)
+	{
+	  fprintf (init_file, "      TREE_NOTHROW (t) = 1;\n");
+	  fprintf (init_file, "      if (flag_rounding_math)\n");
+	  fprintf (init_file, "        {\n");
+	  fprintf (init_file, "          DECL_PURE_P (t) = 1;\n");
+	  fprintf (init_file, "          DECL_IS_NOVOPS (t) = 1;\n");
+	  fprintf (init_file, "        }\n");
+	  attr_string = ", fp, const";
+	}
+      else
+	attr_string = "";
+
+      fprintf (init_file, "      if (TARGET_DEBUG_BUILTIN)\n");
+      fprintf (init_file, "        fprintf (stderr, \"rs6000_builtin"
+	       ", code = %4d, \"\n                  \"%s%s\\n\");\n",
+	       i, bifs[i].proto.bifname, attr_string);
+      fprintf (init_file, "    }\n\n");
+    }
 }
 
 /* Write code to initialize the overload table.  */
-- 
2.17.1

[PATCH 19/29] rs6000: Write output to the builtins init file, part 3 of 3

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-gen-builtins.c (typemap): New struct.
	(TYPE_MAP_SIZE): New defined constant.
	(type_map): New filescope variable; initialize.
	(map_token_to_type_node): New function.
	(write_type_node): New function.
	(write_fntype_init): Implement.
---
 gcc/config/rs6000/rs6000-gen-builtins.c | 116 ++++++++++++++++++++++++
 1 file changed, 116 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c b/gcc/config/rs6000/rs6000-gen-builtins.c
index 43d13b46a43..d2c029c0fb5 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.c
+++ b/gcc/config/rs6000/rs6000-gen-builtins.c
@@ -417,6 +417,60 @@ static rbt_strings bif_rbt;
 static rbt_strings ovld_rbt;
 static rbt_strings fntype_rbt;
 
+/* Mapping from type tokens to type node names.  */
+struct typemap
+{
+  const char *key;
+  const char *value;
+};
+
+/* This table must be kept in alphabetical order, as we use binary
+   search for table lookups in map_token_to_type_node.  The table
+   maps tokens from a fntype string to a tree type.  For example,
+   in "si_ftype_hi" we would map "si" to "intSI_type_node" and
+   map "hi" to "intHI_type_node".  */
+#define TYPE_MAP_SIZE 37
+static typemap type_map[TYPE_MAP_SIZE] =
+  {
+    { "bv16qi",	"bool_V16QI" },
+    { "bv2di",	"bool_V2DI" },
+    { "bv4si",	"bool_V4SI" },
+    { "bv8hi",	"bool_V8HI" },
+    { "dd",	"dfloat64" },
+    { "df",	"double" },
+    { "di",	"intDI" },
+    { "hi",	"intHI" },
+    { "if",	"ibm128_float" },
+    { "opaque", "opaque_V4SI" },
+    { "pv",	"ptr" },
+    { "qi",	"intQI" },
+    { "sd",	"dfloat32" },
+    { "sf",	"float" },
+    { "si",	"intSI" },
+    { "td",	"dfloat128" },
+    { "tf",	"long_double" },
+    { "ti",	"intTI" },
+    { "udi",	"unsigned_intDI" },
+    { "uhi",	"unsigned_intHI" },
+    { "uqi",	"unsigned_intQI" },
+    { "usi",	"unsigned_intSI" },
+    { "uti",	"unsigned_intTI" },
+    { "uv16qi",	"unsigned_V16QI" },
+    { "uv1ti",	"unsigned_V1TI" },
+    { "uv2di",	"unsigned_V2DI" },
+    { "uv4si",	"unsigned_V4SI" },
+    { "uv8hi",	"unsigned_V8HI" },
+    { "v",	"void" },
+    { "v16qi",	"V16QI" },
+    { "v1ti",	"V1TI" },
+    { "v2df",	"V2DF" },
+    { "v2di",	"V2DI" },
+    { "v4sf",	"V4SF" },
+    { "v4si",	"V4SI" },
+    { "v8hi",	"V8HI" },
+    { "vp8hi",	"pixel_V8HI" },
+  };
+
 /* Pointer to a diagnostic function.  */
 void (*diag) (const char *, ...) __attribute__ ((format (printf, 1, 2)))
   = NULL;
@@ -2061,10 +2115,72 @@ write_fntype (char *str)
   fprintf (init_file, "tree %s;\n", str);
 }
 
+/* Look up TOK in the type map and return the corresponding string used
+   to build the type node.  */
+static const char *
+map_token_to_type_node (char *tok)
+{
+  int low = 0;
+  int high = TYPE_MAP_SIZE - 1;
+  int mid = (low + high) >> 1;
+  int cmp;
+
+  while ((cmp = strcmp (type_map[mid].key, tok)) && low < high)
+    {
+      if (cmp < 0)
+	low = (low == mid ? mid + 1 : mid);
+      else
+	high = (high == mid ? mid - 1: mid);
+      mid = (low + high) >> 1;
+    }
+
+  if (low > high)
+    {
+      (*diag) ("token '%s' doesn't appear in the type map!\n", tok);
+      exit (EC_INTERR);
+    }
+
+  return type_map[mid].value;
+}
+
+/* Write the type node corresponding to TOK.  */
+static void
+write_type_node (char *tok)
+{
+  const char *str = map_token_to_type_node (tok);
+  fprintf (init_file, "%s_type_node", str);
+}
+
 /* Write an initializer for a function type identified by STR.  */
 void
 write_fntype_init (char *str)
 {
+  char *tok;
+
+  /* Avoid side effects of strtok on the original string by using a copy.  */
+  char *buf = (char *) malloc (strlen (str) + 1);
+  strcpy (buf, str);
+
+  fprintf (init_file, "  %s\n    = build_function_type_list (", buf);
+  tok = strtok (buf, "_");
+  write_type_node (tok);
+  tok = strtok (0, "_");
+  assert (tok);
+  assert (!strcmp (tok, "ftype"));
+
+  tok = strtok (0, "_");
+  if (tok)
+    fprintf (init_file, ",\n\t\t\t\t");
+
+  /* Note:  A function with no arguments ends with '_ftype_v'.  */
+  while (tok && strcmp (tok, "v"))
+    {
+      write_type_node (tok);
+      tok = strtok (0, "_");
+      fprintf (init_file, ",\n\t\t\t\t");
+    }
+  fprintf (init_file, "NULL_TREE);\n");
+  free (buf);
 }
 
 /* Write everything to the header file (rs6000-builtins.h).  */
-- 
2.17.1

[PATCH 20/29] rs6000: Incorporate new builtins code into the build machinery

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config.gcc (powerpc*-*-*): Add rs6000-builtins.o to extra_objs.
	* config/rs6000/t-rs6000 (rs6000-gen-builtins.o): New target.
	(rbtree.o): Likewise.
	(rs6000-gen-builtins): Likewise.
	(rs6000-builtins.c): Likewise.
	(rs6000-builtins.o): Likewise.
	(rs6000-call.o): Add dependency on rs6000-builtins.c.
---
 gcc/config.gcc             |  3 ++-
 gcc/config/rs6000/t-rs6000 | 25 ++++++++++++++++++++++++-
 2 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 30b51c3dc81..b6aa0c2d15d 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -505,7 +505,8 @@ or1k*-*-*)
 	;;
 powerpc*-*-*)
 	cpu_type=rs6000
-	extra_objs="rs6000-string.o rs6000-p8swap.o rs6000-logue.o rs6000-call.o"
+	extra_objs="rs6000-string.o rs6000-p8swap.o rs6000-logue.o"
+	extra_objs="${extra_objs} rs6000-call.o rs6000-builtins.o"
 	extra_headers="ppc-asm.h altivec.h htmintrin.h htmxlintrin.h"
 	extra_headers="${extra_headers} bmi2intrin.h bmiintrin.h"
 	extra_headers="${extra_headers} xmmintrin.h mm_malloc.h emmintrin.h"
diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000
index 1ddb5729cb2..6053721f76c 100644
--- a/gcc/config/rs6000/t-rs6000
+++ b/gcc/config/rs6000/t-rs6000
@@ -43,7 +43,30 @@ rs6000-logue.o: $(srcdir)/config/rs6000/rs6000-logue.c
 	$(COMPILE) $<
 	$(POSTCOMPILE)
 
-rs6000-call.o: $(srcdir)/config/rs6000/rs6000-call.c
+rs6000-gen-builtins.o: $(srcdir)/config/rs6000/rs6000-gen-builtins.c
+	$(COMPILE) $<
+	$(POSTCOMPILE)
+
+rbtree.o: $(srcdir)/config/rs6000/rbtree.c
+	$(COMPILE) $<
+	$(POSTCOMPILE)
+
+rs6000-gen-builtins: rs6000-gen-builtins.o rbtree.o
+	+$(LINKER_FOR_BUILD) $(BUILD_LINKERFLAGS) $(BUILD_LDFLAGS) -o $@ \
+	    $(filter-out $(BUILD_LIBDEPS), $^) $(BUILD_LIBS)
+
+rs6000-builtins.c: rs6000-gen-builtins \
+		   $(srcdir)/config/rs6000/rs6000-builtin-new.def \
+		   $(srcdir)/config/rs6000/rs6000-overload.def
+	./rs6000-gen-builtins $(srcdir)/config/rs6000/rs6000-builtin-new.def \
+		$(srcdir)/config/rs6000/rs6000-overload.def rs6000-builtins.h \
+		rs6000-builtins.c rs6000-vecdefines.h
+
+rs6000-builtins.o: rs6000-builtins.c
+	$(COMPILE) $<
+	$(POSTCOMPILE)
+
+rs6000-call.o: $(srcdir)/config/rs6000/rs6000-call.c rs6000-builtins.c
 	$(COMPILE) $<
 	$(POSTCOMPILE)
 
-- 
2.17.1

[PATCH 21/29] rs6000: Add remaining AltiVec builtins

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-builtin-new.def: Add remaining AltiVec
	builtins.
---
 gcc/config/rs6000/rs6000-builtin-new.def | 843 +++++++++++++++++++++++
 1 file changed, 843 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 5fc7e1301c3..0b79f155389 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -177,3 +177,846 @@
   const vss __builtin_altivec_abs_v8hi (vss);
     ABS_V8HI absv8hi2 {}
 
+  const vsc __builtin_altivec_abss_v16qi (vsc);
+    ABSS_V16QI altivec_abss_v16qi {}
+
+  const vsi __builtin_altivec_abss_v4si (vsi);
+    ABSS_V4SI altivec_abss_v4si {}
+
+  const vss __builtin_altivec_abss_v8hi (vss);
+    ABSS_V8HI altivec_abss_v8hi {}
+
+  const vf __builtin_altivec_copysignfp (vf, vf);
+    COPYSIGN_V4SF vector_copysignv4sf3 {}
+
+  void __builtin_altivec_dss (const int<2>);
+    DSS altivec_dss {}
+
+  void __builtin_altivec_dssall ();
+    DSSALL altivec_dssall {}
+
+  void __builtin_altivec_dst (void *, const int, const int<2>);
+    DST altivec_dst {}
+
+  void __builtin_altivec_dstst (void *, const int, const int<2>);
+    DSTST altivec_dstst {}
+
+  void __builtin_altivec_dststt (void *, const int, const int<2>);
+    DSTSTT altivec_dststt {}
+
+  void __builtin_altivec_dstt (void *, const int, const int<2>);
+    DSTT altivec_dstt {}
+
+  fpmath vsi __builtin_altivec_fix_sfsi (vf);
+    FIX_V4SF_V4SI fix_truncv4sfv4si2 {}
+
+  fpmath vui __builtin_altivec_fixuns_sfsi (vf);
+    FIXUNS_V4SF_V4SI fixuns_truncv4sfv4si2 {}
+
+  fpmath vf __builtin_altivec_float_sisf (vsi);
+    FLOAT_V4SI_V4SF floatv4siv4sf2 {}
+
+  pure vop __builtin_altivec_lvebx (signed long long, void *);
+    LVEBX altivec_lvebx {ldvec}
+
+  pure vop __builtin_altivec_lvehx (signed long long, void *);
+    LVEHX altivec_lvehx {ldvec}
+
+  pure vop __builtin_altivec_lvewx (signed long long, void *);
+    LVEWX altivec_lvewx {ldvec}
+
+  pure vop __builtin_altivec_lvlx (signed long long, void *);
+    LVLX altivec_lvlx {ldvec}
+
+  pure vop __builtin_altivec_lvlxl (signed long long, void *);
+    LVLXL altivec_lvlxl {ldvec}
+
+  pure vop __builtin_altivec_lvrx (signed long long, void *);
+    LVRX altivec_lvrx {ldvec}
+
+  pure vop __builtin_altivec_lvrxl (signed long long, void *);
+    LVRXL altivec_lvrxl {ldvec}
+
+  pure vuc __builtin_altivec_lvsl (signed long long, void *);
+    LVSL altivec_lvsl {ldvec}
+
+  pure vuc __builtin_altivec_lvsr (signed long long, void *);
+    LVSR altivec_lvsr {ldvec}
+
+; Following LVX one is redundant, and I don't think we need to
+; keep it.  It only maps to LVX_V4SI.  Probably remove.
+  pure vop __builtin_altivec_lvx (signed long long, void *);
+    LVX altivec_lvx_v4si {ldvec}
+
+  pure vsc __builtin_altivec_lvx_v16qi (signed long long, void *);
+    LVX_V16QI altivec_lvx_v16qi {ldvec}
+
+  pure vf __builtin_altivec_lvx_v4sf (signed long long, void *);
+    LVX_V4SF altivec_lvx_v4sf {ldvec}
+
+  pure vsi __builtin_altivec_lvx_v4si (signed long long, void *);
+    LVX_V4SI altivec_lvx_v4si {ldvec}
+
+  pure vss __builtin_altivec_lvx_v8hi (signed long long, void *);
+    LVX_V8HI altivec_lvx_v8hi {ldvec}
+
+  pure vsi __builtin_altivec_lvxl (signed long long, signed int *);
+    LVXL altivec_lvxl_v4si {ldvec}
+
+  pure vsc __builtin_altivec_lvxl_v16qi (signed long long, void *);
+    LVXL_V16QI altivec_lvxl_v16qi {ldvec}
+
+  pure vf __builtin_altivec_lvxl_v4sf (signed long long, void *);
+    LVXL_V4SF altivec_lvxl_v4sf {ldvec}
+
+  pure vsi __builtin_altivec_lvxl_v4si (signed long long, void *);
+    LVXL_V4SI altivec_lvxl_v4si {ldvec}
+
+  pure vss __builtin_altivec_lvxl_v8hi (signed long long, void *);
+    LVXL_V8HI altivec_lvxl_v8hi {ldvec}
+
+  vuc __builtin_altivec_mask_for_load (long long, void *);
+    MASK_FOR_LOAD altivec_lvsr_direct {ldstmask}
+
+  vuc __builtin_altivec_mask_for_store (long long, void *);
+    MASK_FOR_STORE altivec_lvsr_direct {ldstmask}
+
+  vus __builtin_altivec_mfvscr ();
+    MFVSCR altivec_mfvscr {}
+
+  void __builtin_altivec_mtvscr (vop);
+    MTVSCR altivec_mtvscr {}
+
+  const vsc __builtin_altivec_nabs_v16qi (vsc);
+    NABS_V16QI nabsv16qi2 {}
+
+  const vf __builtin_altivec_nabs_v4sf (vf);
+    NABS_V4SF vsx_nabsv4sf2 {}
+
+  const vsi __builtin_altivec_nabs_v4si (vsi);
+    NABS_V4SI nabsv4si2 {}
+
+  const vss __builtin_altivec_nabs_v8hi (vss);
+    NABS_V8HI nabsv8hi2 {}
+
+  void __builtin_altivec_stvebx (vuc, signed long long, void *);
+    STVEBX altivec_stvebx {stvec}
+
+  void __builtin_altivec_stvehx (vss, signed long long, void *);
+    STVEHX_VSS altivec_stvehx {stvec}
+
+  void __builtin_altivec_stvewx (vsi, signed long long, void *);
+    STVEWX altivec_stvewx {stvec}
+
+  void __builtin_altivec_stvlx (vop, signed long long, void *);
+    STVLX altivec_stvlx {stvec}
+
+  void __builtin_altivec_stvlxl (vop, signed long long, void *);
+    STVLXL altivec_stvlxl {stvec}
+
+  void __builtin_altivec_stvrx (vop, signed long long, void *);
+    STVRX altivec_stvrx {stvec}
+
+  void __builtin_altivec_stvrxl (vop, signed long long, void *);
+    STVRXL altivec_stvrxl {stvec}
+
+; Skipping the STVX one that maps to STVX_V4SI (see above for LVX)
+
+  void __builtin_altivec_stvx_v16qi (vsc, signed long long, void *);
+    STVX_V16QI altivec_stvx_v16qi {stvec}
+
+  void __builtin_altivec_stvx_v4sf (vf, signed long long, void *);
+    STVX_V4SF altivec_stvx_v4sf {stvec}
+
+  void __builtin_altivec_stvx_v4si (vsi, signed long long, void *);
+    STVX_V4SI altivec_stvx_v4si {stvec}
+
+  void __builtin_altivec_stvx_v8hi (vss, signed long long, void *);
+    STVX_V8HI altivec_stvx_v8hi {stvec}
+
+; Skipping the STVXL one that maps to STVXL_V4SI (see above for LVX)
+
+  void __builtin_altivec_stvxl_v16qi (vsc, signed long long, void *);
+    STVXL_V16QI altivec_stvxl_v16qi {stvec}
+
+  void __builtin_altivec_stvxl_v4sf (vf, signed long long, void *);
+    STVXL_V4SF altivec_stvxl_v4sf {stvec}
+
+  void __builtin_altivec_stvxl_v4si (vsi, signed long long, void *);
+    STVXL_V4SI altivec_stvxl_v4si {stvec}
+
+  void __builtin_altivec_stvxl_v8hi (vss, signed long long, void *);
+    STVXL_V8HI altivec_stvxl_v8hi {stvec}
+
+  fpmath vf __builtin_altivec_uns_float_sisf (vui);
+    UNSFLOAT_V4SI_V4SF floatunsv4siv4sf2 {}
+
+  const vui __builtin_altivec_vaddcuw (vui, vui);
+    VADDCUW altivec_vaddcuw {}
+
+  const vf __builtin_altivec_vaddfp (vf, vf);
+    VADDFP addv4sf3 {}
+
+  const vsc __builtin_altivec_vaddsbs (vsc, vsc);
+    VADDSBS altivec_vaddsbs {}
+
+  const vss __builtin_altivec_vaddshs (vss, vss);
+    VADDSHS altivec_vaddshs {}
+
+  const vsi __builtin_altivec_vaddsws (vsi, vsi);
+    VADDSWS altivec_vaddsws {}
+
+  const vuc __builtin_altivec_vaddubm (vuc, vuc);
+    VADDUBM addv16qi3 {}
+
+  const vuc __builtin_altivec_vaddubs (vuc, vuc);
+    VADDUBS altivec_vaddubs {}
+
+  const vus __builtin_altivec_vadduhm (vus, vus);
+    VADDUHM addv8hi3 {}
+
+  const vus __builtin_altivec_vadduhs (vus, vus);
+    VADDUHS altivec_vadduhs {}
+
+  const vui __builtin_altivec_vadduwm (vui, vui);
+    VADDUWM addv4si3 {}
+
+  const vui __builtin_altivec_vadduws (vui, vui);
+    VADDUWS altivec_vadduws {}
+
+  const vsc __builtin_altivec_vand_v16qi (vsc, vsc);
+    VAND_V16QI andv16qi3 {}
+
+  const vuc __builtin_altivec_vand_v16qi_uns (vuc, vuc);
+    VAND_V16QI_UNS andv16qi3 {}
+
+  const vf __builtin_altivec_vand_v4sf (vf, vf);
+    VAND_V4SF andv4sf3 {}
+
+  const vsi __builtin_altivec_vand_v4si (vsi, vsi);
+    VAND_V4SI andv4si3 {}
+
+  const vui __builtin_altivec_vand_v4si_uns (vui, vui);
+    VAND_V4SI_UNS andv4si3 {}
+
+  const vss __builtin_altivec_vand_v8hi (vss, vss);
+    VAND_V8HI andv8hi3 {}
+
+  const vus __builtin_altivec_vand_v8hi_uns (vus, vus);
+    VAND_V8HI_UNS andv8hi3 {}
+
+  const vsc __builtin_altivec_vandc_v16qi (vsc, vsc);
+    VANDC_V16QI andcv16qi3 {}
+
+  const vuc __builtin_altivec_vandc_v16qi_uns (vuc, vuc);
+    VANDC_V16QI_UNS andcv16qi3 {}
+
+  const vf __builtin_altivec_vandc_v4sf (vf, vf);
+    VANDC_V4SF andcv4sf3 {}
+
+  const vsi __builtin_altivec_vandc_v4si (vsi, vsi);
+    VANDC_V4SI andcv4si3 {}
+
+  const vui __builtin_altivec_vandc_v4si_uns (vui, vui);
+    VANDC_V4SI_UNS andcv4si3 {}
+
+  const vss __builtin_altivec_vandc_v8hi (vss, vss);
+    VANDC_V8HI andcv8hi3 {}
+
+  const vus __builtin_altivec_vandc_v8hi_uns (vus, vus);
+    VANDC_V8HI_UNS andcv8hi3 {}
+
+  const vsc __builtin_altivec_vavgsb (vsc, vsc);
+    VAVGSB avgv16qi3_ceil {}
+
+  const vss __builtin_altivec_vavgsh (vss, vss);
+    VAVGSH avgv8hi3_ceil {}
+
+  const vsi __builtin_altivec_vavgsw (vsi, vsi);
+    VAVGSW avgv4si3_ceil {}
+
+  const vuc __builtin_altivec_vavgub (vuc, vuc);
+    VAVGUB uavgv16qi3_ceil {}
+
+  const vus __builtin_altivec_vavguh (vus, vus);
+    VAVGUH uavgv8hi3_ceil {}
+
+  const vui __builtin_altivec_vavguw (vui, vui);
+    VAVGUW uavgv4si3_ceil {}
+
+  const vf __builtin_altivec_vcfsx (vsi, const int<5>);
+    VCFSX altivec_vcfsx {}
+
+  const vf __builtin_altivec_vcfux (vui, const int<5>);
+    VCFUX altivec_vcfux {}
+
+  const vsi __builtin_altivec_vcmpbfp (vf, vf);
+    VCMPBFP altivec_vcmpbfp {}
+
+  const int __builtin_altivec_vcmpbfp_p (int, vf, vf);
+    VCMPBFP_P altivec_vcmpbfp_p {pred}
+
+  const vbi __builtin_altivec_vcmpeqfp (vf, vf);
+    VCMPEQFP vector_eqv4sf {}
+
+  const int __builtin_altivec_vcmpeqfp_p (int, vf, vf);
+    VCMPEQFP_P vector_eq_v4sf_p {pred}
+
+  const vbc __builtin_altivec_vcmpequb (vuc, vuc);
+    VCMPEQUB vector_eqv16qi {}
+
+  const int __builtin_altivec_vcmpequb_p (int, vuc, vuc);
+    VCMPEQUB_P vector_eq_v16qi_p {pred}
+
+  const vbs __builtin_altivec_vcmpequh (vus, vus);
+    VCMPEQUH vector_eqv8hi {}
+
+  const int __builtin_altivec_vcmpequh_p (int, vus, vus);
+    VCMPEQUH_P vector_eq_v8hi_p {pred}
+
+  const vbi __builtin_altivec_vcmpequw (vui, vui);
+    VCMPEQUW vector_eqv4si {}
+
+  const int __builtin_altivec_vcmpequw_p (int, vui, vui);
+    VCMPEQUW_P vector_eq_v4si_p {pred}
+
+  const vbi __builtin_altivec_vcmpgefp (vf, vf);
+    VCMPGEFP vector_gev4sf {}
+
+  const int __builtin_altivec_vcmpgefp_p (int, vf, vf);
+    VCMPGEFP_P vector_ge_v4sf_p {pred}
+
+  const vbi __builtin_altivec_vcmpgtfp (vf, vf);
+    VCMPGTFP vector_gtv4sf {}
+
+  const int __builtin_altivec_vcmpgtfp_p (int, vf, vf);
+    VCMPGTFP_P vector_gt_v4sf_p {pred}
+
+  const vbc __builtin_altivec_vcmpgtsb (vsc, vsc);
+    VCMPGTSB vector_gtv16qi {}
+
+  const int __builtin_altivec_vcmpgtsb_p (int, vsc, vsc);
+    VCMPGTSB_P vector_gt_v16qi_p {pred}
+
+  const vbs __builtin_altivec_vcmpgtsh (vss, vss);
+    VCMPGTSH vector_gtv8hi {}
+
+  const int __builtin_altivec_vcmpgtsh_p (int, vss, vss);
+    VCMPGTSH_P vector_gt_v8hi_p {pred}
+
+  const vbi __builtin_altivec_vcmpgtsw (vsi, vsi);
+    VCMPGTSW vector_gtv4si {}
+
+  const int __builtin_altivec_vcmpgtsw_p (int, vsi, vsi);
+    VCMPGTSW_P vector_gt_v4si_p {pred}
+
+  const vbc __builtin_altivec_vcmpgtub (vuc, vuc);
+    VCMPGTUB vector_gtuv16qi {}
+
+  const int __builtin_altivec_vcmpgtub_p (int, vuc, vuc);
+    VCMPGTUB_P vector_gtu_v16qi_p {pred}
+
+  const vbs __builtin_altivec_vcmpgtuh (vus, vus);
+    VCMPGTUH vector_gtuv8hi {}
+
+  const int __builtin_altivec_vcmpgtuh_p (int, vus, vus);
+    VCMPGTUH_P vector_gtu_v8hi_p {pred}
+
+  const vbi __builtin_altivec_vcmpgtuw (vui, vui);
+    VCMPGTUW vector_gtuv4si {}
+
+  const int __builtin_altivec_vcmpgtuw_p (int, vui, vui);
+    VCMPGTUW_P vector_gtu_v4si_p {pred}
+
+  const vsi __builtin_altivec_vctsxs (vf, const int<5>);
+    VCTSXS altivec_vctsxs {}
+
+  const vui __builtin_altivec_vctuxs (vf, const int<5>);
+    VCTUXS altivec_vctuxs {}
+
+  fpmath vf __builtin_altivec_vexptefp (vf);
+    VEXPTEFP altivec_vexptefp {}
+
+  fpmath vf __builtin_altivec_vlogefp (vf);
+    VLOGEFP altivec_vlogefp {}
+
+  fpmath vf __builtin_altivec_vmaddfp (vf, vf, vf);
+    VMADDFP fmav4sf4 {}
+
+  const vf __builtin_altivec_vmaxfp (vf, vf);
+    VMAXFP smaxv4sf3 {}
+
+  const vsc __builtin_altivec_vmaxsb (vsc, vsc);
+    VMAXSB smaxv16qi3 {}
+
+  const vuc __builtin_altivec_vmaxub (vuc, vuc);
+    VMAXUB umaxv16qi3 {}
+
+  const vss __builtin_altivec_vmaxsh (vss, vss);
+    VMAXSH smaxv8hi3 {}
+
+  const vsi __builtin_altivec_vmaxsw (vsi, vsi);
+    VMAXSW smaxv4si3 {}
+
+  const vus __builtin_altivec_vmaxuh (vus, vus);
+    VMAXUH umaxv8hi3 {}
+
+  const vui __builtin_altivec_vmaxuw (vui, vui);
+    VMAXUW umaxv4si3 {}
+
+  vss __builtin_altivec_vmhaddshs (vss, vss, vss);
+    VMHADDSHS altivec_vmhaddshs {}
+
+  vss __builtin_altivec_vmhraddshs (vss, vss, vss);
+    VMHRADDSHS altivec_vmhraddshs {}
+
+  const vf __builtin_altivec_vminfp (vf, vf);
+    VMINFP sminv4sf3 {}
+
+  const vsc __builtin_altivec_vminsb (vsc, vsc);
+    VMINSB sminv16qi3 {}
+
+  const vss __builtin_altivec_vminsh (vss, vss);
+    VMINSH sminv8hi3 {}
+
+  const vsi __builtin_altivec_vminsw (vsi, vsi);
+    VMINSW sminv4si3 {}
+
+  const vuc __builtin_altivec_vminub (vuc, vuc);
+    VMINUB uminv16qi3 {}
+
+  const vus __builtin_altivec_vminuh (vus, vus);
+    VMINUH uminv8hi3 {}
+
+  const vui __builtin_altivec_vminuw (vui, vui);
+    VMINUW uminv4si3 {}
+
+  const vss __builtin_altivec_vmladduhm (vss, vss, vss);
+    VMLADDUHM fmav8hi4 {}
+
+  const vsc __builtin_altivec_vmrghb (vsc, vsc);
+    VMRGHB altivec_vmrghb {}
+
+  const vss __builtin_altivec_vmrghh (vss, vss);
+    VMRGHH altivec_vmrghh {}
+
+  const vsi __builtin_altivec_vmrghw (vsi, vsi);
+    VMRGHW altivec_vmrghw {}
+
+  const vsc __builtin_altivec_vmrglb (vsc, vsc);
+    VMRGLB altivec_vmrglb {}
+
+  const vss __builtin_altivec_vmrglh (vss, vss);
+    VMRGLH altivec_vmrglh {}
+
+  const vsi __builtin_altivec_vmrglw (vsi, vsi);
+    VMRGLW altivec_vmrglw {}
+
+  const vsi __builtin_altivec_vmsummbm (vsc, vuc, vsi);
+    VMSUMMBM altivec_vmsummbm {}
+
+  const vsi __builtin_altivec_vmsumshm (vss, vss, vsi);
+    VMSUMSHM altivec_vmsumshm {}
+
+  vsi __builtin_altivec_vmsumshs (vss, vss, vsi);
+    VMSUMSHS altivec_vmsumshs {}
+
+  const vui __builtin_altivec_vmsumubm (vuc, vuc, vui);
+    VMSUMUBM altivec_vmsumubm {}
+
+  const vui __builtin_altivec_vmsumuhm (vus, vus, vui);
+    VMSUMUHM altivec_vmsumuhm {}
+
+  vui __builtin_altivec_vmsumuhs (vus, vus, vui);
+    VMSUMUHS altivec_vmsumuhs {}
+
+  const vss __builtin_altivec_vmulesb (vsc, vsc);
+    VMULESB vec_widen_smult_even_v16qi {}
+
+  const vsi __builtin_altivec_vmulesh (vss, vss);
+    VMULESH vec_widen_smult_even_v8hi {}
+
+  const vus __builtin_altivec_vmuleub (vuc, vuc);
+    VMULEUB vec_widen_umult_even_v16qi {}
+
+  const vui __builtin_altivec_vmuleuh (vus, vus);
+    VMULEUH vec_widen_umult_even_v8hi {}
+
+  const vss __builtin_altivec_vmulosb (vsc, vsc);
+    VMULOSB vec_widen_smult_odd_v16qi {}
+
+  const vus __builtin_altivec_vmuloub (vuc, vuc);
+    VMULOUB vec_widen_umult_odd_v16qi {}
+
+  const vsi __builtin_altivec_vmulosh (vss, vss);
+    VMULOSH vec_widen_smult_odd_v8hi {}
+
+  const vui __builtin_altivec_vmulouh (vus, vus);
+    VMULOUH vec_widen_umult_odd_v8hi {}
+
+  fpmath vf __builtin_altivec_vnmsubfp (vf, vf, vf);
+    VNMSUBFP nfmsv4sf4 {}
+
+  const vsc __builtin_altivec_vnor_v16qi (vsc, vsc);
+    VNOR_V16QIS norv16qi3 {}
+
+  const vuc __builtin_altivec_vnor_v16qi_uns (vuc, vuc);
+    VNOR_V16QI_UNS norv16qi3 {}
+
+  const vf __builtin_altivec_vnor_v4sf (vf, vf);
+    VNOR_V4SF norv4sf3 {}
+
+  const vsi __builtin_altivec_vnor_v4si (vsi, vsi);
+    VNOR_V4SI norv4si3 {}
+
+  const vui __builtin_altivec_vnor_v4si_uns (vui, vui);
+    VNOR_V4SI_UNS norv4si3 {}
+
+  const vss __builtin_altivec_vnor_v8hi (vss, vss);
+    VNOR_V8HI norv8hi3 {}
+
+  const vus __builtin_altivec_vnor_v8hi_uns (vus, vus);
+    VNOR_V8HI_UNS norv8hi3 {}
+
+  const vsc __builtin_altivec_vor_v16qi (vsc, vsc);
+    VOR_V16QI iorv16qi3 {}
+
+  const vuc __builtin_altivec_vor_v16qi_uns (vuc, vuc);
+    VOR_V16QI_UNS iorv16qi3 {}
+
+  const vf __builtin_altivec_vor_v4sf (vf, vf);
+    VOR_V4SF iorv4sf3 {}
+
+  const vsi __builtin_altivec_vor_v4si (vsi, vsi);
+    VOR_V4SI iorv4si3 {}
+
+  const vui __builtin_altivec_vor_v4si_uns (vui, vui);
+    VOR_V4SI_UNS iorv4si3 {}
+
+  const vss __builtin_altivec_vor_v8hi (vss, vss);
+    VOR_V8HI iorv8hi3 {}
+
+  const vus __builtin_altivec_vor_v8hi_uns (vus, vus);
+    VOR_V8HI_UNS iorv8hi3 {}
+
+  const vsc __builtin_altivec_vperm_16qi (vsc, vsc, vuc);
+    VPERM_16QI altivec_vperm_v16qi {}
+
+  const vuc __builtin_altivec_vperm_16qi_uns (vuc, vuc, vuc);
+    VPERM_16QI_UNS altivec_vperm_v16qi_uns {}
+
+  const vsq __builtin_altivec_vperm_1ti (vsq, vsq, vuc);
+    VPERM_1TI altivec_vperm_v1ti {}
+
+  const vuq __builtin_altivec_vperm_1ti_uns (vuq, vuq, vuc);
+    VPERM_1TI_UNS altivec_vperm_v1ti_uns {}
+
+  const vf __builtin_altivec_vperm_4sf (vf, vf, vuc);
+    VPERM_4SF altivec_vperm_v4sf {}
+
+  const vsi __builtin_altivec_vperm_4si (vsi, vsi, vuc);
+    VPERM_4SI altivec_vperm_v4si {}
+
+  const vui __builtin_altivec_vperm_4si_uns (vui, vui, vuc);
+    VPERM_4SI_UNS altivec_vperm_v4si_uns {}
+
+  const vss __builtin_altivec_vperm_8hi (vss, vss, vuc);
+    VPERM_8HI altivec_vperm_v8hi {}
+
+  const vus __builtin_altivec_vperm_8hi_uns (vus, vus, vuc);
+    VPERM_8HI_UNS altivec_vperm_v8hi_uns {}
+
+  const vp __builtin_altivec_vpkpx (vui, vui);
+    VPKPX altivec_vpkpx {}
+
+  const vsc __builtin_altivec_vpkshss (vss, vss);
+    VPKSHSS altivec_vpkshss {}
+
+  const vuc __builtin_altivec_vpkshus (vss, vss);
+    VPKSHUS altivec_vpkshus {}
+
+  const vsi __builtin_altivec_vpkswss (vsi, vsi);
+    VPKSWSS altivec_vpkswss {}
+
+  const vus __builtin_altivec_vpkswus (vsi, vsi);
+    VPKSWUS altivec_vpkswus {}
+
+  const vuc __builtin_altivec_vpkuhum (vus, vus);
+    VPKUHUM altivec_vpkuhum {}
+
+  const vuc __builtin_altivec_vpkuhus (vus, vus);
+    VPKUHUS altivec_vpkuhus {}
+
+  const vus __builtin_altivec_vpkuwum (vui, vui);
+    VPKUWUM altivec_vpkuwum {}
+
+  const vus __builtin_altivec_vpkuwus (vui, vui);
+    VPKUWUS altivec_vpkuwus {}
+
+  const vf __builtin_altivec_vrecipdivfp (vf, vf);
+    VRECIPFP recipv4sf3 {}
+
+  fpmath vf __builtin_altivec_vrefp (vf);
+    VREFP rev4sf2 {}
+
+  const vsc __builtin_altivec_vreve_v16qi (vsc);
+    VREVE_V16QI altivec_vrevev16qi2 {}
+
+  const vf __builtin_altivec_vreve_v4sf (vf);
+    VREVE_V4SF altivec_vrevev4sf2 {}
+
+  const vsi __builtin_altivec_vreve_v4si (vsi);
+    VREVE_V4SI altivec_vrevev4si2 {}
+
+  const vss __builtin_altivec_vreve_v8hi (vss);
+    VREVE_V8HI altivec_vrevev8hi2 {}
+
+  fpmath vf __builtin_altivec_vrfim (vf);
+    VRFIM vector_floorv4sf2 {}
+
+  fpmath vf __builtin_altivec_vrfin (vf);
+    VRFIN altivec_vrfin {}
+
+  fpmath vf __builtin_altivec_vrfip (vf);
+    VRFIP vector_ceilv4sf2 {}
+
+  fpmath vf __builtin_altivec_vrfiz (vf);
+    VRFIZ vector_btruncv4sf2 {}
+
+  const vsc __builtin_altivec_vrlb (vsc, vsc);
+    VRLB vrotlv16qi3 {}
+
+  const vss __builtin_altivec_vrlh (vss, vss);
+    VRLH vrotlv8hi3 {}
+
+  const vsi __builtin_altivec_vrlw (vsi, vsi);
+    VRLW vrotlv4si3 {}
+
+  fpmath vf __builtin_altivec_vrsqrtefp (vf);
+    VRSQRTEFP rsqrtev4sf2 {}
+
+  fpmath vf __builtin_altivec_vrsqrtfp (vf);
+    VRSQRTFP rsqrtv4sf2 {}
+
+  const vsc __builtin_altivec_vsel_16qi (vsc, vsc, vuc);
+    VSEL_16QI vector_select_v16qi {}
+
+  const vuc __builtin_altivec_vsel_16qi_uns (vuc, vuc, vuc);
+    VSEL_16QI_UNS vector_select_v16qi_uns {}
+
+  const vsq __builtin_altivec_vsel_1ti (vsq, vsq, vuq);
+    VSEL_1TI vector_select_v1ti {}
+
+  const vuq __builtin_altivec_vsel_1ti_uns (vuq, vuq, vuq);
+    VSEL_1TI_UNS vector_select_v1ti_uns {}
+
+  const vf __builtin_altivec_vsel_4sf (vf, vf, vui);
+    VSEL_4SF vector_select_v4sf {}
+
+  const vsi __builtin_altivec_vsel_4si (vsi, vsi, vui);
+    VSEL_4SI vector_select_v4si {}
+
+  const vui __builtin_altivec_vsel_4si_uns (vui, vui, vui);
+    VSEL_4SI_UNS vector_select_v4si_uns {}
+
+  const vss __builtin_altivec_vsel_8hi (vss, vss, vus);
+    VSEL_8HI vector_select_v8hi {}
+
+  const vus __builtin_altivec_vsel_8hi_uns (vus, vus, vus);
+    VSEL_8HI_UNS vector_select_v8hi_uns {}
+
+  const vop __builtin_altivec_vsl (vop, vuc);
+    VSL altivec_vsl {}
+
+  const vsc __builtin_altivec_vslb (vsc, vuc);
+    VSLB vashlv16qi3 {}
+
+  const vsc __builtin_altivec_vsldoi_16qi (vsc, vsc, const int<4>);
+    VSLDOI_16QI altivec_vsldoi_v16qi {}
+
+  const vf __builtin_altivec_vsldoi_4sf (vf, vf, const int<4>);
+    VSLDOI_4SF altivec_vsldoi_v4sf {}
+
+  const vsi __builtin_altivec_vsldoi_4si (vsi, vsi, const int<4>);
+    VSLDOI_4SI altivec_vsldoi_v4si {}
+
+  const vss __builtin_altivec_vsldoi_8hi (vss, vss, const int<4>);
+    VSLDOI_8HI altivec_vsldoi_v8hi {}
+
+  const vss __builtin_altivec_vslh (vss, vus);
+    VSLH vashlv8hi3 {}
+
+  const vop __builtin_altivec_vslo (vop, vop);
+    VSLO altivec_vslo {}
+
+  const vsi __builtin_altivec_vslw (vsi, vui);
+    VSLW vashlv4si3 {}
+
+  const vsc __builtin_altivec_vspltb (vsc, const int<4>);
+    VSPLTB altivec_vspltb {}
+
+  const vss __builtin_altivec_vsplth (vss, const int<3>);
+    VSPLTH altivec_vsplth {}
+
+  const vsc __builtin_altivec_vspltisb (const int<-16,15>);
+    VSPLTISB altivec_vspltisb {}
+
+  const vss __builtin_altivec_vspltish (const int<-16,15>);
+    VSPLTISH altivec_vspltish {}
+
+  const vsi __builtin_altivec_vspltisw (const int<-16,15>);
+    VSPLTISW altivec_vspltisw {}
+
+  const vsi __builtin_altivec_vspltw (vsi, const int<2>);
+    VSPLTW altivec_vspltw {}
+
+  const vop __builtin_altivec_vsr (vop, vuc);
+    VSR altivec_vsr {}
+
+  const vsc __builtin_altivec_vsrab (vsc, vuc);
+    VSRAB vashrv16qi3 {}
+
+  const vss __builtin_altivec_vsrah (vss, vus);
+    VSRAH vashrv8hi3 {}
+
+  const vsi __builtin_altivec_vsraw (vsi, vui);
+    VSRAW vashrv4si3 {}
+
+  const vsc __builtin_altivec_vsrb (vsc, vuc);
+    VSRB vlshrv16qi3 {}
+
+  const vss __builtin_altivec_vsrh (vss, vus);
+    VSRH vlshrv8hi3 {}
+
+  const vop __builtin_altivec_vsro (vop, vuc);
+    VSRO altivec_vsro {}
+
+  const vsi __builtin_altivec_vsrw (vsi, vui);
+    VSRW vlshrv4si3 {}
+
+  const vsi __builtin_altivec_vsubcuw (vsi, vsi);
+    VSUBCUW altivec_vsubcuw {}
+
+  const vf __builtin_altivec_vsubfp (vf, vf);
+    VSUBFP subv4sf3 {}
+
+  const vsc __builtin_altivec_vsubsbs (vsc, vsc);
+    VSUBSBS altivec_vsubsbs {}
+
+  const vss __builtin_altivec_vsubshs (vss, vss);
+    VSUBSHS altivec_vsubshs {}
+
+  const vsi __builtin_altivec_vsubsws (vsi, vsi);
+    VSUBSWS altivec_vsubsws {}
+
+  const vuc __builtin_altivec_vsububm (vuc, vuc);
+    VSUBUBM subv16qi3 {}
+
+  const vuc __builtin_altivec_vsububs (vuc, vuc);
+    VSUBUBS altivec_vsububs {}
+
+  const vus __builtin_altivec_vsubuhm (vus, vus);
+    VSUBUHM subv8hi3 {}
+
+  const vus __builtin_altivec_vsubuhs (vus, vus);
+    VSUBUHS altivec_vsubuhs {}
+
+  const vui __builtin_altivec_vsubuwm (vui, vui);
+    VSUBUWM subv4si3 {}
+
+  const vui __builtin_altivec_vsubuws (vui, vui);
+    VSUBUWS altivec_vsubuws {}
+
+  const vsi __builtin_altivec_vsum2sws (vsi, vsi);
+    VSUM2SWS altivec_vsum2sws {}
+
+  const vsi __builtin_altivec_vsum4sbs (vsc, vsi);
+    VSUM4SBS altivec_vsum4sbs {}
+
+  const vsi __builtin_altivec_vsum4shs (vss, vsi);
+    VSUM4SHS altivec_vsum4shs {}
+
+  const vui __builtin_altivec_vsum4ubs (vuc, vui);
+    VSUM4UBS altivec_vsum4ubs {}
+
+  const vsi __builtin_altivec_vsumsws (vsi, vsi);
+    VSUMSWS altivec_vsumsws {}
+
+  const vsi __builtin_altivec_vsumsws_be (vsi, vsi);
+    VSUMSWS_BE altivec_vsumsws_direct {}
+
+  const vui __builtin_altivec_vupkhpx (vp);
+    VUPKHPX altivec_vupkhpx {}
+
+  const vss __builtin_altivec_vupkhsb (vsc);
+    VUPKHSB altivec_vupkhsb {}
+
+  const vsi __builtin_altivec_vupkhsh (vss);
+    VUPKHSH altivec_vupkhsh {}
+
+  const vui __builtin_altivec_vupklpx (vp);
+    VUPKLPX altivec_vupklpx {}
+
+  const vss __builtin_altivec_vupklsb (vsc);
+    VUPKLSB altivec_vupklsb {}
+
+  const vsi __builtin_altivec_vupklsh (vss);
+    VUPKLSH altivec_vupklsh {}
+
+  const vsc __builtin_altivec_vxor_v16qi (vsc, vsc);
+    VXOR_V16QI xorv16qi3 {}
+
+  const vuc __builtin_altivec_vxor_v16qi_uns (vuc, vuc);
+    VXOR_V16QI_UNS xorv16qi3 {}
+
+  const vf __builtin_altivec_vxor_v4sf (vf, vf);
+    VXOR_V4SF xorv4sf3 {}
+
+  const vsi __builtin_altivec_vxor_v4si (vsi, vsi);
+    VXOR_V4SI xorv4si3 {}
+
+  const vui __builtin_altivec_vxor_v4si_uns (vui, vui);
+    VXOR_V4SI_UNS xorv4si3 {}
+
+  const vss __builtin_altivec_vxor_v8hi (vss, vss);
+    VXOR_V8HI xorv8hi3 {}
+
+  const vus __builtin_altivec_vxor_v8hi_uns (vus, vus);
+    VXOR_V8HI_UNS xorv8hi3 {}
+
+  const signed char __builtin_vec_ext_v16qi (vsc, signed int);
+    VEC_EXT_V16QI nothing {extract}
+
+  const float __builtin_vec_ext_v4sf (vf, signed int);
+    VEC_EXT_V4SF nothing {extract}
+
+  const signed int __builtin_vec_ext_v4si (vsi, signed int);
+    VEC_EXT_V4SI nothing {extract}
+
+  const signed short __builtin_vec_ext_v8hi (vss, signed int);
+    VEC_EXT_V8HI nothing {extract}
+
+  const vsc __builtin_vec_init_v16qi (signed char, signed char, signed char, signed char, signed char, signed char, signed char, signed char, signed char, signed char, signed char, signed char, signed char, signed char, signed char, signed char);
+    VEC_INIT_V16QI nothing {init}
+
+  const vf __builtin_vec_init_v4sf (float, float, float, float);
+    VEC_INIT_V4SF nothing {init}
+
+  const vsi __builtin_vec_init_v4si (signed int, signed int, signed int, signed int);
+    VEC_INIT_V4SI nothing {init}
+
+  const vss __builtin_vec_init_v8hi (signed short, signed short, signed short, signed short, signed short, signed short, signed short, signed short);
+    VEC_INIT_V8HI nothing {init}
+
+  const vsc __builtin_vec_set_v16qi (vsc, signed char, const int<4>);
+    VEC_SET_V16QI nothing {set}
+
+  const vf __builtin_vec_set_v4sf (vf, float, const int<2>);
+    VEC_SET_V4SF nothing {set}
+
+  const vsi __builtin_vec_set_v4si (vsi, signed int, const int<2>);
+    VEC_SET_V4SI nothing {set}
+
+  const vss __builtin_vec_set_v8hi (vss, signed short, const int<3>);
+    VEC_SET_V8HI nothing {set}
+
-- 
2.17.1

[PATCH 22/29] rs6000: Add VSX builtins

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-builtin-new.def: Add VSX builtins.
---
 gcc/config/rs6000/rs6000-builtin-new.def | 840 +++++++++++++++++++++++
 1 file changed, 840 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 0b79f155389..6c60177e4bb 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1020,3 +1020,843 @@
   const vss __builtin_vec_set_v8hi (vss, signed short, const int<3>);
     VEC_SET_V8HI nothing {set}
 
+
+; VSX builtins.
+[vsx]
+  pure vsq __builtin_altivec_lvx_v1ti (signed long long, void *);
+    LVX_V1TI altivec_lvx_v1ti {ldvec}
+
+  pure vd __builtin_altivec_lvx_v2df (signed long long, void *);
+    LVX_V2DF altivec_lvx_v2df {ldvec}
+
+  pure vsll __builtin_altivec_lvx_v2di (signed long long, void *);
+    LVX_V2DI altivec_lvx_v2di {ldvec}
+
+  pure vd __builtin_altivec_lvxl_v2df (signed long long, void *);
+    LVXL_V2DF altivec_lvxl_v2df {ldvec}
+
+  pure vsll __builtin_altivec_lvxl_v2di (signed long long, void *);
+    LVXL_V2DI altivec_lvxl_v2di {ldvec}
+
+  const vd __builtin_altivec_nabs_v2df (vd);
+    NABS_V2DF vsx_nabsv2df2 {}
+
+  const vsll __builtin_altivec_nabs_v2di (vsll);
+    NABS_V2DI nabsv2di2 {}
+
+  void __builtin_altivec_stvx_v2df (vd, signed long long, void *);
+    STVX_V2DF altivec_stvx_v2df {stvec}
+
+  void __builtin_altivec_stvx_v2di (vop, signed long long, void *);
+    STVX_V2DI altivec_stvx_v2di {stvec}
+
+  void __builtin_altivec_stvxl_v2df (vd, signed long long, void *);
+    STVXL_V2DF altivec_stvxl_v2df {stvec}
+
+  void __builtin_altivec_stvxl_v2di (vop, signed long long, void *);
+    STVXL_V2DI altivec_stvxl_v2di {stvec}
+
+  const vd __builtin_altivec_vand_v2df (vd, vd);
+    VAND_V2DF andv2df3 {}
+
+  const vsll __builtin_altivec_vand_v2di (vsll, vsll);
+    VAND_V2DI andv2di3 {}
+
+  const vull __builtin_altivec_vand_v2di_uns (vull, vull);
+    VAND_V2DI_UNS andv2di3 {}
+
+  const vd __builtin_altivec_vandc_v2df (vd, vd);
+    VANDC_V2DF andcv2df3 {}
+
+  const vsll __builtin_altivec_vandc_v2di (vsll, vsll);
+    VANDC_V2DI andcv2di3 {}
+
+  const vull __builtin_altivec_vandc_v2di_uns (vull, vull);
+    VANDC_V2DI_UNS andcv2di3 {}
+
+  const vd __builtin_altivec_vnor_v2df (vd, vd);
+    VNOR_V2DF norv2df3 {}
+
+  const vsll __builtin_altivec_vnor_v2di (vsll, vsll);
+    VNOR_V2DI norv2di3 {}
+
+  const vull __builtin_altivec_vnor_v2di_uns (vull, vull);
+    VNOR_V2DI_UNS norv2di3 {}
+
+  const vd __builtin_altivec_vor_v2df (vd, vd);
+    VOR_V2DF iorv2df3 {}
+
+  const vsll __builtin_altivec_vor_v2di (vsll, vsll);
+    VOR_V2DI iorv2di3 {}
+
+  const vull __builtin_altivec_vor_v2di_uns (vull, vull);
+    VOR_V2DI_UNS iorv2di3 {}
+
+  const vd __builtin_altivec_vperm_2df (vd, vd, vuc);
+    VPERM_2DF altivec_vperm_v2df {}
+
+  const vsll __builtin_altivec_vperm_2di (vsll, vsll, vuc);
+    VPERM_2DI altivec_vperm_v2di {}
+
+  const vull __builtin_altivec_vperm_2di_uns (vull, vull, vuc);
+    VPERM_2DI_UNS altivec_vperm_v2di_uns {}
+
+  const vd __builtin_altivec_vreve_v2df (vd);
+    VREVE_V2DF altivec_vrevev2df2 {}
+
+  const vsll __builtin_altivec_vreve_v2di (vsll);
+    VREVE_V2DI altivec_vrevev2di2 {}
+
+  const vd __builtin_altivec_vsel_2df (vd, vd, vop);
+    VSEL_2DF vector_select_v2df {}
+
+  const vsll __builtin_altivec_vsel_2di (vsll, vsll, vsll, vbll);
+    VSEL_2DI_B vector_select_v2di {}
+
+  const vull __builtin_altivec_vsel_2di_uns (vull, vull, vull);
+    VSEL_2DI_UNS vector_select_v2di_uns {}
+
+  const vd __builtin_altivec_vsldoi_2df (vd, vd, const int<4>);
+    VSLDOI_2DF altivec_vsldoi_v2df {}
+
+  const vsll __builtin_altivec_vsldoi_2di (vsll, vsll, const int<4>);
+    VSLDOI_2DI altivec_vsldoi_v2di {}
+
+  const vd __builtin_altivec_vxor_v2df (vd, vd);
+    VXOR_V2DF xorv2df3 {}
+
+  const vsll __builtin_altivec_vxor_v2di (vsll, vsll);
+    VXOR_V2DI xorv2di3 {}
+
+  const vull __builtin_altivec_vxor_v2di_uns (vull, vull);
+    VXOR_V2DI_UNS xorv2di3 {}
+
+  const vbc __builtin_vsx_cmpge_16qi (vsc, vsc);
+    CMPGE_16QI vector_nltv16qi {}
+
+  const vbll __builtin_vsx_cmpge_2di (vsll, vsll);
+    CMPGE_2DI vector_nltv2di {}
+
+  const vbi __builtin_vsx_cmpge_4si (vsi, vsi);
+    CMPGE_4SI vector_nltv4si {}
+
+  const vbs __builtin_vsx_cmpge_8hi (vss, vss);
+    CMPGE_8HI vector_nltv8hi {}
+
+  const vbc __builtin_vsx_cmpge_u16qi (vuc, vuc);
+    CMPGE_U16QI vector_nltuv16qi {}
+
+  const vbll __builtin_vsx_cmpge_u2di (vull, vull);
+    CMPGE_U2DI vector_nltuv2di {}
+
+  const vbi __builtin_vsx_cmpge_u4si (vui, vui);
+    CMPGE_U4SI vector_nltuv4si {}
+
+  const vbs __builtin_vsx_cmpge_u8hi (vus, vus);
+    CMPGE_U8HI vector_nltuv8hi {}
+
+  const vbc __builtin_vsx_cmple_16qi (vsc, vsc);
+    CMPLE_16QI vector_ngtv16qi {}
+
+  const vbll __builtin_vsx_cmple_2di (vsll, vsll);
+    CMPLE_2DI vector_ngtv2di {}
+
+  const vbi __builtin_vsx_cmple_4si (vsi, vsi);
+    CMPLE_4SI vector_ngtv4si {}
+
+  const vbs __builtin_vsx_cmple_8hi (vss, vss);
+    CMPLE_8HI vector_ngtv8hi {}
+
+  const vbc __builtin_vsx_cmple_u16qi (vuc, vuc);
+    CMPLE_U16QI vector_ngtuv16qi {}
+
+  const vbll __builtin_vsx_cmple_u2di (vull, vull);
+    CMPLE_U2DI vector_ngtuv2di {}
+
+  const vbi __builtin_vsx_cmple_u4si (vui, vui);
+    CMPLE_U4SI vector_ngtuv4si {}
+
+  const vbs __builtin_vsx_cmple_u8hi (vus, vus);
+    CMPLE_U8HI vector_ngtuv8hi {}
+
+  const vd __builtin_vsx_concat_2df (double, double);
+    CONCAT_2DF vsx_concat_v2df {}
+
+  const vsll __builtin_vsx_concat_2di (signed long long, signed long long);
+    CONCAT_2DI vsx_concat_v2di {}
+
+  const vull __builtin_vsx_concat_2di_uns (unsigned long long, unsigned long long);
+    CONCAT_2DI_UNS vsx_concat_v2di {}
+
+  const vd __builtin_vsx_cpsgndp (vd, vd);
+    CPSGNDP vector_copysignv2df3 {}
+
+  const vf __builtin_vsx_cpsgnsp (vf, vf);
+    CPSGNSP vector_copysignv4sf3 {}
+
+  const vsll __builtin_vsx_div_2di (vsll, vsll);
+    DIV_V2DI vsx_div_v2di {}
+
+  const vd __builtin_vsx_doublee_v4sf (vf);
+    DOUBLEE_V4SF doubleev4sf2 {}
+
+  const vd __builtin_vsx_doublee_v4si (vsi);
+    DOUBLEE_V4SI doubleev4si2 {}
+
+  const vd __builtin_vsx_doubleh_v4sf (vf);
+    DOUBLEH_V4SF doublehv4sf2 {}
+
+  const vd __builtin_vsx_doubleh_v4si (vsi);
+    DOUBLEH_V4SI doublehv4si2 {}
+
+  const vd __builtin_vsx_doublel_v4sf (vf);
+    DOUBLEL_V4SF doublelv4sf2 {}
+
+  const vd __builtin_vsx_doublel_v4si (vsi);
+    DOUBLEL_V4SI doublelv4si2 {}
+
+  const vd __builtin_vsx_doubleo_v4sf (vf);
+    DOUBLEO_V4SF doubleov4sf2 {}
+
+  const vd __builtin_vsx_doubleo_v4si (vsi);
+    DOUBLEO_V4SI doubleov4si2 {}
+
+  const vf __builtin_vsx_floate_v2df (vd);
+    FLOATE_V2DF floatev2df {}
+
+  const vf __builtin_vsx_floate_v2di (vsll);
+    FLOATE_V2DI floatev2di {}
+
+  const vf __builtin_vsx_floato_v2df (vd);
+    FLOATO_V2DF floatov2df {}
+
+  const vf __builtin_vsx_floato_v2di (vsll);
+    FLOATO_V2DI floatov2di {}
+
+; #### For the following, currently the pattern is selected differently
+; depending on big-endian (e.g., vsx_load_v1ti) versus little-endian
+; (e.g, vsx_ld_elemrev_v1ti).  We need to move the choice into a separate
+; pattern for each of these instead.  Right now I only list the little-
+; endian pattern here.  TBD.
+  pure vsq __builtin_vsx_ld_elemrev_v1ti (signed long long, void *);
+    LD_ELEMREV_V1TI vsx_ld_elemrev_v1ti {ldvec}
+
+  pure vd __builtin_vsx_ld_elemrev_v2df (signed long long, void *);
+    LD_ELEMREV_V2DF vsx_ld_elemrev_v2df {ldvec}
+
+  pure vsll __builtin_vsx_ld_elemrev_v2di (signed long long, void *);
+    LD_ELEMREV_V2DI vsx_ld_elemrev_v2di {ldvec}
+
+  pure vf __builtin_vsx_ld_elemrev_v4sf (signed long long, void *);
+    LD_ELEMREV_V4SF vsx_ld_elemrev_v4sf {ldvec}
+
+  pure vsi __builtin_vsx_ld_elemrev_v4si (signed long long, void *);
+    LD_ELEMREV_V4SI vsx_ld_elemrev_v4si {ldvec}
+
+  pure vss __builtin_vsx_ld_elemrev_v8hi (signed long long, void *);
+    LD_ELEMREV_V8HI vsx_ld_elemrev_v8hi {ldvec}
+
+  pure vsc __builtin_vsx_ld_elemrev_v16qi (signed long long, void *);
+    LD_ELEMREV_V16QI vsx_ld_elemrev_v16qi {ldvec}
+
+; There is apparent intent in rs6000-builtin.def to have RS6000_BTC_SPECIAL
+; processing for LXSDX, LXVDSX, and STXSDX, but there are no def_builtin calls
+; for any of them.  At some point, we may want to add a set of built-ins for
+; whichever vector types make sense for these.
+
+  pure vsq __builtin_vsx_lxvd2x_v1ti (signed long long, void *);
+    LXVD2X_V1TI vsx_load_v1ti {ldvec}
+
+  pure vd __builtin_vsx_lxvd2x_v2df (signed long long, void *);
+    LXVD2X_V2DF vsx_load_v2df {ldvec}
+
+  pure vsll __builtin_vsx_lxvd2x_v2di (signed long long, void *);
+    LXVD2X_V2DI vsx_load_v2di {ldvec}
+
+  pure vsc __builtin_vsx_lxvw4x_16qi (signed long long, void *);
+    LXVW4X_V16QI vsx_load_v16qi {ldvec}
+
+  pure vf __builtin_vsx_lxvw4x_v4sf (signed long long, void *);
+    LXVW4X_V4SF vsx_load_v4sf {ldvec}
+
+  pure vsi __builtin_vsx_lxvw4x_v4si (signed long long, void *);
+    LXVW4X_V4SI vsx_load_v4si {ldvec}
+
+  pure vss __builtin_vsx_lxvw4x_v8hi (signed long long, void *);
+    LXVW4X_V8HI vsx_load_v8hi {ldvec}
+
+  const vd __builtin_vsx_mergeh_2df (vd, vd);
+    VEC_MERGEH_V2DF vsx_mergeh_v2df {}
+
+  const vsll __builtin_vsx_mergeh_2di (vsll, vsll);
+    VEC_MERGEH_V2DI vsx_mergeh_v2di {}
+
+  const vd __builtin_vsx_mergel_2df (vd, vd);
+    VEC_MERGEL_V2DF vsx_mergel_v2df {}
+
+  const vsll __builtin_vsx_mergel_2di (vsll, vsll);
+    VEC_MERGEL_V2DI vsx_mergel_v2di {}
+
+  const vsll __builtin_vsx_mul_2di (vsll, vsll);
+    MUL_V2DI vsx_mul_v2di {}
+
+  const vsq __builtin_vsx_set_1ti (vsq, signed __int128, const int<0,0>);
+    SET_1TI vsx_set_v1ti {set}
+
+  const vuq __builtin_vsx_set_1ti_uns (vuq, unsigned __int128, const int<0,0>);
+    SET_1TI_UNS vsx_set_v1ti {set}
+
+  const vd __builtin_vsx_set_2df (vd, double, const int<0,1>);
+    SET_2DF vsx_set_v2df {set}
+
+  const vsll __builtin_vsx_set_2di (vsll, signed long long, const int<0,1>);
+    SET_2DI vsx_set_v2di {set}
+
+  const vull __builtin_vsx_set_2di_uns (vull, unsigned long long, const int<0,1>);
+    SET_2DI_UNS vsx_set_v2di {set}
+
+  const vd __builtin_vsx_splat_2df (double);
+    SPLAT_2DF vsx_splat_v2df {}
+
+  const vsll __builtin_vsx_splat_2di (signed long long);
+    SPLAT_2DI vsx_splat_v2di {}
+
+  const vull __builtin_vsx_splat_2di_uns (unsigned long long);
+    SPLAT_2DI_UNS vsx_splat_v2di {}
+
+; #### For the following, currently the pattern is selected differently
+; depending on big-endian (e.g., vsx_store_v1ti) versus little-endian
+; (e.g, vsx_st_elemrev_v1ti).  We need to move the choice into a separate
+; pattern for each of these instead.  Right now I only list the little-
+; endian pattern here.  TBD.
+  void __builtin_vsx_st_elemrev_v1ti (vsq, signed long long, void *);
+    ST_ELEMREV_V1TI vsx_st_elemrev_v1ti {stvec}
+
+  void __builtin_vsx_st_elemrev_v2df (vd, signed long long, void *);
+    ST_ELEMREV_V2DF vsx_st_elemrev_v2df {stvec}
+
+  void __builtin_vsx_st_elemrev_v2di (vsll, signed long long, void *);
+    ST_ELEMREV_V2DI vsx_st_elemrev_v2di {stvec}
+
+  void __builtin_vsx_st_elemrev_v4sf (vf, signed long long, void *);
+    ST_ELEMREV_V4SF vsx_st_elemrev_v4sf {stvec}
+
+  void __builtin_vsx_st_elemrev_v4si (vsi, signed long long, void *);
+    ST_ELEMREV_V4SI vsx_st_elemrev_v4si {stvec}
+
+  void __builtin_vsx_st_elemrev_v8hi (vss, signed long long, void *);
+    ST_ELEMREV_V8HI vsx_st_elemrev_v8hi {stvec}
+
+  void __builtin_vsx_st_elemrev_v16qi (vsc, signed long long, void *);
+    ST_ELEMREV_V16QI vsx_st_elemrev_v16qi {stvec}
+
+  void __builtin_vsx_stxvd2x_v1ti (vsq, signed long long, void *);
+    STXVD2X_V1TI vsx_store_v1ti {stvec}
+
+  void __builtin_vsx_stxvd2x_v2df (vd, signed long long, void *);
+    STXVD2X_V2DF vsx_store_v2df {stvec}
+
+  void __builtin_vsx_stxvd2x_v2di (vsll, signed long long, void *);
+    STXVD2X_V2DI vsx_store_v2di {stvec}
+
+  void __builtin_vsx_stxvw4x_v4sf (vf, signed long long, void *);
+    STXVW4X_V4SF vsx_store_v4sf {stvec}
+
+  void __builtin_vsx_stxvw4x_v4si (vsi, signed long long, void *);
+    STXVW4X_V4SI vsx_store_v4si {stvec}
+
+  void __builtin_vsx_stxvw4x_v8hi (vss, signed long long, void *);
+    STXVW4X_V8HI vsx_store_v8hi {stvec}
+
+  void __builtin_vsx_stxvw4x_v16qi (vsc, signed long long, void *);
+    STXVW4X_V16QI vsx_store_v16qi {stvec}
+
+  const vull __builtin_vsx_udiv_2di (vull, vull);
+    UDIV_V2DI vsx_udiv_v2di {}
+
+  const vd __builtin_vsx_uns_doublee_v4si (vui);
+    UNS_DOUBLEE_V4SI unsdoubleev4si2 {}
+
+  const vd __builtin_vsx_uns_doubleh_v4si (vui);
+    UNS_DOUBLEH_V4SI unsdoublehv4si2 {}
+
+  const vd __builtin_vsx_uns_doublel_v4si (vui);
+    UNS_DOUBLEL_V4SI unsdoublelv4si2 {}
+
+  const vd __builtin_vsx_uns_doubleo_v4si (vui);
+    UNS_DOUBLEO_V4SI unsdoubleov4si2 {}
+
+  const vf __builtin_vsx_uns_floate_v2di (vull);
+    UNS_FLOATE_V2DI unsfloatev2di {}
+
+  const vf __builtin_vsx_uns_floato_v2di (vull);
+    UNS_FLOATO_V2DI unsfloatov2di {}
+
+  const signed __int128 __builtin_vsx_vec_ext_v1ti (vsq, signed int);
+    VEC_EXT_V1TI nothing {extract}
+
+  const double __builtin_vsx_vec_ext_v2df (vd, signed int);
+    VEC_EXT_V2DF nothing {extract}
+
+  const signed long long __builtin_vsx_vec_ext_v2di (vsll, signed int);
+    VEC_EXT_V2DI nothing {extract}
+
+  const vsq __builtin_vsx_vec_init_v1ti (signed __int128);
+    VEC_INIT_V1TI nothing {init}
+
+  const vd __builtin_vsx_vec_init_v2df (double, double);
+    VEC_INIT_V2DF nothing {init}
+
+  const vsll __builtin_vsx_vec_init_v2di (signed long long, signed long long);
+    VEC_INIT_V2DI nothing {init}
+
+  const vsq __builtin_vsx_vec_set_v1ti (vsq, signed __int128, const int<0,0>);
+    VEC_SET_V1TI nothing {set}
+
+  const vd __builtin_vsx_vec_set_v2df (vd, double, const int<1>);
+    VEC_SET_V2DF nothing {set}
+
+  const vsll __builtin_vsx_vec_set_v2di (vsll, signed long long, const int<1>);
+    VEC_SET_V2DI nothing {set}
+
+  const vsll __builtin_vsx_vsigned_v2df (vd);
+    VEC_VSIGNED_V2DF vsx_xvcvdpsxds {}
+
+  const vsi __builtin_vsx_vsigned_v4sf (vf);
+    VEC_VSIGNED_V4SF vsx_xvcvspsxws {}
+
+  const vsll __builtin_vsx_vsignede_v2df (vd);
+    VEC_VSIGNEDE_V2DF vsignede_v2df {}
+
+  const vsll __builtin_vsx_vsignedo_v2df (vd);
+    VEC_VSIGNEDO_V2DF vsignedo_v2df {}
+
+  const vull __builtin_vsx_vunsigned_v2df (vd);
+    VEC_VUNSIGNED_V2DF vsx_xvcvdpsxds {}
+
+  const vui __builtin_vsx_vunsigned_v4sf (vf);
+    VEC_VUNSIGNED_V4SF vsx_xvcvspsxws {}
+
+  const vull __builtin_vsx_vunsignede_v2df (vd);
+    VEC_VUNSIGNEDE_V2DF vunsignede_v2df {}
+
+  const vull __builtin_vsx_vunsignedo_v2df (vd);
+    VEC_VUNSIGNEDO_V2DF vunsignedo_v2df {}
+
+  const vf __builtin_vsx_xscvdpsp (vd);
+    XSCVDPSP vsx_xscvdpsp {}
+
+  const vd __builtin_vsx_xscvspdp (vf);
+    XSCVSPDP vsx_xscvspdp {}
+
+  const double __builtin_vsx_xsmaxdp (double, double);
+    XSMAXDP smaxdf3 {}
+
+  const double __builtin_vsx_xsmindp (double, double);
+    XSMINDP smindf3 {}
+
+  const vd __builtin_vsx_xsrdpi (vd);
+    XSRDPI vsx_xsrdpi {}
+
+  const vd __builtin_vsx_xsrdpic (vd);
+    XSRDPIC vsx_xsrdpic {}
+
+  const vd __builtin_vsx_xsrdpim (vd);
+    XSRDPIM floordf2 {}
+
+  const vd __builtin_vsx_xsrdpip (vd);
+    XSRDPIP ceildf2 {}
+
+  const vd __builtin_vsx_xsrdpiz (vd);
+    XSRDPIZ btruncdf2 {}
+
+  const unsigned int __builtin_vsx_xstdivdp_fe (vd, vd);
+    XSTDIVDP_FE vsx_tdivdf3_fe {}
+
+  const unsigned int __builtin_vsx_xstdivdp_fg (vd, vd);
+    XSTDIVDP_FG vsx_tdivdf3_fg {}
+
+  const unsigned int __builtin_vsx_xstsqrtdp_fe (vd);
+    XSTSQRTDP_FE vsx_tsqrtdf2_fe {}
+
+  const unsigned int __builtin_vsx_xstsqrtdp_fg (vd);
+    XSTSQRTDP_FG vsx_tsqrtdf2_fg {}
+
+  const vd __builtin_vsx_xvabsdp (vd);
+    XVABSDP absv2df2 {}
+
+  const vf __builtin_vsx_xvabssp (vf);
+    XVABSSP absv4sf2 {}
+
+  fpmath vd __builtin_vsx_xvadddp (vd, vd);
+    XVADDDP addv2df3 {}
+
+  fpmath vf __builtin_vsx_xvaddsp (vf, vf);
+    XVADDSP addv4sf3 {}
+
+  const vbll __builtin_vsx_xvcmpeqdp (vd, vd);
+    XVCMPEQDP vector_eqv2df {}
+
+; This predicate isn't used in the ALL or ANY interfaces; it appears
+; to return a vector rather than an integer as other predicates do.
+  const vull __builtin_vsx_xvcmpeqdp_p (vd);
+    XVCMPEQDP_P vector_eq_v2df_p {pred}
+
+  const vbi __builtin_vsx_xvcmpeqsp (vf, vf);
+    XVCMPEQSP vector_eqv4sf {}
+
+; This predicate isn't used in the ALL or ANY interfaces; it appears
+; to return a vector rather than an integer as other predicates do.
+  const vui __builtin_vsx_xvcmpeqsp_p (vf);
+    XVCMPEQSP_P vector_eq_v4sf_p {pred}
+
+  const vbll __builtin_vsx_xvcmpgedp (vd, vd);
+    XVCMPGEDP vector_gev2df {}
+
+; This predicate isn't used in the ALL or ANY interfaces; it appears
+; to return a vector rather than an integer as other predicates do.
+  const vull __builtin_vsx_xvcmpgedp_p (vd);
+    XVCMPGEDP_P vector_ge_v2df_p {pred}
+
+  const vbi __builtin_vsx_xvcmpgesp (vf, vf);
+    XVCMPGESP vector_gev4sf {}
+
+; This predicate isn't used in the ALL or ANY interfaces; it appears
+; to return a vector rather than an integer as other predicates do.
+  const vui __builtin_vsx_xvcmpgesp_p (vf);
+    XVCMPGESP_P vector_ge_v4sf_p {pred}
+
+  const vbll __builtin_vsx_xvcmpgtdp (vd, vd);
+    XVCMPGTDP vector_gtv2df {}
+
+; This predicate isn't used in the ALL or ANY interfaces; it appears
+; to return a vector rather than an integer as other predicates do.
+  const vull __builtin_vsx_xvcmpgtdp_p (vd);
+    XVCMPGTDP_P vector_gt_v2df_p {pred}
+
+  const vbi __builtin_vsx_xvcmpgtsp (vf, vf);
+    XVCMPGTSP vector_gtv4sf {}
+
+; This predicate isn't used in the ALL or ANY interfaces; it appears
+; to return a vector rather than an integer as other predicates do.
+  const vui __builtin_vsx_xvcmpgtsp_p (vf, vf);
+    XVCMPGTSP_P vector_gt_v4sf_p {pred}
+
+  const vsll __builtin_vsx_xvcvdpsxds (vd);
+    XVCVDPSXDS vsx_fix_truncv2dfv2di2 {}
+
+  const vsll __builtin_vsx_xvcvdpsxds_scale (vd, const int);
+    XVCVDPSXDS_SCALE vsx_xvcvdpsxds_scale {}
+
+  const vsll __builtin_vsx_xvcvdpsxws (vd);
+    XVCVDPSXWS vsx_xvcvdpsxws {}
+
+  const vull __builtin_vsx_xvcvdpuxds (vd);
+    XVCVDPUXDS vsx_fixuns_truncv2dfv2di2 {}
+
+  const vull __builtin_vsx_xvcvdpuxds_scale (vd, const int);
+    XVCVDPUXDS_SCALE vsx_xvcvdpuxds_scale {}
+
+; Redundant with __builtin_vsx_xvcvdpuxds
+  const vull __builtin_vsx_xvcvdpuxds_uns (vd);
+    XVCVDPUXDS_UNS vsx_fixuns_truncv2dfv2di2 {}
+
+  const vull __builtin_vsx_xvcvdpuxws (vd);
+    XVCVDPUXWS vsx_xvcvdpuxws {}
+
+  const vsll __builtin_vsx_xvcvspsxds (vf);
+    XVCVSPSXDS vsx_xvcvspsxds {}
+
+  const vsi __builtin_vsx_xvcvspsxws (vf);
+    XVCVSPSXWS vsx_fix_truncv4sfv4si2 {}
+
+  const vull __builtin_vsx_xvcvspuxds (vf);
+    XVCVSPUXDS vsx_xvcvspuxds {}
+
+  const vui __builtin_vsx_xvcvspuxws (vf);
+    XVCVSPUXWS vsx_fixuns_truncv4sfv4si2 {}
+
+  const vd __builtin_vsx_xvcvsxddp (vsll);
+    XVCVSXDDP vsx_floatv2div2df2 {}
+
+  const vd __builtin_vsx_xvcvsxddp_scale (vsll, const int);
+    XVCVSXDDP_SCALE vsx_xvcvsxddp_scale {}
+
+  const vf __builtin_vsx_xvcvsxdsp (vsll);
+    XVCVSXDSP vsx_xvcvsxdsp {}
+
+  const vd __builtin_vsx_xvcvsxwdp (vsll);
+    XVCVSXWDP vsx_xvcvsxwdp {}
+
+; Need to pick one or the other here!!  ####
+  const vf __builtin_vsx_xvcvsxwsp (vsi);
+    XVCVSXWSP vsx_floatv4siv4sf2 {}
+  const vf __builtin_vsx_xvcvsxwsp (vsi);
+    XVCVSXWSP_V4SF vsx_xvcvsxwdp {}
+
+  const vd __builtin_vsx_xvcvuxddp (vull);
+    XVCVUXDDP vsx_floatunsv2div2df2 {}
+
+  const vd __builtin_vsx_xvcvuxddp_scale (vull, const int);
+    XVCVUXDDP_SCALE vsx_xvcvuxddp_scale {}
+
+; Redundant with __builtin_vsx_xvcvuxddp
+  const vd __builtin_vsx_xvcvuxddp_uns (vull);
+    XVCVUXDDP_UNS vsx_floatunsv2div2df2 {}
+
+  const vf __builtin_vsx_xvcvuxdsp (vull);
+    XVCVUXDSP vsx_xvcvuxdsp {}
+
+  const vd __builtin_vsx_xvcvuxwdp (vsll);
+    XVCVUXWDP vsx_xvcvuxwdp {}
+
+; Need to pick one or the other here!! ####
+  const vf __builtin_vsx_xvcvuxwsp (vui);
+    XVCVUXWSP vsx_floatunsv4siv4sf2 {}
+  const vf __builtin_vsx_xvcvuxwsp (vui);
+    XVCVUXWSP_V4SF vsx_xvcvuxwsp {}
+
+  fpmath vf __builtin_vsx_xvdivdp (vf, vf);
+    XVDIVDP divv2df3 {}
+
+  fpmath vf __builtin_vsx_xvdivsp (vf, vf);
+    XVDIVSP divv4sf3 {}
+
+  const vd __builtin_vsx_xvmadddp (vd, vd, vd);
+    XVMADDDP fmav2df4 {}
+
+  const vf __builtin_vsx_xvmaddsp (vf, vf, vf);
+    XVMADDSP fmav4sf4 {}
+
+  const vd __builtin_vsx_xvmaxdp (vd, vd);
+    XVMAXDP smaxv2df3 {}
+
+  const vf __builtin_vsx_xvmaxsp (vf, vf);
+    XVMAXSP smaxv4sf3 {}
+
+  const vd __builtin_vsx_xvmindp (vd, vd);
+    XVMINDP sminv2df3 {}
+
+  const vf __builtin_vsx_xvminsp (vf, vf);
+    XVMINSP sminv4sf3 {}
+
+  const vd __builtin_vsx_xvmsubdp (vd, vd, vd);
+    XVMSUBDP fmsv2df4 {}
+
+  const vf __builtin_vsx_xvmsubsp (vf, vf, vf);
+    XVMSUBSP fmsv4sf4 {}
+
+  fpmath vd __builtin_vsx_xvmuldp (vd, vd);
+    XVMULDP mulv2df3 {}
+
+  fpmath vf __builtin_vsx_xvmulsp (vf, vf);
+    XVMULSP mulv4sf3 {}
+
+  const vd __builtin_vsx_xvnabsdp (vd);
+    XVNABSDP vsx_nabsv2df2 {}
+
+  const vf __builtin_vsx_xvnabssp (vf);
+    XVNABSSP vsx_nabsv4sf2 {}
+
+  const vd __builtin_vsx_xvnegdp (vd);
+    XVNEGDP negv2df2 {}
+
+  const vf __builtin_vsx_xvnegsp (vf);
+    XVNEGSP negv4sf2 {}
+
+  const vd __builtin_vsx_xvnmadddp (vd, vd, vd);
+    XVNMADDDP nfmav2df4 {}
+
+  const vf __builtin_vsx_xvnmaddsp (vf, vf, vf);
+    XVNMADDSP nfmav4sf4 {}
+
+  const vd __builtin_vsx_xvnmsubdp (vd, vd, vd);
+    XVNMSUBDP nfmsv2df4 {}
+
+  const vf __builtin_vsx_xvnmsubsp (vf, vf, vf);
+    XVNMSUBSP nfmsv4sf4 {}
+
+  const vd __builtin_vsx_xvrdpi (vd);
+    XVRDPI vsx_xvrdpi {}
+
+  const vd __builtin_vsx_xvrdpic (vd);
+    XVRDPIC vsx_xvrdpic {}
+
+  const vd __builtin_vsx_xvrdpim (vd);
+    XVRDPIM vsx_floorv2df2 {}
+
+  const vd __builtin_vsx_xvrdpip (vd);
+    XVRDPIP vsx_ceilv2df2 {}
+
+  const vd __builtin_vsx_xvrdpiz (vd);
+    XVRDPIZ vsx_btruncv2df2 {}
+
+  fpmath vd __builtin_vsx_xvrecipdivdp (vd, vd);
+    RECIP_V2DF recipv2df3 {}
+
+  fpmath vf __builtin_vsx_xvrecipdivsp (vf, vf);
+    RECIP_V4SF recipv4sf3 {}
+
+  const vd __builtin_vsx_xvredp (vd);
+    XVREDP vsx_frev2df2 {}
+
+  const vf __builtin_vsx_xvresp (vf);
+    XVRESP vsx_frev4sf2 {}
+
+  const vf __builtin_vsx_xvrspi (vf);
+    XVRSPI vsx_xvrspi {}
+
+  const vf __builtin_vsx_xvrspic (vf);
+    XVRSPIC vsx_xvrspic {}
+
+  const vf __builtin_vsx_xvrspim (vf);
+    XVRSPIM vsx_floorv4sf2 {}
+
+  const vf __builtin_vsx_xvrspip (vf);
+    XVRSPIP vsx_ceilv4sf2 {}
+
+  const vf __builtin_vsx_xvrspiz (vf);
+    XVRSPIZ vsx_btruncv4sf2 {}
+
+  const vd __builtin_vsx_xvrsqrtdp (vd);
+    RSQRT_2DF rsqrtv2df2 {}
+
+  const vf __builtin_vsx_xvrsqrtsp (vf);
+    RSQRT_4SF rsqrtv4sf2 {}
+
+  const vd __builtin_vsx_xvrsqrtedp (vd);
+    XVRSQRTEDP rsqrtev2df2 {}
+
+  const vf __builtin_vsx_xvrsqrtesp (vf);
+    XVRSQRTESP rsqrtev4sf2 {}
+
+  const vd __builtin_vsx_xvsqrtdp (vd);
+    XVSQRTDP sqrtv2df2 {}
+
+  const vf __builtin_vsx_xvsqrtsp (vf);
+    XVSQRTSP sqrtv4sf2 {}
+
+  fpmath vd __builtin_vsx_xvsubdp (vd, vd);
+    XVSUBDP subv2df3 {}
+
+  fpmath vf __builtin_vsx_xvsubsp (vf, vf);
+    XVSUBSP subv4sf3 {}
+
+  const unsigned int __builtin_vsx_xvtdivdp_fe (vd, vd);
+    XVTDIVDP_FE vsx_tdivv2df3_fe {}
+
+  const unsigned int __builtin_vsx_xvtdivdp_fg (vd, vd);
+    XVTDIVDP_FG vsx_tdivv2df3_fg {}
+
+  const unsigned int __builtin_vsx_xvtdivsp_fe (vf, vf);
+    XVTDIVSP_FE vsx_tdivv4sf3_fe {}
+
+  const unsigned int __builtin_vsx_xvtdivsp_fg (vf, vf);
+    XVTDIVSP_FG vsx_tdivv4sf3_fg {}
+
+  const unsigned int __builtin_vsx_xvtsqrtdp_fe (vd);
+    XVTSQRTDP_FE vsx_tsqrtv2df2_fe {}
+
+  const unsigned int __builtin_vsx_xvtsqrtdp_fg (vd);
+    XVTSQRTDP_FG vsx_tsqrtv2df2_fg {}
+
+  const unsigned int __builtin_vsx_xvtsqrtsp_fe (vf);
+    XVTSQRTSP_FE vsx_tsqrtv4sf2_fe {}
+
+  const unsigned int __builtin_vsx_xvtsqrtsp_fg (vf);
+    XVTSQRTSP_FG vsx_tsqrtv4sf2_fg {}
+
+  const vf __builtin_vsx_xxmrghw (vf, vf);
+    XXMRGHW_4SF vsx_xxmrghw_v4sf {}
+
+  const vsi __builtin_vsx_xxmrghw_4si (vsi, vsi);
+    XXMRGHW_4SI vsx_xxmrghw_v4si {}
+
+  const vf __builtin_vsx_xxmrglw (vf, vf);
+    XXMRGLW_4SF vsx_xxmrglw_v4sf {}
+
+  const vss __builtin_vsx_xxmrglw_4si (vsi, vsi);
+    XXMRGLW_4SI vsx_xxmrglw_v4si {}
+
+  const vsc __builtin_vsx_xxpermdi_16qi (vsc, vsc, const int<1>);
+    XXPERMDI_16QI vsx_xxpermdi_v16qi {}
+
+  const vsq __builtin_vsx_xxpermdi_1ti (vsq, vsq, const int<1>);
+    XXPERMDI_1TI vsx_xxpermdi_v1ti {}
+
+  const vd __builtin_vsx_xxpermdi_2df (vd, vd, const int<1>);
+    XXPERMDI_2DF vsx_xxpermdi_v2df {}
+
+  const vsll __builtin_vsx_xxpermdi_2di (vsll, vsll, const int<1>);
+    XXPERMDI_2DI vsx_xxpermdi_v2di {}
+
+  const vf __builtin_vsx_xxpermdi_4sf (vf, vf, const int<1>);
+    XXPERMDI_4SF vsx_xxpermdi_v4sf {}
+
+  const vsi __builtin_vsx_xxpermdi_4si (vsi, vsi, const int<1>);
+    XXPERMDI_4SI vsx_xxpermdi_v4si {}
+
+  const vss __builtin_vsx_xxpermdi_8hi (vss, vss, const int<1>);
+    XXPERMDI_8HI vsx_xxpermdi_v8hi {}
+
+  const vsc __builtin_vsx_xxsel_16qi (vsc, vsc, vsc);
+    XXSEL_16QI vector_select_v16qi {}
+
+  const vuc __builtin_vsx_xxsel_16qi_uns (vuc, vuc, vuc);
+    XXSEL_16QI_UNS vector_select_v16qi_uns {}
+
+  const vsq __builtin_vsx_xxsel_1ti (vsq, vsq, vsq);
+    XXSEL_1TI vector_select_v1ti {}
+
+  const vuq __builtin_vsx_xxsel_1ti_uns (vuq, vuq, vuq);
+    XXSEL_1TI_UNS vector_select_v1ti_uns {}
+
+  const vd __builtin_vsx_xxsel_2df (vd, vd, vd);
+    XXSEL_2DF vector_select_v2df {}
+
+  const vsll __builtin_vsx_xxsel_2di (vsll, vsll, vsll);
+    XXSEL_2DI vector_select_v2di {}
+
+  const vull __builtin_vsx_xxsel_2di_uns (vull, vull, vull);
+    XXSEL_2DI_UNS vector_select_v2di_uns {}
+
+  const vf __builtin_vsx_xxsel_4sf (vf, vf, vf);
+    XXSEL_4SF vector_select_v4sf {}
+
+  const vsi __builtin_vsx_xxsel_4si (vsi, vsi, vsi);
+    XXSEL_4SI vector_select_v4si {}
+
+  const vui __builtin_vsx_xxsel_4si_uns (vui, vui, vui);
+    XXSEL_4SI_UNS vector_select_v4si_uns {}
+
+  const vss __builtin_vsx_xxsel_8hi (vss, vss, vss);
+    XXSEL_8HI vector_select_v8hi {}
+
+  const vus __builtin_vsx_xxsel_8hi_uns (vus, vus, vus);
+    XXSEL_8HI_UNS vector_select_v8hi_uns {}
+
+  const vsc __builtin_vsx_xxsldwi_16qi (vsc, vsc, const int<5>);
+    XXSLDWI_16QI vsx_xxsldwi_v16qi {}
+
+  const vd __builtin_vsx_xxsldwi_2df (vd, vd, const int<5>);
+    XXSLDWI_2DF vsx_xxsldwi_v2df {}
+
+  const vsll __builtin_vsx_xxsldwi_2di (vsll, vsll, const int<5>);
+    XXSLDWI_2DI vsx_xxsldwi_v2di {}
+
+  const vf __builtin_vsx_xxsldwi_4sf (vf, vf, const int<5>);
+    XXSLDWI_4SF vsx_xxsldwi_v4sf {}
+
+  const vsi __builtin_vsx_xxsldwi_4si (vsi, vsi, const int<5>);
+    XXSLDWI_4SI vsx_xxsldwi_v4si {}
+
+  const vss __builtin_vsx_xxsldwi_8hi (vss, vss, const int<5>);
+    XXSLDWI_8HI vsx_xxsldwi_v8hi {}
+
+  const vd __builtin_vsx_xxspltd_2df (vd, const int<1>);
+    XXSPLTD_V2DF vsx_xxspltd_v2df {}
+
+  const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>);
+    XXSPLTD_V2DI vsx_xxspltd_v2di {}
+
+
-- 
2.17.1

[PATCH 23/29] rs6000: Add available-everywhere and ancient builtins

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-builtin-new.def: Add always, power5,
	and power6 builtins.
---
 gcc/config/rs6000/rs6000-builtin-new.def | 78 ++++++++++++++++++++++++
 1 file changed, 78 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 6c60177e4bb..1cb019bd4fb 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -163,6 +163,84 @@
 ; a semicolon are also treated as blank lines.
 
 
+; Builtins that have been around since time immemorial or are just
+; considered available everywhere.
+[always]
+  void __builtin_cpu_init ();
+    CPU_INIT nothing {cpu}
+
+  unsigned int __builtin_cpu_is (const char *);
+    CPU_IS nothing {cpu}
+
+  unsigned int __builtin_cpu_supports (const char *);
+    CPU_SUPPORTS nothing {cpu}
+
+  unsigned long long __builtin_ppc_get_timebase ();
+    GET_TB rs6000_get_timebase {}
+
+  double __builtin_mffs ();
+    MFFS rs6000_mffs {}
+
+  unsigned long long __builtin_ppc_mftb ();
+    MFTB rs6000_mftb_di {}
+
+  void __builtin_mtfsb0 (const int<5>);
+    MTFSB0 rs6000_mtfsb0 {}
+
+  void __builtin_mtfsb1 (const int<5>);
+    MTFSB1 rs6000_mtfsb1 {}
+
+  void __builtin_mtfsf (const int<8>, double);
+    MTFSF rs6000_mtfsf {}
+
+  const __ibm128 __builtin_pack_ibm128 (double, double);
+    PACK_IF packif {}
+
+  void __builtin_set_fpscr_rn (signed int);
+    SET_FPSCR_RN rs6000_set_fpscr_rn {}
+
+  const double __builtin_unpack_ibm128 (__ibm128, const int<1>);
+    UNPACK_IF unpackif {}
+
+
+; Builtins that have been around just about forever, but not quite.
+[power5]
+; #### Not sure what to do with this one.  It is apparently another
+; name for __builtin_pack_ibm128 when long double == __ibm128.
+; There isn't a lot of sense in having pack and unpack for _Float128.
+; Inclined to deprecate, should discuss with Steve Munroe.
+;  const long double __builtin_pack_longdouble (double, double);
+;    PACK_TF packtf {}
+
+  fpmath double __builtin_recipdiv (double, double);
+    RECIP recipdf3 {}
+
+  fpmath float __builtin_recipdivf (float, float);
+    RECIPF recipsf3 {}
+
+  fpmath double __builtin_rsqrt (double);
+    RSQRT rsqrtdf2 {}
+
+  fpmath float __builtin_rsqrtf (float);
+    RSQRTF rsqrtsf2 {}
+
+; #### Not sure what to do with this one.  It is apparently another
+; name for __builtin_unpack_ibm128 when long double == __ibm128.
+; There isn't a lot of sense in having pack and unpack for _Float128.
+; Inclined to deprecate, should discuss with Steve Munroe.
+;  const double __builtin_unpack_longdouble (long double, const int<1>);
+;    UNPACK_TF unpacktf {}
+
+
+; Power6 builtins.
+[power6]
+  const signed int __builtin_p6_cmpb (signed int, signed int);
+    CMPB cmpbdi3 {}
+
+  const signed int __builtin_p6_cmpb_32 (signed int, signed int);
+    CMPB_32 cmpbsi3 {}
+
+
 ; AltiVec builtins.
 [altivec]
   const vsc __builtin_altivec_abs_v16qi (vsc);
-- 
2.17.1

[PATCH 24/29] rs6000: Add Power7 builtins

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-builtin-new.def: Add power7 and
	power7-64 builtins.
---
 gcc/config/rs6000/rs6000-builtin-new.def | 39 ++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 1cb019bd4fb..0a17cad446c 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1938,3 +1938,42 @@
     XXSPLTD_V2DI vsx_xxspltd_v2di {}
 
 
+; Power7 builtins (ISA 2.06).
+[power7]
+  const unsigned int __builtin_addg6s (unsigned int, unsigned int);
+    ADDG6S addg6s {}
+
+  const signed long long __builtin_bpermd (signed long long, signed long long);
+    BPERMD bpermd_di {}
+
+  const unsigned int __builtin_cbcdtd (unsigned int);
+    CBCDTD cbcdtd {}
+
+  const unsigned int __builtin_cdtbcd (unsigned int);
+    CDTBCD cdtbcd {}
+
+  const signed int __builtin_divwe (signed int, signed int);
+    DIVWE dive_si {}
+
+  const unsigned int __builtin_divweu (unsigned int, unsigned int);
+    DIVWEU diveu_si {}
+
+  const vsq __builtin_pack_vector_int128 (unsigned long long, unsigned long long);
+    PACK_V1TI packv1ti {}
+
+  void __builtin_ppc_speculation_barrier ();
+    SPECBARR speculation_barrier {}
+
+  const unsigned long long __builtin_unpack_vector_int128 (vsq, const int<1>);
+    UNPACK_V1TI unpackv1ti {}
+
+
+; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
+[power7-64]
+  const signed long long __builtin_divde (signed long long, signed long long);
+    DIVDE dive_di {}
+
+  const unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
+    DIVDEU diveu_di {}
+
+
-- 
2.17.1

[PATCH 25/29] rs6000: Add Power8 vector builtins

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-builtin-new.def: Add power8-vector
	builtins.
---
 gcc/config/rs6000/rs6000-builtin-new.def | 417 +++++++++++++++++++++++
 1 file changed, 417 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 0a17cad446c..2f918c1d69e 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1977,3 +1977,420 @@
     DIVDEU diveu_di {}
 
 
+; Power8 vector built-ins.
+[power8-vector]
+  const vsll __builtin_altivec_abs_v2di (vsll);
+    ABS_V2DI absv2di2 {}
+
+  const vsc __builtin_altivec_eqv_v16qi (vsc, vsc);
+    EQV_V16QI eqvv16qi3 {}
+
+  const vuc __builtin_altivec_eqv_v16qi_uns (vuc, vuc);
+    EQV_V16QI_UNS eqvv16qi3 {}
+
+  const vsq __builtin_altivec_eqv_v1ti (vsq, vsq);
+    EQV_V1TI eqvv1ti3 {}
+
+  const vuq __builtin_altivec_eqv_v1ti_uns (vuq, vuq);
+    EQV_V1TI_UNS eqvv1ti3 {}
+
+  const vd __builtin_altivec_eqv_v2df (vd, vd);
+    EQV_V2DF eqvv2df3 {}
+
+  const vsll __builtin_altivec_eqv_v2di (vsll, vsll);
+    EQV_V2DI eqvv2di3 {}
+
+  const vull __builtin_altivec_eqv_v2di_uns (vull, vull);
+    EQV_V2DI_UNS eqvv2di3 {}
+
+  const vf __builtin_altivec_eqv_v4sf (vf, vf);
+    EQV_V4SF eqvv4sf3 {}
+
+  const vsi __builtin_altivec_eqv_v4si (vsi, vsi);
+    EQV_V4SI eqvv4si3 {}
+
+  const vui __builtin_altivec_eqv_v4si_uns (vui, vui);
+    EQV_V4SI_UNS eqvv4si3 {}
+
+  const vss __builtin_altivec_eqv_v8hi (vss, vss);
+    EQV_V8HI eqvv8hi3 {}
+
+  const vus __builtin_altivec_eqv_v8hi_uns (vus, vus);
+    EQV_V8HI_UNS eqvv8hi3 {}
+
+  const vsc __builtin_altivec_nand_v16qi (vsc, vsc);
+    NAND_V16QI nandv16qi3 {}
+
+  const vuc __builtin_altivec_nand_v16qi_uns (vuc, vuc);
+    NAND_V16QI_UNS nandv16qi3 {}
+
+  const vsq __builtin_altivec_nand_v1ti (vsq, vsq);
+    NAND_V1TI nandv1ti3 {}
+
+  const vuq __builtin_altivec_nand_v1ti_uns (vuq, vuq);
+    NAND_V1TI_UNS nandv1ti3 {}
+
+  const vd __builtin_altivec_nand_v2df (vd, vd);
+    NAND_V2DF nandv2df3 {}
+
+  const vsll __builtin_altivec_nand_v2di (vsll, vsll);
+    NAND_V2DI nandv2di3 {}
+
+  const vull __builtin_altivec_nand_v2di_uns (vull, vull);
+    NAND_V2DI_UNS nandv2di3 {}
+
+  const vf __builtin_altivec_nand_v4sf (vf, vf);
+    NAND_V4SF nandv4sf3 {}
+
+  const vsi __builtin_altivec_nand_v4si (vsi, vsi);
+    NAND_V4SI nandv4si3 {}
+
+  const vui __builtin_altivec_nand_v4si_uns (vui, vui);
+    NAND_V4SI_UNS nandv4si3 {}
+
+  const vss __builtin_altivec_nand_v8hi (vss, vss);
+    NAND_V8HI nandv8hi3 {}
+
+  const vus __builtin_altivec_nand_v8hi_uns (vus, vus);
+    NAND_V8HI_UNS nandv8hi3 {}
+
+  const vsc __builtin_altivec_neg_v16qi (vsc);
+    NEG_V16QI negv16qi2 {}
+
+  const vd __builtin_altivec_neg_v2df (vd);
+    NEG_V2DF negv2df2 {}
+
+  const vsll __builtin_altivec_neg_v2di (vsll);
+    NEG_V2DI negv2di2 {}
+
+  const vf __builtin_altivec_neg_v4sf (vf);
+    NEG_V4SF negv4sf2 {}
+
+  const vsi __builtin_altivec_neg_v4si (vsi);
+    NEG_V4SI negv4si2 {}
+
+  const vss __builtin_altivec_neg_v8hi (vss);
+    NEG_V8HI negv8hi2 {}
+
+  const vsc __builtin_altivec_orc_v16qi (vsc, vsc);
+    ORC_V16QI orcv16qi3 {}
+
+  const vuc __builtin_altivec_orc_v16qi_uns (vuc, vuc);
+    ORC_V16QI_UNS orcv16qi3 {}
+
+  const vsq __builtin_altivec_orc_v1ti (vsq, vsq);
+    ORC_V1TI orcv1ti3 {}
+
+  const vuq __builtin_altivec_orc_v1ti_uns (vuq, vuq);
+    ORC_V1TI_UNS orcv1ti3 {}
+
+  const vd __builtin_altivec_orc_v2df (vd, vd);
+    ORC_V2DF orcv2df3 {}
+
+  const vsll __builtin_altivec_orc_v2di (vsll, vsll);
+    ORC_V2DI orcv2di3 {}
+
+  const vull __builtin_altivec_orc_v2di_uns (vull, vull);
+    ORC_V2DI_UNS orcv2di3 {}
+
+  const vf __builtin_altivec_orc_v4sf (vf, vf);
+    ORC_V4SF orcv4sf3 {}
+
+  const vsi __builtin_altivec_orc_v4si (vsi, vsi);
+    ORC_V4SI orcv4si3 {}
+
+  const vui __builtin_altivec_orc_v4si_uns (vui, vui);
+    ORC_V4SI_UNS orcv4si3 {}
+
+  const vss __builtin_altivec_orc_v8hi (vss, vss);
+    ORC_V8HI orcv8hi3 {}
+
+  const vus __builtin_altivec_orc_v8hi_uns (vus, vus);
+    ORC_V8HI_UNS orcv8hi3 {}
+
+  const vsc __builtin_altivec_vclzb (vsc);
+    VCLZB clzv16qi2 {}
+
+  const vsll __builtin_altivec_vclzd (vsll);
+    VCLZD clzv2di2 {}
+
+  const vss __builtin_altivec_vclzh (vss);
+    VCLZH clzv8hi2 {}
+
+  const vsi __builtin_altivec_vclzw (vsi);
+    VCLZW clzv4si2 {}
+
+  const vsc __builtin_altivec_vgbbd (vsc);
+    VGBBD p8v_vgbbd {}
+
+  const vsq __builtin_altivec_vaddcuq (vsq, vsq);
+    VADDCUQ altivec_vaddcuq {}
+
+  const vsq __builtin_altivec_vaddecuq (vsq, vsq, vsq);
+    VADDECUQ altivec_vaddecuq {}
+
+  const vuq __builtin_altivec_vaddeuqm (vuq, vuq, vuq);
+    VADDEUQM altivec_vaddeuqm {}
+
+  const vsll __builtin_altivec_vaddudm (vsll, vsll);
+    VADDUDM addv2di3 {}
+
+  const vsq __builtin_altivec_vadduqm (vsq, vsq);
+    VADDUQM altivec_vadduqm {}
+
+  const vsll __builtin_altivec_vbpermq (vop, vsc);
+    VBPERMQ altivec_vbpermq {}
+
+  const vuc __builtin_altivec_vbpermq2 (vuc, vuc);
+    VBPERMQ2 altivec_vbpermq2 {}
+
+  const vbll __builtin_altivec_vcmpequd (vsll, vsll);
+    VCMPEQUD vector_eqv2di {}
+
+  const int __builtin_altivec_vcmpequd_p (int, vsll, vsll);
+    VCMPEQUD_P vector_eq_v2di_p {pred}
+
+  const vbll __builtin_altivec_vcmpgtsd (vsll, vsll);
+    VCMPGTSD vector_gtv2di {}
+
+  const int __builtin_altivec_vcmpgtsd_p (int, vsll, vsll);
+    VCMPGTSD_P vector_gt_v2di_p {pred}
+
+  const vbll __builtin_altivec_vcmpgtud (vull, vull);
+    VCMPGTUD vector_gtuv2di {}
+
+  const int __builtin_altivec_vcmpgtud_p (vull, vull);
+    VCMPGTUD_P vector_gtu_v2di_p {pred}
+
+  const vsll __builtin_altivec_vmaxsd (vsll, vsll);
+    VMAXSD smaxv2di3 {}
+
+  const vull __builtin_altivec_vmaxud (vull, vull);
+    VMAXUD umaxv2di3 {}
+
+  const vsll __builtin_altivec_vminsd (vsll, vsll);
+    VMINSD sminv2di3 {}
+
+  const vull __builtin_altivec_vminud (vull, vull);
+    VMINUD uminv2di3 {}
+
+  const vd __builtin_altivec_vmrgew_v2df (vd, vd);
+    VMRGEW_V2DF p8_vmrgew_v2df {}
+
+  const vsll __builtin_altivec_vmrgew_v2di (vsll, vsll);
+    VMRGEW_V2DI p8_vmrgew_v2di {}
+
+  const vf __builtin_altivec_vmrgew_v4sf (vf, vf);
+    VMRGEW_V4SF p8_vmrgew_v4sf {}
+
+  const vsi __builtin_altivec_vmrgew_v4si (vsi, vsi);
+    VMRGEW_V4SI p8_vmrgew_v4si {}
+
+  const vd __builtin_altivec_vmrgow_v2df (vd, vd);
+    VMRGOW_V2DF p8_vmrgow_v2df {}
+
+  const vsll __builtin_altivec_vmrgow_v2di (vsll, vsll);
+    VMRGOW_V2DI p8_vmrgow_v2di {}
+
+  const vf __builtin_altivec_vmrgow_v4sf (vf, vf);
+    VMRGOW_V4SF p8_vmrgow_v4sf {}
+
+  const vsi __builtin_altivec_vmrgow_v4si (vsi, vsi);
+    VMRGOW_V4SI p8_vmrgow_v4si {}
+
+  const vsll __builtin_altivec_vmulesw (vsi, vsi);
+    VMULESW vec_widen_smult_even_v4si {}
+
+  const vull __builtin_altivec_vmuleuw (vui, vui);
+    VMULEUW vec_widen_umult_even_v4si {}
+
+  const vsll __builtin_altivec_vmulosw (vsi, vsi);
+    VMULOSW vec_widen_smult_odd_v4si {}
+
+  const vull __builtin_altivec_vmulouw (vui, vui);
+    VMULOUW vec_widen_umult_odd_v4si {}
+
+  const vsc __builtin_altivec_vpermxor (vsc, vsc, vsc);
+    VPERMXOR altivec_vpermxor {}
+
+  const vsi __builtin_altivec_vpksdss (vsll, vsll);
+    VPKSDSS altivec_vpksdss {}
+
+  const vui __builtin_altivec_vpksdus (vsll, vsll);
+    VPKSDUS altivec_vpksdus {}
+
+  const vui __builtin_altivec_vpkudum (vull, vull);
+    VPKUDUM altivec_vpkudum {}
+
+  const vui __builtin_altivec_vpkudus (vull, vull);
+    VPKUDUS altivec_vpkudus {}
+
+; #### Following are duplicates of __builtin_crypto_vpmsum*.  This
+; can't have ever worked properly!
+;
+;  const vus __builtin_altivec_vpmsumb (vuc, vuc);
+;    VPMSUMB crypto_vpmsumb {}
+;
+;  const vuq __builtin_altivec_vpmsumd (vull, vull);
+;    VPMSUMD crypto_vpmsumd {}
+;
+;  const vui __builtin_altivec_vpmsumh (vus, vus);
+;    VPMSUMH crypto_vpmsumh {}
+;
+;  const vull __builtin_altivec_vpmsumw (vui, vui);
+;    VPMSUMW crypto_vpmsumw {}
+
+  const vuc __builtin_altivec_vpopcntb (vsc);
+    VPOPCNTB popcountv16qi2 {}
+
+  const vull __builtin_altivec_vpopcntd (vsll);
+    VPOPCNTD popcountv2di2 {}
+
+  const vus __builtin_altivec_vpopcnth (vss);
+    VPOPCNTH popcountv8hi2 {}
+
+  const vuc __builtin_altivec_vpopcntub (vuc);
+    VPOPCNTUB popcountv16qi2 {}
+
+  const vull __builtin_altivec_vpopcntud (vull);
+    VPOPCNTUD popcountv2di2 {}
+
+  const vus __builtin_altivec_vpopcntuh (vus);
+    VPOPCNTUH popcountv8hi2 {}
+
+  const vui __builtin_altivec_vpopcntuw (vui);
+    VPOPCNTUW popcountv4si2 {}
+
+  const vui __builtin_altivec_vpopcntw (vsi);
+    VPOPCNTW popcountv4si2 {}
+
+  const vsll __builtin_altivec_vrld (vsll, vull);
+    VRLD vrotlv2di3 {}
+
+  const vsll __builtin_altivec_vsld (vsll, vull);
+    VSLD vashlv2di3 {}
+
+  const vsll __builtin_altivec_vsrad (vsll, vull);
+    VSRAD vashrv2di3 {}
+
+  const vsll __builtin_altivec_vsrd (vsll, vull);
+    VSRD vlshrv2di3 {}
+
+  const vuq __builtin_altivec_vsubcuq (vuq, vuq);
+    VSUBCUQ altivec_vsubcuq {}
+
+  const vsq __builtin_altivec_vsubecuq (vsq, vsq, vsq);
+    VSUBECUQ altivec_vsubecuq {}
+
+  const vuq __builtin_altivec_vsubeuqm (vuq, vuq, vuq);
+    VSUBEUQM altivec_vsubeuqm {}
+
+  const vull __builtin_altivec_vsubudm (vull, vull);
+    VSUBUDM subv2di3 {}
+
+  const vuq __builtin_altivec_vsubuqm (vuq, vuq);
+    VSUBUQM altivec_vsubuqm {}
+
+  const vsll __builtin_altivec_vupkhsw (vsi);
+    VUPKHSW altivec_vupkhsw {}
+
+  const vsll __builtin_altivec_vupklsw (vsi);
+    VUPKLSW altivec_vupklsw {}
+
+  const vsq __builtin_bcdadd (vsq, vsq, const int<1>);
+    BCDADD bcdadd {}
+
+  const unsigned int __builtin_bcdadd_eq (vsq, vsq, const int<1>);
+    BCDADD_EQ bcdadd_eq {}
+
+  const unsigned int __builtin_bcdadd_gt (vsq, vsq, const int<1>);
+    BCDADD_GT bcdadd_gt {}
+
+  const unsigned int __builtin_bcdadd_lt (vsq, vsq, const int<1>);
+    BCDADD_LT bcdadd_lt {}
+
+  const unsigned int __builtin_bcdadd_ov (vsq, vsq, const int<1>);
+    BCDADD_OV bcdadd_unordered {}
+
+  const vsq __builtin_bcdsub (vsq, vsq, const int<1>);
+    BCDSUB bcdsub {}
+
+  const unsigned int __builtin_bcdsub_eq (vsq, vsq, const int<1>);
+    BCDSUB_EQ bcdsub_eq {}
+
+  const unsigned int __builtin_bcdsub_gt (vsq, vsq, const int<1>);
+    BCDSUB_GT bcdsub_gt {}
+
+  const unsigned int __builtin_bcdsub_lt (vsq, vsq, const int<1>);
+    BCDSUB_LT bcdsub_lt {}
+
+  const unsigned int __builtin_bcdsub_ov (vsq, vsq, const int<1>);
+    BCDSUB_OV bcdsub_unordered {}
+
+  const vuc __builtin_crypto_vpermxor_v16qi (vuc, vuc, vuc);
+    VPERMXOR_V16QI crypto_vpermxor_v16qi {}
+
+  const vull __builtin_crypto_vpermxor_v2di (vull, vull, vull);
+    VPERMXOR_V2DI crypto_vpermxor_v2di {}
+
+  const vui __builtin_crypto_vpermxor_v4si (vui, vui, vui);
+    VPERMXOR_V4SI crypto_vpermxor_v4si {}
+
+  const vus __builtin_crypto_vpermxor_v8hi (vus, vus, vus);
+    VPERMXOR_V8HI crypto_vpermxor_v8hi {}
+
+  const vus __builtin_crypto_vpmsumb (vuc, vuc);
+    VPMSUMB crypto_vpmsumb {}
+
+  const vuq __builtin_crypto_vpmsumd (vull, vull);
+    VPMSUMD crypto_vpmsumd {}
+
+  const vui __builtin_crypto_vpmsumh (vus, vus);
+    VPMSUMH crypto_vpmsumh {}
+
+  const vull __builtin_crypto_vpmsumw (vui, vui);
+    VPMSUMW crypto_vpmsumw {}
+
+  const vf __builtin_vsx_float2_v2df (vd, vd);
+    FLOAT2_V2DF float2_v2df {}
+
+  const vf __builtin_vsx_float2_v2di (vsll, vsll);
+    FLOAT2_V2DI float2_v2di {}
+
+  const vsc __builtin_vsx_revb_v16qi (vsc);
+    REVB_V16QI revb_v16qi {}
+
+  const vsq __builtin_vsx_revb_v1ti (vsq);
+    REVB_V1TI revb_v1ti {}
+
+  const vd __builtin_vsx_revb_v2df (vd);
+    REVB_V2DF revb_v2df {}
+
+  const vsll __builtin_vsx_revb_v2di (vsll);
+    REVB_V2DI revb_v2di {}
+
+  const vf __builtin_vsx_revb_v4sf (vf);
+    REVB_V4SF revb_v4sf {}
+
+  const vsi __builtin_vsx_revb_v4si (vsi);
+    REVB_V4SI revb_v4si {}
+
+  const vss __builtin_vsx_revb_v8hi (vss);
+    REVB_V8HI revb_v8hi {}
+
+  const vf __builtin_vsx_uns_float2_v2di (vull, vull);
+    UNS_FLOAT2_V2DI uns_float2_v2di {}
+
+  const vsi __builtin_vsx_vsigned2_v2df (vd, vd);
+    VEC_VSIGNED2_V2DF vsigned2_v2df {}
+
+  const vui __builtin_vsx_vunsigned2_v2df (vd, vd);
+    VEC_VUNSIGNED2_V2DF vunsigned2_v2df {}
+
+  const vf __builtin_vsx_xscvdpspn (double);
+    XSCVDPSPN vsx_xscvdpspn {}
+
+  const double __builtin_vsx_xscvspdpn (vf);
+    XSCVSPDPN vsx_xscvspdpn {}
+
+
-- 
2.17.1

[PATCH 26/29] rs6000: Add Power9 builtins

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-builtin-new.def: Add power9,
	power9-vector, and power9-64 builtins.
---
 gcc/config/rs6000/rs6000-builtin-new.def | 354 +++++++++++++++++++++++
 1 file changed, 354 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 2f918c1d69e..1338f543a6a 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -2394,3 +2394,357 @@
     XSCVSPDPN vsx_xscvspdpn {}
 
 
+; Power9 vector builtins.
+[power9-vector]
+  const vus __builtin_altivec_convert_4f32_8i16 (vf, vf);
+    CONVERT_4F32_8I16 convert_4f32_8i16 {}
+
+  const unsigned int __builtin_altivec_first_match_index_v16qi (vsc, vsc);
+    VFIRSTMATCHINDEX_V16QI first_match_index_v16qi {}
+
+  const unsigned int __builtin_altivec_first_match_index_v8hi (vss, vss);
+    VFIRSTMATCHINDEX_V8HI first_match_index_v8hi {}
+
+  const unsigned int __builtin_altivec_first_match_index_v4si (vsi, vsi);
+    VFIRSTMATCHINDEX_V4SI first_match_index_v4si {}
+
+  const unsigned int __builtin_altivec_first_match_or_eos_index_v16qi (vsc, vsc);
+    VFIRSTMATCHOREOSINDEX_V16QI first_match_or_eos_index_v16qi {}
+
+  const unsigned int __builtin_altivec_first_match_or_eos_index_v8hi (vss, vss);
+    VFIRSTMATCHOREOSINDEX_V8HI first_match_or_eos_index_v8hi {}
+
+  const unsigned int __builtin_altivec_first_match_or_eos_index_v4si (vsi, vsi);
+    VFIRSTMATCHOREOSINDEX_V4SI first_match_or_eos_index_v4si {}
+
+  const unsigned int __builtin_altivec_first_mismatch_index_v16qi (vsc, vsc);
+    VFIRSTMISMATCHINDEX_V16QI first_mismatch_index_v16qi {}
+
+  const unsigned int __builtin_altivec_first_mismatch_index_v8hi (vss, vss);
+    VFIRSTMISMATCHINDEX_V8HI first_mismatch_index_v8hi {}
+
+  const unsigned int __builtin_altivec_first_mismatch_index_v4si (vsi, vsi);
+    VFIRSTMISMATCHINDEX_V4SI first_mismatch_index_v4si {}
+
+  const unsigned int __builtin_altivec_first_mismatch_or_eos_index_v16qi (vsc, vsc);
+    VFIRSTMISMATCHOREOSINDEX_V16QI first_mismatch_or_eos_index_v16qi {}
+
+  const unsigned int __builtin_altivec_first_mismatch_or_eos_index_v8hi (vss, vss);
+    VFIRSTMISMATCHOREOSINDEX_V8HI first_mismatch_or_eos_index_v8hi {}
+
+  const unsigned int __builtin_altivec_first_mismatch_or_eos_index_v4si (vsi, vsi);
+    VFIRSTMISMATCHOREOSINDEX_V4SI first_mismatch_or_eos_index_v4si {}
+
+  const vuc __builtin_altivec_vadub (vuc, vuc);
+    VADUB vaduv16qi3 {}
+
+  const vus __builtin_altivec_vaduh (vus, vus);
+    VADUH vaduv8hi3 {}
+
+  const vui __builtin_altivec_vaduw (vui, vui);
+    VADUW vaduv4si3 {}
+
+  const vull __builtin_altivec_vbpermd (vull, vuc);
+    VBPERMD altivec_vbpermd {}
+
+  const signed int __builtin_altivec_vclzlsbb_v16qi (vsc);
+    VCLZLSBB_V16QI vclzlsbb_v16qi {}
+
+  const signed int __builtin_altivec_vclzlsbb_v4si (vsi);
+    VCLZLSBB_V4SI vclzlsbb_v4si {}
+
+  const signed int __builtin_altivec_vclzlsbb_v8hi (vss);
+    VCLZLSBB_V8HI vclzlsbb_v8hi {}
+
+  const vsc __builtin_altivec_vctzb (vsc);
+    VCTZB ctzv16qi2 {}
+
+  const vsll __builtin_altivec_vctzd (vsll);
+    VCTZD ctzv2di2 {}
+
+  const vss __builtin_altivec_vctzh (vss);
+    VCTZH ctzv8hi2 {}
+
+  const vsi __builtin_altivec_vctzw (vsi);
+    VCTZW ctzv4si2 {}
+
+  const signed int __builtin_altivec_vctzlsbb_v16qi (vsc);
+    VCTZLSBB_V16QI vctzlsbb_v16qi {}
+
+  const signed int __builtin_altivec_vctzlsbb_v4si (vsi);
+    VCTZLSBB_V4SI vctzlsbb_v4si {}
+
+  const signed int __builtin_altivec_vctzlsbb_v8hi (vss);
+    VCTZLSBB_V8HI vctzlsbb_v8hi {}
+
+  const signed int __builtin_altivec_vcmpaeb_p (vsc, vsc);
+    VCMPAEB_P vector_ae_v16qi_p {pred}
+
+  const signed int __builtin_altivec_vcmpaed_p (vsll, vsll);
+    VCMPAED_P vector_ae_v2di_p {pred}
+
+  const signed int __builtin_altivec_vcmpaedp_p (vd, vd);
+    VCMPAEDP_P vector_ae_v2df_p {pred}
+
+  const signed int __builtin_altivec_vcmpaefp_p (vf, vf);
+    VCMPAEFP_P vector_ae_v4sf_p {pred}
+
+  const signed int __builtin_altivec_vcmpaeh_p (vss, vss);
+    VCMPAEH_P vector_ae_v8hi_p {pred}
+
+  const signed int __builtin_altivec_vcmpaew_p (vsi, vsi);
+    VCMPAEW_P vector_ae_v4si_p {pred}
+
+  const vbc __builtin_altivec_vcmpneb (vsc, vsc);
+    CMPNEB vcmpneb {}
+
+  const signed int __builtin_altivec_vcmpneb_p (vsc, vsc);
+    VCMPNEB_P vector_ne_v16qi_p {pred}
+
+  const signed int __builtin_altivec_vcmpned_p (vsll, vsll);
+    VCMPNED_P vector_ne_v2di_p {pred}
+
+  const signed int __builtin_altivec_vcmpnedp_p (vd, vd);
+    VCMPNEDP_P vector_ne_v2df_p {pred}
+
+  const signed int __builtin_altivec_vcmpnefp_p (vf, vf);
+    VCMPNEFP_P vector_ne_v4sf_p {pred}
+
+  const vbs __builtin_altivec_vcmpneh (vss, vss);
+    CMPNEH vcmpneh {}
+
+  const signed int __builtin_altivec_vcmpneh_p (vss, vss);
+    VCMPNEH_P vector_ne_v8hi_p {pred}
+
+  const vbi __builtin_altivec_vcmpnew (vsi, vsi);
+    CMPNEW vcmpnew {}
+
+  const signed int __builtin_altivec_vcmpnew_p (vsi, vsi);
+    VCMPNEW_P vector_ne_v4si_p {pred}
+
+  const vbc __builtin_altivec_vcmpnezb (vsc, vsc);
+    CMPNEZB vcmpnezb {}
+
+  const signed int __builtin_altivec_vcmpnezb_p (signed int, vsc, vsc);
+    VCMPNEZB_P vector_nez_v16qi_p {pred}
+
+  const vbs __builtin_altivec_vcmpnezh (vss, vss);
+    CMPNEZH vcmpnezh {}
+
+  const signed int __builtin_altivec_vcmpnezh_p (signed int, vss, vss);
+    VCMPNEZH_P vector_nez_v8hi_p {pred}
+
+  const vbi __builtin_altivec_vcmpnezw (vsi, vsi);
+    CMPNEZW vcmpnezw {}
+
+  const signed int __builtin_altivec_vcmpnezw_p (vsi, vsi);
+    VCMPNEZW_P vector_nez_v4si_p {pred}
+
+  const unsigned char __builtin_altivec_vextublx (unsigned int, vuc);
+    VEXTUBLX vextublx {}
+
+  const unsigned char __builtin_altivec_vextubrx (unsigned int, vuc);
+    VEXTUBRX vextubrx {}
+
+  const unsigned short __builtin_altivec_vextuhlx (unsigned int, vus);
+    VEXTUHLX vextuhlx {}
+
+  const unsigned short __builtin_altivec_vextuhrx (unsigned int, vus);
+    VEXTUHRX vextuhrx {}
+
+  const unsigned int __builtin_altivec_vextuwlx (unsigned int, vui);
+    VEXTUWLX vextuwlx {}
+
+  const unsigned int __builtin_altivec_vextuwrx (unsigned int, vui);
+    VEXTUWRX vextuwrx {}
+
+  const vsll __builtin_altivec_vprtybd (vsll);
+    VPRTYBD parityv2di2 {}
+
+  const vsq __builtin_altivec_vprtybq (vsq);
+    VPRTYBQ parityv1ti2 {}
+
+  const vsi __builtin_altivec_vprtybw (vsi);
+    VPRTYBW parityv4si2 {}
+
+  const vull __builtiin_altivec_vrldmi (vull, vull, vull);
+    VRLDMI altivec_vrldmi {}
+
+  const vull __builtin_altivec_vrldnm (vull, vull);
+    VRLDNM altivec_vrldnm {}
+
+  const vui __builtin_altivec_vrlwmi (vui, vui, vui);
+    VRLWMI altivec_vrlwmi {}
+
+  const vui __builtin_altivec_vrlwnm (vui, vui);
+    VRLWNM altivec_vrlwnm {}
+
+  const vuc __builtin_altivec_vslv (vuc, vuc);
+    VSLV vslv {}
+
+  const vuc __builtin_altivec_vsrv (vuc, vuc);
+    VSRV vsrv {}
+
+  const signed int __builtin_scalar_byte_in_range (unsigned char, unsigned int);
+    CMPRB cmprb {}
+
+  const signed int __builtin_scalar_byte_in_either_range (unsigned char, unsigned int);
+    CMPRB2 cmprb2 {}
+
+  const vull __builtin_vsx_extract4b (vuc, signed int);
+    EXTRACT4B extract4b {}
+
+  const vull __builtin_vsx_extract_exp_dp (vd);
+    VEEDP xvxexpdp {}
+
+  const vui __builtin_vsx_extract_exp_sp (vf);
+    VEESP xvxexpsp {}
+
+  const vull __builtin_vsx_extract_sig_dp (vd);
+    VESDP xvxsigdp {}
+
+  const vui __builtin_vsx_extract_sig_sp (vf);
+    VESSP xvxsigsp {}
+
+  const vuc __builtin_vsx_insert4b (vsi, vuc, const int[0,12]);
+    INSERT4B insert4b {}
+
+  const vd __builtin_vsx_insert_exp_dp (vop, vull);
+    VIEDP xviexpdp {}
+
+  const vf __builtin_vsx_insert_exp_sp (vop, vull);
+    VIESP xviexpsp {}
+
+  const signed int __builtin_vsx_scalar_cmp_exp_dp_eq (double, double);
+    VSCEDPEQ xscmpexpdp_eq {}
+
+  const signed int __builtin_vsx_scalar_cmp_exp_dp_gt (double, double);
+    VSCEDPGT xscmpexpdp_gt {}
+
+  const signed int __builtin_vsx_scalar_cmp_exp_dp_lt (double, double);
+    VSCEDPLT xscmpexpdp_lt {}
+
+  const signed int __builtin_vsx_scalar_cmp_exp_dp_unordered (double, double);
+    VSCEDPUO xscmpexpdp_unordered {}
+
+  const unsigned int __builtin_vsx_scalar_test_data_class_dp (double, signed int);
+    VSTDCDP xststdcdp {}
+
+  const unsigned int __builtin_vsx_scalar_test_data_class_sp (float, signed int);
+    VSTDCSP xststdcsp {}
+
+  const unsigned int __builtin_vsx_scalar_test_neg_dp (double);
+    VSTDCNDP xststdcnegdp {}
+
+  const unsigned int __builtin_vsx_scalar_test_neg_sp (float);
+    VSTDCNSP xststdcnegsp {}
+
+  const unsigned long long __builtin_vsx_test_data_class_dp (vd, signed int);
+    VTDCDP xvtstdcdp {}
+
+  const unsigned int __builtin_vsx_test_data_class_sp (vf, signed int);
+    VTDCSP xvtstdcsp {}
+
+  const vf __builtin_vsx_vextract_fp_from_shorth (vus);
+    VEXTRACT_FP_FROM_SHORTH vextract_fp_from_shorth {}
+
+  const vf __builtin_vsx_vextract_fp_from_shortl (vus);
+    VEXTRACT_FP_FROM_SHORTL vextract_fp_from_shortl {}
+
+  const vd __builtin_vsx_xxbrd_v2df (vd);
+    XXBRD_V2DF p9_xxbrd_v2df {}
+
+  const vsll __builtin_vsx_xxbrd_v2di (vsll);
+    XXBRD_V2DI p9_xxbrd_v2di {}
+
+  const vss __builtin_vsx_xxbrh_v8hi (vss);
+    XXBRH_V8HI p9_xxbrh_v8hi {}
+
+  const vsc __builtin_vsx_xxbrq_v16qi (vsc);
+    XXBRQ_V16QI p9_xxbrq_v16qi {}
+
+  const vsq __builtin_vsx_xxbrq_v1ti (vsq);
+    XXBRQ_V1TI p9_xxbrq_v1ti {}
+
+  const vf __builtin_vsx_xxbrw_v4sf (vf);
+    XXBRW_V4SF p9_xxbrw_v4sf {}
+
+  const vsi __builtin_vsx_xxbrw_v4si (vsi);
+    XXBRW_V4SI p9_xxbrw_v4si {}
+
+
+; Miscellaneour P9 functions
+[power9]
+  signed long long __builtin_darn ();
+    DARN darn {}
+
+  signed int __builtin_darn_32 ();
+    DARN_32 darn_32 {}
+
+  signed long long __builtin_darn_raw ();
+    DARN_RAW darn_raw {}
+
+  const signed int __builtin_dtstsfi_eq_dd (unsigned int, _Decimal64);
+    TSTSFI_EQ_DD dfptstsfi_eq_dd {}
+
+  const signed int __builtin_dtstsfi_eq_td (unsigned int, _Decimal128);
+    TSTSFI_EQ_TD dfptstsfi_eq_td {}
+
+  const signed int __builtin_dtstsfi_gt_dd (unsigned int, _Decimal64);
+    TSTSFI_GT_DD dfptstsfi_gt_dd {}
+
+  const signed int __builtin_dtstsfi_gt_td (unsigned int, _Decimal128);
+    TSTSFI_GT_TD dfptstsfi_gt_td {}
+
+  const signed int __builtin_dtstsfi_lt_dd (unsigned int, _Decimal64);
+    TSTSFI_LT_DD dfptstsfi_lt_dd {}
+
+  const signed int __builtin_dtstsfi_lt_td (unsigned int, _Decimal128);
+    TSTSFI_LT_TD dfptstsfi_lt_td {}
+
+  const signed int __builtin_dtstsfi_ov_dd (unsigned int, _Decimal64);
+    TSTSFI_OV_DD dfptstsfi_unordered_dd {}
+
+  const signed int __builtin_dtstsfi_ov_td (unsigned int, _Decimal128);
+    TSTSFI_OV_TD dfptstsfi_unordered_td {}
+
+
+; These things need some review to see whether they really require
+; MASK_POWERPC64.  For xsxexpdp, this seems to be fine for 32-bit,
+; because the result will always fit in 32 bits and the return
+; value is SImode; but the pattern currently requires TARGET_64BIT.
+; On the other hand, xsssigdp has a result that doesn't fit in
+; 32 bits, and the return value is DImode, so it seems that
+; TARGET_64BIT (actually TARGET_POWERPC64) is justified.  TBD. ####
+[power9-64]
+; The following two are inexplicably named __builtin_altivec_* while
+; their load counterparts are __builtin_vsx_*.  Need to deprecate
+; these interfaces in favor of the other naming scheme (or vice versa).
+  void __builtin_altivec_xst_len_r (vop, void *, unsigned long long);
+    XST_LEN_R xst_len_r {}
+
+  void __builtin_altivec_stxvl (vop, void *, unsigned long long);
+    STXVL stxvl {}
+
+  const signed int __builtin_scalar_byte_in_set (unsigned char, unsigned long long);
+    CMPEQB cmpeqb {}
+
+  pure vop __builtin_vsx_lxvl (void *, unsigned long long);
+    LXVL lxvl {}
+
+  const unsigned int __builtin_vsx_scalar_extract_exp (double);
+    VSEEDP xsxexpdp {}
+
+  const unsigned long long __builtin_vsx_scalar_extract_sig (double);
+    VSESDP xsxsigdp {}
+
+  const double __builtin_vsx_scalar_insert_exp (unsigned long long, unsigned long long);
+    VSIEDP xsiexpdp {}
+
+  const double __builtin_vsx_scalar_insert_exp_dp (double, unsigned long long);
+    VSIEDPF xsiexpdpf {}
+
+  pure vuc __builtin_vsx_xl_len_r (void *, unsigned long long);
+    XL_LEN_R xl_len_r {}
+
+
-- 
2.17.1

[PATCH 27/29] rs6000: Add remaining builtins

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-builtin-new.def: Add ieee128-hw, dfp,
	crypto, and htm builtins.
---
 gcc/config/rs6000/rs6000-builtin-new.def | 217 +++++++++++++++++++++++
 1 file changed, 217 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 1338f543a6a..ce2e3c2476b 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -2748,3 +2748,220 @@
     XL_LEN_R xl_len_r {}
 
 
+; Builtins requiring hardware support for IEEE-128 floating-point.
+[ieee128-hw]
+  fpmath _Float128 __builtin_vsx_addf128_round_to_odd (_Float128, _Float128);
+    ADDF128_ODD addkf3_odd {}
+
+  fpmath _Float128 __builtin_vsx_divf128_round_to_odd (_Float128, _Float128);
+    DIVF128_ODD divkf3_odd {}
+
+  fpmath _Float128 __builtin_vsx_fmaf128_round_to_odd (_Float128, _Float128, _Float128);
+    FMAF128_ODD fmakf4_odd {}
+
+  fpmath _Float128 __builtin_vsx_mulf128_round_to_odd (_Float128, _Float128);
+    MULF128_ODD mulkf3_odd {}
+
+  const unsigned long long __builtin_vsx_scalar_extract_expq (_Float128);
+    VSEEQP xsxexpqp_kf {}
+
+  const unsigned __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
+    VSESQP xsxsigqp_kf {}
+
+  const signed int __buiiltin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128);
+    VSCEQPEQ xscmpexpqp_eq_kf {}
+
+  const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128);
+    VSCEQPGT xscmpexpqp_gt_kf {}
+
+  const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128);
+    VSCEQPLT xscmpexpqp_lt_kf {}
+
+  const signed int __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128);
+    VSCEQPUO xscmpexpqp_unordered_kf {}
+
+  const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, unsigned long long);
+    VSIEQP xsiexpqp_kf {}
+
+  const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, unsigned long long);
+    VSIEQPF xsiexpqpf_kf {}
+
+  const unsigned int __builtin_vsx_scalar_test_data_class_qp (_Float128, signed int);
+    VSTDCQP xststdcqp_kf {}
+
+  const unsigned int __builtin_vsx_scalar_test_neg_qp (_Float128);
+    VSTDCNQP xststdcnegqp_kf {}
+
+  fpmath _Float128 __builtin_vsx_sqrtf128_round_to_odd (_Float128);
+    SQRTF128_ODD sqrtkf2_odd {}
+
+  fpmath _Float128 __builtin_vsx_subf128_round_to_odd (_Float128, _Float128);
+    SUBF128_ODD subkf3_odd {}
+
+  fpmath double __builtin_vsx_truncf128_round_to_odd (_Float128);
+    TRUNCF128_ODD trunckfdf2_odd {}
+
+
+
+; Decimal floating-point builtins.
+[dfp]
+  const _Decimal64 __builtin_ddedpd (const int<0,2>, _Decimal64);
+    DDEDPD dfp_ddedpd_dd {}
+
+  const _Decimal128 __builtin_ddedpdq (const int<0,2>, _Decimal128);
+    DDEDPDQ dfp_ddedpd_td {}
+
+  const _Decimal64 __builtin_denbcd (const int<1>, _Decimal64);
+    DENBCD dfp_denbcd_dd {}
+
+  const _Decimal128 __builtin_denbcdq (const int<1>, _Decimal128);
+    DENBCDQ dfp_denbcd_td {}
+
+  const _Decimal64 __builtin_diex (signed long long, _Decimal64);
+    DIEX dfp_diex_dd {}
+
+  const _Decimal128 __builtin_diexq (signed long long, _Decimal128);
+    DIEXQ dfp_diex_td {}
+
+  const _Decimal64 __builtin_dscli (_Decimal64, const int<6>);
+    DSCLI dfp_dscli_dd {}
+
+  const _Decimal128 __builtin_dscliq (_Decimal128, const int<6>);
+    DSCLIQ dfp_dscli_td {}
+
+  const _Decimal64 __builtin_dscri (_Decimal64, const int<6>);
+    DSCRI dfp_dscri_dd {}
+
+  const _Decimal128 __builtin_dscriq (_Decimal128, const int<6>);
+    DSCRIQ dfp_dscri_td {}
+
+  const signed long long __builtin_dxex (_Decimal64);
+    DXEX dfp_dxex_dd {}
+
+  const signed long long __builtin_dxexq (_Decimal128);
+    DXEXQ dfp_dxex_td {}
+
+  const _Decimal128 __builtin_pack_dec128 (unsigned long long, unsigned long long);
+    PACK_TD packtd {}
+
+  void __builtin_set_fpscr_drn (signed int);
+    SET_FPSCR_DRN rs6000_set_fpscr_drn {}
+
+  const unsigned long long __builtin_unpack_dec128 (_Decimal128, const int<1>);
+    UNPACK_TD unpacktd {}
+
+
+[crypto]
+  const vull __builtin_crypto_vcipher (vull, vull);
+    VCIPHER crypto_vcipher_v2di {}
+
+  const vuc __builtin_crypto_vcipher_be (vuc, vuc);
+    VCIPHER_BE crypto_vcipher_v16qi {}
+
+  const vull __builtin_crypto_vcipherlast (vull, vull);
+    VCIPHERLAST crypto_vcipherlast_v2di {}
+
+  const vuc __builtin_crypto_vcipherlast_be (vuc, vuc);
+    VCIPHERLAST_BE crypto_vcipherlast_v16qi {}
+
+  const vull __builtin_crypto_vncipher (vull, vull);
+    VNCIPHER crypto_vncipher_v2di {}
+
+  const vuc __builtin_crypto_vncipher_be (vuc, vuc);
+    VNCIPHER_BE crypto_vncipher_v16qi {}
+
+  const vull __builtin_crypto_vncipherlast (vull, vull);
+    VNCIPHERLAST crypto_vncipherlast_v2di {}
+
+  const vuc __builtin_crypto_vncipherlast_be (vuc, vuc);
+    VNCIPHERLAST_BE crypto_vncipherlast_v16qi {}
+
+  const vull __builtin_crypto_vsbox (vull);
+    VSBOX crypto_vsbox_v2di {}
+
+  const vuc __builtin_crypto_vsbox_be (vuc);
+    VSBOX_BE crypto_vsbox_v16qi {}
+
+  const vull __builtin_crypto_vshasigmad (vull, const int<1>, const int<4>);
+    VSHASIGMAD crypto_vshasigmad {}
+
+  const vui __builtin_crypto_vshasigmaw (vui, const int<1>, const int<4>);
+    VSHASIGMAW crypto_vshasigmaw {}
+
+
+[htm]
+  unsigned long long __builtin_get_texasr ();
+    GET_TEXASR nothing {htm,htmspr}
+
+  unsigned long long __builtin_get_texasru ();
+    GET_TEXASRU nothing {htm,htmspr}
+
+  unsigned long long __builtin_get_tfhar ();
+    GET_TFHAR nothing {htm,htmspr}
+
+  unsigned long long __builtin_get_tfiar ();
+    GET_TFIAR nothing {htm,htmspr}
+
+  void __builtin_set_texasr (unsigned long long);
+    SET_TEXASR nothing {htm,htmspr}
+
+  void __builtin_set_texasru (unsigned long long);
+    SET_TEXASRU nothing {htm,htmspr}
+
+  void __builtin_set_tfhar (unsigned long long);
+    SET_TFHAR nothing {htm,htmspr}
+
+  void __builtin_set_tfiar (unsigned long long);
+    SET_TFIAR nothing {htm,htmspr}
+
+  unsigned int __builtin_tabort (unsigned int);
+    TABORT tabort {htm,htmcr}
+
+  unsigned int __builtin_tabortdc (unsigned int, unsigned int, unsigned int);
+    TABORTDC tabortdc {htm,htmcr}
+
+  unsigned int __builtin_tabortdci (unsigned int, unsigned int, signed int);
+    TABORTDCI tabortdci {htm,htmcr}
+
+  unsigned int __builtin_tabortwc (unsigned int, unsigned int, unsigned int);
+    TABORTWC tabortwc {htm,htmcr}
+
+  unsigned int __builtin_tabortwci (unsigned int, unsigned int, signed int);
+    TABORTWCI tabortwci {htm,htmcr}
+
+  unsigned int __builtin_tbegin (unsigned int);
+    TBEGIN tbegin {htm,htmcr}
+
+  unsigned int __builtin_tcheck ();
+    TCHECK tcheck {htm,htmcr}
+
+  unsigned int __builtin_tend (unsigned int);
+    TEND tend {htm,htmcr}
+
+  unsigned int __builtin_tendall ();
+    TENDALL tend {htm,htmcr}
+
+  unsigned int __builtin_trechkpt ();
+    TRECHKPT trechkpt {htm,htmcr}
+
+  unsigned int __builtin_treclaim (unsigned int);
+    TRECLAIM treclaim {htm,htmcr}
+
+  unsigned int __builtin_tresume ();
+    TRESUME tsr {htm,htmcr}
+
+  unsigned int __builtin_tsr (unsigned int);
+    TSR tsr {htm,htmcr}
+
+  unsigned int __builtin_tsuspend ();
+    TSUSPEND tsr {htm,htmcr}
+
+  unsigned int __builtin_ttest (unsigned int, unsigned int, signed int);
+    TTEST ttest {htm,htmcr}
+
+
+; #### We don't yet have the Darwin CfString builtin supported, but
+; that has its own special handling so it should go in there, I guess.
+;
+; BU_SPECIAL_X (RS6000_BUILTIN_CFSTRING, "__builtin_cfstring", RS6000_BTM_ALWAYS,
+;	      RS6000_BTC_MISC)
-- 
2.17.1

[PATCH 28/29] rs6000: Add comments to help with transition

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-builtin.def: Add comments.
	* config/rs6000/rs6000-call.c: Likewise.
---
 gcc/config/rs6000/rs6000-builtin.def |  15 +++
 gcc/config/rs6000/rs6000-call.c      | 166 +++++++++++++++++++++++++++
 2 files changed, 181 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index f7037552faf..83b31cbbbce 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -1783,8 +1783,10 @@ BU_VSX_3 (XXPERMDI_4SF,       "xxpermdi_4sf",   CONST, 	vsx_xxpermdi_v4sf)
 BU_VSX_3 (XXPERMDI_4SI,       "xxpermdi_4si",   CONST, 	vsx_xxpermdi_v4si)
 BU_VSX_3 (XXPERMDI_8HI,       "xxpermdi_8hi",   CONST, 	vsx_xxpermdi_v8hi)
 BU_VSX_3 (XXPERMDI_16QI,      "xxpermdi_16qi",  CONST, 	vsx_xxpermdi_v16qi)
+/* Following one needs an _UNS version.  */
 BU_VSX_3 (SET_1TI,            "set_1ti",        CONST, 	vsx_set_v1ti)
 BU_VSX_3 (SET_2DF,            "set_2df",        CONST, 	vsx_set_v2df)
+/* Following one needs an _UNS version.  */
 BU_VSX_3 (SET_2DI,            "set_2di",        CONST, 	vsx_set_v2di)
 BU_VSX_3 (XXSLDWI_2DI,        "xxsldwi_2di",    CONST, 	vsx_xxsldwi_v2di)
 BU_VSX_3 (XXSLDWI_2DF,        "xxsldwi_2df",    CONST, 	vsx_xxsldwi_v2df)
@@ -1828,8 +1830,11 @@ BU_VSX_2 (CPSGNDP,	      "cpsgndp",	CONST,	vector_copysignv2df3)
 BU_VSX_2 (CPSGNSP,	      "cpsgnsp",	CONST,	vector_copysignv4sf3)
 
 BU_VSX_2 (CONCAT_2DF,	      "concat_2df",	CONST,	vsx_concat_v2df)
+/* Following one needs an _UNS version.  */
 BU_VSX_2 (CONCAT_2DI,	      "concat_2di",	CONST,	vsx_concat_v2di)
+/* Following two should be unary functions?!  */
 BU_VSX_2 (SPLAT_2DF,	      "splat_2df",	CONST,	vsx_splat_v2df)
+/* Following one also needs an _UNS version.  */
 BU_VSX_2 (SPLAT_2DI,	      "splat_2di",	CONST,	vsx_splat_v2di)
 BU_VSX_2 (XXMRGHW_4SF,	      "xxmrghw",	CONST,	vsx_xxmrghw_v4sf)
 BU_VSX_2 (XXMRGHW_4SI,	      "xxmrghw_4si",	CONST,	vsx_xxmrghw_v4si)
@@ -2009,6 +2014,12 @@ BU_VSX_X (ST_ELEMREV_V4SF,    "st_elemrev_v4sf",  MEM)
 BU_VSX_X (ST_ELEMREV_V4SI,    "st_elemrev_v4si",  MEM)
 BU_VSX_X (ST_ELEMREV_V8HI,    "st_elemrev_v8hi",  MEM)
 BU_VSX_X (ST_ELEMREV_V16QI,   "st_elemrev_v16qi", MEM)
+/* #### Following builtins appear to be orphaned with no implementation.
+   They are all marked as requiring special handling, but there is no
+   special handling for them.  For now I am not sure we really miss
+   anything by not having these; they all have regular float counterparts
+   and there is little utility in forcing these with builtins.  No plan
+   to put them in rs6000-builtins-new.def.  */
 BU_VSX_X (XSABSDP,	      "xsabsdp",	CONST)
 BU_VSX_X (XSADDDP,	      "xsadddp",	FP)
 BU_VSX_X (XSCMPODP,	      "xscmpodp",	FP)
@@ -2033,6 +2044,7 @@ BU_VSX_X (XSNMADDMDP,	      "xsnmaddmdp",	FP)
 BU_VSX_X (XSNMSUBADP,	      "xsnmsubadp",	FP)
 BU_VSX_X (XSNMSUBMDP,	      "xsnmsubmdp",	FP)
 BU_VSX_X (XSSUBDP,	      "xssubdp",	FP)
+/* #### End orphaned builtins.  */
 BU_VSX_X (VEC_INIT_V1TI,      "vec_init_v1ti",	CONST)
 BU_VSX_X (VEC_INIT_V2DF,      "vec_init_v2df",	CONST)
 BU_VSX_X (VEC_INIT_V2DI,      "vec_init_v2di",	CONST)
@@ -2394,6 +2406,7 @@ BU_P9V_VSX_2 (VSCEDPLT,	"scalar_cmp_exp_dp_lt",	CONST,	xscmpexpdp_lt)
 BU_P9V_VSX_2 (VSCEDPEQ,	"scalar_cmp_exp_dp_eq",	CONST,	xscmpexpdp_eq)
 BU_P9V_VSX_2 (VSCEDPUO,	"scalar_cmp_exp_dp_unordered",	CONST,	xscmpexpdp_unordered)
 
+/* Shouldn't these be BU_FLOAT128_HW_VSX_2?  */
 BU_P9V_VSX_2 (VSCEQPGT,	"scalar_cmp_exp_qp_gt",	CONST,	xscmpexpqp_gt_kf)
 BU_P9V_VSX_2 (VSCEQPLT,	"scalar_cmp_exp_qp_lt",	CONST,	xscmpexpqp_lt_kf)
 BU_P9V_VSX_2 (VSCEQPEQ,	"scalar_cmp_exp_qp_eq",	CONST,	xscmpexpqp_eq_kf)
@@ -2500,6 +2513,8 @@ BU_FLOAT128_HW_3 (FMAF128_ODD,   "fmaf128_round_to_odd",   FP, fmakf4_odd)
 
 /* 3 argument vector functions returning void, treated as SPECIAL,
    added in ISA 3.0 (power9).  */
+/* ??? Why are these named __builtin_altivec_* when the corresponding
+   load builtins are named __builtin_vsx_*??  */
 BU_P9V_64BIT_AV_X (STXVL,	"stxvl",	MISC)
 BU_P9V_64BIT_AV_X (XST_LEN_R,	"xst_len_r",	MISC)
 
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 5ec3f2c55ad..70813a3bb9f 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -444,48 +444,56 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
 
   /* Binary AltiVec/VSX builtins.  */
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin.def.  */
   { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,
     RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin.def.  */
   { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM,
@@ -505,12 +513,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
+  /* Next 4 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM,
@@ -521,12 +531,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
+  /* Next 4 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM,
@@ -537,12 +549,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 4 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM,
@@ -566,36 +580,42 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI },
   { ALTIVEC_BUILTIN_VEC_ADDEC, P8V_BUILTIN_VADDECUQ,
     RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS,
@@ -604,6 +624,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  /* Next 4 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS,
@@ -614,12 +635,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next 4 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS,
@@ -630,12 +653,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 4 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS,
@@ -646,6 +671,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS,
@@ -653,24 +679,28 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
 
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
+  /* Next 2 deprecated/bogus, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
+  /* Next 2 deprecated/bogus, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V2DI_UNS,
@@ -679,12 +709,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS,
     RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V4SI_UNS,
@@ -693,26 +725,31 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS,
     RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V8HI_UNS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
+  /* Next one deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS,
     RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
+  /* Next one deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND_V16QI_UNS,
@@ -722,18 +759,21 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
 
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI,
@@ -742,18 +782,21 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V2DI_UNS,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS,
     RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V4SI_UNS,
@@ -762,26 +805,31 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS,
     RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
+  /* Next two deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next two deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V8HI_UNS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
+  /* Next 1 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
     RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
+  /* Next 1 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC_V16QI_UNS,
@@ -1087,12 +1135,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
+  /* Next 1 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
   { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
+  /* Next 1 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 },
   { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI,
@@ -1131,6 +1181,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
   { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
     RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
   { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX,
@@ -1169,6 +1220,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
      vector unsigned int vec_ldl (int, unsigned int *); */
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,
     RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 },
+  /* Next 1 nonsensical, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,
     RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_int, 0 },
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI,
@@ -1189,6 +1241,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
      vector unsigned short vec_ldl (int, unsigned short *); */
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,
     RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 },
+  /* Next 1 nonsensical, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,
     RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_short, 0 },
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI,
@@ -1210,6 +1263,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
      vector unsigned char vec_ldl (int, unsigned char *); */
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,
     RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 },
+  /* Next 1 nonsensical, not in rs6000-builtin.def.  */
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,
     RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_char, 0 },
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI,
@@ -1237,6 +1291,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
          vector bool long long vec_ldl (int, bool long long *); */
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },
+  /* Next 1 nonsensical, not in rs6000-builtin.def.  */
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
   { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI,
@@ -1254,6 +1309,8 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
   { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
+  /* The rest of LVSL instances are deprecated, not in
+     rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
   { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL,
@@ -1283,6 +1340,8 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
   { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 },
+  /* The rest of LVSR instances are deprecated, not in
+     rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 },
   { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR,
@@ -1452,36 +1511,42 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW,
@@ -1640,12 +1705,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
   { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
+  /* Next 2 deprecated, not in rs60000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI,
@@ -1674,36 +1741,42 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB,
     RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW,
@@ -1716,6 +1789,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD,
     RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD,
@@ -1850,12 +1924,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
   { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR_V2DI_UNS,
@@ -1883,24 +1959,28 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
 
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V2DI_UNS,
@@ -1909,12 +1989,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS,
     RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V4SI_UNS,
@@ -1923,26 +2005,31 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS,
     RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V8HI_UNS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
+  /* Next 1 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS,
     RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
+  /* Next 1 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR_V16QI_UNS,
@@ -2171,18 +2258,21 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Following 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 5 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
@@ -2195,12 +2285,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 5 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
@@ -2213,18 +2305,21 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 3 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
@@ -2236,6 +2331,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 3 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
     RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL,
@@ -2391,18 +2487,21 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 3 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
@@ -2415,12 +2514,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 5 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
@@ -2433,18 +2534,21 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtine-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 3 deprecated, not in rs6000-builtine-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
     RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR,
@@ -2496,36 +2600,42 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
 
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  /* Next two deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM,
@@ -2614,36 +2724,42 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { ALTIVEC_BUILTIN_VEC_SUBC, P8V_BUILTIN_VSUBCUQ,
     RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 },
 
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS,
@@ -2729,6 +2845,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },
   { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
+  /* Next 1 redundant, not in rs6000-builtin-new.def.  */
   { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 },
   { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI,
@@ -2737,6 +2854,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
     ~RS6000_BTI_unsigned_long_long, 0 },
+  /* Next 1 redundant, not in rs6000-builtin-new.def.  */
   { VSX_BUILTIN_VEC_XL, VSX_BUILTIN_LXVD2X_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 },
 
@@ -2820,24 +2938,28 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
 
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI,
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V2DI_UNS,
@@ -2846,12 +2968,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS,
     RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V4SI_UNS,
@@ -2860,12 +2984,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
     RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
@@ -2873,18 +2999,21 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V8HI_UNS,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
 
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
     RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
     RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
     RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
   { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR_V16QI_UNS,
@@ -3168,6 +3297,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI },
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI },
+  /* Next 2 appear bogus, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DI },
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF,
@@ -3176,12 +3306,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI },
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI },
+  /* Next 1 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI },
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI },
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },
+  /* Next 1 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI },
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI,
@@ -3194,6 +3326,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI },
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF,
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI },
+  /* Next 2 appear bogus, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF },
   { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI,
@@ -3310,6 +3443,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,
     RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,
     ~RS6000_BTI_long_long },
+  /* Next 1 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI,
     RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI,
     ~RS6000_BTI_unsigned_long_long },
@@ -3808,15 +3942,19 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 },
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 },
+  /* This is highly questionable, V2DI mapping to V1TI???  */
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
     RS6000_BTI_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_INTTI, 0 },
+  /* Next one deprecated, not in rs6000-builtin.def.  */
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
     RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 },
+  /* This is highly questionable, V2DI mapping to V1TI???  */
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
     RS6000_BTI_unsigned_V1TI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTTI, 0 },
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI,
     ~RS6000_BTI_unsigned_V2DI, 0 },
+  /* Next one deprecated, not in rs6000-builtin.def.  */
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long_long, 0 },
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI,
@@ -3831,6 +3969,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 },
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 },
+  /* Next 1 deprecated, not in rs6000-builtin-new.def.  */
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 },
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
@@ -3838,6 +3977,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     ~RS6000_BTI_unsigned_V4SI, 0 },
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 },
+  /* Next 1 deprecated, not in rs6000-builtin-new.def.  */
   { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI,
     ~RS6000_BTI_unsigned_long, 0 },
@@ -3954,18 +4094,21 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     ~RS6000_BTI_pixel_V8HI },
 
   /* Predicates.  */
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
@@ -3974,12 +4117,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
+  /* Next 4 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI },
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
   { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
@@ -4008,12 +4153,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
 
 
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
@@ -4022,6 +4169,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
@@ -4030,6 +4178,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
@@ -4038,12 +4187,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
@@ -4052,12 +4203,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI },
   { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P,
@@ -4075,18 +4228,21 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   /* cmpge is the same as cmpgt for all cases except floating point.
      There is further code to deal with this special case in
      altivec_build_resolved_builtin.  */
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P,
@@ -4095,6 +4251,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI },
+  /* Next 4 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P,
@@ -4105,18 +4262,21 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P,
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI },
   { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P,
@@ -4129,6 +4289,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF },
 
   /* Power8 vector overloaded functions.  */
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 },
   { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI,
@@ -4137,6 +4298,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
   { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS,
     RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI_UNS,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI,
     RS6000_BTI_unsigned_V16QI, 0 },
@@ -5043,6 +5205,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { P9V_BUILTIN_VEC_VEXTRACT_FP_FROM_SHORTL, P9V_BUILTIN_VEXTRACT_FP_FROM_SHORTL,
     RS6000_BTI_V4SF, RS6000_BTI_unsigned_V8HI, 0, 0 },
 
+  /* Following ones have rules violations for scalar types.  */
   { P9V_BUILTIN_VEC_VEXTULX, P9V_BUILTIN_VEXTUBLX,
     RS6000_BTI_INTQI, RS6000_BTI_UINTSI,
     RS6000_BTI_V16QI, 0 },
@@ -5141,6 +5304,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
 
+  /* Next two deprecated, not in rs6000-builtin-new.def.  */
   { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI,
     RS6000_BTI_unsigned_V2DI, 0 },
@@ -5367,12 +5531,14 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
     RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI,
     RS6000_BTI_unsigned_V1TI, 0 },
 
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,
     RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 },
   { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 },
   { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,
     RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
+  /* Next 2 deprecated, not in rs6000-builtin-new.def.  */
   { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
   { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM,
-- 
2.17.1

[PATCH 29/29] rs6000: Call rs6000_autoinit_builtins from rs6000_builtins

[Bill Schmidt]

From: Bill Schmidt <wschmidt@linux.ibm.com>

2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-call.c (rs6000-builtins.h): New #include.
	(rs6000_init_builtins): Call rs6000_autoinit_builtins.
---
 gcc/config/rs6000/rs6000-call.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 70813a3bb9f..032203f5e9a 100644
--- a/gcc/config/rs6000/rs6000-call.c
+++ b/gcc/config/rs6000/rs6000-call.c
@@ -71,6 +71,7 @@
 #include "opts.h"
 
 #include "rs6000-internal.h"
+#include "rs6000-builtins.h"
 
 #if TARGET_MACHO
 #include "gstab.h"  /* for N_SLINE */
@@ -12864,6 +12865,9 @@ rs6000_init_builtins (void)
   pixel_V8HI_type_node = rs6000_vector_type ("__vector __pixel",
 					     pixel_type_node, 8);
 
+  /* Execute the autogenerated initialization code for builtins.  */
+  rs6000_autoinit_builtins ();
+
   /* Create Altivec, VSX and MMA builtins on machines with at least the
      general purpose extensions (970 and newer) to allow the use of
      the target attribute.  */
-- 
2.17.1

Re: [PATCH 00/29] rs6000: Auto-generate builtins from descriptions [V2]

[Bill Schmidt]

Just a reminder this patch series exists and wants a review. :-)

Bill

On 7/27/20 9:13 AM, Bill Schmidt wrote:
> From: Bill Schmidt <wschmidt@linux.ibm.com>
>
> This is a slight reworking of the patches posted on June 17.  I have
> made a couple of improvements, but the general arrangement of the patches
> is the same as before.  Two major things to call out:
>
>   - I've introduced a uniform set of parsing error codes to make it easier
>     to follow some of the logic when certain conditions occur during parsing.
>
>   - I reorganized the treatment of built-in stanzas.  Before, the stanza
>     conditions were checked prior to initializing entries in the built-in
>     table.  Now, all built-ins are initialized, but we check the conditions
>     at expand time to determine whether they should be enabled.  This
>     addresses a frequent problem we have with the existing methods, where
>     "#pragma target" doesn't work as expected when changing the target
>     CPU for a single function.
>
> As described before, the current built-in support in the rs6000 back end
> requires at least a master's degree in spelunking to comprehend.  It's
> full of cruft, redundancy, and unused bits of code, and long overdue for a
> replacement.  This is the first part of my project to do that.
>
> My intent is to make adding new built-in functions as simple as adding a
> few lines to a couple of files, and automatically generating as much of
> the initialization, overload resolution, and expansion logic as possible.
> This patch series establishes the format of the input files and creates
> a new program (rs600-gen-builtins) to:
>
>   * Parse the input files into an internal representation;
>   * Generate a file of #defines (rs6000-vecdefines.h) for eventual
>     inclusion into altivec.h; and
>   * Generate an initialization file to create and initialize tables of
>     built-in functions and overloads.
>
> Patches 1, 3-7, and 9-19 contain the logic for rs6000-gen-builtins.
> Patch 8 provides balanced tree search support for parsing scalability.
> Patches 2 and 21-27 provide a first cut at the input files.
> Patch 20 incorporates the new code into the GCC build.
> Patch 28 adds comments to some existing files that will help during the
> transition from the previous built-in mechanism.
> Patch 29 turns on the initialization logic, while leaving GCC's behavior
> unchanged otherwise.
>
> The patch series is constructed so that any prefix set of the patches
> can be upstreamed without breaking anything.  There's still plenty of
> work left, but I think it will be helpful to get this big chunk of
> patches upstream to make further progress easier (translation: avoid
> complex rebases like the one I just went through :-).
>
> Following is some additional information about the present and future
> design that may be of help.
>
> The set of patches submitted upstream so far does the relatively
> straightforward work of reading builtin descriptions from flat files and
> generating initialization code for builtin and overload tables.  It also
> generates an include file meant to be included in altivec.h, which produces
> the #defines that map vec_* to __builtin_* functions for external consumption.
>
> Data structures are automatically initialized in rs6000_builtins.c:
> rs6000_autoinit_builtins.  Initialized data structures are:
>
>   - rs6000_gen_builtins:  An enumeration of builtin identifiers, such as
> RS6000_BIF_CPU_SUPPORTS.  These names are deliberately different from the
> existing builtin identifiers so they can co-exist for a while.
>
>   - rs6000_gen_overloads:  An enumeration of overload identifiers, such as
> RS6000_OVLD_MAX.  Again, deliberately different from the old names.  Right
> now I have the two enumerations using nonoverlapping numbers.  This is
> because the two tables were part of one table in the old design, and I
> haven't yet proven for sure that I can separate them without problems.
> I think that I can, in which case I will have both enumerations start from
> zero.
>
>   - A number of filescope variables representing TREE_TYPEs of functions.
> These are named <return-type>_ftype_<param1-type>_ ... _<paramN-type> and
> initialized as tree lists from the prototypes in the input files.  The
> naming scheme for types is described in the code.
>
>   - rs6000_builtin_info_x:  An array indexed by rs6000_gen_builtins containing
> all the fun stuff for each builtin.  The "_x" is because we already have
> rs6000_builtin_info as the old table, and they need to coexist for a while.
>
>   - rs6000_overload_info:  An array indexed by rs6000_gen_overloads containing
> all the fun stuff for each overload.
>
>   - bif_hash:  A hash table mapping builtin function names to pointers to
> their rs6000_builtin_info_x entries.
>
>   - ovld_hash:  A hash table mapping overload names to pointers to their
> rs6000_overload_info entries.
>
> The new initialization code is called from rs6000_init_builtins. Currently
> this function continues to do its existing initialization work, but also
> initializes the new tables (and then ignores them).
>
> The old initialization code contains a lot of ad hoc hackery to handle
> different kinds of functions that require extra behavior. The new design
> removes as much of that as possible, and instead uses syntax in the flat
> file to generate flags and other information that allows initialization
> to be done uniformly for all functions.  It also means that all
> initialization is done as a single pass over the builtins, as opposed to
> the current methods that require multiple passes over all the builtins
> to find the particular special code required for a single one.
>
> Now, it's important to keep both the old and the new initialization code
> functional at once.  There is a static variable new_builtins_are_live
> that's used to select which tables will be used during compilation.  Its
> value can be set via a macro when building the compiler, or adjusted at
> runtime under debugger control.  The important thing is to ensure that
> all differences in supported builtins between the old methods and the new
> ones are expected.  We do want some differences, because we are removing
> a lot of long-deprecated functions.  It will be important to test for
> differences on BE, LE, 64-bit, 32-bit, AIX, and Darwin, as I'm also
> trying to remove dependences on the "long" integer types wherever possible.
> We'll see how successful that is.
>
> A future patch will update the debug code to print out type signature
> information for each initialized builtin, to make it easier to compare the
> old and new functions for type equivalence.
>
> So that explains stage 1 of the code, mostly done in the patches I've posted,
> except as noted above.
>
> There are three remaining stages to be completed:
>
>   - Gimple folding
>   - Overload resolution
>   - Builtin expansion
>
> The order above is the order that they take place during compilation.
>
> Gimple folding changes will be simple.  The only change here is that the
> builtin names are different, so we'll need to check the different names
> depending on whether new_builtins_are_live is set or unset.
>
> Overload resolution changes should be mostly simple also.  The new
> rs6000_overload_info table will be used instead of the handwritten table in
> rs6000-call.c.  The new table does not have any limits on the number of
> operands, so all the hackery around unary, binary, ternary, quaternary, etc.
> will go away.  The code for resolving an AltiVec builtin will be required to
> use the new table, and there is still some special case code in there that
> will need to be updated for the new naming scheme.  But all in all I don't
> expect a lot of work here, except for adding all the new overload entries
> into the input file (not yet started).
>
> I have been working on the builtin expansion part next, which is the most
> complicated.  rs6000_expand_builtin and its support functions are where all
> the worst offenses in the code exist. Most of the changes here involve
> removing as much of the special casing as possible, and replacing it with
> table-driven logic.  In particular, this allows us to get rid of a lot of
> hand-written code checking for constant arguments that have a restricted set
> of allowable values.  I can't get rid of all the special cases, but I can
> make them driven by flags in the builtin table instead of the ad hoc checking
> for specific builtins that occurs today.  A lot of this has been written but
> not yet tested.
>
> My current plans are:
>
>   - Get the first set of patches committed
>   - Add debug code to make it easier to test which builtins (with type
>     signatures) are created using the old and new methods
>   - Test this on all the platforms that matter until I have everything matching
>   - Complete writing the builtin expansion code
>   - Write the Gimple folding and overload resolution pieces
>   - Test and revise until the testsuite passes
>   - Enable the new version of the code as the default
>   - Let it burn in for a while and deal with bug reports
>   - Remove the now-dead code supporting the old methods (around end of stage 3)
>
> That's it!  Easy peasy. :-)
>
> Thanks in advance for reviewing this code, and I welcome comments on the
> overall design.  I'd really like to get these patches upstream soon, as
> it's becoming clumsy to maintain them out of tree.
>
> Thanks!
>
>   -- Bill
>
> Bill Schmidt (29):
>    rs6000: Initial create of rs6000-gen-builtins.c
>    rs6000: Add initial input files
>    rs6000: Add file support and functions for diagnostic support
>    rs6000: Add helper functions for parsing
>    rs6000: Add functions for matching types, part 1 of 3
>    rs6000: Add functions for matching types, part 2 of 3
>    rs6000: Add functions for matching types, part 3 of 3
>    rs6000: Red-black tree implementation for balanced tree search
>    rs6000: Main function with stubs for parsing and output
>    rs6000: Parsing built-in input file, part 1 of 3
>    rs6000: Parsing built-in input file, part 2 of 3
>    rs6000: Parsing built-in input file, part 3 of 3
>    rs6000: Parsing of overload input file
>    rs6000: Build and store function type identifiers
>    rs6000: Write output to the vector definition include file
>    rs6000: Write output to the builtins header file
>    rs6000: Write output to the builtins init file, part 1 of 3
>    rs6000: Write output to the builtins init file, part 2 of 3
>    rs6000: Write output to the builtins init file, part 3 of 3
>    rs6000: Incorporate new builtins code into the build machinery
>    rs6000: Add remaining AltiVec builtins
>    rs6000: Add VSX builtins
>    rs6000: Add available-everywhere and ancient builtins
>    rs6000: Add Power7 builtins
>    rs6000: Add Power8 vector builtins
>    rs6000: Add Power9 builtins
>    rs6000: Add remaining builtins
>    rs6000: Add comments to help with transition
>    rs6000: Call rs6000_autoinit_builtins from rs6000_builtins
>
>   gcc/config.gcc                           |    3 +-
>   gcc/config/rs6000/rbtree.c               |  233 ++
>   gcc/config/rs6000/rbtree.h               |   51 +
>   gcc/config/rs6000/rs6000-builtin-new.def | 2967 ++++++++++++++++++++++
>   gcc/config/rs6000/rs6000-builtin.def     |   15 +
>   gcc/config/rs6000/rs6000-call.c          |  170 ++
>   gcc/config/rs6000/rs6000-gen-builtins.c  | 2660 +++++++++++++++++++
>   gcc/config/rs6000/rs6000-overload.def    |   57 +
>   gcc/config/rs6000/t-rs6000               |   25 +-
>   9 files changed, 6179 insertions(+), 2 deletions(-)
>   create mode 100644 gcc/config/rs6000/rbtree.c
>   create mode 100644 gcc/config/rs6000/rbtree.h
>   create mode 100644 gcc/config/rs6000/rs6000-builtin-new.def
>   create mode 100644 gcc/config/rs6000/rs6000-gen-builtins.c
>   create mode 100644 gcc/config/rs6000/rs6000-overload.def
>

Fwd: [PATCH 00/29] rs6000: Auto-generate builtins from descriptions [V2]

[Bill Schmidt]

I apologize for the useless "From" address (and lack of "Reply-To" 
address) on this patch series.  My usual machine is down for 
maintenance, so I ended up sending this from my laptop, which was 
clearly not configured well enough for that.  My bad.  I won't do that 
again.

Meantime, please reply to wschmidt@linux.ibm.com for this patch series.

Thanks!

Bill


-------- Forwarded Message --------
Subject: 	[PATCH 00/29] rs6000: Auto-generate builtins from descriptions 
[V2]
Date: 	Mon, 27 Jul 2020 09:13:46 -0500
From: 	Bill Schmidt <wschmidt@Bills-MacBook-Pro.local>
To: 	gcc-patches@gcc.gnu.org
CC: 	segher@kernel.crashing.org, dje.gcc@gmail.com, Bill Schmidt 
<wschmidt@linux.ibm.com>



From: Bill Schmidt <wschmidt@linux.ibm.com>

This is a slight reworking of the patches posted on June 17. I have
made a couple of improvements, but the general arrangement of the patches
is the same as before. Two major things to call out:

- I've introduced a uniform set of parsing error codes to make it easier
to follow some of the logic when certain conditions occur during parsing.

- I reorganized the treatment of built-in stanzas. Before, the stanza
conditions were checked prior to initializing entries in the built-in
table. Now, all built-ins are initialized, but we check the conditions
at expand time to determine whether they should be enabled. This
addresses a frequent problem we have with the existing methods, where
"#pragma target" doesn't work as expected when changing the target
CPU for a single function.

As described before, the current built-in support in the rs6000 back end
requires at least a master's degree in spelunking to comprehend. It's
full of cruft, redundancy, and unused bits of code, and long overdue for a
replacement. This is the first part of my project to do that.

My intent is to make adding new built-in functions as simple as adding a
few lines to a couple of files, and automatically generating as much of
the initialization, overload resolution, and expansion logic as possible.
This patch series establishes the format of the input files and creates
a new program (rs600-gen-builtins) to:

* Parse the input files into an internal representation;
* Generate a file of #defines (rs6000-vecdefines.h) for eventual
inclusion into altivec.h; and
* Generate an initialization file to create and initialize tables of
built-in functions and overloads.

Patches 1, 3-7, and 9-19 contain the logic for rs6000-gen-builtins.
Patch 8 provides balanced tree search support for parsing scalability.
Patches 2 and 21-27 provide a first cut at the input files.
Patch 20 incorporates the new code into the GCC build.
Patch 28 adds comments to some existing files that will help during the
transition from the previous built-in mechanism.
Patch 29 turns on the initialization logic, while leaving GCC's behavior
unchanged otherwise.

The patch series is constructed so that any prefix set of the patches
can be upstreamed without breaking anything. There's still plenty of
work left, but I think it will be helpful to get this big chunk of
patches upstream to make further progress easier (translation: avoid
complex rebases like the one I just went through :-).

Following is some additional information about the present and future
design that may be of help.

The set of patches submitted upstream so far does the relatively
straightforward work of reading builtin descriptions from flat files and
generating initialization code for builtin and overload tables. It also
generates an include file meant to be included in altivec.h, which produces
the #defines that map vec_* to __builtin_* functions for external 
consumption.

Data structures are automatically initialized in rs6000_builtins.c:
rs6000_autoinit_builtins. Initialized data structures are:

- rs6000_gen_builtins: An enumeration of builtin identifiers, such as
RS6000_BIF_CPU_SUPPORTS. These names are deliberately different from the
existing builtin identifiers so they can co-exist for a while.

- rs6000_gen_overloads: An enumeration of overload identifiers, such as
RS6000_OVLD_MAX. Again, deliberately different from the old names. Right
now I have the two enumerations using nonoverlapping numbers. This is
because the two tables were part of one table in the old design, and I
haven't yet proven for sure that I can separate them without problems.
I think that I can, in which case I will have both enumerations start from
zero.

- A number of filescope variables representing TREE_TYPEs of functions.
These are named <return-type>_ftype_<param1-type>_ ... _<paramN-type> and
initialized as tree lists from the prototypes in the input files. The
naming scheme for types is described in the code.
- rs6000_builtin_info_x: An array indexed by rs6000_gen_builtins containing
all the fun stuff for each builtin. The "_x" is because we already have
rs6000_builtin_info as the old table, and they need to coexist for a while.

- rs6000_overload_info: An array indexed by rs6000_gen_overloads containing
all the fun stuff for each overload.

- bif_hash: A hash table mapping builtin function names to pointers to
their rs6000_builtin_info_x entries.

- ovld_hash: A hash table mapping overload names to pointers to their
rs6000_overload_info entries.
The new initialization code is called from rs6000_init_builtins. Currently
this function continues to do its existing initialization work, but also
initializes the new tables (and then ignores them).
The old initialization code contains a lot of ad hoc hackery to handle
different kinds of functions that require extra behavior. The new design
removes as much of that as possible, and instead uses syntax in the flat
file to generate flags and other information that allows initialization
to be done uniformly for all functions. It also means that all
initialization is done as a single pass over the builtins, as opposed to
the current methods that require multiple passes over all the builtins
to find the particular special code required for a single one.

Now, it's important to keep both the old and the new initialization code
functional at once. There is a static variable new_builtins_are_live
that's used to select which tables will be used during compilation. Its
value can be set via a macro when building the compiler, or adjusted at
runtime under debugger control. The important thing is to ensure that
all differences in supported builtins between the old methods and the new
ones are expected. We do want some differences, because we are removing
a lot of long-deprecated functions. It will be important to test for
differences on BE, LE, 64-bit, 32-bit, AIX, and Darwin, as I'm also
trying to remove dependences on the "long" integer types wherever possible.
We'll see how successful that is.

A future patch will update the debug code to print out type signature
information for each initialized builtin, to make it easier to compare the
old and new functions for type equivalence.

So that explains stage 1 of the code, mostly done in the patches I've 
posted,
except as noted above.

There are three remaining stages to be completed:

- Gimple folding
- Overload resolution
- Builtin expansion

The order above is the order that they take place during compilation.

Gimple folding changes will be simple. The only change here is that the
builtin names are different, so we'll need to check the different names
depending on whether new_builtins_are_live is set or unset.

Overload resolution changes should be mostly simple also. The new
rs6000_overload_info table will be used instead of the handwritten table in
rs6000-call.c. The new table does not have any limits on the number of
operands, so all the hackery around unary, binary, ternary, quaternary, etc.
will go away. The code for resolving an AltiVec builtin will be required to
use the new table, and there is still some special case code in there that
will need to be updated for the new naming scheme. But all in all I don't
expect a lot of work here, except for adding all the new overload entries
into the input file (not yet started).

I have been working on the builtin expansion part next, which is the most
complicated. rs6000_expand_builtin and its support functions are where all
the worst offenses in the code exist. Most of the changes here involve
removing as much of the special casing as possible, and replacing it with
table-driven logic. In particular, this allows us to get rid of a lot of
hand-written code checking for constant arguments that have a restricted set
of allowable values. I can't get rid of all the special cases, but I can
make them driven by flags in the builtin table instead of the ad hoc 
checking
for specific builtins that occurs today. A lot of this has been written but
not yet tested.

My current plans are:

- Get the first set of patches committed
- Add debug code to make it easier to test which builtins (with type
signatures) are created using the old and new methods
- Test this on all the platforms that matter until I have everything 
matching
- Complete writing the builtin expansion code
- Write the Gimple folding and overload resolution pieces
- Test and revise until the testsuite passes
- Enable the new version of the code as the default
- Let it burn in for a while and deal with bug reports
- Remove the now-dead code supporting the old methods (around end of 
stage 3)

That's it! Easy peasy. :-)

Thanks in advance for reviewing this code, and I welcome comments on the
overall design. I'd really like to get these patches upstream soon, as
it's becoming clumsy to maintain them out of tree.

Thanks!

-- Bill

Bill Schmidt (29):
rs6000: Initial create of rs6000-gen-builtins.c
rs6000: Add initial input files
rs6000: Add file support and functions for diagnostic support
rs6000: Add helper functions for parsing
rs6000: Add functions for matching types, part 1 of 3
rs6000: Add functions for matching types, part 2 of 3
rs6000: Add functions for matching types, part 3 of 3
rs6000: Red-black tree implementation for balanced tree search
rs6000: Main function with stubs for parsing and output
rs6000: Parsing built-in input file, part 1 of 3
rs6000: Parsing built-in input file, part 2 of 3
rs6000: Parsing built-in input file, part 3 of 3
rs6000: Parsing of overload input file
rs6000: Build and store function type identifiers
rs6000: Write output to the vector definition include file
rs6000: Write output to the builtins header file
rs6000: Write output to the builtins init file, part 1 of 3
rs6000: Write output to the builtins init file, part 2 of 3
rs6000: Write output to the builtins init file, part 3 of 3
rs6000: Incorporate new builtins code into the build machinery
rs6000: Add remaining AltiVec builtins
rs6000: Add VSX builtins
rs6000: Add available-everywhere and ancient builtins
rs6000: Add Power7 builtins
rs6000: Add Power8 vector builtins
rs6000: Add Power9 builtins
rs6000: Add remaining builtins
rs6000: Add comments to help with transition
rs6000: Call rs6000_autoinit_builtins from rs6000_builtins

gcc/config.gcc | 3 +-
gcc/config/rs6000/rbtree.c | 233 ++
gcc/config/rs6000/rbtree.h | 51 +
gcc/config/rs6000/rs6000-builtin-new.def | 2967 ++++++++++++++++++++++
gcc/config/rs6000/rs6000-builtin.def | 15 +
gcc/config/rs6000/rs6000-call.c | 170 ++
gcc/config/rs6000/rs6000-gen-builtins.c | 2660 +++++++++++++++++++
gcc/config/rs6000/rs6000-overload.def | 57 +
gcc/config/rs6000/t-rs6000 | 25 +-
9 files changed, 6179 insertions(+), 2 deletions(-)
create mode 100644 gcc/config/rs6000/rbtree.c
create mode 100644 gcc/config/rs6000/rbtree.h
create mode 100644 gcc/config/rs6000/rs6000-builtin-new.def
create mode 100644 gcc/config/rs6000/rs6000-gen-builtins.c
create mode 100644 gcc/config/rs6000/rs6000-overload.def

-- 
2.17.1

Re: [PATCH 26/29] rs6000: Add Power9 builtins

[will schmidt]

On Mon, 2020-07-27 at 09:14 -0500, Bill Schmidt wrote:
> From: Bill Schmidt <wschmidt@linux.ibm.com>
> 
> 2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>
> 
> 	* config/rs6000/rs6000-builtin-new.def: Add power9,
> 	power9-vector, and power9-64 builtins.
> ---
>  gcc/config/rs6000/rs6000-builtin-new.def | 354
> +++++++++++++++++++++++
>  1 file changed, 354 insertions(+)
> 
> diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
> b/gcc/config/rs6000/rs6000-builtin-new.def
> index 2f918c1d69e..1338f543a6a 100644
> --- a/gcc/config/rs6000/rs6000-builtin-new.def
> +++ b/gcc/config/rs6000/rs6000-builtin-new.def
> @@ -2394,3 +2394,357 @@
>      XSCVSPDPN vsx_xscvspdpn {}
> 
> 
> +; Power9 vector builtins.
> +[power9-vector]
> +  const vus __builtin_altivec_convert_4f32_8i16 (vf, vf);
> +    CONVERT_4F32_8I16 convert_4f32_8i16 {}
> +
> +  const unsigned int __builtin_altivec_first_match_index_v16qi (vsc,
> vsc);
> +    VFIRSTMATCHINDEX_V16QI first_match_index_v16qi {}

Noting a "vus" on the previous entry, was/is a define for "ui ==
unsigned int" considered?
Similar question for subsequent types that are still fully spelled out.
(unsigned char, unsigned short, ... )


<snip>

> +; Miscellaneour P9 functions


Miscellaneous   :-) 

<snip>

> +
> +
> +; These things need some review to see whether they really require
> +; MASK_POWERPC64.  For xsxexpdp, this seems to be fine for 32-bit,
> +; because the result will always fit in 32 bits and the return
> +; value is SImode; but the pattern currently requires TARGET_64BIT.
> +; On the other hand, xsssigdp has a result that doesn't fit in

perhaps xsxsigdp ? 


> +; 32 bits, and the return value is DImode, so it seems that
> +; TARGET_64BIT (actually TARGET_POWERPC64) is justified.  TBD. ####
> +[power9-64]
> +; The following two are inexplicably named __builtin_altivec_* while
> +; their load counterparts are __builtin_vsx_*.  Need to deprecate
> +; these interfaces in favor of the other naming scheme (or vice
> versa).

Thanks
-Will

Re: [PATCH 26/29] rs6000: Add Power9 builtins

[Bill Schmidt]

On 7/30/20 12:15 PM, will schmidt wrote:
> On Mon, 2020-07-27 at 09:14 -0500, Bill Schmidt wrote:
>> From: Bill Schmidt <wschmidt@linux.ibm.com>
>>
>> 2020-07-26  Bill Schmidt  <wschmidt@linux.ibm.com>
>>
>> 	* config/rs6000/rs6000-builtin-new.def: Add power9,
>> 	power9-vector, and power9-64 builtins.
>> ---
>>   gcc/config/rs6000/rs6000-builtin-new.def | 354
>> +++++++++++++++++++++++
>>   1 file changed, 354 insertions(+)
>>
>> diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
>> b/gcc/config/rs6000/rs6000-builtin-new.def
>> index 2f918c1d69e..1338f543a6a 100644
>> --- a/gcc/config/rs6000/rs6000-builtin-new.def
>> +++ b/gcc/config/rs6000/rs6000-builtin-new.def
>> @@ -2394,3 +2394,357 @@
>>       XSCVSPDPN vsx_xscvspdpn {}
>>
>>
>> +; Power9 vector builtins.
>> +[power9-vector]
>> +  const vus __builtin_altivec_convert_4f32_8i16 (vf, vf);
>> +    CONVERT_4F32_8I16 convert_4f32_8i16 {}
>> +
>> +  const unsigned int __builtin_altivec_first_match_index_v16qi (vsc,
>> vsc);
>> +    VFIRSTMATCHINDEX_V16QI first_match_index_v16qi {}
> Noting a "vus" on the previous entry, was/is a define for "ui ==
> unsigned int" considered?
> Similar question for subsequent types that are still fully spelled out.
> (unsigned char, unsigned short, ... )

I did consider it, but I feel there's a balance between keeping the 
lines short and keeping them readable.  The vector types are egregious 
space hogs, so I felt I needed to abbreviate them to avoid line wrap, 
but in most cases the scalar variables are fine with normal types.  One 
of those YMMV situations.
>
>
> <snip>
>
>> +; Miscellaneour P9 functions
>
> Miscellaneous   :-)

Thanks :)
>
> <snip>
>
>> +
>> +
>> +; These things need some review to see whether they really require
>> +; MASK_POWERPC64.  For xsxexpdp, this seems to be fine for 32-bit,
>> +; because the result will always fit in 32 bits and the return
>> +; value is SImode; but the pattern currently requires TARGET_64BIT.
>> +; On the other hand, xsssigdp has a result that doesn't fit in
> perhaps xsxsigdp ?

Indeed!

Thanks very much for the review!

Bill

>
>
>> +; 32 bits, and the return value is DImode, so it seems that
>> +; TARGET_64BIT (actually TARGET_POWERPC64) is justified.  TBD. ####
>> +[power9-64]
>> +; The following two are inexplicably named __builtin_altivec_* while
>> +; their load counterparts are __builtin_vsx_*.  Need to deprecate
>> +; these interfaces in favor of the other naming scheme (or vice
>> versa).
> Thanks
> -Will
>
>