From: "Roger Sayle" <roger@nextmovesoftware.com>
To: "'Segher Boessenkool'" <segher@kernel.crashing.org>
Cc: <gcc-patches@gcc.gnu.org>
Subject: RE: [PATCH] Some additional zero-extension related optimizations in simplify-rtx.
Date: Fri, 29 Jul 2022 08:28:16 +0100 [thread overview]
Message-ID: <042901d8a31c$c719acb0$554d0610$@nextmovesoftware.com> (raw)
In-Reply-To:
Hi Segher,
> > > To implement this, and some closely related transformations, we
> > > build upon the existing val_signbit_known_clear_p predicate. In the
> > > first chunk, nonzero_bits knows that FFS and ABS can't leave the
> > > sign-bit bit set,
> >
> > Is that guaranteed in all cases? Also at -O0, also for args bigger
> > than 64 bits?
>
> val_signbit_known_clear_p should work for any size/precision arg.
No, you're right! Please forgive/excuse me. Neither val_signbit_p nor
nonzero_bits have yet been updated to use "wide_int", so don't work
for TImode or wider modes. Doh!
I'm shocked.
Roger
--
next prev parent reply other threads:[~2022-07-29 7:28 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-27 13:42 Roger Sayle
2022-07-27 20:23 ` Segher Boessenkool
2022-07-29 6:57 ` Roger Sayle
2022-08-02 20:07 ` Segher Boessenkool
2022-07-29 7:28 ` Roger Sayle [this message]
2022-08-02 9:38 ` Richard Sandiford
2022-08-02 11:55 ` [PATCH take #2] " Roger Sayle
2022-08-02 13:39 ` Richard Sandiford
2022-08-02 16:46 ` Richard Sandiford
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