From: Oleg Endo <oleg.endo@t-online.de>
To: Rich Felker <dalias@libc.org>
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] add initial support for J2 core to sh target
Date: Wed, 02 Sep 2015 15:17:00 -0000 [thread overview]
Message-ID: <04F1E366-C3CF-4DC5-8E36-7FB43DEE917D@t-online.de> (raw)
In-Reply-To: <20150901170858.GB17773@brightrain.aerifal.cx>
On 02 Sep 2015, at 02:08, Rich Felker <dalias@libc.org> wrote:
> On Wed, Sep 02, 2015 at 01:24:55AM +0900, Oleg Endo wrote:
>>> I'm not sure what the best way to achieve multiple goals is, but the
>>> current behavior makes it so you need --isa=any (and a final binary
>>> with weird ABI tag) to have a binary that supports atomic operations
>>> on any SH model. musl libc already has such support (except the new J2
>>> CAS instruction) and I would like to eventually provide a libatomic
>>> approach for GCC too so that it's possible to use __sync/C11 atomics
>>> and have the binary be safe to run on any model that supports the
>>> baseline ISA & ABI you built for (e.g. all >=SH2 if you used -m2).
>>
>> I don't know the details of your implementation. The compiler
>> generated atomic sequences are not really compatible. The safest
>> thing is not to enable any atomic model in GCC and let it emit
>> function calls to __atomic*.
>
> Exactly -- but then, libatomic.a needs to contain J2-specific cas.l
> opcodes and SH4A-specific movli.l/movco.l opcodes and code that
> selects at runtime which to use (or whether to use imask or gusa)
> based on hwcap, etc. The point is that a mix of opcodes for different
> ISA levels end up being in the final binary, which might otherwise be
> targeted for SH-2 baseline so it can run on any of them.
>
>>> I have a patch for that part, just not expanding the
>>> already-very-complex SH "family-tree" of instruction support. However
>>> it's likely that encoding details will change (the draft encoding
>>> overlaps with something used by SH2A IIRC, and the intent was not to
>>> have such overlap)
>>
>> Yeah, it overlaps with the first 16 bit word of the 32 bit SH2A
>> load/store insns.
>>
>>> so I'm holding off on submitting it until the
>>> hardware side works out this issue.
>>
>> Sounds reasonable.
>
> In the mean time, do you have any suggestsions on how the ISA level
> stuff should be done to add J2 on the binutils side?
Let's continue this topic on the binutils list
( https://sourceware.org/ml/binutils/2015-09/msg00031.html )
prev parent reply other threads:[~2015-09-02 15:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-31 17:52 Rich Felker
2015-09-01 13:45 ` Oleg Endo
2015-09-01 14:18 ` Rich Felker
2015-09-01 16:25 ` Oleg Endo
2015-09-01 17:09 ` Rich Felker
2015-09-02 15:17 ` Oleg Endo [this message]
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