Re: [PATCH] improved const shifts for AVR targets

[Jeff Law <jeffreyalaw@gmail.com>]

On 10/4/22 11:06, Alexander Binzberger via Gcc-patches wrote:
> Hi,
> recently I used some arduino uno for a project and realized some areas
> which do not output optimal asm code. Especially around shifts and function
> calls.
> With this as motivation and hacktoberfest I started patching things.
> Since patch files do not provide a good overview and I hope for a
> "hacktoberfest-accepted" label on the PR on github I also opened it there:
> https://github.com/gcc-mirror/gcc/pull/73
>
> This patch improves shifts with const right hand operand. While 8bit and
> 16bit shifts where mostly fine 24bit and 32bit where not handled well.
>
> Testing
> I checked output with a local installation of compiler explorer in asm and
> a tiny unit test comparing shifts with mul/div by 2.
> I however did not write any testcases in gcc for it.
>
> Target
> This patch is only targeting atmel avr family of chips.
>
> Changelog
> improved const shifts for AVR targets

It would be helpful if you could show the before/after code for the 
cases you're changing.  Extra credit if you include cycles & size 
information for those cases.  That would help someone like me who knows 
GCC well, but isn't particularly well versed in the AVR target evaluate 
the overarching goal of the patch (ie, better code).

Changes should include a ChangeLog which indicates what changed. If you 
look at git log you will see examples of what a ChangeLog should look like.

The is large enough that you need either a  copyright assignment or DCO 
certification.

See this page for details:

https://gcc.gnu.org/contribute.html


>
> Patch
> -----
> diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc
> index 4ed390e4cf9..c7b70812d5c 100644
> --- a/gcc/config/avr/avr.cc
> +++ b/gcc/config/avr/avr.cc
> @@ -6043,9 +6043,6 @@ out_shift_with_cnt (const char *templ, rtx_insn
> *insn, rtx operands[],
>     op[2] = operands[2];
>     op[3] = operands[3];
>
> -  if (plen)
> -    *plen = 0;
> -

Doesn't this leave *plen uninitialized for the case where the shift 
count is held in memory or a register or is an out of range constant?  
Is this really safe?



>     if (CONST_INT_P (operands[2]))
>       {
>         /* Operand 3 is a scratch register if this is a
> @@ -6150,96 +6147,68 @@ out_shift_with_cnt (const char *templ, rtx_insn
> *insn, rtx operands[],
>   /* 8bit shift left ((char)x << i)   */
>
>   const char *
> -ashlqi3_out (rtx_insn *insn, rtx operands[], int *len)
> +ashlqi3_out (rtx_insn *insn, rtx operands[], int *plen)
>   {
>     if (CONST_INT_P (operands[2]))
>       {
> -      int k;
> -
> -      if (!len)
> - len = &k;
> -

Isn't this wrong for the call to ashlqi3_out from avr.md?  In that call 
len/plen will be zero, which we then pass down.  So the question is why 
did you remove this code?


The patch as-is is relatively large and can easily be broken down into 
more manageable chunks.  I would suggest a patch for each mode.  ie, one 
which changes QImode shifts, another for HImode shifts, another for 
PSImode shifts. etc.  It may seem like more work, but by breaking it 
down reviewers can take action on each patch individually.  So for 
example its relatively easy to work through the QImode changes and those 
could go in fairly quick while the PSImode changes will require 
considerably more time to review.


>         switch (INTVAL (operands[2]))
>    {
>    default:
>     if (INTVAL (operands[2]) < 8)
>       break;
>
> -  *len = 1;
> -  return "clr %0";
> -
> - case 1:
> -  *len = 1;
> -  return "lsl %0";
> -
> - case 2:
> -  *len = 2;
> -  return ("lsl %0" CR_TAB
> -  "lsl %0");
> -
> - case 3:
> -  *len = 3;
> -  return ("lsl %0" CR_TAB
> -  "lsl %0" CR_TAB
> -  "lsl %0");
> +    return avr_asm_len ("clr %0", operands, plen, 1);

You've probably got a whitespace problem here.  I think the return 
should line up in the came column as the IF statement. Conceptually this 
seems reasonable as cases 1, 2 and 3 can be trivially handled by 
out_shift_with_cnt.  Tough routing more code through out_shift_with_cnt 
means the comment might need to change since we're routing more cases 
through it that were trivially handled in ashlqi3_out before.


>
>    case 4:
>     if (test_hard_reg_class (LD_REGS, operands[0]))
>       {
> -      *len = 2;
> -      return ("swap %0" CR_TAB
> -      "andi %0,0xf0");
> +        return avr_asm_len ("swap %0" CR_TAB
> +          "andi %0,0xf0", operands, plen, 2);
More indention problems here.  THe return should line up two spaces 
inside the open curly brace.  Otherwise this case seems reasonable since 
it's generating the same code as before.
>       }
> -  *len = 4;
> -  return ("lsl %0" CR_TAB
> +    return avr_asm_len ("lsl %0" CR_TAB
>     "lsl %0" CR_TAB
>     "lsl %0" CR_TAB
> -  "lsl %0");
> +      "lsl %0", operands, plen, 4);

Gratuitous indentation changes.  Please don't do that unless you're 
fixing cases where the indentation is wrong according to GNU/project 
standards.


>
>    case 5:
>     if (test_hard_reg_class (LD_REGS, operands[0]))
>       {
> -      *len = 3;
> -      return ("swap %0" CR_TAB
> +        return avr_asm_len ("swap %0" CR_TAB
>         "lsl %0"  CR_TAB
> -      "andi %0,0xe0");
> +          "andi %0,0xe0", operands, plen, 3);

It looks like you're introducing gratuitous indentation changes here.  
Please don't do that.  Otherwise this looks sensible as again, it 
doesn't change the generated code.



>       }
> -  *len = 5;
> -  return ("lsl %0" CR_TAB
> +    return avr_asm_len ("lsl %0" CR_TAB
>     "lsl %0" CR_TAB
>     "lsl %0" CR_TAB
>     "lsl %0" CR_TAB
> -  "lsl %0");
> +      "lsl %0", operands, plen, 5);

Similarly.


>
>    case 6:
>     if (test_hard_reg_class (LD_REGS, operands[0]))
>       {
> -      *len = 4;
> -      return ("swap %0" CR_TAB
> +        return avr_asm_len ("swap %0" CR_TAB
>         "lsl %0"  CR_TAB
>         "lsl %0"  CR_TAB
> -      "andi %0,0xc0");
> +          "andi %0,0xc0", operands, plen, 4);
>       }
> -  *len = 6;
> -  return ("lsl %0" CR_TAB
> +    return avr_asm_len ("lsl %0" CR_TAB
>     "lsl %0" CR_TAB
>     "lsl %0" CR_TAB
>     "lsl %0" CR_TAB
>     "lsl %0" CR_TAB
> -  "lsl %0");
> +      "lsl %0", operands, plen, 6);
>
>    case 7:
> -  *len = 3;
> -  return ("ror %0" CR_TAB
> +    return avr_asm_len ("ror %0" CR_TAB
>     "clr %0" CR_TAB
> -  "ror %0");
> +      "ror %0", operands, plen, 3);
>    }

Similarly for these cases.


I don't have the time right now to go through the other modes. But I 
would suggest you take the feedback above and apply the same concepts to 
the changes for the other modes.


Note for other reviewers, without an assignment or DCO cert, this can't 
go forward.


jeff