From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x430.google.com (mail-pf1-x430.google.com [IPv6:2607:f8b0:4864:20::430]) by sourceware.org (Postfix) with ESMTPS id A07893858D20 for ; Fri, 28 Jul 2023 15:09:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A07893858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pf1-x430.google.com with SMTP id d2e1a72fcca58-686f8614ce5so1691253b3a.3 for ; Fri, 28 Jul 2023 08:09:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1690556962; x=1691161762; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=BrHwXpvIBO68Ahe1scGjq6TwgtsPCBtQ/s8MIZk0Afg=; b=Qp8jGDFrYTQJOR8yYnN89L3C5vE1Ceb/ZcQhNg7T36XY8c/h8bkVO9YVeoSgttz37V b5pk+wiHHk+qPCbMr/jO0Zn7iQXiU3f8p2q72j48UK4zkbSpOYMUOiUfRWE7wsZqjqxn HsPolF0COWfmIEL1Fry2VK0Cfh7w9MeUHBrTITSkSlJnCeJBrBSHp11d2cHujsMaAKMO ASsIdU4Dnl+E+BkKqleJkZn9DcL8d0SRZCxBAuxtHaD2ELH5/mtDaL/mbZ6pdcmwd6Fx ut1R3v6KxrVV6b2K+wdcy9nzC5gwTO9CzJhYUWVYKLbA7hBQ6NqmHffO8KJQgPckfVA3 9x4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690556962; x=1691161762; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=BrHwXpvIBO68Ahe1scGjq6TwgtsPCBtQ/s8MIZk0Afg=; b=ZETtg+LrgvpIEyk61PM7OXjh6N16Y/Ppw/R3CtOdLkmUnPLOd7myIOaBmZa4Dj+PqE hToPe7ZE068gTR6TL0PYNLYWZVaaa9UvZDeDhltsPixRukC8/t4xG0AT9/AJnkz16G0U SZI6lhQsv/ilQ2bvuJy8BX2HWCvvqbvNcEbEVZkSh9QeFvvgL8AX16IRHcycxqwnB6LT EHrhzFWg3DsF1UZzi+NfnWe8HY2BjJrWU9BFsnSeXf32Db+4OllIwPmUm4UMVdaLJY73 3mZFStGXdFX9wTp7mglrANVRcnE9g6aCcXu21Z4u4aHAd869f2VxWHV1ZS0XqU9fDyb1 jNxA== X-Gm-Message-State: ABy/qLbVTWbm3OKheM0EblfaVm095Rfp1jZaHtfchYD/BpPd+NV/DLmO RSCtpOVz+YelUVqPce62ue5+CkQ0hUREIA== X-Google-Smtp-Source: APBJJlEF8CMj9e24XxDX0RHlCVfSuKF8t8TbKL34DweoOjqVn7+vDmsdhlT95C0ZJi/4y+qdGTfRfg== X-Received: by 2002:a17:90b:3751:b0:268:34b1:a5a9 with SMTP id ne17-20020a17090b375100b0026834b1a5a9mr2177926pjb.8.1690556962297; Fri, 28 Jul 2023 08:09:22 -0700 (PDT) Received: from [172.31.0.109] ([136.36.130.248]) by smtp.gmail.com with ESMTPSA id 8-20020a17090a018800b0026309d57724sm4690723pjc.39.2023.07.28.08.09.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 28 Jul 2023 08:09:21 -0700 (PDT) Message-ID: <053cf9f3-613b-7a01-cd54-5e82bf1a7382@gmail.com> Date: Fri, 28 Jul 2023 09:09:20 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH 3/5] [RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0 Content-Language: en-US To: Andreas Schwab , Xiao Zeng Cc: gcc-patches@gcc.gnu.org, research_trasio@irq.a4lg.com, kito.cheng@gmail.com, zhengyu@eswincomputing.com, eri-sw-toolchain@eswincomputing.com References: <20230719101156.21771-1-zengxiao@eswincomputing.com> <20230719101156.21771-4-zengxiao@eswincomputing.com> <87tttrj2p3.fsf@igel.home> From: Jeff Law In-Reply-To: <87tttrj2p3.fsf@igel.home> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_NUMSUBJECT,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 7/25/23 11:55, Andreas Schwab wrote: > On Jul 19 2023, Xiao Zeng wrote: > >> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc >> index 38d8eb2fcf5..7e6b24bd232 100644 >> --- a/gcc/config/riscv/riscv.cc >> +++ b/gcc/config/riscv/riscv.cc >> @@ -2448,6 +2448,17 @@ riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN >> *total = COSTS_N_INSNS (1); >> return true; >> } >> + else if (TARGET_ZICOND && outer_code == SET && >> + ((GET_CODE (XEXP (x, 1)) == REG && XEXP (x, 2) == const0_rtx) || >> + (GET_CODE (XEXP (x, 2)) == REG && XEXP (x, 1) == const0_rtx) || >> + (GET_CODE (XEXP (x, 1)) == REG && GET_CODE (XEXP (x, 2)) && >> + XEXP (x, 1) == XEXP (XEXP (x, 0), 0)) || >> + (GET_CODE (XEXP (x, 1)) == REG && GET_CODE (XEXP (x, 2)) && >> + XEXP (x, 2) == XEXP (XEXP (x, 0), 0)))) > > Line breaks before the operator, not after. Also note that && GET_CODE (XEXP (x, 2)) && that appears twice. That just verifies the code isn't RTX_UNKNOWN which I suspect isn't what the author intended. It probably needs to be adjusted for SUBREGs and the pointer equality issues with REGs after reload. I'll take care of these goofs since the costing ought to be able to move forward independently of the improvements Xiao made to generating conditional move sequences. Jeff