* [PATCH] [AArch64] Add support for the Samsung Exynos M1 processor
@ 2015-03-30 21:51 Evandro Menezes
0 siblings, 0 replies; 2+ messages in thread
From: Evandro Menezes @ 2015-03-30 21:51 UTC (permalink / raw)
To: 'GCC Patches'
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The Samsung Exynos M1 implements the ARMv8 ISA and this patch adds support
for it through the -mcpu command-line option.
The patch was checked on aarch64-unknown-linux-gnu without new failures.
OK for trunk?
--
Evandro Menezes Austin, TX
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From 28ec332a929a6c4ac35a43d350c2ad72f544d2a3 Mon Sep 17 00:00:00 2001
From: Evandro Menezes <e.menezes@samsung.com>
Date: Thu, 19 Mar 2015 16:18:58 -0500
Subject: [PATCH] [AArch64] Add option for the Samsung Exynos M1 core for
AArch64
gcc/
* doc/invoke.texi (AARCH64/mtune): Add exynos-m1 as an option.
* config/aarch64/aarch64-cores.def (exynos-m1): New core.
* config/aarch64/aarch64-tune.md: Regenerate.
* config/aarch64/aarch64.c (exynosm1_tunings): New variable.
---
gcc/config/aarch64/aarch64-cores.def | 1 +
gcc/config/aarch64/aarch64-tune.md | 2 +-
gcc/config/aarch64/aarch64.c | 18 ++++++++++++++++++
gcc/doc/invoke.texi | 4 ++--
4 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 9b2eca2..d1d29e6 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -37,6 +37,7 @@
AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53)
AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
+AARCH64_CORE("exynos-m1", exynosm1, exynosm1, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, exynosm1)
AARCH64_CORE("thunderx", thunderx, thunderx, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx)
AARCH64_CORE("xgene1", xgene1, xgene1, 8, AARCH64_FL_FOR_ARCH8, xgene1)
diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md
index c3305f9..7d063e4 100644
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@
;; -*- buffer-read-only: t -*-
;; Generated automatically by gentune.sh from aarch64-cores.def
(define_attr "tune"
- "cortexa53,cortexa57,cortexa72,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
+ "cortexa53,cortexa57,cortexa72,exynosm1,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index cba3c1a..ca9257c 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -392,6 +392,24 @@ static const struct tune_params cortexa57_tunings =
1 /* vec_reassoc_width. */
};
+static const struct tune_params exynosm1_tunings =
+{
+ &cortexa57_extra_costs,
+ &cortexa57_addrcost_table,
+ &cortexa57_regmove_cost,
+ &cortexa57_vector_cost,
+ 4, /* memmov_cost */
+ 3, /* issue_rate */
+ (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
+ | AARCH64_FUSE_MOVK_MOVK), /* fuseable_ops */
+ 16, /* function_align. */
+ 8, /* jump_align. */
+ 4, /* loop_align. */
+ 2, /* int_reassoc_width. */
+ 4, /* fp_reassoc_width. */
+ 1 /* vec_reassoc_width. */
+};
+
static const struct tune_params thunderx_tunings =
{
&thunderx_extra_costs,
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 4bbd3fc..19606e3 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12316,8 +12316,8 @@ architecture.
@opindex mtune
Specify the name of the target processor for which GCC should tune the
performance of the code. Permissible values for this option are:
-@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57},
-@samp{cortex-a72}, @samp{thunderx}, @samp{xgene1}.
+@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{cortex-a72},
+@samp{exynos-m1}, @samp{thunderx}, @samp{xgene1}.
Additionally, this option can specify that GCC should tune the performance
of the code for a big.LITTLE system. Permissible values for this
--
2.1.0.243.g30d45f7
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] [AArch64] Add support for the Samsung Exynos M1 processor
@ 2015-04-01 5:12 박준모
0 siblings, 0 replies; 2+ messages in thread
From: 박준모 @ 2015-04-01 5:12 UTC (permalink / raw)
To: gcc-patches
Hi, Evandro.
> -----Original Message-----
> From: gcc-patches-owner@gcc.gnu.org
> [mailto:gcc-patches-owner@gcc.gnu.org]
> On Behalf Of Evandro Menezes
> Sent: Tuesday, March 31, 2015 6:51 AM
> To: 'GCC Patches'
> Subject: [PATCH] [AArch64] Add support for the Samsung Exynos M1
> processor
>
> The Samsung Exynos M1 implements the ARMv8 ISA and this patch adds
> support for it through the -mcpu command-line option.
>
> The patch was checked on aarch64-unknown-linux-gnu without new failures.
>
> OK for trunk?
>
> --
> Evandro Menezes Austin, TX
>
Could you modify this patch likes for ARM?
I mean using cortex-a57's pipeline description.
Thanks
Junmo Park.
^ permalink raw reply [flat|nested] 2+ messages in thread
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