From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 105967 invoked by alias); 30 Mar 2015 21:52:01 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 105952 invoked by uid 89); 30 Mar 2015 21:51:59 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.0 required=5.0 tests=AWL,BAYES_00,T_HDRS_LCASE,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: usmailout4.samsung.com Received: from mailout4.w2.samsung.com (HELO usmailout4.samsung.com) (211.189.100.14) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (DES-CBC3-SHA encrypted) ESMTPS; Mon, 30 Mar 2015 21:51:58 +0000 Received: from uscpsbgm2.samsung.com (u115.gpu85.samsung.co.kr [203.254.195.115]) by usmailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NM1007R2OQKJE80@usmailout4.samsung.com> for gcc-patches@gcc.gnu.org; Mon, 30 Mar 2015 17:51:56 -0400 (EDT) Received: from ussync4.samsung.com ( [203.254.195.84]) by uscpsbgm2.samsung.com (USCPMTA) with SMTP id 20.4C.10013.C75C9155; Mon, 30 Mar 2015 17:51:56 -0400 (EDT) Received: from WEMENEZES ([105.140.33.224]) by ussync4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NM1006QQOQJEH20@ussync4.samsung.com> for gcc-patches@gcc.gnu.org; Mon, 30 Mar 2015 17:51:56 -0400 (EDT) From: Evandro Menezes To: 'GCC Patches' Subject: [PATCH] [ARM] Add support for the Samsung Exynos M1 processor Date: Mon, 30 Mar 2015 21:52:00 -0000 Message-id: <055b01d06b33$bdcce3d0$3966ab70$@samsung.com> MIME-version: 1.0 Content-type: multipart/mixed; boundary="----=_NextPart_000_055C_01D06B09.D4F702E0" X-IsSubscribed: yes X-SW-Source: 2015-03/txt/msg01596.txt.bz2 This is a multipart message in MIME format. ------=_NextPart_000_055C_01D06B09.D4F702E0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Content-length: 275 The Samsung Exynos M1 implements the ARMv8 ISA and this patch adds support for it through the -mcpu command-line option. The patch was checked on arm-unknown-linux-gnueabihf without new failures. OK for trunk? -- Evandro Menezes Austin, TX ------=_NextPart_000_055C_01D06B09.D4F702E0 Content-Type: application/octet-stream; name="0001-ARM-Add-option-for-the-Samsung-Exynos-M1-core-for-AR.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="0001-ARM-Add-option-for-the-Samsung-Exynos-M1-core-for-AR.patch" Content-length: 4085 >From 5951140f9c1ba428533b9b4e2d98a8c2bd3517c1 Mon Sep 17 00:00:00 2001=0A= From: Evandro Menezes =0A= Date: Fri, 20 Mar 2015 15:43:07 -0500=0A= Subject: [PATCH] [ARM] Add option for the Samsung Exynos M1 core for ARM=0A= =0A= gcc/=0A= * doc/invoke.texi (ARM/mtune): Add exynos-m1 as an option.=0A= * config/arm/arm-cores.def (exynos-m1): New core.=0A= * config/arm/arm-tune.md: Regenerate.=0A= * config/arm/arm-tables.opt: Add entry for "exynos-m1".=0A= * config/arm/bpabi.h: Likewise.=0A= ---=0A= gcc/config/arm/arm-cores.def | 1 +=0A= gcc/config/arm/arm-tables.opt | 3 +++=0A= gcc/config/arm/arm-tune.md | 2 +-=0A= gcc/config/arm/bpabi.h | 2 ++=0A= gcc/doc/invoke.texi | 1 +=0A= 5 files changed, 8 insertions(+), 1 deletion(-)=0A= =0A= diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def=0A= index b22ea7f..0710a38 100644=0A= --- a/gcc/config/arm/arm-cores.def=0A= +++ b/gcc/config/arm/arm-cores.def=0A= @@ -168,6 +168,7 @@ ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cor= texa7, 7A, FL_LDSCHED |=0A= ARM_CORE("cortex-a53", cortexa53, cortexa53, 8A, FL_LDSCHED | FL_CRC32, co= rtex_a53)=0A= ARM_CORE("cortex-a57", cortexa57, cortexa57, 8A, FL_LDSCHED | FL_CRC32, co= rtex_a57)=0A= ARM_CORE("cortex-a72", cortexa72, cortexa57, 8A, FL_LDSCHED | FL_CRC32, co= rtex_a57)=0A= +ARM_CORE("exynos-m1", exynosm1, exynosm1, 8A, FL_LDSCHED | FL_CRC32, exyn= osm1)=0A= ARM_CORE("xgene1", xgene1, xgene1, 8A, FL_LDSCHED, = xgene1)=0A= =20=0A= /* V8 big.LITTLE implementations */=0A= diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt= =0A= index 3450e5b..510e745 100644=0A= --- a/gcc/config/arm/arm-tables.opt=0A= +++ b/gcc/config/arm/arm-tables.opt=0A= @@ -313,6 +313,9 @@ EnumValue=0A= Enum(processor_type) String(cortex-a72) Value(cortexa72)=0A= =20=0A= EnumValue=0A= +Enum(processor_type) String(exynos-m1) Value(exynosm1)=0A= +=0A= +EnumValue=0A= Enum(processor_type) String(xgene1) Value(xgene1)=0A= =20=0A= EnumValue=0A= diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md=0A= index d459f27..f054617 100644=0A= --- a/gcc/config/arm/arm-tune.md=0A= +++ b/gcc/config/arm/arm-tune.md=0A= @@ -32,6 +32,6 @@=0A= cortexr4f,cortexr5,cortexr7,=0A= cortexm7,cortexm4,cortexm3,=0A= marvell_pj4,cortexa15cortexa7,cortexa17cortexa7,=0A= - cortexa53,cortexa57,cortexa72,=0A= + cortexa53,cortexa57,cortexa72,exynosm1,=0A= xgene1,cortexa57cortexa53,cortexa72cortexa53"=0A= (const (symbol_ref "((enum attr_tune) arm_tune)")))=0A= diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h=0A= index c62130d..ceaf2cc 100644=0A= --- a/gcc/config/arm/bpabi.h=0A= +++ b/gcc/config/arm/bpabi.h=0A= @@ -73,6 +73,7 @@=0A= |mcpu=3Dcortex-a57.cortex-a53 \=0A= |mcpu=3Dcortex-a72 \=0A= |mcpu=3Dcortex-a72.cortex-a53 \=0A= + |mcpu=3Dexynos-m1 \=0A= |mcpu=3Dxgene1 \=0A= |mcpu=3Dcortex-m1.small-multiply \=0A= |mcpu=3Dcortex-m0.small-multiply \=0A= @@ -97,6 +98,7 @@=0A= |mcpu=3Dcortex-a57.cortex-a53 \=0A= |mcpu=3Dcortex-a72 \=0A= |mcpu=3Dcortex-a72.cortex-a53 \=0A= + |mcpu=3Dexynos-m1 \=0A= |mcpu=3Dxgene1 \=0A= |mcpu=3Dcortex-m1.small-multiply \=0A= |mcpu=3Dcortex-m0.small-multiply \=0A= diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi=0A= index 19606e3..9eec108 100644=0A= --- a/gcc/doc/invoke.texi=0A= +++ b/gcc/doc/invoke.texi=0A= @@ -13192,6 +13192,7 @@ Permissible names are: @samp{arm2}, @samp{arm250},= =0A= @samp{cortex-m1.small-multiply},=0A= @samp{cortex-m0.small-multiply},=0A= @samp{cortex-m0plus.small-multiply},=0A= +@samp{exynos-m1},=0A= @samp{marvell-pj4},=0A= @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312},=0A= @samp{fa526}, @samp{fa626},=0A= --=20=0A= 2.1.0.243.g30d45f7=0A= =0A= ------=_NextPart_000_055C_01D06B09.D4F702E0--