From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 37781 invoked by alias); 7 Feb 2017 22:04:30 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 37763 invoked by uid 89); 7 Feb 2017 22:04:29 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1273 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 07 Feb 2017 22:04:19 +0000 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E0915C04BD32; Tue, 7 Feb 2017 22:04:18 +0000 (UTC) Received: from [10.3.116.59] (ovpn-116-59.phx2.redhat.com [10.3.116.59]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v17M4HtA018480; Tue, 7 Feb 2017 17:04:18 -0500 Subject: Re: [PATCH 5/5] Ensure the mode used to create split registers is suppported To: Matthew Fortune , "'gcc-patches@gcc.gnu.org' (gcc-patches@gcc.gnu.org)" References: <6D39441BF12EF246A7ABCE6654B0235380B5CE9A@hhmail02.hh.imgtec.org> Cc: "Eric Botcazou (ebotcazou@adacore.com)" , Robert Suchanek , "Moore, Catherine (Catherine_Moore@mentor.com)" From: Vladimir Makarov Message-ID: <06ccd676-3db5-44f8-9598-e28295f67a35@redhat.com> Date: Tue, 07 Feb 2017 22:04:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.6.0 MIME-Version: 1.0 In-Reply-To: <6D39441BF12EF246A7ABCE6654B0235380B5CE9A@hhmail02.hh.imgtec.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2017-02/txt/msg00573.txt.bz2 On 02/07/2017 09:08 AM, Matthew Fortune wrote: > Hi, > > This patch addresses a problem with LRA splitting hard registers > where the mode requires multiple registers. When splitting then > each constituent register is split individually using the widest > mode for each register but no check is made that such a mode is > actually supported in those registers. > > MIPS has an ABI variant o32 FPXX that allows DFmode values to > exist in pairs of 32-bit floating point registers but only the > first 32-bit register is directly addressable. The second > register can only be accessed as part of a 64-bit load/store or > via a special move instruction used as part of a 64-bit move. > > The split is simply rejected to ensure compliance with the ABI > although I expect the split logic could account for this case > and split using the wider mode. Such a change appears more > invasive than appropriate in stage 4. > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78012 > > It is unknown if any other LRA enabled target could hit this > issue but it is certainly possible depending on mode/register > restrictions. The patch is ok for the trunk and it is pretty safe. Thank you Robert and Matt.