From: Jeff Law <jeffreyalaw@gmail.com>
To: Xiao Zeng <zengxiao@eswincomputing.com>, gcc-patches@gcc.gnu.org
Cc: research_trasio@irq.a4lg.com, kito.cheng@gmail.com,
palmer@dabbelt.com, zhengyu@eswincomputing.com
Subject: Re: [PING] [PATCH] RISC-V: Add Zfbfmin extension
Date: Fri, 31 May 2024 22:34:35 -0600 [thread overview]
Message-ID: <07edbdf3-bf9e-4fdf-9a2b-4a52ead8b495@gmail.com> (raw)
In-Reply-To: <20240530113827.23143-1-zengxiao@eswincomputing.com>
On 5/30/24 5:38 AM, Xiao Zeng wrote:
> 1 In the previous patch, the libcall for BF16 was implemented:
> <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=8c7cee80eb50792e57d514be1418c453ddd1073e>
>
> 2 Riscv provides Zfbfmin extension, which completes the "Scalar BF16 Converts":
> <https://github.com/riscv/riscv-bfloat16/blob/main/doc/riscv-bfloat16-zfbfmin.adoc>
>
> 3 Implemented replacing libcall with Zfbfmin extension instruction.
>
> 4 Reused previous testcases in:
> <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=8c7cee80eb50792e57d514be1418c453ddd1073e>
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_output_move): Handle BFmode move
> for zfbfmin.
> * config/riscv/riscv.md (truncsfbf2): New pattern for BFmode.
> (trunchfbf2): Dotto.
> (truncdfbf2): Dotto.
> (trunctfbf2): Dotto.
> (extendbfsf2): Dotto.
> (*movhf_hardfloat): Add BFmode.
> (*mov<mode>_hardfloat): Dotto.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/zfbfmin-bf16_arithmetic.c: New test.
> * gcc.target/riscv/zfbfmin-bf16_comparison.c: New test.
> * gcc.target/riscv/zfbfmin-bf16_float_libcall_convert.c: New test.
> * gcc.target/riscv/zfbfmin-bf16_integer_libcall_convert.c: New test.
> ---
>
> +
> +;; The conversion of HF/DF/TF to BF needs to be done with SF if there is a
> +;; chance to generate at least one instruction, otherwise just using
> +;; libfunc __trunc[h|d|t]fbf2.
> +(define_expand "trunchfbf2"
> + [(set (match_operand:BF 0 "register_operand" "=f")
> + (float_truncate:BF
> + (match_operand:HF 1 "register_operand" " f")))]
> + "TARGET_ZFBFMIN"
> + {
> + convert_move (operands[0],
> + convert_modes (SFmode, HFmode, operands[1], 0), 0);
> + DONE;
> + }
> + [(set_attr "type" "fcvt")
> + (set_attr "mode" "BF")])
I would suggest using a mode iterator to avoid explicit pattern duplication.
Essentially a mode iterator allows you to specify that the pattern
should be repeated over a series of modes.
It looks like you've deine a conversion from HF, DF, TF. So you define
an iterator that includes just those modes. You would use the mode
iterator rather than BF, DF or TF in your pattern.
That just fixes the mode in the pattern. You also need to have the name
automagically adjust as well. Use <mode> in the name. so the name
would be somethig like trunc<mode>bf2.
When you want to reference the mode in code you can do something like
E_<MODE>mode
And that will map down to HFmode, BFmode, TFmode appropriately.
I suspect you can do something similar for the extension patterns.
In fact, it looks like you did this for the move<mode>hardfloat pattern.
Jeff
next prev parent reply other threads:[~2024-06-01 4:34 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-30 11:38 Xiao Zeng
2024-06-01 4:34 ` Jeff Law [this message]
2024-06-01 7:41 ` Xiao Zeng
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