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Subject: Re: [PATCH 1/2]middle-end Fold BIT_FIELD_REF and Shifts into
 BIT_FIELD_REFs alone
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To: Tamar Christina <tamar.christina@arm.com>, gcc-patches@gcc.gnu.org
Cc: nd@arm.com, rguenther@suse.de
References: <patch-15776-tamar@arm.com>
From: Jeff Law <jeffreyalaw@gmail.com>
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On 9/23/22 05:42, Tamar Christina wrote:
> Hi All,
>
> This adds a match.pd rule that can fold right shifts and bit_field_refs of
> integers into just a bit_field_ref by adjusting the offset and the size of the
> extract and adds an extend to the previous size.
>
> Concretely turns:
>
> #include <arm_neon.h>
>
> unsigned int foor (uint32x4_t x)
> {
>      return x[1] >> 16;
> }
>
> which used to generate:
>
>    _1 = BIT_FIELD_REF <x_2(D), 32, 32>;
>    _3 = _1 >> 16;
>
> into
>
>    _4 = BIT_FIELD_REF <x_1(D), 16, 48>;
>    _2 = (unsigned int) _4;
>
> I currently limit the rewrite to only doing it if the resulting extract is in
> a mode the target supports. i.e. it won't rewrite it to extract say 13-bits
> because I worry that for targets that won't have a bitfield extract instruction
> this may be a de-optimization.
>
> Bootstrapped Regtested on aarch64-none-linux-gnu, x86_64-pc-linux-gnu
> and no issues.
>
> Testcase are added in patch 2/2.
>
> Ok for master?
>
> Thanks,
> Tamar
>
> gcc/ChangeLog:
>
> 	* match.pd: Add bitfield and shift folding.

Were you planning to handle left shifts as well?  It looks like it since 
you've got iterations for the shift opcode and corresponding adjustment 
to the field, but they currently only handle rshift/plus.


Jeff