From: Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>
To: Joern Wolfgang Rennecke <gnu@amylaar.uk>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: "Francois.Bedard@synopsys.com" <Francois.Bedard@synopsys.com>,
"jeremy.bennett@embecosm.com" <jeremy.bennett@embecosm.com>
Subject: RE: [PATCH 4/6] [ARC] Handle FPX NaN within optimized floating point library.
Date: Thu, 28 Apr 2016 14:12:00 -0000 [thread overview]
Message-ID: <098ECE41A0A6114BB2A07F1EC238DE8966189F39@de02wembxa.internal.synopsys.com> (raw)
In-Reply-To: <5721F6E2.6060507@amylaar.uk>
Hi,
> Where exactly does the test go wrong?
The test which fails is this one:
TEST_EQ (double, __DBL_MAX__, __DBL_MAX__, 1);
From the test file included in the patch.
> Can you show a trace of __eqdf2 with register values?
Sure thing, running for ARC700, using original implementation and enabled guarded code for FPX handling:
[0x000002a2] 0xc000 K Z ld_s r0,[sp,0x0] : lw [0x5000c0c0] => 0xffffffff : (w1) r0 <= 0xffffffff *
[0x000002a4] 0xc101 K Z ld_s r1,[sp,0x4] : lw [0x5000c0c4] => 0x7fefffff : (w1) r1 <= 0x7fefffff *
[0x000002a6] 0xc202 K Z ld_s r2,[sp,0x8] : lw [0x5000c0c8] => 0xffffffff : (w1) r2 <= 0xffffffff *
[0x000002a8] 0xc303 K Z ld_s r3,[sp,0xc] : lw [0x5000c0cc] => 0x7fefffff : (w1) r3 <= 0x7fefffff *
[0x000002aa] 0x0aea0000 K Z bl 0x2e8 : (w0) r31 <= 0x000002ae *
[0x00000590] 0x091d00e1 K Z brne.d r1,r3,0x1c
[0x00000594] 0x2153050c K Z bmsk r12,r1,0x14 : (w0) r12 <= 0x000fffff *
[0x00000598] 0x200580be K Z or.f 0,r0,r2 *
[0x0000059c] 0x24cf1562 K N bset.ne r12,r12,0x15 : (w0) r12 <= 0x002fffff *
[0x000005a0] 0x2414904c K N add1.f r12,r12,r1 : (w0) r12 <= 0x000ffffd *
[0x000005a4] 0x7fe0 K C j_s.d [blink] *
[0x000005a6] 0x20cc8086 KD C cmp.cc r0,r2
For reference, the routine:
.global __eqdf2
.balign 4
HIDDEN_FUNC(__eqdf2)
/* Good performance as long as the difference in high word is
well predictable (as seen from the branch predictor). */
__eqdf2:
brne.d DBL0H,DBL1H,.Lhighdiff
bmsk r12,DBL0H,20
#ifndef __HS__
/* The next two instructions are required to recognize the FPX
NaN, which has a pattern like this: 0x7ff0_0000_8000_0000, as
oposite to 0x7ff8_0000_0000_0000. */
or.f 0,DBL0L,DBL1L
bset.ne r12,r12,21
#endif /* __HS__ */
add1.f r12,r12,DBL0H /* set c iff NaN; also, clear z if NaN. */
j_s.d [blink]
cmp.cc DBL0L,DBL1L
.balign 4
.Lhighdiff:
or r12,DBL0H,DBL1H
or.f 0,DBL0L,DBL1L
j_s.d [blink]
bmsk.eq.f r12,r12,30
ENDFUNC(__eqdf2)
All those results were collected using nsimfree.
Please let me know if you need more info,
Claudiu
next prev parent reply other threads:[~2016-04-28 14:12 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-18 14:35 [PATCH 0/6] [ARC] Various fixes Claudiu Zissulescu
2016-04-18 14:35 ` [PATCH 2/6] [ARC] Fix FPX/FPUDA code gen when compiling for big-endian Claudiu Zissulescu
2016-04-28 10:29 ` Joern Wolfgang Rennecke
2016-04-28 12:54 ` Claudiu Zissulescu
2016-04-18 14:35 ` [PATCH 3/6] [ARC] Pass mfpuda to assembler Claudiu Zissulescu
2016-04-28 10:30 ` Joern Wolfgang Rennecke
2016-04-28 13:10 ` Claudiu Zissulescu
2016-04-18 14:35 ` [PATCH 4/6] [ARC] Handle FPX NaN within optimized floating point library Claudiu Zissulescu
2016-04-28 11:27 ` Joern Wolfgang Rennecke
2016-04-28 11:35 ` Claudiu Zissulescu
2016-04-28 11:41 ` Joern Wolfgang Rennecke
2016-04-28 11:43 ` Claudiu Zissulescu
2016-04-28 14:12 ` Claudiu Zissulescu [this message]
2016-04-28 15:03 ` Joern Wolfgang Rennecke
2016-04-29 10:18 ` [PATCH] " Claudiu Zissulescu
2016-04-29 10:23 ` Joern Wolfgang Rennecke
2016-04-29 10:27 ` Joern Wolfgang Rennecke
2016-04-29 10:31 ` Claudiu Zissulescu
2016-04-29 10:37 ` Joern Wolfgang Rennecke
2016-04-29 10:47 ` Claudiu Zissulescu
2016-04-18 14:35 ` [PATCH 6/6] [ARC] Various instruction pattern fixes Claudiu Zissulescu
2016-04-18 18:26 ` Claudiu Zissulescu
2016-04-28 12:31 ` Joern Wolfgang Rennecke
2016-05-02 11:21 ` Claudiu Zissulescu
2016-04-18 14:35 ` [PATCH 1/6] [ARC] Don't use drsub* instructions when selecting fpuda Claudiu Zissulescu
2016-04-28 10:05 ` Joern Wolfgang Rennecke
2016-04-28 12:16 ` Claudiu Zissulescu
2016-04-18 14:35 ` [PATCH 5/6] [ARC] Fix unwanted match for sign extend 16-bit constant Claudiu Zissulescu
2016-04-28 11:47 ` Joern Wolfgang Rennecke
2016-04-28 17:12 ` [PATCH] " Claudiu Zissulescu
2016-04-28 17:46 ` Joern Wolfgang Rennecke
2016-04-28 20:31 ` Claudiu Zissulescu
2016-04-28 20:57 ` Joern Wolfgang Rennecke
2016-04-29 8:41 ` Claudiu Zissulescu
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