From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28158 invoked by alias); 2 May 2016 09:02:37 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 28104 invoked by uid 89); 2 May 2016 09:02:36 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.1 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_NONE,RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=saturday, Saturday, Resolve, 906 X-HELO: smtprelay.synopsys.com Received: from smtprelay2.synopsys.com (HELO smtprelay.synopsys.com) (198.182.60.111) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Mon, 02 May 2016 09:02:26 +0000 Received: from dc8secmta2.synopsys.com (dc8secmta2.synopsys.com [10.13.218.202]) by smtprelay.synopsys.com (Postfix) with ESMTP id 580E610C0ACC; Mon, 2 May 2016 02:02:23 -0700 (PDT) Received: from dc8secmta2.internal.synopsys.com (dc8secmta2.internal.synopsys.com [127.0.0.1]) by dc8secmta2.internal.synopsys.com (Service) with ESMTP id 42B2BA4112; Mon, 2 May 2016 02:02:23 -0700 (PDT) Received: from mailhost.synopsys.com (unknown [10.13.184.66]) by dc8secmta2.internal.synopsys.com (Service) with ESMTP id 0B62CA4102; Mon, 2 May 2016 02:02:23 -0700 (PDT) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id EA7188A7; Mon, 2 May 2016 02:02:22 -0700 (PDT) Received: from US01WXQAHTC1.internal.synopsys.com (us01wxqahtc1.internal.synopsys.com [10.12.238.230]) by mailhost.synopsys.com (Postfix) with ESMTP id 80A868A5; Mon, 2 May 2016 02:02:22 -0700 (PDT) Received: from DE02WEHTCB.internal.synopsys.com (10.225.19.94) by US01WXQAHTC1.internal.synopsys.com (10.12.238.230) with Microsoft SMTP Server (TLS) id 14.3.195.1; Mon, 2 May 2016 02:02:22 -0700 Received: from DE02WEMBXA.internal.synopsys.com ([fe80::a014:7216:77d:d55c]) by DE02WEHTCB.internal.synopsys.com ([::1]) with mapi id 14.03.0195.001; Mon, 2 May 2016 11:02:17 +0200 From: Claudiu Zissulescu To: Andrew Burgess , Joern Wolfgang Rennecke CC: "gcc-patches@gcc.gnu.org" , "noamca@mellanox.com" Subject: RE: [PATCHv2 0/7] ARC: Add support for nps400 variant Date: Mon, 02 May 2016 09:02:00 -0000 Message-ID: <098ECE41A0A6114BB2A07F1EC238DE896618A44C@de02wembxa.internal.synopsys.com> References: <57222CCF.1090109@amylaar.uk> <57224071.1020905@amylaar.uk> <098ECE41A0A6114BB2A07F1EC238DE896618A1BF@de02wembxa.internal.synopsys.com> <20160429221713.GI1592@embecosm.com> In-Reply-To: <20160429221713.GI1592@embecosm.com> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-SW-Source: 2016-05/txt/msg00042.txt.bz2 Please also consider to address also the following warnings introduced: mainline/gcc/gcc/config/arc/arc.md:888: warning: source missing a mode? mainline/gcc/gcc/config/arc/arc.md:906: warning: source missing a mode? mainline/gcc/gcc/config/arc/arc.md:921: warning: source missing a mode? mainline/gcc/gcc/config/arc/arc.md:6146: warning: source missing a mode? Thanks, Claudiu > -----Original Message----- > From: Andrew Burgess [mailto:andrew.burgess@embecosm.com] > Sent: Saturday, April 30, 2016 12:17 AM > To: Claudiu Zissulescu; Joern Wolfgang Rennecke > Cc: gcc-patches@gcc.gnu.org; noamca@mellanox.com > Subject: Re: [PATCHv2 0/7] ARC: Add support for nps400 variant >=20 > * Claudiu Zissulescu [2016-04-29 > 09:03:53 +0000]: >=20 > > I see the next tests failing: > > > > FAIL: gcc.target/arc/movb-1.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]= +, > *r[0-5]+, *19, *21, *8 > > FAIL: gcc.target/arc/movb-2.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]= +, > *r[0-5]+, *23, *23, *9 > > FAIL: gcc.target/arc/movb-5.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]= +, > *r[0-5]+, *23, *(23|7), *9 > > FAIL: gcc.target/arc/movh_cl-1.c scan-assembler movh.cl r[0- > 9]+,0xc0000000>>16 >=20 > Claudiu, Joern, >=20 > I believe that the patch below should resolve the issues that you're > seeing for little endian arc tests. >=20 > It's mostly just updating the expected results, though one test needed > improving for l/e arc. >=20 > In the final test the layout used for bitfields within a struct on > little endian arc just happened to result in a movb (move bits) not > being generated when it could / should have been. I've added a new > peephole2 case to catch this. >=20 > Thanks, > Andrew >=20 > --- >=20 > gcc/arc: New peephole2 and little endian arc test fixes >=20 > Resolve some test failures introduced for little endian arc as a result > of the recent arc/nps400 additions. >=20 > There's a new peephole2 optimisation to merge together two zero_extracts > in order that the movb instruction can be used. >=20 > One of the test cases is extended so that the test does something > meaningful in both big and little endian arc mode. >=20 > Other tests have their expected results updated to reflect improvements > in other areas of GCC. >=20 > gcc/ChangeLog: >=20 > * config/arc/arc.md (movb peephole2): New peephole2 to merge > two > zero_extract operations to allow a movb to occur. >=20 > gcc/testsuite/ChangeLog: >=20 > * gcc.target/arc/movb-1.c: Update little endian arc results. > * gcc.target/arc/movb-2.c: Likewise. > * gcc.target/arc/movb-5.c: Likewise. > * gcc.target/arc/movh_cl-1.c: Extend test to cover little endian > arc. > --- > gcc/ChangeLog | 5 +++++ > gcc/config/arc/arc.md | 14 ++++++++++++++ > gcc/testsuite/ChangeLog | 8 ++++++++ > gcc/testsuite/gcc.target/arc/movb-1.c | 2 +- > gcc/testsuite/gcc.target/arc/movb-2.c | 2 +- > gcc/testsuite/gcc.target/arc/movb-5.c | 2 +- > gcc/testsuite/gcc.target/arc/movh_cl-1.c | 11 +++++++++++ > 7 files changed, 41 insertions(+), 3 deletions(-) >=20 > diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md > index c61107f..0b92594 100644 > --- a/gcc/config/arc/arc.md > +++ b/gcc/config/arc/arc.md > @@ -6144,6 +6144,20 @@ > (zero_extract:SI (match_dup 1) (match_dup 5) (match_dup > 7)))]) > (match_dup 1)]) >=20 > +(define_peephole2 > + [(set (match_operand:SI 0 "register_operand" "") > + (zero_extract:SI (match_dup 0) > + (match_operand:SI 1 "const_int_operand" "") > + (match_operand:SI 2 "const_int_operand" ""))) > + (set (zero_extract:SI (match_operand:SI 3 "register_operand" "") > + (match_dup 1) > + (match_dup 2)) > + (match_dup 0))] > + "TARGET_NPS_BITOPS > + && !reg_overlap_mentioned_p (operands[0], operands[3])" > + [(set (zero_extract:SI (match_dup 3) (match_dup 1) (match_dup 2)) > + (zero_extract:SI (match_dup 0) (match_dup 1) (match_dup 2)))]) > + > ;; include the arc-FPX instructions > (include "fpx.md") >=20 > diff --git a/gcc/testsuite/gcc.target/arc/movb-1.c > b/gcc/testsuite/gcc.target/arc/movb-1.c > index 65d4ba4..94d9f5f 100644 > --- a/gcc/testsuite/gcc.target/arc/movb-1.c > +++ b/gcc/testsuite/gcc.target/arc/movb-1.c > @@ -10,4 +10,4 @@ f (void) > bar.b =3D foo.b; > } > /* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0= -5\]+, > *5, *3, *8" { target arceb-*-* } } } */ > -/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0= -5\]+, > *19, *21, *8" { target arc-*-* } } } */ > +/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0= -5\]+, > *3, *5, *8" { target arc-*-* } } } */ > diff --git a/gcc/testsuite/gcc.target/arc/movb-2.c > b/gcc/testsuite/gcc.target/arc/movb-2.c > index 1ba9976..708f393 100644 > --- a/gcc/testsuite/gcc.target/arc/movb-2.c > +++ b/gcc/testsuite/gcc.target/arc/movb-2.c > @@ -9,5 +9,5 @@ f (void) > { > bar.b =3D foo.b; > } > -/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0= -5\]+, > *23, *23, *9" { target arc-*-* } } } */ > +/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0= -5\]+, > *7, *7, *9" { target arc-*-* } } } */ > /* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0= -5\]+, > *0, *0, *9" { target arceb-*-* } } } */ > diff --git a/gcc/testsuite/gcc.target/arc/movb-5.c > b/gcc/testsuite/gcc.target/arc/movb-5.c > index 9dbe8a1..d285888 100644 > --- a/gcc/testsuite/gcc.target/arc/movb-5.c > +++ b/gcc/testsuite/gcc.target/arc/movb-5.c > @@ -9,5 +9,5 @@ f (void) > { > bar.b =3D foo.b; > } > -/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0= -5\]+, > *23, *(23|7), *9" { target arc-*-* } } } */ > +/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0= -5\]+, > *7, *7, *9" { target arc-*-* } } } */ > /* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0= -5\]+, > *0, *0, *9" { target arceb-*-* } } } */ > diff --git a/gcc/testsuite/gcc.target/arc/movh_cl-1.c > b/gcc/testsuite/gcc.target/arc/movh_cl-1.c > index 220cd9d..c643481 100644 > --- a/gcc/testsuite/gcc.target/arc/movh_cl-1.c > +++ b/gcc/testsuite/gcc.target/arc/movh_cl-1.c > @@ -10,6 +10,9 @@ struct thing > { > unsigned a : 1; > unsigned b : 1; > + unsigned c : 28; > + unsigned d : 1; > + unsigned e : 1; > }; > }; > }; > @@ -24,4 +27,12 @@ blah () > func (xx.raw); > } >=20 > +void > +woof () > +{ > + struct thing xx; > + xx.d =3D xx.e =3D 1; > + func (xx.raw); > +} > + > /* { dg-final { scan-assembler "movh\.cl r\[0-9\]+,0xc0000000>>16" } } */ > -- > 2.6.4