public inbox for gcc-patches@gcc.gnu.org
 help / color / mirror / Atom feed
From: Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>
To: Andrew Burgess <andrew.burgess@embecosm.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
	"noamca@mellanox.com" <noamca@mellanox.com>,
	Francois Bedard <Francois.Bedard@synopsys.com>
Subject: RE: [PATCHv2 0/7] ARC: Add support for nps400 variant
Date: Wed, 16 Nov 2016 11:44:00 -0000	[thread overview]
Message-ID: <098ECE41A0A6114BB2A07F1EC238DE89661BBF12@de02wembxa.internal.synopsys.com> (raw)
In-Reply-To: <20160429221713.GI1592@embecosm.com>

Approved and committed: Committed r24248

//Claudiu

> -----Original Message-----
> From: Andrew Burgess [mailto:andrew.burgess@embecosm.com]
> Sent: Saturday, April 30, 2016 12:17 AM
> To: Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>; Joern Wolfgang
> Rennecke <gnu@amylaar.uk>
> Cc: gcc-patches@gcc.gnu.org; noamca@mellanox.com
> Subject: Re: [PATCHv2 0/7] ARC: Add support for nps400 variant
> 
> * Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com> [2016-04-29
> 09:03:53 +0000]:
> 
> > I see the next tests failing:
> >
> > FAIL: gcc.target/arc/movb-1.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]+,
> *r[0-5]+, *19, *21, *8
> > FAIL: gcc.target/arc/movb-2.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]+,
> *r[0-5]+, *23, *23, *9
> > FAIL: gcc.target/arc/movb-5.c scan-assembler movb[ \t]+r[0-5]+, *r[0-5]+,
> *r[0-5]+, *23, *(23|7), *9
> > FAIL: gcc.target/arc/movh_cl-1.c scan-assembler movh.cl r[0-
> 9]+,0xc0000000>>16
> 
> Claudiu, Joern,
> 
> I believe that the patch below should resolve the issues that you're
> seeing for little endian arc tests.
> 
> It's mostly just updating the expected results, though one test needed
> improving for l/e arc.
> 
> In the final test the layout used for bitfields within a struct on
> little endian arc just happened to result in a movb (move bits) not
> being generated when it could / should have been.  I've added a new
> peephole2 case to catch this.
> 
> Thanks,
> Andrew
> 
> ---
> 
> gcc/arc: New peephole2 and little endian arc test fixes
> 
> Resolve some test failures introduced for little endian arc as a result
> of the recent arc/nps400 additions.
> 
> There's a new peephole2 optimisation to merge together two zero_extracts
> in order that the movb instruction can be used.
> 
> One of the test cases is extended so that the test does something
> meaningful in both big and little endian arc mode.
> 
> Other tests have their expected results updated to reflect improvements
> in other areas of GCC.
> 
> gcc/ChangeLog:
> 
> 	* config/arc/arc.md (movb peephole2): New peephole2 to merge
> two
> 	zero_extract operations to allow a movb to occur.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/arc/movb-1.c: Update little endian arc results.
> 	* gcc.target/arc/movb-2.c: Likewise.
> 	* gcc.target/arc/movb-5.c: Likewise.
> 	* gcc.target/arc/movh_cl-1.c: Extend test to cover little endian
> 	arc.
> ---
>  gcc/ChangeLog                            |  5 +++++
>  gcc/config/arc/arc.md                    | 14 ++++++++++++++
>  gcc/testsuite/ChangeLog                  |  8 ++++++++
>  gcc/testsuite/gcc.target/arc/movb-1.c    |  2 +-
>  gcc/testsuite/gcc.target/arc/movb-2.c    |  2 +-
>  gcc/testsuite/gcc.target/arc/movb-5.c    |  2 +-
>  gcc/testsuite/gcc.target/arc/movh_cl-1.c | 11 +++++++++++
>  7 files changed, 41 insertions(+), 3 deletions(-)
> 
> diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
> index c61107f..0b92594 100644
> --- a/gcc/config/arc/arc.md
> +++ b/gcc/config/arc/arc.md
> @@ -6144,6 +6144,20 @@
>  		   (zero_extract:SI (match_dup 1) (match_dup 5) (match_dup
> 7)))])
>     (match_dup 1)])
> 
> +(define_peephole2
> +  [(set (match_operand:SI 0 "register_operand" "")
> +        (zero_extract:SI (match_dup 0)
> +			 (match_operand:SI 1 "const_int_operand" "")
> +			 (match_operand:SI 2 "const_int_operand" "")))
> +   (set (zero_extract:SI (match_operand:SI 3 "register_operand" "")
> +			 (match_dup 1)
> +                         (match_dup 2))
> +	(match_dup 0))]
> +  "TARGET_NPS_BITOPS
> +   && !reg_overlap_mentioned_p (operands[0], operands[3])"
> +  [(set (zero_extract:SI (match_dup 3) (match_dup 1) (match_dup 2))
> +        (zero_extract:SI (match_dup 0) (match_dup 1) (match_dup 2)))])
> +
>  ;; include the arc-FPX instructions
>  (include "fpx.md")
> 
> diff --git a/gcc/testsuite/gcc.target/arc/movb-1.c
> b/gcc/testsuite/gcc.target/arc/movb-1.c
> index 65d4ba4..94d9f5f 100644
> --- a/gcc/testsuite/gcc.target/arc/movb-1.c
> +++ b/gcc/testsuite/gcc.target/arc/movb-1.c
> @@ -10,4 +10,4 @@ f (void)
>    bar.b = foo.b;
>  }
>  /* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+,
> *5, *3, *8" { target arceb-*-* } } } */
> -/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+,
> *19, *21, *8" { target arc-*-* } } } */
> +/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+,
> *3, *5, *8" { target arc-*-* } } } */
> diff --git a/gcc/testsuite/gcc.target/arc/movb-2.c
> b/gcc/testsuite/gcc.target/arc/movb-2.c
> index 1ba9976..708f393 100644
> --- a/gcc/testsuite/gcc.target/arc/movb-2.c
> +++ b/gcc/testsuite/gcc.target/arc/movb-2.c
> @@ -9,5 +9,5 @@ f (void)
>  {
>    bar.b = foo.b;
>  }
> -/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+,
> *23, *23, *9" { target arc-*-* } } } */
> +/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+,
> *7, *7, *9" { target arc-*-* } } } */
>  /* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+,
> *0, *0, *9" { target arceb-*-* } } } */
> diff --git a/gcc/testsuite/gcc.target/arc/movb-5.c
> b/gcc/testsuite/gcc.target/arc/movb-5.c
> index 9dbe8a1..d285888 100644
> --- a/gcc/testsuite/gcc.target/arc/movb-5.c
> +++ b/gcc/testsuite/gcc.target/arc/movb-5.c
> @@ -9,5 +9,5 @@ f (void)
>  {
>    bar.b = foo.b;
>  }
> -/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+,
> *23, *(23|7), *9" { target arc-*-* } } } */
> +/* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+,
> *7, *7, *9" { target arc-*-* } } } */
>  /* { dg-final { scan-assembler "movb\[ \t\]+r\[0-5\]+, *r\[0-5\]+, *r\[0-5\]+,
> *0, *0, *9" { target arceb-*-* } } } */
> diff --git a/gcc/testsuite/gcc.target/arc/movh_cl-1.c
> b/gcc/testsuite/gcc.target/arc/movh_cl-1.c
> index 220cd9d..c643481 100644
> --- a/gcc/testsuite/gcc.target/arc/movh_cl-1.c
> +++ b/gcc/testsuite/gcc.target/arc/movh_cl-1.c
> @@ -10,6 +10,9 @@ struct thing
>      {
>        unsigned a : 1;
>        unsigned b : 1;
> +      unsigned c : 28;
> +      unsigned d : 1;
> +      unsigned e : 1;
>      };
>    };
>  };
> @@ -24,4 +27,12 @@ blah ()
>    func (xx.raw);
>  }
> 
> +void
> +woof ()
> +{
> +  struct thing xx;
> +  xx.d = xx.e = 1;
> +  func (xx.raw);
> +}
> +
>  /* { dg-final { scan-assembler "movh\.cl r\[0-9\]+,0xc0000000>>16" } } */
> --
> 2.6.4

  parent reply	other threads:[~2016-11-16 11:44 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-04 13:25 [PATCH 00/10] ARC: Add support for NPS400 variant Andrew Burgess
2016-03-04 13:25 ` [PATCH 01/10] gcc: Add support for mellanox nps400 arc variant Andrew Burgess
2016-03-04 13:26 ` [PATCH 06/10] gcc/arc: Add support for nps400 cmem xld/xst instructions Andrew Burgess
2016-03-04 13:26 ` [PATCH 05/10] gcc/arc: convert some constraints to define_constraint Andrew Burgess
2016-03-04 13:26 ` [PATCH 03/10] gcc/arc: generate jump tables in code section for nps400 Andrew Burgess
2016-03-04 13:26 ` [PATCH 08/10] gcc/arc: Mask integer 'L' operands to 32-bit Andrew Burgess
2016-03-04 13:26 ` [PATCH 09/10] gcc/arc: Add an nps400 specific testcase Andrew Burgess
2016-03-04 13:26 ` [PATCH 04/10] gcc/arc: Replace rI constraint with r & Cm2 for ld and update insns Andrew Burgess
2016-03-04 13:26 ` [PATCH 02/10] gcc/arc: Add -munaligned-access option for nps400 Andrew Burgess
2016-03-04 13:26 ` [PATCH 07/10] gcc/arc: Add nps400 bitops support Andrew Burgess
2016-03-04 13:26 ` [PATCH 10/10] gcc/arc: Add __NPS400__ define for nps400 targets Andrew Burgess
2016-04-21 11:39 ` [PATCHv2 2/7] gcc/arc: Replace rI constraint with r & Cm2 for ld and update insns Andrew Burgess
2016-04-28 17:07   ` Joern Wolfgang Rennecke
2016-04-29 11:59     ` Andrew Burgess
2016-04-29 12:09       ` Joern Wolfgang Rennecke
2016-04-21 11:39 ` [PATCHv2 0/7] ARC: Add support for nps400 variant Andrew Burgess
2016-04-28 15:31   ` Joern Wolfgang Rennecke
2016-04-28 16:55     ` Joern Wolfgang Rennecke
2016-04-29  9:04       ` Claudiu Zissulescu
2016-04-29 10:22         ` Andrew Burgess
2016-04-29 22:17         ` Andrew Burgess
2016-05-02  9:02           ` Claudiu Zissulescu
2016-05-03 10:56             ` Andrew Burgess
2016-05-12 11:30               ` Claudiu Zissulescu
2016-06-14 18:46               ` Joern Wolfgang Rennecke
2016-06-14 23:38                 ` [PATCH 0/2] Arc fixes and genrecog warning fix Andrew Burgess
2016-06-14 23:38                 ` [PATCH 1/2] gcc/arc: New peephole2 and little endian arc test fixes Andrew Burgess
2016-06-14 23:38                 ` [PATCH 2/2] gcc/genrecog: Don't warn for missing mode on special predicates Andrew Burgess
2016-06-15 18:08                   ` Richard Sandiford
2016-06-30 13:38                     ` Andrew Burgess
2016-07-04  8:47                       ` Richard Sandiford
2016-07-06 19:43                         ` Andrew Burgess
2016-07-13 22:19                           ` Jeff Law
2016-11-16 11:44           ` Claudiu Zissulescu [this message]
2016-04-21 11:39 ` [PATCHv2 3/7] gcc/arc: convert some constraints to define_constraint Andrew Burgess
2016-04-28 17:16   ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 7/7] gcc/arc: Add an nps400 specific testcase Andrew Burgess
2016-04-28 19:14   ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 5/7] gcc/arc: Add nps400 bitops support Andrew Burgess
2016-04-28 18:50   ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 1/7] gcc/arc: Add support for nps400 cpu type Andrew Burgess
2016-04-28 17:07   ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 6/7] gcc/arc: Mask integer 'L' operands to 32-bit Andrew Burgess
2016-04-28 19:09   ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 4/7] gcc/arc: Add support for nps400 cmem xld/xst instructions Andrew Burgess
2016-04-28 18:23   ` Joern Wolfgang Rennecke

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=098ECE41A0A6114BB2A07F1EC238DE89661BBF12@de02wembxa.internal.synopsys.com \
    --to=claudiu.zissulescu@synopsys.com \
    --cc=Francois.Bedard@synopsys.com \
    --cc=andrew.burgess@embecosm.com \
    --cc=gcc-patches@gcc.gnu.org \
    --cc=noamca@mellanox.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).