Re: Re: [PATCH] test: Fix FAIL of vect-sdiv-pow2-1.c for RVV test: Fix FAIL of vect-sdiv-pow2-1.c for RVV#

[钟居哲 <juzhe.zhong@rivai.ai>]

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Ok.  Sorry for inconvenience.

Here is the patch to fix as you suggested:
https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635580.html 

I disabled this test, instead, I will add it into riscv specific testsuite list.

Thanks.


juzhe.zhong@rivai.ai
 
From: Richard Biener
Date: 2023-11-07 22:36
To: 钟居哲
CC: gcc-patches; Jeff Law
Subject: Re: Re: [PATCH] test: Fix FAIL of vect-sdiv-pow2-1.c for RVV test: Fix FAIL of vect-sdiv-pow2-1.c for RVV#
On Tue, 7 Nov 2023, ??? wrote:
 
> Hi, Richi.
> 
> We don't have explicit SDIV_POW2 pattern but we still want to test it to make sure
> we can vectorize SDIV_POW2 pattern which will be recognized.
> 
> Maybe we should add another target check ?
 
No, you should simply _not_ add riscv*-*-* to 
check_effective_target_vect_sdiv_pow2_si when you don't implement that
pattern!
 
The test is specifically for this very pattern, not a test whether
we can vectorize this at all.
 
> 
> 
> juzhe.zhong@rivai.ai
>  
> From: Richard Biener
> Date: 2023-11-07 21:45
> To: Juzhe-Zhong
> CC: gcc-patches; jeffreyalaw
> Subject: Re: [PATCH] test: Fix FAIL of vect-sdiv-pow2-1.c for RVV test: Fix FAIL of vect-sdiv-pow2-1.c for RVV#
> On Tue, 7 Nov 2023, Juzhe-Zhong wrote:
>  
> > RVV didn't explictly enable DIV_POW2 optab but we cen vectorize it.
> > We should check pattern recognition instead of explicit pattern check.
>  
> But I see
>  
> proc check_effective_target_vect_sdiv_pow2_si {} {
>     return [expr { ([istarget aarch64*-*-*]
>                     && [check_effective_target_aarch64_sve])
>                    || ([istarget riscv*-*-*]
>                        && [check_effective_target_riscv_v]) }]
>  
> so if you don't have sdiv_pow2_si then please don't advertise it.
>  
> > gcc/testsuite/ChangeLog:
> > 
> > * gcc.dg/vect/vect-sdiv-pow2-1.c: Fix dump check.
> > 
> > ---
> >  gcc/testsuite/gcc.dg/vect/vect-sdiv-pow2-1.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/gcc/testsuite/gcc.dg/vect/vect-sdiv-pow2-1.c b/gcc/testsuite/gcc.dg/vect/vect-sdiv-pow2-1.c
> > index 49ecbe216f2..8056c2a6748 100644
> > --- a/gcc/testsuite/gcc.dg/vect/vect-sdiv-pow2-1.c
> > +++ b/gcc/testsuite/gcc.dg/vect/vect-sdiv-pow2-1.c
> > @@ -79,5 +79,5 @@ main (void)
> >    return 0;
> >  }
> >  
> > -/* { dg-final { scan-tree-dump {\.DIV_POW2} "vect" { target vect_sdiv_pow2_si } } } */
> > +/* { dg-final { scan-tree-dump "vect_recog_divmod_pattern: detected" "vect" } } */
> >  /* { dg-final { scan-tree-dump-times "vectorized 1 loop" 18 "vect" { target vect_sdiv_pow2_si } } } */
> > 
>  
> 
 
-- 
Richard Biener <rguenther@suse.de>
SUSE Software Solutions Germany GmbH,
Frankenstrasse 146, 90461 Nuernberg, Germany;
GF: Ivo Totev, Andrew McDonald, Werner Knoblich; (HRB 36809, AG Nuernberg)