* [PATCH] MIPS: fix failing branch range checks for micromips
@ 2015-07-03 23:50 Andrew Bennett
2015-07-06 12:27 ` Andrew Bennett
2015-07-06 23:22 ` Moore, Catherine
0 siblings, 2 replies; 7+ messages in thread
From: Andrew Bennett @ 2015-07-03 23:50 UTC (permalink / raw)
To: gcc-patches; +Cc: Matthew Fortune
Hi,
The current branch range tests assume that the MIPS branch instructions
have a 16 bit branch offset which is shifted by 2. Unfortunately for microMIPS
this offset is shifted by 1 which reduces the branch range and is causing the
branch-[2,4,6,10,12].c tests to fail.
The following patch fixes this issue by firstly adding a new macro to branch-helper.h
which outputs the correct number of nops to describe the maximum positive range
of a 16 bit micromips branch offset (assuming the branch instruction has a delay slot).
Secondly it breaks-up the branch-[2,4,6,10,12].c files into mips tests (which have
-mno-micromips added to them) and micromips tests (which use the new macro).
I have tested this on the mips-mti-elf target using mips32r2/{-mno-micromips/-mmicromips}
test options and there are no new regressions.
There is a follow-up patch that I will be working on that will correctly update the other
branch tests to correctly test out of range branch behaviour for micromips. Currently these
are passing because the mips branch range offset is large enough. These offsets will
need to be reduced for micromips to verify the compiler is calculating branch ranges correctly.
The ChangeLog and patch are below.
Ok to commit?
Many thanks,
Andrew
testsuite/
* gcc.target/mips/branch-2.c: Add -mno-micromips to dg-options.
* gcc.target/mips/branch-4.c: Ditto.
* gcc.target/mips/branch-6.c: Ditto.
* gcc.target/mips/branch-8.c: Ditto.
* gcc.target/mips/branch-10.c: Ditto.
* gcc.target/mips/branch-12.c: Ditto.
* gcc.target/mips/branch-umips-2.c: New file.
* gcc.target/mips/branch-umips-4.c: New file.
* gcc.target/mips/branch-umips-6.c: New file.
* gcc.target/mips/branch-umips-8.c: New file.
* gcc.target/mips/branch-umips-10.c: New file.
* gcc.target/mips/branch-umips-12.c: New file.
* gcc.target/mips/branch-helper.h (OCCUPY_0xfffc): New define.
diff --git a/gcc/testsuite/gcc.target/mips/branch-10.c b/gcc/testsuite/gcc.target/mips/branch-10.c
index e2b1b5f..00569b0 100644
--- a/gcc/testsuite/gcc.target/mips/branch-10.c
+++ b/gcc/testsuite/gcc.target/mips/branch-10.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=n32" } */
+/* { dg-options "-mshared -mabi=n32 -mno-micromips" } */
/* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-12.c b/gcc/testsuite/gcc.target/mips/branch-12.c
index 4aef160..7d7580b 100644
--- a/gcc/testsuite/gcc.target/mips/branch-12.c
+++ b/gcc/testsuite/gcc.target/mips/branch-12.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=64" } */
+/* { dg-options "-mshared -mabi=64 -mno-micromips" } */
/* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-2.c b/gcc/testsuite/gcc.target/mips/branch-2.c
index 6409c4c..241e885 100644
--- a/gcc/testsuite/gcc.target/mips/branch-2.c
+++ b/gcc/testsuite/gcc.target/mips/branch-2.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=32" } */
+/* { dg-options "-mshared -mabi=32 -mno-micromips" } */
/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|cpload)" } } */
/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
/* { dg-final { scan-assembler-not "\\.cprestore" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-4.c b/gcc/testsuite/gcc.target/mips/branch-4.c
index 31e4909..923e6d4 100644
--- a/gcc/testsuite/gcc.target/mips/branch-4.c
+++ b/gcc/testsuite/gcc.target/mips/branch-4.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=n32" } */
+/* { dg-options "-mshared -mabi=n32 -mno-micromips" } */
/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */
/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-6.c b/gcc/testsuite/gcc.target/mips/branch-6.c
index 77e0340..2c75ab1 100644
--- a/gcc/testsuite/gcc.target/mips/branch-6.c
+++ b/gcc/testsuite/gcc.target/mips/branch-6.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=64" } */
+/* { dg-options "-mshared -mabi=64 -mno-micromips" } */
/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */
/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-8.c b/gcc/testsuite/gcc.target/mips/branch-8.c
index ba5f954..85df6b8 100644
--- a/gcc/testsuite/gcc.target/mips/branch-8.c
+++ b/gcc/testsuite/gcc.target/mips/branch-8.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=32" } */
+/* { dg-options "-mshared -mabi=32 -mno-micromips" } */
/* { dg-final { scan-assembler-not "(\\\$28|cpload|cprestore)" } } */
/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-helper.h b/gcc/testsuite/gcc.target/mips/branch-helper.h
index 85399be..bc4a31f 100644
--- a/gcc/testsuite/gcc.target/mips/branch-helper.h
+++ b/gcc/testsuite/gcc.target/mips/branch-helper.h
@@ -33,5 +33,23 @@
D2 ("nop") "\n\t" \
D1 ("nop"))
+/* Emit something that is 0xfffc bytes long, which is the largest
+ permissible range for micromips forward branches when branches
+ have delay slots. */
+#define OCCUPY_0xfffc \
+ asm (D13 ("nop32") "\n\t" \
+ D12 ("nop32") "\n\t" \
+ D11 ("nop32") "\n\t" \
+ D10 ("nop32") "\n\t" \
+ D9 ("nop32") "\n\t" \
+ D8 ("nop32") "\n\t" \
+ D7 ("nop32") "\n\t" \
+ D6 ("nop32") "\n\t" \
+ D5 ("nop32") "\n\t" \
+ D4 ("nop32") "\n\t" \
+ D3 ("nop32") "\n\t" \
+ D2 ("nop32") "\n\t" \
+ D1 ("nop32") "\n\t" \
+ D0 ("nop32"))
/* Likewise emit something that is 0x1fffc bytes long. */
#define OCCUPY_0x1fffc do { asm ("nop"); OCCUPY_0x1fff8; } while (0)
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-10.c b/gcc/testsuite/gcc.target/mips/branch-umips-10.c
new file mode 100644
index 0000000..e84b462
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-10.c
@@ -0,0 +1,13 @@
+/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
+/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-12.c b/gcc/testsuite/gcc.target/mips/branch-umips-12.c
new file mode 100644
index 0000000..6704aad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-12.c
@@ -0,0 +1,13 @@
+/* { dg-options "-mshared -mabi=64 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
+/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-2.c b/gcc/testsuite/gcc.target/mips/branch-umips-2.c
new file mode 100644
index 0000000..d124f91
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-2.c
@@ -0,0 +1,13 @@
+/* { dg-options "-mshared -mabi=32 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|cpload)" } } */
+/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
+/* { dg-final { scan-assembler-not "\\.cprestore" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-4.c b/gcc/testsuite/gcc.target/mips/branch-umips-4.c
new file mode 100644
index 0000000..294805a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-4.c
@@ -0,0 +1,12 @@
+/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */
+/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-6.c b/gcc/testsuite/gcc.target/mips/branch-umips-6.c
new file mode 100644
index 0000000..ab02e88
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-6.c
@@ -0,0 +1,12 @@
+/* { dg-options "-mshared -mabi=64 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */
+/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-8.c b/gcc/testsuite/gcc.target/mips/branch-umips-8.c
new file mode 100644
index 0000000..5050669
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-8.c
@@ -0,0 +1,13 @@
+/* { dg-options "-mshared -mabi=32 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$28|cpload|cprestore)" } } */
+/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
--
1.7.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH] MIPS: fix failing branch range checks for micromips
2015-07-03 23:50 [PATCH] MIPS: fix failing branch range checks for micromips Andrew Bennett
@ 2015-07-06 12:27 ` Andrew Bennett
2015-07-06 23:22 ` Moore, Catherine
1 sibling, 0 replies; 7+ messages in thread
From: Andrew Bennett @ 2015-07-06 12:27 UTC (permalink / raw)
To: gcc-patches; +Cc: Matthew Fortune
> There is a follow-up patch that I will be working on that will correctly
> update the other
> branch tests to correctly test out of range branch behaviour for
> micromips. Currently these
> are passing because the mips branch range offset is large enough. These
> offsets will
> need to be reduced for micromips to verify the compiler is calculating branch
> ranges correctly.
The following patch and ChangeLog adds out-of-range branch checks for micromips.
It also adds micromips versions of the branch range run tests (branch-14.c and
branch-15.c).
I have tested this on the mips-mti-elf target using mips32r2/{-mno-micromips/-mmicromips}
test options and there are no new regressions.
Ok to commit?
Many thanks,
Andrew
testsuite/
* gcc.target/mips/branch-3.c: Add -mno-micromips to dg-options.
* gcc.target/mips/branch-5.c: Ditto.
* gcc.target/mips/branch-7.c: Ditto.
* gcc.target/mips/branch-9.c: Ditto.
* gcc.target/mips/branch-11.c: Ditto.
* gcc.target/mips/branch-13.c: Ditto.
* gcc.target/mips/branch-14.c: Ditto.
* gcc.target/mips/branch-15.c: Ditto.
* gcc.target/mips/branch-umips-3.c: New file.
* gcc.target/mips/branch-umips-5.c: New file.
* gcc.target/mips/branch-umips-7.c: New file.
* gcc.target/mips/branch-umips-9.c: New file.
* gcc.target/mips/branch-umips-11.c: New file.
* gcc.target/mips/branch-umips-13.c: New file.
* gcc.target/mips/branch-umips-14.c: New file.
* gcc.target/mips/branch-umips-15.c: New file.
* gcc.target/mips/branch-helper.h (OCCUPY_0x10000): New define.
diff --git a/gcc/testsuite/gcc.target/mips/branch-11.c b/gcc/testsuite/gcc.target/mips/branch-11.c
index 962eb1b..c33686a 100644
--- a/gcc/testsuite/gcc.target/mips/branch-11.c
+++ b/gcc/testsuite/gcc.target/mips/branch-11.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=n32" } */
+/* { dg-options "-mshared -mabi=n32 -mno-micromips" } */
/* { dg-final { scan-assembler "\tsd\t\\\$28," } } */
/* { dg-final { scan-assembler "\tld\t\\\$28," } } */
/* { dg-final { scan-assembler "\taddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-13.c b/gcc/testsuite/gcc.target/mips/branch-13.c
index 8a6fb04..4da4a37 100644
--- a/gcc/testsuite/gcc.target/mips/branch-13.c
+++ b/gcc/testsuite/gcc.target/mips/branch-13.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=64" } */
+/* { dg-options "-mshared -mabi=64 -mno-micromips" } */
/* { dg-final { scan-assembler "\tsd\t\\\$28," } } */
/* { dg-final { scan-assembler "\tld\t\\\$28," } } */
/* { dg-final { scan-assembler "\tdaddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-14.c b/gcc/testsuite/gcc.target/mips/branch-14.c
index 026417e..5193808 100644
--- a/gcc/testsuite/gcc.target/mips/branch-14.c
+++ b/gcc/testsuite/gcc.target/mips/branch-14.c
@@ -1,4 +1,5 @@
/* An executable version of branch-2.c. */
+/* { dg-options "-mno-micromips" } */
/* { dg-do run } */
#include "branch-helper.h"
diff --git a/gcc/testsuite/gcc.target/mips/branch-15.c b/gcc/testsuite/gcc.target/mips/branch-15.c
index dee7a05..a28de9a 100644
--- a/gcc/testsuite/gcc.target/mips/branch-15.c
+++ b/gcc/testsuite/gcc.target/mips/branch-15.c
@@ -1,4 +1,5 @@
/* An executable version of branch-3.c. */
+/* { dg-options "-mno-micromips" } */
/* { dg-do run } */
#include "branch-helper.h"
diff --git a/gcc/testsuite/gcc.target/mips/branch-3.c b/gcc/testsuite/gcc.target/mips/branch-3.c
index 5fcfece..1790cbc 100644
--- a/gcc/testsuite/gcc.target/mips/branch-3.c
+++ b/gcc/testsuite/gcc.target/mips/branch-3.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=32" } */
+/* { dg-options "-mshared -mabi=32 -mno-micromips" } */
/* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */
/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
/* { dg-final { scan-assembler-not "\\.cprestore" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-5.c b/gcc/testsuite/gcc.target/mips/branch-5.c
index 1e9c120..38dbea2 100644
--- a/gcc/testsuite/gcc.target/mips/branch-5.c
+++ b/gcc/testsuite/gcc.target/mips/branch-5.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=n32" } */
+/* { dg-options "-mshared -mabi=n32 -mno-micromips" } */
/* { dg-final { scan-assembler "\taddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
/* { dg-final { scan-assembler "\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-7.c b/gcc/testsuite/gcc.target/mips/branch-7.c
index 8ad6808..b69a302 100644
--- a/gcc/testsuite/gcc.target/mips/branch-7.c
+++ b/gcc/testsuite/gcc.target/mips/branch-7.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=64" } */
+/* { dg-options "-mshared -mabi=64 -mno-micromips" } */
/* { dg-final { scan-assembler "\tdaddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
/* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-9.c b/gcc/testsuite/gcc.target/mips/branch-9.c
index cad1c00..a8124dd 100644
--- a/gcc/testsuite/gcc.target/mips/branch-9.c
+++ b/gcc/testsuite/gcc.target/mips/branch-9.c
@@ -1,4 +1,4 @@
-/* { dg-options "-mshared -mabi=32" } */
+/* { dg-options "-mshared -mabi=32 -mno-micromips" } */
/* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */
/* { dg-final { scan-assembler "\t\\.cprestore\t16\n" } } */
/* { dg-final { scan-assembler "\tlw\t\\\$1,16\\(\\\$(fp|sp)\\)\n" } } */
diff --git a/gcc/testsuite/gcc.target/mips/branch-helper.h b/gcc/testsuite/gcc.target/mips/branch-helper.h
index bc4a31f..7979ec7 100644
--- a/gcc/testsuite/gcc.target/mips/branch-helper.h
+++ b/gcc/testsuite/gcc.target/mips/branch-helper.h
@@ -53,3 +53,5 @@
D0 ("nop32"))
/* Likewise emit something that is 0x1fffc bytes long. */
#define OCCUPY_0x1fffc do { asm ("nop"); OCCUPY_0x1fff8; } while (0)
+/* Likewise emit something that is 0x10000 bytes long. */
+#define OCCUPY_0x10000 do { asm ("nop32"); OCCUPY_0xfffc; } while (0)
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-11.c b/gcc/testsuite/gcc.target/mips/branch-umips-11.c
new file mode 100644
index 0000000..f9f30a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-11.c
@@ -0,0 +1,17 @@
+/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
+/* { dg-final { scan-assembler "\tsd\t\\\$28," } } */
+/* { dg-final { scan-assembler "\tld\t\\\$28," } } */
+/* { dg-final { scan-assembler "\taddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
+/* { dg-final { scan-assembler "\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$28\\)\n" } } */
+/* { dg-final { scan-assembler "\taddiu\t\\\$1,\\\$1,%got_ofst\\(\[^)\]*\\)\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-13.c b/gcc/testsuite/gcc.target/mips/branch-umips-13.c
new file mode 100644
index 0000000..95f7db5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-13.c
@@ -0,0 +1,17 @@
+/* { dg-options "-mshared -mabi=64 -mmicromips" } */
+/* { dg-final { scan-assembler "\tsd\t\\\$28," } } */
+/* { dg-final { scan-assembler "\tld\t\\\$28," } } */
+/* { dg-final { scan-assembler "\tdaddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
+/* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$28\\)\n" } } */
+/* { dg-final { scan-assembler "\tdaddiu\t\\\$1,\\\$1,%got_ofst\\(\[^)\]*\\)\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-14.c b/gcc/testsuite/gcc.target/mips/branch-umips-14.c
new file mode 100644
index 0000000..acf5675
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-14.c
@@ -0,0 +1,24 @@
+/* An executable version of branch-2.c. */
+/* { dg-options "-mmicromips" } */
+/* { dg-do run } */
+
+#include "branch-helper.h"
+
+void __attribute__((noinline))
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
+
+int
+main (void)
+{
+ int x = 0;
+ int y = 1;
+
+ foo (&x);
+ foo (&y);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-15.c b/gcc/testsuite/gcc.target/mips/branch-umips-15.c
new file mode 100644
index 0000000..e08ba5d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-15.c
@@ -0,0 +1,24 @@
+/* An executable version of branch-3.c. */
+/* { dg-options "-mmicromips" } */
+/* { dg-do run } */
+
+#include "branch-helper.h"
+
+void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
+
+int
+main (void)
+{
+ int x = 0;
+ int y = 1;
+
+ foo (&x);
+ foo (&y);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-3.c b/gcc/testsuite/gcc.target/mips/branch-umips-3.c
new file mode 100644
index 0000000..d688bc9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-3.c
@@ -0,0 +1,13 @@
+/* { dg-options "-mshared -mabi=32 -mmicromips" } */
+/* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+/* { dg-final { scan-assembler-not "\\.cprestore" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-5.c b/gcc/testsuite/gcc.target/mips/branch-umips-5.c
new file mode 100644
index 0000000..02273cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-5.c
@@ -0,0 +1,14 @@
+/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
+/* { dg-final { scan-assembler "\taddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
+/* { dg-final { scan-assembler "\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+/* { dg-final { scan-assembler-not "\\\$28" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-7.c b/gcc/testsuite/gcc.target/mips/branch-umips-7.c
new file mode 100644
index 0000000..714691b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-7.c
@@ -0,0 +1,14 @@
+/* { dg-options "-mshared -mabi=64 -mmicromips" } */
+/* { dg-final { scan-assembler "\tdaddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
+/* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+/* { dg-final { scan-assembler-not "\\\$28" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
diff --git a/gcc/testsuite/gcc.target/mips/branch-umips-9.c b/gcc/testsuite/gcc.target/mips/branch-umips-9.c
new file mode 100644
index 0000000..a393de9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/branch-umips-9.c
@@ -0,0 +1,18 @@
+/* { dg-options "-mshared -mabi=32 -mmicromips" } */
+/* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */
+/* { dg-final { scan-assembler "\t\\.cprestore\t16\n" } } */
+/* { dg-final { scan-assembler "\tlw\t\\\$1,16\\(\\\$(fp|sp)\\)\n" } } */
+/* { dg-final { scan-assembler "\tlw\t\\\$1,%got\\(\[^)\]*\\)\\(\\\$1\\)\n" } } */
+/* { dg-final { scan-assembler "\taddiu\t\\\$1,\\\$1,%lo\\(\[^)\]*\\)\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+/* { dg-final { scan-assembler-not "\\\$28" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH] MIPS: fix failing branch range checks for micromips
2015-07-03 23:50 [PATCH] MIPS: fix failing branch range checks for micromips Andrew Bennett
2015-07-06 12:27 ` Andrew Bennett
@ 2015-07-06 23:22 ` Moore, Catherine
2015-07-07 16:13 ` Andrew Bennett
1 sibling, 1 reply; 7+ messages in thread
From: Moore, Catherine @ 2015-07-06 23:22 UTC (permalink / raw)
To: Andrew Bennett, gcc-patches; +Cc: Matthew Fortune
Hi Andrew,
> -----Original Message-----
> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> owner@gcc.gnu.org] On Behalf Of Andrew Bennett
> Sent: Friday, July 03, 2015 7:50 PM
> Subject: [PATCH] MIPS: fix failing branch range checks for micromips
>
> diff --git a/gcc/testsuite/gcc.target/mips/branch-10.c
> b/gcc/testsuite/gcc.target/mips/branch-10.c
> index e2b1b5f..00569b0 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-10.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-10.c
> @@ -1,4 +1,4 @@
> -/* { dg-options "-mshared -mabi=n32" } */
> +/* { dg-options "-mshared -mabi=n32 -mno-micromips" } */
> /* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
> /* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
>
Like the other patch, the -mno-micromips should be removed from dg-options and NOCOMPRESS used in place of NOMIPS16.
This comment applies to all of the branch-*.c tests.
>
> diff --git a/gcc/testsuite/gcc.target/mips/branch-helper.h
> b/gcc/testsuite/gcc.target/mips/branch-helper.h
> index 85399be..bc4a31f 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-helper.h
> +++ b/gcc/testsuite/gcc.target/mips/branch-helper.h
> @@ -33,5 +33,23 @@
> D2 ("nop") "\n\t" \
> D1 ("nop"))
>
> +/* Emit something that is 0xfffc bytes long, which is the largest
> + permissible range for micromips forward branches when branches
s/micromips/microMIPS/
> + have delay slots. */
> +#define OCCUPY_0xfffc \
> + asm (D13 ("nop32") "\n\t" \
> + D12 ("nop32") "\n\t" \
> + D11 ("nop32") "\n\t" \
> + D10 ("nop32") "\n\t" \
> + D9 ("nop32") "\n\t" \
> + D8 ("nop32") "\n\t" \
> + D7 ("nop32") "\n\t" \
> + D6 ("nop32") "\n\t" \
> + D5 ("nop32") "\n\t" \
> + D4 ("nop32") "\n\t" \
> + D3 ("nop32") "\n\t" \
> + D2 ("nop32") "\n\t" \
> + D1 ("nop32") "\n\t" \
> + D0 ("nop32"))
> /* Likewise emit something that is 0x1fffc bytes long. */ #define
> OCCUPY_0x1fffc do { asm ("nop"); OCCUPY_0x1fff8; } while (0)
diff --git
> a/gcc/testsuite/gcc.target/mips/branch-umips-10.c
> b/gcc/testsuite/gcc.target/mips/branch-umips-10.c
I see that you are naming these tests after the original branch-<number> tests that they were derived from.
I think it would be better to keep all of the microMIPS tests named umips-???. I don't think preserving the original number is important.
Thanks,
Catherine
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH] MIPS: fix failing branch range checks for micromips
2015-07-06 23:22 ` Moore, Catherine
@ 2015-07-07 16:13 ` Andrew Bennett
2015-07-08 0:28 ` Moore, Catherine
0 siblings, 1 reply; 7+ messages in thread
From: Andrew Bennett @ 2015-07-07 16:13 UTC (permalink / raw)
To: Moore, Catherine, gcc-patches; +Cc: Matthew Fortune
> I see that you are naming these tests after the original branch-<number> tests
> that they were derived from.
> I think it would be better to keep all of the microMIPS tests named umips-???.
> I don't think preserving the original number is important.
I have named the microMIPS tests umips-branch-??? to keep with the current microMIPS
test naming strategy. The numbering starts at 5 as there are already tests numbered
1-4.
An updated patch and ChangeLog is below.
Ok to commit?
Many thanks,
Andrew
testsuite/
* gcc.target/mips/branch-2.c: Change NOMIPS16 to NOCOMPRESSION.
* gcc.target/mips/branch-3.c: Ditto
* gcc.target/mips/branch-4.c: Ditto.
* gcc.target/mips/branch-5.c: Ditto.
* gcc.target/mips/branch-6.c: Ditto.
* gcc.target/mips/branch-7.c: Ditto.
* gcc.target/mips/branch-8.c: Ditto.
* gcc.target/mips/branch-9.c: Ditto.
* gcc.target/mips/branch-10.c: Ditto.
* gcc.target/mips/branch-11.c: Ditto.
* gcc.target/mips/branch-12.c: Ditto.
* gcc.target/mips/branch-13.c: Ditto.
* gcc.target/mips/branch-14.c: Ditto.
* gcc.target/mips/branch-15.c: Ditto.
* gcc.target/mips/umips-branch-5.c: New file.
* gcc.target/mips/umips-branch-6.c: New file.
* gcc.target/mips/umips-branch-7.c: New file.
* gcc.target/mips/umips-branch-8.c: New file.
* gcc.target/mips/umips-branch-9.c: New file.
* gcc.target/mips/umips-branch-10.c: New file.
* gcc.target/mips/umips-branch-11.c: New file.
* gcc.target/mips/umips-branch-12.c: New file.
* gcc.target/mips/umips-branch-13.c: New file.
* gcc.target/mips/umips-branch-14.c: New file.
* gcc.target/mips/umips-branch-15.c: New file.
* gcc.target/mips/umips-branch-16.c: New file.
* gcc.target/mips/umips-branch-17.c: New file.
* gcc.target/mips/umips-branch-18.c: New file.
* gcc.target/mips/branch-helper.h (OCCUPY_0x10000): New define.
(OCCUPY_0xfffc): New define.
diff --git a/gcc/testsuite/gcc.target/mips/branch-10.c b/gcc/testsuite/gcc.target/mips/branch-10.c
index e2b1b5f..eb21c16 100644
--- a/gcc/testsuite/gcc.target/mips/branch-10.c
+++ b/gcc/testsuite/gcc.target/mips/branch-10.c
@@ -4,7 +4,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (int (*bar) (void), int *x)
{
*x = bar ();
diff --git a/gcc/testsuite/gcc.target/mips/branch-11.c b/gcc/testsuite/gcc.target/mips/branch-11.c
index 962eb1b..bd8e834 100644
--- a/gcc/testsuite/gcc.target/mips/branch-11.c
+++ b/gcc/testsuite/gcc.target/mips/branch-11.c
@@ -8,7 +8,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (int (*bar) (void), int *x)
{
*x = bar ();
diff --git a/gcc/testsuite/gcc.target/mips/branch-12.c b/gcc/testsuite/gcc.target/mips/branch-12.c
index 4aef160..4944634 100644
--- a/gcc/testsuite/gcc.target/mips/branch-12.c
+++ b/gcc/testsuite/gcc.target/mips/branch-12.c
@@ -4,7 +4,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (int (*bar) (void), int *x)
{
*x = bar ();
diff --git a/gcc/testsuite/gcc.target/mips/branch-13.c b/gcc/testsuite/gcc.target/mips/branch-13.c
index 8a6fb04..f5269b9 100644
--- a/gcc/testsuite/gcc.target/mips/branch-13.c
+++ b/gcc/testsuite/gcc.target/mips/branch-13.c
@@ -8,7 +8,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (int (*bar) (void), int *x)
{
*x = bar ();
diff --git a/gcc/testsuite/gcc.target/mips/branch-14.c b/gcc/testsuite/gcc.target/mips/branch-14.c
index 026417e..c2eecc3 100644
--- a/gcc/testsuite/gcc.target/mips/branch-14.c
+++ b/gcc/testsuite/gcc.target/mips/branch-14.c
@@ -4,14 +4,14 @@
#include "branch-helper.h"
void __attribute__((noinline))
-foo (volatile int *x)
+NOCOMPRESSION foo (volatile int *x)
{
if (__builtin_expect (*x == 0, 1))
OCCUPY_0x1fff8;
}
int
-main (void)
+NOCOMPRESSION main (void)
{
int x = 0;
int y = 1;
diff --git a/gcc/testsuite/gcc.target/mips/branch-15.c b/gcc/testsuite/gcc.target/mips/branch-15.c
index dee7a05..89e25f3 100644
--- a/gcc/testsuite/gcc.target/mips/branch-15.c
+++ b/gcc/testsuite/gcc.target/mips/branch-15.c
@@ -4,14 +4,14 @@
#include "branch-helper.h"
void
-foo (volatile int *x)
+NOCOMPRESSION foo (volatile int *x)
{
if (__builtin_expect (*x == 0, 1))
OCCUPY_0x1fffc;
}
int
-main (void)
+NOCOMPRESSION main (void)
{
int x = 0;
int y = 1;
diff --git a/gcc/testsuite/gcc.target/mips/branch-2.c b/gcc/testsuite/gcc.target/mips/branch-2.c
index 6409c4c..b60e9cd 100644
--- a/gcc/testsuite/gcc.target/mips/branch-2.c
+++ b/gcc/testsuite/gcc.target/mips/branch-2.c
@@ -5,7 +5,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (volatile int *x)
{
if (__builtin_expect (*x == 0, 1))
diff --git a/gcc/testsuite/gcc.target/mips/branch-3.c b/gcc/testsuite/gcc.target/mips/branch-3.c
index 5fcfece..69300f6 100644
--- a/gcc/testsuite/gcc.target/mips/branch-3.c
+++ b/gcc/testsuite/gcc.target/mips/branch-3.c
@@ -5,7 +5,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (volatile int *x)
{
if (__builtin_expect (*x == 0, 1))
diff --git a/gcc/testsuite/gcc.target/mips/branch-4.c b/gcc/testsuite/gcc.target/mips/branch-4.c
index 31e4909..29f5c9f 100644
--- a/gcc/testsuite/gcc.target/mips/branch-4.c
+++ b/gcc/testsuite/gcc.target/mips/branch-4.c
@@ -4,7 +4,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (volatile int *x)
{
if (__builtin_expect (*x == 0, 1))
diff --git a/gcc/testsuite/gcc.target/mips/branch-5.c b/gcc/testsuite/gcc.target/mips/branch-5.c
index 1e9c120..0538646 100644
--- a/gcc/testsuite/gcc.target/mips/branch-5.c
+++ b/gcc/testsuite/gcc.target/mips/branch-5.c
@@ -6,7 +6,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (volatile int *x)
{
if (__builtin_expect (*x == 0, 1))
diff --git a/gcc/testsuite/gcc.target/mips/branch-6.c b/gcc/testsuite/gcc.target/mips/branch-6.c
index 77e0340..19baee1 100644
--- a/gcc/testsuite/gcc.target/mips/branch-6.c
+++ b/gcc/testsuite/gcc.target/mips/branch-6.c
@@ -4,7 +4,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (volatile int *x)
{
if (__builtin_expect (*x == 0, 1))
diff --git a/gcc/testsuite/gcc.target/mips/branch-7.c b/gcc/testsuite/gcc.target/mips/branch-7.c
index 8ad6808..16c6d8e 100644
--- a/gcc/testsuite/gcc.target/mips/branch-7.c
+++ b/gcc/testsuite/gcc.target/mips/branch-7.c
@@ -6,7 +6,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (volatile int *x)
{
if (__builtin_expect (*x == 0, 1))
diff --git a/gcc/testsuite/gcc.target/mips/branch-8.c b/gcc/testsuite/gcc.target/mips/branch-8.c
index ba5f954..2e46844 100644
--- a/gcc/testsuite/gcc.target/mips/branch-8.c
+++ b/gcc/testsuite/gcc.target/mips/branch-8.c
@@ -4,7 +4,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (int (*bar) (void), int *x)
{
*x = bar ();
diff --git a/gcc/testsuite/gcc.target/mips/branch-9.c b/gcc/testsuite/gcc.target/mips/branch-9.c
index cad1c00..b87f2ba 100644
--- a/gcc/testsuite/gcc.target/mips/branch-9.c
+++ b/gcc/testsuite/gcc.target/mips/branch-9.c
@@ -9,7 +9,7 @@
#include "branch-helper.h"
-NOMIPS16 void
+NOCOMPRESSION void
foo (int (*bar) (void), int *x)
{
*x = bar ();
diff --git a/gcc/testsuite/gcc.target/mips/branch-helper.h b/gcc/testsuite/gcc.target/mips/branch-helper.h
index 85399be..3d033cc 100644
--- a/gcc/testsuite/gcc.target/mips/branch-helper.h
+++ b/gcc/testsuite/gcc.target/mips/branch-helper.h
@@ -33,5 +33,25 @@
D2 ("nop") "\n\t" \
D1 ("nop"))
+/* Emit something that is 0xfffc bytes long, which is the largest
+ permissible range for microMIPS forward branches when branches
+ have delay slots. */
+#define OCCUPY_0xfffc \
+ asm (D13 ("nop32") "\n\t" \
+ D12 ("nop32") "\n\t" \
+ D11 ("nop32") "\n\t" \
+ D10 ("nop32") "\n\t" \
+ D9 ("nop32") "\n\t" \
+ D8 ("nop32") "\n\t" \
+ D7 ("nop32") "\n\t" \
+ D6 ("nop32") "\n\t" \
+ D5 ("nop32") "\n\t" \
+ D4 ("nop32") "\n\t" \
+ D3 ("nop32") "\n\t" \
+ D2 ("nop32") "\n\t" \
+ D1 ("nop32") "\n\t" \
+ D0 ("nop32"))
/* Likewise emit something that is 0x1fffc bytes long. */
#define OCCUPY_0x1fffc do { asm ("nop"); OCCUPY_0x1fff8; } while (0)
+/* Likewise emit something that is 0x10000 bytes long. */
+#define OCCUPY_0x10000 do { asm ("nop32"); OCCUPY_0xfffc; } while (0)
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-10.c b/gcc/testsuite/gcc.target/mips/umips-branch-10.c
new file mode 100644
index 0000000..714691b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-10.c
@@ -0,0 +1,14 @@
+/* { dg-options "-mshared -mabi=64 -mmicromips" } */
+/* { dg-final { scan-assembler "\tdaddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
+/* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+/* { dg-final { scan-assembler-not "\\\$28" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-11.c b/gcc/testsuite/gcc.target/mips/umips-branch-11.c
new file mode 100644
index 0000000..5050669
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-11.c
@@ -0,0 +1,13 @@
+/* { dg-options "-mshared -mabi=32 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$28|cpload|cprestore)" } } */
+/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-12.c b/gcc/testsuite/gcc.target/mips/umips-branch-12.c
new file mode 100644
index 0000000..a393de9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-12.c
@@ -0,0 +1,18 @@
+/* { dg-options "-mshared -mabi=32 -mmicromips" } */
+/* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */
+/* { dg-final { scan-assembler "\t\\.cprestore\t16\n" } } */
+/* { dg-final { scan-assembler "\tlw\t\\\$1,16\\(\\\$(fp|sp)\\)\n" } } */
+/* { dg-final { scan-assembler "\tlw\t\\\$1,%got\\(\[^)\]*\\)\\(\\\$1\\)\n" } } */
+/* { dg-final { scan-assembler "\taddiu\t\\\$1,\\\$1,%lo\\(\[^)\]*\\)\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+/* { dg-final { scan-assembler-not "\\\$28" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-13.c b/gcc/testsuite/gcc.target/mips/umips-branch-13.c
new file mode 100644
index 0000000..e84b462
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-13.c
@@ -0,0 +1,13 @@
+/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
+/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-14.c b/gcc/testsuite/gcc.target/mips/umips-branch-14.c
new file mode 100644
index 0000000..f9f30a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-14.c
@@ -0,0 +1,17 @@
+/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
+/* { dg-final { scan-assembler "\tsd\t\\\$28," } } */
+/* { dg-final { scan-assembler "\tld\t\\\$28," } } */
+/* { dg-final { scan-assembler "\taddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
+/* { dg-final { scan-assembler "\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$28\\)\n" } } */
+/* { dg-final { scan-assembler "\taddiu\t\\\$1,\\\$1,%got_ofst\\(\[^)\]*\\)\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-15.c b/gcc/testsuite/gcc.target/mips/umips-branch-15.c
new file mode 100644
index 0000000..6704aad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-15.c
@@ -0,0 +1,13 @@
+/* { dg-options "-mshared -mabi=64 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
+/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-16.c b/gcc/testsuite/gcc.target/mips/umips-branch-16.c
new file mode 100644
index 0000000..95f7db5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-16.c
@@ -0,0 +1,17 @@
+/* { dg-options "-mshared -mabi=64 -mmicromips" } */
+/* { dg-final { scan-assembler "\tsd\t\\\$28," } } */
+/* { dg-final { scan-assembler "\tld\t\\\$28," } } */
+/* { dg-final { scan-assembler "\tdaddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
+/* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$28\\)\n" } } */
+/* { dg-final { scan-assembler "\tdaddiu\t\\\$1,\\\$1,%got_ofst\\(\[^)\]*\\)\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (int (*bar) (void), int *x)
+{
+ *x = bar ();
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-17.c b/gcc/testsuite/gcc.target/mips/umips-branch-17.c
new file mode 100644
index 0000000..acf5675
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-17.c
@@ -0,0 +1,24 @@
+/* An executable version of branch-2.c. */
+/* { dg-options "-mmicromips" } */
+/* { dg-do run } */
+
+#include "branch-helper.h"
+
+void __attribute__((noinline))
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
+
+int
+main (void)
+{
+ int x = 0;
+ int y = 1;
+
+ foo (&x);
+ foo (&y);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-18.c b/gcc/testsuite/gcc.target/mips/umips-branch-18.c
new file mode 100644
index 0000000..e08ba5d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-18.c
@@ -0,0 +1,24 @@
+/* An executable version of branch-3.c. */
+/* { dg-options "-mmicromips" } */
+/* { dg-do run } */
+
+#include "branch-helper.h"
+
+void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
+
+int
+main (void)
+{
+ int x = 0;
+ int y = 1;
+
+ foo (&x);
+ foo (&y);
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-5.c b/gcc/testsuite/gcc.target/mips/umips-branch-5.c
new file mode 100644
index 0000000..d124f91
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-5.c
@@ -0,0 +1,13 @@
+/* { dg-options "-mshared -mabi=32 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|cpload)" } } */
+/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
+/* { dg-final { scan-assembler-not "\\.cprestore" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-6.c b/gcc/testsuite/gcc.target/mips/umips-branch-6.c
new file mode 100644
index 0000000..d688bc9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-6.c
@@ -0,0 +1,13 @@
+/* { dg-options "-mshared -mabi=32 -mmicromips" } */
+/* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+/* { dg-final { scan-assembler-not "\\.cprestore" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-7.c b/gcc/testsuite/gcc.target/mips/umips-branch-7.c
new file mode 100644
index 0000000..294805a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-7.c
@@ -0,0 +1,12 @@
+/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */
+/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-8.c b/gcc/testsuite/gcc.target/mips/umips-branch-8.c
new file mode 100644
index 0000000..02273cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-8.c
@@ -0,0 +1,14 @@
+/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
+/* { dg-final { scan-assembler "\taddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
+/* { dg-final { scan-assembler "\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
+/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
+/* { dg-final { scan-assembler-not "\\\$28" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0x10000;
+}
diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-9.c b/gcc/testsuite/gcc.target/mips/umips-branch-9.c
new file mode 100644
index 0000000..ab02e88
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/umips-branch-9.c
@@ -0,0 +1,12 @@
+/* { dg-options "-mshared -mabi=64 -mmicromips" } */
+/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */
+/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
+
+#include "branch-helper.h"
+
+NOMIPS16 void
+foo (volatile int *x)
+{
+ if (__builtin_expect (*x == 0, 1))
+ OCCUPY_0xfffc;
+}
--
1.7.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH] MIPS: fix failing branch range checks for micromips
2015-07-07 16:13 ` Andrew Bennett
@ 2015-07-08 0:28 ` Moore, Catherine
2015-07-08 15:16 ` Andrew Bennett
0 siblings, 1 reply; 7+ messages in thread
From: Moore, Catherine @ 2015-07-08 0:28 UTC (permalink / raw)
To: Andrew Bennett, gcc-patches; +Cc: Matthew Fortune
Hi Andrew,
> -----Original Message-----
> From: Andrew Bennett [mailto:Andrew.Bennett@imgtec.com]
> Sent: Tuesday, July 07, 2015 12:13 PM
> To: Moore, Catherine; gcc-patches@gcc.gnu.org
> Cc: Matthew Fortune
> Subject: RE: [PATCH] MIPS: fix failing branch range checks for micromips
>
>
> Ok to commit?
>
> testsuite/
> * gcc.target/mips/branch-2.c: Change NOMIPS16 to
> NOCOMPRESSION.
> * gcc.target/mips/branch-3.c: Ditto
> * gcc.target/mips/branch-4.c: Ditto.
> * gcc.target/mips/branch-5.c: Ditto.
> * gcc.target/mips/branch-6.c: Ditto.
> * gcc.target/mips/branch-7.c: Ditto.
> * gcc.target/mips/branch-8.c: Ditto.
> * gcc.target/mips/branch-9.c: Ditto.
> * gcc.target/mips/branch-10.c: Ditto.
> * gcc.target/mips/branch-11.c: Ditto.
> * gcc.target/mips/branch-12.c: Ditto.
> * gcc.target/mips/branch-13.c: Ditto.
These are OK, except for the splitting of the scan-assembler statements.
Please change occurrences of:
> +/* { dg-final { scan-assembler
> +"\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
to:
+/* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
before committing.
> * gcc.target/mips/branch-14.c: Ditto.
> * gcc.target/mips/branch-15.c: Ditto.
The modifications for these two files need to be removed. These are execution tests and the multilib that is used to link them is important. If the libraries are not compatible with the NOCOMPRESSION attribute, then the link step will fail. You could work around this problem by enabling interlinking, but I think the best approach is to leave these two tests alone.
> * gcc.target/mips/umips-branch-5.c: New file.
> * gcc.target/mips/umips-branch-6.c: New file.
> * gcc.target/mips/umips-branch-7.c: New file.
> * gcc.target/mips/umips-branch-8.c: New file.
> * gcc.target/mips/umips-branch-9.c: New file.
> * gcc.target/mips/umips-branch-10.c: New file.
> * gcc.target/mips/umips-branch-11.c: New file.
> * gcc.target/mips/umips-branch-12.c: New file.
> * gcc.target/mips/umips-branch-13.c: New file.
> * gcc.target/mips/umips-branch-14.c: New file.
> * gcc.target/mips/umips-branch-15.c: New file.
> * gcc.target/mips/umips-branch-16.c: New file.
Same comment as above on the scan-assembler statements.
> * gcc.target/mips/umips-branch-17.c: New file.
> * gcc.target/mips/umips-branch-18.c: New file.
These two tests suffer from the same problem as above. They should be deleted altogether.
> * gcc.target/mips/branch-helper.h (OCCUPY_0x10000): New define.
> (OCCUPY_0xfffc): New define.
This is okay.
Thanks,
Catherine
>
> diff --git a/gcc/testsuite/gcc.target/mips/branch-10.c
> b/gcc/testsuite/gcc.target/mips/branch-10.c
> index e2b1b5f..eb21c16 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-10.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-10.c
> @@ -4,7 +4,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (int (*bar) (void), int *x)
> {
> *x = bar ();
> diff --git a/gcc/testsuite/gcc.target/mips/branch-11.c
> b/gcc/testsuite/gcc.target/mips/branch-11.c
> index 962eb1b..bd8e834 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-11.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-11.c
> @@ -8,7 +8,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (int (*bar) (void), int *x)
> {
> *x = bar ();
> diff --git a/gcc/testsuite/gcc.target/mips/branch-12.c
> b/gcc/testsuite/gcc.target/mips/branch-12.c
> index 4aef160..4944634 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-12.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-12.c
> @@ -4,7 +4,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (int (*bar) (void), int *x)
> {
> *x = bar ();
> diff --git a/gcc/testsuite/gcc.target/mips/branch-13.c
> b/gcc/testsuite/gcc.target/mips/branch-13.c
> index 8a6fb04..f5269b9 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-13.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-13.c
> @@ -8,7 +8,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (int (*bar) (void), int *x)
> {
> *x = bar ();
> diff --git a/gcc/testsuite/gcc.target/mips/branch-14.c
> b/gcc/testsuite/gcc.target/mips/branch-14.c
> index 026417e..c2eecc3 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-14.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-14.c
> @@ -4,14 +4,14 @@
> #include "branch-helper.h"
>
> void __attribute__((noinline))
> -foo (volatile int *x)
> +NOCOMPRESSION foo (volatile int *x)
> {
> if (__builtin_expect (*x == 0, 1))
> OCCUPY_0x1fff8;
> }
>
> int
> -main (void)
> +NOCOMPRESSION main (void)
> {
> int x = 0;
> int y = 1;
> diff --git a/gcc/testsuite/gcc.target/mips/branch-15.c
> b/gcc/testsuite/gcc.target/mips/branch-15.c
> index dee7a05..89e25f3 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-15.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-15.c
> @@ -4,14 +4,14 @@
> #include "branch-helper.h"
>
> void
> -foo (volatile int *x)
> +NOCOMPRESSION foo (volatile int *x)
> {
> if (__builtin_expect (*x == 0, 1))
> OCCUPY_0x1fffc;
> }
>
> int
> -main (void)
> +NOCOMPRESSION main (void)
> {
> int x = 0;
> int y = 1;
> diff --git a/gcc/testsuite/gcc.target/mips/branch-2.c
> b/gcc/testsuite/gcc.target/mips/branch-2.c
> index 6409c4c..b60e9cd 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-2.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-2.c
> @@ -5,7 +5,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (volatile int *x)
> {
> if (__builtin_expect (*x == 0, 1))
> diff --git a/gcc/testsuite/gcc.target/mips/branch-3.c
> b/gcc/testsuite/gcc.target/mips/branch-3.c
> index 5fcfece..69300f6 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-3.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-3.c
> @@ -5,7 +5,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (volatile int *x)
> {
> if (__builtin_expect (*x == 0, 1))
> diff --git a/gcc/testsuite/gcc.target/mips/branch-4.c
> b/gcc/testsuite/gcc.target/mips/branch-4.c
> index 31e4909..29f5c9f 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-4.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-4.c
> @@ -4,7 +4,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (volatile int *x)
> {
> if (__builtin_expect (*x == 0, 1))
> diff --git a/gcc/testsuite/gcc.target/mips/branch-5.c
> b/gcc/testsuite/gcc.target/mips/branch-5.c
> index 1e9c120..0538646 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-5.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-5.c
> @@ -6,7 +6,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (volatile int *x)
> {
> if (__builtin_expect (*x == 0, 1))
> diff --git a/gcc/testsuite/gcc.target/mips/branch-6.c
> b/gcc/testsuite/gcc.target/mips/branch-6.c
> index 77e0340..19baee1 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-6.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-6.c
> @@ -4,7 +4,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (volatile int *x)
> {
> if (__builtin_expect (*x == 0, 1))
> diff --git a/gcc/testsuite/gcc.target/mips/branch-7.c
> b/gcc/testsuite/gcc.target/mips/branch-7.c
> index 8ad6808..16c6d8e 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-7.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-7.c
> @@ -6,7 +6,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (volatile int *x)
> {
> if (__builtin_expect (*x == 0, 1))
> diff --git a/gcc/testsuite/gcc.target/mips/branch-8.c
> b/gcc/testsuite/gcc.target/mips/branch-8.c
> index ba5f954..2e46844 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-8.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-8.c
> @@ -4,7 +4,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (int (*bar) (void), int *x)
> {
> *x = bar ();
> diff --git a/gcc/testsuite/gcc.target/mips/branch-9.c
> b/gcc/testsuite/gcc.target/mips/branch-9.c
> index cad1c00..b87f2ba 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-9.c
> +++ b/gcc/testsuite/gcc.target/mips/branch-9.c
> @@ -9,7 +9,7 @@
>
> #include "branch-helper.h"
>
> -NOMIPS16 void
> +NOCOMPRESSION void
> foo (int (*bar) (void), int *x)
> {
> *x = bar ();
> diff --git a/gcc/testsuite/gcc.target/mips/branch-helper.h
> b/gcc/testsuite/gcc.target/mips/branch-helper.h
> index 85399be..3d033cc 100644
> --- a/gcc/testsuite/gcc.target/mips/branch-helper.h
> +++ b/gcc/testsuite/gcc.target/mips/branch-helper.h
> @@ -33,5 +33,25 @@
> D2 ("nop") "\n\t" \
> D1 ("nop"))
>
> +/* Emit something that is 0xfffc bytes long, which is the largest
> + permissible range for microMIPS forward branches when branches
> + have delay slots. */
> +#define OCCUPY_0xfffc \
> + asm (D13 ("nop32") "\n\t" \
> + D12 ("nop32") "\n\t" \
> + D11 ("nop32") "\n\t" \
> + D10 ("nop32") "\n\t" \
> + D9 ("nop32") "\n\t" \
> + D8 ("nop32") "\n\t" \
> + D7 ("nop32") "\n\t" \
> + D6 ("nop32") "\n\t" \
> + D5 ("nop32") "\n\t" \
> + D4 ("nop32") "\n\t" \
> + D3 ("nop32") "\n\t" \
> + D2 ("nop32") "\n\t" \
> + D1 ("nop32") "\n\t" \
> + D0 ("nop32"))
> /* Likewise emit something that is 0x1fffc bytes long. */ #define
> OCCUPY_0x1fffc do { asm ("nop"); OCCUPY_0x1fff8; } while (0)
> +/* Likewise emit something that is 0x10000 bytes long. */ #define
> +OCCUPY_0x10000 do { asm ("nop32"); OCCUPY_0xfffc; } while (0)
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-10.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-10.c
> new file mode 100644
> index 0000000..714691b
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-10.c
> @@ -0,0 +1,14 @@
> +/* { dg-options "-mshared -mabi=64 -mmicromips" } */
> +/* { dg-final { scan-assembler
> +"\tdaddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
> +/* { dg-final { scan-assembler
> +"\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
> +/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
> +/* { dg-final { scan-assembler-not "\\\$28" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (volatile int *x)
> +{
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0x10000;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-11.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-11.c
> new file mode 100644
> index 0000000..5050669
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-11.c
> @@ -0,0 +1,13 @@
> +/* { dg-options "-mshared -mabi=32 -mmicromips" } */
> +/* { dg-final { scan-assembler-not "(\\\$28|cpload|cprestore)" } } */
> +/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (int (*bar) (void), int *x)
> +{
> + *x = bar ();
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0xfffc;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-12.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-12.c
> new file mode 100644
> index 0000000..a393de9
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-12.c
> @@ -0,0 +1,18 @@
> +/* { dg-options "-mshared -mabi=32 -mmicromips" } */
> +/* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */
> +/* { dg-final { scan-assembler "\t\\.cprestore\t16\n" } } */
> +/* { dg-final { scan-assembler "\tlw\t\\\$1,16\\(\\\$(fp|sp)\\)\n" } }
> +*/
> +/* { dg-final { scan-assembler
> +"\tlw\t\\\$1,%got\\(\[^)\]*\\)\\(\\\$1\\)\n" } } */
> +/* { dg-final { scan-assembler
> +"\taddiu\t\\\$1,\\\$1,%lo\\(\[^)\]*\\)\n" } } */
> +/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
> +/* { dg-final { scan-assembler-not "\\\$28" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (int (*bar) (void), int *x)
> +{
> + *x = bar ();
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0x10000;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-13.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-13.c
> new file mode 100644
> index 0000000..e84b462
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-13.c
> @@ -0,0 +1,13 @@
> +/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
> +/* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
> +/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (int (*bar) (void), int *x)
> +{
> + *x = bar ();
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0xfffc;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-14.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-14.c
> new file mode 100644
> index 0000000..f9f30a7
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-14.c
> @@ -0,0 +1,17 @@
> +/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
> +/* { dg-final { scan-assembler "\tsd\t\\\$28," } } */
> +/* { dg-final { scan-assembler "\tld\t\\\$28," } } */
> +/* { dg-final { scan-assembler
> +"\taddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
> +/* { dg-final { scan-assembler
> +"\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$28\\)\n" } } */
> +/* { dg-final { scan-assembler
> +"\taddiu\t\\\$1,\\\$1,%got_ofst\\(\[^)\]*\\)\n" } } */
> +/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (int (*bar) (void), int *x)
> +{
> + *x = bar ();
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0x10000;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-15.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-15.c
> new file mode 100644
> index 0000000..6704aad
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-15.c
> @@ -0,0 +1,13 @@
> +/* { dg-options "-mshared -mabi=64 -mmicromips" } */
> +/* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
> +/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (int (*bar) (void), int *x)
> +{
> + *x = bar ();
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0xfffc;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-16.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-16.c
> new file mode 100644
> index 0000000..95f7db5
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-16.c
> @@ -0,0 +1,17 @@
> +/* { dg-options "-mshared -mabi=64 -mmicromips" } */
> +/* { dg-final { scan-assembler "\tsd\t\\\$28," } } */
> +/* { dg-final { scan-assembler "\tld\t\\\$28," } } */
> +/* { dg-final { scan-assembler
> +"\tdaddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
> +/* { dg-final { scan-assembler
> +"\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$28\\)\n" } } */
> +/* { dg-final { scan-assembler
> +"\tdaddiu\t\\\$1,\\\$1,%got_ofst\\(\[^)\]*\\)\n" } } */
> +/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (int (*bar) (void), int *x)
> +{
> + *x = bar ();
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0x10000;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-17.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-17.c
> new file mode 100644
> index 0000000..acf5675
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-17.c
> @@ -0,0 +1,24 @@
> +/* An executable version of branch-2.c. */
> +/* { dg-options "-mmicromips" } */
> +/* { dg-do run } */
> +
> +#include "branch-helper.h"
> +
> +void __attribute__((noinline))
> +foo (volatile int *x)
> +{
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0xfffc;
> +}
> +
> +int
> +main (void)
> +{
> + int x = 0;
> + int y = 1;
> +
> + foo (&x);
> + foo (&y);
> +
> + return 0;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-18.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-18.c
> new file mode 100644
> index 0000000..e08ba5d
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-18.c
> @@ -0,0 +1,24 @@
> +/* An executable version of branch-3.c. */
> +/* { dg-options "-mmicromips" } */
> +/* { dg-do run } */
> +
> +#include "branch-helper.h"
> +
> +void
> +foo (volatile int *x)
> +{
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0x10000;
> +}
> +
> +int
> +main (void)
> +{
> + int x = 0;
> + int y = 1;
> +
> + foo (&x);
> + foo (&y);
> +
> + return 0;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-5.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-5.c
> new file mode 100644
> index 0000000..d124f91
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-5.c
> @@ -0,0 +1,13 @@
> +/* { dg-options "-mshared -mabi=32 -mmicromips" } */
> +/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|cpload)" } } */
> +/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */
> +/* { dg-final { scan-assembler-not "\\.cprestore" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (volatile int *x)
> +{
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0xfffc;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-6.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-6.c
> new file mode 100644
> index 0000000..d688bc9
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-6.c
> @@ -0,0 +1,13 @@
> +/* { dg-options "-mshared -mabi=32 -mmicromips" } */
> +/* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */
> +/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
> +/* { dg-final { scan-assembler-not "\\.cprestore" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (volatile int *x)
> +{
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0x10000;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-7.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-7.c
> new file mode 100644
> index 0000000..294805a
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-7.c
> @@ -0,0 +1,12 @@
> +/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
> +/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } }
> +*/
> +/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (volatile int *x)
> +{
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0xfffc;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-8.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-8.c
> new file mode 100644
> index 0000000..02273cf
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-8.c
> @@ -0,0 +1,14 @@
> +/* { dg-options "-mshared -mabi=n32 -mmicromips" } */
> +/* { dg-final { scan-assembler
> +"\taddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
> +/* { dg-final { scan-assembler
> +"\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
> +/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */
> +/* { dg-final { scan-assembler-not "\\\$28" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (volatile int *x)
> +{
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0x10000;
> +}
> diff --git a/gcc/testsuite/gcc.target/mips/umips-branch-9.c
> b/gcc/testsuite/gcc.target/mips/umips-branch-9.c
> new file mode 100644
> index 0000000..ab02e88
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/mips/umips-branch-9.c
> @@ -0,0 +1,12 @@
> +/* { dg-options "-mshared -mabi=64 -mmicromips" } */
> +/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } }
> +*/
> +/* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
> +
> +#include "branch-helper.h"
> +
> +NOMIPS16 void
> +foo (volatile int *x)
> +{
> + if (__builtin_expect (*x == 0, 1))
> + OCCUPY_0xfffc;
> +}
> --
> 1.7.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH] MIPS: fix failing branch range checks for micromips
2015-07-08 0:28 ` Moore, Catherine
@ 2015-07-08 15:16 ` Andrew Bennett
2015-07-08 16:12 ` Moore, Catherine
0 siblings, 1 reply; 7+ messages in thread
From: Andrew Bennett @ 2015-07-08 15:16 UTC (permalink / raw)
To: Moore, Catherine, gcc-patches; +Cc: Matthew Fortune
> > testsuite/
> > * gcc.target/mips/branch-2.c: Change NOMIPS16 to
> > NOCOMPRESSION.
> > * gcc.target/mips/branch-3.c: Ditto
> > * gcc.target/mips/branch-4.c: Ditto.
> > * gcc.target/mips/branch-5.c: Ditto.
> > * gcc.target/mips/branch-6.c: Ditto.
> > * gcc.target/mips/branch-7.c: Ditto.
> > * gcc.target/mips/branch-8.c: Ditto.
> > * gcc.target/mips/branch-9.c: Ditto.
> > * gcc.target/mips/branch-10.c: Ditto.
> > * gcc.target/mips/branch-11.c: Ditto.
> > * gcc.target/mips/branch-12.c: Ditto.
> > * gcc.target/mips/branch-13.c: Ditto.
>
> These are OK, except for the splitting of the scan-assembler statements.
>
> Please change occurrences of:
> > +/* { dg-final { scan-assembler
> > +"\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
> to:
> +/* { dg-final { scan-assembler
> "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
>
> before committing.
I think this might be a problem with your email client, as these issues do
not occur in my patch submission.
https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00529.html
> > * gcc.target/mips/branch-14.c: Ditto.
> > * gcc.target/mips/branch-15.c: Ditto.
>
> The modifications for these two files need to be removed. These are
> execution tests and the multilib that is used to link them is important. If
> the libraries are not compatible with the NOCOMPRESSION attribute, then the
> link step will fail. You could work around this problem by enabling
> interlinking, but I think the best approach is to leave these two tests alone.
Firstly, I have committed a patch which does not include the branch-[14,15].c and
umips-branch-[17,18].c changes (SVN 225540). However, I am keen to get these
changes committed purely so that we have an in-range micromips branch execution
test (which none of the current tests provide). I need to look at the mips.exp file
in more detail, but I was wondering if you would be happy to keep these tests in,
but downgrade them to assemble tests if the required multilib support does not exist?
Regards,
Andrew
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH] MIPS: fix failing branch range checks for micromips
2015-07-08 15:16 ` Andrew Bennett
@ 2015-07-08 16:12 ` Moore, Catherine
0 siblings, 0 replies; 7+ messages in thread
From: Moore, Catherine @ 2015-07-08 16:12 UTC (permalink / raw)
To: Andrew Bennett, gcc-patches; +Cc: Matthew Fortune
> -----Original Message-----
> From: Andrew Bennett [mailto:Andrew.Bennett@imgtec.com]
> Sent: Wednesday, July 08, 2015 11:17 AM
> To: Moore, Catherine; gcc-patches@gcc.gnu.org
> Cc: Matthew Fortune
> Subject: RE: [PATCH] MIPS: fix failing branch range checks for micromips
>
> > > testsuite/
> > > * gcc.target/mips/branch-2.c: Change NOMIPS16 to
> NOCOMPRESSION.
> > > * gcc.target/mips/branch-3.c: Ditto
> > > * gcc.target/mips/branch-4.c: Ditto.
> > > * gcc.target/mips/branch-5.c: Ditto.
> > > * gcc.target/mips/branch-6.c: Ditto.
> > > * gcc.target/mips/branch-7.c: Ditto.
> > > * gcc.target/mips/branch-8.c: Ditto.
> > > * gcc.target/mips/branch-9.c: Ditto.
> > > * gcc.target/mips/branch-10.c: Ditto.
> > > * gcc.target/mips/branch-11.c: Ditto.
> > > * gcc.target/mips/branch-12.c: Ditto.
> > > * gcc.target/mips/branch-13.c: Ditto.
> >
> > These are OK, except for the splitting of the scan-assembler statements.
> >
> > Please change occurrences of:
> > > +/* { dg-final { scan-assembler
> > > +"\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
> > to:
> > +/* { dg-final { scan-assembler
> > "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
> >
> > before committing.
>
> I think this might be a problem with your email client, as these issues do not
> occur in my patch submission.
>
Yes, it would appear that way. Sorry for the noise.
>
>
> > > * gcc.target/mips/branch-14.c: Ditto.
> > > * gcc.target/mips/branch-15.c: Ditto.
> >
> > The modifications for these two files need to be removed. These are
> > execution tests and the multilib that is used to link them is important. If
> > the libraries are not compatible with the NOCOMPRESSION attribute,
> > then the link step will fail. You could work around this problem by
> > enabling interlinking, but I think the best approach is to leave these two
> tests alone.
>
> Firstly, I have committed a patch which does not include the branch-[14,15].c
> and umips-branch-[17,18].c changes (SVN 225540). However, I am keen to
> get these changes committed purely so that we have an in-range micromips
> branch execution test (which none of the current tests provide). I need to
> look at the mips.exp file in more detail, but I was wondering if you would be
> happy to keep these tests in, but downgrade them to assemble tests if the
> required multilib support does not exist?
>
How about adding the interlinking option to the umips-branch-[17,18].c tests instead?
Ie. /* { dg-options "(-mmicromips) -minterlink-compressed" } */
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2015-07-08 16:12 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-07-03 23:50 [PATCH] MIPS: fix failing branch range checks for micromips Andrew Bennett
2015-07-06 12:27 ` Andrew Bennett
2015-07-06 23:22 ` Moore, Catherine
2015-07-07 16:13 ` Andrew Bennett
2015-07-08 0:28 ` Moore, Catherine
2015-07-08 15:16 ` Andrew Bennett
2015-07-08 16:12 ` Moore, Catherine
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