* [PATCH] MIPS: Fix the call-[1,5,6].c tests to allow the jrc instruction to be matched when testing with microMIPS
@ 2015-07-07 10:52 Andrew Bennett
2015-07-07 12:50 ` Moore, Catherine
0 siblings, 1 reply; 3+ messages in thread
From: Andrew Bennett @ 2015-07-07 10:52 UTC (permalink / raw)
To: gcc-patches
Cc: Moore, Catherine (Catherine_Moore@mentor.com), Matthew Fortune
Hi,
When building the call-[1,5,6].c tests for micromips the jrc rather than the
jr instruction is used to call the tail* functions.
I have updated the test output to allow the jrc instruction to be matched.
I have tested this on the mips-mti-elf target using mips32r2/{-mno-micromips/-mmicromips}
test options and there are no new regressions.
The patch and ChangeLog are below.
Ok to commit?
Many thanks,
Andrew
testsuite/
* gcc.target/mips/call-1.c: Allow testcase to match the jrc instruction.
* gcc.target/mips/call-5.c: Ditto.
* gcc.target/mips/call-6.c: Ditto.
diff --git a/gcc/testsuite/gcc.target/mips/call-1.c b/gcc/testsuite/gcc.target/mips/call-1.c
index 2f4a37e..a00126e 100644
--- a/gcc/testsuite/gcc.target/mips/call-1.c
+++ b/gcc/testsuite/gcc.target/mips/call-1.c
@@ -3,10 +3,10 @@
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal\n1:\tjalrs?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal2\n1:\tjalrs?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,staticfunc\n1:\tjalrs?\t" } } */
-/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail\n1:\tjr\t" } } */
-/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail2\n1:\tjr\t" } } */
-/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail3\n1:\tjr\t" } } */
-/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail4\n1:\tjr\t" } } */
+/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail\n1:)?\tjrc?\t" } } */
+/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail2\n1:)?\tjrc?\t" } } */
+/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail3\n1:)?\tjrc?\t" } } */
+/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail4\n1:)?\tjrc?\t" } } */
__attribute__ ((noinline)) static void staticfunc () { asm (""); }
int normal ();
diff --git a/gcc/testsuite/gcc.target/mips/call-5.c b/gcc/testsuite/gcc.target/mips/call-5.c
index bfb95eb..d8d84d3 100644
--- a/gcc/testsuite/gcc.target/mips/call-5.c
+++ b/gcc/testsuite/gcc.target/mips/call-5.c
@@ -7,8 +7,8 @@
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,staticfunc\n1:\tjalr\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail\n1:\tjalr\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail2\n1:\tjalr\t" } } */
-/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail3\n1:\tjr\t" } } */
-/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail4\n1:\tjr\t" } } */
+/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail3\n1:)?\tjrc?\t" } } */
+/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail4\n1:)?\tjrc?\t" } } */
__attribute__ ((noinline)) static void staticfunc () { asm (""); }
int normal ();
diff --git a/gcc/testsuite/gcc.target/mips/call-6.c b/gcc/testsuite/gcc.target/mips/call-6.c
index 117795d..e6c90d7 100644
--- a/gcc/testsuite/gcc.target/mips/call-6.c
+++ b/gcc/testsuite/gcc.target/mips/call-6.c
@@ -6,8 +6,8 @@
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,staticfunc\n1:\tjalr\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail\n1:\tjalr\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail2\n1:\tjalr\t" } } */
-/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail3\n1:\tjr\t" } } */
-/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail4\n1:\tjr\t" } } */
+/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail3\n1:)?\tjrc?\t" } } */
+/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail4\n1:)?\tjrc?\t" } } */
__attribute__ ((noinline)) static void staticfunc () { asm (""); }
int normal ();
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH] MIPS: Fix the call-[1,5,6].c tests to allow the jrc instruction to be matched when testing with microMIPS
2015-07-07 10:52 [PATCH] MIPS: Fix the call-[1,5,6].c tests to allow the jrc instruction to be matched when testing with microMIPS Andrew Bennett
@ 2015-07-07 12:50 ` Moore, Catherine
2015-07-07 14:03 ` Andrew Bennett
0 siblings, 1 reply; 3+ messages in thread
From: Moore, Catherine @ 2015-07-07 12:50 UTC (permalink / raw)
To: Andrew Bennett, gcc-patches; +Cc: Matthew Fortune
> -----Original Message-----
> From: Andrew Bennett [mailto:Andrew.Bennett@imgtec.com]
> Sent: Tuesday, July 07, 2015 6:53 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Moore, Catherine; Matthew Fortune
> Subject: [PATCH] MIPS: Fix the call-[1,5,6].c tests to allow the jrc instruction
> to be matched when testing with microMIPS
>
> Hi,
>
> When building the call-[1,5,6].c tests for micromips the jrc rather than the jr
> instruction is used to call the tail* functions.
>
> I have updated the test output to allow the jrc instruction to be matched.
>
> I have tested this on the mips-mti-elf target using mips32r2/{-mno-
> micromips/-mmicromips}
> test options and there are no new regressions.
>
> The patch and ChangeLog are below.
>
> Ok to commit?
>
>
> testsuite/
> * gcc.target/mips/call-1.c: Allow testcase to match the jrc instruction.
> * gcc.target/mips/call-5.c: Ditto.
> * gcc.target/mips/call-6.c: Ditto.
>
>
OK.
^ permalink raw reply [flat|nested] 3+ messages in thread
* RE: [PATCH] MIPS: Fix the call-[1,5,6].c tests to allow the jrc instruction to be matched when testing with microMIPS
2015-07-07 12:50 ` Moore, Catherine
@ 2015-07-07 14:03 ` Andrew Bennett
0 siblings, 0 replies; 3+ messages in thread
From: Andrew Bennett @ 2015-07-07 14:03 UTC (permalink / raw)
To: Moore, Catherine, gcc-patches; +Cc: Matthew Fortune
> OK.
Committed as SVN 225516.
Regards,
Andrew
^ permalink raw reply [flat|nested] 3+ messages in thread
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2015-07-07 10:52 [PATCH] MIPS: Fix the call-[1,5,6].c tests to allow the jrc instruction to be matched when testing with microMIPS Andrew Bennett
2015-07-07 12:50 ` Moore, Catherine
2015-07-07 14:03 ` Andrew Bennett
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