From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 83986 invoked by alias); 29 Nov 2018 14:52:36 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 82918 invoked by uid 89); 29 Nov 2018 14:52:34 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-22.9 required=5.0 tests=BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_NUMSUBJECT,SEM_URI,SEM_URIRED,SPF_PASS autolearn=ham version=3.3.2 spammy=H*f:sk:CAKnkMG, H*i:sk:CAKnkMG X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 29 Nov 2018 14:52:32 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9A96380D; Thu, 29 Nov 2018 06:52:30 -0800 (PST) Received: from e120077-lin.cambridge.arm.com (e120077-lin.cambridge.arm.com [10.2.206.69]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AC6343F5A0; Thu, 29 Nov 2018 06:52:29 -0800 (PST) Subject: Re: [PATCH, ARM] Error out when -mfpu set and targeting Thumb-1 To: Thomas Preudhomme , kyrylo.tkachov@foss.arm.com, Ramana Radhakrishnan , gcc-patches@gcc.gnu.org References: From: "Richard Earnshaw (lists)" Openpgp: preference=signencrypt Message-ID: <0be4bbb0-3c3e-3919-64f8-646c3f9611ff@arm.com> Date: Thu, 29 Nov 2018 14:52:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-SW-Source: 2018-11/txt/msg02449.txt.bz2 On 29/11/2018 10:51, Thomas Preudhomme wrote: > Hi, > > FP instructions are only enabled for TARGET_32BIT and TARGET_HARD_FLOAT > but GCC only gives an error when TARGET_HARD_FLOAT is true and -mfpu is > not set. Among other things, it makes some of the cmse tests (eg. > gcc.target/arm/cmse/baseline/softfp.c) fail when targeting > -march=armv8-m.base -mfpu= -mfloat-abi=softfp. This patch > errors out when a Thumb-1 -like target is selected and a FPU is > specified, thus making such tests being skipped. > > ChangeLog entries are as follows: > > *** gcc/ChangeLog *** > > 2018-11-28 thomas Preud'homme > > * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Error out > if targeting Thumb-1 with an FPU specified. > > *** gcc/testsuite/ChangeLog *** > > 2018-11-28 thomas Preud'homme > > * gcc.target/arm/thumb1_mfpu-1.c: New testcase. > * gcc.target/arm/thumb1_mfpu-2.c: Likewise. > > Testing: No testsuite regression when targeting arm-none-eabi Armv6S-M. > Fails as expected when targeting Armv6-M with an -mfpu or a default FPU. > Succeeds without. > > Is this ok for stage3? > This doesn't sound right. Specifically this bit... + else if (TARGET_THUMB1 + && bitmap_bit_p (arm_active_target.isa, isa_bit_vfpv2)) + error ("Thumb-1 does not allow FP instructions"); If I use -mcpu=arm1176jzf-s -mfpu=auto -mfloat-abi=softfp -mthumb then that shouldn't error, since softfp and thumb is, in reality, just float-abi=soft (as there are no fp instructions in thumb). We also want it to work this way so that I can add the thumb/arm attribute to specific functions and have the compiler use HW float instructions when they are suitable. R. > Best regards, > > Thomas > > > thumb1_mfpu_error.patch > > From 051e38552d7c596873e0303f6ec4272b26d50900 Mon Sep 17 00:00:00 2001 > From: Thomas Preud'homme > Date: Tue, 27 Nov 2018 15:52:38 +0000 > Subject: [PATCH] [PATCH, ARM] Error out when -mfpu set and targeting Thumb-1 > > Hi, > > FP instructions are only enabled for TARGET_32BIT and TARGET_HARD_FLOAT > but GCC only gives an error when TARGET_HARD_FLOAT is true and -mfpu is > not set. Among other things, it makes some of the cmse tests (eg. > gcc.target/arm/cmse/baseline/softfp.c) fail when targeting > -march=armv8-m.base -mfpu= -mfloat-abi=softfp. This patch > errors out when a Thumb-1 -like target is selected and a FPU is > specified, thus making such tests being skipped. > > ChangeLog entries are as follows: > > *** gcc/ChangeLog *** > > 2018-11-28 thomas Preud'homme > > * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Error out > if targeting Thumb-1 with an FPU specified. > > *** gcc/testsuite/ChangeLog *** > > 2018-11-28 thomas Preud'homme > > * gcc.target/arm/thumb1_mfpu-1.c: New testcase. > * gcc.target/arm/thumb1_mfpu-2.c: Likewise. > > Testing: No testsuite regression when targeting arm-none-eabi Armv6S-M. > Fails as expected when targeting Armv6-M with an -mfpu or a default FPU. > Succeeds without. > > Is this ok for stage3? > > Best regards, > > Thomas > --- > gcc/config/arm/arm.c | 3 +++ > gcc/testsuite/gcc.target/arm/thumb1_mfpu-1.c | 7 +++++++ > gcc/testsuite/gcc.target/arm/thumb1_mfpu-2.c | 8 ++++++++ > 3 files changed, 18 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/arm/thumb1_mfpu-1.c > create mode 100644 gcc/testsuite/gcc.target/arm/thumb1_mfpu-2.c > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > index 40f0574e32e..1a205123cf5 100644 > --- a/gcc/config/arm/arm.c > +++ b/gcc/config/arm/arm.c > @@ -3747,6 +3747,9 @@ arm_options_perform_arch_sanity_checks (void) > { > if (arm_abi == ARM_ABI_IWMMXT) > arm_pcs_default = ARM_PCS_AAPCS_IWMMXT; > + else if (TARGET_THUMB1 > + && bitmap_bit_p (arm_active_target.isa, isa_bit_vfpv2)) > + error ("Thumb-1 does not allow FP instructions"); > else if (TARGET_HARD_FLOAT_ABI) > { > arm_pcs_default = ARM_PCS_AAPCS_VFP; > diff --git a/gcc/testsuite/gcc.target/arm/thumb1_mfpu-1.c b/gcc/testsuite/gcc.target/arm/thumb1_mfpu-1.c > new file mode 100644 > index 00000000000..5347e63f9b6 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/thumb1_mfpu-1.c > @@ -0,0 +1,7 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target arm_thumb1_ok } */ > +/* { dg-skip-if "incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */ > +/* { dg-options "-mthumb -mfpu=vfp -mfloat-abi=softfp" } */ > +/* { dg-error "Thumb-1 does not allow FP instructions" "" { target *-*-* } 0 } */ > + > +int foo; > diff --git a/gcc/testsuite/gcc.target/arm/thumb1_mfpu-2.c b/gcc/testsuite/gcc.target/arm/thumb1_mfpu-2.c > new file mode 100644 > index 00000000000..941ed26ed01 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/thumb1_mfpu-2.c > @@ -0,0 +1,8 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target arm_thumb1_ok } */ > +/* { dg-skip-if "incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */ > +/* No need to skip in presence of -mfpu since arm_thumb1_ok will already fail > + due to Thumb-1 with -mfpu which is tested by thumb1_mfpu-1 testcase. */ > +/* { dg-options "-mthumb -mfloat-abi=softfp" } */ > + > +int foo; >