Re: [PATCH] RISC-V: Support VSETVL PASS for RVV support

[Jeff Law <jeffreyalaw@gmail.com>]

On 12/19/22 15:59, 钟居哲 wrote:
>  >> ISTM that if you want to run before sched2, then
>>> you'd need to introduce dependencies between the vsetvl instrutions and
>>> the vector instructions that utilize those settings?
> 
> Yes, I want to run before sched2 so that we could have the chance to do the
> instruction scheduling before sched2. I already introduce dependencies in
> vector instructions so that it won't produce any issues.
Ah good that you're adding the necessary dependencies.  We'd been 
talking a bit about this internally.  The hope is that on an OOO machine 
the vsetvl will be able to issue/execute relatively early, but on an 
in-order machine the ability to schedule the vsetvl could become 
significantly more important.


> 
>  >> It'd probably be better to move this into rtl.cc with a prototype in
>>>rtl.h rather than have duplicate definitions in gcse.c and the RISC-V
>>>backend.  I'm not even entirely sure why we really need it here.
> Maybe we do that when GCC14 is open?
If we're just making a routine external that previously had static scope 
then we can still do that IMHO.  Such a change won't affect code 
generation so it should be extremely safe.  I'm happy to engage with 
Richi and Jakub to get their sign-off on such a change.



Jeff