From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from esa1.mentor.iphmx.com (esa1.mentor.iphmx.com [68.232.129.153]) by sourceware.org (Postfix) with ESMTPS id 6F8383858401 for ; Tue, 11 Oct 2022 11:02:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6F8383858401 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=mentor.com X-IronPort-AV: E=Sophos;i="5.95,176,1661846400"; d="scan'208";a="87280551" Received: from orw-gwy-01-in.mentorg.com ([192.94.38.165]) by esa1.mentor.iphmx.com with ESMTP; 11 Oct 2022 03:02:34 -0800 IronPort-SDR: BRlmm/wJC06AiMQ0I6X8+S6AxLJqdEGUSg145+YEmimS+ff70rcPuKTKeDTRIcIls92j+fEbLL JtNABAvYTBrY0KZUHmTOuZl1q1bqHp0XjW/LDOaDWsc/4FFxpKbVrxP9ZcgiuoH1EVtrFW0uRp o0RtRhOhPgHTDqFnGSDL2ncBtXuGf60TgtAY1TY0jj3xVD+Pbsy52r425nWLAMtN2ExP478LUh 7Ov8bhKdlKniGvhPc7BynWfHHbVZKsczKlzoh7VnswdeZy/gr+Z8KrT2Tch9SM1kl6a5lI3q5g o2g= From: Andrew Stubbs To: Subject: [committed 2/6] amdgcn: Resolve insn conditions at compile time Date: Tue, 11 Oct 2022 12:02:04 +0100 Message-ID: <0d8753cf30486c4e7fb07455b7cae49aa812c6a4.1665485382.git.ams@codesourcery.com> X-Mailer: git-send-email 2.37.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------2.37.0" Content-Transfer-Encoding: 8bit X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: svr-ies-mbx-14.mgc.mentorg.com (139.181.222.14) To svr-ies-mbx-11.mgc.mentorg.com (139.181.222.11) X-Spam-Status: No, score=-12.8 required=5.0 tests=BAYES_00,GIT_PATCH_0,HEADER_FROM_DIFFERENT_DOMAINS,KAM_DMARC_STATUS,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --------------2.37.0 Content-Type: text/plain; charset="UTF-8"; format=fixed Content-Transfer-Encoding: 8bit GET_MODE_NUNITS isn't a compile time constant, so we end up with many impossible insns in the machine description. Adding MODE_VF allows the insns to be eliminated completely. gcc/ChangeLog: * config/gcn/gcn-valu.md (2): Use MODE_VF. (2): Likewise. * config/gcn/gcn.h (MODE_VF): New macro. --- gcc/config/gcn/gcn-valu.md | 10 ++++++---- gcc/config/gcn/gcn.h | 24 ++++++++++++++++++++++++ 2 files changed, 30 insertions(+), 4 deletions(-) --------------2.37.0 Content-Type: text/x-patch; name="0002-amdgcn-Resolve-insn-conditions-at-compile-time.patch" Content-Transfer-Encoding: 8bit Content-Disposition: attachment; filename="0002-amdgcn-Resolve-insn-conditions-at-compile-time.patch" diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 52d2fcb880a..c7be2361164 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -2873,8 +2873,9 @@ (define_insn "2" [(set (match_operand:VCVT_FMODE 0 "register_operand" "= v") (cvt_op:VCVT_FMODE (match_operand:VCVT_MODE 1 "gcn_alu_operand" "vSvB")))] - "gcn_valid_cvt_p (mode, mode, - _cvt)" + "MODE_VF (mode) == MODE_VF (mode) + && gcn_valid_cvt_p (mode, mode, + _cvt)" "v_cvt\t%0, %1" [(set_attr "type" "vop1") (set_attr "length" "8")]) @@ -2883,8 +2884,9 @@ (define_insn "2" [(set (match_operand:VCVT_IMODE 0 "register_operand" "= v") (cvt_op:VCVT_IMODE (match_operand:VCVT_FMODE 1 "gcn_alu_operand" "vSvB")))] - "gcn_valid_cvt_p (mode, mode, - _cvt)" + "MODE_VF (mode) == MODE_VF (mode) + && gcn_valid_cvt_p (mode, mode, + _cvt)" "v_cvt\t%0, %1" [(set_attr "type" "vop1") (set_attr "length" "8")]) diff --git a/gcc/config/gcn/gcn.h b/gcc/config/gcn/gcn.h index 318256c4a7a..38f7212db59 100644 --- a/gcc/config/gcn/gcn.h +++ b/gcc/config/gcn/gcn.h @@ -678,3 +678,27 @@ enum gcn_builtin_codes /* Trampolines */ #define TRAMPOLINE_SIZE 36 #define TRAMPOLINE_ALIGNMENT 64 + +/* MD Optimization. + The following are intended to be obviously constant at compile time to + allow genconditions to eliminate bad patterns at compile time. */ +#define MODE_VF(M) \ + ((M == V64QImode || M == V64HImode || M == V64HFmode || M == V64SImode \ + || M == V64SFmode || M == V64DImode || M == V64DFmode) \ + ? 64 \ + : (M == V32QImode || M == V32HImode || M == V32HFmode || M == V32SImode \ + || M == V32SFmode || M == V32DImode || M == V32DFmode) \ + ? 32 \ + : (M == V16QImode || M == V16HImode || M == V16HFmode || M == V16SImode \ + || M == V16SFmode || M == V16DImode || M == V16DFmode) \ + ? 16 \ + : (M == V8QImode || M == V8HImode || M == V8HFmode || M == V8SImode \ + || M == V8SFmode || M == V8DImode || M == V8DFmode) \ + ? 8 \ + : (M == V4QImode || M == V4HImode || M == V4HFmode || M == V4SImode \ + || M == V4SFmode || M == V4DImode || M == V4DFmode) \ + ? 4 \ + : (M == V2QImode || M == V2HImode || M == V2HFmode || M == V2SImode \ + || M == V2SFmode || M == V2DImode || M == V2DFmode) \ + ? 2 \ + : 1) --------------2.37.0--