From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id B14783858D37 for ; Tue, 21 Mar 2023 12:10:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B14783858D37 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32LAQOkd008380; Tue, 21 Mar 2023 12:10:09 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=message-id : date : mime-version : to : cc : from : subject : content-type : content-transfer-encoding; s=pp1; bh=s/nkprzBM1HkGr6k0dNSUq1VEP+ZZQ6vS3LeJ4k6Wsg=; b=G8G2uV9SIlmXrPrykuPHAD07nOjPk6ckXEkunaSwGfWkvFNrkcfI5+KLdwtyV7MIShwC kC+zYEWrkSHZNc3yOIBdp+ElnoETomnUFFonmiplRcnzTY0mmFq+j3MfSafNATX3BdFd fy2TqXSKXkmRI56vAhkM0kvpiUjzFb8Q9UZ12XjCcRSZ+DZbMDKpGR+b33v0BVKt3XpW c0rzY9uAIGQ0TXE83usHcq1T7yErb/1Tz/dEB0urocGXCdBW9P/LbjjmK1zhIVit7IdT gd7PU2aEV4MjAZSOQa3+b9ZHSqarvM9iisxul/S8bc55LwMCoJvQrGPAFqGNwUh5DGoT Zg== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3pf85xx46d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 Mar 2023 12:10:09 +0000 Received: from m0098396.ppops.net (m0098396.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 32LBZsH9001099; Tue, 21 Mar 2023 12:10:09 GMT Received: from ppma01dal.us.ibm.com (83.d6.3fa9.ip4.static.sl-reverse.com [169.63.214.131]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3pf85xx45v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 Mar 2023 12:10:08 +0000 Received: from pps.filterd (ppma01dal.us.ibm.com [127.0.0.1]) by ppma01dal.us.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 32LATZ0h011261; Tue, 21 Mar 2023 12:10:08 GMT Received: from smtprelay02.dal12v.mail.ibm.com ([9.208.130.97]) by ppma01dal.us.ibm.com (PPS) with ESMTPS id 3pd4x7exsx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 Mar 2023 12:10:07 +0000 Received: from smtpav02.wdc07v.mail.ibm.com (smtpav02.wdc07v.mail.ibm.com [10.39.53.229]) by smtprelay02.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 32LCA6Fa33161960 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 21 Mar 2023 12:10:06 GMT Received: from smtpav02.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 294675805C; Tue, 21 Mar 2023 12:10:06 +0000 (GMT) Received: from smtpav02.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7FEFA5805B; Tue, 21 Mar 2023 12:10:05 +0000 (GMT) Received: from [9.65.208.41] (unknown [9.65.208.41]) by smtpav02.wdc07v.mail.ibm.com (Postfix) with ESMTPS; Tue, 21 Mar 2023 12:10:05 +0000 (GMT) Message-ID: <0e1a14ae-a16a-5af7-82be-c868d792d00d@linux.ibm.com> Date: Tue, 21 Mar 2023 07:10:04 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Content-Language: en-US To: GCC Patches Cc: Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner From: Pat Haugen Subject: [PATCH V2, rs6000] Tweak modulo define_insns to eliminate register copy Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: wR2Kw05gMdF7LG3Ees_yDJqL96QUmu0A X-Proofpoint-GUID: aqlZAhcE9flCmzcQCp4dG0Dr15AzVc9E X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-21_08,2023-03-21_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxscore=0 mlxlogscore=999 adultscore=0 phishscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 clxscore=1015 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303150002 definitions=main-2303210094 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Updated patch with review comments addressed: fixed up testcase and added another testcase to verify peephole is functional. Don't force target of modulo into a distinct register. The define_insns for the modulo operation currently force the target register to a distinct reg in preparation for a possible future peephole combining div/mod. But this can lead to cases of a needless copy being inserted. Fixed with the following patch. Bootstrapped and regression tested on powerpc64le. Ok for master? -Pat 2023-03-21 Pat Haugen gcc/ * config/rs6000/rs6000.md (*mod3, umod3): Add non-earlyclobber alternative. gcc/testsuite/ * gcc.target/powerpc/mod-no_copy.c: New. * gcc.target/powerpc/mod-peephole.c: New. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 81bffb04ceb..44f7dd509cb 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -3437,9 +3437,9 @@ (define_expand "mod3" ;; In order to enable using a peephole2 for combining div/mod to eliminate the ;; mod, prefer putting the result of mod into a different register (define_insn "*mod3" - [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r") - (mod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") - (match_operand:GPR 2 "gpc_reg_operand" "r")))] + [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r,r") + (mod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r") + (match_operand:GPR 2 "gpc_reg_operand" "r,r")))] "TARGET_MODULO" "mods %0,%1,%2" [(set_attr "type" "div") @@ -3447,9 +3447,9 @@ (define_insn "*mod3" (define_insn "umod3" - [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r") - (umod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") - (match_operand:GPR 2 "gpc_reg_operand" "r")))] + [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r,r") + (umod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r") + (match_operand:GPR 2 "gpc_reg_operand" "r,r")))] "TARGET_MODULO" "modu %0,%1,%2" [(set_attr "type" "div") diff --git a/gcc/testsuite/gcc.target/powerpc/mod-no_copy.c b/gcc/testsuite/gcc.target/powerpc/mod-no_copy.c new file mode 100644 index 00000000000..c55e486ee9b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/mod-no_copy.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mdejagnu-cpu=power9 -O2" } */ + +/* Verify r3 is used as source and target, no copy inserted. */ + +long foo (long a, long b) +{ + return (a % b); +} + +unsigned long foo2 (unsigned long a, unsigned long b) +{ + return (a % b); +} + +/* { dg-final { scan-assembler-not {\mmr\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/mod-peephole.c b/gcc/testsuite/gcc.target/powerpc/mod-peephole.c new file mode 100644 index 00000000000..7517fbc397c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/mod-peephole.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-mdejagnu-cpu=power9 -O2" } */ + +/* Verify peephole fires to combine div/mod using same opnds. */ + +long foo (long a, long b) +{ + long x, y; + + x = a / b; + y = a % b; + return (x + y); +} + +unsigned long foo2 (unsigned long a, unsigned long b) +{ + unsigned long x, y; + + x = a / b; + y = a % b; + return (x + y); +} + +/* { dg-final { scan-assembler-not {\mmodsd\M} } } */ +/* { dg-final { scan-assembler-not {\mmodud\M} } } */