From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 92536 invoked by alias); 19 Jul 2019 09:03:40 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 92428 invoked by uid 89); 19 Jul 2019 09:03:40 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-16.5 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3 autolearn=ham version=3.3.1 spammy=HX-Languages-Length:1691, HContent-Transfer-Encoding:8bit X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 19 Jul 2019 09:03:39 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9FC80337; Fri, 19 Jul 2019 02:03:37 -0700 (PDT) Received: from [10.2.206.47] (e120808-lin.cambridge.arm.com [10.2.206.47]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4A3703F71A; Fri, 19 Jul 2019 02:03:37 -0700 (PDT) Subject: Re: [ARM/FDPIC v5 21/21] [ARM] FDPIC: Handle stack-protector combined patterns To: Christophe Lyon , "gcc-patches@gcc.gnu.org" References: <20190515124006.25840-1-christophe.lyon@st.com> <20190515124006.25840-22-christophe.lyon@st.com> From: Kyrill Tkachov Message-ID: <0f10e3b4-929f-a901-a30a-414c73a7183f@foss.arm.com> Date: Fri, 19 Jul 2019 09:40:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.1 MIME-Version: 1.0 In-Reply-To: <20190515124006.25840-22-christophe.lyon@st.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 8bit X-SW-Source: 2019-07/txt/msg01290.txt.bz2 On 5/15/19 1:39 PM, Christophe Lyon wrote: > The recent stack_protect_combined_set_insn and > stack_protect_combined_test_insn force recomputing of GOT base, but > need to take into account that in FDPIC mode, the PIC register is > fixed by the ABI (r9). > > 2019-XX-XX  Christophe Lyon  > >         * config/arm/arm.md (stack_protect_combined_set_insn): Handle >         FDPIC mode. >         (stack_protect_combined_test_insn): Likewise. > > Change-Id: Ib243fab0791fc883ca7b1c1205af1e0893f3e8c5 > > diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md > index 0edcb1d..5a4dd00 100644 > --- a/gcc/config/arm/arm.md > +++ b/gcc/config/arm/arm.md > @@ -8869,8 +8869,19 @@ >  { >    if (flag_pic) >      { > +      rtx pic_reg; > + > +      if (TARGET_FDPIC) > +        { > +         pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); > +       } > +      else > +        { > +         pic_reg = operands[3]; > +       } Redundant braces here... > + >        /* Forces recomputing of GOT base now.  */ > -      legitimize_pic_address (operands[1], SImode, operands[2], > operands[3], > +      legitimize_pic_address (operands[1], SImode, operands[2], pic_reg, >                                true /*compute_now*/); >      } >    else > @@ -8943,8 +8954,19 @@ > >    if (flag_pic) >      { > +      rtx pic_reg; > + > +      if (TARGET_FDPIC) > +        { > +         pic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); > +        } > +      else > +        { > +         pic_reg = operands[4]; > +       } > + ... and here. Ok with that fixed. Thanks, Kyrill >        /* Forces recomputing of GOT base now.  */ > -      legitimize_pic_address (operands[1], SImode, operands[3], > operands[4], > +      legitimize_pic_address (operands[1], SImode, operands[3], pic_reg, >                                true /*compute_now*/); >      } >    else > -- > 2.6.3 >