From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25866 invoked by alias); 29 Jun 2017 19:23:15 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 24395 invoked by uid 89); 29 Jun 2017 19:23:13 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-10.9 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: smtp.eu.adacore.com Received: from mel.act-europe.fr (HELO smtp.eu.adacore.com) (194.98.77.210) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 29 Jun 2017 19:23:12 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id 0B5A2815A0 for ; Thu, 29 Jun 2017 21:23:10 +0200 (CEST) Received: from smtp.eu.adacore.com ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KTmMdr-ad_GD for ; Thu, 29 Jun 2017 21:23:09 +0200 (CEST) Received: from polaris.localnet (bon31-6-88-161-99-133.fbx.proxad.net [88.161.99.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.eu.adacore.com (Postfix) with ESMTPSA id D7A7D8159F for ; Thu, 29 Jun 2017 21:23:09 +0200 (CEST) From: Eric Botcazou To: gcc-patches@gcc.gnu.org Subject: Small tweak to RTL expansion of some array accesses on RISC targets Date: Thu, 29 Jun 2017 19:23:00 -0000 Message-ID: <10060997.SGyfb6a1MB@polaris> User-Agent: KMail/4.14.10 (Linux/3.16.7-53-desktop; KDE/4.14.9; x86_64; ; ) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="nextPart1909002.l2gjPn8DgE" Content-Transfer-Encoding: 7Bit X-SW-Source: 2017-06/txt/msg02322.txt.bz2 This is a multi-part message in MIME format. --nextPart1909002.l2gjPn8DgE Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Content-length: 1909 I noticed that, when a variable-sized object declared on the stack turns out to be of fixed size, the optimizer can replace the call to __builtin_alloca by the declaration of fixed-size local array. Now, even if the alignment of the object is explicitly preserved, the alignment of its type is not since the type of the local array is always unsigned char. On RISC targets (STRICT_ALIGNMENT / SLOW_UNALIGNED_ACCESS to be precise), this causes any read larger than unsigned char to go through the bitfield expansion circuitry, because expand_expr_real_1 has: /* If the field isn't aligned enough to fetch as a memref, fetch it as a bit field. */ || (mode1 != BLKmode && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode) || (bitpos % GET_MODE_ALIGNMENT (mode) != 0) || (MEM_P (op0) && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1) || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0)))) && modifier != EXPAND_MEMORY && ((modifier == EXPAND_CONST_ADDRESS || modifier == EXPAND_INITIALIZER) ? STRICT_ALIGNMENT : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0)))) In other words, even if the alignment of the MEM is sufficient (and it is), the test on TYPE_ALIGN (TREE_TYPE (tem)) is true since TREE_TYPE (tem) is unsigned char. I think that the test on TYPE_ALIGN (TREE_TYPE (tem)) is superfluous when op0 is a MEM because the second part of the test is more precise and sufficient, so the attached patchlet uses a conditional expression to implement that. Bootstrapped/regtested on SPARC/Solaris, SPARC64/Linux, PowerPC64/Linux and Aarch64/Linux, applied on the mainline as obvious. 2017-06-29 Eric Botcazou * expr.c (expand_expr) : When testing for unaligned objects, take into account only the alignment of 'op0' and 'mode1' if 'op0' is a MEM. -- Eric Botcazou --nextPart1909002.l2gjPn8DgE Content-Disposition: attachment; filename="p.diff" Content-Transfer-Encoding: 7Bit Content-Type: text/x-patch; charset="utf-8"; name="p.diff" Content-length: 976 Index: expr.c =================================================================== --- expr.c (revision 249619) +++ expr.c (working copy) @@ -10631,11 +10631,11 @@ expand_expr_real_1 (tree exp, rtx target /* If the field isn't aligned enough to fetch as a memref, fetch it as a bit field. */ || (mode1 != BLKmode - && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode) - || (bitpos % GET_MODE_ALIGNMENT (mode) != 0) - || (MEM_P (op0) - && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1) - || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0)))) + && (((MEM_P (op0) + ? MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1) + || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0) + : TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode) + || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)) && modifier != EXPAND_MEMORY && ((modifier == EXPAND_CONST_ADDRESS || modifier == EXPAND_INITIALIZER) --nextPart1909002.l2gjPn8DgE--