From: "Kewen.Lin" <linkw@linux.ibm.com>
To: GCC Patches <gcc-patches@gcc.gnu.org>
Cc: Segher Boessenkool <segher@kernel.crashing.org>,
David Edelsohn <dje.gcc@gmail.com>,
Peter Bergner <bergner@linux.ibm.com>
Subject: [PATCH] rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932]
Date: Tue, 6 Jun 2023 17:19:24 +0800 [thread overview]
Message-ID: <124c676e-27ed-252e-3f33-0f9b370ef08e@linux.ibm.com> (raw)
Hi,
As PR109932 shows, builtins __builtin_{un,}pack_vector_int128
should be guarded under vsx rather than power7, as their
corresponding bif patterns have the conditions TARGET_VSX
and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to
move __builtin_{un,}pack_vector_int128 to stanza vsx to ensure
their supports.
Bootstrapped and regtested on powerpc64-linux-gnu P7/P8/P9 and
powerpc64le-linux-gnu P9 and P10.
I'll push this next week if no objections.
BR,
Kewen
-----
PR target/109932
gcc/ChangeLog:
* config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
__builtin_unpack_vector_int128): Move from stanza power7 to vsx.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr109932-1.c: New test.
* gcc.target/powerpc/pr109932-2.c: New test.
---
gcc/config/rs6000/rs6000-builtins.def | 14 +++++++-------
gcc/testsuite/gcc.target/powerpc/pr109932-1.c | 16 ++++++++++++++++
gcc/testsuite/gcc.target/powerpc/pr109932-2.c | 16 ++++++++++++++++
3 files changed, 39 insertions(+), 7 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-1.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109932-2.c
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index 92d9b46e1b9..a38184b0ef9 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2009,6 +2009,13 @@
const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>);
XXSPLTD_V2DI vsx_xxspltd_v2di {}
+ const vsq __builtin_pack_vector_int128 (unsigned long long, \
+ unsigned long long);
+ PACK_V1TI packv1ti {}
+
+ const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
+ UNPACK_V1TI unpackv1ti {}
+
; Power7 builtins (ISA 2.06).
[power7]
@@ -2030,16 +2037,9 @@
const unsigned int __builtin_divweu (unsigned int, unsigned int);
DIVWEU diveu_si {}
- const vsq __builtin_pack_vector_int128 (unsigned long long, \
- unsigned long long);
- PACK_V1TI packv1ti {}
-
void __builtin_ppc_speculation_barrier ();
SPECBARR speculation_barrier {}
- const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>);
- UNPACK_V1TI unpackv1ti {}
-
; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing).
[power7-64]
diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-1.c b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
new file mode 100644
index 00000000000..3e3f9eaa65e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c
@@ -0,0 +1,16 @@
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -mno-vsx" } */
+
+/* Verify there is no ICE but one expected error message instead. */
+
+#include <altivec.h>
+
+extern vector signed __int128 res_vslll;
+extern unsigned long long aull[2];
+
+void
+testVectorInt128Pack ()
+{
+ res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-2.c b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
new file mode 100644
index 00000000000..3e3f9eaa65e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c
@@ -0,0 +1,16 @@
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -mno-vsx" } */
+
+/* Verify there is no ICE but one expected error message instead. */
+
+#include <altivec.h>
+
+extern vector signed __int128 res_vslll;
+extern unsigned long long aull[2];
+
+void
+testVectorInt128Pack ()
+{
+ res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */
+}
+
--
2.25.1
next reply other threads:[~2023-06-06 9:19 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-06 9:19 Kewen.Lin [this message]
2023-06-11 18:39 ` David Edelsohn
2023-06-12 6:48 ` Kewen.Lin
2023-06-13 8:11 ` [PATCH, committed] testsuite: Check int128 effective target for pr109932-{1,2}.c [PR110230] Kewen.Lin
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