[PATCH, ARM] Fix ICE (PR target/45805).

[PATCH, ARM] Fix ICE (PR target/45805).

[Tejas Belagod]

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Hi,

This patch fixes bug PR target/45805. A missing constraint specifier in
patterns for vmovl and vmovn was causing the compiler to ICE by
matching memory operands instead of the intended register operands. A
'w' in the constraint specifier fixes the ICE. Also the instruction
templates for vmovl, vmovn and vmull have been fixed by adding intended
register specifiers.

OK?

--
Tejas Belagod
ARM.

gcc/

2010-09-29  Tejas Belagod  <tejas.belagod@arm.com>

	* config/arm/neon.md (neon_unpack<US>_<mode>): Add 'w' to
	constraint, add register specifier in instruction template.
	(neon_vec_pack_trunc_<mode>): Likewise.
	(neon_vec_<US>mult_<mode>): Add register specifier to
	instruction template.

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diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index 3bb74a2..1e88981 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -5314,9 +5314,9 @@
 ;; Vectorize for non-neon-quad case
 (define_insn "neon_unpack<US>_<mode>"
  [(set (match_operand:<V_widen> 0 "register_operand" "=w")
-       (SE:<V_widen> (match_operand:VDI 1 "register_operand" "")))]
+       (SE:<V_widen> (match_operand:VDI 1 "register_operand" "w")))]
  "TARGET_NEON"
- "vmovl.<US><V_sz_elem> %q0, %1"
+ "vmovl.<US><V_sz_elem> %q0, %P1"
   [(set_attr "neon_type" "neon_shift_1")]
 )
 
@@ -5353,7 +5353,7 @@
  		       (SE:<V_widen> 
 			   (match_operand:VDI 2 "register_operand" "w"))))]
   "TARGET_NEON"
-  "vmull.<US><V_sz_elem> %q0, %1, %2"
+  "vmull.<US><V_sz_elem> %q0, %P1, %P2"
   [(set_attr "neon_type" "neon_shift_1")]
 )
 
@@ -5402,9 +5402,9 @@
 ;; For the non-quad case.
 (define_insn "neon_vec_pack_trunc_<mode>"
  [(set (match_operand:<V_narrow> 0 "register_operand" "=w")
-       (truncate:<V_narrow> (match_operand:VN 1 "register_operand" "")))]
+       (truncate:<V_narrow> (match_operand:VN 1 "register_operand" "w")))]
  "TARGET_NEON"
- "vmovn.i<V_sz_elem>\t%0, %q1"
+ "vmovn.i<V_sz_elem>\t%P0, %q1"
  [(set_attr "neon_type" "neon_shift_1")]
 )
 

Re: [PATCH, ARM] Fix ICE (PR target/45805).

[Richard Earnshaw]

On Wed, 2010-09-29 at 10:47 +0100, Tejas Belagod wrote:
> Hi,
> 
> This patch fixes bug PR target/45805. A missing constraint specifier in
> patterns for vmovl and vmovn was causing the compiler to ICE by
> matching memory operands instead of the intended register operands. A
> 'w' in the constraint specifier fixes the ICE. Also the instruction
> templates for vmovl, vmovn and vmull have been fixed by adding intended
> register specifiers.
> 
> OK?
> 
> --
> Tejas Belagod
> ARM.
> 
> gcc/
> 
> 2010-09-29  Tejas Belagod  <tejas.belagod@arm.com>
> 
> 	* config/arm/neon.md (neon_unpack<US>_<mode>): Add 'w' to
> 	constraint, add register specifier in instruction template.
> 	(neon_vec_pack_trunc_<mode>): Likewise.
> 	(neon_vec_<US>mult_<mode>): Add register specifier to
> 	instruction template.

OK

R.