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From: Robin Dapp <rdapp.gcc@gmail.com>
To: Richard Biener <richard.guenther@gmail.com>
Cc: rdapp.gcc@gmail.com, gcc-patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH] internal-fn: Do not force vcond operand to reg.
Date: Mon, 13 May 2024 16:14:10 +0200	[thread overview]
Message-ID: <12e4ae5c-5608-4920-93d9-ac4419245474@gmail.com> (raw)
In-Reply-To: <CAFiYyc3WqZUAd+V7ORXJKuvytgbgKG6qLxij9PmKOo_G7Z103A@mail.gmail.com>

> What happens if we simply remove all of the force_reg here?

On x86 I bootstrapped and tested the attached without fallout
(gcc188, so it's no avx512-native machine and therefore limited
coverage).  riscv regtest is unchanged.
For aarch64 I would to rely on the pre-commit CI to pick it
up (does that work on sub-threads?).

Regards
 Robin


gcc/ChangeLog:

	PR middle-end/113474

	* internal-fn.cc (expand_vec_cond_mask_optab_fn):  Remove
	force_regs.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/pr113474.c: New test.
---
 gcc/internal-fn.cc                                  |  3 ---
 .../gcc.target/riscv/rvv/autovec/pr113474.c         | 13 +++++++++++++
 2 files changed, 13 insertions(+), 3 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c

diff --git a/gcc/internal-fn.cc b/gcc/internal-fn.cc
index 2c764441cde..4d226c478b4 100644
--- a/gcc/internal-fn.cc
+++ b/gcc/internal-fn.cc
@@ -3163,9 +3163,6 @@ expand_vec_cond_mask_optab_fn (internal_fn, gcall *stmt, convert_optab optab)
   rtx_op1 = expand_normal (op1);
   rtx_op2 = expand_normal (op2);
 
-  mask = force_reg (mask_mode, mask);
-  rtx_op1 = force_reg (mode, rtx_op1);
-
   rtx target = expand_expr (lhs, NULL_RTX, VOIDmode, EXPAND_WRITE);
   create_output_operand (&ops[0], target, mode);
   create_input_operand (&ops[1], rtx_op1, mode);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c
new file mode 100644
index 00000000000..0364bf9f5e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target riscv_v } }  */
+/* { dg-additional-options "-std=c99" }  */
+
+void
+foo (int n, int **a)
+{
+  int b;
+  for (b = 0; b < n; b++)
+    for (long e = 8; e > 0; e--)
+      a[b][e] = a[b][e] == 15;
+}
+
+/* { dg-final { scan-assembler "vmerge.vim" } }  */
-- 
2.45.0


  reply	other threads:[~2024-05-13 14:14 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-10 13:17 Robin Dapp
2024-05-10 13:21 ` Richard Biener
2024-05-13  6:18   ` Robin Dapp
2024-05-13  7:53     ` Richard Biener
2024-05-13 14:14       ` Robin Dapp [this message]
2024-05-13 14:19         ` Richard Biener
2024-05-17 10:35           ` Robin Dapp

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