From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12709 invoked by alias); 2 Jun 2011 09:46:40 -0000 Received: (qmail 12699 invoked by uid 22791); 2 Jun 2011 09:46:40 -0000 X-SWARE-Spam-Status: No, hits=-2.4 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from service87.mimecast.com (HELO service87.mimecast.com) (94.185.240.25) by sourceware.org (qpsmtpd/0.43rc1) with SMTP; Thu, 02 Jun 2011 09:46:23 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 02 Jun 2011 10:46:14 +0100 Received: from [10.1.67.34] ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.0); Thu, 2 Jun 2011 10:46:36 +0100 Subject: Re: [patch][simplify-rtx] Fix 16-bit -> 64-bit multiply and accumulate From: Richard Earnshaw To: Andrew Stubbs Cc: "Joseph S. Myers" , Bernd Schmidt , gcc-patches@gcc.gnu.org, patches@linaro.org In-Reply-To: <4DDE572A.6060305@codesourcery.com> References: <4D01018F.3020108@codesourcery.com> <1296153619.9738.16.camel@e102346-lin.cambridge.arm.com> <4D42955C.1060707@codesourcery.com> <1296223929.9738.30.camel@e102346-lin.cambridge.arm.com> <4D42DD32.7020404@codesourcery.com> <1296228038.9738.48.camel@e102346-lin.cambridge.arm.com> <4D8CC0A9.5080504@codesourcery.com> <4DA823F1.2040907@codesourcery.com> <4DBFC5D8.1090009@codesourcery.com> <4DDBE035.8050901@codesourcery.com> <4DDCF7A7.4000200@codesourcery.com> <4DDD065C.4020502@codesourcery.com> <4DDE572A.6060305@codesourcery.com> Date: Thu, 02 Jun 2011 09:46:00 -0000 Message-Id: <1307007972.17090.0.camel@e102346-lin.cambridge.arm.com> Mime-Version: 1.0 X-MC-Unique: 111060210461402201 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-06/txt/msg00131.txt.bz2 On Thu, 2011-05-26 at 14:35 +0100, Andrew Stubbs wrote: > On 25/05/11 14:47, Joseph S. Myers wrote: > > The shift must be by a positive constant amount, strictly less than the > > precision (GET_MODE_PRECISION) of the mode (of the value being shifted). > > If that applies, the relevant number of bits is the precision of the mo= de > > minus the number of bits of the shift. For an extension, just take the > > number of bits in the inner mode. Add the two numbers of bits; if the > > result does not exceed the number of bits in the mode (of the operands = and > > the multiplication) then the multiplication won't overflow. >=20 > I believe the attached should implement what you describe. >=20 > Is the patch OK now? >=20 > Andrew OK. R.