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* [PATCH 2/2] mips: Add R4700 scheduling support
@ 2012-05-31 22:48 Matt Turner
  2012-06-03  8:00 ` Richard Sandiford
  0 siblings, 1 reply; 4+ messages in thread
From: Matt Turner @ 2012-05-31 22:48 UTC (permalink / raw)
  To: Richard Sandiford; +Cc: gcc-patches, Matt Turner

The R4700 is identical to the R4600 except for the integer and
floating-point multiplication costs.

See page 4 of http://datasheets.chipdb.org/IDT/MIPS/79RV4700.pdf

2012-03-24  Matt Turner  <mattst88@gmail.com>

	gcc/
	* config/mips/4600.md (r4700_imul_si): New.
	(r4700_imul_di): New.
	(r4700_fmul_single): New.
	(r4700_fmul_double): New.
	* config/mips/mips-cpus.def: Add r4700.
	* config/mips/mips.c: Likewise.
	* config/mips/mips.md: Likewise.
	* config/mips/mips-tables.opt: Regenerate.
---
 gcc/config/mips/4600.md         |   51 ++++++--
 gcc/config/mips/mips-cpus.def   |    1 +
 gcc/config/mips/mips-tables.opt |  278 ++++++++++++++++++++-------------------
 gcc/config/mips/mips.c          |    3 +
 gcc/config/mips/mips.md         |    1 +
 5 files changed, 187 insertions(+), 147 deletions(-)

diff --git a/gcc/config/mips/4600.md b/gcc/config/mips/4600.md
index 53aa01b..36eab80 100644
--- a/gcc/config/mips/4600.md
+++ b/gcc/config/mips/4600.md
@@ -1,4 +1,4 @@
-;; R4600 and R4650 pipeline description.
+;; R4600, R4650, and R4700 pipeline description.
 ;;   Copyright (C) 2004, 2005, 2007, 2012 Free Software Foundation, Inc.
 ;;
 ;; This file is part of GCC.
@@ -21,8 +21,10 @@
 ;; This file overrides parts of generic.md.  It is derived from the
 ;; old define_function_unit description.
 ;;
-;; We handle the R4600 and R4650 in much the same way.  The only difference
-;; is in the integer multiplication and division costs.
+;; We handle the R4600, R4650, and R4700 in much the same way.  The only
+;; differences between R4600 and R4650 are the integer multiplication and
+;; division costs. The only differences between R4600 and R4700 are the
+;; integer and floating-point multiplication costs.
 
 (define_insn_reservation "r4600_imul_si" 10
   (and (eq_attr "cpu" "r4600")
@@ -37,13 +39,13 @@
   "imuldiv*12")
 
 (define_insn_reservation "r4600_idiv_si" 42
-  (and (eq_attr "cpu" "r4600")
+  (and (eq_attr "cpu" "r4600,r4700")
        (eq_attr "type" "idiv")
        (eq_attr "mode" "SI"))
   "imuldiv*42")
 
 (define_insn_reservation "r4600_idiv_di" 74
-  (and (eq_attr "cpu" "r4600")
+  (and (eq_attr "cpu" "r4600,r4700")
        (eq_attr "type" "idiv")
        (eq_attr "mode" "DI"))
   "imuldiv*74")
@@ -60,13 +62,26 @@
   "imuldiv*36")
 
 
+(define_insn_reservation "r4700_imul_si" 8
+  (and (eq_attr "cpu" "r4700")
+       (eq_attr "type" "imul,imul3,imadd")
+       (eq_attr "mode" "SI"))
+  "imuldiv*8")
+
+(define_insn_reservation "r4700_imul_di" 10
+  (and (eq_attr "cpu" "r4700")
+       (eq_attr "type" "imul,imul3,imadd")
+       (eq_attr "mode" "DI"))
+  "imuldiv*10")
+
+
 (define_insn_reservation "r4600_load" 2
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (eq_attr "type" "load,fpload,fpidxload"))
   "alu")
 
 (define_insn_reservation "r4600_fmove" 1
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (eq_attr "type" "fabs,fneg,fmove"))
   "alu")
 
@@ -82,26 +97,40 @@
 	    (eq_attr "mode" "DF")))
   "alu")
 
+
+(define_insn_reservation "r4700_fmul_single" 4
+  (and (eq_attr "cpu" "r4700")
+       (and (eq_attr "type" "fmul,fmadd")
+	    (eq_attr "mode" "SF")))
+  "alu")
+
+(define_insn_reservation "r4700_fmul_double" 5
+  (and (eq_attr "cpu" "r4700")
+       (and (eq_attr "type" "fmul,fmadd")
+	    (eq_attr "mode" "DF")))
+  "alu")
+
+
 (define_insn_reservation "r4600_fdiv_single" 32
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fdiv,frdiv")
 	    (eq_attr "mode" "SF")))
   "alu")
 
 (define_insn_reservation "r4600_fdiv_double" 61
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fdiv,frdiv")
 	    (eq_attr "mode" "DF")))
   "alu")
 
 (define_insn_reservation "r4600_fsqrt_single" 31
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fsqrt,frsqrt")
 	    (eq_attr "mode" "SF")))
   "alu")
 
 (define_insn_reservation "r4600_fsqrt_double" 60
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fsqrt,frsqrt")
 	    (eq_attr "mode" "DF")))
   "alu")
diff --git a/gcc/config/mips/mips-cpus.def b/gcc/config/mips/mips-cpus.def
index 8271c47..356d3e5 100644
--- a/gcc/config/mips/mips-cpus.def
+++ b/gcc/config/mips/mips-cpus.def
@@ -70,6 +70,7 @@ MIPS_CPU ("r4400", PROCESSOR_R4000, 3, 0)
 MIPS_CPU ("r4600", PROCESSOR_R4600, 3, 0)
 MIPS_CPU ("orion", PROCESSOR_R4600, 3, 0)
 MIPS_CPU ("r4650", PROCESSOR_R4650, 3, 0)
+MIPS_CPU ("r4700", PROCESSOR_R4700, 3, 0)
 /* ST Loongson 2E/2F processors.  */
 MIPS_CPU ("loongson2e", PROCESSOR_LOONGSON_2E, 3, PTF_AVOID_BRANCHLIKELY)
 MIPS_CPU ("loongson2f", PROCESSOR_LOONGSON_2F, 3, PTF_AVOID_BRANCHLIKELY)
diff --git a/gcc/config/mips/mips-tables.opt b/gcc/config/mips/mips-tables.opt
index 599fc12..e232557 100644
--- a/gcc/config/mips/mips-tables.opt
+++ b/gcc/config/mips/mips-tables.opt
@@ -202,412 +202,418 @@ EnumValue
 Enum(mips_arch_opt_value) String(4650) Value(21)
 
 EnumValue
-Enum(mips_arch_opt_value) String(loongson2e) Value(22) Canonical
+Enum(mips_arch_opt_value) String(r4700) Value(22) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(loongson2f) Value(23) Canonical
+Enum(mips_arch_opt_value) String(4700) Value(22)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r8000) Value(24) Canonical
+Enum(mips_arch_opt_value) String(loongson2e) Value(23) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r8k) Value(24)
+Enum(mips_arch_opt_value) String(loongson2f) Value(24) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(8000) Value(24)
+Enum(mips_arch_opt_value) String(r8000) Value(25) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(8k) Value(24)
+Enum(mips_arch_opt_value) String(r8k) Value(25)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r10000) Value(25) Canonical
+Enum(mips_arch_opt_value) String(8000) Value(25)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r10k) Value(25)
+Enum(mips_arch_opt_value) String(8k) Value(25)
 
 EnumValue
-Enum(mips_arch_opt_value) String(10000) Value(25)
+Enum(mips_arch_opt_value) String(r10000) Value(26) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(10k) Value(25)
+Enum(mips_arch_opt_value) String(r10k) Value(26)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r12000) Value(26) Canonical
+Enum(mips_arch_opt_value) String(10000) Value(26)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r12k) Value(26)
+Enum(mips_arch_opt_value) String(10k) Value(26)
 
 EnumValue
-Enum(mips_arch_opt_value) String(12000) Value(26)
+Enum(mips_arch_opt_value) String(r12000) Value(27) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(12k) Value(26)
+Enum(mips_arch_opt_value) String(r12k) Value(27)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r14000) Value(27) Canonical
+Enum(mips_arch_opt_value) String(12000) Value(27)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r14k) Value(27)
+Enum(mips_arch_opt_value) String(12k) Value(27)
 
 EnumValue
-Enum(mips_arch_opt_value) String(14000) Value(27)
+Enum(mips_arch_opt_value) String(r14000) Value(28) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(14k) Value(27)
+Enum(mips_arch_opt_value) String(r14k) Value(28)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r16000) Value(28) Canonical
+Enum(mips_arch_opt_value) String(14000) Value(28)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r16k) Value(28)
+Enum(mips_arch_opt_value) String(14k) Value(28)
 
 EnumValue
-Enum(mips_arch_opt_value) String(16000) Value(28)
+Enum(mips_arch_opt_value) String(r16000) Value(29) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(16k) Value(28)
+Enum(mips_arch_opt_value) String(r16k) Value(29)
 
 EnumValue
-Enum(mips_arch_opt_value) String(vr5000) Value(29) Canonical
+Enum(mips_arch_opt_value) String(16000) Value(29)
 
 EnumValue
-Enum(mips_arch_opt_value) String(vr5k) Value(29)
+Enum(mips_arch_opt_value) String(16k) Value(29)
 
 EnumValue
-Enum(mips_arch_opt_value) String(5000) Value(29)
+Enum(mips_arch_opt_value) String(vr5000) Value(30) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(5k) Value(29)
+Enum(mips_arch_opt_value) String(vr5k) Value(30)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r5000) Value(29)
+Enum(mips_arch_opt_value) String(5000) Value(30)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r5k) Value(29)
+Enum(mips_arch_opt_value) String(5k) Value(30)
 
 EnumValue
-Enum(mips_arch_opt_value) String(vr5400) Value(30) Canonical
+Enum(mips_arch_opt_value) String(r5000) Value(30)
 
 EnumValue
-Enum(mips_arch_opt_value) String(5400) Value(30)
+Enum(mips_arch_opt_value) String(r5k) Value(30)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r5400) Value(30)
+Enum(mips_arch_opt_value) String(vr5400) Value(31) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(vr5500) Value(31) Canonical
+Enum(mips_arch_opt_value) String(5400) Value(31)
 
 EnumValue
-Enum(mips_arch_opt_value) String(5500) Value(31)
+Enum(mips_arch_opt_value) String(r5400) Value(31)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r5500) Value(31)
+Enum(mips_arch_opt_value) String(vr5500) Value(32) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(rm7000) Value(32) Canonical
+Enum(mips_arch_opt_value) String(5500) Value(32)
 
 EnumValue
-Enum(mips_arch_opt_value) String(rm7k) Value(32)
+Enum(mips_arch_opt_value) String(r5500) Value(32)
 
 EnumValue
-Enum(mips_arch_opt_value) String(7000) Value(32)
+Enum(mips_arch_opt_value) String(rm7000) Value(33) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(7k) Value(32)
+Enum(mips_arch_opt_value) String(rm7k) Value(33)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r7000) Value(32)
+Enum(mips_arch_opt_value) String(7000) Value(33)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r7k) Value(32)
+Enum(mips_arch_opt_value) String(7k) Value(33)
 
 EnumValue
-Enum(mips_arch_opt_value) String(rm9000) Value(33) Canonical
+Enum(mips_arch_opt_value) String(r7000) Value(33)
 
 EnumValue
-Enum(mips_arch_opt_value) String(rm9k) Value(33)
+Enum(mips_arch_opt_value) String(r7k) Value(33)
 
 EnumValue
-Enum(mips_arch_opt_value) String(9000) Value(33)
+Enum(mips_arch_opt_value) String(rm9000) Value(34) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(9k) Value(33)
+Enum(mips_arch_opt_value) String(rm9k) Value(34)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r9000) Value(33)
+Enum(mips_arch_opt_value) String(9000) Value(34)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r9k) Value(33)
+Enum(mips_arch_opt_value) String(9k) Value(34)
 
 EnumValue
-Enum(mips_arch_opt_value) String(4kc) Value(34) Canonical
+Enum(mips_arch_opt_value) String(r9000) Value(34)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r4kc) Value(34)
+Enum(mips_arch_opt_value) String(r9k) Value(34)
 
 EnumValue
-Enum(mips_arch_opt_value) String(4km) Value(35) Canonical
+Enum(mips_arch_opt_value) String(4kc) Value(35) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r4km) Value(35)
+Enum(mips_arch_opt_value) String(r4kc) Value(35)
 
 EnumValue
-Enum(mips_arch_opt_value) String(4kp) Value(36) Canonical
+Enum(mips_arch_opt_value) String(4km) Value(36) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r4kp) Value(36)
+Enum(mips_arch_opt_value) String(r4km) Value(36)
 
 EnumValue
-Enum(mips_arch_opt_value) String(4ksc) Value(37) Canonical
+Enum(mips_arch_opt_value) String(4kp) Value(37) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r4ksc) Value(37)
+Enum(mips_arch_opt_value) String(r4kp) Value(37)
 
 EnumValue
-Enum(mips_arch_opt_value) String(m4k) Value(38) Canonical
+Enum(mips_arch_opt_value) String(4ksc) Value(38) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(4kec) Value(39) Canonical
+Enum(mips_arch_opt_value) String(r4ksc) Value(38)
 
 EnumValue
-Enum(mips_arch_opt_value) String(r4kec) Value(39)
+Enum(mips_arch_opt_value) String(m4k) Value(39) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(4kem) Value(40) Canonical
+Enum(mips_arch_opt_value) String(4kec) Value(40) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r4kem) Value(40)
+Enum(mips_arch_opt_value) String(r4kec) Value(40)
 
 EnumValue
-Enum(mips_arch_opt_value) String(4kep) Value(41) Canonical
+Enum(mips_arch_opt_value) String(4kem) Value(41) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r4kep) Value(41)
+Enum(mips_arch_opt_value) String(r4kem) Value(41)
 
 EnumValue
-Enum(mips_arch_opt_value) String(4ksd) Value(42) Canonical
+Enum(mips_arch_opt_value) String(4kep) Value(42) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r4ksd) Value(42)
+Enum(mips_arch_opt_value) String(r4kep) Value(42)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kc) Value(43) Canonical
+Enum(mips_arch_opt_value) String(4ksd) Value(43) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kc) Value(43)
+Enum(mips_arch_opt_value) String(r4ksd) Value(43)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kf2_1) Value(44) Canonical
+Enum(mips_arch_opt_value) String(24kc) Value(44) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kf2_1) Value(44)
+Enum(mips_arch_opt_value) String(r24kc) Value(44)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kf) Value(45) Canonical
+Enum(mips_arch_opt_value) String(24kf2_1) Value(45) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kf) Value(45)
+Enum(mips_arch_opt_value) String(r24kf2_1) Value(45)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kf1_1) Value(46) Canonical
+Enum(mips_arch_opt_value) String(24kf) Value(46) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kf1_1) Value(46)
+Enum(mips_arch_opt_value) String(r24kf) Value(46)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kfx) Value(47) Canonical
+Enum(mips_arch_opt_value) String(24kf1_1) Value(47) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kfx) Value(47)
+Enum(mips_arch_opt_value) String(r24kf1_1) Value(47)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kx) Value(48) Canonical
+Enum(mips_arch_opt_value) String(24kfx) Value(48) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kx) Value(48)
+Enum(mips_arch_opt_value) String(r24kfx) Value(48)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kec) Value(49) Canonical
+Enum(mips_arch_opt_value) String(24kx) Value(49) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kec) Value(49)
+Enum(mips_arch_opt_value) String(r24kx) Value(49)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kef2_1) Value(50) Canonical
+Enum(mips_arch_opt_value) String(24kec) Value(50) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kef2_1) Value(50)
+Enum(mips_arch_opt_value) String(r24kec) Value(50)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kef) Value(51) Canonical
+Enum(mips_arch_opt_value) String(24kef2_1) Value(51) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kef) Value(51)
+Enum(mips_arch_opt_value) String(r24kef2_1) Value(51)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kef1_1) Value(52) Canonical
+Enum(mips_arch_opt_value) String(24kef) Value(52) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kef1_1) Value(52)
+Enum(mips_arch_opt_value) String(r24kef) Value(52)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kefx) Value(53) Canonical
+Enum(mips_arch_opt_value) String(24kef1_1) Value(53) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kefx) Value(53)
+Enum(mips_arch_opt_value) String(r24kef1_1) Value(53)
 
 EnumValue
-Enum(mips_arch_opt_value) String(24kex) Value(54) Canonical
+Enum(mips_arch_opt_value) String(24kefx) Value(54) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r24kex) Value(54)
+Enum(mips_arch_opt_value) String(r24kefx) Value(54)
 
 EnumValue
-Enum(mips_arch_opt_value) String(34kc) Value(55) Canonical
+Enum(mips_arch_opt_value) String(24kex) Value(55) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r34kc) Value(55)
+Enum(mips_arch_opt_value) String(r24kex) Value(55)
 
 EnumValue
-Enum(mips_arch_opt_value) String(34kf2_1) Value(56) Canonical
+Enum(mips_arch_opt_value) String(34kc) Value(56) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r34kf2_1) Value(56)
+Enum(mips_arch_opt_value) String(r34kc) Value(56)
 
 EnumValue
-Enum(mips_arch_opt_value) String(34kf) Value(57) Canonical
+Enum(mips_arch_opt_value) String(34kf2_1) Value(57) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r34kf) Value(57)
+Enum(mips_arch_opt_value) String(r34kf2_1) Value(57)
 
 EnumValue
-Enum(mips_arch_opt_value) String(34kf1_1) Value(58) Canonical
+Enum(mips_arch_opt_value) String(34kf) Value(58) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r34kf1_1) Value(58)
+Enum(mips_arch_opt_value) String(r34kf) Value(58)
 
 EnumValue
-Enum(mips_arch_opt_value) String(34kfx) Value(59) Canonical
+Enum(mips_arch_opt_value) String(34kf1_1) Value(59) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r34kfx) Value(59)
+Enum(mips_arch_opt_value) String(r34kf1_1) Value(59)
 
 EnumValue
-Enum(mips_arch_opt_value) String(34kx) Value(60) Canonical
+Enum(mips_arch_opt_value) String(34kfx) Value(60) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r34kx) Value(60)
+Enum(mips_arch_opt_value) String(r34kfx) Value(60)
 
 EnumValue
-Enum(mips_arch_opt_value) String(74kc) Value(61) Canonical
+Enum(mips_arch_opt_value) String(34kx) Value(61) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r74kc) Value(61)
+Enum(mips_arch_opt_value) String(r34kx) Value(61)
 
 EnumValue
-Enum(mips_arch_opt_value) String(74kf2_1) Value(62) Canonical
+Enum(mips_arch_opt_value) String(74kc) Value(62) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r74kf2_1) Value(62)
+Enum(mips_arch_opt_value) String(r74kc) Value(62)
 
 EnumValue
-Enum(mips_arch_opt_value) String(74kf) Value(63) Canonical
+Enum(mips_arch_opt_value) String(74kf2_1) Value(63) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r74kf) Value(63)
+Enum(mips_arch_opt_value) String(r74kf2_1) Value(63)
 
 EnumValue
-Enum(mips_arch_opt_value) String(74kf1_1) Value(64) Canonical
+Enum(mips_arch_opt_value) String(74kf) Value(64) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r74kf1_1) Value(64)
+Enum(mips_arch_opt_value) String(r74kf) Value(64)
 
 EnumValue
-Enum(mips_arch_opt_value) String(74kfx) Value(65) Canonical
+Enum(mips_arch_opt_value) String(74kf1_1) Value(65) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r74kfx) Value(65)
+Enum(mips_arch_opt_value) String(r74kf1_1) Value(65)
 
 EnumValue
-Enum(mips_arch_opt_value) String(74kx) Value(66) Canonical
+Enum(mips_arch_opt_value) String(74kfx) Value(66) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r74kx) Value(66)
+Enum(mips_arch_opt_value) String(r74kfx) Value(66)
 
 EnumValue
-Enum(mips_arch_opt_value) String(74kf3_2) Value(67) Canonical
+Enum(mips_arch_opt_value) String(74kx) Value(67) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r74kf3_2) Value(67)
+Enum(mips_arch_opt_value) String(r74kx) Value(67)
 
 EnumValue
-Enum(mips_arch_opt_value) String(1004kc) Value(68) Canonical
+Enum(mips_arch_opt_value) String(74kf3_2) Value(68) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r1004kc) Value(68)
+Enum(mips_arch_opt_value) String(r74kf3_2) Value(68)
 
 EnumValue
-Enum(mips_arch_opt_value) String(1004kf2_1) Value(69) Canonical
+Enum(mips_arch_opt_value) String(1004kc) Value(69) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r1004kf2_1) Value(69)
+Enum(mips_arch_opt_value) String(r1004kc) Value(69)
 
 EnumValue
-Enum(mips_arch_opt_value) String(1004kf) Value(70) Canonical
+Enum(mips_arch_opt_value) String(1004kf2_1) Value(70) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r1004kf) Value(70)
+Enum(mips_arch_opt_value) String(r1004kf2_1) Value(70)
 
 EnumValue
-Enum(mips_arch_opt_value) String(1004kf1_1) Value(71) Canonical
+Enum(mips_arch_opt_value) String(1004kf) Value(71) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r1004kf1_1) Value(71)
+Enum(mips_arch_opt_value) String(r1004kf) Value(71)
 
 EnumValue
-Enum(mips_arch_opt_value) String(5kc) Value(72) Canonical
+Enum(mips_arch_opt_value) String(1004kf1_1) Value(72) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r5kc) Value(72)
+Enum(mips_arch_opt_value) String(r1004kf1_1) Value(72)
 
 EnumValue
-Enum(mips_arch_opt_value) String(5kf) Value(73) Canonical
+Enum(mips_arch_opt_value) String(5kc) Value(73) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r5kf) Value(73)
+Enum(mips_arch_opt_value) String(r5kc) Value(73)
 
 EnumValue
-Enum(mips_arch_opt_value) String(20kc) Value(74) Canonical
+Enum(mips_arch_opt_value) String(5kf) Value(74) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(r20kc) Value(74)
+Enum(mips_arch_opt_value) String(r5kf) Value(74)
 
 EnumValue
-Enum(mips_arch_opt_value) String(sb1) Value(75) Canonical
+Enum(mips_arch_opt_value) String(20kc) Value(75) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(sb1a) Value(76) Canonical
+Enum(mips_arch_opt_value) String(r20kc) Value(75)
 
 EnumValue
-Enum(mips_arch_opt_value) String(sr71000) Value(77) Canonical
+Enum(mips_arch_opt_value) String(sb1) Value(76) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(sr71k) Value(77)
+Enum(mips_arch_opt_value) String(sb1a) Value(77) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(xlr) Value(78) Canonical
+Enum(mips_arch_opt_value) String(sr71000) Value(78) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(loongson3a) Value(79) Canonical
+Enum(mips_arch_opt_value) String(sr71k) Value(78)
 
 EnumValue
-Enum(mips_arch_opt_value) String(octeon) Value(80) Canonical
+Enum(mips_arch_opt_value) String(xlr) Value(79) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(octeon+) Value(81) Canonical
+Enum(mips_arch_opt_value) String(loongson3a) Value(80) Canonical
 
 EnumValue
-Enum(mips_arch_opt_value) String(octeon2) Value(82) Canonical
+Enum(mips_arch_opt_value) String(octeon) Value(81) Canonical
+
+EnumValue
+Enum(mips_arch_opt_value) String(octeon+) Value(82) Canonical
+
+EnumValue
+Enum(mips_arch_opt_value) String(octeon2) Value(83) Canonical
 
 EnumValue
 Enum(mips_arch_opt_value) String(xlp) Value(83) Canonical
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 122bc98..5bcb7a8 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -961,6 +961,9 @@ static const struct mips_rtx_cost_data
   { /* R4650 */
     DEFAULT_COSTS
   },
+  { /* R4700 */
+    DEFAULT_COSTS
+  },
   { /* R5000 */
     COSTS_N_INSNS (6),            /* fp_add */
     COSTS_N_INSNS (4),            /* fp_mult_sf */
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 912dccb..0d85340 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -54,6 +54,7 @@
   r4300
   r4600
   r4650
+  r4700
   r5000
   r5400
   r5500
-- 
1.7.3.4

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] mips: Add R4700 scheduling support
  2012-05-31 22:48 [PATCH 2/2] mips: Add R4700 scheduling support Matt Turner
@ 2012-06-03  8:00 ` Richard Sandiford
  2012-08-26 13:55   ` Gerald Pfeifer
  0 siblings, 1 reply; 4+ messages in thread
From: Richard Sandiford @ 2012-06-03  8:00 UTC (permalink / raw)
  To: Matt Turner; +Cc: gcc-patches

Matt Turner <mattst88@gmail.com> writes:
> The R4700 is identical to the R4600 except for the integer and
> floating-point multiplication costs.
>
> See page 4 of http://datasheets.chipdb.org/IDT/MIPS/79RV4700.pdf
>
> 2012-03-24  Matt Turner  <mattst88@gmail.com>
>
> 	gcc/
> 	* config/mips/4600.md (r4700_imul_si): New.
> 	(r4700_imul_di): New.
> 	(r4700_fmul_single): New.
> 	(r4700_fmul_double): New.
> 	* config/mips/mips-cpus.def: Add r4700.
> 	* config/mips/mips.c: Likewise.
> 	* config/mips/mips.md: Likewise.
> 	* config/mips/mips-tables.opt: Regenerate.

Applied, thanks.

Richard

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] mips: Add R4700 scheduling support
  2012-06-03  8:00 ` Richard Sandiford
@ 2012-08-26 13:55   ` Gerald Pfeifer
  0 siblings, 0 replies; 4+ messages in thread
From: Gerald Pfeifer @ 2012-08-26 13:55 UTC (permalink / raw)
  To: Richard Sandiford, Matt Turner; +Cc: gcc-patches

On Sun, 3 Jun 2012, Richard Sandiford wrote:
>> The R4700 is identical to the R4600 except for the integer and
>> floating-point multiplication costs.
> Applied, thanks.
> 
> Richard

And I just added the snippet below to our release notes.

Gerald

Index: changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.8/changes.html,v
retrieving revision 1.20
diff -u -3 -p -r1.20 changes.html
--- changes.html	26 Aug 2012 10:28:42 -0000	1.20
+++ changes.html	26 Aug 2012 13:54:36 -0000
@@ -214,6 +214,7 @@ by this change.</p>
   <ul>
     <li>GCC now passes the <code>-mmcu</code> and <code>-mno-mcu</code>
     options to the assembler.</li>
+    <li>Support for the R4700 has been added.</li>
   </ul>
 
 <h3 id="sh">SH</h3>

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [PATCH 2/2] mips: Add R4700 scheduling support
  2012-02-25  3:54 [PATCH 1/2] mips: Add R4600 scheduling support for imul and idiv Matt Turner
@ 2012-02-25  8:12 ` Matt Turner
  0 siblings, 0 replies; 4+ messages in thread
From: Matt Turner @ 2012-02-25  8:12 UTC (permalink / raw)
  To: gcc-patches; +Cc: Eric Christopher, Richard Sandiford, Matt Turner

The R4700 is identical to the R4600 except for the integer and
floating-point multiplication costs.

See page 4 of http://datasheets.chipdb.org/IDT/MIPS/79RV4700.pdf

2012-02-24  Matt Turner  <mattst88@gmail.com>

	* config/mips/4600.md (r4700_imul_si): New.
	(r4700_imul_di): New.
	(r4700_fmul_single): New.
	(r4700_fmul_double): New.
	* config/mips/driver-native.c (cpu_types): Add r4700.
	* config/mips/mips-cpus.def: Likewise.
	* config/mips/mips.c: Likewise.
	* config/mips/mips.md: Likewise.
---
 gcc/config/mips/4600.md         |   51 ++++++++++++++++++++++++++++++--------
 gcc/config/mips/driver-native.c |    2 +-
 gcc/config/mips/mips-cpus.def   |    1 +
 gcc/config/mips/mips.c          |    3 ++
 gcc/config/mips/mips.md         |    1 +
 5 files changed, 46 insertions(+), 12 deletions(-)

diff --git a/gcc/config/mips/4600.md b/gcc/config/mips/4600.md
index fcdbf00..ef74fd3 100644
--- a/gcc/config/mips/4600.md
+++ b/gcc/config/mips/4600.md
@@ -1,4 +1,4 @@
-;; R4600 and R4650 pipeline description.
+;; R4600, R4650, and R4700 pipeline description.
 ;;   Copyright (C) 2004, 2005, 2007, 2012 Free Software Foundation, Inc.
 ;;
 ;; This file is part of GCC.
@@ -21,8 +21,10 @@
 ;; This file overrides parts of generic.md.  It is derived from the
 ;; old define_function_unit description.
 ;;
-;; We handle the R4600 and R4650 in much the same way.  The only difference
-;; is in the integer multiplication and division costs.
+;; We handle the R4600, R4650, and R4700 in much the same way.  The only
+;; differences between R4600 and R4650 are the integer multiplication and
+;; division costs. The only differences between R4600 and R4700 are the
+;; integer and floating-point multiplication costs.
 
 (define_insn_reservation "r4600_imul_si" 10
   (and (eq_attr "cpu" "r4600")
@@ -37,13 +39,13 @@
   "imuldiv*12")
 
 (define_insn_reservation "r4600_idiv_si" 42
-  (and (eq_attr "cpu" "r4600")
+  (and (eq_attr "cpu" "r4600,r4700")
        (eq_attr "type" "idiv")
        (eq_attr "mode" "SI"))
   "imuldiv*42")
 
 (define_insn_reservation "r4600_idiv_di" 74
-  (and (eq_attr "cpu" "r4600")
+  (and (eq_attr "cpu" "r4600,r4700")
        (eq_attr "type" "idiv")
        (eq_attr "mode" "DI"))
   "imuldiv*74")
@@ -60,13 +62,26 @@
   "imuldiv*36")
 
 
+(define_insn_reservation "r4700_imul_si" 8
+  (and (eq_attr "cpu" "r4700")
+       (eq_attr "type" "imul,imul3,imadd")
+       (eq_attr "mode" "SI"))
+  "imuldiv*8")
+
+(define_insn_reservation "r4700_imul_di" 10
+  (and (eq_attr "cpu" "r4700")
+       (eq_attr "type" "imul,imul3,imadd")
+       (eq_attr "mode" "DI"))
+  "imuldiv*10")
+
+
 (define_insn_reservation "r4600_load" 2
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (eq_attr "type" "load,fpload,fpidxload"))
   "alu")
 
 (define_insn_reservation "r4600_fmove" 1
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (eq_attr "type" "fabs,fneg,fmove"))
   "alu")
 
@@ -76,26 +91,40 @@
 	    (eq_attr "mode" "SF")))
   "alu")
 
+
+(define_insn_reservation "r4700_fmul_single" 4
+  (and (eq_attr "cpu" "r4700")
+       (and (eq_attr "type" "fmul,fmadd")
+	    (eq_attr "mode" "SF")))
+  "alu")
+
+(define_insn_reservation "r4700_fmul_double" 5
+  (and (eq_attr "cpu" "r4700")
+       (and (eq_attr "type" "fmul,fmadd")
+	    (eq_attr "mode" "DF")))
+  "alu")
+
+
 (define_insn_reservation "r4600_fdiv_single" 32
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fdiv,frdiv")
 	    (eq_attr "mode" "SF")))
   "alu")
 
 (define_insn_reservation "r4600_fdiv_double" 61
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fdiv,frdiv")
 	    (eq_attr "mode" "DF")))
   "alu")
 
 (define_insn_reservation "r4600_fsqrt_single" 31
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fsqrt,frsqrt")
 	    (eq_attr "mode" "SF")))
   "alu")
 
 (define_insn_reservation "r4600_fsqrt_double" 60
-  (and (eq_attr "cpu" "r4600,r4650")
+  (and (eq_attr "cpu" "r4600,r4650,r4700")
        (and (eq_attr "type" "fsqrt,frsqrt")
 	    (eq_attr "mode" "DF")))
   "alu")
diff --git a/gcc/config/mips/driver-native.c b/gcc/config/mips/driver-native.c
index f565c57..580bca2 100644
--- a/gcc/config/mips/driver-native.c
+++ b/gcc/config/mips/driver-native.c
@@ -45,7 +45,7 @@ static const struct cpu_types {
   { C0_IMP_R14000, "r14000" },
   { C0_IMP_R8000,  "r8000" },
   { C0_IMP_R4600,  "r4600" },
-  { C0_IMP_R4700,  "r4600" },
+  { C0_IMP_R4700,  "r4700" },
   { C0_IMP_R4650,  "r4650" },
   { C0_IMP_R5000,  "vr5000" },
   { C0_IMP_RM7000, "rm7000" },
diff --git a/gcc/config/mips/mips-cpus.def b/gcc/config/mips/mips-cpus.def
index 98b915a..d4631b0 100644
--- a/gcc/config/mips/mips-cpus.def
+++ b/gcc/config/mips/mips-cpus.def
@@ -70,6 +70,7 @@ MIPS_CPU ("r4400", PROCESSOR_R4000, 3, 0)
 MIPS_CPU ("r4600", PROCESSOR_R4600, 3, 0)
 MIPS_CPU ("orion", PROCESSOR_R4600, 3, 0)
 MIPS_CPU ("r4650", PROCESSOR_R4650, 3, 0)
+MIPS_CPU ("r4700", PROCESSOR_R4700, 3, 0)
 /* ST Loongson 2E/2F processors.  */
 MIPS_CPU ("loongson2e", PROCESSOR_LOONGSON_2E, 3, PTF_AVOID_BRANCHLIKELY)
 MIPS_CPU ("loongson2f", PROCESSOR_LOONGSON_2F, 3, PTF_AVOID_BRANCHLIKELY)
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 56863fa..4bef60e 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -962,6 +962,9 @@ static const struct mips_rtx_cost_data
   { /* R4650 */
     DEFAULT_COSTS
   },
+  { /* R4700 */
+    DEFAULT_COSTS
+  },
   { /* R5000 */
     COSTS_N_INSNS (6),            /* fp_add */
     COSTS_N_INSNS (4),            /* fp_mult_sf */
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index e5d716d..cb4d98d 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -54,6 +54,7 @@
   r4300
   r4600
   r4650
+  r4700
   r5000
   r5400
   r5500
-- 
1.7.3.4

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2012-08-26 13:55 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-05-31 22:48 [PATCH 2/2] mips: Add R4700 scheduling support Matt Turner
2012-06-03  8:00 ` Richard Sandiford
2012-08-26 13:55   ` Gerald Pfeifer
  -- strict thread matches above, loose matches on Subject: below --
2012-02-25  3:54 [PATCH 1/2] mips: Add R4600 scheduling support for imul and idiv Matt Turner
2012-02-25  8:12 ` [PATCH 2/2] mips: Add R4700 scheduling support Matt Turner

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