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From: 程璐璐 <chenglulu@loongson.cn>
To: Xi Ruoyao <xry111@mengyan1223.wang>,
	xuchenghua@loongson.cn, gcc-patches@gcc.gnu.org
Cc: joseph@codesourcery.com, Huacai Chen <chenhuacai@gmail.com>
Subject: Re: [PATCH v8 00/12] Add LoongArch support.
Date: Wed, 16 Mar 2022 20:31:05 +0800	[thread overview]
Message-ID: <1386c24c-a5e5-2969-e694-6ba6f0776fcb@loongson.cn> (raw)
In-Reply-To: <5dd635efebd36cc16f0141ae7e7ef2ceebc0955c.camel@mengyan1223.wang>


在 2022/3/15 下午10:35, Xi Ruoyao 写道:
> On Fri, 2022-03-04 at 15:17 +0800, xuchenghua@loongson.cn wrote:
>
>> v7 -> v8
>> 1. Add new addressing type ADDRESS_REG_REG support.
>> 2. Modify documentation.
>> 3. Eliminate compile-time warnings.
> Hi,
>
> The v8 series does not build LoongArch Linux kernel tree
> (https://github.com/loongson/linux, loongarch-next branch) successfully.
> This is a regression: the v7 series built the kernel fine.
>
> A testcase reduced from the __get_data_asm macro in uaccess.h:
>
> $ cat t1.c
> char *ptr;
> int offset;
> struct m
> {
>    char a[2];
> };
>
> char
> x (void)
> {
>    char t;
>    asm volatile("ld.b %0, %1" : "=r"(t) : "o"(*(struct m *)(ptr + offset)));
>    return t;
> }
>
> $ ./gcc/cc1 t1.c -nostdinc -O
> t1.c: In function ‘x’:
> t1.c:12:3: error: impossible constraint in ‘asm’
>     12 |   asm volatile("ld.b %0, %1" : "=r"(t) : "o"(*(struct m *)(ptr + offset)));
>        |   ^~~
>
> It seems changing the constraint "o" to "m" can work around this issue.
> I'm not sure if this is a compiler bug or a kernel bug.

Hi,

LoongArch supports memory modes as follows:

          mode                    memory constraint

1. base  + index "k"

2. base + imm12 "m"

3. base + imm16 (immediate 4-byte alignment) "ZC"

4. base + 0 "ZB"

so, this constraint should be "m".




      reply	other threads:[~2022-03-16 12:31 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-04  7:17 xuchenghua
2022-03-04  7:17 ` [PATCH v8 01/12] LoongArch Port: Regenerate configure xuchenghua
2022-03-04  7:17 ` [PATCH v8 02/12] LoongArch Port: gcc build xuchenghua
2022-03-06 10:29   ` Richard Sandiford
2022-03-06 10:34     ` Andreas Schwab
2022-03-04  7:18 ` [PATCH v8 03/12] LoongArch Port: Regenerate gcc/configure xuchenghua
2022-03-04  7:18 ` [PATCH v8 04/12] LoongArch Port: Machine description files xuchenghua
2022-03-06 16:16   ` Richard Sandiford
2022-03-07  3:59     ` 程璐璐
2022-03-19  9:40     ` 程璐璐
2022-03-07 20:15   ` Xi Ruoyao
2022-03-10  6:26     ` 程璐璐
2022-03-04  7:18 ` [PATCH v8 05/12] LoongArch Port: Machine description C files and .h files xuchenghua
2022-03-07 18:17   ` Richard Sandiford
2022-03-19  9:35     ` 程璐璐
2022-03-04  7:18 ` [PATCH v8 06/12] LoongArch Port: Builtin functions xuchenghua
2022-03-08 18:43   ` Richard Sandiford
2022-03-04  7:18 ` [PATCH v8 07/12] LoongArch Port: Builtin macros xuchenghua
2022-03-04  7:18 ` [PATCH v8 08/12] LoongArch Port: libgcc xuchenghua
2022-03-08 18:59   ` Richard Sandiford
2022-03-08 19:37     ` Andreas Schwab
2022-03-04  7:18 ` [PATCH v8 09/12] LoongArch Port: Regenerate libgcc/configure xuchenghua
2022-03-04  7:18 ` [PATCH v8 10/12] LoongArch Port: libgomp xuchenghua
2022-03-04  7:18 ` [PATCH v8 11/12] LoongArch Port: gcc/testsuite xuchenghua
2022-03-08 19:06   ` Richard Sandiford
2022-03-04  7:18 ` [PATCH v8 12/12] LoongArch Port: Add doc xuchenghua
2022-03-08 19:53   ` Richard Sandiford
2022-03-04 20:02 ` [PATCH v8 00/12] Add LoongArch support Xi Ruoyao
2022-03-05  1:36   ` Paul Hua
2022-03-05  1:39     ` Paul Hua
2022-03-05  9:21     ` Xi Ruoyao
2022-03-08 19:57   ` Richard Sandiford
2022-03-15 14:35 ` Xi Ruoyao
2022-03-16 12:31   ` 程璐璐 [this message]

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