From: Peter Bergner <bergner@linux.ibm.com>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>
Subject: [PING][PATCH] rs6000: Don't ICE when we disassemble an MMA variable [PR101322]
Date: Tue, 30 Aug 2022 12:22:33 -0500 [thread overview]
Message-ID: <13c36a04-bb77-9474-d91f-1e71547e5081@linux.ibm.com> (raw)
I'd like to ping the following patch.
Peter
https://gcc.gnu.org/pipermail/gcc-patches/2022-August/600451.html
Message-ID: <c7d29335-ac3a-24d4-486e-7755018263bf@linux.ibm.com>
>When we expand an MMA disassemble built-in with C++ using a pointer that
>is casted to a valid MMA type, the type isn't passed down to the expand
>machinery and we end up using the base type of the pointer which leads to
>an ICE. This patch enforces we always use the correct MMA type regardless
>of the pointer type being used.
>
>This passed bootstrap and regtesting on powerpc64le-linux with no regressions.
>Ok for trunk and backports after some burn-in time?
>
>Peter
>
>gcc/
> PR target/101322
> * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin):
> Enforce the use of a valid MMA pointer type.
>
>gcc/testsuite/
> PR target/101322
> * g++.target/powerpc/pr101322.C: New test.
>
>diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
>index 12afa86854c..e796e74f072 100644
>--- a/gcc/config/rs6000/rs6000-builtin.cc
>+++ b/gcc/config/rs6000/rs6000-builtin.cc
>@@ -1085,7 +1085,12 @@ rs6000_gimple_fold_mma_builtin (gimple_stmt_iterator *gsi,
> unsigned nvec = (fncode == RS6000_BIF_DISASSEMBLE_ACC) ? 4 : 2;
> tree dst_ptr = gimple_call_arg (stmt, 0);
> tree src_ptr = gimple_call_arg (stmt, 1);
>- tree src_type = TREE_TYPE (src_ptr);
>+ tree src_type = (fncode == RS6000_BIF_DISASSEMBLE_ACC)
>+ ? build_pointer_type (vector_quad_type_node)
>+ : build_pointer_type (vector_pair_type_node);
>+ if (TREE_TYPE (TREE_TYPE (src_ptr)) != src_type)
>+ src_ptr = build1 (VIEW_CONVERT_EXPR, src_type, src_ptr);
>+
> tree src = create_tmp_reg_or_ssa_name (TREE_TYPE (src_type));
> gimplify_assign (src, build_simple_mem_ref (src_ptr), &new_seq);
>
>diff --git a/gcc/testsuite/g++.target/powerpc/pr101322.C b/gcc/testsuite/g++.target/powerpc/pr101322.C
>new file mode 100644
>index 00000000000..59e71e8eb89
>--- /dev/null
>+++ b/gcc/testsuite/g++.target/powerpc/pr101322.C
>@@ -0,0 +1,17 @@
>+/* PR target/101322 */
>+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
>+/* { dg-require-effective-target power10_ok } */
>+
>+/* Verify we don't ICE on the following test cases. */
>+
>+void
>+foo (char *resp, char *vpp)
>+{
>+ __builtin_vsx_disassemble_pair (resp, (__vector_pair *) vpp);
>+}
>+
>+void
>+bar (char *resp, char *vpp)
>+{
>+ __builtin_mma_disassemble_acc (resp, (__vector_quad *)vpp);
>+}
reply other threads:[~2022-08-30 17:22 UTC|newest]
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