From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.ispras.ru (mail.ispras.ru [83.149.199.84]) by sourceware.org (Postfix) with ESMTPS id 355733858CDA for ; Thu, 1 Dec 2022 19:01:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 355733858CDA Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=ispras.ru Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=ispras.ru Received: from [10.10.3.121] (unknown [10.10.3.121]) by mail.ispras.ru (Postfix) with ESMTPS id BEDAE419E9DE; Thu, 1 Dec 2022 19:01:56 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.ispras.ru BEDAE419E9DE Date: Thu, 1 Dec 2022 22:01:56 +0300 (MSK) From: Alexander Monakov To: "Joshi, Tejas Sanjay" cc: "gcc-patches@gcc.gnu.org" , "honza.hubicka@gmail.com" , "Kumar, Venkataramanan" Subject: RE: [PATCH][X86_64] Separate znver4 insn reservations from older znvers In-Reply-To: Message-ID: <13c76b16-a479-efef-83f9-643a15a3629@ispras.ru> References: <8e489785-b181-fbcf-e029-cd75796a6f28@ispras.ru> <27b06e9f-1e80-585d-624e-6f50475a5aa8@ispras.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Spam-Status: No, score=-3.1 required=5.0 tests=BAYES_00,KAM_DMARC_STATUS,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, 1 Dec 2022, Joshi, Tejas Sanjay wrote: > I have addressed all your comments in this revised patch, PFA and inlined below. Thank you. Honza, please let me know if any further input is needed from my side. For reference, here's how insn-automata.o table sizes look with this patch (top 17, in bytes): 20068 r bdver1_fp_check 20068 r bdver1_fp_transitions 26208 r slm_min_issue_delay 27244 r bdver1_fp_min_issue_delay 28518 r glm_check 28518 r glm_transitions 33345 r znver4_fpu_min_issue_delay 33690 r geode_min_issue_delay 46980 r bdver3_fp_min_issue_delay 49428 r glm_min_issue_delay 53730 r btver2_fp_min_issue_delay 53760 r znver1_fp_transitions 93960 r bdver3_fp_transitions 106102 r lujiazui_core_check 106102 r lujiazui_core_transitions 133380 r znver4_fpu_transitions 196123 r lujiazui_core_min_issue_delay There is a plan to further reduce Lujiazui and b[td]verX table sizes by properly modeling division units like we did for znver.md (PR 87832). Alexander