[GCC 4.8 changes] PATCH: Mention several user-visible changes for x86

[GCC 4.8 changes] PATCH: Mention several user-visible changes for x86

[Igor Zamyatin]

Hi,

This patch updates GCC 4.8 changes.html to mention Broadwell's
features, RTM and HLE support and fixed pre-reload scheduler.

OK to commit?


Thanks,
Igor

Index: htdocs/gcc-4.8/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.8/changes.html,v
retrieving revision 1.95
diff -c -r1.95 changes.html
*** htdocs/gcc-4.8/changes.html 11 Feb 2013 15:12:58 -0000      1.95
--- htdocs/gcc-4.8/changes.html 12 Feb 2013 15:10:41 -0000
***************
*** 460,465 ****
--- 460,471 ----
      wrong results.  You must build all
      modules with <code>-mpreferred-stack-boundary=3</code>, including any
      libraries.  This includes the system libraries and startup modules.</li>
+     <li>Support for the new Intel processor codename Broadwell with RDSEED,
+     ADCX, ADOX, PREFETCHW is available through <code>-madx</code>,
+     <code>-mprfchw</code>, <code>-mrdseed</code>.
+     </li>
+     <li> Support for Intel RTM and HLE intrinsics, built-in
functions and code generation is available via -mrtm and -mhle.
+     </li>
      <li> New built-in functions to detect run-time CPU type and ISA:
      <ul>
        <li>A built-in function <code>__builtin_cpu_is</code> has been added to
***************
*** 524,529 ****
--- 530,538 ----
      <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
for more
      information.
      </li>
+     <li> Problem with instability of pre-reload scheduler on x86
targets was fixed. Now option -fschedule-insn
+     can be used loosely to reach better performance.
+     </li>
      <li> Windows MinGW-w64 targets (<code>*-w64-mingw*</code>)
require at least r5437 from the Mingw-w64 trunk. </li>
    </ul>

Re: [GCC 4.8 changes] PATCH: Mention several user-visible changes for x86

[Uros Bizjak]

On Tue, Feb 12, 2013 at 8:45 PM, Igor Zamyatin <izamyatin@gmail.com> wrote:

> This patch updates GCC 4.8 changes.html to mention Broadwell's
> features, RTM and HLE support and fixed pre-reload scheduler.
>
> OK to commit?
>
>
> Thanks,
> Igor
>
> Index: htdocs/gcc-4.8/changes.html
> ===================================================================
> RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.8/changes.html,v
> retrieving revision 1.95
> diff -c -r1.95 changes.html
> *** htdocs/gcc-4.8/changes.html 11 Feb 2013 15:12:58 -0000      1.95
> --- htdocs/gcc-4.8/changes.html 12 Feb 2013 15:10:41 -0000
> ***************
> *** 460,465 ****
> --- 460,471 ----
>       wrong results.  You must build all
>       modules with <code>-mpreferred-stack-boundary=3</code>, including any
>       libraries.  This includes the system libraries and startup modules.</li>
> +     <li>Support for the new Intel processor codename Broadwell with RDSEED,
> +     ADCX, ADOX, PREFETCHW is available through <code>-madx</code>,
> +     <code>-mprfchw</code>, <code>-mrdseed</code>.
> +     </li>
> +     <li> Support for Intel RTM and HLE intrinsics, built-in
> functions and code generation is available via -mrtm and -mhle.
> +     </li>

Please also mention new -mfxsr, -mxsave and -mxsaveopt options.

>       <li> New built-in functions to detect run-time CPU type and ISA:
>       <ul>
>         <li>A built-in function <code>__builtin_cpu_is</code> has been added to
> ***************
> *** 524,529 ****
> --- 530,538 ----
>       <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
> for more
>       information.
>       </li>
> +     <li> Problem with instability of pre-reload scheduler on x86
> targets was fixed. Now option -fschedule-insn
> +     can be used loosely to reach better performance.

"used loosely" in what sense?

Thanks,
Uros.

Re: [GCC 4.8 changes] PATCH: Mention several user-visible changes for x86

[Igor Zamyatin]

>
> Please also mention new -mfxsr, -mxsave and -mxsaveopt options.
>
>>       <li> New built-in functions to detect run-time CPU type and ISA:
>>       <ul>
>>         <li>A built-in function <code>__builtin_cpu_is</code> has been added to
>> ***************
>> *** 524,529 ****
>> --- 530,538 ----
>>       <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
>> for more
>>       information.
>>       </li>
>> +     <li> Problem with instability of pre-reload scheduler on x86
>> targets was fixed. Now option -fschedule-insn
>> +     can be used loosely to reach better performance.
>
> "used loosely" in what sense?
>
> Thanks,
> Uros.

Updated version. Does it look ok?


Thanks,
Igor

Index: htdocs/gcc-4.8/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.8/changes.html,v
retrieving revision 1.95
diff -c -r1.95 changes.html
*** htdocs/gcc-4.8/changes.html 11 Feb 2013 15:12:58 -0000      1.95
--- htdocs/gcc-4.8/changes.html 12 Feb 2013 15:10:41 -0000
***************
*** 460,465 ****
--- 460,471 ----
      wrong results.  You must build all
      modules with <code>-mpreferred-stack-boundary=3</code>, including any
      libraries.  This includes the system libraries and startup modules.</li>
+     <li>Support for the new Intel processor codename Broadwell with RDSEED,
+     ADCX, ADOX, PREFETCHW is available through <code>-madx</code>,
+     <code>-mprfchw</code>, <code>-mrdseed</code>.
+     </li>
+     <li> Support for Intel RTM and HLE intrinsics, built-in
functions and code generation is available via <code>-mrtm</code> and
<code>-mhle</code>.
+     </li>
+     <li> Support for Intel FXSR, XSAVE and XSAVEOPT instruction
sets. Intrinsics and built-in functions are available
+     via <code>-mfxsr</code>, <code>-mxsave</code> and
<code>-mxsaveopt</code> respectively.
+     </li>
      <li> New built-in functions to detect run-time CPU type and ISA:
      <ul>
        <li>A built-in function <code>__builtin_cpu_is</code> has been added to
***************
*** 524,529 ****
--- 530,538 ----
      <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
for more
      information.
      </li>
+     <li> x86 backend was improved to allow option
<code>-fscedule-insns</code> to work reliably.
+     This option can be used to schedule instructions better and can
lead to improved performace in certain cases.
+     </li>
      <li> Windows MinGW-w64 targets (<code>*-w64-mingw*</code>)
require at least r5437 from the Mingw-w64 trunk. </li>
    </ul>

Re: [GCC 4.8 changes] PATCH: Mention several user-visible changes for x86

[Uros Bizjak]

On Wed, Feb 13, 2013 at 12:17 PM, Igor Zamyatin <izamyatin@gmail.com> wrote:
>>
>> Please also mention new -mfxsr, -mxsave and -mxsaveopt options.
>>
>>>       <li> New built-in functions to detect run-time CPU type and ISA:
>>>       <ul>
>>>         <li>A built-in function <code>__builtin_cpu_is</code> has been added to
>>> ***************
>>> *** 524,529 ****
>>> --- 530,538 ----
>>>       <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
>>> for more
>>>       information.
>>>       </li>
>>> +     <li> Problem with instability of pre-reload scheduler on x86
>>> targets was fixed. Now option -fschedule-insn
>>> +     can be used loosely to reach better performance.
>>
>> "used loosely" in what sense?
>>
>> Thanks,
>> Uros.
>
> Updated version. Does it look ok?

Looks OK to me. I have CC'd Gerald for a grammar and style check.

Thanks,
Uros.

>
>
> Thanks,
> Igor
>
> Index: htdocs/gcc-4.8/changes.html
> ===================================================================
> RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.8/changes.html,v
> retrieving revision 1.95
> diff -c -r1.95 changes.html
> *** htdocs/gcc-4.8/changes.html 11 Feb 2013 15:12:58 -0000      1.95
> --- htdocs/gcc-4.8/changes.html 12 Feb 2013 15:10:41 -0000
> ***************
> *** 460,465 ****
> --- 460,471 ----
>       wrong results.  You must build all
>       modules with <code>-mpreferred-stack-boundary=3</code>, including any
>       libraries.  This includes the system libraries and startup modules.</li>
> +     <li>Support for the new Intel processor codename Broadwell with RDSEED,
> +     ADCX, ADOX, PREFETCHW is available through <code>-madx</code>,
> +     <code>-mprfchw</code>, <code>-mrdseed</code>.
> +     </li>
> +     <li> Support for Intel RTM and HLE intrinsics, built-in
> functions and code generation is available via <code>-mrtm</code> and
> <code>-mhle</code>.
> +     </li>
> +     <li> Support for Intel FXSR, XSAVE and XSAVEOPT instruction
> sets. Intrinsics and built-in functions are available
> +     via <code>-mfxsr</code>, <code>-mxsave</code> and
> <code>-mxsaveopt</code> respectively.
> +     </li>
>       <li> New built-in functions to detect run-time CPU type and ISA:
>       <ul>
>         <li>A built-in function <code>__builtin_cpu_is</code> has been added to
> ***************
> *** 524,529 ****
> --- 530,538 ----
>       <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
> for more
>       information.
>       </li>
> +     <li> x86 backend was improved to allow option
> <code>-fscedule-insns</code> to work reliably.
> +     This option can be used to schedule instructions better and can
> lead to improved performace in certain cases.
> +     </li>
>       <li> Windows MinGW-w64 targets (<code>*-w64-mingw*</code>)
> require at least r5437 from the Mingw-w64 trunk. </li>
>     </ul>

Re: [GCC 4.8 wwwdocs] PATCH: Mention several user-visible changes for x86

[Igor Zamyatin]

Gerald,

Is it ok for wwwdocs?

Thanks,
Igor

On Wed, Feb 13, 2013 at 3:21 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Wed, Feb 13, 2013 at 12:17 PM, Igor Zamyatin <izamyatin@gmail.com> wrote:
>>>
>>> Please also mention new -mfxsr, -mxsave and -mxsaveopt options.
>>>
>>>>       <li> New built-in functions to detect run-time CPU type and ISA:
>>>>       <ul>
>>>>         <li>A built-in function <code>__builtin_cpu_is</code> has been added to
>>>> ***************
>>>> *** 524,529 ****
>>>> --- 530,538 ----
>>>>       <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
>>>> for more
>>>>       information.
>>>>       </li>
>>>> +     <li> Problem with instability of pre-reload scheduler on x86
>>>> targets was fixed. Now option -fschedule-insn
>>>> +     can be used loosely to reach better performance.
>>>
>>> "used loosely" in what sense?
>>>
>>> Thanks,
>>> Uros.
>>
>> Updated version. Does it look ok?
>
> Looks OK to me. I have CC'd Gerald for a grammar and style check.
>
> Thanks,
> Uros.
>
>>
>>
>> Thanks,
>> Igor
>>
 Index: htdocs/gcc-4.8/changes.html
 ===================================================================
 RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.8/changes.html,v
 retrieving revision 1.95
 diff -c -r1.95 changes.html
 *** htdocs/gcc-4.8/changes.html 11 Feb 2013 15:12:58 -0000      1.95
 --- htdocs/gcc-4.8/changes.html 12 Feb 2013 15:10:41 -0000
 ***************
 *** 460,465 ****
 --- 460,471 ----
       wrong results.  You must build all
       modules with <code>-mpreferred-stack-boundary=3</code>, including any
       libraries.  This includes the system libraries and startup modules.</li>
 +     <li>Support for the new Intel processor codename Broadwell with RDSEED,
 +     ADCX, ADOX, PREFETCHW is available through <code>-madx</code>,
 +     <code>-mprfchw</code>, <code>-mrdseed</code>.
 +     </li>
 +     <li> Support for Intel RTM and HLE intrinsics, built-in
 functions and code generation is available via <code>-mrtm</code> and
 <code>-mhle</code>.
 +     </li>
 +     <li> Support for Intel FXSR, XSAVE and XSAVEOPT instruction
sets. Intrinsics and built-in functions are available
 +     via <code>-mfxsr</code>, <code>-mxsave</code> and
<code>-mxsaveopt</code> respectively.
 +     </li>
       <li> New built-in functions to detect run-time CPU type and ISA:
       <ul>
         <li>A built-in function <code>__builtin_cpu_is</code> has been added to
 ***************
 *** 524,529 ****
 --- 530,538 ----
       <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
 for more
       information.
       </li>
 +     <li> x86 backend was improved to allow option
<code>-fscedule-insns</code> to work reliably.
 +     This option can be used to schedule instructions better and can
lead to improved performace in certain cases.
 +     </li>
       <li> Windows MinGW-w64 targets (<code>*-w64-mingw*</code>)
 require at least r5437 from the Mingw-w64 trunk. </li>
     </ul>

Re: [GCC 4.8 wwwdocs] PATCH: Mention several user-visible changes for x86

[Gerald Pfeifer]

On Fri, 15 Feb 2013, Igor Zamyatin wrote:
> Is it ok for wwwdocs?

Index: htdocs/gcc-4.8/changes.html
===================================================================
+     <li>Support for the new Intel processor codename Broadwell with RDSEED,
+     ADCX, ADOX, PREFETCHW is available through <code>-madx</code>,
+     <code>-mprfchw</code>, <code>-mrdseed</code>.

Can you make this <code>RDSEED</code>, <code>... and so forth?
(This is a bit borderline, in that one could also see this as
more general references, but usually we mark those up.)

And "...through the ... command-line options."?

+     <li> Support for Intel RTM and HLE intrinsics, built-in

"the ... intrinsics" (and same below for "instruction sets")

+     <li> x86 backend was improved to allow option
<code>-fscedule-insns</code> to work reliably.

"The x86 backend has been improved..."

+     This option can be used to schedule instructions better and can
lead to improved performace in certain cases.

This line is quite long, can you break lines around 76 columns?

And, let's be a bit more brave and omit either "can" or "in certain
cases".  Otherwise this may sounds too unlikely. :-)

The patch is fine with changes along the lines described above.

Thanks,
Gerald

Re: [GCC 4.8 wwwdocs] PATCH: Mention several user-visible changes for x86

[Igor Zamyatin]

Gerald,

Thanks a lot for your remarks!

Below is updated patch which will be checked in.


Thanks,
Igor

On Mon, Feb 18, 2013 at 3:07 AM, Gerald Pfeifer <gerald@pfeifer.com> wrote:
> On Fri, 15 Feb 2013, Igor Zamyatin wrote:
>> Is it ok for wwwdocs?
>
> Index: htdocs/gcc-4.8/changes.html
> ===================================================================
> +     <li>Support for the new Intel processor codename Broadwell with RDSEED,
> +     ADCX, ADOX, PREFETCHW is available through <code>-madx</code>,
> +     <code>-mprfchw</code>, <code>-mrdseed</code>.
>
> Can you make this <code>RDSEED</code>, <code>... and so forth?
> (This is a bit borderline, in that one could also see this as
> more general references, but usually we mark those up.)
>
> And "...through the ... command-line options."?
>
> +     <li> Support for Intel RTM and HLE intrinsics, built-in
>
> "the ... intrinsics" (and same below for "instruction sets")
>
> +     <li> x86 backend was improved to allow option
> <code>-fscedule-insns</code> to work reliably.
>
> "The x86 backend has been improved..."
>
> +     This option can be used to schedule instructions better and can
> lead to improved performace in certain cases.
>
> This line is quite long, can you break lines around 76 columns?
>
> And, let's be a bit more brave and omit either "can" or "in certain
> cases".  Otherwise this may sounds too unlikely. :-)
>
> The patch is fine with changes along the lines described above.
>
> Thanks,
> Gerald

Index: htdocs/gcc-4.8/changes.html
  ===================================================================
  RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.8/changes.html,v
  retrieving revision 1.95
  diff -c -r1.95 changes.html
  *** htdocs/gcc-4.8/changes.html 11 Feb 2013 15:12:58 -0000      1.95
  --- htdocs/gcc-4.8/changes.html 12 Feb 2013 15:10:41 -0000
  ***************
  *** 460,465 ****
  --- 460,471 ----
        wrong results.  You must build all
        modules with <code>-mpreferred-stack-boundary=3</code>, including any
        libraries.  This includes the system libraries and startup modules.</li>
  +     <li>Support for the new Intel processor codename Broadwell with
  +     <code>RDSEED</code>, <code>ADCX</code>, <code>ADOX</code>,
  +     <code>PREFETCHW</code> is available through <code>-madx</code>,
  +     <code>-mprfchw</code>, <code>-mrdseed</code> command-line options.
  +     </li>
  +     <li> Support for the Intel RTM and HLE intrinsics, built-in
  functions and code generation is available via <code>-mrtm</code> and
  <code>-mhle</code>.
  +     </li>
  +     <li> Support for the Intel FXSR, XSAVE and XSAVEOPT instruction
 sets. Intrinsics and built-in functions are available
  +     via <code>-mfxsr</code>, <code>-mxsave</code> and
 <code>-mxsaveopt</code> respectively.
  +     </li>
        <li> New built-in functions to detect run-time CPU type and ISA:
        <ul>
          <li>A built-in function <code>__builtin_cpu_is</code> has
been added to
  ***************
  *** 524,529 ****
  --- 530,538 ----
        <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
  for more
        information.
        </li>
  +     <li> The x86 backend has been improved to allow option
 <code>-fscedule-insns</code> to work reliably.
  +     This option can be used to schedule instructions better and leads to
  +     improved performace in certain cases.
  +     </li>
        <li> Windows MinGW-w64 targets (<code>*-w64-mingw*</code>)
  require at least r5437 from the Mingw-w64 trunk. </li>
      </ul>

Re: [GCC 4.8 wwwdocs] PATCH: Mention several user-visible changes for x86

[Kirill Yukhin]

Hi,
Checked in

Thanks, K

On Mon, Feb 18, 2013 at 10:28 AM, Igor Zamyatin <izamyatin@gmail.com> wrote:
> Gerald,
>
> Thanks a lot for your remarks!
>
> Below is updated patch which will be checked in.
>
>
> Thanks,
> Igor
>
> On Mon, Feb 18, 2013 at 3:07 AM, Gerald Pfeifer <gerald@pfeifer.com> wrote:
>> On Fri, 15 Feb 2013, Igor Zamyatin wrote:
>>> Is it ok for wwwdocs?
>>
>> Index: htdocs/gcc-4.8/changes.html
>> ===================================================================
>> +     <li>Support for the new Intel processor codename Broadwell with RDSEED,
>> +     ADCX, ADOX, PREFETCHW is available through <code>-madx</code>,
>> +     <code>-mprfchw</code>, <code>-mrdseed</code>.
>>
>> Can you make this <code>RDSEED</code>, <code>... and so forth?
>> (This is a bit borderline, in that one could also see this as
>> more general references, but usually we mark those up.)
>>
>> And "...through the ... command-line options."?
>>
>> +     <li> Support for Intel RTM and HLE intrinsics, built-in
>>
>> "the ... intrinsics" (and same below for "instruction sets")
>>
>> +     <li> x86 backend was improved to allow option
>> <code>-fscedule-insns</code> to work reliably.
>>
>> "The x86 backend has been improved..."
>>
>> +     This option can be used to schedule instructions better and can
>> lead to improved performace in certain cases.
>>
>> This line is quite long, can you break lines around 76 columns?
>>
>> And, let's be a bit more brave and omit either "can" or "in certain
>> cases".  Otherwise this may sounds too unlikely. :-)
>>
>> The patch is fine with changes along the lines described above.
>>
>> Thanks,
>> Gerald
>
> Index: htdocs/gcc-4.8/changes.html
>   ===================================================================
>   RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.8/changes.html,v
>   retrieving revision 1.95
>   diff -c -r1.95 changes.html
>   *** htdocs/gcc-4.8/changes.html 11 Feb 2013 15:12:58 -0000      1.95
>   --- htdocs/gcc-4.8/changes.html 12 Feb 2013 15:10:41 -0000
>   ***************
>   *** 460,465 ****
>   --- 460,471 ----
>         wrong results.  You must build all
>         modules with <code>-mpreferred-stack-boundary=3</code>, including any
>         libraries.  This includes the system libraries and startup modules.</li>
>   +     <li>Support for the new Intel processor codename Broadwell with
>   +     <code>RDSEED</code>, <code>ADCX</code>, <code>ADOX</code>,
>   +     <code>PREFETCHW</code> is available through <code>-madx</code>,
>   +     <code>-mprfchw</code>, <code>-mrdseed</code> command-line options.
>   +     </li>
>   +     <li> Support for the Intel RTM and HLE intrinsics, built-in
>   functions and code generation is available via <code>-mrtm</code> and
>   <code>-mhle</code>.
>   +     </li>
>   +     <li> Support for the Intel FXSR, XSAVE and XSAVEOPT instruction
>  sets. Intrinsics and built-in functions are available
>   +     via <code>-mfxsr</code>, <code>-mxsave</code> and
>  <code>-mxsaveopt</code> respectively.
>   +     </li>
>         <li> New built-in functions to detect run-time CPU type and ISA:
>         <ul>
>           <li>A built-in function <code>__builtin_cpu_is</code> has
> been added to
>   ***************
>   *** 524,529 ****
>   --- 530,538 ----
>         <a href="http://gcc.gnu.org/wiki/FunctionMultiVersioning">wiki</a>
>   for more
>         information.
>         </li>
>   +     <li> The x86 backend has been improved to allow option
>  <code>-fscedule-insns</code> to work reliably.
>   +     This option can be used to schedule instructions better and leads to
>   +     improved performace in certain cases.
>   +     </li>
>         <li> Windows MinGW-w64 targets (<code>*-w64-mingw*</code>)
>   require at least r5437 from the Mingw-w64 trunk. </li>
>       </ul>

Re: [GCC 4.8 wwwdocs] PATCH: Mention several user-visible changes for x86

[Bernhard Reutner-Fischer]

On 18 February 2013 00:07:33 Gerald Pfeifer <gerald@pfeifer.com> wrote:
> On Fri, 15 Feb 2013, Igor Zamyatin wrote:
> > Is it ok for wwwdocs?
>
> Index: htdocs/gcc-4.8/changes.html
> ===================================================================

> +     <li> x86 backend was improved to allow option
> <code>-fscedule-insns</code> to work reliably.
>
> "The x86 backend has been improved..."

I really hope that there is no such option.


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