From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) by sourceware.org (Postfix) with ESMTPS id 765EC3858CDB for ; Tue, 19 Dec 2023 14:10:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 765EC3858CDB Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=suse.de Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=suse.de ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 765EC3858CDB Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=195.135.223.130 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702995003; cv=none; b=bXQdrJMPxB/dmvPeC86iu+yPF+MkX4nZpxnYeTZXUIZ+dRxTMOmVwXn9OP6saDdyiqRLFX62asupndiTgQmzvpdkP1Ga/fGg00SQ1IBPmLhcRufKb3SRLXWxnf7Pp0dytti57hbbZmirlB7vmOaXy/GoeT+BTpKsOGaYusAxagE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702995003; c=relaxed/simple; bh=/gk5RPACeoD4I68qPHSLfZxm1TBn6Ydh/t/bDuPG+LU=; h=DKIM-Signature:DKIM-Signature:DKIM-Signature:DKIM-Signature:Date: From:To:Subject:Message-ID:MIME-Version; b=biQ47CUofctplxVejqQMGCLSkahjmXEEoHUQweLof5z5GipZEmy9Bdwxv5qopvo0PIpOau0DUUABHbVOKoBOWifygk1xh3oDWT837L/2MGQxLthQpc3CXnUX3kHjc/M687/MwTLm9ubbnUQdg+g7iW7QhfW1C7QM73gQOAEo4/g= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from [10.168.4.150] (unknown [10.168.4.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id EC82E21EB7; Tue, 19 Dec 2023 14:09:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1702995000; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=gvgpnuBLH3aimiVnjBpKkWOp4le16xBgwi5L3oqBXOU=; b=kOsu9b79m3qFMpqDVE1OZsry3+Ld4Ea6LQnqZ/vcfxzHRAeT4he30rk5aBuJ4pup+6vKo6 ZLMlTogDT0kGVC43XmVsE8OscX3tqR/BekDI2OPDebTOC1IY5SYbC0Wh7vn3Csno05+6z3 k5u0o91jRptc+vmnrn0jbKnAXjQSgnk= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1702995000; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=gvgpnuBLH3aimiVnjBpKkWOp4le16xBgwi5L3oqBXOU=; b=0rhbYNNOLvmtwMyhPVHyFVdgO1Q/uON55heZVENOLPV2xwuU9KURSwN+bV1ZXiFtZrQfo+ 25kY1X+kNcauK3BQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1702995000; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=gvgpnuBLH3aimiVnjBpKkWOp4le16xBgwi5L3oqBXOU=; b=kOsu9b79m3qFMpqDVE1OZsry3+Ld4Ea6LQnqZ/vcfxzHRAeT4he30rk5aBuJ4pup+6vKo6 ZLMlTogDT0kGVC43XmVsE8OscX3tqR/BekDI2OPDebTOC1IY5SYbC0Wh7vn3Csno05+6z3 k5u0o91jRptc+vmnrn0jbKnAXjQSgnk= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1702995000; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=gvgpnuBLH3aimiVnjBpKkWOp4le16xBgwi5L3oqBXOU=; b=0rhbYNNOLvmtwMyhPVHyFVdgO1Q/uON55heZVENOLPV2xwuU9KURSwN+bV1ZXiFtZrQfo+ 25kY1X+kNcauK3BQ== Date: Tue, 19 Dec 2023 15:08:48 +0100 (CET) From: Richard Biener To: Tamar Christina cc: =?GB2312?B?1tO+09Xc?= , gcc-patches Subject: RE: RE: [PATCH] Regression FIX: Remove vect_variable_length XFAIL from some tests In-Reply-To: Message-ID: <13s555rs-4496-s27p-18rq-q231p200n9sn@fhfr.qr> References: <20231219111913.2568903-1-juzhe.zhong@rivai.ai>, <6BDF7544F723CAD9+2023121921014944837327@rivai.ai> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Spam-Level: Authentication-Results: smtp-out1.suse.de; none X-Spam-Level: X-Spam-Score: -4.25 X-Spamd-Result: default: False [-4.25 / 50.00]; ARC_NA(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_THREE(0.00)[3]; TO_MATCH_ENVRCPT_ALL(0.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; MIME_GOOD(-0.10)[text/plain]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; TO_DN_ALL(0.00)[]; NEURAL_HAM_SHORT(-0.15)[-0.767]; DBL_BLOCKED_OPENRESOLVER(0.00)[arm.com:email,suse.de:email,gnu.org:email]; FUZZY_BLOCKED(0.00)[rspamd.com]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; BAYES_HAM(-3.00)[100.00%] X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Tue, 19 Dec 2023, Tamar Christina wrote: > > Do you mean for ARM SVE, these tests need to be specified as only ARM SVE ? > > I think that would be the right thing to do. I think these tests are checking if we support VLA SLP. > changing it to a PASS unconditionally means that if someone runs the testsuite in SVE only mode they?ll fail. > > > The difference between RVV and ARM is that: variable-length and fixed-length vectors are both valid on RVV, using same RVV ISA. > > Wheras, for ARM, variable-length vectors use SVE ISA but fixed-length vectors use NEON ISA. > > Ah that makes sense why you want to remove the check. I guess whomever added the vect_variable_length indended > It to fail when VLA though. Perhaps these tests need a dg-add-options ? Since I think other tests already test fixed-length vectors. > > But lets see what Richi says. The testcases are all very different, it doesn't make sense to discuss them together. Richard. > Thanks, > Tamar > > > From: ??? > Sent: Tuesday, December 19, 2023 1:02 PM > To: Tamar Christina ; gcc-patches > Cc: rguenther > Subject: Re: RE: [PATCH] Regression FIX: Remove vect_variable_length XFAIL from some tests > > Do you mean for ARM SVE, these tests need to be specified as only ARM SVE ? > > Actually, for RVV, is same situation as ARM. We are using VLS modes (fixed-length vectors) to vectorize these cases so that they are XPASS. > > The difference between RVV and ARM is that: variable-length and fixed-length vectors are both valid on RVV, using same RVV ISA. > Wheras, for ARM, variable-length vectors use SVE ISA but fixed-length vectors use NEON ISA. > > > ________________________________ > juzhe.zhong@rivai.ai > > From: Tamar Christina > Date: 2023-12-19 20:29 > To: Juzhe-Zhong; gcc-patches@gcc.gnu.org > CC: rguenther@suse.de > Subject: RE: [PATCH] Regression FIX: Remove vect_variable_length XFAIL from some tests > Hi Juzhe, > > > -----Original Message----- > > From: Juzhe-Zhong > > > Sent: Tuesday, December 19, 2023 11:19 AM > > To: gcc-patches@gcc.gnu.org > > Cc: rguenther@suse.de; Tamar Christina >; Juzhe- > > Zhong > > > Subject: [PATCH] Regression FIX: Remove vect_variable_length XFAIL from some > > tests > > > > Hi, this patch fixes these following regression FAILs on RVV: > > > > XPASS: gcc.dg/tree-ssa/pr84512.c scan-tree-dump optimized "return 285;" > > XPASS: gcc.dg/vect/bb-slp-43.c -flto -ffat-lto-objects scan-tree-dump-not slp2 > > "vector operands from scalars" > > XPASS: gcc.dg/vect/bb-slp-43.c scan-tree-dump-not slp2 "vector operands from > > scalars" > > XPASS: gcc.dg/vect/bb-slp-subgroups-3.c -flto -ffat-lto-objects scan-tree-dump- > > times slp2 "optimized: basic block" 2 > > XPASS: gcc.dg/vect/bb-slp-subgroups-3.c scan-tree-dump-times slp2 "optimized: > > basic block" 2 > > > > Since vect_variable_length are available for ARM SVE and RVV, I just use compiler > > explorer to confirm ARM SVE same as > > RVV. > > > > Hi, @Tamar. Could you double check whether this patch fix is reasonable to you ? > > > > Hmm I would be surprised if this is working correctly for RVV since as far as I know we don't have > variable length support in SLP i.e. SLP can't predicate operation during build so the > current vectorizer only supports fixed length vector SLP, unless Richi did some magic? > > For SVE the reason this XPASS is because the compiler will fallback to NEON unless it's > told it can't. But that's not actually testing VLA SLP. > > i.e. https://godbolt.org/z/5n5fWahxh just using `+sve` isn't enough and it has to be told > it can only use SVE. Is it perhaps something similar for RVV? > > If RVV has a similar param, perhaps the correct fix is to append it to the tests so they > XFAIL correctly? > > Regards, > Tamar > > > And. > > > > Hi, @Richard. Is this patch Ok for trunk if this patch fixes regression for both RVV > > and ARM SVE. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.dg/tree-ssa/pr84512.c: Remove vect_variable_length XFAIL. > > * gcc.dg/vect/bb-slp-43.c: Ditto. > > * gcc.dg/vect/bb-slp-subgroups-3.c: Ditto. > > > > --- > > gcc/testsuite/gcc.dg/tree-ssa/pr84512.c | 2 +- > > gcc/testsuite/gcc.dg/vect/bb-slp-43.c | 2 +- > > gcc/testsuite/gcc.dg/vect/bb-slp-subgroups-3.c | 2 +- > > 3 files changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr84512.c b/gcc/testsuite/gcc.dg/tree- > > ssa/pr84512.c > > index 496c78b28dc..3c027012670 100644 > > --- a/gcc/testsuite/gcc.dg/tree-ssa/pr84512.c > > +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr84512.c > > @@ -13,4 +13,4 @@ int foo() > > } > > > > /* Listed targets xfailed due to PR84958. */ > > -/* { dg-final { scan-tree-dump "return 285;" "optimized" { xfail { amdgcn*-*-* || > > vect_variable_length } } } } */ > > +/* { dg-final { scan-tree-dump "return 285;" "optimized" { xfail { amdgcn*-*-* } } } > > } */ > > diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-43.c b/gcc/testsuite/gcc.dg/vect/bb- > > slp-43.c > > index dad2d24262d..40bd2e0dfbf 100644 > > --- a/gcc/testsuite/gcc.dg/vect/bb-slp-43.c > > +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-43.c > > @@ -14,4 +14,4 @@ f (int *restrict x, short *restrict y) > > } > > > > /* { dg-final { scan-tree-dump-not "mixed mask and nonmask" "slp2" } } */ > > -/* { dg-final { scan-tree-dump-not "vector operands from scalars" "slp2" { target { > > { vect_int && vect_bool_cmp } && { vect_unpack && vect_hw_misalign } } xfail { > > vect_variable_length && { ! vect256 } } } } } */ > > +/* { dg-final { scan-tree-dump-not "vector operands from scalars" "slp2" { target { > > { vect_int && vect_bool_cmp } && { vect_unpack && vect_hw_misalign } } } } } */ > > diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-subgroups-3.c > > b/gcc/testsuite/gcc.dg/vect/bb-slp-subgroups-3.c > > index fb719915db7..3f0d45ce4a1 100644 > > --- a/gcc/testsuite/gcc.dg/vect/bb-slp-subgroups-3.c > > +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-subgroups-3.c > > @@ -42,7 +42,7 @@ main (int argc, char **argv) > > /* Because we disable the cost model, targets with variable-length > > vectors can end up vectorizing the store to a[0..7] on its own. > > With the cost model we do something sensible. */ > > -/* { dg-final { scan-tree-dump-times "optimized: basic block" 2 "slp2" { target { ! > > amdgcn-*-* } xfail vect_variable_length } } } */ > > +/* { dg-final { scan-tree-dump-times "optimized: basic block" 2 "slp2" { target { ! > > amdgcn-*-* } } } } */ > > > > /* amdgcn can do this in one vector. */ > > /* { dg-final { scan-tree-dump-times "optimized: basic block" 1 "slp2" { target > > amdgcn-*-* } } } */ > > -- > > 2.36.3 > > > -- Richard Biener SUSE Software Solutions Germany GmbH, Frankenstrasse 146, 90461 Nuernberg, Germany; GF: Ivo Totev, Andrew McDonald, Werner Knoblich; (HRB 36809, AG Nuernberg)