From: Christophe Lyon <christophe.lyon@linaro.org>
To: gcc-patches@gcc.gnu.org
Subject: [Patch ARM-AArch64/testsuite v2 10/21] Add vabdl tests.
Date: Tue, 01 Jul 2014 10:07:00 -0000 [thread overview]
Message-ID: <1404209174-25364-11-git-send-email-christophe.lyon@linaro.org> (raw)
In-Reply-To: <1404209174-25364-1-git-send-email-christophe.lyon@linaro.org>
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e88287b..5509d41 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,9 @@
2014-06-30 Christophe Lyon <christophe.lyon@linaro.org>
+ * gcc.target/aarch64/neon-intrinsics/vabdl.c: New file.
+
+2014-06-30 Christophe Lyon <christophe.lyon@linaro.org>
+
* gcc.target/aarch64/neon-intrinsics/vabd.c: New file.
2014-06-30 Christophe Lyon <christophe.lyon@linaro.org>
diff --git a/gcc/testsuite/gcc.target/aarch64/neon-intrinsics/vabdl.c b/gcc/testsuite/gcc.target/aarch64/neon-intrinsics/vabdl.c
new file mode 100644
index 0000000..28018ab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/neon-intrinsics/vabdl.c
@@ -0,0 +1,109 @@
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+/* Expected results. */
+VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33 };
+VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33 };
+VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33 };
+VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33 };
+VECT_VAR_DECL(expected,int,16,8) [] = { 0x11, 0x10, 0xf, 0xe,
+ 0xd, 0xc, 0xb, 0xa };
+VECT_VAR_DECL(expected,int,32,4) [] = { 0x3, 0x2, 0x1, 0x0 };
+VECT_VAR_DECL(expected,int,64,2) [] = { 0x18, 0x17 };
+VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33 };
+VECT_VAR_DECL(expected,uint,16,8) [] = { 0xef, 0xf0, 0xf1, 0xf2,
+ 0xf3, 0xf4, 0xf5, 0xf6 };
+VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffe3, 0xffe4, 0xffe5, 0xffe6 };
+VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffe8,
+ 0xffffffe9 };
+VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33,
+ 0x33, 0x33, 0x33, 0x33 };
+VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+ 0x3333, 0x3333, 0x3333, 0x3333 };
+VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+ 0x33333333, 0x33333333 };
+
+#define TEST_MSG "VABDL"
+void exec_vabdl (void)
+{
+ /* Basic test: v4=vabdl(v1,v2), then store the result. */
+#define TEST_VABDL(T1, T2, W, W2, N) \
+ VECT_VAR(vector_res, T1, W2, N) = \
+ vabdl_##T2##W(VECT_VAR(vector1, T1, W, N), \
+ VECT_VAR(vector2, T1, W, N)); \
+ vst1q_##T2##W2(VECT_VAR(result, T1, W2, N), VECT_VAR(vector_res, T1, W2, N))
+
+#define DECL_VABDL_VAR_LONG(VAR) \
+ DECL_VARIABLE(VAR, int, 16, 8); \
+ DECL_VARIABLE(VAR, int, 32, 4); \
+ DECL_VARIABLE(VAR, int, 64, 2); \
+ DECL_VARIABLE(VAR, uint, 16, 8); \
+ DECL_VARIABLE(VAR, uint, 32, 4); \
+ DECL_VARIABLE(VAR, uint, 64, 2)
+
+#define DECL_VABDL_VAR_SHORT(VAR) \
+ DECL_VARIABLE(VAR, int, 8, 8); \
+ DECL_VARIABLE(VAR, int, 16, 4); \
+ DECL_VARIABLE(VAR, int, 32, 2); \
+ DECL_VARIABLE(VAR, uint, 8, 8); \
+ DECL_VARIABLE(VAR, uint, 16, 4); \
+ DECL_VARIABLE(VAR, uint, 32, 2)
+
+ DECL_VABDL_VAR_SHORT(vector1);
+ DECL_VABDL_VAR_SHORT(vector2);
+ DECL_VABDL_VAR_LONG(vector_res);
+
+ clean_results ();
+
+ /* Initialize input "vector1" from "buffer". */
+ VLOAD(vector1, buffer, , int, s, 8, 8);
+ VLOAD(vector1, buffer, , int, s, 16, 4);
+ VLOAD(vector1, buffer, , int, s, 32, 2);
+ VLOAD(vector1, buffer, , uint, u, 8, 8);
+ VLOAD(vector1, buffer, , uint, u, 16, 4);
+ VLOAD(vector1, buffer, , uint, u, 32, 2);
+
+ /* Choose init value arbitrarily. */
+ VDUP(vector2, , int, s, 8, 8, 1);
+ VDUP(vector2, , int, s, 16, 4, -13);
+ VDUP(vector2, , int, s, 32, 2, 8);
+ VDUP(vector2, , uint, u, 8, 8, 1);
+ VDUP(vector2, , uint, u, 16, 4, 13);
+ VDUP(vector2, , uint, u, 32, 2, 8);
+
+ /* Execute the tests. */
+ TEST_VABDL(int, s, 8, 16, 8);
+ TEST_VABDL(int, s, 16, 32, 4);
+ TEST_VABDL(int, s, 32, 64, 2);
+ TEST_VABDL(uint, u, 8, 16, 8);
+ TEST_VABDL(uint, u, 16, 32, 4);
+ TEST_VABDL(uint, u, 32, 64, 2);
+
+ CHECK_RESULTS (TEST_MSG, "");
+}
+
+int main (void)
+{
+ exec_vabdl ();
+ return 0;
+}
--
1.8.3.2
next prev parent reply other threads:[~2014-07-01 10:07 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-01 10:07 [Patch ARM-AArch64/testsuite v2 00/21] Neon intrinsics executable tests Christophe Lyon
2014-07-01 10:07 ` Christophe Lyon [this message]
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 03/21] Add binary operators: vadd, vand, vbic, veor, vorn, vorr, vsub Christophe Lyon
2014-07-03 11:08 ` Ramana Radhakrishnan
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 17/21] Add vld1_dup tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 07/21] Add binary saturating operators: vqadd, vqsub Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 09/21] Add vabd tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 02/21] Add unary operators: vabs and vneg Christophe Lyon
2014-07-03 11:07 ` Ramana Radhakrishnan
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 08/21] Add vabal tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 05/21] Add comparison operators with floating-point operands: vcage, vcagt, vcale and cvalt Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 15/21] Add vclz tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 20/21] Add vmul tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 04/21] Add comparison operators: vceq, vcge, vcgt, vcle and vclt Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 14/21] Add vbsl tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 21/21] Add vuzp and vzip tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 12/21] Add vaddl tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 19/21] Add vld2_lane, vld3_lane and vld4_lane Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 13/21] Add vaddw tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 06/21] Add unary saturating operators: vqabs and vqneg Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 16/21] Add vdup and vmov tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 11/21] Add vaddhn tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 18/21] Add vld2/vld3/vld4 tests Christophe Lyon
2014-07-01 10:07 ` [Patch ARM-AArch64/testsuite v2 01/21] Neon intrinsics execution tests initial framework Christophe Lyon
2014-07-03 11:06 ` Ramana Radhakrishnan
2014-07-03 21:04 ` Christophe Lyon
2014-07-10 10:12 ` Marcus Shawcroft
2014-07-11 10:41 ` Richard Earnshaw
2014-09-30 14:27 ` Christophe Lyon
2014-10-01 15:11 ` Marcus Shawcroft
2014-10-07 13:33 ` Christophe Lyon
2014-10-08 12:16 ` Ramana Radhakrishnan
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