From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13196 invoked by alias); 6 Aug 2014 17:21:55 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 10472 invoked by uid 89); 6 Aug 2014 17:21:30 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Wed, 06 Aug 2014 17:21:26 +0000 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s76HKqfI008696 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 6 Aug 2014 13:20:53 -0400 Received: from c64.redhat.com (vpn-239-139.phx2.redhat.com [10.3.239.139]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s76HJ2qj030913; Wed, 6 Aug 2014 13:20:52 -0400 From: David Malcolm To: gcc-patches@gcc.gnu.org Cc: David Malcolm Subject: [PATCH 189/236] Various scheduling strengthenings Date: Wed, 06 Aug 2014 17:21:00 -0000 Message-Id: <1407345815-14551-190-git-send-email-dmalcolm@redhat.com> In-Reply-To: <1407345815-14551-1-git-send-email-dmalcolm@redhat.com> References: <1407345815-14551-1-git-send-email-dmalcolm@redhat.com> X-IsSubscribed: yes X-SW-Source: 2014-08/txt/msg00560.txt.bz2 gcc/ * insn-addr.h (insn_addresses_new): Strengthen param "insn" from rtx to rtx_insn *. * sched-int.h (sched_init_insn_luid): Likewise for param 1. (struct reg_use_data): Likewise for field "insn". (insn_cost): Likewise for param. (real_insn_for_shadow): Likewise for return type and param. (increase_insn_priority): Likewise for param 1. (debug_dependencies): Likewise for both params. * haifa-sched.c (insn_delay): Likewise for param "insn". (real_insn_for_shadow): Likewise for return type and param "insn". (update_insn_after_change): Likewise for param "insn". (recompute_todo_spec): Likewise for param "next" and locals "pro", "other". (insn_cost): Likewise for param "insn". (increase_insn_priority): Likewise. (calculate_reg_deaths): Likewise. (setup_insn_reg_pressure_info): Likewise. (model_schedule): Strengthen from vec to vec. (model_index): Strengthen param "insn" from rtx to rtx_insn *. (model_recompute): Likewise. (must_restore_pattern_p): Likewise for param "next". (model_excess_cost): Likewise for param "insn". (queue_remove): Likewise. (adjust_priority): Likewise for param "prev". (update_register_pressure): Likewise for param "insn". (setup_insn_max_reg_pressure): Likewise for local "insn". (update_reg_and_insn_max_reg_pressure): Likewise for param "insn". (model_add_to_schedule): Likewise. (model_reset_queue_indices): Likewise for local "insn". (unschedule_insns_until): Strengthen local "recompute_vec" from auto_vec to auto_vec. Strengthen locals "last", "con" from rtx to rtx_insn *. (restore_last_backtrack_point): Likewise for both locals "x". Add checked casts. (estimate_insn_tick): Likewise for param "insn". (commit_schedule): Likewise for params "prev_head", "tail" and local "x". (verify_shadows): Likewise for locals "i1", "i2". (dump_insn_stream): Likewise for params "head", "tail" and locals "next_tail", "insn". (schedule_block): Likewise for locals "insn", "x". Add a checked cast. (fix_inter_tick): Likewise for params "head", "tail". (create_check_block_twin): Likewise for local "jump". (haifa_change_pattern): Likewise for param "insn". (haifa_speculate_insn): Likewise. (dump_new_block_header): Likewise for params "head", "tail". (fix_jump_move): Likewise for param "jump". (move_block_after_check): Likewise. (sched_init_insn_luid): Likewise for param "insn". (sched_init_luids): Likewise for local "insn". (insn_luid): Likewise for param "insn". (init_h_i_d): Likewise. (haifa_init_h_i_d): Likewise for local "insn". (haifa_init_insn): Likewise for param "insn". * sched-deps.c (add_dependence): Likewise for local "real_pro", "other". (create_insn_reg_use): Likewise for param "insn". (setup_insn_reg_uses): Likewise. Add a checked cast. * sched-ebb.c (debug_ebb_dependencies): Strengthen params "head", "tail" from rtx to rtx_insn *. * sched-rgn.c (void debug_dependencies): Likewise, also for locals "insn", "next_tail". --- gcc/haifa-sched.c | 129 +++++++++++++++++++++++++++--------------------------- gcc/insn-addr.h | 2 +- gcc/sched-deps.c | 10 ++--- gcc/sched-ebb.c | 4 +- gcc/sched-int.h | 12 ++--- gcc/sched-rgn.c | 6 +-- 6 files changed, 82 insertions(+), 81 deletions(-) diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c index 72ed6a1..844124d 100644 --- a/gcc/haifa-sched.c +++ b/gcc/haifa-sched.c @@ -419,7 +419,7 @@ basic_block (* sched_create_empty_bb) (basic_block); /* Return the number of cycles until INSN is expected to be ready. Return zero if it already is. */ static int -insn_delay (rtx insn) +insn_delay (rtx_insn *insn) { return MAX (INSN_TICK (insn) - clock_var, 0); } @@ -750,17 +750,17 @@ record_delay_slot_pair (rtx_insn *i1, rtx_insn *i2, int cycles, int stages) /* Examine the delay pair hashtable to see if INSN is a shadow for another, and return the other insn if so. Return NULL otherwise. */ -rtx -real_insn_for_shadow (rtx insn) +rtx_insn * +real_insn_for_shadow (rtx_insn *insn) { struct delay_pair *pair; if (!delay_htab.is_created ()) - return NULL_RTX; + return NULL; pair = delay_htab_i2.find_with_hash (insn, htab_hash_pointer (insn)); if (!pair || pair->stages > 0) - return NULL_RTX; + return NULL; return pair->i1; } @@ -831,7 +831,7 @@ static int rank_for_schedule (const void *, const void *); static void swap_sort (rtx_insn **, int); static void queue_insn (rtx_insn *, int, const char *); static int schedule_insn (rtx_insn *); -static void adjust_priority (rtx); +static void adjust_priority (rtx_insn *); static void advance_one_cycle (void); static void extend_h_i_d (void); @@ -864,7 +864,7 @@ static int early_queue_to_ready (state_t, struct ready_list *); static rtx_insn *ready_remove (struct ready_list *, int); static void ready_remove_insn (rtx); -static void fix_inter_tick (rtx, rtx); +static void fix_inter_tick (rtx_insn *, rtx_insn *); static int fix_tick_ready (rtx_insn *); static void change_queue_index (rtx_insn *, int); @@ -872,8 +872,8 @@ static void change_queue_index (rtx_insn *, int); speculative instructions. */ static void extend_h_i_d (void); -static void init_h_i_d (rtx); -static int haifa_speculate_insn (rtx, ds_t, rtx *); +static void init_h_i_d (rtx_insn *); +static int haifa_speculate_insn (rtx_insn *, ds_t, rtx *); static void generate_recovery_code (rtx_insn *); static void process_insn_forw_deps_be_in_spec (rtx, rtx_insn *, ds_t); static void begin_speculative_block (rtx_insn *); @@ -881,11 +881,11 @@ static void add_to_speculative_block (rtx_insn *); static void init_before_recovery (basic_block *); static void create_check_block_twin (rtx_insn *, bool); static void fix_recovery_deps (basic_block); -static bool haifa_change_pattern (rtx, rtx); -static void dump_new_block_header (int, basic_block, rtx, rtx); +static bool haifa_change_pattern (rtx_insn *, rtx); +static void dump_new_block_header (int, basic_block, rtx_insn *, rtx_insn *); static void restore_bb_notes (basic_block); -static void fix_jump_move (rtx); -static void move_block_after_check (rtx); +static void fix_jump_move (rtx_insn *); +static void move_block_after_check (rtx_insn *); static void move_succs (vec **, basic_block); static void sched_remove_insn (rtx_insn *); static void clear_priorities (rtx_insn *, rtx_vec_t *); @@ -1144,7 +1144,7 @@ cond_clobbered_p (rtx_insn *insn, HARD_REG_SET set_regs) /* This function should be called after modifying the pattern of INSN, to update scheduler data structures as needed. */ static void -update_insn_after_change (rtx insn) +update_insn_after_change (rtx_insn *insn) { sd_iterator_def sd_it; dep_t dep; @@ -1184,7 +1184,7 @@ static void restore_pattern (dep_t, bool); false. */ static ds_t -recompute_todo_spec (rtx next, bool for_backtrack) +recompute_todo_spec (rtx_insn *next, bool for_backtrack) { ds_t new_ds; sd_iterator_def sd_it; @@ -1268,7 +1268,8 @@ recompute_todo_spec (rtx next, bool for_backtrack) else if (n_control == 1 && n_replace == 0 && n_spec == 0) { - rtx pro, other, new_pat; + rtx_insn *pro, *other; + rtx new_pat; rtx cond = NULL_RTX; bool success; rtx_insn *prev = NULL; @@ -1365,7 +1366,7 @@ static rtx_insn *nonscheduled_insns_begin; This is the number of cycles between instruction issue and instruction results. */ int -insn_cost (rtx insn) +insn_cost (rtx_insn *insn) { int cost; @@ -1509,7 +1510,7 @@ dep_cost (dep_t link) /* Use this sel-sched.c friendly function in reorder2 instead of increasing INSN_PRIORITY explicitly. */ void -increase_insn_priority (rtx insn, int amount) +increase_insn_priority (rtx_insn *insn, int amount) { if (!sel_sched_p ()) { @@ -1694,7 +1695,7 @@ while (0) in that class that die in INSN. */ static void -calculate_reg_deaths (rtx insn, int *death) +calculate_reg_deaths (rtx_insn *insn, int *death) { int i; struct reg_use_data *use; @@ -1709,7 +1710,7 @@ calculate_reg_deaths (rtx insn, int *death) /* Setup info about the current register pressure impact of scheduling INSN at the current scheduling point. */ static void -setup_insn_reg_pressure_info (rtx insn) +setup_insn_reg_pressure_info (rtx_insn *insn) { int i, change, before, after, hard_regno; int excess_cost_change; @@ -1883,7 +1884,7 @@ struct model_pressure_group { /* Index POINT gives the instruction at point POINT of the model schedule. This array doesn't change during main scheduling. */ -static vec model_schedule; +static vec model_schedule; /* The list of instructions in the model worklist, sorted in order of decreasing priority. */ @@ -1934,7 +1935,7 @@ static unsigned int model_next_priority; doesn't belong to that schedule. */ static int -model_index (rtx insn) +model_index (rtx_insn *insn) { if (INSN_MODEL_INDEX (insn) == 0) return model_num_insns; @@ -2103,7 +2104,7 @@ model_update_pressure (struct model_pressure_group *group, /* INSN has just been scheduled. Update the model schedule accordingly. */ static void -model_recompute (rtx insn) +model_recompute (rtx_insn *insn) { struct { int last_use; @@ -2236,7 +2237,7 @@ model_recompute (rtx insn) /* After DEP, which was cancelled, has been resolved for insn NEXT, check whether the insn's pattern needs restoring. */ static bool -must_restore_pattern_p (rtx next, dep_t dep) +must_restore_pattern_p (rtx_insn *next, dep_t dep) { if (QUEUE_INDEX (next) == QUEUE_SCHEDULED) return false; @@ -2412,7 +2413,7 @@ model_excess_group_cost (struct model_pressure_group *group, if PRINT_P. */ static int -model_excess_cost (rtx insn, bool print_p) +model_excess_cost (rtx_insn *insn, bool print_p) { int point, pci, cl, cost, this_cost, delta; struct reg_pressure_data *insn_reg_pressure; @@ -2763,7 +2764,7 @@ queue_insn (rtx_insn *insn, int n_cycles, const char *reason) /* Remove INSN from queue. */ static void -queue_remove (rtx insn) +queue_remove (rtx_insn *insn) { gcc_assert (QUEUE_INDEX (insn) >= 0); remove_free_INSN_LIST_elem (insn, &insn_queue[QUEUE_INDEX (insn)]); @@ -2929,7 +2930,7 @@ ready_sort (struct ready_list *ready) provide a hook for the target to tweak itself. */ HAIFA_INLINE static void -adjust_priority (rtx prev) +adjust_priority (rtx_insn *prev) { /* ??? There used to be code here to try and estimate how an insn affected register lifetimes, but it did it by looking at REG_DEAD @@ -2975,7 +2976,7 @@ advance_one_cycle (void) /* Update register pressure after scheduling INSN. */ static void -update_register_pressure (rtx insn) +update_register_pressure (rtx_insn *insn) { struct reg_use_data *use; struct reg_set_data *set; @@ -2999,7 +3000,7 @@ setup_insn_max_reg_pressure (rtx after, bool update_p) { int i, p; bool eq_p; - rtx insn; + rtx_insn *insn; static int max_reg_pressure[N_REG_CLASSES]; save_reg_pressure (); @@ -3039,7 +3040,7 @@ setup_insn_max_reg_pressure (rtx after, bool update_p) also max register pressure for unscheduled insns of the current BB. */ static void -update_reg_and_insn_max_reg_pressure (rtx insn) +update_reg_and_insn_max_reg_pressure (rtx_insn *insn) { int i; int before[N_REG_CLASSES]; @@ -3280,7 +3281,7 @@ model_promote_insn (struct model_insn_info *insn) /* Add INSN to the end of the model schedule. */ static void -model_add_to_schedule (rtx insn) +model_add_to_schedule (rtx_insn *insn) { unsigned int point; @@ -3640,7 +3641,7 @@ static void model_reset_queue_indices (void) { unsigned int i; - rtx insn; + rtx_insn *insn; FOR_EACH_VEC_ELT (model_schedule, i, insn) QUEUE_INDEX (insn) = MODEL_INSN_INFO (insn)->old_queue; @@ -4227,13 +4228,13 @@ undo_replacements_for_backtrack (struct haifa_saved_data *save) static void unschedule_insns_until (rtx insn) { - auto_vec recompute_vec; + auto_vec recompute_vec; /* Make two passes over the insns to be unscheduled. First, we clear out dependencies and other trivial bookkeeping. */ for (;;) { - rtx last; + rtx_insn *last; sd_iterator_def sd_it; dep_t dep; @@ -4271,7 +4272,7 @@ unschedule_insns_until (rtx insn) up-to-date. */ while (!recompute_vec.is_empty ()) { - rtx con; + rtx_insn *con; con = recompute_vec.pop (); MUST_RECOMPUTE_SPEC_P (con) = 0; @@ -4332,7 +4333,7 @@ restore_last_backtrack_point (struct sched_block_state *psched_block) for (link = insn_queue[q]; link; link = XEXP (link, 1)) { - rtx x = XEXP (link, 0); + rtx_insn *x = as_a (XEXP (link, 0)); QUEUE_INDEX (x) = QUEUE_NOWHERE; INSN_TICK (x) = INVALID_TICK; } @@ -4364,7 +4365,7 @@ restore_last_backtrack_point (struct sched_block_state *psched_block) for (link = insn_queue[q]; link; link = XEXP (link, 1)) { - rtx x = XEXP (link, 0); + rtx_insn *x = as_a (XEXP (link, 0)); QUEUE_INDEX (x) = i; TODO_SPEC (x) = recompute_todo_spec (x, true); INSN_TICK (x) = save->clock_var + i; @@ -4573,7 +4574,7 @@ perform_replacements_new_cycle (void) reduced on recursive calls. Return true if we produced a good estimate, or false if we exceeded the budget. */ static bool -estimate_insn_tick (bitmap processed, rtx insn, int budget) +estimate_insn_tick (bitmap processed, rtx_insn *insn, int budget) { sd_iterator_def sd_it; dep_t dep; @@ -5657,7 +5658,7 @@ choose_ready (struct ready_list *ready, bool first_cycle_insn_p, block. TARGET_BB is the argument passed to schedule_block. */ static void -commit_schedule (rtx_insn *prev_head, rtx tail, basic_block *target_bb) +commit_schedule (rtx_insn *prev_head, rtx_insn *tail, basic_block *target_bb) { unsigned int i; rtx_insn *insn; @@ -5674,7 +5675,7 @@ commit_schedule (rtx_insn *prev_head, rtx tail, basic_block *target_bb) if (sched_verbose) { - rtx x; + rtx_insn *x; x = next_real_insn (last_scheduled_insn); gcc_assert (x); @@ -5833,11 +5834,11 @@ verify_shadows (void) { int t; struct delay_pair *pair = save->delay_pair; - rtx i1 = pair->i1; + rtx_insn *i1 = pair->i1; for (; pair; pair = pair->next_same_i1) { - rtx i2 = pair->i2; + rtx_insn *i2 = pair->i2; if (QUEUE_INDEX (i2) == QUEUE_SCHEDULED) continue; @@ -5879,12 +5880,12 @@ verify_shadows (void) /* Print instructions together with useful scheduling information between HEAD and TAIL (inclusive). */ static void -dump_insn_stream (rtx head, rtx tail) +dump_insn_stream (rtx_insn *head, rtx_insn *tail) { fprintf (sched_dump, ";;\t| insn | prio |\n"); - rtx next_tail = NEXT_INSN (tail); - for (rtx insn = head; insn != next_tail; insn = NEXT_INSN (insn)) + rtx_insn *next_tail = NEXT_INSN (tail); + for (rtx_insn *insn = head; insn != next_tail; insn = NEXT_INSN (insn)) { int priority = NOTE_P (insn) ? 0 : INSN_PRIORITY (insn); const char *pattern = (NOTE_P (insn) @@ -6361,7 +6362,7 @@ schedule_block (basic_block *target_bb, state_t init_state) if (!must_backtrack) for (i = 0; i < ready.n_ready; i++) { - rtx insn = ready_element (&ready, i); + rtx_insn *insn = ready_element (&ready, i); if (INSN_EXACT_TICK (insn) == clock_var) { must_backtrack = true; @@ -6424,7 +6425,7 @@ schedule_block (basic_block *target_bb, state_t init_state) restart_debug_insn_loop: for (i = ready.n_ready - 1; i >= 0; i--) { - rtx x; + rtx_insn *x; x = ready_element (&ready, i); if (DEPS_LIST_FIRST (INSN_HARD_BACK_DEPS (x)) != NULL @@ -6474,7 +6475,7 @@ schedule_block (basic_block *target_bb, state_t init_state) /* We must maintain QUEUE_INDEX between blocks in region. */ for (i = ready.n_ready - 1; i >= 0; i--) { - rtx x; + rtx_insn *x; x = ready_element (&ready, i); QUEUE_INDEX (x) = QUEUE_NOWHERE; @@ -6487,9 +6488,9 @@ schedule_block (basic_block *target_bb, state_t init_state) rtx link; for (link = insn_queue[i]; link; link = XEXP (link, 1)) { - rtx x; + rtx_insn *x; - x = XEXP (link, 0); + x = as_a (XEXP (link, 0)); QUEUE_INDEX (x) = QUEUE_NOWHERE; TODO_SPEC (x) = HARD_DEP; } @@ -6885,7 +6886,7 @@ free_delay_pairs (void) INSN_TICKs of their dependents. HEAD and TAIL are the begin and the end of the current scheduled block. */ static void -fix_inter_tick (rtx head, rtx tail) +fix_inter_tick (rtx_insn *head, rtx_insn *tail) { /* Set of instructions with corrected INSN_TICK. */ bitmap_head processed; @@ -7352,7 +7353,7 @@ begin_speculative_block (rtx_insn *insn) TODO_SPEC (insn) &= ~BEGIN_SPEC; } -static void haifa_init_insn (rtx); +static void haifa_init_insn (rtx_insn *); /* Generates recovery code for BE_IN speculative INSN. */ static void @@ -7838,7 +7839,7 @@ create_check_block_twin (rtx_insn *insn, bool mutate_p) /* In case of branchy check, fix CFG. */ { basic_block first_bb, second_bb; - rtx jump; + rtx_insn *jump; first_bb = BLOCK_FOR_INSN (check); second_bb = sched_split_block (first_bb, check); @@ -8066,7 +8067,7 @@ fix_recovery_deps (basic_block rec) /* Change pattern of INSN to NEW_PAT. Invalidate cached haifa instruction data. */ static bool -haifa_change_pattern (rtx insn, rtx new_pat) +haifa_change_pattern (rtx_insn *insn, rtx new_pat) { int t; @@ -8100,7 +8101,7 @@ sched_speculate_insn (rtx insn, ds_t request, rtx *new_pat) } static int -haifa_speculate_insn (rtx insn, ds_t request, rtx *new_pat) +haifa_speculate_insn (rtx_insn *insn, ds_t request, rtx *new_pat) { gcc_assert (sched_deps_info->generate_spec_deps && !IS_SPECULATION_CHECK_P (insn)); @@ -8116,7 +8117,7 @@ haifa_speculate_insn (rtx insn, ds_t request, rtx *new_pat) ends with TAIL, before scheduling it. I is zero, if scheduler is about to start with the fresh ebb. */ static void -dump_new_block_header (int i, basic_block bb, rtx head, rtx tail) +dump_new_block_header (int i, basic_block bb, rtx_insn *head, rtx_insn *tail) { if (!i) fprintf (sched_dump, @@ -8227,7 +8228,7 @@ restore_bb_notes (basic_block first) Fix CFG after both in- and inter-block movement of control_flow_insn_p JUMP. */ static void -fix_jump_move (rtx jump) +fix_jump_move (rtx_insn *jump) { basic_block bb, jump_bb, jump_bb_next; @@ -8258,7 +8259,7 @@ fix_jump_move (rtx jump) /* Fix CFG after interblock movement of control_flow_insn_p JUMP. */ static void -move_block_after_check (rtx jump) +move_block_after_check (rtx_insn *jump) { basic_block bb, jump_bb, jump_bb_next; vec *t; @@ -8400,7 +8401,7 @@ sched_extend_luids (void) /* Initialize LUID for INSN. */ void -sched_init_insn_luid (rtx insn) +sched_init_insn_luid (rtx_insn *insn) { int i = INSN_P (insn) ? 1 : common_sched_info->luid_for_non_insn (insn); int luid; @@ -8428,7 +8429,7 @@ sched_init_luids (bb_vec_t bbs) sched_extend_luids (); FOR_EACH_VEC_ELT (bbs, i, bb) { - rtx insn; + rtx_insn *insn; FOR_BB_INSNS (bb, insn) sched_init_insn_luid (insn); @@ -8445,7 +8446,7 @@ sched_finish_luids (void) /* Return logical uid of INSN. Helpful while debugging. */ int -insn_luid (rtx insn) +insn_luid (rtx_insn *insn) { return INSN_LUID (insn); } @@ -8475,7 +8476,7 @@ extend_h_i_d (void) /* Initialize h_i_d entry of the INSN with default values. Values, that are not explicitly initialized here, hold zero. */ static void -init_h_i_d (rtx insn) +init_h_i_d (rtx_insn *insn) { if (INSN_LUID (insn) > 0) { @@ -8498,7 +8499,7 @@ haifa_init_h_i_d (bb_vec_t bbs) extend_h_i_d (); FOR_EACH_VEC_ELT (bbs, i, bb) { - rtx insn; + rtx_insn *insn; FOR_BB_INSNS (bb, insn) init_h_i_d (insn); @@ -8528,7 +8529,7 @@ haifa_finish_h_i_d (void) /* Init data for the new insn INSN. */ static void -haifa_init_insn (rtx insn) +haifa_init_insn (rtx_insn *insn) { gcc_assert (insn != NULL); diff --git a/gcc/insn-addr.h b/gcc/insn-addr.h index aec09fd..e255ac4 100644 --- a/gcc/insn-addr.h +++ b/gcc/insn-addr.h @@ -38,7 +38,7 @@ extern int insn_current_address; #define INSN_ADDRESSES_SIZE() (insn_addresses_.length ()) static inline void -insn_addresses_new (rtx insn, int insn_addr) +insn_addresses_new (rtx_insn *insn, int insn_addr) { unsigned insn_uid = INSN_UID ((insn)); diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c index 8e77fc8..0ebca10 100644 --- a/gcc/sched-deps.c +++ b/gcc/sched-deps.c @@ -1524,8 +1524,8 @@ add_dependence (rtx_insn *con, rtx_insn *pro, enum reg_note dep_type) condition. */ if (dep_type == REG_DEP_CONTROL) { - rtx real_pro = pro; - rtx other = real_insn_for_shadow (real_pro); + rtx_insn *real_pro = pro; + rtx_insn *other = real_insn_for_shadow (real_pro); rtx cond; if (other != NULL_RTX) @@ -1926,7 +1926,7 @@ ds_to_dt (ds_t ds) /* Allocate and return reg_use_data structure for REGNO and INSN. */ static struct reg_use_data * -create_insn_reg_use (int regno, rtx insn) +create_insn_reg_use (int regno, rtx_insn *insn) { struct reg_use_data *use; @@ -1953,7 +1953,7 @@ create_insn_reg_set (int regno, rtx insn) /* Set up insn register uses for INSN and dependency context DEPS. */ static void -setup_insn_reg_uses (struct deps_desc *deps, rtx insn) +setup_insn_reg_uses (struct deps_desc *deps, rtx_insn *insn) { unsigned i; reg_set_iterator rsi; @@ -1980,7 +1980,7 @@ setup_insn_reg_uses (struct deps_desc *deps, rtx insn) /* Create the cycle list of uses. */ for (list = reg_last->uses; list; list = XEXP (list, 1)) { - use2 = create_insn_reg_use (i, XEXP (list, 0)); + use2 = create_insn_reg_use (i, as_a (XEXP (list, 0))); next = use->next_regno_use; use->next_regno_use = use2; use2->next_regno_use = next; diff --git a/gcc/sched-ebb.c b/gcc/sched-ebb.c index 621fddb..f502668 100644 --- a/gcc/sched-ebb.c +++ b/gcc/sched-ebb.c @@ -62,7 +62,7 @@ static int rank (rtx_insn *, rtx_insn *); static int ebb_contributes_to_priority (rtx_insn *, rtx_insn *); static basic_block earliest_block_with_similiar_load (basic_block, rtx); static void add_deps_for_risky_insns (rtx_insn *, rtx_insn *); -static void debug_ebb_dependencies (rtx, rtx); +static void debug_ebb_dependencies (rtx_insn *, rtx_insn *); static void ebb_add_remove_insn (rtx_insn *, int); static void ebb_add_block (basic_block, basic_block); @@ -98,7 +98,7 @@ schedule_more_p (void) /* Print dependency information about ebb between HEAD and TAIL. */ static void -debug_ebb_dependencies (rtx head, rtx tail) +debug_ebb_dependencies (rtx_insn *head, rtx_insn *tail) { fprintf (sched_dump, ";; --------------- forward dependences: ------------ \n"); diff --git a/gcc/sched-int.h b/gcc/sched-int.h index e7d93ffd..a3e9e46 100644 --- a/gcc/sched-int.h +++ b/gcc/sched-int.h @@ -47,7 +47,7 @@ typedef vec rtx_vec_t; extern void sched_init_bbs (void); extern void sched_extend_luids (void); -extern void sched_init_insn_luid (rtx); +extern void sched_init_insn_luid (rtx_insn *); extern void sched_init_luids (bb_vec_t); extern void sched_finish_luids (void); @@ -774,7 +774,7 @@ struct reg_use_data /* Regno used in the insn. */ int regno; /* Insn using the regno. */ - rtx insn; + rtx_insn *insn; /* Cyclic list of elements with the same regno. */ struct reg_use_data *next_regno_use; /* List of elements with the same insn. */ @@ -1344,7 +1344,7 @@ extern void get_ebb_head_tail (basic_block, basic_block, rtx_insn **, rtx_insn **); extern int no_real_insns_p (const_rtx, const_rtx); -extern int insn_cost (rtx); +extern int insn_cost (rtx_insn *); extern int dep_cost_1 (dep_t, dw_t); extern int dep_cost (dep_t); extern int set_priorities (rtx_insn *, rtx_insn *); @@ -1430,7 +1430,7 @@ extern bool sched_no_dce; extern void set_modulo_params (int, int, int, int); extern void record_delay_slot_pair (rtx_insn *, rtx_insn *, int, int); -extern rtx real_insn_for_shadow (rtx); +extern rtx_insn *real_insn_for_shadow (rtx_insn *); extern void discard_delay_pairs_above (int); extern void free_delay_pairs (void); extern void add_delay_dependencies (rtx_insn *); @@ -1446,9 +1446,9 @@ extern void extend_regions (void); extern void rgn_make_new_region_out_of_new_block (basic_block); extern void compute_priorities (void); -extern void increase_insn_priority (rtx, int); +extern void increase_insn_priority (rtx_insn *, int); extern void debug_rgn_dependencies (int); -extern void debug_dependencies (rtx, rtx); +extern void debug_dependencies (rtx_insn *, rtx_insn *); extern void free_rgn_deps (void); extern int contributes_to_priority (rtx_insn *, rtx_insn *); extern void extend_rgns (int *, int *, sbitmap, int *); diff --git a/gcc/sched-rgn.c b/gcc/sched-rgn.c index 723f376..ceeeacc 100644 --- a/gcc/sched-rgn.c +++ b/gcc/sched-rgn.c @@ -2806,10 +2806,10 @@ debug_rgn_dependencies (int from_bb) /* Print dependencies information for instructions between HEAD and TAIL. ??? This function would probably fit best in haifa-sched.c. */ -void debug_dependencies (rtx head, rtx tail) +void debug_dependencies (rtx_insn *head, rtx_insn *tail) { - rtx insn; - rtx next_tail = NEXT_INSN (tail); + rtx_insn *insn; + rtx_insn *next_tail = NEXT_INSN (tail); fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n", "insn", "code", "bb", "dep", "prio", "cost", -- 1.8.5.3