From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1016 invoked by alias); 6 Aug 2014 17:44:44 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 940 invoked by uid 89); 6 Aug 2014 17:44:43 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL,BAYES_00 autolearn=ham version=3.3.2 X-HELO: eggs.gnu.org Received: from eggs.gnu.org (HELO eggs.gnu.org) (208.118.235.92) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Wed, 06 Aug 2014 17:44:42 +0000 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XF4t8-0000yA-C4 for gcc-patches@gcc.gnu.org; Wed, 06 Aug 2014 13:20:40 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36089) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XF4t7-0000xP-Sv for gcc-patches@gcc.gnu.org; Wed, 06 Aug 2014 13:20:34 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s76HJXu6012352 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 6 Aug 2014 13:19:33 -0400 Received: from c64.redhat.com (vpn-239-139.phx2.redhat.com [10.3.239.139]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s76HJ2oS030913; Wed, 6 Aug 2014 13:19:33 -0400 From: David Malcolm To: gcc-patches@gcc.gnu.org Cc: David Malcolm Subject: [PATCH 052/236] bt-load.c: Use rtx_insn Date: Wed, 06 Aug 2014 17:44:00 -0000 Message-Id: <1407345815-14551-53-git-send-email-dmalcolm@redhat.com> In-Reply-To: <1407345815-14551-1-git-send-email-dmalcolm@redhat.com> References: <1407345815-14551-1-git-send-email-dmalcolm@redhat.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 X-IsSubscribed: yes X-SW-Source: 2014-08/txt/msg00685.txt.bz2 gcc/ * bt-load.c (struct btr_user_s): Strengthen field "insn" from rtx to rtx_insn *. (struct btr_def_s): Likewise. (insn_sets_btr_p): Strengthen param "insn" from const_rtx to const rtx_insn *. (add_btr_def): Likewise. (new_btr_user): Likewise. (compute_defs_uses_and_gen): Strengthen locals "insn", "last" from rtx to rtx_insn *. (link_btr_uses): Likewise. (move_btr_def): Likewise for locals "insp", "old_insn", "new_insn". Add checked cast to rtx_insn * for now on result of gen_move_insn. (can_move_up): Strengthen param "insn" from const_rtx to const rtx_insn *. --- gcc/bt-load.c | 37 +++++++++++++++++++------------------ 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/gcc/bt-load.c b/gcc/bt-load.c index f57d84d..58dbc09 100644 --- a/gcc/bt-load.c +++ b/gcc/bt-load.c @@ -53,7 +53,7 @@ typedef struct btr_user_s struct btr_user_s *next; basic_block bb; int luid; - rtx insn; + rtx_insn *insn; /* If INSN has a single use of a single branch register, then USE points to it within INSN. If there is more than one branch register use, or the use is in some way ambiguous, @@ -79,7 +79,7 @@ typedef struct btr_def_s struct btr_def_s *next_this_group; basic_block bb; int luid; - rtx insn; + rtx_insn *insn; int btr; int cost; /* For a branch register setting insn that has a constant @@ -112,14 +112,14 @@ typedef struct btr_def_s static int issue_rate; static int basic_block_freq (const_basic_block); -static int insn_sets_btr_p (const_rtx, int, int *); +static int insn_sets_btr_p (const rtx_insn *, int, int *); static rtx *find_btr_use (rtx); static int btr_referenced_p (rtx, rtx *); static int find_btr_reference (rtx *, void *); static void find_btr_def_group (btr_def_group *, btr_def); -static btr_def add_btr_def (fibheap_t, basic_block, int, rtx, +static btr_def add_btr_def (fibheap_t, basic_block, int, rtx_insn *, unsigned int, int, btr_def_group *); -static btr_user new_btr_user (basic_block, int, rtx); +static btr_user new_btr_user (basic_block, int, rtx_insn *); static void dump_hard_reg_set (HARD_REG_SET); static void dump_btrs_live (int); static void note_other_use_this_block (unsigned int, btr_user); @@ -140,7 +140,7 @@ static void btr_def_live_range (btr_def, HARD_REG_SET *); static void move_btr_def (basic_block, int, btr_def, bitmap, HARD_REG_SET *); static int migrate_btr_def (btr_def, int); static void migrate_btr_defs (enum reg_class, int); -static int can_move_up (const_basic_block, const_rtx, int); +static int can_move_up (const_basic_block, const rtx_insn *, int); static void note_btr_set (rtx, const_rtx, void *); /* The following code performs code motion of target load instructions @@ -222,7 +222,7 @@ btr_referenced_p (rtx x, rtx *excludep) If such a set is found and REGNO is nonzero, assign the register number of the destination register to *REGNO. */ static int -insn_sets_btr_p (const_rtx insn, int check_const, int *regno) +insn_sets_btr_p (const rtx_insn *insn, int check_const, int *regno) { rtx set; @@ -297,7 +297,8 @@ find_btr_def_group (btr_def_group *all_btr_def_groups, btr_def def) block BB, instruction INSN, and insert it into ALL_BTR_DEFS. Return the new definition. */ static btr_def -add_btr_def (fibheap_t all_btr_defs, basic_block bb, int insn_luid, rtx insn, +add_btr_def (fibheap_t all_btr_defs, basic_block bb, int insn_luid, + rtx_insn *insn, unsigned int dest_reg, int other_btr_uses_before_def, btr_def_group *all_btr_def_groups) { @@ -330,7 +331,7 @@ add_btr_def (fibheap_t all_btr_defs, basic_block bb, int insn_luid, rtx insn, /* Create a new target register user structure, for a use in block BB, instruction INSN. Return the new user. */ static btr_user -new_btr_user (basic_block bb, int insn_luid, rtx insn) +new_btr_user (basic_block bb, int insn_luid, rtx_insn *insn) { /* This instruction reads target registers. We need to decide whether we can replace all target register @@ -463,8 +464,8 @@ compute_defs_uses_and_gen (fibheap_t all_btr_defs, btr_def *def_array, basic_block bb = BASIC_BLOCK_FOR_FN (cfun, i); int reg; btr_def defs_this_bb = NULL; - rtx insn; - rtx last; + rtx_insn *insn; + rtx_insn *last; int can_throw = 0; info.users_this_bb = NULL; @@ -671,8 +672,8 @@ link_btr_uses (btr_def *def_array, btr_user *use_array, sbitmap *bb_out, for (i = NUM_FIXED_BLOCKS; i < last_basic_block_for_fn (cfun); i++) { basic_block bb = BASIC_BLOCK_FOR_FN (cfun, i); - rtx insn; - rtx last; + rtx_insn *insn; + rtx_insn *last; bitmap_union_of_preds (reaching_defs, bb_out, BASIC_BLOCK_FOR_FN (cfun, i)); for (insn = BB_HEAD (bb), last = NEXT_INSN (BB_END (bb)); @@ -1154,11 +1155,11 @@ move_btr_def (basic_block new_def_bb, int btr, btr_def def, bitmap live_range, Replace all uses of the old target register definition by uses of the new definition. Delete the old definition. */ basic_block b = new_def_bb; - rtx insp = BB_HEAD (b); - rtx old_insn = def->insn; + rtx_insn *insp = BB_HEAD (b); + rtx_insn *old_insn = def->insn; rtx src; rtx btr_rtx; - rtx new_insn; + rtx_insn *new_insn; enum machine_mode btr_mode; btr_user user; rtx set; @@ -1200,7 +1201,7 @@ move_btr_def (basic_block new_def_bb, int btr, btr_def def, bitmap live_range, btr_mode = GET_MODE (SET_DEST (set)); btr_rtx = gen_rtx_REG (btr_mode, btr); - new_insn = gen_move_insn (btr_rtx, src); + new_insn = as_a (gen_move_insn (btr_rtx, src)); /* Insert target register initialization at head of basic block. */ def->insn = emit_insn_after (new_insn, insp); @@ -1236,7 +1237,7 @@ move_btr_def (basic_block new_def_bb, int btr, btr_def def, bitmap live_range, /* We anticipate intra-block scheduling to be done. See if INSN could move up within BB by N_INSNS. */ static int -can_move_up (const_basic_block bb, const_rtx insn, int n_insns) +can_move_up (const_basic_block bb, const rtx_insn *insn, int n_insns) { while (insn != BB_HEAD (bb) && n_insns > 0) { -- 1.8.5.3