[PATCH 000/236] Introduce rtx subclasses

[PATCH 000/236] Introduce rtx subclasses

[David Malcolm]

This is the patch series I spoke about at Cauldron in the talk
"A proposal for typesafe RTL"; slides here:
http://dmalcolm.fedorapeople.org/presentations/cauldron-2014/rtl

They can also be seen at:
https://dmalcolm.fedorapeople.org/gcc/patch-backups/rtx-classes/v20/

The aim of the patch series is to improve the type-safety and
readability of the backend by introducing subclasses of rtx (actually
rtx_def) for *instructions*, and also for EXPR_LIST, INSN_LIST, SEQUENCE.

That way we can document directly in the code the various places that
manipulate insn chains vs other kinds of rtx node.

An example of a bug detected using this approach: in mn10300.c there
was dead code of the form:

  if (GET_CODE (insn) == PARALLEL)
    insn = XVECEXP (insn, 0, 0);

where the test should really have been on "PATTERN (insn)", not "insn":

  if (GET_CODE (PATTERN (insn)) == PARALLEL)
    insn = XVECEXP (PATTERN (insn), 0, 0);

[as discussed in https://gcc.gnu.org/ml/gcc/2014-07/msg00078.html]

The class hierarchy looks like this (using indentation to show
inheritance, and indicating the invariants):

class rtx_def;
  class rtx_expr_list;           /* GET_CODE (X) == EXPR_LIST */
  class rtx_insn_list;           /* GET_CODE (X) == INSN_LIST */
  class rtx_sequence;            /* GET_CODE (X) == SEQUENCE */
  class rtx_insn;                /* INSN_CHAIN_CODE_P (GET_CODE (X)) */
    class rtx_real_insn;         /* INSN_P (X) */
      class rtx_debug_insn;      /* DEBUG_INSN_P (X) */
      class rtx_nonjump_insn;    /* NONJUMP_INSN_P (X) */
      class rtx_jump_insn;       /* JUMP_P (X) */
      class rtx_call_insn;       /* CALL_P (X) */
    class rtx_jump_table_data;   /* JUMP_TABLE_DATA_P (X) */
    class rtx_barrier;           /* BARRIER_P (X) */
    class rtx_code_label;        /* LABEL_P (X) */
    class rtx_note;              /* NOTE_P (X) */

The patch series converts roughly 4300 places in the code from using
rtx to the more concrete rtx_insn *, in such places as:

  * the core types within basic blocks

  * hundreds of function params, struct fields, etc.  e.g. within
    register allocators, schedulers

  * "insn" and "curr_insn" within .md files (peephole, attributes,
    define_bypass guards)

  * insn_t in sel-sched-ir.h

  * Target hooks: updated params of 25 of them

  * Debug hooks: "label" and "var_location"

etc

The patch series also contains some cleanups using inline methods:

  * being able to get rid of this boilerplate everywhere that jump tables
    are handled:

      if (GET_CODE (PATTERN (table)) == ADDR_VEC)
        vec = XVEC (PATTERN (table), 0);
      else
        vec = XVEC (PATTERN (table), 1);

   in favor of a helper method (inlined):

      vec = table->get_labels ();

  * having a subclass for EXPR_LIST allows for replacing this kind of
    thing:

      for (x = forced_labels; x; x = XEXP (x, 1))
        if (XEXP (x, 0))
           set_label_offsets (XEXP (x, 0), NULL_RTX, 1);

    with the following, which captures that it's an EXPR_LIST, and makes
    it clearer that we're simply walking a singly-linked list:

      for (rtx_expr_list *x = forced_labels; x; x = x->next ())
        if (x->element ())
          set_label_offsets (x->element (), NULL_RTX, 1);

There are some surface details to the patches:

  * class names.  The subclass names correspond to the lower_case name
    from rtl.def, with an "rtx_" prefix.  "rtx_insn" and "rtx_real_insn"
    don't correspond to concrete node kinds, and hence I had to invent
    the names.  (In an earlier version of the patches these were
    "rtx_base_insn" and "rtx_insn" respectively, but the former occurred
    much more than the latter and so it seemed better to use the shorter
    spelling for the common case).

  * there's a NULL_RTX define in rtl.h.   In an earlier version of the
    patch I added a NULL_INSN define, but in this version I simply use
    NULL, and I'm in two minds about whether a NULL_INSN is desirable
    (would we have a NULL_FOO for all of the subclasses?).  I like having
    a strong distinction between arbitrary RTL nodes vs instructions,
    so maybe there's a case for NULL_INSN, but not for the subclasses?

  * I added an "rtx_real_insn" subclass for the INSN_P predicate, adding
    the idea of a PATTERN, a basic_block, and a location - but I hardly
    use this anywhere.  That said, it seems to be a real concept in the
    code, so I added it.

  * "pointerness" of the types.  "rtx" is a typedef to "rtx_def *" i.e.
    there's an implicit pointer.  In the discussion about using C++
    classes for gimple statements:
       https://gcc.gnu.org/ml/gcc-patches/2014-04/msg01427.html
    Richi said:

> To followup myself here, it's because 'tree' is a typedef to a pointer
> and thus 'const tree' is different from 'const tree_node *'.
>
> Not sure why we re-introduced the 'mistake' of making 'tree' a pointer
> when we introduced 'gimple'.  If we were to make 'gimple' the class
> type itself we can use gimple *, const gimple * and also const gimple &
> (when a NULL pointer is not expected).

    So in the following patches the pointerness is explicit: the patches
    refer to:
       rtx_insn *insn;
    rather than just:
       rtx_insn insn;
    and so one can write:
       const rtx_insn *insn
    and the "constness" applies to the insn, not to the pointer.

    But we could go either way here: the class could be "rtx_insn_def",
    with "rtx_insn" a typedef to an "rtx_insn_def *" etc with:

      class rtx_def;
        class rtx_expr_list_def;         /* GET_CODE (X) == EXPR_LIST */
        class rtx_insn_list_def;         /* GET_CODE (X) == INSN_LIST */
        class rtx_sequence_def;          /* GET_CODE (X) == SEQUENCE */
        class rtx_insn_def;              /* INSN_CHAIN_CODE_P (GET_CODE (X)) */
          class rtx_real_insn_def;       /* INSN_P (X) */
            class rtx_debug_insn_def;    /* DEBUG_INSN_P (X) */
            class rtx_nonjump_insn_def;  /* NONJUMP_INSN_P (X) */
            class rtx_jump_insn_def;     /* JUMP_P (X) */
            class rtx_call_insn_def;     /* CALL_P (X) */
          class rtx_jump_table_data_def; /* JUMP_TABLE_DATA_P (X) */
          class rtx_barrier_def;         /* BARRIER_P (X) */
          class rtx_code_label_def;      /* LABEL_P (X) */
          class rtx_note_def;            /* NOTE_P (X) */

    and a family of typedefs of pointers to the classes:

      typedef rtx_def *rtx;
        typedef rtx_expr_list_def *rtx_expr_list;
        typedef rtx_insn_list_def *rtx_insn_list;
        typedef rtx_sequence_def *rtx_sequence;
        typedef rtx_insn_def *rtx_insn;
          typedef rtx_real_insn_def *rtx_real_insn;
            typedef rtx_debug_insn_def *rtx_debug_insn;
            typedef rtx_nonjump_insn_def *rtx_nonjump_insn;
            typedef rtx_jump_insn_def *rtx_jump_insn;
            typedef rtx_call_insn_def *rtx_call_insn;
          typedef rtx_jump_table_data_def *rtx_jump_table_data;
          typedef rtx_barrier_def *rtx_barrier;
          typedef rtx_code_label_def *rtx_code_label;
          typedef rtx_note_def *rtx_note;

  * Should as_a <rtx_insn *> accept a NULL pointer?  It's possible to make
    the is_a_helper cope with NULL, but this adds an extra conditional.
    I instead added an as_a_nullable<> cast, so that you can explicitly
    add a check against NULL before checking the code of the rtx node.
    But maybe it's cleaner to simply have is_a_helper<rtx_insn *> cope
    with NULL?

Some deeper questions:

  * should rtx_insn eventually be a separate class from rtx, separating
    insn chain nodes from rtx nodes?  I don't know if that's a worthwhile
    longterm goal, but this patch series gets us somewhere closer to
    being able to achieve that.  (actually getting there would be a much
    more invasive set of patches).

To keep this reviewable, and to try to mitigate bitrot, I've chopped it up
into numerous relatively small patches.  The aim is that at every patch,
the code correctly builds on all supported configurations.  That said,
there's a complicated dependency graph of types in gcc's code, so to
tame that, the patch series is divided into 6 phases:

  * phase 1 adds "scaffolding": in various places, strengthen the return
    types from internal APIs and macros so as to promise an rtx_insn *
    rather than a plain rtx.  For example, the DEP_PRO/DEP_CON macros
    in sched-int.h which lookup fields within struct _dep become inline
    functions that return rtx_insn * (using checked casts).  In this way,
    stronger type information can be used by subsequent patches whilst
    avoiding the chicken-and-egg issue since writes to the fields can
    still be arbitrary rtx nodes, according to the type system at least.

  * phase 2: an alphabetical tour of the backend: a series of patches,
    from alias.c through web.c, each patch touching one file,
    strengthening the types within it as much as we can at that point.
    The patches sometimes make use of the alphabetic ordering in order to
    use APIs that have already been strengthened to work on rtx_insn.

  * phase 3: similar to phase 2, but for the various config
    subdirectories.

  * phase 4: tears down the scaffolding, replacing checked casts as much
    as possible by strengthening core fields of core types.  For example,
    we eventually reach the point in sched-int.h where the fields "pro"
    and "con" within struct _dep can become rtx_insn *, and hence
    DEP_PRO/DEP_CON can be converted back to plain macros, without needing
    the checked cast.

  * phase 5: all of the above was for instructions; this phase adds three
    subclasses for other node kinds.  I experimented with subclasses for
    various node kinds; these three seemed most appropriate: EXPR_LIST,
    INSN_LIST, SEQUENCE.  I kept these as a separate phase as Jeff asked
    me to separate them from the instruction patches, to avoid
    complicating things, but I think these three are also a worthwhile
    cleanup with relatively little complexity.

  * phase 6: (new since my Cauldron talk): this phase freely uses
    EXPR_LIST, INSN_LIST, SEQUENCE to do cleanups that were awkward
    without them.  In particular, by the end of this phase, NEXT_INSN()
    and PREV_INSN() require rtx_insn * rather than plain rtx.

Correctness
===========
In theory, these patches should not affect the outwardly-visible behavior
of the compiler, merely enable various kinds of errors to be more easily
detected when the compiler is built, and to improve the readability of the
code.

The patches (and my control for testing) has been on top of r211061, which
being from 2014-05-29 is now two months old, but hopefully is still
reviewable; naturally I'll perform bootstrap and regression testing for
each patch in turn before committing.

I've successfully bootsrapped & regression-tested the end-result of the
attached patches on:

  * x86_64 Linux (Fedora 20)
  * powerpc64-unknown-linux-gnu (Fedora 18; gcc110 in buildfarm)
  * s390x-ibm-linux-gnu (RHEL 7)

I've also repeatedly bootstrapped this on x86_64 at many stages of
assembling the patch series.

There are 204 configurations in the list in contrib/config-list.mk, however
12 failed to work for a control build; so I patched my config-list.mk
accordingly:
# Which of the above are known to currently not work?
KNOWN_BROKEN=

# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55143
KNOWN_BROKEN += alpha64-dec-vms alpha-dec-vms

# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55144
KNOWN_BROKEN += bfin-linux-uclibc cris-linux crisv32-linux

# Discussion at: https://gcc.gnu.org/ml/gcc/2013-11/msg00574.html
# but this doesn't seem to have been filed in BZ
KNOWN_BROKEN += i686-interix3OPT-enable-obsolete

# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=47098
KNOWN_BROKEN += i686-openbsd3.0

# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55143
KNOWN_BROKEN += ia64-hp-vms

# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61287
KNOWN_BROKEN += nios2-elf nios2-linux-gnu

# See e.g. https://www.mail-archive.com/gcc@gcc.gnu.org/msg70568.html
# but this doesn't seem to have been filed in BZ
KNOWN_BROKEN += vax-openbsd

# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=48904
KNOWN_BROKEN += x86_64-knetbsd-gnu

LIST= $(filter-out $(KNOWN_BROKEN),$(FULL_LIST))

With that, I've successfully built the patches on 193 configurations, both
the end state of the patch series, and at many places along the way.

I've manually verified the build for nios2-elf *without* ada, to
work around PR61287.

Hence I believe that this should continue to build on every supported
target.

Performance
===========

I tested the performance with --enable-checking=release using
two large files (kdecore.cc, bigcode.c), comparing a control build
to a patched build.

There were no significant differences in compilation time:

Compilation of kdecore.cc at -O3 with -g for x86_64-unknown-linux-gnu: usr
      control: [47.58, 47.99, 47.6, 47.8, 47.74, 47.76, 47.81, 47.9, 47.91, 47.99, 48.14, 47.77, 47.65, 47.86, 47.96, 47.74, 48.09, 47.97, 47.86, 47.79, 48.17, 47.76, 47.88, 47.85, 48.24, 48.01, 47.98, 47.91, 48.12, 47.7, 47.75, 47.69, 47.83, 47.82, 47.76, 48.05, 47.85, 48.05, 48.25, 47.95]
   experiment: [47.65, 47.68, 47.67, 47.73, 47.91, 48.27, 47.83, 48.0, 47.95, 47.75, 47.72, 47.81, 47.98, 48.36, 47.67, 47.72, 47.81, 47.83, 47.89, 47.67, 47.72, 47.74, 47.79, 47.77, 47.67, 48.78, 47.88, 47.76, 47.96, 47.71, 47.87, 47.77, 47.82, 47.74, 47.77, 48.28, 47.78, 47.62, 47.67, 47.72]
Min: 47.580000 -> 47.620000: 1.00x slower
Avg: 47.888250 -> 47.843000: 1.00x faster
Not significant
Stddev: 0.16618 -> 0.22717: 1.3670x larger
Timeline: http://goo.gl/ikKUwD

Compilation of kdecore.cc at -O3 with -g for x86_64-unknown-linux-gnu: sys
      control: [6.29, 6.04, 6.31, 6.15, 6.24, 6.19, 6.2, 6.18, 6.0, 6.15, 6.12, 6.34, 6.26, 6.09, 6.24, 6.16, 6.0, 6.25, 6.19, 6.2, 6.23, 6.24, 6.19, 6.22, 6.22, 6.26, 6.18, 6.11, 6.16, 6.24, 6.19, 6.23, 6.33, 6.14, 6.21, 6.2, 6.23, 6.14, 6.23, 6.13]
   experiment: [6.3, 6.19, 6.21, 6.21, 6.21, 6.25, 6.19, 6.1, 6.13, 6.12, 6.19, 6.09, 6.31, 6.23, 6.2, 6.22, 6.21, 6.22, 6.09, 6.15, 6.14, 6.26, 6.09, 6.11, 6.3, 6.19, 6.14, 6.14, 6.14, 6.17, 6.12, 6.11, 6.24, 6.26, 6.21, 6.17, 6.16, 6.18, 6.19, 6.15]
Min: 6.000000 -> 6.090000: 1.01x slower
Avg: 6.192000 -> 6.182250: 1.00x faster
Not significant
Stddev: 0.07653 -> 0.05925: 1.2918x smaller
Timeline: http://goo.gl/3r9lQJ

Compilation of kdecore.cc at -O3 with -g for x86_64-unknown-linux-gnu: wall
      control: [54.16, 54.21, 54.1, 54.12, 54.16, 54.13, 54.19, 54.26, 54.09, 54.32, 54.44, 54.29, 54.09, 54.13, 54.38, 54.08, 54.27, 54.41, 54.22, 54.16, 54.58, 54.17, 54.24, 54.25, 54.64, 54.44, 54.34, 54.2, 54.46, 54.13, 54.12, 54.1, 54.35, 54.14, 54.15, 54.43, 54.26, 54.37, 54.66, 54.26]
   experiment: [54.21, 54.24, 54.09, 54.3, 54.46, 54.86, 54.34, 54.39, 54.4, 54.17, 54.16, 54.16, 54.48, 54.82, 54.11, 54.13, 54.25, 54.32, 54.24, 54.08, 54.11, 54.19, 54.07, 54.06, 54.16, 55.23, 54.21, 54.1, 54.34, 54.13, 54.18, 54.11, 54.25, 54.23, 54.17, 54.64, 54.15, 53.99, 54.05, 54.06]
Min: 54.080000 -> 53.990000: 1.00x faster
Avg: 54.262500 -> 54.266000: 1.00x slower
Not significant
Stddev: 0.15337 -> 0.24797: 1.6169x larger
Timeline: http://goo.gl/Gbk0RB

Compilation of kdecore.cc at -O3 with -g for x86_64-unknown-linux-gnu: ggc
      control: [1264522.0, 1264525.0, 1264523.0, 1264524.0, 1264522.0, 1264520.0, 1264524.0, 1264517.0, 1264523.0, 1264529.0, 1264518.0, 1264522.0, 1264531.0, 1264519.0, 1264524.0, 1264518.0, 1264533.0, 1264522.0, 1264524.0, 1264529.0, 1264515.0, 1264525.0, 1264526.0, 1264523.0, 1264523.0, 1264531.0, 1264526.0, 1264524.0, 1264518.0, 1264521.0, 1264522.0, 1264520.0, 1264523.0, 1264520.0, 1264525.0, 1264532.0, 1264524.0, 1264524.0, 1264519.0, 1264525.0]
   experiment: [1264530.0, 1264523.0, 1264523.0, 1264524.0, 1264531.0, 1264523.0, 1264528.0, 1264519.0, 1264516.0, 1264524.0, 1264522.0, 1264524.0, 1264522.0, 1264525.0, 1264520.0, 1264522.0, 1264518.0, 1264518.0, 1264519.0, 1264523.0, 1264522.0, 1264517.0, 1264528.0, 1264525.0, 1264519.0, 1264522.0, 1264522.0, 1264519.0, 1264519.0, 1264523.0, 1264532.0, 1264526.0, 1264526.0, 1264520.0, 1264525.0, 1264530.0, 1264529.0, 1264525.0, 1264527.0, 1264523.0]
Mem max: 1264533.000 -> 1264532.000: 1.0000x smaller
Usage over time: http://goo.gl/OPqL9P

Compilation of big-code.c at -O3 with -g for x86_64-unknown-linux-gnu: usr
      control: [36.16, 36.13, 36.13, 36.33, 36.16, 36.12, 36.07, 36.19, 36.11, 36.58, 36.14, 36.53, 36.19, 36.17, 36.16, 36.19, 36.22, 36.34, 36.14, 36.13, 36.12, 36.38, 36.17, 36.28, 36.38, 36.15, 36.13, 36.16, 36.23, 36.17, 36.16, 36.07, 36.24, 36.17, 36.11, 36.14, 36.14, 36.12, 36.15, 36.21]
   experiment: [36.15, 36.09, 36.16, 36.23, 36.14, 36.11, 36.16, 36.16, 36.15, 36.14, 36.2, 36.2, 36.22, 36.15, 36.14, 36.23, 36.23, 36.15, 36.19, 36.09, 36.12, 36.26, 36.18, 36.14, 36.23, 36.18, 36.19, 36.13, 36.42, 36.15, 36.16, 36.18, 36.19, 36.12, 36.16, 36.3, 36.1, 36.13, 36.19, 36.3]
Min: 36.070000 -> 36.090000: 1.00x slower
Avg: 36.196750 -> 36.178000: 1.00x faster
Not significant
Stddev: 0.11136 -> 0.06366: 1.7494x smaller
Timeline: http://goo.gl/TbdnnN

Compilation of big-code.c at -O3 with -g for x86_64-unknown-linux-gnu: sys
      control: [1.31, 1.3, 1.33, 1.42, 1.35, 1.34, 1.34, 1.32, 1.32, 1.27, 1.32, 1.29, 1.3, 1.3, 1.29, 1.33, 1.3, 1.3, 1.28, 1.29, 1.3, 1.39, 1.31, 1.36, 1.32, 1.29, 1.33, 1.33, 1.29, 1.29, 1.31, 1.36, 1.25, 1.29, 1.33, 1.33, 1.38, 1.28, 1.39, 1.27]
   experiment: [1.24, 1.31, 1.27, 1.34, 1.39, 1.35, 1.27, 1.26, 1.28, 1.38, 1.32, 1.29, 1.25, 1.26, 1.28, 1.27, 1.3, 1.26, 1.29, 1.31, 1.35, 1.27, 1.34, 1.28, 1.22, 1.28, 1.43, 1.33, 1.28, 1.29, 1.26, 1.33, 1.28, 1.34, 1.32, 1.26, 1.41, 1.35, 1.3, 1.34]
Min: 1.250000 -> 1.220000: 1.02x faster
Avg: 1.317500 -> 1.304500: 1.01x faster
Not significant
Stddev: 0.03607 -> 0.04701: 1.3032x larger
Timeline: http://goo.gl/ocXV2i

Compilation of big-code.c at -O3 with -g for x86_64-unknown-linux-gnu: wall
      control: [37.59, 37.54, 37.57, 37.86, 37.62, 37.57, 37.52, 37.63, 37.54, 37.96, 37.57, 37.93, 37.61, 37.58, 37.56, 37.63, 37.63, 37.75, 37.54, 37.54, 37.53, 37.89, 37.59, 37.75, 37.8, 37.55, 37.58, 37.6, 37.63, 37.57, 37.58, 37.54, 37.59, 37.57, 37.55, 37.58, 37.62, 37.51, 37.65, 37.59]
   experiment: [37.5, 37.5, 37.53, 37.68, 37.64, 37.57, 37.54, 37.53, 37.54, 37.62, 37.63, 37.6, 37.58, 37.52, 37.53, 37.6, 37.65, 37.52, 37.59, 37.51, 37.58, 37.64, 37.63, 37.53, 37.56, 37.57, 37.73, 37.57, 37.82, 37.55, 37.52, 37.62, 37.59, 37.58, 37.6, 37.67, 37.62, 37.6, 37.6, 37.75]
Min: 37.510000 -> 37.500000: 1.00x faster
Avg: 37.625250 -> 37.592750: 1.00x faster
Not significant
Stddev: 0.11404 -> 0.06943: 1.6425x smaller
Timeline: http://goo.gl/WT5UGE

Compilation of big-code.c at -O3 with -g for x86_64-unknown-linux-gnu: ggc
      control: [657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0]
   experiment: [657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0, 657274.0]
Mem max: 657274.000 -> 657274.000: no change
Usage over time: http://goo.gl/ogWEOG


As for the performance of a regular build i.e. with as_a<>
checks *enabled*; looking at the wallclock time taken for a bootstrap and
regression test, for my s390 builds (with -j3) I saw:

s390 control:
  "make" time: 68 mins
  "make check" time: 122 mins
  total time: 190 mins

s390 experiment:
  "make" time: 70 mins
  "make check" time: 126 mins
  total time: 196 mins

showing a 3% increase, presumably due to the as_a and as_a_nullable
checks.

i.e. a release build shows no change in performance; a debug build shows
a 3% increase in time taken to bootstrap and regression test.  I believe
the debug build could be sped up with further patches to eliminate the
checked casts.

Summary
=======

OK for trunk?

Dave

Patch list and overall diffstat follow:

David Malcolm (236):
  Convert lab_rtx_for_bb from pointer_map_t to pointer_map<rtx>
  JUMP_LABEL is not always a LABEL
  config/mn10300: Fix missing PATTERN in PARALLEL handling
  PHASE 1: Initial "scaffolding" commits
  Introduce as_a_nullable
  Introduce rtx_insn subclass of rtx_def
  New function: for_each_rtx_in_insn
  Split BB_HEAD et al into BB_HEAD/SET_BB_HEAD variants
  Replace BB_HEAD et al macros with functions
  Split NEXT_INSN/PREV_INSN into lvalue and rvalue forms
  Replace PREV_INSN et al macros with functions
  Convert DF_REF_INSN to a function for now
  DEP_PRO/DEP_CON scaffolding
  VINSN_INSN_RTX scaffolding
  BB_NOTE_LIST scaffolding
  BND_TO scaffolding
  Add subclasses for the various kinds of instruction
  Strengthen return types of various {next|prev}_*insn from rtx to
    rtx_insn *
  Strengthen return type of gen_label_rtx
  Return rtx_insn from get_insns/get_last_insn
  entry_of_function returns an insn
  Make tablejump_p accept a rtx_jump_table_data **
  delete_trivially_dead_insns works on insns
  last_call_insn returns an rtx_call_insn *
  make_insn_raw returns an rtx_insn
  bb_note returns a rtx_note *
  asan_emit_stack_protection returns an insn
  cfgexpand.c: Use rtx_insn
  rtl_data.x_parm_birth_insn is an insn
  Convert various rtx to rtx_note *
  emit_jump_table_data returns an rtx_jump_table_data *
  emit_* functions return rtx_insn
  emit_move et al return rtx_insn *
  next_cc0_user and prev_cc0_setter scaffolding
  Return types of unlink_insn_chain and duplicate_insn_chain
  get_last_bb_insn returns an rtx_insn
  sel_bb_{head|end} return rtx_insn
  find_first_parameter_load returns an rtx_insn
  create_insn_rtx_from_pattern and create_copy_of_insn_rtx return
    rtx_insn
  Use rtx_insn internally within generated functions
  Debug hooks: use rtx_insn and rtx_code_label
  try_split returns an rtx_insn
  peephole returns an rtx_insn
  Pass "insn" as an rtx_insn within generated get_attr_ fns in
    insn-attrtab.c
  define_bypass guard functions take a pair of rtx_insn
  delete_related_insns returns an rtx_insn
  PHASE 2: Per-file commits in main source directory
  alias.c: Use rtx_insn
  asan.c: strengthen some rtx locals
  auto-inc-dec.c: strengthen various rtx to rtx_insn *
  bb-reorder.c: Use rtx_insn
  bt-load.c: Use rtx_insn
  builtins.c: strengthen various rtx to rtx_insn * and other subclasses
  calls.c: Use rtx_insn
  caller-save.c: Use rtx_insn
  cfgbuild.c: Use rtx_insn
  cfgcleanup.c: Use rtx_insn (also touches basic-block.h and ifcvt.c)
  cfgloop.c: Use rtx_insn
  cfgloopanal.c: Use rtx_insn
  cfgrtl.c: Use rtx subclasses
  combine.c: Use rtx_insn
  combine-stack-adj.c: Use rtx_insn
  compare-elim.c: Use rtx_insn
  cprop.c: Use rtx_insn
  cse.c: Use rtx_insn
  dce.c: Use rtx subclasses
  ddg: Use rtx_insn
  df-*.c: Use rtx_insn
  dwarf2cfi.c: Use rtx_insn
  dwarf2out.c: Use rtx_insn
  except.*: Use rtx_insn  (also touches function.h)
  explow.c: Use rtx_insn and rtx_code_label
  expmed.c: Use rtx_insn and rtx_code_label
  expr.c: Use rtx_insn and rtx_code_label
  final.c: Use rtx_insn (also touches output.c and config/arc/arc.c)
  function.c: Use rtx_insn
  fwprop.c: Use rtx_insn
  genpeep.c: peephole requires an rtx_insn
  gcse.c: Use rtx_insn
  haifa-sched.c: Use rtx_insn
  hw-doloop: Use rtx_insn (touches config/bfin/bfin.c)
  ifcvt.c: Use rtx_insn
  init-regs.c: rtx_insn
  internal-fn.c: Use rtx_insn and rtx_code_label
  ira: Use rtx_insn in various places
  jump.c: Use rtx_insn in a few places (also touches rtl.h and
    cfgexpand.c)
  loop-doloop.c: Use rtx_insn in a few places
  loop-invariant.c: Use rtx_insn in various places
  loop-iv.c: Use rtx_insn (also touches cfgloop.h and loop-unroll.c)
  loop-unroll.c: Use rtx_insn (also touches basic-block.h)
  lower-subreg.c: Use rtx_insn
  lra: use rtx_insn
  mode-switching.c: Use rtx_insn
  get_ebb_head_tail works with rtx_insn
  modulo-sched.c: Use rtx_insn in various places
  optabs.c: Use rtx_insn and rtx_code_label
  postreload-gcse.c: Use rtx_insn in various places
  postreload.c: Use rtx_insn (also touches rtl.h and cprop.c)
  predict.*: Use rtx_insn (also touches function.c and
    config/cris/cris.c)
  print-rtl.c: Use rtx_insn for various debug_ functions (also touches
    config/rs6000/rs6000.c)
  recog.c: Use rtx_insn
  ree.c: Use rtx_insn
  reg-stack.c: Use rtx_insn
  regcprop.c: Use rtx_insn
  reginfo.c: Use rtx_insn (also touches rtl.h)
  regrename.c: Use rtx_insn
  regstat.c: Use rtx_insn
  reload: Use rtx_insn (also touches caller-save.c and config/arc/arc)
  resource.c: Use rtx_insn
  rtlanal.c: Use rtx_insn
  sched-deps.c: Use rtx_insn
  sched-ebb.c: Use rtx_insn (requires touching sched-int.h and
    config/c6x/c6x.c)
  sched-rgn.c: Use rtx_insn in a couple of places
  sel-sched.c: Use rtx_insn
  sel-sched-ir.c: Use rtx_insn
  shrink-wrap.*: Use rtx_insn (touches config/i386/i386.c)
  stack-ptr-mod.c: Use rtx_insn
  stmt.c: Use rtx_insn
  store-motion.c: Use rtx_insn
  valtrack.c: Use rtx_insn
  varasm.c: Use rtx_insn
  var-tracking.c: Use rtx_insn
  web.c: Use rtx_insn
  PHASE 3: Per-config subdir commits
  config/aarch64/aarch64.c: Use rtx_insn
  config/alpha/alpha.c: Use rtx_insn
  config/arc: Use rtx_insn
  config/arm: Use rtx_insn and rtx_code_label
  config/avr: Use rtx_insn
  config/bfin: Use rtx_insn
  config/c6x: Use rtx_insn
  config/epiphany: Use rtx_insn
  config/h8300: Use rtx_insn
  config/i386/i386.c: Use rtx_code_label
  config/i386/i386: Use rtx_insn
  config/ia64/ia64.c: Use rtx_insn
  config/iq2000: Use rtx_insn
  config/m68k: Use rtx_insn
  config/mep: Use rtx_insn and rtx_code_label
  config/microblaze/microblaze.c: Use rtx_insn and rtx_code_label
  config/mips: Use rtx_insn and rtx_code_label
  config/nds32: Use rtx_insn
  config/pa: Use rtx_insn
  config/picochip: Use rtx_insn
  config/rs6000: Use rtx_insn
  config/rx: Use rtx_insn
  config/s390: Use rtx_insn and rtx_code_label
  config/score/score.c: Use rtx_insn
  config/sh: Use rtx_insn and rtx_code_label
  config/sparc: Use rtx_insn
  config/spu/spu.c: Use rtx_insn
  config/tilegx: Use rtx_insn
  config/tilepro: Use rtx_insn
  config/v850: Use rtx_insn
  config/xtensa: Use rtx_insn and rtx_code_label
  PHASE 4: Removal of scaffolding
  struct eh_landing_pad_d: field "landing_pad" is an rtx_code_label
  Remove BB_FOOTER scaffolding
  Convert edge_def.insns.r to rtx_insn *
  function.c and shrink-wrap.*: more rtx_insn
  reorder_insns requires rtx_insn *
  delete_insn_and_edges takes an rtx_insn *
  unshare_all_rtl_again takes an rtx_insn *
  Add rtx_jump_table_data::get_labels method
  struct haifa_sched_info: prev_head and next_tail
  shorten_branches takes an rtx_insn
  final accepts an rtx_insn
  final_start_function takes an rtx_insn
  Strengthen haifa_sched_info callbacks and 3 scheduler hooks
  Eliminate BB_NOTE_LIST scaffolding
  du_chain.insn is an rtx_insn
  sel-sched-ir.h: Make ilist_t work on insn_t rather than rtx
  insn_t becomes an rtx_insn *
  Remove VINSN_INSN_RTX scaffolding
  Remove DEP_PRO/CON scaffolding
  cselib and incdec
  Tighten up params of create_basic_block_structure
  Remove BB_HEAD, BB_END, BB_HEADER scaffolding
  cselib_record_sets_hook takes an rtx_insn
  Params of add_insn and unlink_insn_chain
  Strengthen fields in struct sequence_stack and struct emit_status
  get_last_insn_anywhere returns an rtx_insn
  Strengthen various insn emission functions
  Use rtx_insn in more places in sel-sched.c
  Use rtx_insn in more places in fwprop.c
  Various condition-handling calls
  duplicate_insn_chain accepts rtx_insn
  Use rtx_insn in more places in haifa-sched.c
  Various scheduling strengthenings
  Remove insn_addresses_new from 'various scheduling strengthenings'
  Remove DF_REF_INSN scaffolding
  Tweak to dse.c
  cselib (also touches sched-deps.c)
  Use rtx_insn for various target.def hooks
  Convert PATTERN from a macro to a pair of inline functions
  Convert various INSN accessors in rtl.h to inline functions
  Tweak to ira-lives.c
  PHASE 5: Additional rtx subclasses
  Introduce rtx_insn_list subclass of rtx_def
  Use rtx_insn_list in various places
  Introduce rtx_sequence subclass of rtx_def
  dwarf2cfi.c: Use rtx_sequence
  except.c: Use rtx_sequence
  final.c: Use rtx_sequence
  function.c: Use rtx_sequence
  jump.c: Use rtx_sequence
  reorg.c: Use rtx_sequence
  resource.c: Use rtx_sequence
  sched-vis.c: Use rtx_sequence
  varasm.c: Use rtx_sequence
  Introduce rtx_expr_list subclass of rtx_def
  Use rtx_expr_list for expr_status.x_forced_labels
  rtl_data.x_nonlocal_goto_handler_labels becomes an rtx_expr_list
  rtl_data.x_stack_slot_list becomes an rtx_expr_list
  Use rtx_expr_list in various places
  PHASE 6: Use extra rtx_def subclasses
  Add JUMP_LABEL_AS_INSN
  Use rtx subclasses in more places in reorg.c
  Make SET_NEXT_INSN/SET_PREV_INSN require an rtx_insn
  Strengthen return_label and naked_return_label to rtx_code_label *
  Add insn method to rtx_expr_list
  Use rtx_insn in more places in dwarf2cfi.c
  inside_basic_block_p requires a const rtx_insn *
  insn_current_reference_address takes an rtx_insn
  Work towards NEXT_INSN/PREV_INSN requiring insns as their params
  Delete find_last_value
  find_first_parameter_load params and return type
  tablejump_p takes an rtx_insn
  NEXT_INSN and PREV_INSN take a const rtx_insn
  Make INSN_HAS_LOCATION require an rtx_insn
  Make insn_addresses_new require an rtx_insn
  Use rtx_insn in various places in resource.[ch]
  dfa_clear_single_insn_cache takes an rtx_insn
  Strengthen params to active_insn_between
  Make next_insn and previous_insn require an rtx_insn *
  END OF PATCHES: Delete rtx-classes-status.txt

 gcc/alias.c                            |   3 +-
 gcc/asan.c                             |  11 +-
 gcc/asan.h                             |   4 +-
 gcc/auto-inc-dec.c                     |  54 +--
 gcc/basic-block.h                      |  31 +-
 gcc/bb-reorder.c                       |  30 +-
 gcc/bt-load.c                          |  37 +-
 gcc/builtins.c                         |  47 +-
 gcc/caller-save.c                      |  18 +-
 gcc/calls.c                            |  47 +-
 gcc/cfgbuild.c                         |  44 +-
 gcc/cfgcleanup.c                       |  98 +++--
 gcc/cfgexpand.c                        |  75 ++--
 gcc/cfgloop.c                          |   2 +-
 gcc/cfgloop.h                          |   9 +-
 gcc/cfgloopanal.c                      |   8 +-
 gcc/cfgrtl.c                           | 365 ++++++++--------
 gcc/combine-stack-adj.c                |  49 ++-
 gcc/combine.c                          | 464 ++++++++++----------
 gcc/compare-elim.c                     |  19 +-
 gcc/config/aarch64/aarch64.c           |  25 +-
 gcc/config/alpha/alpha.c               |  69 +--
 gcc/config/arc/arc-protos.h            |  16 +-
 gcc/config/arc/arc.c                   | 109 ++---
 gcc/config/arc/arc.md                  |   8 +-
 gcc/config/arc/constraints.md          |   2 +-
 gcc/config/arm/arm-protos.h            |   6 +-
 gcc/config/arm/arm.c                   | 137 +++---
 gcc/config/avr/avr-log.c               |   2 +-
 gcc/config/avr/avr-protos.h            |  69 +--
 gcc/config/avr/avr.c                   | 153 +++----
 gcc/config/bfin/bfin-protos.h          |   2 +-
 gcc/config/bfin/bfin.c                 |  96 +++--
 gcc/config/c6x/c6x-protos.h            |   4 +-
 gcc/config/c6x/c6x.c                   | 206 ++++-----
 gcc/config/cris/cris.c                 |  11 +-
 gcc/config/epiphany/epiphany-protos.h  |   6 +-
 gcc/config/epiphany/epiphany.c         |  26 +-
 gcc/config/epiphany/mode-switch-use.c  |   2 +-
 gcc/config/epiphany/resolve-sw-modes.c |   5 +-
 gcc/config/frv/frv.c                   |  61 +--
 gcc/config/h8300/h8300-protos.h        |   4 +-
 gcc/config/h8300/h8300.c               |  19 +-
 gcc/config/i386/i386-protos.h          |  14 +-
 gcc/config/i386/i386.c                 | 278 ++++++------
 gcc/config/i386/winnt.c                |   2 +-
 gcc/config/ia64/ia64.c                 | 193 +++++----
 gcc/config/iq2000/iq2000-protos.h      |  11 +-
 gcc/config/iq2000/iq2000.c             |  24 +-
 gcc/config/iq2000/iq2000.md            |   4 +-
 gcc/config/m32c/m32c.c                 |   4 +-
 gcc/config/m32r/m32r.c                 |   4 +-
 gcc/config/m68k/m68k-protos.h          |   7 +-
 gcc/config/m68k/m68k.c                 |  43 +-
 gcc/config/mcore/mcore-protos.h        |   2 +-
 gcc/config/mcore/mcore.c               |  28 +-
 gcc/config/mep/mep-protos.h            |  18 +-
 gcc/config/mep/mep.c                   | 262 ++++++------
 gcc/config/microblaze/microblaze.c     |  28 +-
 gcc/config/microblaze/microblaze.md    |   4 +-
 gcc/config/mips/mips-protos.h          |  16 +-
 gcc/config/mips/mips.c                 | 237 ++++++-----
 gcc/config/mips/mips.md                |   2 +-
 gcc/config/mn10300/mn10300.c           |  12 +-
 gcc/config/nds32/nds32-protos.h        |   2 +-
 gcc/config/nds32/nds32.c               |   6 +-
 gcc/config/pa/pa-protos.h              |  40 +-
 gcc/config/pa/pa.c                     |  81 ++--
 gcc/config/picochip/picochip-protos.h  |   3 +-
 gcc/config/picochip/picochip.c         |  59 +--
 gcc/config/rs6000/rs6000-protos.h      |   4 +-
 gcc/config/rs6000/rs6000.c             |  82 ++--
 gcc/config/rx/rx-protos.h              |   2 +-
 gcc/config/rx/rx.c                     |   2 +-
 gcc/config/s390/s390-protos.h          |   8 +-
 gcc/config/s390/s390.c                 | 186 ++++----
 gcc/config/score/score.c               |   5 +-
 gcc/config/sh/sh-protos.h              |  23 +-
 gcc/config/sh/sh.c                     | 279 ++++++------
 gcc/config/sh/sh.md                    |  11 +-
 gcc/config/sh/sh_optimize_sett_clrt.cc |  12 +-
 gcc/config/sh/sh_treg_combine.cc       |  35 +-
 gcc/config/sparc/sparc-protos.h        |  20 +-
 gcc/config/sparc/sparc.c               |  68 +--
 gcc/config/spu/spu.c                   |  67 +--
 gcc/config/spu/spu.md                  |   4 +-
 gcc/config/stormy16/stormy16.c         |   6 +-
 gcc/config/tilegx/tilegx-protos.h      |   8 +-
 gcc/config/tilegx/tilegx.c             |  93 ++--
 gcc/config/tilepro/tilepro-protos.h    |   8 +-
 gcc/config/tilepro/tilepro.c           |  89 ++--
 gcc/config/v850/v850-protos.h          |   2 +-
 gcc/config/v850/v850.c                 |  30 +-
 gcc/config/xtensa/xtensa-protos.h      |   2 +-
 gcc/config/xtensa/xtensa.c             |  23 +-
 gcc/coretypes.h                        |  19 +
 gcc/cprop.c                            |  54 +--
 gcc/cse.c                              | 121 +++---
 gcc/cselib.c                           |  24 +-
 gcc/cselib.h                           |  12 +-
 gcc/dbxout.c                           |   8 +-
 gcc/dce.c                              |  46 +-
 gcc/ddg.c                              |  28 +-
 gcc/ddg.h                              |   8 +-
 gcc/debug.c                            |   9 +-
 gcc/debug.h                            |   8 +-
 gcc/df-core.c                          |  24 +-
 gcc/df-problems.c                      |  67 +--
 gcc/df-scan.c                          |  49 +--
 gcc/df.h                               |  64 +--
 gcc/doc/tm.texi                        |  42 +-
 gcc/dse.c                              |  26 +-
 gcc/dwarf2cfi.c                        |  79 ++--
 gcc/dwarf2out.c                        |  30 +-
 gcc/emit-rtl.c                         | 588 ++++++++++++++-----------
 gcc/emit-rtl.h                         |  12 +-
 gcc/except.c                           |  80 ++--
 gcc/except.h                           |   4 +-
 gcc/explow.c                           |  30 +-
 gcc/expmed.c                           |  61 +--
 gcc/expr.c                             |  84 ++--
 gcc/expr.h                             |   8 +-
 gcc/final.c                            | 168 ++++----
 gcc/function.c                         |  93 ++--
 gcc/function.h                         |  26 +-
 gcc/fwprop.c                           |  40 +-
 gcc/gcse.c                             | 108 ++---
 gcc/genattr.c                          |  10 +-
 gcc/genattrtab.c                       |  13 +-
 gcc/genautomata.c                      |  12 +-
 gcc/genconditions.c                    |   2 +-
 gcc/genemit.c                          |   8 +-
 gcc/gengenrtl.c                        |   4 +-
 gcc/genoutput.c                        |   4 +-
 gcc/genpeep.c                          |   5 +-
 gcc/genrecog.c                         |  29 +-
 gcc/haifa-sched.c                      | 572 +++++++++++++------------
 gcc/hooks.c                            |  16 +-
 gcc/hooks.h                            |   8 +-
 gcc/hw-doloop.c                        |  13 +-
 gcc/hw-doloop.h                        |   6 +-
 gcc/ifcvt.c                            | 218 +++++-----
 gcc/init-regs.c                        |   4 +-
 gcc/insn-addr.h                        |   2 +-
 gcc/internal-fn.c                      |  33 +-
 gcc/ira-build.c                        |  10 +-
 gcc/ira-conflicts.c                    |  10 +-
 gcc/ira-costs.c                        |  13 +-
 gcc/ira-emit.c                         |  27 +-
 gcc/ira-int.h                          |   8 +-
 gcc/ira-lives.c                        |   8 +-
 gcc/ira.c                              |  64 +--
 gcc/ira.h                              |   2 +-
 gcc/is-a.h                             |  24 ++
 gcc/jump.c                             |  65 +--
 gcc/lists.c                            |  70 +--
 gcc/loop-doloop.c                      |  19 +-
 gcc/loop-invariant.c                   |  27 +-
 gcc/loop-iv.c                          |  42 +-
 gcc/loop-unroll.c                      |  59 +--
 gcc/lower-subreg.c                     |  49 ++-
 gcc/lra-assigns.c                      |   2 +-
 gcc/lra-coalesce.c                     |  21 +-
 gcc/lra-constraints.c                  | 138 +++---
 gcc/lra-eliminations.c                 |  12 +-
 gcc/lra-int.h                          |  34 +-
 gcc/lra-lives.c                        |   2 +-
 gcc/lra-spills.c                       |   9 +-
 gcc/lra.c                              |  84 ++--
 gcc/mode-switching.c                   |  21 +-
 gcc/modulo-sched.c                     |  64 +--
 gcc/optabs.c                           | 161 ++++---
 gcc/output.h                           |  18 +-
 gcc/postreload-gcse.c                  |  66 +--
 gcc/postreload.c                       |  56 +--
 gcc/predict.c                          |  18 +-
 gcc/predict.h                          |   2 +-
 gcc/print-rtl.c                        |  24 +-
 gcc/recog.c                            |  39 +-
 gcc/recog.h                            |   2 +-
 gcc/ree.c                              |  45 +-
 gcc/reg-stack.c                        |  89 ++--
 gcc/regcprop.c                         |  20 +-
 gcc/reginfo.c                          |  10 +-
 gcc/regrename.c                        |  22 +-
 gcc/regrename.h                        |   2 +-
 gcc/regstat.c                          |   4 +-
 gcc/reload.c                           |  39 +-
 gcc/reload.h                           |  14 +-
 gcc/reload1.c                          | 217 +++++-----
 gcc/reorg.c                            | 463 ++++++++++----------
 gcc/resource.c                         |  91 ++--
 gcc/resource.h                         |   8 +-
 gcc/rtl.h                              | 757 +++++++++++++++++++++++++++------
 gcc/rtlanal.c                          | 136 +++---
 gcc/sched-deps.c                       | 215 +++++-----
 gcc/sched-ebb.c                        |  60 +--
 gcc/sched-int.h                        | 147 +++----
 gcc/sched-rgn.c                        | 110 ++---
 gcc/sched-vis.c                        |  25 +-
 gcc/sdbout.c                           |   6 +-
 gcc/sel-sched-dump.c                   |   8 +-
 gcc/sel-sched-dump.h                   |   2 +-
 gcc/sel-sched-ir.c                     | 135 +++---
 gcc/sel-sched-ir.h                     |  88 ++--
 gcc/sel-sched.c                        |  89 ++--
 gcc/shrink-wrap.c                      |  29 +-
 gcc/shrink-wrap.h                      |  14 +-
 gcc/stack-ptr-mod.c                    |   2 +-
 gcc/stmt.c                             |   4 +-
 gcc/store-motion.c                     |  70 +--
 gcc/target.def                         |  58 +--
 gcc/targhooks.c                        |   2 +-
 gcc/targhooks.h                        |   2 +-
 gcc/tree-cfg.c                         |  14 +
 gcc/tree-outof-ssa.c                   |   4 +-
 gcc/tree-ssa-loop-ivopts.c             |   8 +-
 gcc/valtrack.c                         |  13 +-
 gcc/valtrack.h                         |   2 +-
 gcc/var-tracking.c                     |  59 +--
 gcc/varasm.c                           |  11 +-
 gcc/vmsdbgout.c                        |   4 +-
 gcc/web.c                              |   4 +-
 223 files changed, 6733 insertions(+), 5524 deletions(-)

-- 
1.8.5.3

[PATCH 009/236] Replace BB_HEAD et al macros with functions

[David Malcolm]

This is further scaffolding; convert the BB_* and SET_BB_* macros
into functions.  Convert the BB_* rvalue-style functions into returning
rtx_insn * rather than plain rtx.

For now, this is done by adding a checked cast, but this will eventually
become a field lookup.  The lvalue form for now returns an rtx& to allow
in-place modification.

gcc/
	* basic-block.h (BB_HEAD): Convert to a function.  Strengthen the
	return type from rtx to rtx_insn *.
	(BB_END): Likewise.
	(BB_HEADER): Likewise.
	(BB_FOOTER): Likewise.
	(SET_BB_HEAD): Convert to a function.
	(SET_BB_END): Likewise.
	(SET_BB_HEADER): Likewise.
	(SET_BB_FOOTER): Likewise.

	* cfgrtl.c (BB_HEAD): New function, from macro of same name.
	Strengthen the return type from rtx to rtx_insn *.  For now, this
	is done by adding a checked cast, but this will eventually
	become a field lookup.
	(BB_END): Likewise.
	(BB_HEADER): Likewise.
	(BB_FOOTER): Likewise.
	(SET_BB_HEAD): New function, from macro of same name.  This is
	intended for use as an lvalue, and so returns an rtx& to allow
	in-place modification.
	(SET_BB_END): Likewise.
	(SET_BB_HEADER): Likewise.
	(SET_BB_FOOTER): Likewise.
---
 gcc/basic-block.h | 26 ++++++++++++++----------
 gcc/cfgrtl.c      | 60 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 75 insertions(+), 11 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index d27f498..82dbfe9 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -368,17 +368,21 @@ struct GTY(()) control_flow_graph {
 \f
 /* Stuff for recording basic block info.  */
 
-/* These macros are currently split into two:
-   one suitable for reading, and for writing.
-   These will become functions in a follow-up patch.  */
-#define BB_HEAD(B)      (((const_basic_block)B)->il.x.head_)
-#define SET_BB_HEAD(B)  (B)->il.x.head_
-#define BB_END(B)       (((const rtl_bb_info *)(B)->il.x.rtl)->end_)
-#define SET_BB_END(B)   (B)->il.x.rtl->end_
-#define BB_HEADER(B)    (((const rtl_bb_info *)(B)->il.x.rtl)->header_)
-#define SET_BB_HEADER(B) (B)->il.x.rtl->header_
-#define BB_FOOTER(B)    (((const rtl_bb_info *)(B)->il.x.rtl)->footer_)
-#define SET_BB_FOOTER(B) (B)->il.x.rtl->footer_
+/* For now, these will be functions (so that they can include checked casts
+   to rtx_insn.   Once the underlying fields are converted from rtx
+   to rtx_insn, these can be converted back to macros.  */
+
+extern rtx_insn *BB_HEAD (const_basic_block bb);
+extern rtx& SET_BB_HEAD (basic_block bb);
+
+extern rtx_insn *BB_END (const_basic_block bb);
+extern rtx& SET_BB_END (basic_block bb);
+
+extern rtx_insn *BB_HEADER (const_basic_block bb);
+extern rtx& SET_BB_HEADER (basic_block bb);
+
+extern rtx_insn *BB_FOOTER (const_basic_block bb);
+extern rtx& SET_BB_FOOTER (basic_block bb);
 
 /* Special block numbers [markers] for entry and exit.
    Neither of them is supposed to hold actual statements.  */
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 026fb48..5f2879e 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -5094,4 +5094,64 @@ struct cfg_hooks cfg_layout_rtl_cfg_hooks = {
   rtl_account_profile_record,
 };
 
+/* BB_HEAD as an rvalue. */
+
+rtx_insn *BB_HEAD (const_basic_block bb)
+{
+  rtx insn = bb->il.x.head_;
+  return as_a_nullable <rtx_insn *> (insn);
+}
+
+/* BB_HEAD for use as an lvalue. */
+
+rtx& SET_BB_HEAD (basic_block bb)
+{
+  return bb->il.x.head_;
+}
+
+/* BB_END as an rvalue. */
+
+rtx_insn *BB_END (const_basic_block bb)
+{
+  rtx insn = bb->il.x.rtl->end_;
+  return as_a_nullable <rtx_insn *> (insn);
+}
+
+/* BB_END as an lvalue. */
+
+rtx& SET_BB_END (basic_block bb)
+{
+  return bb->il.x.rtl->end_;
+}
+
+/* BB_HEADER as an rvalue. */
+
+rtx_insn *BB_HEADER (const_basic_block bb)
+{
+  rtx insn = bb->il.x.rtl->header_;
+  return as_a_nullable <rtx_insn *> (insn);
+}
+
+/* BB_HEADER as an lvalue. */
+
+rtx& SET_BB_HEADER (basic_block bb)
+{
+  return bb->il.x.rtl->header_;
+}
+
+/* BB_FOOTER as an rvalue. */
+
+rtx_insn *BB_FOOTER (const_basic_block bb)
+{
+  rtx insn = bb->il.x.rtl->footer_;
+  return as_a_nullable <rtx_insn *> (insn);
+}
+
+/* BB_FOOTER as an lvalue. */
+
+rtx& SET_BB_FOOTER (basic_block bb)
+{
+  return bb->il.x.rtl->footer_;
+}
+
 #include "gt-cfgrtl.h"
-- 
1.8.5.3

Re: [PATCH 009/236] Replace BB_HEAD et al macros with functions

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> This is further scaffolding; convert the BB_* and SET_BB_* macros
> into functions.  Convert the BB_* rvalue-style functions into returning
> rtx_insn * rather than plain rtx.
>
> For now, this is done by adding a checked cast, but this will eventually
> become a field lookup.  The lvalue form for now returns an rtx& to allow
> in-place modification.
>
> gcc/
> 	* basic-block.h (BB_HEAD): Convert to a function.  Strengthen the
> 	return type from rtx to rtx_insn *.
> 	(BB_END): Likewise.
> 	(BB_HEADER): Likewise.
> 	(BB_FOOTER): Likewise.
> 	(SET_BB_HEAD): Convert to a function.
> 	(SET_BB_END): Likewise.
> 	(SET_BB_HEADER): Likewise.
> 	(SET_BB_FOOTER): Likewise.
>
> 	* cfgrtl.c (BB_HEAD): New function, from macro of same name.
> 	Strengthen the return type from rtx to rtx_insn *.  For now, this
> 	is done by adding a checked cast, but this will eventually
> 	become a field lookup.
> 	(BB_END): Likewise.
> 	(BB_HEADER): Likewise.
> 	(BB_FOOTER): Likewise.
> 	(SET_BB_HEAD): New function, from macro of same name.  This is
> 	intended for use as an lvalue, and so returns an rtx& to allow
> 	in-place modification.
> 	(SET_BB_END): Likewise.
> 	(SET_BB_HEADER): Likewise.
> 	(SET_BB_FOOTER): Likewise.
OK.
Jeff

Re: [PATCH 009/236] Replace BB_HEAD et al macros with functions

[David Malcolm]

On Tue, 2014-08-12 at 15:16 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > This is further scaffolding; convert the BB_* and SET_BB_* macros
> > into functions.  Convert the BB_* rvalue-style functions into returning
> > rtx_insn * rather than plain rtx.
> >
> > For now, this is done by adding a checked cast, but this will eventually
> > become a field lookup.  The lvalue form for now returns an rtx& to allow
> > in-place modification.
> >
> > gcc/
> > 	* basic-block.h (BB_HEAD): Convert to a function.  Strengthen the
> > 	return type from rtx to rtx_insn *.
> > 	(BB_END): Likewise.
> > 	(BB_HEADER): Likewise.
> > 	(BB_FOOTER): Likewise.
> > 	(SET_BB_HEAD): Convert to a function.
> > 	(SET_BB_END): Likewise.
> > 	(SET_BB_HEADER): Likewise.
> > 	(SET_BB_FOOTER): Likewise.
> >
> > 	* cfgrtl.c (BB_HEAD): New function, from macro of same name.
> > 	Strengthen the return type from rtx to rtx_insn *.  For now, this
> > 	is done by adding a checked cast, but this will eventually
> > 	become a field lookup.
> > 	(BB_END): Likewise.
> > 	(BB_HEADER): Likewise.
> > 	(BB_FOOTER): Likewise.
> > 	(SET_BB_HEAD): New function, from macro of same name.  This is
> > 	intended for use as an lvalue, and so returns an rtx& to allow
> > 	in-place modification.
> > 	(SET_BB_END): Likewise.
> > 	(SET_BB_HEADER): Likewise.
> > 	(SET_BB_FOOTER): Likewise.
> OK.

Committed to trunk as r214126, having bootstrapped&regrtested on
x86_64-unknown-linux-gnu (Fedora 20) albeit in combination with patches
9-29 [1], and verified it builds by itself with targets
x86_64-unknown-linux-gnu, c6x-elf and ia64-elf.

Note that these functions get converted back to macros in patches #158
(BB_FOOTER) and #178 (the others).

Dave

[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html

[BUILDROBOT][PATCH] frv-linux fallout (was: [PATCH 009/236] Replace BB_HEAD et al macros with functions)

[Jan-Benedict Glaw]

[-- Attachment #1: Type: text/plain, Size: 5604 bytes --]

On Wed, 2014-08-06 13:19:48 -0400, David Malcolm <dmalcolm@redhat.com> wrote:
> This is further scaffolding; convert the BB_* and SET_BB_* macros
> into functions.  Convert the BB_* rvalue-style functions into returning
> rtx_insn * rather than plain rtx.
[...]

This gave some fallout for frv-linux (see eg. build
http://toolchain.lug-owl.de/buildbot/show_build_details.php?id=345281): 

g++ -c   -g -O2 -DIN_GCC  -DCROSS_DIRECTORY_STRUCTURE  -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -fno-common  -DHAVE_CONFIG_H -I. -I. -I/home/vaxbuild/repos/gcc/gcc -I/home/vaxbuild/repos/gcc/gcc/. -I/home/vaxbuild/repos/gcc/gcc/../include -I/home/vaxbuild/repos/gcc/gcc/../libcpp/include  -I/home/vaxbuild/repos/gcc/gcc/../libdecnumber -I/home/vaxbuild/repos/gcc/gcc/../libdecnumber/dpd -I../libdecnumber -I/home/vaxbuild/repos/gcc/gcc/../libbacktrace    -o ifcvt.o -MT ifcvt.o -MMD -MP -MF ./.deps/ifcvt.TPo /home/vaxbuild/repos/gcc/gcc/ifcvt.c
In file included from ./tm.h:23:0,
                 from /home/vaxbuild/repos/gcc/gcc/ifcvt.c:23:
/home/vaxbuild/repos/gcc/gcc/ifcvt.c: In function ‘int cond_exec_process_insns(ce_if_block*, rtx, rtx, rtx, int, int)’:
/home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1964:58: error: ‘frv_ifcvt_modify_insn’ was not declared in this scope
 (PATTERN) = frv_ifcvt_modify_insn (CE_INFO, PATTERN, INSN)
                                                          ^
/home/vaxbuild/repos/gcc/gcc/ifcvt.c:408:7: note: in expansion of macro ‘IFCVT_MODIFY_INSN’
       IFCVT_MODIFY_INSN (ce_info, pattern, insn);
       ^
/home/vaxbuild/repos/gcc/gcc/ifcvt.c: In function ‘int cond_exec_process_if_block(ce_if_block*, int)’:
/home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1948:57: error: ‘frv_ifcvt_modify_tests’ was not declared in this scope
 frv_ifcvt_modify_tests (CE_INFO, &TRUE_EXPR, &FALSE_EXPR)
                                                         ^
/home/vaxbuild/repos/gcc/gcc/ifcvt.c:613:3: note: in expansion of macro ‘IFCVT_MODIFY_TESTS’
   IFCVT_MODIFY_TESTS (ce_info, true_expr, false_expr);
   ^
/home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1957:70: error: ‘frv_ifcvt_modify_multiple_tests’ was not declared in this scope
 frv_ifcvt_modify_multiple_tests (CE_INFO, BB, &TRUE_EXPR, &FALSE_EXPR)
                                                                      ^
/home/vaxbuild/repos/gcc/gcc/ifcvt.c:686:4: note: in expansion of macro ‘IFCVT_MODIFY_MULTIPLE_TESTS’
    IFCVT_MODIFY_MULTIPLE_TESTS (ce_info, bb, t, f);
    ^
/home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1974:70: error: ‘frv_ifcvt_modify_cancel’ was not declared in this scope
 #define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO)
                                                                      ^
/home/vaxbuild/repos/gcc/gcc/ifcvt.c:724:7: note: in expansion of macro ‘IFCVT_MODIFY_CANCEL’
       IFCVT_MODIFY_CANCEL (ce_info);
       ^
/home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1969:68: error: ‘frv_ifcvt_modify_final’ was not declared in this scope
 #define IFCVT_MODIFY_FINAL(CE_INFO) frv_ifcvt_modify_final (CE_INFO)
                                                                    ^
/home/vaxbuild/repos/gcc/gcc/ifcvt.c:731:3: note: in expansion of macro ‘IFCVT_MODIFY_FINAL’
   IFCVT_MODIFY_FINAL (ce_info);
   ^
/home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1974:70: error: ‘frv_ifcvt_modify_cancel’ was not declared in this scope
 #define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO)
                                                                      ^
/home/vaxbuild/repos/gcc/gcc/ifcvt.c:761:3: note: in expansion of macro ‘IFCVT_MODIFY_CANCEL’
   IFCVT_MODIFY_CANCEL (ce_info);
   ^
Makefile:1064: recipe for target 'ifcvt.o' failed





This is because the macro-implementing functions are declared in
frv-protos.h iff BB_HEAD is define'd.  Is this okay to apply?



2014-08-23  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
	* config/frv/frv-protos.h (frv_ifcvt_init_extra_fields): Declare
	unconditionally.
	(frv_ifcvt_modify_tests): Ditto.
	(frv_ifcvt_modify_multiple_tests): Ditto.
	(frv_ifcvt_modify_insn): Ditto.
	(frv_ifcvt_modify_final): Ditto.
	(frv_ifcvt_modify_cancel): Ditto.

diff --git a/gcc/config/frv/frv-protos.h b/gcc/config/frv/frv-protos.h
index d50ca64..c689813 100644
--- a/gcc/config/frv/frv-protos.h
+++ b/gcc/config/frv/frv-protos.h
@@ -61,7 +61,6 @@ extern rtx frv_split_minmax		(rtx *);
 extern rtx frv_split_abs		(rtx *);
 extern void frv_split_double_load	(rtx, rtx);
 extern void frv_split_double_store	(rtx, rtx);
-#ifdef BB_HEAD
 extern void frv_ifcvt_init_extra_fields	(ce_if_block *);
 extern void frv_ifcvt_modify_tests	(ce_if_block *, rtx *, rtx *);
 extern void frv_ifcvt_modify_multiple_tests
@@ -70,7 +69,6 @@ extern void frv_ifcvt_modify_multiple_tests
 extern rtx frv_ifcvt_modify_insn	(ce_if_block *, rtx, rtx);
 extern void frv_ifcvt_modify_final	(ce_if_block *);
 extern void frv_ifcvt_modify_cancel	(ce_if_block *);
-#endif
 extern enum reg_class frv_secondary_reload_class
 					(enum reg_class,
 					 enum machine_mode, rtx);

-- 
      Jan-Benedict Glaw      jbglaw@lug-owl.de              +49-172-7608481
 Signature of:                            If it doesn't work, force it.
 the second  :                   If it breaks, it needed replacing anyway.

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 198 bytes --]

Re: [BUILDROBOT][PATCH] frv-linux fallout (was: [PATCH 009/236] Replace BB_HEAD et al macros with functions)

[David Malcolm]

On Sat, 2014-08-23 at 20:49 +0200, Jan-Benedict Glaw wrote:
> On Wed, 2014-08-06 13:19:48 -0400, David Malcolm <dmalcolm@redhat.com> wrote:
> > This is further scaffolding; convert the BB_* and SET_BB_* macros
> > into functions.  Convert the BB_* rvalue-style functions into returning
> > rtx_insn * rather than plain rtx.
> [...]
> 
> This gave some fallout for frv-linux (see eg. build
> http://toolchain.lug-owl.de/buildbot/show_build_details.php?id=345281): 
> 
> g++ -c   -g -O2 -DIN_GCC  -DCROSS_DIRECTORY_STRUCTURE  -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -fno-common  -DHAVE_CONFIG_H -I. -I. -I/home/vaxbuild/repos/gcc/gcc -I/home/vaxbuild/repos/gcc/gcc/. -I/home/vaxbuild/repos/gcc/gcc/../include -I/home/vaxbuild/repos/gcc/gcc/../libcpp/include  -I/home/vaxbuild/repos/gcc/gcc/../libdecnumber -I/home/vaxbuild/repos/gcc/gcc/../libdecnumber/dpd -I../libdecnumber -I/home/vaxbuild/repos/gcc/gcc/../libbacktrace    -o ifcvt.o -MT ifcvt.o -MMD -MP -MF ./.deps/ifcvt.TPo /home/vaxbuild/repos/gcc/gcc/ifcvt.c
> In file included from ./tm.h:23:0,
>                  from /home/vaxbuild/repos/gcc/gcc/ifcvt.c:23:
> /home/vaxbuild/repos/gcc/gcc/ifcvt.c: In function ‘int cond_exec_process_insns(ce_if_block*, rtx, rtx, rtx, int, int)’:
> /home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1964:58: error: ‘frv_ifcvt_modify_insn’ was not declared in this scope
>  (PATTERN) = frv_ifcvt_modify_insn (CE_INFO, PATTERN, INSN)
>                                                           ^
> /home/vaxbuild/repos/gcc/gcc/ifcvt.c:408:7: note: in expansion of macro ‘IFCVT_MODIFY_INSN’
>        IFCVT_MODIFY_INSN (ce_info, pattern, insn);
>        ^
> /home/vaxbuild/repos/gcc/gcc/ifcvt.c: In function ‘int cond_exec_process_if_block(ce_if_block*, int)’:
> /home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1948:57: error: ‘frv_ifcvt_modify_tests’ was not declared in this scope
>  frv_ifcvt_modify_tests (CE_INFO, &TRUE_EXPR, &FALSE_EXPR)
>                                                          ^
> /home/vaxbuild/repos/gcc/gcc/ifcvt.c:613:3: note: in expansion of macro ‘IFCVT_MODIFY_TESTS’
>    IFCVT_MODIFY_TESTS (ce_info, true_expr, false_expr);
>    ^
> /home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1957:70: error: ‘frv_ifcvt_modify_multiple_tests’ was not declared in this scope
>  frv_ifcvt_modify_multiple_tests (CE_INFO, BB, &TRUE_EXPR, &FALSE_EXPR)
>                                                                       ^
> /home/vaxbuild/repos/gcc/gcc/ifcvt.c:686:4: note: in expansion of macro ‘IFCVT_MODIFY_MULTIPLE_TESTS’
>     IFCVT_MODIFY_MULTIPLE_TESTS (ce_info, bb, t, f);
>     ^
> /home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1974:70: error: ‘frv_ifcvt_modify_cancel’ was not declared in this scope
>  #define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO)
>                                                                       ^
> /home/vaxbuild/repos/gcc/gcc/ifcvt.c:724:7: note: in expansion of macro ‘IFCVT_MODIFY_CANCEL’
>        IFCVT_MODIFY_CANCEL (ce_info);
>        ^
> /home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1969:68: error: ‘frv_ifcvt_modify_final’ was not declared in this scope
>  #define IFCVT_MODIFY_FINAL(CE_INFO) frv_ifcvt_modify_final (CE_INFO)
>                                                                     ^
> /home/vaxbuild/repos/gcc/gcc/ifcvt.c:731:3: note: in expansion of macro ‘IFCVT_MODIFY_FINAL’
>    IFCVT_MODIFY_FINAL (ce_info);
>    ^
> /home/vaxbuild/repos/gcc/gcc/config/frv/frv.h:1974:70: error: ‘frv_ifcvt_modify_cancel’ was not declared in this scope
>  #define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO)
>                                                                       ^
> /home/vaxbuild/repos/gcc/gcc/ifcvt.c:761:3: note: in expansion of macro ‘IFCVT_MODIFY_CANCEL’
>    IFCVT_MODIFY_CANCEL (ce_info);
>    ^
> Makefile:1064: recipe for target 'ifcvt.o' failed
> 
> 
> 
> 
> 
> This is because the macro-implementing functions are declared in
> frv-protos.h iff BB_HEAD is define'd.  Is this okay to apply?


Bother.   Sorry about this.

FWIW, BB_HEAD becomes a macro again at patch #178 of the series.

In hindsight, how I've been committing the rtx-classes work is, ahem,
suboptimal.  I'm testing and committing individual patches, but this
could have gone into trunk in one go.

I got it into my head that this could either be an svn branch, *or* be
rebased repeatedly in git until it's ready to go in... but I now think
this is a false dichotomy: what I realize now is that I should have
continued rebasing my patches in git until they were ready to go... but
then committed them to a svn branch, with a ChangeLog.rtx-classes, and
*immediately* merged that branch to trunk.  This would have given the
best of both approaches: the flexibility and resilience against bitrot
of the git rebase approach, but also with the atomicity of the merge to
trunk, and with the whole thing scripted.
 
It's too late now to switch to this approach, so in the meantime I've
been working on ways to make my bootstraps as fast as possible.

Sorry again
Dave


> 2014-08-23  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
> 	* config/frv/frv-protos.h (frv_ifcvt_init_extra_fields): Declare
> 	unconditionally.
> 	(frv_ifcvt_modify_tests): Ditto.
> 	(frv_ifcvt_modify_multiple_tests): Ditto.
> 	(frv_ifcvt_modify_insn): Ditto.
> 	(frv_ifcvt_modify_final): Ditto.
> 	(frv_ifcvt_modify_cancel): Ditto.
> 
> diff --git a/gcc/config/frv/frv-protos.h b/gcc/config/frv/frv-protos.h
> index d50ca64..c689813 100644
> --- a/gcc/config/frv/frv-protos.h
> +++ b/gcc/config/frv/frv-protos.h
> @@ -61,7 +61,6 @@ extern rtx frv_split_minmax		(rtx *);
>  extern rtx frv_split_abs		(rtx *);
>  extern void frv_split_double_load	(rtx, rtx);
>  extern void frv_split_double_store	(rtx, rtx);
> -#ifdef BB_HEAD
>  extern void frv_ifcvt_init_extra_fields	(ce_if_block *);
>  extern void frv_ifcvt_modify_tests	(ce_if_block *, rtx *, rtx *);
>  extern void frv_ifcvt_modify_multiple_tests
> @@ -70,7 +69,6 @@ extern void frv_ifcvt_modify_multiple_tests
>  extern rtx frv_ifcvt_modify_insn	(ce_if_block *, rtx, rtx);
>  extern void frv_ifcvt_modify_final	(ce_if_block *);
>  extern void frv_ifcvt_modify_cancel	(ce_if_block *);
> -#endif
>  extern enum reg_class frv_secondary_reload_class
>  					(enum reg_class,
>  					 enum machine_mode, rtx);
> 

Re: [BUILDROBOT][PATCH] frv-linux fallout (was: [PATCH 009/236] Replace BB_HEAD et al macros with functions)

[Mike Stump]

On Aug 25, 2014, at 7:08 AM, David Malcolm <dmalcolm@redhat.com> wrote:
> 
> I'm testing and committing individual patches, but this
> could have gone into trunk in one go.

Yeah, it’s a hard choice between bit rot and incrementally going in.

> what I realize now is that I should have
> continued rebasing my patches in git until they were ready to go... but
> then committed them to a svn branch, with a ChangeLog.rtx-classes, and
> *immediately* merged that branch to trunk.

If you go all in at once, you forgot to list the build just after checkin.  :-)  Most work doesn’t require it, but for larger work, it is nice to build post checkin and resolve build errors, if any, when there are any changes from trunk post the last build.

> It's too late now to switch to this approach, so in the meantime I've
> been working on ways to make my bootstraps as fast as possible.

-j64 works wonders.  :-)  Though, it is annoying watching the build run at 98% idle.

Re: [BUILDROBOT][PATCH] frv-linux fallout (was: [PATCH 009/236] Replace BB_HEAD et al macros with functions)

[Steven Bosscher]

On Mon, Aug 25, 2014 at 9:29 PM, Mike Stump wrote:
> On Aug 25, 2014, at 7:08 AM, David Malcolm wrote:
>> It's too late now to switch to this approach, so in the meantime I've
>> been working on ways to make my bootstraps as fast as possible.
>
> -j64 works wonders.  :-)  Though, it is annoying watching the build run at 98% idle.

And genautomata just sits there... waiting... waiting... wai......

Ciao!
Steven

Re: [BUILDROBOT][PATCH] frv-linux fallout (was: [PATCH 009/236] Replace BB_HEAD et al macros with functions)

[Mike Stump]

On Aug 25, 2014, at 12:45 PM, Steven Bosscher <stevenb.gcc@gmail.com> wrote:
> On Mon, Aug 25, 2014 at 9:29 PM, Mike Stump wrote:
>> On Aug 25, 2014, at 7:08 AM, David Malcolm wrote:
>>> It's too late now to switch to this approach, so in the meantime I've
>>> been working on ways to make my bootstraps as fast as possible.
>> 
>> -j64 works wonders.  :-)  Though, it is annoying watching the build run at 98% idle.
> 
> And genautomata just sits there... waiting... waiting... wai……

Sometimes I want it to run first, sometimes I want it to run last.  :-(  When the build will work, I want it first.  When it fails for any other reason, I want it last.  Can anyone else think of a way to order these guys (apart from a filsystem change hook that is wired into make and auto-rebuilds in the background)?  I haven’t yet found anything I like.

[PATCH 002/236] JUMP_LABEL is not always a LABEL

[David Malcolm]

gcc/
	* rtl.h (JUMP_LABEL): Add a note that this isn't always a LABEL.
---
 gcc/rtl.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/gcc/rtl.h b/gcc/rtl.h
index 51cfae5..b9b069a 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -1194,7 +1194,11 @@ enum label_kind
 
 /* In jump.c, each JUMP_INSN can point to a label that it can jump to,
    so that if the JUMP_INSN is deleted, the label's LABEL_NUSES can
-   be decremented and possibly the label can be deleted.  */
+   be decremented and possibly the label can be deleted.
+
+   This is not always a LABEL; for example in combine.c, this field
+   does double duty for storing notes, and in shrink-wrap.c it can
+   be set to simple_return_rtx, a SIMPLE_RETURN.  */
 #define JUMP_LABEL(INSN)   XCEXP (INSN, 7, JUMP_INSN)
 
 /* Once basic blocks are found, each CODE_LABEL starts a chain that
-- 
1.8.5.3

Re: [PATCH 002/236] JUMP_LABEL is not always a LABEL

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> gcc/
> 	* rtl.h (JUMP_LABEL): Add a note that this isn't always a LABEL.
Egad.  I would assert that both combine & shrink-wrap shouldn't be doing 
that (without looking at either to see why they're doing what they're 
doing).

Approved.  Again, this probably should have gone forward independently 
of the rtx class work.


jeff

[PATCH 006/236] Introduce rtx_insn subclass of rtx_def

[David Malcolm]

gcc/
	* coretypes.h (class rtx_insn): Add forward declaration.

	* rtl.h: Include is-a.h
	(struct rtx_def): Add dummy "desc" and "tag" GTY options as a
	workaround to ensure gengtype knows inheritance is occurring,
	whilst continuing to use the pre-existing special-casing for
	rtx_def.
	(class rtx_insn): New subclass of rtx_def, adding the
	invariant that we're dealing with something we can sanely use INSN_UID,
	NEXT_INSN, PREV_INSN on.
	(is_a_helper <rtx_insn *>::test): New.
	(is_a_helper <const rtx_insn *>::test): New.
---
 gcc/coretypes.h |  7 +++++++
 gcc/rtl.h       | 60 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 66 insertions(+), 1 deletion(-)

diff --git a/gcc/coretypes.h b/gcc/coretypes.h
index bbb5150..f22b980 100644
--- a/gcc/coretypes.h
+++ b/gcc/coretypes.h
@@ -55,6 +55,13 @@ typedef const struct simple_bitmap_def *const_sbitmap;
 struct rtx_def;
 typedef struct rtx_def *rtx;
 typedef const struct rtx_def *const_rtx;
+
+/* Subclasses of rtx_def, using indentation to show the class
+   hierarchy.
+   Where possible, keep this list in the same order as in rtl.def.  */
+class rtx_def;
+  class rtx_insn;
+
 struct rtvec_def;
 typedef struct rtvec_def *rtvec;
 typedef const struct rtvec_def *const_rtvec;
diff --git a/gcc/rtl.h b/gcc/rtl.h
index b9b069a..0858230 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -31,6 +31,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "hashtab.h"
 #include "wide-int.h"
 #include "flags.h"
+#include "is-a.h"
 
 /* Value used by some passes to "recognize" noop moves as valid
  instructions.  */
@@ -266,7 +267,21 @@ struct GTY((variable_size)) hwivec_def {
 
 /* RTL expression ("rtx").  */
 
-struct GTY((chain_next ("RTX_NEXT (&%h)"),
+/* The GTY "desc" and "tag" options below are a kludge: we need a desc
+   field for for gengtype to recognize that inheritance is occurring,
+   so that all subclasses are redirected to the traversal hook for the
+   base class.
+   However, all of the fields are in the base class, and special-casing
+   is at work.  Hence we use desc and tag of 0, generating a switch
+   statement of the form:
+     switch (0)
+       {
+       case 0: // all the work happens here
+      }
+   in order to work with the existing special-casing in gengtype.  */
+
+struct GTY((desc("0"), tag("0"),
+	    chain_next ("RTX_NEXT (&%h)"),
 	    chain_prev ("RTX_PREV (&%h)"))) rtx_def {
   /* The kind of expression this is.  */
   ENUM_BITFIELD(rtx_code) code: 16;
@@ -387,6 +402,25 @@ struct GTY((chain_next ("RTX_NEXT (&%h)"),
   } GTY ((special ("rtx_def"), desc ("GET_CODE (&%0)"))) u;
 };
 
+class GTY(()) rtx_insn : public rtx_def
+{
+  /* No extra fields, but adds the invariant:
+
+     (INSN_P (X)
+      || NOTE_P (X)
+      || JUMP_TABLE_DATA_P (X)
+      || BARRIER_P (X)
+      || LABEL_P (X))
+
+     i.e. that we must be able to use the following:
+      INSN_UID ()
+      NEXT_INSN ()
+      PREV_INSN ()
+    i.e. we have an rtx that has an INSN_UID field and can be part of
+    a linked list of insns.
+  */
+};
+
 /* The size in bytes of an rtx header (code, mode and flags).  */
 #define RTX_HDR_SIZE offsetof (struct rtx_def, u)
 
@@ -548,6 +582,30 @@ struct GTY(()) rtvec_def {
 /* Predicate yielding nonzero iff X is a data for a jump table.  */
 #define JUMP_TABLE_DATA_P(INSN) (GET_CODE (INSN) == JUMP_TABLE_DATA)
 
+template <>
+template <>
+inline bool
+is_a_helper <rtx_insn *>::test (rtx rt)
+{
+  return (INSN_P (rt)
+	  || NOTE_P (rt)
+	  || JUMP_TABLE_DATA_P (rt)
+	  || BARRIER_P (rt)
+	  || LABEL_P (rt));
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <const rtx_insn *>::test (const_rtx rt)
+{
+  return (INSN_P (rt)
+	  || NOTE_P (rt)
+	  || JUMP_TABLE_DATA_P (rt)
+	  || BARRIER_P (rt)
+	  || LABEL_P (rt));
+}
+
 /* Predicate yielding nonzero iff X is a return or simple_return.  */
 #define ANY_RETURN_P(X) \
   (GET_CODE (X) == RETURN || GET_CODE (X) == SIMPLE_RETURN)
-- 
1.8.5.3

Re: [PATCH 006/236] Introduce rtx_insn subclass of rtx_def

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> gcc/
> 	* coretypes.h (class rtx_insn): Add forward declaration.
>
> 	* rtl.h: Include is-a.h
> 	(struct rtx_def): Add dummy "desc" and "tag" GTY options as a
> 	workaround to ensure gengtype knows inheritance is occurring,
> 	whilst continuing to use the pre-existing special-casing for
> 	rtx_def.
> 	(class rtx_insn): New subclass of rtx_def, adding the
> 	invariant that we're dealing with something we can sanely use INSN_UID,
> 	NEXT_INSN, PREV_INSN on.
> 	(is_a_helper <rtx_insn *>::test): New.
> 	(is_a_helper <const rtx_insn *>::test): New.
OK.
Jeff

Re: [PATCH 006/236] Introduce rtx_insn subclass of rtx_def

[David Malcolm]

On Tue, 2014-08-12 at 15:06 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > gcc/
> > 	* coretypes.h (class rtx_insn): Add forward declaration.
> >
> > 	* rtl.h: Include is-a.h
> > 	(struct rtx_def): Add dummy "desc" and "tag" GTY options as a
> > 	workaround to ensure gengtype knows inheritance is occurring,
> > 	whilst continuing to use the pre-existing special-casing for
> > 	rtx_def.
> > 	(class rtx_insn): New subclass of rtx_def, adding the
> > 	invariant that we're dealing with something we can sanely use INSN_UID,
> > 	NEXT_INSN, PREV_INSN on.
> > 	(is_a_helper <rtx_insn *>::test): New.
> > 	(is_a_helper <const rtx_insn *>::test): New.
> OK.
> Jeff

Thanks; committed to trunk as r214118 (fixing up the overlong ChangeLog
line, having bootstrapped&regtested on x86_64 together with patches 2-8
of the kit as per:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html
and verified build by itself).

[PATCH 034/236] next_cc0_user and prev_cc0_setter scaffolding

[David Malcolm]

gcc/
	* rtl.h (next_cc0_user): Strengthen return type from rtx to
	rtx_insn *.
	(prev_cc0_setter): Likewise.

	* emit-rtl.c (next_cc0_user): Strengthen return type from rtx to
	rtx_insn *, adding checked casts for now as necessary.
	(prev_cc0_setter): Likewise.
---
 gcc/emit-rtl.c | 12 ++++++------
 gcc/rtl.h      |  4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 042694a..b64b276 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3437,20 +3437,20 @@ prev_active_insn (rtx insn)
 
    Return 0 if we can't find the insn.  */
 
-rtx
+rtx_insn *
 next_cc0_user (rtx insn)
 {
   rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
 
   if (note)
-    return XEXP (note, 0);
+    return as_a_nullable <rtx_insn *> (XEXP (note, 0));
 
   insn = next_nonnote_insn (insn);
   if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
     insn = XVECEXP (PATTERN (insn), 0, 0);
 
   if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
-    return insn;
+    return as_a_nullable <rtx_insn *> (insn);
 
   return 0;
 }
@@ -3458,18 +3458,18 @@ next_cc0_user (rtx insn)
 /* Find the insn that set CC0 for INSN.  Unless INSN has a REG_CC_SETTER
    note, it is the previous insn.  */
 
-rtx
+rtx_insn *
 prev_cc0_setter (rtx insn)
 {
   rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
 
   if (note)
-    return XEXP (note, 0);
+    return as_a_nullable <rtx_insn *> (XEXP (note, 0));
 
   insn = prev_nonnote_insn (insn);
   gcc_assert (sets_cc0_p (PATTERN (insn)));
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 #endif
 
diff --git a/gcc/rtl.h b/gcc/rtl.h
index d519908..b4027aa 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2418,8 +2418,8 @@ extern rtx_insn *next_real_insn (rtx);
 extern rtx_insn *prev_active_insn (rtx);
 extern rtx_insn *next_active_insn (rtx);
 extern int active_insn_p (const_rtx);
-extern rtx next_cc0_user (rtx);
-extern rtx prev_cc0_setter (rtx);
+extern rtx_insn *next_cc0_user (rtx);
+extern rtx_insn *prev_cc0_setter (rtx);
 
 /* In emit-rtl.c  */
 extern int insn_line (const_rtx);
-- 
1.8.5.3

Re: [PATCH 034/236] next_cc0_user and prev_cc0_setter scaffolding

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* rtl.h (next_cc0_user): Strengthen return type from rtx to
> 	rtx_insn *.
> 	(prev_cc0_setter): Likewise.
>
> 	* emit-rtl.c (next_cc0_user): Strengthen return type from rtx to
> 	rtx_insn *, adding checked casts for now as necessary.
> 	(prev_cc0_setter): Likewise.
OK.
jeff

Re: [PATCH 034/236] next_cc0_user and prev_cc0_setter scaffolding

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 746 bytes --]

On Wed, 2014-08-13 at 11:55 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (next_cc0_user): Strengthen return type from rtx to
> > 	rtx_insn *.
> > 	(prev_cc0_setter): Likewise.
> >
> > 	* emit-rtl.c (next_cc0_user): Strengthen return type from rtx to
> > 	rtx_insn *, adding checked casts for now as necessary.
> > 	(prev_cc0_setter): Likewise.
> OK.

Thanks.

Fixed up for as_a_nullable -> safe_as_a, and committed to trunk as
r214196, having bootstrapped&regrtested on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 30-39, and verified that
it builds standalone both for that target, and for pdp11-aout, the
latter to give coverage for HAVE_cc0.

Am attaching what I committed.

[-- Attachment #2: r214196.patch --]
[-- Type: text/x-patch, Size: 2434 bytes --]

Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214195)
+++ gcc/ChangeLog	(revision 214196)
@@ -1,5 +1,15 @@
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
 
+	* rtl.h (next_cc0_user): Strengthen return type from rtx to
+	rtx_insn *.
+	(prev_cc0_setter): Likewise.
+
+	* emit-rtl.c (next_cc0_user): Strengthen return type from rtx to
+	rtx_insn *, adding checked casts for now as necessary.
+	(prev_cc0_setter): Likewise.
+
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
 	* expr.h (emit_move_insn): Strengthen return type from rtx to
 	rtx_insn *.
 	(emit_move_insn_1): Likewise.
Index: gcc/emit-rtl.c
===================================================================
--- gcc/emit-rtl.c	(revision 214195)
+++ gcc/emit-rtl.c	(revision 214196)
@@ -3450,13 +3450,13 @@
 
    Return 0 if we can't find the insn.  */
 
-rtx
+rtx_insn *
 next_cc0_user (rtx insn)
 {
   rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
 
   if (note)
-    return XEXP (note, 0);
+    return safe_as_a <rtx_insn *> (XEXP (note, 0));
 
   insn = next_nonnote_insn (insn);
   if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
@@ -3463,7 +3463,7 @@
     insn = XVECEXP (PATTERN (insn), 0, 0);
 
   if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
-    return insn;
+    return safe_as_a <rtx_insn *> (insn);
 
   return 0;
 }
@@ -3471,18 +3471,18 @@
 /* Find the insn that set CC0 for INSN.  Unless INSN has a REG_CC_SETTER
    note, it is the previous insn.  */
 
-rtx
+rtx_insn *
 prev_cc0_setter (rtx insn)
 {
   rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
 
   if (note)
-    return XEXP (note, 0);
+    return safe_as_a <rtx_insn *> (XEXP (note, 0));
 
   insn = prev_nonnote_insn (insn);
   gcc_assert (sets_cc0_p (PATTERN (insn)));
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 #endif
 
Index: gcc/rtl.h
===================================================================
--- gcc/rtl.h	(revision 214195)
+++ gcc/rtl.h	(revision 214196)
@@ -2440,8 +2440,8 @@
 extern rtx_insn *prev_active_insn (rtx);
 extern rtx_insn *next_active_insn (rtx);
 extern int active_insn_p (const_rtx);
-extern rtx next_cc0_user (rtx);
-extern rtx prev_cc0_setter (rtx);
+extern rtx_insn *next_cc0_user (rtx);
+extern rtx_insn *prev_cc0_setter (rtx);
 
 /* In emit-rtl.c  */
 extern int insn_line (const_rtx);

[PATCH 012/236] Convert DF_REF_INSN to a function for now

[David Malcolm]

DF_REF_INSN looks up the "insn" field of the referenced df_insn_info.
This will eventually be an rtx_insn *, but for now is just an rtx.

As further scaffolding: for now, convert DF_REF_INSN to a function,
adding a checked downcast to rtx_insn *.  This can eventually be
converted back to macro when the field is an rtx_insn *.

gcc/
	* df-core.c (DF_REF_INSN): New, using a checked cast for now.
	* df.h (DF_REF_INSN): Convert from a macro to a function, so
	that we can return an rtx_insn *.

/
	* rtx-classes-status.txt: Add DF_REF_INSN.
---
 gcc/df-core.c          | 6 ++++++
 gcc/df.h               | 2 +-
 rtx-classes-status.txt | 1 +
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/gcc/df-core.c b/gcc/df-core.c
index 9fdf6010..0dd8cc4 100644
--- a/gcc/df-core.c
+++ b/gcc/df-core.c
@@ -2532,3 +2532,9 @@ debug_df_chain (struct df_link *link)
   df_chain_dump (link, stderr);
   fputc ('\n', stderr);
 }
+
+rtx_insn *DF_REF_INSN (df_ref ref)
+{
+  rtx insn = ref->base.insn_info->insn;
+  return as_a_nullable <rtx_insn *> (insn);
+}
diff --git a/gcc/df.h b/gcc/df.h
index 878f507..aabde63 100644
--- a/gcc/df.h
+++ b/gcc/df.h
@@ -647,7 +647,7 @@ struct df_d
 			: BLOCK_FOR_INSN (DF_REF_INSN (REF)))
 #define DF_REF_BBNO(REF) (DF_REF_BB (REF)->index)
 #define DF_REF_INSN_INFO(REF) ((REF)->base.insn_info)
-#define DF_REF_INSN(REF) ((REF)->base.insn_info->insn)
+extern rtx_insn *DF_REF_INSN (df_ref ref);
 #define DF_REF_INSN_UID(REF) (INSN_UID (DF_REF_INSN(REF)))
 #define DF_REF_CLASS(REF) ((REF)->base.cl)
 #define DF_REF_TYPE(REF) ((REF)->base.type)
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index e57d775..68bbe54 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -10,5 +10,6 @@ Phase 6: use extra rtx_def subclasses:             TODO
 
 TODO: "Scaffolding" to be removed
 =================================
+* DF_REF_INSN
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
 * SET_NEXT_INSN, SET_PREV_INSN
-- 
1.8.5.3

Re: [PATCH 012/236] Convert DF_REF_INSN to a function for now

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> DF_REF_INSN looks up the "insn" field of the referenced df_insn_info.
> This will eventually be an rtx_insn *, but for now is just an rtx.
>
> As further scaffolding: for now, convert DF_REF_INSN to a function,
> adding a checked downcast to rtx_insn *.  This can eventually be
> converted back to macro when the field is an rtx_insn *.
>
> gcc/
> 	* df-core.c (DF_REF_INSN): New, using a checked cast for now.
> 	* df.h (DF_REF_INSN): Convert from a macro to a function, so
> 	that we can return an rtx_insn *.
>
> /
> 	* rtx-classes-status.txt: Add DF_REF_INSN.
OK.
jeff

Re: [PATCH 012/236] Convert DF_REF_INSN to a function for now

[David Malcolm]

On Tue, 2014-08-12 at 15:20 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > DF_REF_INSN looks up the "insn" field of the referenced df_insn_info.
> > This will eventually be an rtx_insn *, but for now is just an rtx.
> >
> > As further scaffolding: for now, convert DF_REF_INSN to a function,
> > adding a checked downcast to rtx_insn *.  This can eventually be
> > converted back to macro when the field is an rtx_insn *.
> >
> > gcc/
> > 	* df-core.c (DF_REF_INSN): New, using a checked cast for now.
> > 	* df.h (DF_REF_INSN): Convert from a macro to a function, so
> > 	that we can return an rtx_insn *.
> >
> > /
> > 	* rtx-classes-status.txt: Add DF_REF_INSN.
> OK.

Thanks.  Although this function gets converted back to a macro in patch
191, I just realized that in the meantime that it's not inlined, as is
the case for some of the other macro->function conversions in patches
13-16.

Do I need to convert them to inline functions with the appropriate
headers, and is that regarded as a sufficiently trivial fix to the stuff
you've already reviewed to not need re-review? (I will bootstrap&test).

Or is it OK to suffer the performance hit as the patchkit lands, before
they all become macros again in phase 4 of the patchkit?

Note also that Jakub expressed concern about the effect of all these
inline functions on the debugging experience, and there's this patch
(awaiting review) which I believe addresses that:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00743.html

Presumably similar changes to gdbinit.in should occur for the relevant
headers (e.g. df.h in this case, though possibly targeted to just the
new function - there are already quite a few inline functions in df.h)

Dave

Re: [PATCH 012/236] Convert DF_REF_INSN to a function for now

[Jeff Law]

On 08/13/14 14:28, David Malcolm wrote:
> Thanks.  Although this function gets converted back to a macro in patch
> 191, I just realized that in the meantime that it's not inlined, as is
> the case for some of the other macro->function conversions in patches
> 13-16.
>
> Do I need to convert them to inline functions with the appropriate
> headers, and is that regarded as a sufficiently trivial fix to the stuff
> you've already reviewed to not need re-review? (I will bootstrap&test).
I'd just make it a follow-up. #237 ;-)


>
> Or is it OK to suffer the performance hit as the patchkit lands, before
> they all become macros again in phase 4 of the patchkit?
I think so.  This is a transient state, and my goal is to have this 
stuff reviewed and get off the critical path before I go on PTO next week.

>
> Note also that Jakub expressed concern about the effect of all these
> inline functions on the debugging experience, and there's this patch
> (awaiting review) which I believe addresses that:
> https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00743.html
Make it #238.

>
> Presumably similar changes to gdbinit.in should occur for the relevant
> headers (e.g. df.h in this case, though possibly targeted to just the
> new function - there are already quite a few inline functions in df.h)
Yea, probably.

jeff

Re: [PATCH 012/236] Convert DF_REF_INSN to a function for now

[David Malcolm]

On Wed, 2014-08-13 at 14:34 -0600, Jeff Law wrote:
> On 08/13/14 14:28, David Malcolm wrote:
> > Thanks.  Although this function gets converted back to a macro in patch
> > 191, I just realized that in the meantime that it's not inlined, as is
> > the case for some of the other macro->function conversions in patches
> > 13-16.
> >
> > Do I need to convert them to inline functions with the appropriate
> > headers, and is that regarded as a sufficiently trivial fix to the stuff
> > you've already reviewed to not need re-review? (I will bootstrap&test).
> I'd just make it a follow-up. #237 ;-)

Right, but these would be modifications to stuff that only exists
between phases 1-3 of the kit, before going away in phase 4, so although
it might be #237, it would need to be applied when the individual
changes go in.

> > Or is it OK to suffer the performance hit as the patchkit lands, before
> > they all become macros again in phase 4 of the patchkit?
> I think so.  This is a transient state, and my goal is to have this 
> stuff reviewed and get off the critical path before I go on PTO next week.

(FWIW I'm on PTO on Friday)

Transient, yes, but given the amount of time for me to simply bootstrap
each candidate patch, the non-inlined functions could last in trunk for
a couple of weeks (there are only 168 hours in a week, and a bootstrap
+regrtest takes about 3 hours on my box, so for 236 patches we're
talking ~4 weeks of compute time just for that).

I guess the underlying point here is that this is a big change and I'm
trying to be fastidious here.  Murphy's Law suggests I'm going to break
at least *something* :(

> > Note also that Jakub expressed concern about the effect of all these
> > inline functions on the debugging experience, and there's this patch
> > (awaiting review) which I believe addresses that:
> > https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00743.html
> Make it #238.

Right.  I probably should move the link to the docs from the commit
message to a comment in the gdbinit.in itself.

Similar ordering considerations apply: I don't want to make debugging
painful on trunk for a few weeks - so this kind of thing would need to
go in as the inline functions go in.


> > Presumably similar changes to gdbinit.in should occur for the relevant
> > headers (e.g. df.h in this case, though possibly targeted to just the
> > new function - there are already quite a few inline functions in df.h)
> Yea, probably.

I guess I'll try to get you patches for this by end of tomorrow.

Thanks for all your reviewing
Dave

Re: [PATCH 012/236] Convert DF_REF_INSN to a function for now

[Jeff Law]

On 08/13/14 18:11, David Malcolm wrote:
> On Wed, 2014-08-13 at 14:34 -0600, Jeff Law wrote:
>> On 08/13/14 14:28, David Malcolm wrote:
>>> Thanks.  Although this function gets converted back to a macro in patch
>>> 191, I just realized that in the meantime that it's not inlined, as is
>>> the case for some of the other macro->function conversions in patches
>>> 13-16.
>>>
>>> Do I need to convert them to inline functions with the appropriate
>>> headers, and is that regarded as a sufficiently trivial fix to the stuff
>>> you've already reviewed to not need re-review? (I will bootstrap&test).
>> I'd just make it a follow-up. #237 ;-)
>
> Right, but these would be modifications to stuff that only exists
> between phases 1-3 of the kit, before going away in phase 4, so although
> it might be #237, it would need to be applied when the individual
> changes go in.
If they're around just through phases #1-#3, then I wouldn't worry about 
it.

> Transient, yes, but given the amount of time for me to simply bootstrap
> each candidate patch, the non-inlined functions could last in trunk for
> a couple of weeks (there are only 168 hours in a week, and a bootstrap
> +regrtest takes about 3 hours on my box, so for 236 patches we're
> talking ~4 weeks of compute time just for that).
Well, I'd suggest a few things.

1. For the config/ changes, a full bootstrap is not necessary.  For 
those targets which are embedded, just build a stage1 cross to the 
target to verify it builds and call it good.

2. For targets where you can bootstrap, go ahead and do so, but just on 
those targets.  Some of these you can probably have going in parallel.

3. Some of the changes are so trivial that I'd squash them together in a 
single build/test cycle.

I would even consider seeing all the scaffolding go in as a single 
chunk.  It's nice to see the individuals during the review process, but 
I wouldn't lose any sleep if bundled those together.


>
> I guess the underlying point here is that this is a big change and I'm
> trying to be fastidious here.  Murphy's Law suggests I'm going to break
> at least *something* :(
Understood, but we don't want to be so fastidious that the time this 
stuff is in flux is so long that it creates more problems than it would 
if we took some sensible and safe shortcuts.

Jeff

Re: [PATCH 012/236] Convert DF_REF_INSN to a function for now

[David Malcolm]

On Wed, 2014-08-13 at 20:55 -0600, Jeff Law wrote:
> On 08/13/14 18:11, David Malcolm wrote:
> > On Wed, 2014-08-13 at 14:34 -0600, Jeff Law wrote:
> >> On 08/13/14 14:28, David Malcolm wrote:
> >>> Thanks.  Although this function gets converted back to a macro in patch
> >>> 191, I just realized that in the meantime that it's not inlined, as is
> >>> the case for some of the other macro->function conversions in patches
> >>> 13-16.
> >>>
> >>> Do I need to convert them to inline functions with the appropriate
> >>> headers, and is that regarded as a sufficiently trivial fix to the stuff
> >>> you've already reviewed to not need re-review? (I will bootstrap&test).
> >> I'd just make it a follow-up. #237 ;-)
> >
> > Right, but these would be modifications to stuff that only exists
> > between phases 1-3 of the kit, before going away in phase 4, so although
> > it might be #237, it would need to be applied when the individual
> > changes go in.
> If they're around just through phases #1-#3, then I wouldn't worry about 
> it.
...and indeed, having experimented with it, the inline function approach
would need to include more header files: for example, an inline
implementation of, say, BB_HEAD() in basic-block.h would look like this:

inline rtx_insn *BB_HEAD (const_basic_block bb)
{
  rtx insn = bb->il.x.head_;
  return safe_as_a <rtx_insn *> (insn);
}

but this requires everything including basic-block.h to know about
safe_as_a <rtx_insn *> (rtx) and hence have access to
is_a_helper <rtx_insn *> (rtx), and hence needs to include rtl.h i.e.
either basic-block.h would need to include rtl.h, or everything
including it would.  Similar considerations apply to the macros in the
various other header files.  Touching the header file graph doesn't seem
like a good thing to be doing for a transient effort during phases 1-3
of applying the kit, so I'll hold off on making that change, and go with
the patches as-is.

> > Transient, yes, but given the amount of time for me to simply bootstrap
> > each candidate patch, the non-inlined functions could last in trunk for
> > a couple of weeks (there are only 168 hours in a week, and a bootstrap
> > +regrtest takes about 3 hours on my box, so for 236 patches we're
> > talking ~4 weeks of compute time just for that).
> Well, I'd suggest a few things.
> 
> 1. For the config/ changes, a full bootstrap is not necessary.  For 
> those targets which are embedded, just build a stage1 cross to the 
> target to verify it builds and call it good.
> 
> 2. For targets where you can bootstrap, go ahead and do so, but just on 
> those targets.  Some of these you can probably have going in parallel.
> 
> 3. Some of the changes are so trivial that I'd squash them together in a 
> single build/test cycle.

Thanks.

FWIW I'm working on followup cleanups whilst waiting for the
build/tests.

> I would even consider seeing all the scaffolding go in as a single 
> chunk.  It's nice to see the individuals during the review process, but 
> I wouldn't lose any sleep if bundled those together.
> 
> 
> >
> > I guess the underlying point here is that this is a big change and I'm
> > trying to be fastidious here.  Murphy's Law suggests I'm going to break
> > at least *something* :(
> Understood, but we don't want to be so fastidious that the time this 
> stuff is in flux is so long that it creates more problems than it would 
> if we took some sensible and safe shortcuts.

(nods)

Thanks again for the reviews
Dave

Re: [PATCH 012/236] Convert DF_REF_INSN to a function for now

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 1061 bytes --]

On Tue, 2014-08-12 at 15:20 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > DF_REF_INSN looks up the "insn" field of the referenced df_insn_info.
> > This will eventually be an rtx_insn *, but for now is just an rtx.
> >
> > As further scaffolding: for now, convert DF_REF_INSN to a function,
> > adding a checked downcast to rtx_insn *.  This can eventually be
> > converted back to macro when the field is an rtx_insn *.
> >
> > gcc/
> > 	* df-core.c (DF_REF_INSN): New, using a checked cast for now.
> > 	* df.h (DF_REF_INSN): Convert from a macro to a function, so
> > 	that we can return an rtx_insn *.
> >
> > /
> > 	* rtx-classes-status.txt: Add DF_REF_INSN.
> OK.

Thanks.

Fixed up the as_a_nullable to safe_as_a, and committed to trunk as
r214160, having verified bootstrap&regrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone for 9 targets.

Am attaching what I committed.

Dave

[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html


[-- Attachment #2: r214160.patch --]
[-- Type: text/x-patch, Size: 2206 bytes --]

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 214159)
+++ ChangeLog	(revision 214160)
@@ -1,3 +1,7 @@
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	* rtx-classes-status.txt (TODO): Add DF_REF_INSN.
+
 2014-08-19  Joost VandeVondele <vondele@gcc.gnu.org>
 
 	* MAINTAINERS (Write After Approval): Add myself.
Index: rtx-classes-status.txt
===================================================================
--- rtx-classes-status.txt	(revision 214159)
+++ rtx-classes-status.txt	(revision 214160)
@@ -14,5 +14,6 @@
 
 TODO: "Scaffolding" to be removed
 =================================
+* DF_REF_INSN
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
 * SET_NEXT_INSN, SET_PREV_INSN
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214159)
+++ gcc/ChangeLog	(revision 214160)
@@ -1,3 +1,9 @@
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	* df-core.c (DF_REF_INSN): New, using a checked cast for now.
+	* df.h (DF_REF_INSN): Convert from a macro to a function, so
+	that we can return an rtx_insn *.
+
 2014-08-19  Yaakov Selkowitz  <yselkowi@redhat.com>
 
 	* config/i386/cygwin.h (LINK_SPEC): Pass --tsaware flag only
Index: gcc/df-core.c
===================================================================
--- gcc/df-core.c	(revision 214159)
+++ gcc/df-core.c	(revision 214160)
@@ -2502,3 +2502,9 @@
   df_chain_dump (link, stderr);
   fputc ('\n', stderr);
 }
+
+rtx_insn *DF_REF_INSN (df_ref ref)
+{
+  rtx insn = ref->base.insn_info->insn;
+  return safe_as_a <rtx_insn *> (insn);
+}
Index: gcc/df.h
===================================================================
--- gcc/df.h	(revision 214159)
+++ gcc/df.h	(revision 214160)
@@ -649,7 +649,7 @@
 			: BLOCK_FOR_INSN (DF_REF_INSN (REF)))
 #define DF_REF_BBNO(REF) (DF_REF_BB (REF)->index)
 #define DF_REF_INSN_INFO(REF) ((REF)->base.insn_info)
-#define DF_REF_INSN(REF) ((REF)->base.insn_info->insn)
+extern rtx_insn *DF_REF_INSN (df_ref ref);
 #define DF_REF_INSN_UID(REF) (INSN_UID (DF_REF_INSN(REF)))
 #define DF_REF_CLASS(REF) ((REF)->base.cl)
 #define DF_REF_TYPE(REF) ((REF)->base.type)

[PATCH 040/236] Use rtx_insn internally within generated functions

[David Malcolm]

With this patch, "insn" and "curr_insn" as used from C++ fragments in .md
files are strengthened from rtx to rtx_insn *, allowing numerous
target-specific functions to have their params be similiar strengthened.

The top-level interfaces ("recog", "split", "peephole2") continue to take
a plain rtx for "insn", to avoid introducing dependencies on other
patches.

gcc/
	* recog.h (insn_output_fn): Update this function typedef to match
	the changes below to the generated output functions, strengthening
	the 2nd param from rtx to rtx_insn *.

	* final.c (get_insn_template): Add a checked cast to rtx_insn * on
	insn when invoking an output function, to match the new signature
	of insn_output_fn with a stronger second param.

	* genconditions.c (write_header): In the generated code for
	gencondmd.c, strengthen the global "insn" from rtx to rtx_insn *
	to match the other changes in this patch.

	* genemit.c (gen_split): Strengthen the 1st param "curr_insn" of
	the generated "gen_" functions from rtx to rtx_insn * within their
	implementations.

	* genrecog.c (write_subroutine): Strengthen the 2nd param "insn" of
	the subfunctions within the generated "recog_", "split", "peephole2"
	function trees from rtx to rtx_insn *.  For now, the top-level
	generated functions ("recog", "split", "peephole2") continue to
	take a plain rtx for "insn", to avoid introducing dependencies on
	other patches.  Rename this 2nd param from "insn" to
	"uncast_insn", and reintroduce "insn" as a local variable of type
	rtx_insn *, initialized at the top of the generated function with
	a checked cast on "uncast_insn".
	(make_insn_sequence): Strengthen the 1st param "curr_insn" of
	the generated "gen_" functions from rtx to rtx_insn * within their
	prototypes.

	* genoutput.c (process_template): Strengthen the 2nd param within
	the generated "output_" functions "insn" from rtx to rtx_insn *.
---
 gcc/final.c         |  3 ++-
 gcc/genconditions.c |  2 +-
 gcc/genemit.c       |  8 ++++----
 gcc/genoutput.c     |  4 ++--
 gcc/genrecog.c      | 29 ++++++++++++++++++++++-------
 gcc/recog.h         |  2 +-
 6 files changed, 32 insertions(+), 16 deletions(-)

diff --git a/gcc/final.c b/gcc/final.c
index 38f6e0c..3a78aad 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -2055,7 +2055,8 @@ get_insn_template (int code, rtx insn)
       return insn_data[code].output.multi[which_alternative];
     case INSN_OUTPUT_FORMAT_FUNCTION:
       gcc_assert (insn);
-      return (*insn_data[code].output.function) (recog_data.operand, insn);
+      return (*insn_data[code].output.function) (recog_data.operand,
+						 as_a <rtx_insn *> (insn));
 
     default:
       gcc_unreachable ();
diff --git a/gcc/genconditions.c b/gcc/genconditions.c
index dc22c78..8390797 100644
--- a/gcc/genconditions.c
+++ b/gcc/genconditions.c
@@ -95,7 +95,7 @@ write_header (void)
 
   puts ("\
 /* Dummy external declarations.  */\n\
-extern rtx insn;\n\
+extern rtx_insn *insn;\n\
 extern rtx ins1;\n\
 extern rtx operands[];\n\
 \n\
diff --git a/gcc/genemit.c b/gcc/genemit.c
index 16b5644..1bc73f0 100644
--- a/gcc/genemit.c
+++ b/gcc/genemit.c
@@ -557,15 +557,15 @@ gen_split (rtx split)
   /* Output the prototype, function name and argument declarations.  */
   if (GET_CODE (split) == DEFINE_PEEPHOLE2)
     {
-      printf ("extern rtx gen_%s_%d (rtx, rtx *);\n",
+      printf ("extern rtx gen_%s_%d (rtx_insn *, rtx *);\n",
 	      name, insn_code_number);
-      printf ("rtx\ngen_%s_%d (rtx curr_insn ATTRIBUTE_UNUSED, rtx *operands%s)\n",
+      printf ("rtx\ngen_%s_%d (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands%s)\n",
 	      name, insn_code_number, unused);
     }
   else
     {
-      printf ("extern rtx gen_split_%d (rtx, rtx *);\n", insn_code_number);
-      printf ("rtx\ngen_split_%d (rtx curr_insn ATTRIBUTE_UNUSED, rtx *operands%s)\n",
+      printf ("extern rtx gen_split_%d (rtx_insn *, rtx *);\n", insn_code_number);
+      printf ("rtx\ngen_split_%d (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands%s)\n",
 	      insn_code_number, unused);
     }
   printf ("{\n");
diff --git a/gcc/genoutput.c b/gcc/genoutput.c
index b3ce120..b33a361 100644
--- a/gcc/genoutput.c
+++ b/gcc/genoutput.c
@@ -652,7 +652,7 @@ process_template (struct data *d, const char *template_code)
       d->output_format = INSN_OUTPUT_FORMAT_FUNCTION;
 
       puts ("\nstatic const char *");
-      printf ("output_%d (rtx *operands ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED)\n",
+      printf ("output_%d (rtx *operands ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED)\n",
 	      d->code_number);
       puts ("{");
       print_md_ptr_loc (template_code);
@@ -681,7 +681,7 @@ process_template (struct data *d, const char *template_code)
 	  d->output_format = INSN_OUTPUT_FORMAT_FUNCTION;
 	  puts ("\nstatic const char *");
 	  printf ("output_%d (rtx *operands ATTRIBUTE_UNUSED, "
-		  "rtx insn ATTRIBUTE_UNUSED)\n", d->code_number);
+		  "rtx_insn *insn ATTRIBUTE_UNUSED)\n", d->code_number);
 	  puts ("{");
 	  puts ("  switch (which_alternative)\n    {");
 	}
diff --git a/gcc/genrecog.c b/gcc/genrecog.c
index 457b59c..27f0c10 100644
--- a/gcc/genrecog.c
+++ b/gcc/genrecog.c
@@ -2180,6 +2180,7 @@ write_subroutine (struct decision_head *head, enum routine_type type)
   const char *s_or_e;
   char extension[32];
   int i;
+  const char *insn_param;
 
   s_or_e = subfunction ? "static " : "";
 
@@ -2190,21 +2191,27 @@ write_subroutine (struct decision_head *head, enum routine_type type)
   else
     strcpy (extension, "_insns");
 
+  /* For now, the top-level functions take a plain "rtx", and perform a
+     checked cast to "rtx_insn *" for use throughout the rest of the
+     function and the code it calls.  */
+  insn_param = subfunction ? "rtx_insn *insn" : "rtx uncast_insn";
+
   switch (type)
     {
     case RECOG:
       printf ("%sint\n\
-recog%s (rtx x0 ATTRIBUTE_UNUSED,\n\trtx insn ATTRIBUTE_UNUSED,\n\tint *pnum_clobbers ATTRIBUTE_UNUSED)\n", s_or_e, extension);
+recog%s (rtx x0 ATTRIBUTE_UNUSED,\n\t%s ATTRIBUTE_UNUSED,\n\tint *pnum_clobbers ATTRIBUTE_UNUSED)\n",
+	      s_or_e, extension, insn_param);
       break;
     case SPLIT:
       printf ("%srtx\n\
-split%s (rtx x0 ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED)\n",
-	      s_or_e, extension);
+split%s (rtx x0 ATTRIBUTE_UNUSED, %s ATTRIBUTE_UNUSED)\n",
+	      s_or_e, extension, insn_param);
       break;
     case PEEPHOLE2:
       printf ("%srtx\n\
-peephole2%s (rtx x0 ATTRIBUTE_UNUSED,\n\trtx insn ATTRIBUTE_UNUSED,\n\tint *_pmatch_len ATTRIBUTE_UNUSED)\n",
-	      s_or_e, extension);
+peephole2%s (rtx x0 ATTRIBUTE_UNUSED,\n\t%s ATTRIBUTE_UNUSED,\n\tint *_pmatch_len ATTRIBUTE_UNUSED)\n",
+	      s_or_e, extension, insn_param);
       break;
     }
 
@@ -2217,6 +2224,14 @@ peephole2%s (rtx x0 ATTRIBUTE_UNUSED,\n\trtx insn ATTRIBUTE_UNUSED,\n\tint *_pma
   if (!subfunction)
     printf ("  recog_data.insn = NULL_RTX;\n");
 
+  /* For now add the downcast to rtx_insn *, at the top of each top-level
+     function.  */
+  if (!subfunction)
+    {
+      printf ("  rtx_insn *insn ATTRIBUTE_UNUSED;\n");
+      printf ("  insn = as_a_nullable <rtx_insn *> (uncast_insn);\n");
+    }
+
   if (head->first)
     write_tree (head, &root_pos, type, 1);
   else
@@ -2461,12 +2476,12 @@ make_insn_sequence (rtx insn, enum routine_type type)
 
     case SPLIT:
       /* Define the subroutine we will call below and emit in genemit.  */
-      printf ("extern rtx gen_split_%d (rtx, rtx *);\n", next_insn_code);
+      printf ("extern rtx gen_split_%d (rtx_insn *, rtx *);\n", next_insn_code);
       break;
 
     case PEEPHOLE2:
       /* Define the subroutine we will call below and emit in genemit.  */
-      printf ("extern rtx gen_peephole2_%d (rtx, rtx *);\n",
+      printf ("extern rtx gen_peephole2_%d (rtx_insn *, rtx *);\n",
 	      next_insn_code);
       break;
     }
diff --git a/gcc/recog.h b/gcc/recog.h
index 8c8d55f..3f5b98c 100644
--- a/gcc/recog.h
+++ b/gcc/recog.h
@@ -264,7 +264,7 @@ extern struct operand_alternative recog_op_alt[MAX_RECOG_OPERANDS][MAX_RECOG_ALT
    each insn-code value.  */
 
 typedef int (*insn_operand_predicate_fn) (rtx, enum machine_mode);
-typedef const char * (*insn_output_fn) (rtx *, rtx);
+typedef const char * (*insn_output_fn) (rtx *, rtx_insn *);
 
 struct insn_gen_fn
 {
-- 
1.8.5.3

Re: [PATCH 040/236] Use rtx_insn internally within generated functions

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> With this patch, "insn" and "curr_insn" as used from C++ fragments in .md
> files are strengthened from rtx to rtx_insn *, allowing numerous
> target-specific functions to have their params be similiar strengthened.
>
> The top-level interfaces ("recog", "split", "peephole2") continue to take
> a plain rtx for "insn", to avoid introducing dependencies on other
> patches.
>
> gcc/
> 	* recog.h (insn_output_fn): Update this function typedef to match
> 	the changes below to the generated output functions, strengthening
> 	the 2nd param from rtx to rtx_insn *.
>
> 	* final.c (get_insn_template): Add a checked cast to rtx_insn * on
> 	insn when invoking an output function, to match the new signature
> 	of insn_output_fn with a stronger second param.
>
> 	* genconditions.c (write_header): In the generated code for
> 	gencondmd.c, strengthen the global "insn" from rtx to rtx_insn *
> 	to match the other changes in this patch.
>
> 	* genemit.c (gen_split): Strengthen the 1st param "curr_insn" of
> 	the generated "gen_" functions from rtx to rtx_insn * within their
> 	implementations.
>
> 	* genrecog.c (write_subroutine): Strengthen the 2nd param "insn" of
> 	the subfunctions within the generated "recog_", "split", "peephole2"
> 	function trees from rtx to rtx_insn *.  For now, the top-level
> 	generated functions ("recog", "split", "peephole2") continue to
> 	take a plain rtx for "insn", to avoid introducing dependencies on
> 	other patches.  Rename this 2nd param from "insn" to
> 	"uncast_insn", and reintroduce "insn" as a local variable of type
> 	rtx_insn *, initialized at the top of the generated function with
> 	a checked cast on "uncast_insn".
> 	(make_insn_sequence): Strengthen the 1st param "curr_insn" of
> 	the generated "gen_" functions from rtx to rtx_insn * within their
> 	prototypes.
>
> 	* genoutput.c (process_template): Strengthen the 2nd param within
> 	the generated "output_" functions "insn" from rtx to rtx_insn *.
OK.
Jeff

Re: [PATCH 040/236] Use rtx_insn internally within generated functions

[David Malcolm]

On Wed, 2014-08-13 at 12:03 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > With this patch, "insn" and "curr_insn" as used from C++ fragments in .md
> > files are strengthened from rtx to rtx_insn *, allowing numerous
> > target-specific functions to have their params be similiar strengthened.
> >
> > The top-level interfaces ("recog", "split", "peephole2") continue to take
> > a plain rtx for "insn", to avoid introducing dependencies on other
> > patches.
> >
> > gcc/
> > 	* recog.h (insn_output_fn): Update this function typedef to match
> > 	the changes below to the generated output functions, strengthening
> > 	the 2nd param from rtx to rtx_insn *.
> >
> > 	* final.c (get_insn_template): Add a checked cast to rtx_insn * on
> > 	insn when invoking an output function, to match the new signature
> > 	of insn_output_fn with a stronger second param.
> >
> > 	* genconditions.c (write_header): In the generated code for
> > 	gencondmd.c, strengthen the global "insn" from rtx to rtx_insn *
> > 	to match the other changes in this patch.
> >
> > 	* genemit.c (gen_split): Strengthen the 1st param "curr_insn" of
> > 	the generated "gen_" functions from rtx to rtx_insn * within their
> > 	implementations.
> >
> > 	* genrecog.c (write_subroutine): Strengthen the 2nd param "insn" of
> > 	the subfunctions within the generated "recog_", "split", "peephole2"
> > 	function trees from rtx to rtx_insn *.  For now, the top-level
> > 	generated functions ("recog", "split", "peephole2") continue to
> > 	take a plain rtx for "insn", to avoid introducing dependencies on
> > 	other patches.  Rename this 2nd param from "insn" to
> > 	"uncast_insn", and reintroduce "insn" as a local variable of type
> > 	rtx_insn *, initialized at the top of the generated function with
> > 	a checked cast on "uncast_insn".
> > 	(make_insn_sequence): Strengthen the 1st param "curr_insn" of
> > 	the generated "gen_" functions from rtx to rtx_insn * within their
> > 	prototypes.
> >
> > 	* genoutput.c (process_template): Strengthen the 2nd param within
> > 	the generated "output_" functions "insn" from rtx to rtx_insn *.
> OK.

Thanks; bootstrapped and committed to trunk as r214257, with a trivial
fixup of the as_a_nullable to safe_as_a.

[PATCH 063/236] compare-elim.c: Use rtx_insn

[David Malcolm]

gcc/
	* compare-elim.c (struct comparison_use): Strengthen field "insn"
	from rtx to rtx_insn *.
	(struct comparison): Likewise, also for field "prev_clobber".
	(conforming_compare): Likewise for param "insn".
	(arithmetic_flags_clobber_p): Likewise.
	(find_flags_uses_in_insn): Likewise.
	(find_comparison_dom_walker::before_dom_children): Likewise for
	locals "insn", "next", "last_clobber".
	(try_eliminate_compare): Likewise for locals "insn", "bb_head".
---
 gcc/compare-elim.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/gcc/compare-elim.c b/gcc/compare-elim.c
index a373799..979c12b 100644
--- a/gcc/compare-elim.c
+++ b/gcc/compare-elim.c
@@ -81,7 +81,7 @@ along with GCC; see the file COPYING3.  If not see
 struct comparison_use
 {
   /* The instruction in which the result of the compare is used.  */
-  rtx insn;
+  rtx_insn *insn;
   /* The location of the flags register within the use.  */
   rtx *loc;
   /* The comparison code applied against the flags register.  */
@@ -91,10 +91,10 @@ struct comparison_use
 struct comparison
 {
   /* The comparison instruction.  */
-  rtx insn;
+  rtx_insn *insn;
 
   /* The insn prior to the comparison insn that clobbers the flags.  */
-  rtx prev_clobber;
+  rtx_insn *prev_clobber;
 
   /* The two values being compared.  These will be either REGs or
      constants.  */
@@ -126,7 +126,7 @@ static vec<comparison_struct_p> all_compares;
    the rtx for the COMPARE itself.  */
 
 static rtx
-conforming_compare (rtx insn)
+conforming_compare (rtx_insn *insn)
 {
   rtx set, src, dest;
 
@@ -156,7 +156,7 @@ conforming_compare (rtx insn)
    correct.  The term "arithmetic" may be somewhat misleading...  */
 
 static bool
-arithmetic_flags_clobber_p (rtx insn)
+arithmetic_flags_clobber_p (rtx_insn *insn)
 {
   rtx pat, x;
 
@@ -191,7 +191,7 @@ arithmetic_flags_clobber_p (rtx insn)
    it in CMP; otherwise indicate that we've missed a use.  */
 
 static void
-find_flags_uses_in_insn (struct comparison *cmp, rtx insn)
+find_flags_uses_in_insn (struct comparison *cmp, rtx_insn *insn)
 {
   df_ref *use_rec, use;
 
@@ -260,7 +260,7 @@ void
 find_comparison_dom_walker::before_dom_children (basic_block bb)
 {
   struct comparison *last_cmp;
-  rtx insn, next, last_clobber;
+  rtx_insn *insn, *next, *last_clobber;
   bool last_cmp_valid;
   bitmap killed;
 
@@ -291,7 +291,7 @@ find_comparison_dom_walker::before_dom_children (basic_block bb)
     {
       rtx src;
 
-      next = (insn == BB_END (bb) ? NULL_RTX : NEXT_INSN (insn));
+      next = (insn == BB_END (bb) ? NULL : NEXT_INSN (insn));
       if (!NONDEBUG_INSN_P (insn))
 	continue;
 
@@ -490,7 +490,8 @@ maybe_select_cc_mode (struct comparison *cmp, rtx a ATTRIBUTE_UNUSED,
 static bool
 try_eliminate_compare (struct comparison *cmp)
 {
-  rtx x, insn, bb_head, flags, in_a, cmp_src;
+  rtx_insn *insn, *bb_head;
+  rtx x, flags, in_a, cmp_src;
 
   /* We must have found an interesting "clobber" preceding the compare.  */
   if (cmp->prev_clobber == NULL)
-- 
1.8.5.3

[PATCH 047/236] PHASE 2: Per-file commits in main source directory

[David Malcolm]

This commit is a placeholder for me when rebasing, to help organize the
patch kit.

/
	* rtx-classes-status.txt: Update
---
 rtx-classes-status.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index 52567e7..e350eaf 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -1,8 +1,8 @@
 "git rebase" has a tendency to delete empty commits, so this dummy file
 exists to be modified by marker commits.
 
-Phase 1: initial "scaffolding" commits:            IN PROGRESS
-Phase 2: per-file commits in main source dir:      TODO
+Phase 1: initial "scaffolding" commits:            DONE
+Phase 2: per-file commits in main source dir:      IN PROGRESS
 Phase 3: per-file commits within "config" subdirs: TODO
 Phase 4: removal of "scaffolding":                 TODO
 Phase 5: additional rtx_def subclasses:            TODO
-- 
1.8.5.3

Re: [PATCH 047/236] PHASE 2: Per-file commits in main source directory

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> This commit is a placeholder for me when rebasing, to help organize the
> patch kit.
>
> /
> 	* rtx-classes-status.txt: Update
OK.
jeff

Re: [PATCH 047/236] PHASE 2: Per-file commits in main source directory

[David Malcolm]

On Wed, 2014-08-13 at 12:10 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > This commit is a placeholder for me when rebasing, to help organize the
> > patch kit.
> >
> > /
> > 	* rtx-classes-status.txt: Update
> OK.
Thanks; committed to trunk r214276.

[PATCH 004/236] PHASE 1: Initial "scaffolding" commits

[David Malcolm]

This commit is a placeholder for me when rebasing, to help organize the
patch kit.

/
	* rtx-classes-status.txt: New file
---
 rtx-classes-status.txt | 9 +++++++++
 1 file changed, 9 insertions(+)
 create mode 100644 rtx-classes-status.txt

diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
new file mode 100644
index 0000000..9971853
--- /dev/null
+++ b/rtx-classes-status.txt
@@ -0,0 +1,9 @@
+"git rebase" has a tendency to delete empty commits, so this dummy file
+exists to be modified by marker commits.
+
+Phase 1: initial "scaffolding" commits:            IN PROGRESS
+Phase 2: per-file commits in main source dir:      TODO
+Phase 3: per-file commits within "config" subdirs: TODO
+Phase 4: removal of "scaffolding":                 TODO
+Phase 5: additional rtx_def subclasses:            TODO
+Phase 6: use extra rtx_def subclasses:             TODO
-- 
1.8.5.3

Re: [PATCH 004/236] PHASE 1: Initial "scaffolding" commits

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> This commit is a placeholder for me when rebasing, to help organize the
> patch kit.
>
> /
> 	* rtx-classes-status.txt: New file
OK.  For those who may be watching, patch #236 removes this file.

jeff

Re: [PATCH 004/236] PHASE 1: Initial "scaffolding" commits

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 498 bytes --]

On Tue, 2014-08-12 at 14:55 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > This commit is a placeholder for me when rebasing, to help organize the
> > patch kit.
> >
> > /
> > 	* rtx-classes-status.txt: New file
> OK.  For those who may be watching, patch #236 removes this file.
> 
Thanks.

I've committed this to trunk as r214116; I took the liberty of updating
the header text in the file to better clarify the purpose of the file;
am attaching what I actually committed.


[-- Attachment #2: 214116.patch --]
[-- Type: text/x-patch, Size: 1147 bytes --]

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 214115)
+++ ChangeLog	(revision 214116)
@@ -1,3 +1,7 @@
+2014-08-18  David Malcolm  <dmalcolm@redhat.com>
+
+        * rtx-classes-status.txt: New file
+
 2014-08-18 Roman Gareev  <gareevroman@gmail.com>
 
 	* configure.ac: Eliminate ClooG installation dependency.
Index: rtx-classes-status.txt
===================================================================
--- rtx-classes-status.txt	(revision 0)
+++ rtx-classes-status.txt	(revision 214116)
@@ -0,0 +1,13 @@
+This file tracks the status of the merger of the
+"Introduce rtx subclasses" patches, and is slated for removal once all
+are merged.
+
+See https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00498.html for more
+information.
+
+Phase 1: initial "scaffolding" commits:            IN PROGRESS
+Phase 2: per-file commits in main source dir:      TODO
+Phase 3: per-file commits within "config" subdirs: TODO
+Phase 4: removal of "scaffolding":                 TODO
+Phase 5: additional rtx_def subclasses:            TODO
+Phase 6: use extra rtx_def subclasses:             TODO

[PATCH 021/236] entry_of_function returns an insn

[David Malcolm]

gcc/
	* rtl.h (entry_of_function): Strengthen return type from rtx to
	rtx_insn *.
	* cfgrtl.c (entry_of_function): Likewise.
---
 gcc/cfgrtl.c | 2 +-
 gcc/rtl.h    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index d386367..3079bb3 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -499,7 +499,7 @@ make_pass_free_cfg (gcc::context *ctxt)
 }
 
 /* Return RTX to emit after when we want to emit code on the entry of function.  */
-rtx
+rtx_insn *
 entry_of_function (void)
 {
   return (n_basic_blocks_for_fn (cfun) > NUM_FIXED_BLOCKS ?
diff --git a/gcc/rtl.h b/gcc/rtl.h
index a703e34..3a28fcc 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3061,7 +3061,7 @@ extern void add_insn_after (rtx, rtx, basic_block);
 extern void remove_insn (rtx);
 extern rtx emit (rtx);
 extern void delete_insn (rtx);
-extern rtx entry_of_function (void);
+extern rtx_insn *entry_of_function (void);
 extern void emit_insn_at_entry (rtx);
 extern void delete_insn_chain (rtx, rtx, bool);
 extern rtx unlink_insn_chain (rtx, rtx);
-- 
1.8.5.3

Re: [PATCH 021/236] entry_of_function returns an insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* rtl.h (entry_of_function): Strengthen return type from rtx to
> 	rtx_insn *.
> 	* cfgrtl.c (entry_of_function): Likewise.
OK.
Jeff

Re: [PATCH 021/236] entry_of_function returns an insn

[David Malcolm]

On Tue, 2014-08-12 at 21:04 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (entry_of_function): Strengthen return type from rtx to
> > 	rtx_insn *.
> > 	* cfgrtl.c (entry_of_function): Likewise.
> OK.

Thanks; committed to trunk as r214182.

[PATCH 027/236] asan_emit_stack_protection returns an insn

[David Malcolm]

gcc/
	* asan.h (asan_emit_stack_protection): Strengthen return type from
	rtx to rtx_insn *.
	* asan.c (asan_emit_stack_protection): Likewise.  Add local
	"insns" to hold the return value.
---
 gcc/asan.c | 7 ++++---
 gcc/asan.h | 4 ++--
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/gcc/asan.c b/gcc/asan.c
index 118f9fc..11627c7 100644
--- a/gcc/asan.c
+++ b/gcc/asan.c
@@ -960,11 +960,12 @@ asan_function_start (void)
    assigned to PBASE, when not doing use after return protection, or
    corresponding address based on __asan_stack_malloc* return value.  */
 
-rtx
+rtx_insn *
 asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb,
 			    HOST_WIDE_INT *offsets, tree *decls, int length)
 {
   rtx shadow_base, shadow_mem, ret, mem, orig_base, lab;
+  rtx_insn *insns;
   char buf[30];
   unsigned char shadow_bytes[4];
   HOST_WIDE_INT base_offset = offsets[length - 1];
@@ -1234,9 +1235,9 @@ asan_emit_stack_protection (rtx base, rtx pbase, unsigned int alignb,
   if (lab)
     emit_label (lab);
 
-  ret = get_insns ();
+  insns = get_insns ();
   end_sequence ();
-  return ret;
+  return insns;
 }
 
 /* Return true if DECL, a global var, might be overridden and needs
diff --git a/gcc/asan.h b/gcc/asan.h
index 08d5063..198433f 100644
--- a/gcc/asan.h
+++ b/gcc/asan.h
@@ -23,8 +23,8 @@ along with GCC; see the file COPYING3.  If not see
 
 extern void asan_function_start (void);
 extern void asan_finish_file (void);
-extern rtx asan_emit_stack_protection (rtx, rtx, unsigned int, HOST_WIDE_INT *,
-				       tree *, int);
+extern rtx_insn *asan_emit_stack_protection (rtx, rtx, unsigned int,
+					     HOST_WIDE_INT *, tree *, int);
 extern bool asan_protect_global (tree);
 extern void initialize_sanitizer_builtins (void);
 extern tree asan_dynamic_init_call (bool);
-- 
1.8.5.3

Re: [PATCH 027/236] asan_emit_stack_protection returns an insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* asan.h (asan_emit_stack_protection): Strengthen return type from
> 	rtx to rtx_insn *.
> 	* asan.c (asan_emit_stack_protection): Likewise.  Add local
> 	"insns" to hold the return value.
OK.

Jeff

Re: [PATCH 027/236] asan_emit_stack_protection returns an insn

[David Malcolm]

On Tue, 2014-08-12 at 21:56 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* asan.h (asan_emit_stack_protection): Strengthen return type from
> > 	rtx to rtx_insn *.
> > 	* asan.c (asan_emit_stack_protection): Likewise.  Add local
> > 	"insns" to hold the return value.
> OK.

Thanks; committed to trunk as r214189.

[PATCH 007/236] New function: for_each_rtx_in_insn

[David Malcolm]

gcc/
	* rtl.h (for_each_rtx_in_insn): New function.
	* rtlanal.c (for_each_rtx_in_insn): Likewise.
---
 gcc/rtl.h     |  1 +
 gcc/rtlanal.c | 16 ++++++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/gcc/rtl.h b/gcc/rtl.h
index 0858230..3e37ed0 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2356,6 +2356,7 @@ extern int computed_jump_p (const_rtx);
 
 typedef int (*rtx_function) (rtx *, void *);
 extern int for_each_rtx (rtx *, rtx_function, void *);
+extern int for_each_rtx_in_insn (rtx_insn **, rtx_function, void *);
 
 /* Callback for for_each_inc_dec, to process the autoinc operation OP
    within MEM that sets DEST to SRC + SRCOFF, or SRC if SRCOFF is
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 82cfc1bf..5e2e908 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -3011,6 +3011,22 @@ for_each_rtx (rtx *x, rtx_function f, void *data)
   return for_each_rtx_1 (*x, i, f, data);
 }
 
+/* Like "for_each_rtx", but for calling on an rtx_insn **.  */
+
+int
+for_each_rtx_in_insn (rtx_insn **insn, rtx_function f, void *data)
+{
+  rtx insn_as_rtx = *insn;
+  int result;
+
+  result = for_each_rtx (&insn_as_rtx, f, data);
+
+  if (insn_as_rtx != *insn)
+    *insn = as_a_nullable <rtx_insn *> (insn_as_rtx);
+
+  return result;
+}
+
 \f
 
 /* Data structure that holds the internal state communicated between
-- 
1.8.5.3

Re: [PATCH 007/236] New function: for_each_rtx_in_insn

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> gcc/
> 	* rtl.h (for_each_rtx_in_insn): New function.
> 	* rtlanal.c (for_each_rtx_in_insn): Likewise.
OK.  Note that we're moving away from for_each_rtx...   I haven't 
looked, but there's a reasonable chance we may not need it after Richard 
S.'s work is committed.  Something to watch.

Jeff

Re: [PATCH 007/236] New function: for_each_rtx_in_insn

[David Malcolm]

On Tue, 2014-08-12 at 15:08 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (for_each_rtx_in_insn): New function.
> > 	* rtlanal.c (for_each_rtx_in_insn): Likewise.
> OK.  Note that we're moving away from for_each_rtx...   I haven't 
> looked, but there's a reasonable chance we may not need it after Richard 
> S.'s work is committed.  Something to watch.

CCing Richard S, as a "heads up".

Richard, for context, the patch in this thread is this one:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00494.html

which adds a "for_each_rtx_in_insn" function, to work on a top-level
insn node, as part of a big cleanup I'm working on that distinguishes
between insn nodes vs arbitrary rtx nodes:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00498.html

I believe that your rtl-iter reworking:
 https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00133.html
hasn't landed in trunk yet (I don't see an rtl-iter.h there yet).

Summary of notes below: I think our patch series are mostly compatible,
but I think there's a conflict between them in rtlanal.c to do with
for_each_inc_dec, at patch 176 in my kit vs patch 40 of your kit.  I
think it's resolvable, though.

More detailed notes follow:

My reading of Richard's patch series is that it optimizes many specific
for_each_rtx implementations, but keeps the existing generic one around.

Some notes on all of the places in which I've made use of the new
"for_each_rtx_in_insn" in my patchkit:

cfgcleanup.c:1728:		  for_each_rtx_in_insn (&BB_END (bb1), replace_label, &rr);
cfgcleanup.c:1742:		  for_each_rtx_in_insn (&BB_END (bb1), replace_label, &rr);
  (both in outgoing_edges_match; I don't think Richard's patchkit
touches this one).


cfgcleanup.c:2002:		for_each_rtx_in_insn (&insn, replace_label, &rr);
  (in try_crossjump_to_edge; likewise, I don't think Richard's kit
touches this)


ira.c:3350:	for_each_rtx_in_insn (&insn, set_paradoxical_subreg,
  ...in update_equiv_regs, the use added in my
"[PATCH 191/236] Remove DF_REF_INSN scaffolding":
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00554.html

It looks like Richard's
"[PATCH 25/50] ira.c:set_paradoxical_subreg": 
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00161.html
optimizes the current code, and my reading of his patch is that it's
compatible with my patchkit; the for_each_rtx_in_insn can be eliminated.
Hence, depending on whose patch goes in first, the other patch will need
some fixup, but I think it will be trivial to fixup.


rtlanal.c:3103:  return for_each_rtx_in_insn (insn, for_each_inc_dec_find_mem, &data);
  ...in for_each_inc_dec, the use added in my:
"[PATCH 176/236] cselib and incdec":
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00711.html

Looks like Richard's
"[PATCH 40/50] rtlanal.c:for_each_inc_dec":
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00177.html
optimizes this.

Merging these looks more involved: in my patch series I establish that
the first param to for_each_inc_dec is an rtx_insn **, which may cause
type issues in Richard's new code as is - but perhaps may allow some
simplification?  Given that the loc passed in is an insn, am I right in
thinking we're only interested in MEM within the PATTERN of insn, right?
Also, am I right in thinking that that particular callback can't modify
the ptr that's passed in (I don't see writes back to *r)?  If so, that
suggests that we can lose an indirection from the first param, and
simply work on PATTERN (insn).


config/i386/i386.c:46886:            for_each_rtx_in_insn (&insn, (rtx_function) ix86_loop_memcount,
  (in ix86_loop_unroll_adjust)

config/s390/s390.c:11820:            for_each_rtx_in_insn (&insn, (rtx_function) check_dpu, &mem_count);
  (in s390_loop_unroll_adjust)

(as far as I can see Richard's patches don't touch the config subdirs).


Hope this is sane
Dave

Re: [PATCH 007/236] New function: for_each_rtx_in_insn

[Richard Sandiford]

David Malcolm <dmalcolm@redhat.com> writes:
> On Tue, 2014-08-12 at 15:08 -0600, Jeff Law wrote:
>> On 08/06/14 11:19, David Malcolm wrote:
>> > gcc/
>> > 	* rtl.h (for_each_rtx_in_insn): New function.
>> > 	* rtlanal.c (for_each_rtx_in_insn): Likewise.
>> OK.  Note that we're moving away from for_each_rtx...   I haven't 
>> looked, but there's a reasonable chance we may not need it after Richard 
>> S.'s work is committed.  Something to watch.
>
> CCing Richard S, as a "heads up".
>
> Richard, for context, the patch in this thread is this one:
> https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00494.html
>
> which adds a "for_each_rtx_in_insn" function, to work on a top-level
> insn node, as part of a big cleanup I'm working on that distinguishes
> between insn nodes vs arbitrary rtx nodes:
> https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00498.html
>
> I believe that your rtl-iter reworking:
>  https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00133.html
> hasn't landed in trunk yet (I don't see an rtl-iter.h there yet).

Right.  I think they're held up on patch 40 (ironically the one that
conflicts with yours).

> More detailed notes follow:
>
> My reading of Richard's patch series is that it optimizes many specific
> for_each_rtx implementations, but keeps the existing generic one around.

Yes, but that's only temporary.  The eventual aim is to get rid of
for_each_rtx altogether.  The series I posted dealt with all calls
in gcc/ itself and the next series will get rid of all other calls
(in config/).

> Some notes on all of the places in which I've made use of the new
> "for_each_rtx_in_insn" in my patchkit:
>
> cfgcleanup.c:1728:		  for_each_rtx_in_insn (&BB_END (bb1), replace_label, &rr);
> cfgcleanup.c:1742:		  for_each_rtx_in_insn (&BB_END (bb1), replace_label, &rr);
>   (both in outgoing_edges_match; I don't think Richard's patchkit
> touches this one).
>
>
> cfgcleanup.c:2002:		for_each_rtx_in_insn (&insn, replace_label, &rr);
>   (in try_crossjump_to_edge; likewise, I don't think Richard's kit
> touches this)

These are patch 38: https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00175.html

> rtlanal.c:3103:  return for_each_rtx_in_insn (insn, for_each_inc_dec_find_mem, &data);
>   ...in for_each_inc_dec, the use added in my:
> "[PATCH 176/236] cselib and incdec":
> https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00711.html
>
> Looks like Richard's
> "[PATCH 40/50] rtlanal.c:for_each_inc_dec":
> https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00177.html
> optimizes this.
>
> Merging these looks more involved: in my patch series I establish that
> the first param to for_each_inc_dec is an rtx_insn **, which may cause
> type issues in Richard's new code as is - but perhaps may allow some
> simplification?  Given that the loc passed in is an insn, am I right in
> thinking we're only interested in MEM within the PATTERN of insn, right?
> Also, am I right in thinking that that particular callback can't modify
> the ptr that's passed in (I don't see writes back to *r)?  If so, that
> suggests that we can lose an indirection from the first param, and
> simply work on PATTERN (insn).

Yeah, that's true, we could lose the indirection.  I'll fix up patch 40
accordingly.

Thanks,
Richard

Re: [PATCH 007/236] New function: for_each_rtx_in_insn

[Jeff Law]

On 08/14/14 15:36, Richard Sandiford wrote:
>
> Right.  I think they're held up on patch 40 (ironically the one that
> conflicts with yours).
I think we could declare side effects in notes as invalid and add some 
ENABLE_CHECKING bits to enforce that.  With those in place, my concerns 
around #40 from your series would be eliminated.

Jeff

Re: [PATCH 007/236] New function: for_each_rtx_in_insn

[David Malcolm]

On Tue, 2014-08-12 at 15:08 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (for_each_rtx_in_insn): New function.
> > 	* rtlanal.c (for_each_rtx_in_insn): Likewise.
> OK.  Note that we're moving away from for_each_rtx...   I haven't 
> looked, but there's a reasonable chance we may not need it after Richard 
> S.'s work is committed.  Something to watch.

Thanks.  Committed to trunk as r214119 [having bootstrapped&regrtested
on x86_64 linux (Fedora 20) as part of patches 2-8 (as per:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html )
and having verified build by itself]

Dave

[PATCH 058/236] cfgloop.c: Use rtx_insn

[David Malcolm]

gcc/
	* cfgloop.c (loop_exits_from_bb_p): Strengthen local "insn" from
	rtx to rtx_insn *.
---
 gcc/cfgloop.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/cfgloop.c b/gcc/cfgloop.c
index 73f79ef..6d1fe8d 100644
--- a/gcc/cfgloop.c
+++ b/gcc/cfgloop.c
@@ -1736,7 +1736,7 @@ loop_exits_from_bb_p (struct loop *loop, basic_block bb)
 location_t
 get_loop_location (struct loop *loop)
 {
-  rtx insn = NULL;
+  rtx_insn *insn = NULL;
   struct niter_desc *desc = NULL;
   edge exit;
 
-- 
1.8.5.3

[PATCH 001/236] Convert lab_rtx_for_bb from pointer_map_t to pointer_map<rtx>

[David Malcolm]

This gives a slight improvement in typesafety in cfgexpand.c

gcc/
	* cfgexpand.c (lab_rtx_for_bb): Convert from pointer_map_t to
	pointer_map<rtx>.
	(label_rtx_for_bb): Update for conversion of lab_rtx_for_bb to
	a pointer_map<rtx>, eliminating casts from void* to rtx.
	(expand_gimple_basic_block): Likewise.
	(pass_expand::execute): Likewise, using new/delete of
	pointer_map<rtx> rathern than pointer_map_create/destroy.  NULLify
	the lab_rtx_for_bb ptr after deletion for good measure.
---
 gcc/cfgexpand.c | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 934f40d..d124d94 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -1956,7 +1956,7 @@ maybe_dump_rtl_for_gimple_stmt (gimple stmt, rtx since)
 
 /* Maps the blocks that do not contain tree labels to rtx labels.  */
 
-static struct pointer_map_t *lab_rtx_for_bb;
+static struct pointer_map<rtx> *lab_rtx_for_bb;
 
 /* Returns the label_rtx expression for a label starting basic block BB.  */
 
@@ -1966,14 +1966,14 @@ label_rtx_for_bb (basic_block bb ATTRIBUTE_UNUSED)
   gimple_stmt_iterator gsi;
   tree lab;
   gimple lab_stmt;
-  void **elt;
+  rtx *elt;
 
   if (bb->flags & BB_RTL)
     return block_label (bb);
 
-  elt = pointer_map_contains (lab_rtx_for_bb, bb);
+  elt = lab_rtx_for_bb->contains (bb);
   if (elt)
-    return (rtx) *elt;
+    return *elt;
 
   /* Find the tree label if it is present.  */
 
@@ -1990,9 +1990,9 @@ label_rtx_for_bb (basic_block bb ATTRIBUTE_UNUSED)
       return label_rtx (lab);
     }
 
-  elt = pointer_map_insert (lab_rtx_for_bb, bb);
+  elt = lab_rtx_for_bb->insert (bb);
   *elt = gen_label_rtx ();
-  return (rtx) *elt;
+  return *elt;
 }
 
 
@@ -4880,7 +4880,7 @@ expand_gimple_basic_block (basic_block bb, bool disable_tail_calls)
   rtx note, last;
   edge e;
   edge_iterator ei;
-  void **elt;
+  rtx *elt;
 
   if (dump_file)
     fprintf (dump_file, "\n;; Generating RTL for gimple basic block %d\n",
@@ -4924,7 +4924,7 @@ expand_gimple_basic_block (basic_block bb, bool disable_tail_calls)
 	stmt = NULL;
     }
 
-  elt = pointer_map_contains (lab_rtx_for_bb, bb);
+  elt = lab_rtx_for_bb->contains (bb);
 
   if (stmt || elt)
     {
@@ -4937,7 +4937,7 @@ expand_gimple_basic_block (basic_block bb, bool disable_tail_calls)
 	}
 
       if (elt)
-	emit_label ((rtx) *elt);
+	emit_label (*elt);
 
       /* Java emits line number notes in the top of labels.
 	 ??? Make this go away once line number notes are obsoleted.  */
@@ -5797,7 +5797,7 @@ pass_expand::execute (function *fun)
   FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (fun)->succs)
     e->flags &= ~EDGE_EXECUTABLE;
 
-  lab_rtx_for_bb = pointer_map_create ();
+  lab_rtx_for_bb = new pointer_map <rtx>;
   FOR_BB_BETWEEN (bb, init_block->next_bb, EXIT_BLOCK_PTR_FOR_FN (fun),
 		  next_bb)
     bb = expand_gimple_basic_block (bb, var_ret_seq != NULL_RTX);
@@ -5822,7 +5822,8 @@ pass_expand::execute (function *fun)
 
   /* Expansion is used by optimization passes too, set maybe_hot_insn_p
      conservatively to true until they are all profile aware.  */
-  pointer_map_destroy (lab_rtx_for_bb);
+  delete lab_rtx_for_bb;
+  lab_rtx_for_bb = NULL;
   free_histograms ();
 
   construct_exit_block ();
-- 
1.8.5.3

Re: [PATCH 001/236] Convert lab_rtx_for_bb from pointer_map_t to pointer_map<rtx>

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> This gives a slight improvement in typesafety in cfgexpand.c
>
> gcc/
> 	* cfgexpand.c (lab_rtx_for_bb): Convert from pointer_map_t to
> 	pointer_map<rtx>.
> 	(label_rtx_for_bb): Update for conversion of lab_rtx_for_bb to
> 	a pointer_map<rtx>, eliminating casts from void* to rtx.
> 	(expand_gimple_basic_block): Likewise.
> 	(pass_expand::execute): Likewise, using new/delete of
> 	pointer_map<rtx> rathern than pointer_map_create/destroy.  NULLify
> 	the lab_rtx_for_bb ptr after deletion for good measure.
OK.    I think this is still appropriate.  It might even still apply 
cleanly.

Seems like this could have gone forward independently of everything else.


jeff

Re: [PATCH 001/236] Convert lab_rtx_for_bb from pointer_map_t to pointer_map<rtx>

[Trevor Saunders]

On Tue, Aug 12, 2014 at 02:50:39PM -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> >This gives a slight improvement in typesafety in cfgexpand.c
> >
> >gcc/
> >	* cfgexpand.c (lab_rtx_for_bb): Convert from pointer_map_t to
> >	pointer_map<rtx>.
> >	(label_rtx_for_bb): Update for conversion of lab_rtx_for_bb to
> >	a pointer_map<rtx>, eliminating casts from void* to rtx.
> >	(expand_gimple_basic_block): Likewise.
> >	(pass_expand::execute): Likewise, using new/delete of
> >	pointer_map<rtx> rathern than pointer_map_create/destroy.  NULLify
> >	the lab_rtx_for_bb ptr after deletion for good measure.
> OK.    I think this is still appropriate.  It might even still apply
> cleanly.

actually I suspect this patch is totally obsolete after my patches last
week to remove pointer_map. This is now a hash_map<basic_block, rtx> *.

sorry about the duplicated effort :/


Trev

> 
> Seems like this could have gone forward independently of everything else.
> 
> 
> jeff
> 
> 

Re: [PATCH 001/236] Convert lab_rtx_for_bb from pointer_map_t to pointer_map<rtx>

[David Malcolm]

On Tue, 2014-08-12 at 17:15 -0400, Trevor Saunders wrote:
> On Tue, Aug 12, 2014 at 02:50:39PM -0600, Jeff Law wrote:
> > On 08/06/14 11:19, David Malcolm wrote:
> > >This gives a slight improvement in typesafety in cfgexpand.c
> > >
> > >gcc/
> > >	* cfgexpand.c (lab_rtx_for_bb): Convert from pointer_map_t to
> > >	pointer_map<rtx>.
> > >	(label_rtx_for_bb): Update for conversion of lab_rtx_for_bb to
> > >	a pointer_map<rtx>, eliminating casts from void* to rtx.
> > >	(expand_gimple_basic_block): Likewise.
> > >	(pass_expand::execute): Likewise, using new/delete of
> > >	pointer_map<rtx> rathern than pointer_map_create/destroy.  NULLify
> > >	the lab_rtx_for_bb ptr after deletion for good measure.
> > OK.    I think this is still appropriate.  It might even still apply
> > cleanly.
> 
> actually I suspect this patch is totally obsolete after my patches last
> week to remove pointer_map. This is now a hash_map<basic_block, rtx> *.
> 
> sorry about the duplicated effort :/

No worries.

I believe in an earlier version of this patchkit I then updated it from
pointer_map<rtx> to pointer_map<rtx_code_label *>.

In theory the fix would then be to convert it from
  hash_map<basic_block, rtx> *
to
  hash_map<basic_block, rtx_code_label *> *

But looking over the patches it looks like I dropped the later usage of
rtx_code_label * for some reason (perhaps when I ran into the issues
mentioned in patch 2).

Maybe something to look at once the rest of the patches are in, I guess.

> Trev
> 
> > 
> > Seems like this could have gone forward independently of everything else.
> > 
> > 
> > jeff
> > 
> > 

Re: [PATCH 001/236] Convert lab_rtx_for_bb from pointer_map_t to pointer_map<rtx>

[Jeff Law]

On 08/12/14 18:45, David Malcolm wrote:
> On Tue, 2014-08-12 at 17:15 -0400, Trevor Saunders wrote:
>> On Tue, Aug 12, 2014 at 02:50:39PM -0600, Jeff Law wrote:
>>> On 08/06/14 11:19, David Malcolm wrote:
>>>> This gives a slight improvement in typesafety in cfgexpand.c
>>>>
>>>> gcc/
>>>> 	* cfgexpand.c (lab_rtx_for_bb): Convert from pointer_map_t to
>>>> 	pointer_map<rtx>.
>>>> 	(label_rtx_for_bb): Update for conversion of lab_rtx_for_bb to
>>>> 	a pointer_map<rtx>, eliminating casts from void* to rtx.
>>>> 	(expand_gimple_basic_block): Likewise.
>>>> 	(pass_expand::execute): Likewise, using new/delete of
>>>> 	pointer_map<rtx> rathern than pointer_map_create/destroy.  NULLify
>>>> 	the lab_rtx_for_bb ptr after deletion for good measure.
>>> OK.    I think this is still appropriate.  It might even still apply
>>> cleanly.
>>
>> actually I suspect this patch is totally obsolete after my patches last
>> week to remove pointer_map. This is now a hash_map<basic_block, rtx> *.
I haven't updated my tree recently, so I don't have those in my tree yet :-)


Jeff

[PATCH 008/236] Split BB_HEAD et al into BB_HEAD/SET_BB_HEAD variants

[David Malcolm]

This is an enabling patch, splitting existing macros in two, covering
the rvalue and lvalue uses separately.

Followup patches will replace these with functions, and gradually convert
the types from rtx to rtx_insn *, but we need to do this separately for
the lvalue vs rvalue use-cases, hence this patch.

The plan is to eventually eliminate the split in a further followup patch,
and convert them back to macros, where the underlying fields are of type
rtx_insn *.

gcc/
	* basic-block.h (BB_HEAD): Split macro in two: the existing one,
	for rvalues, and...
	(SET_BB_HEAD): New macro, for use as a lvalue.
	(BB_END, SET_BB_END): Likewise.
	(BB_HEADER, SET_BB_HEADER): Likewise.
	(BB_FOOTER, SET_BB_FOOTER): Likewise.

	* bb-reorder.c (add_labels_and_missing_jumps): Convert lvalue use
	of BB_* macros into SET_BB_* macros.
	(fix_crossing_unconditional_branches): Likewise.
	* caller-save.c (save_call_clobbered_regs): Likewise.
	(insert_one_insn): Likewise.
	* cfgbuild.c (find_bb_boundaries): Likewise.
	* cfgcleanup.c (merge_blocks_move_successor_nojumps): Likewise.
	(outgoing_edges_match): Likewise.
	(try_optimize_cfg): Likewise.
	* cfgexpand.c (expand_gimple_cond): Likewise.
	(expand_gimple_tailcall): Likewise.
	(expand_gimple_basic_block): Likewise.
	(construct_exit_block): Likewise.
	* cfgrtl.c (delete_insn): Likewise.
	(create_basic_block_structure): Likewise.
	(rtl_delete_block): Likewise.
	(rtl_split_block): Likewise.
	(emit_nop_for_unique_locus_between): Likewise.
	(rtl_merge_blocks): Likewise.
	(block_label): Likewise.
	(try_redirect_by_replacing_jump): Likewise.
	(emit_barrier_after_bb): Likewise.
	(fixup_abnormal_edges): Likewise.
	(record_effective_endpoints): Likewise.
	(relink_block_chain): Likewise.
	(fixup_reorder_chain): Likewise.
	(fixup_fallthru_exit_predecessor): Likewise.
	(cfg_layout_duplicate_bb): Likewise.
	(cfg_layout_split_block): Likewise.
	(cfg_layout_delete_block): Likewise.
	(cfg_layout_merge_blocks): Likewise.
	* combine.c (update_cfg_for_uncondjump): Likewise.
	* emit-rtl.c (add_insn_after): Likewise.
	(remove_insn): Likewise.
	(reorder_insns): Likewise.
	(emit_insn_after_1): Likewise.
	* haifa-sched.c (get_ebb_head_tail): Likewise.
	(restore_other_notes): Likewise.
	(move_insn): Likewise.
	(sched_extend_bb): Likewise.
	(fix_jump_move): Likewise.
	* ifcvt.c (noce_process_if_block): Likewise.
	(dead_or_predicable): Likewise.
	* ira.c (update_equiv_regs): Likewise.
	* reg-stack.c (change_stack): Likewise.
	* sel-sched-ir.c (sel_move_insn): Likewise.
	* sel-sched.c (move_nop_to_previous_block): Likewise.

	* config/c6x/c6x.c (hwloop_optimize): Likewise.
	* config/ia64/ia64.c (emit_predicate_relation_info): Likewise.

/
	* rtx-classes-status.txt (TODO): Add SET_BB_HEAD, SET_BB_END,
	SET_BB_HEADER, SET_BB_FOOTER
---
 gcc/basic-block.h      | 15 +++++++---
 gcc/bb-reorder.c       |  4 +--
 gcc/caller-save.c      |  6 ++--
 gcc/cfgbuild.c         |  4 +--
 gcc/cfgcleanup.c       | 14 +++++-----
 gcc/cfgexpand.c        | 22 +++++++--------
 gcc/cfgrtl.c           | 74 +++++++++++++++++++++++++-------------------------
 gcc/combine.c          |  2 +-
 gcc/config/c6x/c6x.c   |  4 +--
 gcc/config/ia64/ia64.c |  6 ++--
 gcc/emit-rtl.c         | 12 ++++----
 gcc/haifa-sched.c      | 18 ++++++------
 gcc/ifcvt.c            |  4 +--
 gcc/ira.c              |  2 +-
 gcc/reg-stack.c        |  2 +-
 gcc/sel-sched-ir.c     |  2 +-
 gcc/sel-sched.c        |  2 +-
 rtx-classes-status.txt |  4 +++
 18 files changed, 104 insertions(+), 93 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 0bf6e87..d27f498 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -368,10 +368,17 @@ struct GTY(()) control_flow_graph {
 \f
 /* Stuff for recording basic block info.  */
 
-#define BB_HEAD(B)      (B)->il.x.head_
-#define BB_END(B)       (B)->il.x.rtl->end_
-#define BB_HEADER(B)    (B)->il.x.rtl->header_
-#define BB_FOOTER(B)    (B)->il.x.rtl->footer_
+/* These macros are currently split into two:
+   one suitable for reading, and for writing.
+   These will become functions in a follow-up patch.  */
+#define BB_HEAD(B)      (((const_basic_block)B)->il.x.head_)
+#define SET_BB_HEAD(B)  (B)->il.x.head_
+#define BB_END(B)       (((const rtl_bb_info *)(B)->il.x.rtl)->end_)
+#define SET_BB_END(B)   (B)->il.x.rtl->end_
+#define BB_HEADER(B)    (((const rtl_bb_info *)(B)->il.x.rtl)->header_)
+#define SET_BB_HEADER(B) (B)->il.x.rtl->header_
+#define BB_FOOTER(B)    (((const rtl_bb_info *)(B)->il.x.rtl)->footer_)
+#define SET_BB_FOOTER(B) (B)->il.x.rtl->footer_
 
 /* Special block numbers [markers] for entry and exit.
    Neither of them is supposed to hold actual statements.  */
diff --git a/gcc/bb-reorder.c b/gcc/bb-reorder.c
index 61b0cab..2d3e6eb 100644
--- a/gcc/bb-reorder.c
+++ b/gcc/bb-reorder.c
@@ -1757,7 +1757,7 @@ add_labels_and_missing_jumps (vec<edge> crossing_edges)
       gcc_assert (single_succ_p (src));
 
       new_jump = emit_jump_insn_after (gen_jump (label), BB_END (src));
-      BB_END (src) = new_jump;
+      SET_BB_END (src) = new_jump;
       JUMP_LABEL (new_jump) = label;
       LABEL_NUSES (label) += 1;
 
@@ -2188,7 +2188,7 @@ fix_crossing_unconditional_branches (void)
 	      /* Make BB_END for cur_bb be the jump instruction (NOT the
 		 barrier instruction at the end of the sequence...).  */
 
-	      BB_END (cur_bb) = jump_insn;
+	      SET_BB_END (cur_bb) = jump_insn;
 	    }
 	}
     }
diff --git a/gcc/caller-save.c b/gcc/caller-save.c
index 64fd66c..41b3f01 100644
--- a/gcc/caller-save.c
+++ b/gcc/caller-save.c
@@ -921,7 +921,7 @@ save_call_clobbered_regs (void)
 		      if (NEXT_INSN (ins))
 			PREV_INSN (NEXT_INSN (ins)) = ins;
                       if (BB_END (bb) == insn)
-			BB_END (bb) = ins;
+			SET_BB_END (bb) = ins;
 		    }
 		  else
 		    gcc_assert (DEBUG_INSN_P (ins));
@@ -1418,7 +1418,7 @@ insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
 
       CLEAR_REG_SET (&new_chain->dead_or_set);
       if (chain->insn == BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
-	BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
+	SET_BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
     }
   else
     {
@@ -1438,7 +1438,7 @@ insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
 		   &new_chain->live_throughout);
       CLEAR_REG_SET (&new_chain->dead_or_set);
       if (chain->insn == BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
-	BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
+	SET_BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
     }
   new_chain->block = chain->block;
   new_chain->is_caller_save_insn = 1;
diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index ae1f114..76d3a99 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -467,7 +467,7 @@ find_bb_boundaries (basic_block bb)
 	  fallthru = split_block (bb, PREV_INSN (insn));
 	  if (flow_transfer_insn)
 	    {
-	      BB_END (bb) = flow_transfer_insn;
+	      SET_BB_END (bb) = flow_transfer_insn;
 
 	      /* Clean up the bb field for the insns between the blocks.  */
 	      for (x = NEXT_INSN (flow_transfer_insn);
@@ -504,7 +504,7 @@ find_bb_boundaries (basic_block bb)
      ordinary jump, we need to take care and move basic block boundary.  */
   if (flow_transfer_insn)
     {
-      BB_END (bb) = flow_transfer_insn;
+      SET_BB_END (bb) = flow_transfer_insn;
 
       /* Clean up the bb field for the insns that do not belong to BB.  */
       x = flow_transfer_insn;
diff --git a/gcc/cfgcleanup.c b/gcc/cfgcleanup.c
index 7c24a6d..b6cb77b 100644
--- a/gcc/cfgcleanup.c
+++ b/gcc/cfgcleanup.c
@@ -726,7 +726,7 @@ merge_blocks_move_successor_nojumps (basic_block a, basic_block b)
   if (tablejump_p (BB_END (b), &label, &table)
       && prev_active_insn (label) == BB_END (b))
     {
-      BB_END (b) = table;
+      SET_BB_END (b) = table;
     }
 
   /* There had better have been a barrier there.  Delete it.  */
@@ -739,7 +739,7 @@ merge_blocks_move_successor_nojumps (basic_block a, basic_block b)
   reorder_insns_nobb (BB_HEAD (b), BB_END (b), BB_END (a));
 
   /* Restore the real end of b.  */
-  BB_END (b) = real_b_end;
+  SET_BB_END (b) = real_b_end;
 
   if (dump_file)
     fprintf (dump_file, "Moved block %d after %d and merged.\n",
@@ -1723,7 +1723,7 @@ outgoing_edges_match (int mode, basic_block bb1, basic_block bb2)
 		  rr.r1 = label1;
 		  rr.r2 = label2;
 		  rr.update_label_nuses = false;
-		  for_each_rtx (&BB_END (bb1), replace_label, &rr);
+		  for_each_rtx (&SET_BB_END (bb1), replace_label, &rr);
 
 		  match = (old_insns_match_p (mode, BB_END (bb1), BB_END (bb2))
 			   == dir_both);
@@ -1737,7 +1737,7 @@ outgoing_edges_match (int mode, basic_block bb1, basic_block bb2)
 		     from the instruction is deleted too.  */
 		  rr.r1 = label2;
 		  rr.r2 = label1;
-		  for_each_rtx (&BB_END (bb1), replace_label, &rr);
+		  for_each_rtx (&SET_BB_END (bb1), replace_label, &rr);
 
 		  return match;
 		}
@@ -2673,13 +2673,13 @@ try_optimize_cfg (int mode)
 				{
 				  if (BB_FOOTER (b))
 				    {
-				      BB_FOOTER (e->src) = BB_FOOTER (b);
-				      BB_FOOTER (b) = NULL;
+				      SET_BB_FOOTER (e->src) = BB_FOOTER (b);
+				      SET_BB_FOOTER (b) = NULL;
 				    }
 				  else
 				    {
 				      start_sequence ();
-				      BB_FOOTER (e->src) = emit_barrier ();
+				      SET_BB_FOOTER (e->src) = emit_barrier ();
 				      end_sequence ();
 				    }
 				}
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index d124d94..df52c08 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -2158,9 +2158,9 @@ expand_gimple_cond (basic_block bb, gimple stmt)
     set_curr_insn_location (false_edge->goto_locus);
   emit_jump (label_rtx_for_bb (false_edge->dest));
 
-  BB_END (bb) = last;
+  SET_BB_END (bb) = last;
   if (BARRIER_P (BB_END (bb)))
-    BB_END (bb) = PREV_INSN (BB_END (bb));
+    SET_BB_END (bb) = PREV_INSN (BB_END (bb));
   update_bb_for_insn (bb);
 
   new_bb = create_basic_block (NEXT_INSN (last), get_last_insn (), bb);
@@ -2175,7 +2175,7 @@ expand_gimple_cond (basic_block bb, gimple stmt)
   new_edge->probability = REG_BR_PROB_BASE;
   new_edge->count = new_bb->count;
   if (BARRIER_P (BB_END (new_bb)))
-    BB_END (new_bb) = PREV_INSN (BB_END (new_bb));
+    SET_BB_END (new_bb) = PREV_INSN (BB_END (new_bb));
   update_bb_for_insn (new_bb);
 
   maybe_dump_rtl_for_gimple_stmt (stmt, last2);
@@ -3468,7 +3468,7 @@ expand_gimple_tailcall (basic_block bb, gimple stmt, bool *can_fallthru)
 		 | EDGE_SIBCALL);
   e->probability += probability;
   e->count += count;
-  BB_END (bb) = last;
+  SET_BB_END (bb) = last;
   update_bb_for_insn (bb);
 
   if (NEXT_INSN (last))
@@ -3477,7 +3477,7 @@ expand_gimple_tailcall (basic_block bb, gimple stmt, bool *can_fallthru)
 
       last = BB_END (bb);
       if (BARRIER_P (last))
-	BB_END (bb) = PREV_INSN (last);
+	SET_BB_END (bb) = PREV_INSN (last);
     }
 
   maybe_dump_rtl_for_gimple_stmt (stmt, last2);
@@ -4941,15 +4941,15 @@ expand_gimple_basic_block (basic_block bb, bool disable_tail_calls)
 
       /* Java emits line number notes in the top of labels.
 	 ??? Make this go away once line number notes are obsoleted.  */
-      BB_HEAD (bb) = NEXT_INSN (last);
+      SET_BB_HEAD (bb) = NEXT_INSN (last);
       if (NOTE_P (BB_HEAD (bb)))
-	BB_HEAD (bb) = NEXT_INSN (BB_HEAD (bb));
+	SET_BB_HEAD (bb) = NEXT_INSN (BB_HEAD (bb));
       note = emit_note_after (NOTE_INSN_BASIC_BLOCK, BB_HEAD (bb));
 
       maybe_dump_rtl_for_gimple_stmt (stmt, last);
     }
   else
-    note = BB_HEAD (bb) = emit_note (NOTE_INSN_BASIC_BLOCK);
+    note = SET_BB_HEAD (bb) = emit_note (NOTE_INSN_BASIC_BLOCK);
 
   NOTE_BASIC_BLOCK (note) = bb;
 
@@ -5232,7 +5232,7 @@ expand_gimple_basic_block (basic_block bb, bool disable_tail_calls)
     last = PREV_INSN (last);
   if (JUMP_TABLE_DATA_P (last))
     last = PREV_INSN (PREV_INSN (last));
-  BB_END (bb) = last;
+  SET_BB_END (bb) = last;
 
   update_bb_for_insn (bb);
 
@@ -5335,7 +5335,7 @@ construct_exit_block (void)
     return;
   /* While emitting the function end we could move end of the last basic
      block.  */
-  BB_END (prev_bb) = orig_end;
+  SET_BB_END (prev_bb) = orig_end;
   while (NEXT_INSN (head) && NOTE_P (NEXT_INSN (head)))
     head = NEXT_INSN (head);
   /* But make sure exit_block starts with RETURN_LABEL, otherwise the
@@ -5347,7 +5347,7 @@ construct_exit_block (void)
       while (NEXT_INSN (head) != return_label)
 	{
 	  if (!NOTE_P (NEXT_INSN (head)))
-	    BB_END (prev_bb) = NEXT_INSN (head);
+	    SET_BB_END (prev_bb) = NEXT_INSN (head);
 	  head = NEXT_INSN (head);
 	}
     }
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 49faf2e..026fb48 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -152,9 +152,9 @@ delete_insn (rtx insn)
 	      && bb == BLOCK_FOR_INSN (bb_note))
 	    {
 	      reorder_insns_nobb (insn, insn, bb_note);
-	      BB_HEAD (bb) = bb_note;
+	      SET_BB_HEAD (bb) = bb_note;
 	      if (BB_END (bb) == bb_note)
-		BB_END (bb) = insn;
+		SET_BB_END (bb) = insn;
 	    }
 	}
 
@@ -326,8 +326,8 @@ create_basic_block_structure (rtx head, rtx end, rtx bb_note, basic_block after)
   if (NEXT_INSN (end) == bb_note)
     end = bb_note;
 
-  BB_HEAD (bb) = head;
-  BB_END (bb) = end;
+  SET_BB_HEAD (bb) = head;
+  SET_BB_END (bb) = end;
   bb->index = last_basic_block_for_fn (cfun)++;
   bb->flags = BB_NEW | BB_RTL;
   link_block (bb, after);
@@ -400,7 +400,7 @@ rtl_delete_block (basic_block b)
   end = get_last_bb_insn (b);
 
   /* Selectively delete the entire chain.  */
-  BB_HEAD (b) = NULL;
+  SET_BB_HEAD (b) = NULL;
   delete_insn_chain (insn, end, true);
 
 
@@ -744,7 +744,7 @@ rtl_split_block (basic_block bb, void *insnp)
   /* Create the new basic block.  */
   new_bb = create_basic_block (NEXT_INSN (insn), BB_END (bb), bb);
   BB_COPY_PARTITION (new_bb, bb);
-  BB_END (bb) = insn;
+  SET_BB_END (bb) = insn;
 
   /* Redirect the outgoing edges.  */
   new_bb->succs = bb->succs;
@@ -803,7 +803,7 @@ emit_nop_for_unique_locus_between (basic_block a, basic_block b)
   if (!unique_locus_on_edge_between_p (a, b))
     return;
 
-  BB_END (a) = emit_insn_after_noloc (gen_nop (), BB_END (a), a);
+  SET_BB_END (a) = emit_insn_after_noloc (gen_nop (), BB_END (a), a);
   INSN_LOCATION (BB_END (a)) = EDGE_SUCC (a, 0)->goto_locus;
 }
 
@@ -885,8 +885,8 @@ rtl_merge_blocks (basic_block a, basic_block b)
 
   /* Delete everything marked above as well as crap that might be
      hanging out between the two blocks.  */
-  BB_END (a) = a_end;
-  BB_HEAD (b) = b_empty ? NULL_RTX : b_head;
+  SET_BB_END (a) = a_end;
+  SET_BB_HEAD (b) = b_empty ? NULL_RTX : b_head;
   delete_insn_chain (del_first, del_last, true);
 
   /* When not optimizing and the edge is the only place in RTL which holds
@@ -902,8 +902,8 @@ rtl_merge_blocks (basic_block a, basic_block b)
     {
       update_bb_for_insn_chain (a_end, b_debug_end, a);
 
-      BB_END (a) = b_debug_end;
-      BB_HEAD (b) = NULL_RTX;
+      SET_BB_END (a) = b_debug_end;
+      SET_BB_HEAD (b) = NULL_RTX;
     }
   else if (b_end != b_debug_end)
     {
@@ -915,7 +915,7 @@ rtl_merge_blocks (basic_block a, basic_block b)
 	reorder_insns_nobb (NEXT_INSN (a_end), PREV_INSN (b_debug_start),
 			    b_debug_end);
       update_bb_for_insn_chain (b_debug_start, b_debug_end, a);
-      BB_END (a) = b_debug_end;
+      SET_BB_END (a) = b_debug_end;
     }
 
   df_bb_delete (b->index);
@@ -980,7 +980,7 @@ block_label (basic_block block)
 
   if (!LABEL_P (BB_HEAD (block)))
     {
-      BB_HEAD (block) = emit_label_before (gen_label_rtx (), BB_HEAD (block));
+      SET_BB_HEAD (block) = emit_label_before (gen_label_rtx (), BB_HEAD (block));
     }
 
   return BB_HEAD (block);
@@ -1063,7 +1063,7 @@ try_redirect_by_replacing_jump (edge e, basic_block target, bool in_cfglayout)
 		  if (PREV_INSN (insn))
 		    NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
 		  else
-		    BB_FOOTER (src) = NEXT_INSN (insn);
+		    SET_BB_FOOTER (src) = NEXT_INSN (insn);
 		  if (NEXT_INSN (insn))
 		    PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
 		}
@@ -1448,7 +1448,7 @@ emit_barrier_after_bb (basic_block bb)
   gcc_assert (current_ir_type () == IR_RTL_CFGRTL
               || current_ir_type () == IR_RTL_CFGLAYOUT);
   if (current_ir_type () == IR_RTL_CFGLAYOUT)
-    BB_FOOTER (bb) = unlink_insn_chain (barrier, barrier);
+    SET_BB_FOOTER (bb) = unlink_insn_chain (barrier, barrier);
 }
 
 /* Like force_nonfallthru below, but additionally performs redirection
@@ -3253,7 +3253,7 @@ fixup_abnormal_edges (void)
 	      e = find_fallthru_edge (bb->succs);
 
 	      stop = NEXT_INSN (BB_END (bb));
-	      BB_END (bb) = insn;
+	      SET_BB_END (bb) = insn;
 
 	      for (insn = NEXT_INSN (insn); insn != stop; insn = next)
 		{
@@ -3449,11 +3449,11 @@ record_effective_endpoints (void)
       rtx end;
 
       if (PREV_INSN (BB_HEAD (bb)) && next_insn != BB_HEAD (bb))
-	BB_HEADER (bb) = unlink_insn_chain (next_insn,
-					      PREV_INSN (BB_HEAD (bb)));
+	SET_BB_HEADER (bb) = unlink_insn_chain (next_insn,
+						PREV_INSN (BB_HEAD (bb)));
       end = skip_insns_after_block (bb);
       if (NEXT_INSN (BB_END (bb)) && BB_END (bb) != end)
-	BB_FOOTER (bb) = unlink_insn_chain (NEXT_INSN (BB_END (bb)), end);
+	SET_BB_FOOTER (bb) = unlink_insn_chain (NEXT_INSN (BB_END (bb)), end);
       next_insn = NEXT_INSN (BB_END (bb));
     }
 
@@ -3613,7 +3613,7 @@ relink_block_chain (bool stay_in_cfglayout_mode)
     {
       bb->aux = NULL;
       if (!stay_in_cfglayout_mode)
-	BB_HEADER (bb) = BB_FOOTER (bb) = NULL;
+	SET_BB_HEADER (bb) = SET_BB_FOOTER (bb) = NULL;
     }
 
   /* Maybe reset the original copy tables, they are not valid anymore
@@ -3906,8 +3906,8 @@ fixup_reorder_chain (void)
 		}
 	      nb = split_edge (e);
 	      if (!INSN_P (BB_END (nb)))
-		BB_END (nb) = emit_insn_after_noloc (gen_nop (), BB_END (nb),
-						     nb);
+		SET_BB_END (nb) = emit_insn_after_noloc (gen_nop (), BB_END (nb),
+							 nb);
 	      INSN_LOCATION (BB_END (nb)) = e->goto_locus;
 
 	      /* If there are other incoming edges to the destination block
@@ -3981,8 +3981,8 @@ fixup_fallthru_exit_predecessor (void)
 	  bb = split_block (bb, NULL)->dest;
 	  bb->aux = c->aux;
 	  c->aux = bb;
-	  BB_FOOTER (bb) = BB_FOOTER (c);
-	  BB_FOOTER (c) = NULL;
+	  SET_BB_FOOTER (bb) = BB_FOOTER (c);
+	  SET_BB_FOOTER (c) = NULL;
 	}
 
       while (c->aux != bb)
@@ -4185,7 +4185,7 @@ cfg_layout_duplicate_bb (basic_block bb)
 	insn = NEXT_INSN (insn);
       insn = duplicate_insn_chain (BB_HEADER (bb), insn);
       if (insn)
-	BB_HEADER (new_bb) = unlink_insn_chain (insn, get_last_insn ());
+	SET_BB_HEADER (new_bb) = unlink_insn_chain (insn, get_last_insn ());
     }
 
   if (BB_FOOTER (bb))
@@ -4195,7 +4195,7 @@ cfg_layout_duplicate_bb (basic_block bb)
 	insn = NEXT_INSN (insn);
       insn = duplicate_insn_chain (BB_FOOTER (bb), insn);
       if (insn)
-	BB_FOOTER (new_bb) = unlink_insn_chain (insn, get_last_insn ());
+	SET_BB_FOOTER (new_bb) = unlink_insn_chain (insn, get_last_insn ());
     }
 
   return new_bb;
@@ -4303,8 +4303,8 @@ cfg_layout_split_block (basic_block bb, void *insnp)
   rtx insn = (rtx) insnp;
   basic_block new_bb = rtl_split_block (bb, insn);
 
-  BB_FOOTER (new_bb) = BB_FOOTER (bb);
-  BB_FOOTER (bb) = NULL;
+  SET_BB_FOOTER (new_bb) = BB_FOOTER (bb);
+  SET_BB_FOOTER (bb) = NULL;
 
   return new_bb;
 }
@@ -4434,7 +4434,7 @@ cfg_layout_delete_block (basic_block bb)
 	      if (PREV_INSN (insn))
 		NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
 	      else
-		BB_FOOTER (bb) = NEXT_INSN (insn);
+		SET_BB_FOOTER (bb) = NEXT_INSN (insn);
 	      if (NEXT_INSN (insn))
 		PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
 	    }
@@ -4457,7 +4457,7 @@ cfg_layout_delete_block (basic_block bb)
 	}
     }
   if (bb->next_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
-    to = &BB_HEADER (bb->next_bb);
+    to = &SET_BB_HEADER (bb->next_bb);
   else
     to = &cfg_layout_function_footer;
 
@@ -4569,7 +4569,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
   if (BB_FOOTER (b))
     {
       if (!BB_FOOTER (a))
-	BB_FOOTER (a) = BB_FOOTER (b);
+	SET_BB_FOOTER (a) = SET_BB_FOOTER (b);
       else
 	{
 	  rtx last = BB_FOOTER (a);
@@ -4579,7 +4579,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
 	  NEXT_INSN (last) = BB_FOOTER (b);
 	  PREV_INSN (BB_FOOTER (b)) = last;
 	}
-      BB_FOOTER (b) = NULL;
+      SET_BB_FOOTER (b) = NULL;
     }
 
   /* Move things from b->header before a->footer.
@@ -4588,7 +4588,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
    if (BB_HEADER (b))
      {
       if (! BB_FOOTER (a))
-	BB_FOOTER (a) = BB_HEADER (b);
+	SET_BB_FOOTER (a) = BB_HEADER (b);
       else
 	{
 	  rtx last = BB_HEADER (b);
@@ -4597,9 +4597,9 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
 	    last = NEXT_INSN (last);
 	  NEXT_INSN (last) = BB_FOOTER (a);
 	  PREV_INSN (BB_FOOTER (a)) = last;
-	  BB_FOOTER (a) = BB_HEADER (b);
+	  SET_BB_FOOTER (a) = BB_HEADER (b);
 	}
-      BB_HEADER (b) = NULL;
+      SET_BB_HEADER (b) = NULL;
     }
 
   /* In the case basic blocks are not adjacent, move them around.  */
@@ -4613,7 +4613,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
   else
     {
       insn = BB_HEAD (b);
-      BB_END (a) = BB_END (b);
+      SET_BB_END (a) = BB_END (b);
     }
 
   /* emit_insn_after_noloc doesn't call df_insn_change_bb.
@@ -4624,7 +4624,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
   if (!NOTE_INSN_BASIC_BLOCK_P (insn))
     insn = NEXT_INSN (insn);
   gcc_assert (NOTE_INSN_BASIC_BLOCK_P (insn));
-  BB_HEAD (b) = BB_END (b) = NULL;
+  SET_BB_HEAD (b) = SET_BB_END (b) = NULL;
   delete_insn (insn);
 
   df_bb_delete (b->index);
diff --git a/gcc/combine.c b/gcc/combine.c
index 72bde7a..3cc8f2b 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -2393,7 +2393,7 @@ update_cfg_for_uncondjump (rtx insn)
 	    if (PREV_INSN (insn))
 	      NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
 	    else
-	      BB_FOOTER (bb) = NEXT_INSN (insn);
+	      SET_BB_FOOTER (bb) = NEXT_INSN (insn);
 	    if (NEXT_INSN (insn))
 	      PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
 	  }
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index 339da13..2d73cb8 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -5827,8 +5827,8 @@ hwloop_optimize (hwloop_info loop)
   NEXT_INSN (PREV_INSN (BB_HEAD (bb))) = orig_vec[0];
   NEXT_INSN (orig_vec[n_insns - 1]) = NEXT_INSN (BB_END (bb));
   PREV_INSN (NEXT_INSN (BB_END (bb))) = orig_vec[n_insns - 1];
-  BB_HEAD (bb) = orig_vec[0];
-  BB_END (bb) = orig_vec[n_insns - 1];
+  SET_BB_HEAD (bb) = orig_vec[0];
+  SET_BB_END (bb) = orig_vec[n_insns - 1];
  undo_splits:
   free_delay_pairs ();
   FOR_BB_INSNS (bb, insn)
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 118e5bf..feee157 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -9617,7 +9617,7 @@ emit_predicate_relation_info (void)
 	    rtx p = gen_rtx_REG (BImode, r);
 	    rtx n = emit_insn_after (gen_pred_rel_mutex (p), head);
 	    if (head == BB_END (bb))
-	      BB_END (bb) = n;
+	      SET_BB_END (bb) = n;
 	    head = n;
 	  }
     }
@@ -9639,9 +9639,9 @@ emit_predicate_relation_info (void)
 	      rtx b = emit_insn_before (gen_safe_across_calls_all (), insn);
 	      rtx a = emit_insn_after (gen_safe_across_calls_normal (), insn);
 	      if (BB_HEAD (bb) == insn)
-		BB_HEAD (bb) = b;
+		SET_BB_HEAD (bb) = b;
 	      if (BB_END (bb) == insn)
-		BB_END (bb) = a;
+		SET_BB_END (bb) = a;
 	    }
 
 	  if (insn == BB_END (bb))
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 3bf2ff7..2c3d8f7 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3984,7 +3984,7 @@ add_insn_after (rtx insn, rtx after, basic_block bb)
 	  /* Avoid clobbering of structure when creating new BB.  */
 	  && !BARRIER_P (insn)
 	  && !NOTE_INSN_BASIC_BLOCK_P (insn))
-	BB_END (bb) = insn;
+	SET_BB_END (bb) = insn;
     }
 }
 
@@ -4113,10 +4113,10 @@ remove_insn (rtx insn)
 	  /* Never ever delete the basic block note without deleting whole
 	     basic block.  */
 	  gcc_assert (!NOTE_P (insn));
-	  BB_HEAD (bb) = next;
+	  SET_BB_HEAD (bb) = next;
 	}
       if (BB_END (bb) == insn)
-	BB_END (bb) = prev;
+	SET_BB_END (bb) = prev;
     }
 }
 
@@ -4216,12 +4216,12 @@ reorder_insns (rtx from, rtx to, rtx after)
 	  && (bb2 = BLOCK_FOR_INSN (from)))
 	{
 	  if (BB_END (bb2) == to)
-	    BB_END (bb2) = prev;
+	    SET_BB_END (bb2) = prev;
 	  df_set_bb_dirty (bb2);
 	}
 
       if (BB_END (bb) == after)
-	BB_END (bb) = to;
+	SET_BB_END (bb) = to;
 
       for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
 	if (!BARRIER_P (x))
@@ -4389,7 +4389,7 @@ emit_insn_after_1 (rtx first, rtx after, basic_block bb)
 	  df_insn_rescan (last);
 	}
       if (BB_END (bb) == after)
-	BB_END (bb) = last;
+	SET_BB_END (bb) = last;
     }
   else
     for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 0e1800a..b3482e3 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -4757,7 +4757,7 @@ get_ebb_head_tail (basic_block beg, basic_block end, rtx *headp, rtx *tailp)
 		reorder_insns_nobb (note, note, end_tail);
 
 		if (end_tail == BB_END (end))
-		  BB_END (end) = note;
+		  SET_BB_END (end) = note;
 
 		if (BLOCK_FOR_INSN (note) != end)
 		  df_insn_change_bb (note, end);
@@ -4816,7 +4816,7 @@ restore_other_notes (rtx head, basic_block head_bb)
       NEXT_INSN (note_list) = head;
 
       if (BLOCK_FOR_INSN (head) != head_bb)
-	BB_END (head_bb) = note_list;
+	SET_BB_END (head_bb) = note_list;
 
       head = note_head;
     }
@@ -5215,7 +5215,7 @@ move_insn (rtx insn, rtx last, rtx nt)
 
 	  gcc_assert (BLOCK_FOR_INSN (PREV_INSN (insn)) == bb);
 
-	  BB_END (bb) = PREV_INSN (insn);
+	  SET_BB_END (bb) = PREV_INSN (insn);
 	}
 
       gcc_assert (BB_END (bb) != last);
@@ -5264,7 +5264,7 @@ move_insn (rtx insn, rtx last, rtx nt)
 
       /* Update BB_END, if needed.  */
       if (BB_END (bb) == last)
-	BB_END (bb) = insn;
+	SET_BB_END (bb) = insn;
     }
 
   SCHED_GROUP_P (insn) = 0;
@@ -7552,7 +7552,7 @@ sched_extend_bb (void)
       rtx note = emit_note_after (NOTE_INSN_DELETED, end);
       /* Make note appear outside BB.  */
       set_block_for_insn (note, NULL);
-      BB_END (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb) = end;
+      SET_BB_END (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb) = end;
     }
 }
 
@@ -8236,18 +8236,18 @@ fix_jump_move (rtx jump)
 
   if (!NOTE_INSN_BASIC_BLOCK_P (BB_END (jump_bb_next)))
     /* if jump_bb_next is not empty.  */
-    BB_END (jump_bb) = BB_END (jump_bb_next);
+    SET_BB_END (jump_bb) = BB_END (jump_bb_next);
 
   if (BB_END (bb) != PREV_INSN (jump))
     /* Then there are instruction after jump that should be placed
        to jump_bb_next.  */
-    BB_END (jump_bb_next) = BB_END (bb);
+    SET_BB_END (jump_bb_next) = BB_END (bb);
   else
     /* Otherwise jump_bb_next is empty.  */
-    BB_END (jump_bb_next) = NEXT_INSN (BB_HEAD (jump_bb_next));
+    SET_BB_END (jump_bb_next) = NEXT_INSN (BB_HEAD (jump_bb_next));
 
   /* To make assertion in move_insn happy.  */
-  BB_END (bb) = PREV_INSN (jump);
+  SET_BB_END (bb) = PREV_INSN (jump);
 
   update_bb_for_insn (jump_bb_next);
 }
diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index 2ca2278..d27b5fa 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -2594,7 +2594,7 @@ noce_process_if_block (struct noce_if_info *if_info)
 	  rtx note;
 
 	  if (else_bb && insn_b == BB_END (else_bb))
-	    BB_END (else_bb) = PREV_INSN (insn_b);
+	    SET_BB_END (else_bb) = PREV_INSN (insn_b);
 	  reorder_insns (insn_b, insn_b, PREV_INSN (jump));
 
 	  /* If there was a REG_EQUAL note, delete it since it may have been
@@ -4359,7 +4359,7 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
       rtx insn;
 
       if (end == BB_END (merge_bb))
-	BB_END (merge_bb) = PREV_INSN (head);
+	SET_BB_END (merge_bb) = PREV_INSN (head);
 
       /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
 	 notes being moved might become invalid.  */
diff --git a/gcc/ira.c b/gcc/ira.c
index 26d017e..bad6759 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -3863,7 +3863,7 @@ update_equiv_regs (void)
 		      REG_LIVE_LENGTH (regno) = 2;
 
 		      if (insn == BB_HEAD (bb))
-			BB_HEAD (bb) = PREV_INSN (insn);
+			SET_BB_HEAD (bb) = PREV_INSN (insn);
 
 		      ira_reg_equiv[regno].init_insns
 			= gen_rtx_INSN_LIST (VOIDmode, new_insn, NULL_RTX);
diff --git a/gcc/reg-stack.c b/gcc/reg-stack.c
index 692abc5..e0d5d70 100644
--- a/gcc/reg-stack.c
+++ b/gcc/reg-stack.c
@@ -2600,7 +2600,7 @@ change_stack (rtx insn, stack_ptr old, stack_ptr new_stack, enum emit_where wher
     }
 
   if (update_end)
-    BB_END (current_block) = PREV_INSN (insn);
+    SET_BB_END (current_block) = PREV_INSN (insn);
 }
 \f
 /* Print stack configuration.  */
diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 3cba326..7eccdf9 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -1432,7 +1432,7 @@ sel_move_insn (expr_t expr, int seqno, insn_t after)
   /* Update links from insn to bb and vice versa.  */
   df_insn_change_bb (insn, bb);
   if (BB_END (bb) == after)
-    BB_END (bb) = insn;
+    SET_BB_END (bb) = insn;
 
   prepare_insn_expr (insn, seqno);
   return insn;
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index 0c864ac..bfbd2fe 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -5209,7 +5209,7 @@ move_nop_to_previous_block (insn_t nop, basic_block prev_bb)
   NEXT_INSN (nop) = note;
   PREV_INSN (next_insn) = note;
 
-  BB_END (prev_bb) = nop;
+  SET_BB_END (prev_bb) = nop;
   BLOCK_FOR_INSN (nop) = prev_bb;
 }
 
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index 9971853..c1039bc 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -7,3 +7,7 @@ Phase 3: per-file commits within "config" subdirs: TODO
 Phase 4: removal of "scaffolding":                 TODO
 Phase 5: additional rtx_def subclasses:            TODO
 Phase 6: use extra rtx_def subclasses:             TODO
+
+TODO: "Scaffolding" to be removed
+=================================
+* SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
-- 
1.8.5.3

Re: [PATCH 008/236] Split BB_HEAD et al into BB_HEAD/SET_BB_HEAD variants

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> This is an enabling patch, splitting existing macros in two, covering
> the rvalue and lvalue uses separately.
>
> Followup patches will replace these with functions, and gradually convert
> the types from rtx to rtx_insn *, but we need to do this separately for
> the lvalue vs rvalue use-cases, hence this patch.
>
> The plan is to eventually eliminate the split in a further followup patch,
> and convert them back to macros, where the underlying fields are of type
> rtx_insn *.
>
> gcc/
> 	* basic-block.h (BB_HEAD): Split macro in two: the existing one,
> 	for rvalues, and...
> 	(SET_BB_HEAD): New macro, for use as a lvalue.
> 	(BB_END, SET_BB_END): Likewise.
> 	(BB_HEADER, SET_BB_HEADER): Likewise.
> 	(BB_FOOTER, SET_BB_FOOTER): Likewise.
>
> 	* bb-reorder.c (add_labels_and_missing_jumps): Convert lvalue use
> 	of BB_* macros into SET_BB_* macros.
> 	(fix_crossing_unconditional_branches): Likewise.
> 	* caller-save.c (save_call_clobbered_regs): Likewise.
> 	(insert_one_insn): Likewise.
> 	* cfgbuild.c (find_bb_boundaries): Likewise.
> 	* cfgcleanup.c (merge_blocks_move_successor_nojumps): Likewise.
> 	(outgoing_edges_match): Likewise.
> 	(try_optimize_cfg): Likewise.
> 	* cfgexpand.c (expand_gimple_cond): Likewise.
> 	(expand_gimple_tailcall): Likewise.
> 	(expand_gimple_basic_block): Likewise.
> 	(construct_exit_block): Likewise.
> 	* cfgrtl.c (delete_insn): Likewise.
> 	(create_basic_block_structure): Likewise.
> 	(rtl_delete_block): Likewise.
> 	(rtl_split_block): Likewise.
> 	(emit_nop_for_unique_locus_between): Likewise.
> 	(rtl_merge_blocks): Likewise.
> 	(block_label): Likewise.
> 	(try_redirect_by_replacing_jump): Likewise.
> 	(emit_barrier_after_bb): Likewise.
> 	(fixup_abnormal_edges): Likewise.
> 	(record_effective_endpoints): Likewise.
> 	(relink_block_chain): Likewise.
> 	(fixup_reorder_chain): Likewise.
> 	(fixup_fallthru_exit_predecessor): Likewise.
> 	(cfg_layout_duplicate_bb): Likewise.
> 	(cfg_layout_split_block): Likewise.
> 	(cfg_layout_delete_block): Likewise.
> 	(cfg_layout_merge_blocks): Likewise.
> 	* combine.c (update_cfg_for_uncondjump): Likewise.
> 	* emit-rtl.c (add_insn_after): Likewise.
> 	(remove_insn): Likewise.
> 	(reorder_insns): Likewise.
> 	(emit_insn_after_1): Likewise.
> 	* haifa-sched.c (get_ebb_head_tail): Likewise.
> 	(restore_other_notes): Likewise.
> 	(move_insn): Likewise.
> 	(sched_extend_bb): Likewise.
> 	(fix_jump_move): Likewise.
> 	* ifcvt.c (noce_process_if_block): Likewise.
> 	(dead_or_predicable): Likewise.
> 	* ira.c (update_equiv_regs): Likewise.
> 	* reg-stack.c (change_stack): Likewise.
> 	* sel-sched-ir.c (sel_move_insn): Likewise.
> 	* sel-sched.c (move_nop_to_previous_block): Likewise.
>
> 	* config/c6x/c6x.c (hwloop_optimize): Likewise.
> 	* config/ia64/ia64.c (emit_predicate_relation_info): Likewise.
>
> /
> 	* rtx-classes-status.txt (TODO): Add SET_BB_HEAD, SET_BB_END,
> 	SET_BB_HEADER, SET_BB_FOOTER
OK.  For those watching at home, the scaffolding gets removed in patches 
170 and 178 and we return to using BB_HEAD, BB_END, etc without a 
separate one for rvalues vs lvalues.

Obviously as the bits stage in there may be a window where folks will 
have to deal with the split, but hopefully that window will be quite 
short.  While I'd like to avoid that, I fear we'll have David spinning 
his wheels to get the patch series to a point where it can all go in at 
once.

Jeff

Re: [PATCH 008/236] Split BB_HEAD et al into BB_HEAD/SET_BB_HEAD variants

[David Malcolm]

On Tue, 2014-08-12 at 15:15 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > This is an enabling patch, splitting existing macros in two, covering
> > the rvalue and lvalue uses separately.
> >
> > Followup patches will replace these with functions, and gradually convert
> > the types from rtx to rtx_insn *, but we need to do this separately for
> > the lvalue vs rvalue use-cases, hence this patch.
> >
> > The plan is to eventually eliminate the split in a further followup patch,
> > and convert them back to macros, where the underlying fields are of type
> > rtx_insn *.
> >
> > gcc/
> > 	* basic-block.h (BB_HEAD): Split macro in two: the existing one,
> > 	for rvalues, and...
> > 	(SET_BB_HEAD): New macro, for use as a lvalue.
> > 	(BB_END, SET_BB_END): Likewise.
> > 	(BB_HEADER, SET_BB_HEADER): Likewise.
> > 	(BB_FOOTER, SET_BB_FOOTER): Likewise.
> >
> > 	* bb-reorder.c (add_labels_and_missing_jumps): Convert lvalue use
> > 	of BB_* macros into SET_BB_* macros.
> > 	(fix_crossing_unconditional_branches): Likewise.
> > 	* caller-save.c (save_call_clobbered_regs): Likewise.
> > 	(insert_one_insn): Likewise.
> > 	* cfgbuild.c (find_bb_boundaries): Likewise.
> > 	* cfgcleanup.c (merge_blocks_move_successor_nojumps): Likewise.
> > 	(outgoing_edges_match): Likewise.
> > 	(try_optimize_cfg): Likewise.
> > 	* cfgexpand.c (expand_gimple_cond): Likewise.
> > 	(expand_gimple_tailcall): Likewise.
> > 	(expand_gimple_basic_block): Likewise.
> > 	(construct_exit_block): Likewise.
> > 	* cfgrtl.c (delete_insn): Likewise.
> > 	(create_basic_block_structure): Likewise.
> > 	(rtl_delete_block): Likewise.
> > 	(rtl_split_block): Likewise.
> > 	(emit_nop_for_unique_locus_between): Likewise.
> > 	(rtl_merge_blocks): Likewise.
> > 	(block_label): Likewise.
> > 	(try_redirect_by_replacing_jump): Likewise.
> > 	(emit_barrier_after_bb): Likewise.
> > 	(fixup_abnormal_edges): Likewise.
> > 	(record_effective_endpoints): Likewise.
> > 	(relink_block_chain): Likewise.
> > 	(fixup_reorder_chain): Likewise.
> > 	(fixup_fallthru_exit_predecessor): Likewise.
> > 	(cfg_layout_duplicate_bb): Likewise.
> > 	(cfg_layout_split_block): Likewise.
> > 	(cfg_layout_delete_block): Likewise.
> > 	(cfg_layout_merge_blocks): Likewise.
> > 	* combine.c (update_cfg_for_uncondjump): Likewise.
> > 	* emit-rtl.c (add_insn_after): Likewise.
> > 	(remove_insn): Likewise.
> > 	(reorder_insns): Likewise.
> > 	(emit_insn_after_1): Likewise.
> > 	* haifa-sched.c (get_ebb_head_tail): Likewise.
> > 	(restore_other_notes): Likewise.
> > 	(move_insn): Likewise.
> > 	(sched_extend_bb): Likewise.
> > 	(fix_jump_move): Likewise.
> > 	* ifcvt.c (noce_process_if_block): Likewise.
> > 	(dead_or_predicable): Likewise.
> > 	* ira.c (update_equiv_regs): Likewise.
> > 	* reg-stack.c (change_stack): Likewise.
> > 	* sel-sched-ir.c (sel_move_insn): Likewise.
> > 	* sel-sched.c (move_nop_to_previous_block): Likewise.
> >
> > 	* config/c6x/c6x.c (hwloop_optimize): Likewise.
> > 	* config/ia64/ia64.c (emit_predicate_relation_info): Likewise.
> >
> > /
> > 	* rtx-classes-status.txt (TODO): Add SET_BB_HEAD, SET_BB_END,
> > 	SET_BB_HEADER, SET_BB_FOOTER
> OK.  For those watching at home, the scaffolding gets removed in patches 
> 170 and 178 and we return to using BB_HEAD, BB_END, etc without a 
> separate one for rvalues vs lvalues.
> 
> Obviously as the bits stage in there may be a window where folks will 
> have to deal with the split, but hopefully that window will be quite 
> short.  While I'd like to avoid that, I fear we'll have David spinning 
> his wheels to get the patch series to a point where it can all go in at 
> once.

Thanks; committed to trunk as r214121, having bootstrapped&regtested on
x86_64 Fedora 20 (together with patches 2-8 of the kit as per:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html )
and verified build of the patch by itself for targets
x86_64-unknown-linux-gnu, c6x-elf and ia64-elf.

[PATCH 019/236] Strengthen return type of gen_label_rtx

[David Malcolm]

gcc/
	* rtl.h (gen_label_rtx): Strengthen return type from rtx to
	rtx_code_label *.

	* emit-rtl.c (gen_label_rtx): Likewise.
---
 gcc/emit-rtl.c | 7 ++++---
 gcc/rtl.h      | 2 +-
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index c51b7d8..5175284 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -2468,11 +2468,12 @@ set_mem_attrs_for_spill (rtx mem)
 \f
 /* Return a newly created CODE_LABEL rtx with a unique label number.  */
 
-rtx
+rtx_code_label *
 gen_label_rtx (void)
 {
-  return gen_rtx_CODE_LABEL (VOIDmode, NULL_RTX, NULL_RTX,
-			     NULL, label_num++, NULL);
+  return as_a <rtx_code_label *> (
+	    gen_rtx_CODE_LABEL (VOIDmode, NULL_RTX, NULL_RTX,
+				NULL, label_num++, NULL));
 }
 \f
 /* For procedure integration.  */
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 049f01e..a703e34 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2278,7 +2278,7 @@ extern rtx gen_reg_rtx (enum machine_mode);
 extern rtx gen_rtx_REG_offset (rtx, enum machine_mode, unsigned int, int);
 extern rtx gen_reg_rtx_offset (rtx, enum machine_mode, int);
 extern rtx gen_reg_rtx_and_attrs (rtx);
-extern rtx gen_label_rtx (void);
+extern rtx_code_label *gen_label_rtx (void);
 extern rtx gen_lowpart_common (enum machine_mode, rtx);
 
 /* In cse.c */
-- 
1.8.5.3

Re: [PATCH 019/236] Strengthen return type of gen_label_rtx

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> gcc/
> 	* rtl.h (gen_label_rtx): Strengthen return type from rtx to
> 	rtx_code_label *.
>
> 	* emit-rtl.c (gen_label_rtx): Likewise.
Presumably at some point we'll look at the gen_XXXXXXX and split out 
those which return items for the chain vs everything else.

OK.

Thanks,
jeff

Re: [PATCH 019/236] Strengthen return type of gen_label_rtx

[David Malcolm]

On Tue, 2014-08-12 at 16:00 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (gen_label_rtx): Strengthen return type from rtx to
> > 	rtx_code_label *.
> >
> > 	* emit-rtl.c (gen_label_rtx): Likewise.
> Presumably at some point we'll look at the gen_XXXXXXX and split out 
> those which return items for the chain vs everything else.
> 
> OK.

Thanks; committed to trunk as r214179, having verified
bootstrap&regrtest on x86_64-unknown-linux-gnu (Fedora 20) albeit in
combination with patches 9-29 [1], and verified that it builds
standalone with 10 targets.

Dave

[PATCH 013/236] DEP_PRO/DEP_CON scaffolding

[David Malcolm]

For now, convert DEP_PRO and DEP_CON into functions.  We will eventually
change them back to macros once the relevant fields are of type
rtx_insn *.

gcc/
	* sched-int.h (DEP_PRO): struct _dep's "pro" and "con" fields will
	eventually be rtx_insn *, but to help with transition, for now,
	convert from an access macro into a pair of functions: DEP_PRO
	returning an rtx_insn * and...
	(SET_DEP_PRO): New function, for use where DEP_PRO is used as an
	lvalue, returning an rtx&.
	(DEP_CON): Analogous changes to DEP_PRO above.
	(SET_DEP_CON): Likewise.

	* haifa-sched.c (create_check_block_twin): Replace DEP_CON used as
	an lvalue to SET_DEP_CON.
	* sched-deps.c (init_dep_1): Likewise for DEP_PRO and DEP_CON.
	(sd_copy_back_deps): Likewise for DEP_CON.
	(DEP_PRO): New function, adding a checked cast for now.
	(DEP_CON): Likewise.
	(SET_DEP_PRO): New function.
	(SET_DEP_CON): Likewise.

/
	* rtx-classes-status.txt: Add SET_DEP_PRO, SET_DEP_CON.
---
 gcc/haifa-sched.c      |  2 +-
 gcc/sched-deps.c       | 26 +++++++++++++++++++++++---
 gcc/sched-int.h        |  6 ++++--
 rtx-classes-status.txt |  1 +
 4 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 59c7fc9..caee1b8 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -7886,7 +7886,7 @@ create_check_block_twin (rtx insn, bool mutate_p)
 
       if (rec != EXIT_BLOCK_PTR_FOR_FN (cfun))
 	{
-	  DEP_CON (new_dep) = twin;
+	  SET_DEP_CON (new_dep) = twin;
 	  sd_add_dep (new_dep, false);
 	}
     }
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index efc4223..d59cffc 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -103,8 +103,8 @@ dk_to_ds (enum reg_note dk)
 void
 init_dep_1 (dep_t dep, rtx pro, rtx con, enum reg_note type, ds_t ds)
 {
-  DEP_PRO (dep) = pro;
-  DEP_CON (dep) = con;
+  SET_DEP_PRO (dep) = pro;
+  SET_DEP_CON (dep) = con;
   DEP_TYPE (dep) = type;
   DEP_STATUS (dep) = ds;
   DEP_COST (dep) = UNKNOWN_DEP_COST;
@@ -1416,7 +1416,7 @@ sd_copy_back_deps (rtx to, rtx from, bool resolved_p)
       dep_def _new_dep, *new_dep = &_new_dep;
 
       copy_dep (new_dep, dep);
-      DEP_CON (new_dep) = to;
+      SET_DEP_CON (new_dep) = to;
       sd_add_dep (new_dep, resolved_p);
     }
 }
@@ -4895,4 +4895,24 @@ find_modifiable_mems (rtx head, rtx tail)
 	     success_in_block);
 }
 
+rtx_insn *DEP_PRO (dep_t dep)
+{
+  return as_a_nullable <rtx_insn *> (dep->pro);
+}
+
+rtx_insn *DEP_CON (dep_t dep)
+{
+  return as_a_nullable <rtx_insn *> (dep->con);
+}
+
+rtx& SET_DEP_PRO (dep_t dep)
+{
+  return dep->pro;
+}
+
+rtx& SET_DEP_CON (dep_t dep)
+{
+  return dep->con;
+}
+
 #endif /* INSN_SCHEDULING */
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index fe00496..3680889 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -250,8 +250,10 @@ struct _dep
 typedef struct _dep dep_def;
 typedef dep_def *dep_t;
 
-#define DEP_PRO(D) ((D)->pro)
-#define DEP_CON(D) ((D)->con)
+extern rtx_insn *DEP_PRO (dep_t dep);
+extern rtx_insn *DEP_CON (dep_t dep);
+extern rtx& SET_DEP_PRO (dep_t dep);
+extern rtx& SET_DEP_CON (dep_t dep);
 #define DEP_TYPE(D) ((D)->type)
 #define DEP_STATUS(D) ((D)->status)
 #define DEP_COST(D) ((D)->cost)
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index 68bbe54..2a8773f 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -12,4 +12,5 @@ TODO: "Scaffolding" to be removed
 =================================
 * DF_REF_INSN
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
+* SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
-- 
1.8.5.3

Re: [PATCH 013/236] DEP_PRO/DEP_CON scaffolding

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> For now, convert DEP_PRO and DEP_CON into functions.  We will eventually
> change them back to macros once the relevant fields are of type
> rtx_insn *.
>
> gcc/
> 	* sched-int.h (DEP_PRO): struct _dep's "pro" and "con" fields will
> 	eventually be rtx_insn *, but to help with transition, for now,
> 	convert from an access macro into a pair of functions: DEP_PRO
> 	returning an rtx_insn * and...
> 	(SET_DEP_PRO): New function, for use where DEP_PRO is used as an
> 	lvalue, returning an rtx&.
> 	(DEP_CON): Analogous changes to DEP_PRO above.
> 	(SET_DEP_CON): Likewise.
>
> 	* haifa-sched.c (create_check_block_twin): Replace DEP_CON used as
> 	an lvalue to SET_DEP_CON.
> 	* sched-deps.c (init_dep_1): Likewise for DEP_PRO and DEP_CON.
> 	(sd_copy_back_deps): Likewise for DEP_CON.
> 	(DEP_PRO): New function, adding a checked cast for now.
> 	(DEP_CON): Likewise.
> 	(SET_DEP_PRO): New function.
> 	(SET_DEP_CON): Likewise.
OK.
jeff

Re: [PATCH 013/236] DEP_PRO/DEP_CON scaffolding

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 1433 bytes --]

On Tue, 2014-08-12 at 15:21 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > For now, convert DEP_PRO and DEP_CON into functions.  We will eventually
> > change them back to macros once the relevant fields are of type
> > rtx_insn *.
> >
> > gcc/
> > 	* sched-int.h (DEP_PRO): struct _dep's "pro" and "con" fields will
> > 	eventually be rtx_insn *, but to help with transition, for now,
> > 	convert from an access macro into a pair of functions: DEP_PRO
> > 	returning an rtx_insn * and...
> > 	(SET_DEP_PRO): New function, for use where DEP_PRO is used as an
> > 	lvalue, returning an rtx&.
> > 	(DEP_CON): Analogous changes to DEP_PRO above.
> > 	(SET_DEP_CON): Likewise.
> >
> > 	* haifa-sched.c (create_check_block_twin): Replace DEP_CON used as
> > 	an lvalue to SET_DEP_CON.
> > 	* sched-deps.c (init_dep_1): Likewise for DEP_PRO and DEP_CON.
> > 	(sd_copy_back_deps): Likewise for DEP_CON.
> > 	(DEP_PRO): New function, adding a checked cast for now.
> > 	(DEP_CON): Likewise.
> > 	(SET_DEP_PRO): New function.
> > 	(SET_DEP_CON): Likewise.
> OK.

Thanks.

Fixed up the two as_a_nullable to safe_as_a, and committed to trunk as
r214164, having verified bootstrap&regrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone with 9 targets.

Am attaching what I committed.

FWIW these function becomes macros again in patch #175.




[-- Attachment #2: r214164.patch --]
[-- Type: text/x-patch, Size: 3889 bytes --]

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 214163)
+++ ChangeLog	(revision 214164)
@@ -1,5 +1,9 @@
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
 
+	* rtx-classes-status.txt (TODO): Add SET_DEP_PRO, SET_DEP_CON.
+
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
 	* rtx-classes-status.txt (TODO): Add DF_REF_INSN.
 
 2014-08-19  Joost VandeVondele <vondele@gcc.gnu.org>
Index: rtx-classes-status.txt
===================================================================
--- rtx-classes-status.txt	(revision 214163)
+++ rtx-classes-status.txt	(revision 214164)
@@ -16,4 +16,5 @@
 =================================
 * DF_REF_INSN
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
+* SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214163)
+++ gcc/ChangeLog	(revision 214164)
@@ -1,3 +1,23 @@
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	* sched-int.h (DEP_PRO): struct _dep's "pro" and "con" fields will
+	eventually be rtx_insn *, but to help with transition, for now,
+	convert from an access macro into a pair of functions: DEP_PRO
+	returning an rtx_insn * and...
+	(SET_DEP_PRO): New function, for use where DEP_PRO is used as an
+	lvalue, returning an rtx&.
+	(DEP_CON): Analogous changes to DEP_PRO above.
+	(SET_DEP_CON): Likewise.
+
+	* haifa-sched.c (create_check_block_twin): Replace DEP_CON used as
+	an lvalue to SET_DEP_CON.
+	* sched-deps.c (init_dep_1): Likewise for DEP_PRO and DEP_CON.
+	(sd_copy_back_deps): Likewise for DEP_CON.
+	(DEP_PRO): New function, adding a checked cast for now.
+	(DEP_CON): Likewise.
+	(SET_DEP_PRO): New function.
+	(SET_DEP_CON): Likewise.
+
 2014-08-19  Yaakov Selkowitz  <yselkowi@redhat.com>
 
 	* config.gcc (*-*-cygwin*): Use __cxa_atexit by default.
Index: gcc/haifa-sched.c
===================================================================
--- gcc/haifa-sched.c	(revision 214163)
+++ gcc/haifa-sched.c	(revision 214164)
@@ -7947,7 +7947,7 @@
 
       if (rec != EXIT_BLOCK_PTR_FOR_FN (cfun))
 	{
-	  DEP_CON (new_dep) = twin;
+	  SET_DEP_CON (new_dep) = twin;
 	  sd_add_dep (new_dep, false);
 	}
     }
Index: gcc/sched-deps.c
===================================================================
--- gcc/sched-deps.c	(revision 214163)
+++ gcc/sched-deps.c	(revision 214164)
@@ -103,8 +103,8 @@
 void
 init_dep_1 (dep_t dep, rtx pro, rtx con, enum reg_note type, ds_t ds)
 {
-  DEP_PRO (dep) = pro;
-  DEP_CON (dep) = con;
+  SET_DEP_PRO (dep) = pro;
+  SET_DEP_CON (dep) = con;
   DEP_TYPE (dep) = type;
   DEP_STATUS (dep) = ds;
   DEP_COST (dep) = UNKNOWN_DEP_COST;
@@ -1416,7 +1416,7 @@
       dep_def _new_dep, *new_dep = &_new_dep;
 
       copy_dep (new_dep, dep);
-      DEP_CON (new_dep) = to;
+      SET_DEP_CON (new_dep) = to;
       sd_add_dep (new_dep, resolved_p);
     }
 }
@@ -4915,4 +4915,24 @@
 	     success_in_block);
 }
 
+rtx_insn *DEP_PRO (dep_t dep)
+{
+  return safe_as_a <rtx_insn *> (dep->pro);
+}
+
+rtx_insn *DEP_CON (dep_t dep)
+{
+  return safe_as_a <rtx_insn *> (dep->con);
+}
+
+rtx& SET_DEP_PRO (dep_t dep)
+{
+  return dep->pro;
+}
+
+rtx& SET_DEP_CON (dep_t dep)
+{
+  return dep->con;
+}
+
 #endif /* INSN_SCHEDULING */
Index: gcc/sched-int.h
===================================================================
--- gcc/sched-int.h	(revision 214163)
+++ gcc/sched-int.h	(revision 214164)
@@ -250,8 +250,10 @@
 typedef struct _dep dep_def;
 typedef dep_def *dep_t;
 
-#define DEP_PRO(D) ((D)->pro)
-#define DEP_CON(D) ((D)->con)
+extern rtx_insn *DEP_PRO (dep_t dep);
+extern rtx_insn *DEP_CON (dep_t dep);
+extern rtx& SET_DEP_PRO (dep_t dep);
+extern rtx& SET_DEP_CON (dep_t dep);
 #define DEP_TYPE(D) ((D)->type)
 #define DEP_STATUS(D) ((D)->status)
 #define DEP_COST(D) ((D)->cost)

[PATCH 042/236] try_split returns an rtx_insn

[David Malcolm]

gcc/
	* rtl.h (try_split): Strengthen return type from rtx to rtx_insn *.

	* emit-rtl.c (try_split): Likewise, also for locals "before" and
	"after".  For now, don't strengthen param "trial", which requires
	adding checked casts when returning it.
---
 gcc/emit-rtl.c | 12 ++++++------
 gcc/rtl.h      |  2 +-
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index b64b276..05b787b 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3538,11 +3538,11 @@ mark_label_nuses (rtx x)
    replacement insn depending on the value of LAST.  Otherwise, it
    returns TRIAL.  If the insn to be returned can be split, it will be.  */
 
-rtx
+rtx_insn *
 try_split (rtx pat, rtx trial, int last)
 {
-  rtx before = PREV_INSN (trial);
-  rtx after = NEXT_INSN (trial);
+  rtx_insn *before = PREV_INSN (trial);
+  rtx_insn *after = NEXT_INSN (trial);
   int has_barrier = 0;
   rtx note, seq, tem;
   int probability;
@@ -3552,7 +3552,7 @@ try_split (rtx pat, rtx trial, int last)
 
   /* We're not good at redistributing frame information.  */
   if (RTX_FRAME_RELATED_P (trial))
-    return trial;
+    return as_a <rtx_insn *> (trial);
 
   if (any_condjump_p (trial)
       && (note = find_reg_note (trial, REG_BR_PROB, 0)))
@@ -3572,7 +3572,7 @@ try_split (rtx pat, rtx trial, int last)
     }
 
   if (!seq)
-    return trial;
+    return as_a <rtx_insn *> (trial);
 
   /* Avoid infinite loop if any insn of the result matches
      the original pattern.  */
@@ -3581,7 +3581,7 @@ try_split (rtx pat, rtx trial, int last)
     {
       if (INSN_P (insn_last)
 	  && rtx_equal_p (PATTERN (insn_last), pat))
-	return trial;
+	return as_a <rtx_insn *> (trial);
       if (!NEXT_INSN (insn_last))
 	break;
       insn_last = NEXT_INSN (insn_last);
diff --git a/gcc/rtl.h b/gcc/rtl.h
index a97a81e..f28a62a 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2442,7 +2442,7 @@ extern rtx delete_related_insns (rtx);
 extern rtx *find_constant_term_loc (rtx *);
 
 /* In emit-rtl.c  */
-extern rtx try_split (rtx, rtx, int);
+extern rtx_insn *try_split (rtx, rtx, int);
 extern int split_branch_probability;
 
 /* In unknown file  */
-- 
1.8.5.3

Re: [PATCH 042/236] try_split returns an rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* rtl.h (try_split): Strengthen return type from rtx to rtx_insn *.
>
> 	* emit-rtl.c (try_split): Likewise, also for locals "before" and
> 	"after".  For now, don't strengthen param "trial", which requires
> 	adding checked casts when returning it.
OK.
Jeff

Re: [PATCH 042/236] try_split returns an rtx_insn

[David Malcolm]

On Wed, 2014-08-13 at 12:06 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (try_split): Strengthen return type from rtx to rtx_insn *.
> >
> > 	* emit-rtl.c (try_split): Likewise, also for locals "before" and
> > 	"after".  For now, don't strengthen param "trial", which requires
> > 	adding checked casts when returning it.
> OK.

Thanks; committed to trunk as r214260.

[PATCH 080/236] haifa-sched.c: Use rtx_insn

[David Malcolm]

gcc/
	* haifa-sched.c (bb_header): Strengthen from rtx * to rtx_insn **.
	(add_delay_dependencies): Strengthen local "pro" from rtx to
	rtx_insn *.
	(recompute_todo_spec): Likewise.
	(dep_cost_1): Likewise for locals "insn", "used".
	(schedule_insn): Likewise for local "dbg".
	(schedule_insn): Likewise for locals "pro", "next".
	(unschedule_insns_until): Likewise for local "con".
	(restore_pattern): Likewise for local "next".
	(estimate_insn_tick): Likewise for local "pro".
	(resolve_dependencies): Likewise for local "next".
	(fix_inter_tick): Likewise.
	(fix_tick_ready): Likewise for local "pro".
	(add_to_speculative_block): Likewise for locals "check", "twin",
	"pro".
	(sched_extend_bb): Likewise for locals "end", "insn".
	(init_before_recovery): Likewise for local "x".
	(sched_create_recovery_block): Likewise for local "barrier".
	(create_check_block_twin): Likewise for local "pro".
	(fix_recovery_deps): Likewise for locals "note", "insn", "jump",
	"consumer".
	(unlink_bb_notes): Update for change to type of bb_header.
	Strengthen locals "prev", "label", "note", "next" from rtx to
	rtx_insn *.
	(clear_priorities): Likewise for local "pro".
---
 gcc/haifa-sched.c | 60 ++++++++++++++++++++++++++++---------------------------
 1 file changed, 31 insertions(+), 29 deletions(-)

diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 04a3576..fd46977 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -261,7 +261,7 @@ bool haifa_recovery_bb_ever_added_p;
 static int nr_begin_data, nr_be_in_data, nr_begin_control, nr_be_in_control;
 
 /* Array used in {unlink, restore}_bb_notes.  */
-static rtx *bb_header = 0;
+static rtx_insn **bb_header = 0;
 
 /* Basic block after which recovery blocks will be created.  */
 static basic_block before_recovery;
@@ -798,7 +798,7 @@ add_delay_dependencies (rtx insn)
 
   FOR_EACH_DEP (pair->i2, SD_LIST_BACK, sd_it, dep)
     {
-      rtx pro = DEP_PRO (dep);
+      rtx_insn *pro = DEP_PRO (dep);
       struct delay_pair *other_pair
 	= delay_htab_i2.find_with_hash (pro, htab_hash_pointer (pro));
       if (!other_pair || other_pair->stages)
@@ -1208,7 +1208,7 @@ recompute_todo_spec (rtx next, bool for_backtrack)
 
   FOR_EACH_DEP (next, SD_LIST_BACK, sd_it, dep)
     {
-      rtx pro = DEP_PRO (dep);
+      rtx_insn *pro = DEP_PRO (dep);
       ds_t ds = DEP_STATUS (dep) & SPECULATIVE;
 
       if (DEBUG_INSN_P (pro) && !DEBUG_INSN_P (next))
@@ -1414,8 +1414,8 @@ insn_cost (rtx insn)
 int
 dep_cost_1 (dep_t link, dw_t dw)
 {
-  rtx insn = DEP_PRO (link);
-  rtx used = DEP_CON (link);
+  rtx_insn *insn = DEP_PRO (link);
+  rtx_insn *used = DEP_CON (link);
   int cost;
 
   if (DEP_COST (link) != UNKNOWN_DEP_COST)
@@ -3787,7 +3787,7 @@ schedule_insn (rtx insn)
     for (sd_it = sd_iterator_start (insn, SD_LIST_BACK);
 	 sd_iterator_cond (&sd_it, &dep);)
       {
-	rtx dbg = DEP_PRO (dep);
+	rtx_insn *dbg = DEP_PRO (dep);
 	struct reg_use_data *use, *next;
 
 	if (DEP_STATUS (dep) & DEP_CANCELLED)
@@ -3876,7 +3876,7 @@ schedule_insn (rtx insn)
        sd_iterator_cond (&sd_it, &dep); sd_iterator_next (&sd_it))
     {
       struct dep_replacement *desc = DEP_REPLACE (dep);
-      rtx pro = DEP_PRO (dep);
+      rtx_insn *pro = DEP_PRO (dep);
       if (QUEUE_INDEX (pro) != QUEUE_SCHEDULED
 	  && desc != NULL && desc->insn == pro)
 	apply_replacement (dep, false);
@@ -3886,7 +3886,7 @@ schedule_insn (rtx insn)
   for (sd_it = sd_iterator_start (insn, SD_LIST_FORW);
        sd_iterator_cond (&sd_it, &dep);)
     {
-      rtx next = DEP_CON (dep);
+      rtx_insn *next = DEP_CON (dep);
       bool cancelled = (DEP_STATUS (dep) & DEP_CANCELLED) != 0;
 
       /* Resolve the dependence between INSN and NEXT.
@@ -4251,7 +4251,7 @@ unschedule_insns_until (rtx insn)
       for (sd_it = sd_iterator_start (last, SD_LIST_RES_FORW);
 	   sd_iterator_cond (&sd_it, &dep);)
 	{
-	  rtx con = DEP_CON (dep);
+	  rtx_insn *con = DEP_CON (dep);
 	  sd_unresolve_dep (sd_it);
 	  if (!MUST_RECOMPUTE_SPEC_P (con))
 	    {
@@ -4496,7 +4496,7 @@ apply_replacement (dep_t dep, bool immediately)
 static void
 restore_pattern (dep_t dep, bool immediately)
 {
-  rtx next = DEP_CON (dep);
+  rtx_insn *next = DEP_CON (dep);
   int tick = INSN_TICK (next);
 
   /* If we already scheduled the insn, the modified version is
@@ -4581,7 +4581,7 @@ estimate_insn_tick (bitmap processed, rtx insn, int budget)
 
   FOR_EACH_DEP (insn, SD_LIST_BACK, sd_it, dep)
     {
-      rtx pro = DEP_PRO (dep);
+      rtx_insn *pro = DEP_PRO (dep);
       int t;
 
       if (DEP_STATUS (dep) & DEP_CANCELLED)
@@ -4658,7 +4658,7 @@ resolve_dependencies (rtx insn)
   for (sd_it = sd_iterator_start (insn, SD_LIST_FORW);
        sd_iterator_cond (&sd_it, &dep);)
     {
-      rtx next = DEP_CON (dep);
+      rtx_insn *next = DEP_CON (dep);
 
       if (sched_verbose >= 4)
 	fprintf (sched_dump, ";;\t\tdep %d against %d\n", INSN_UID (insn),
@@ -6926,7 +6926,7 @@ fix_inter_tick (rtx head, rtx tail)
 
 	  FOR_EACH_DEP (head, SD_LIST_RES_FORW, sd_it, dep)
 	    {
-	      rtx next;
+	      rtx_insn *next;
 
 	      next = DEP_CON (dep);
 	      tick = INSN_TICK (next);
@@ -7112,7 +7112,7 @@ fix_tick_ready (rtx next)
 
       FOR_EACH_DEP (next, SD_LIST_RES_BACK, sd_it, dep)
         {
-          rtx pro = DEP_PRO (dep);
+          rtx_insn *pro = DEP_PRO (dep);
           int tick1;
 
 	  gcc_assert (INSN_TICK (pro) >= MIN_TICK);
@@ -7380,7 +7380,7 @@ add_to_speculative_block (rtx insn)
   for (sd_it = sd_iterator_start (insn, SD_LIST_SPEC_BACK);
        sd_iterator_cond (&sd_it, &dep);)
     {
-      rtx check = DEP_PRO (dep);
+      rtx_insn *check = DEP_PRO (dep);
 
       if (IS_SPECULATION_SIMPLE_CHECK_P (check))
 	{
@@ -7399,7 +7399,7 @@ add_to_speculative_block (rtx insn)
 
   while (1)
     {
-      rtx check, twin;
+      rtx_insn *check, *twin;
       basic_block rec;
 
       /* Get the first backward dependency of INSN.  */
@@ -7436,7 +7436,7 @@ add_to_speculative_block (rtx insn)
 	 instructions from REC.  */
       FOR_EACH_DEP (insn, SD_LIST_SPEC_BACK, sd_it, dep)
 	{
-	  rtx pro = DEP_PRO (dep);
+	  rtx_insn *pro = DEP_PRO (dep);
 
 	  gcc_assert (DEP_TYPE (dep) == REG_DEP_TRUE);
 
@@ -7458,7 +7458,7 @@ add_to_speculative_block (rtx insn)
       for (sd_it = sd_iterator_start (insn, SD_LIST_SPEC_BACK);
 	   sd_iterator_cond (&sd_it, &dep);)
 	{
-	  rtx pro = DEP_PRO (dep);
+	  rtx_insn *pro = DEP_PRO (dep);
 
 	  if (BLOCK_FOR_INSN (pro) == rec)
 	    sd_delete_dep (sd_it);
@@ -7541,8 +7541,8 @@ static void
 sched_extend_bb (void)
 {
   /* The following is done to keep current_sched_info->next_tail non null.  */
-  rtx end = BB_END (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb);
-  rtx insn = DEBUG_INSN_P (end) ? prev_nondebug_insn (end) : end;
+  rtx_insn *end = BB_END (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb);
+  rtx_insn *insn = DEBUG_INSN_P (end) ? prev_nondebug_insn (end) : end;
   if (NEXT_INSN (end) == 0
       || (!NOTE_P (insn)
 	  && !LABEL_P (insn)
@@ -7582,7 +7582,8 @@ init_before_recovery (basic_block *before_recovery_ptr)
          Between these two blocks recovery blocks will be emitted.  */
 
       basic_block single, empty;
-      rtx x, label;
+      rtx_insn *x;
+      rtx label;
 
       /* If the fallthrough edge to exit we've found is from the block we've
 	 created before, don't do anything more.  */
@@ -7646,7 +7647,7 @@ basic_block
 sched_create_recovery_block (basic_block *before_recovery_ptr)
 {
   rtx label;
-  rtx barrier;
+  rtx_insn *barrier;
   basic_block rec;
 
   haifa_recovery_bb_recently_added_p = true;
@@ -7855,7 +7856,7 @@ create_check_block_twin (rtx insn, bool mutate_p)
   /* First, create dependencies between INSN's producers and CHECK & TWIN.  */
   FOR_EACH_DEP (insn, SD_LIST_BACK, sd_it, dep)
     {
-      rtx pro = DEP_PRO (dep);
+      rtx_insn *pro = DEP_PRO (dep);
       ds_t ds;
 
       /* If BEGIN_DATA: [insn ~~TRUE~~> producer]:
@@ -7999,7 +8000,8 @@ create_check_block_twin (rtx insn, bool mutate_p)
 static void
 fix_recovery_deps (basic_block rec)
 {
-  rtx note, insn, jump, ready_list = 0;
+  rtx_insn *note, *insn, *jump;
+  rtx ready_list = 0;
   bitmap_head in_ready;
   rtx link;
 
@@ -8020,7 +8022,7 @@ fix_recovery_deps (basic_block rec)
       for (sd_it = sd_iterator_start (insn, SD_LIST_FORW);
 	   sd_iterator_cond (&sd_it, &dep);)
 	{
-	  rtx consumer = DEP_CON (dep);
+	  rtx_insn *consumer = DEP_CON (dep);
 
 	  if (BLOCK_FOR_INSN (consumer) != rec)
 	    {
@@ -8144,7 +8146,7 @@ unlink_bb_notes (basic_block first, basic_block last)
   if (first == last)
     return;
 
-  bb_header = XNEWVEC (rtx, last_basic_block_for_fn (cfun));
+  bb_header = XNEWVEC (rtx_insn *, last_basic_block_for_fn (cfun));
 
   /* Make a sentinel.  */
   if (last->next_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
@@ -8153,7 +8155,7 @@ unlink_bb_notes (basic_block first, basic_block last)
   first = first->next_bb;
   do
     {
-      rtx prev, label, note, next;
+      rtx_insn *prev, *label, *note, *next;
 
       label = BB_HEAD (last);
       if (LABEL_P (label))
@@ -8194,7 +8196,7 @@ restore_bb_notes (basic_block first)
   while (first != EXIT_BLOCK_PTR_FOR_FN (cfun)
 	 && bb_header[first->index])
     {
-      rtx prev, label, note, next;
+      rtx_insn *prev, *label, *note, *next;
 
       label = bb_header[first->index];
       prev = PREV_INSN (label);
@@ -8328,7 +8330,7 @@ clear_priorities (rtx insn, rtx_vec_t *roots_ptr)
 
   FOR_EACH_DEP (insn, SD_LIST_BACK, sd_it, dep)
     {
-      rtx pro = DEP_PRO (dep);
+      rtx_insn *pro = DEP_PRO (dep);
 
       if (INSN_PRIORITY_STATUS (pro) >= 0
 	  && QUEUE_INDEX (insn) != QUEUE_SCHEDULED)
-- 
1.8.5.3

[PATCH 056/236] cfgbuild.c: Use rtx_insn

[David Malcolm]

gcc/
	* cfgbuild.c (make_edges): Strengthen local "insn" from rtx to
	rtx_insn *.
	(purge_dead_tablejump_edges): Likewise.
	(find_bb_boundaries): Likewise for locals "insn", "end",
	"flow_transfer_insn".
---
 gcc/cfgbuild.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index 848e13f..8bbf325 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -218,7 +218,8 @@ make_edges (basic_block min, basic_block max, int update_p)
 
   FOR_BB_BETWEEN (bb, min, max->next_bb, next_bb)
     {
-      rtx insn, x;
+      rtx_insn *insn;
+      rtx x;
       enum rtx_code code;
       edge e;
       edge_iterator ei;
@@ -399,7 +400,8 @@ mark_tablejump_edge (rtx label)
 static void
 purge_dead_tablejump_edges (basic_block bb, rtx table)
 {
-  rtx insn = BB_END (bb), tmp;
+  rtx_insn *insn = BB_END (bb);
+  rtx tmp;
   rtvec vec;
   int j;
   edge_iterator ei;
@@ -443,10 +445,10 @@ static void
 find_bb_boundaries (basic_block bb)
 {
   basic_block orig_bb = bb;
-  rtx insn = BB_HEAD (bb);
-  rtx end = BB_END (bb), x;
+  rtx_insn *insn = BB_HEAD (bb);
+  rtx_insn *end = BB_END (bb), *x;
   rtx_jump_table_data *table;
-  rtx flow_transfer_insn = NULL_RTX;
+  rtx_insn *flow_transfer_insn = NULL;
   edge fallthru = NULL;
 
   if (insn == BB_END (bb))
@@ -480,7 +482,7 @@ find_bb_boundaries (basic_block bb)
 
 	  bb = fallthru->dest;
 	  remove_edge (fallthru);
-	  flow_transfer_insn = NULL_RTX;
+	  flow_transfer_insn = NULL;
 	  if (code == CODE_LABEL && LABEL_ALT_ENTRY_P (insn))
 	    make_edge (ENTRY_BLOCK_PTR_FOR_FN (cfun), bb, 0);
 	}
-- 
1.8.5.3

[PATCH 054/236] calls.c: Use rtx_insn

[David Malcolm]

gcc/
	* calls.c (emit_call_1): Strengthen local "call_insn" from rtx to
	rtx_insn *.
	(internal_arg_pointer_exp_state): Likewise for field "scan_start".
	(internal_arg_pointer_based_exp_scan): Likewise for locals "insn",
	"scan_start".
	(load_register_parameters): Likewise for local "before_arg".
	(check_sibcall_argument_overlap): Likewise for param "insn".
	(expand_call): Likewise for locals "normal_call_insns",
	"tail_call_insns", "insns", "before_call", "after_args",
	"before_arg", "last", "prev".  Strengthen one of the "last" from
	rtx to rtx_call_insn *.
	(fixup_tail_calls): Strengthen local "insn" from rtx to
	rtx_insn *.
	(emit_library_call_value_1): Likewise for locals "before_call" and
	"last".
---
 gcc/calls.c | 47 +++++++++++++++++++++++++----------------------
 1 file changed, 25 insertions(+), 22 deletions(-)

diff --git a/gcc/calls.c b/gcc/calls.c
index 78fe7d8..a3b9993 100644
--- a/gcc/calls.c
+++ b/gcc/calls.c
@@ -153,7 +153,7 @@ static rtx emit_library_call_value_1 (int, rtx, rtx, enum libcall_type,
 				      enum machine_mode, int, va_list);
 static int special_function_p (const_tree, int);
 static int check_sibcall_argument_overlap_1 (rtx);
-static int check_sibcall_argument_overlap (rtx, struct arg_data *, int);
+static int check_sibcall_argument_overlap (rtx_insn *, struct arg_data *, int);
 
 static int combine_pending_stack_adjustment_and_call (int, struct args_size *,
 						      unsigned int);
@@ -261,7 +261,8 @@ emit_call_1 (rtx funexp, tree fntree ATTRIBUTE_UNUSED, tree fndecl ATTRIBUTE_UNU
 	     cumulative_args_t args_so_far ATTRIBUTE_UNUSED)
 {
   rtx rounded_stack_size_rtx = GEN_INT (rounded_stack_size);
-  rtx call_insn, call, funmem;
+  rtx_insn *call_insn;
+  rtx call, funmem;
   int already_popped = 0;
   HOST_WIDE_INT n_popped
     = targetm.calls.return_pops_args (fndecl, funtype, stack_size);
@@ -1685,7 +1686,7 @@ static struct
 {
   /* Last insn that has been scanned by internal_arg_pointer_based_exp_scan,
      or NULL_RTX if none has been scanned yet.  */
-  rtx scan_start;
+  rtx_insn *scan_start;
   /* Vector indexed by REGNO - FIRST_PSEUDO_REGISTER, recording if a pseudo is
      based on crtl->args.internal_arg_pointer.  The element is NULL_RTX if the
      pseudo isn't based on it, a CONST_INT offset if the pseudo is based on it
@@ -1704,7 +1705,7 @@ static rtx internal_arg_pointer_based_exp (rtx, bool);
 static void
 internal_arg_pointer_based_exp_scan (void)
 {
-  rtx insn, scan_start = internal_arg_pointer_exp_state.scan_start;
+  rtx_insn *insn, *scan_start = internal_arg_pointer_exp_state.scan_start;
 
   if (scan_start == NULL_RTX)
     insn = get_insns ();
@@ -1870,7 +1871,7 @@ load_register_parameters (struct arg_data *args, int num_actuals,
 	  int partial = args[i].partial;
 	  int nregs;
 	  int size = 0;
-	  rtx before_arg = get_last_insn ();
+	  rtx_insn *before_arg = get_last_insn ();
 	  /* Set non-negative if we must move a word at a time, even if
 	     just one word (e.g, partial == 4 && mode == DFmode).  Set
 	     to -1 if we just use a normal move insn.  This value can be
@@ -2101,7 +2102,8 @@ check_sibcall_argument_overlap_1 (rtx x)
    slots, zero otherwise.  */
 
 static int
-check_sibcall_argument_overlap (rtx insn, struct arg_data *arg, int mark_stored_args_map)
+check_sibcall_argument_overlap (rtx_insn *insn, struct arg_data *arg,
+				int mark_stored_args_map)
 {
   int low, high;
 
@@ -2192,9 +2194,9 @@ expand_call (tree exp, rtx target, int ignore)
   /* RTX for the function to be called.  */
   rtx funexp;
   /* Sequence of insns to perform a normal "call".  */
-  rtx normal_call_insns = NULL_RTX;
+  rtx_insn *normal_call_insns = NULL;
   /* Sequence of insns to perform a tail "call".  */
-  rtx tail_call_insns = NULL_RTX;
+  rtx_insn *tail_call_insns = NULL;
   /* Data type of the function.  */
   tree funtype;
   tree type_arg_types;
@@ -2660,8 +2662,8 @@ expand_call (tree exp, rtx target, int ignore)
 	 recursion call can be ignored if we indeed use the tail
 	 call expansion.  */
       saved_pending_stack_adjust save;
-      rtx insns;
-      rtx before_call, next_arg_reg, after_args;
+      rtx_insn *insns, *before_call, *after_args;
+      rtx next_arg_reg;
 
       if (pass == 0)
 	{
@@ -3030,7 +3032,7 @@ expand_call (tree exp, rtx target, int ignore)
 	{
 	  if (args[i].reg == 0 || args[i].pass_on_stack)
 	    {
-	      rtx before_arg = get_last_insn ();
+	      rtx_insn *before_arg = get_last_insn ();
 
 	      /* We don't allow passing huge (> 2^30 B) arguments
 	         by value.  It would cause an overflow later on.  */
@@ -3070,7 +3072,7 @@ expand_call (tree exp, rtx target, int ignore)
 	for (i = 0; i < num_actuals; i++)
 	  if (args[i].partial != 0 && ! args[i].pass_on_stack)
 	    {
-	      rtx before_arg = get_last_insn ();
+	      rtx_insn *before_arg = get_last_insn ();
 
 	      if (store_one_arg (&args[i], argblock, flags,
 				 adjusted_args_size.var != 0,
@@ -3157,7 +3159,8 @@ expand_call (tree exp, rtx target, int ignore)
 
       if (flag_use_caller_save)
 	{
-	  rtx last, datum = NULL_RTX;
+	  rtx_call_insn *last;
+	  rtx datum = NULL_RTX;
 	  if (fndecl != NULL_TREE)
 	    {
 	      datum = XEXP (DECL_RTL (fndecl), 0);
@@ -3194,7 +3197,7 @@ expand_call (tree exp, rtx target, int ignore)
       if (pass && (flags & ECF_MALLOC))
 	{
 	  rtx temp = gen_reg_rtx (GET_MODE (valreg));
-	  rtx last, insns;
+	  rtx_insn *last, *insns;
 
 	  /* The return value from a malloc-like function is a pointer.  */
 	  if (TREE_CODE (rettype) == POINTER_TYPE)
@@ -3225,7 +3228,7 @@ expand_call (tree exp, rtx target, int ignore)
 	     immediately after the CALL_INSN.  Some ports emit more
 	     than just a CALL_INSN above, so we must search for it here.  */
 
-	  rtx last = get_last_insn ();
+	  rtx_insn *last = get_last_insn ();
 	  while (!CALL_P (last))
 	    {
 	      last = PREV_INSN (last);
@@ -3373,7 +3376,7 @@ expand_call (tree exp, rtx target, int ignore)
 
       if (old_stack_level)
 	{
-	  rtx prev = get_last_insn ();
+	  rtx_insn *prev = get_last_insn ();
 
 	  emit_stack_restore (SAVE_BLOCK, old_stack_level);
 	  stack_pointer_delta = old_stack_pointer_delta;
@@ -3449,7 +3452,7 @@ expand_call (tree exp, rtx target, int ignore)
 	    }
 
 	  sbitmap_free (stored_args_map);
-	  internal_arg_pointer_exp_state.scan_start = NULL_RTX;
+	  internal_arg_pointer_exp_state.scan_start = NULL;
 	  internal_arg_pointer_exp_state.cache.release ();
 	}
       else
@@ -3465,7 +3468,7 @@ expand_call (tree exp, rtx target, int ignore)
       /* If something prevents making this a sibling call,
 	 zero out the sequence.  */
       if (sibcall_failure)
-	tail_call_insns = NULL_RTX;
+	tail_call_insns = NULL;
       else
 	break;
     }
@@ -3502,7 +3505,7 @@ expand_call (tree exp, rtx target, int ignore)
 void
 fixup_tail_calls (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
@@ -3610,7 +3613,7 @@ emit_library_call_value_1 (int retval, rtx orgfun, rtx value,
   int flags;
   int reg_parm_stack_space = 0;
   int needed;
-  rtx before_call;
+  rtx_insn *before_call;
   tree tfom;			/* type_for_mode (outmode, 0) */
 
 #ifdef REG_PARM_STACK_SPACE
@@ -4202,7 +4205,7 @@ emit_library_call_value_1 (int retval, rtx orgfun, rtx value,
       /* The barrier note must be emitted
 	 immediately after the CALL_INSN.  Some ports emit more than
 	 just a CALL_INSN above, so we must search for it here.  */
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
       while (!CALL_P (last))
 	{
 	  last = PREV_INSN (last);
@@ -4217,7 +4220,7 @@ emit_library_call_value_1 (int retval, rtx orgfun, rtx value,
      and LCT_RETURNS_TWICE, cannot perform non-local gotos.  */
   if (flags & ECF_NOTHROW)
     {
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
       while (!CALL_P (last))
 	{
 	  last = PREV_INSN (last);
-- 
1.8.5.3

[PATCH 018/236] Strengthen return types of various {next|prev}_*insn from rtx to rtx_insn *

[David Malcolm]

These should all eventually require an rtx_insn * as an argument,
but we'll save that for a later patch.

gcc/
	* rtl.h (previous_insn): Strengthen return type from rtx to
	rtx_insn *.
	(next_insn): Likewise.
	(prev_nonnote_insn): Likewise.
	(prev_nonnote_insn_bb): Likewise.
	(next_nonnote_insn): Likewise.
	(next_nonnote_insn_bb): Likewise.
	(prev_nondebug_insn): Likewise.
	(next_nondebug_insn): Likewise.
	(prev_nonnote_nondebug_insn): Likewise.
	(next_nonnote_nondebug_insn): Likewise.
	(prev_real_insn): Likewise.
	(next_real_insn): Likewise.
	(prev_active_insn): Likewise.
	(next_active_insn): Likewise.

	* emit-rtl.c (next_insn): Strengthen return type from rtx to
	rtx_insn *, adding a checked cast.
	(previous_insn): Likewise.
	(next_nonnote_insn): Likewise.
	(next_nonnote_insn_bb): Likewise.
	(prev_nonnote_insn): Likewise.
	(prev_nonnote_insn_bb): Likewise.
	(next_nondebug_insn): Likewise.
	(prev_nondebug_insn): Likewise.
	(next_nonnote_nondebug_insn): Likewise.
	(prev_nonnote_nondebug_insn): Likewise.
	(next_real_insn): Likewise.
	(prev_real_insn): Likewise.
	(next_active_insn): Likewise.
	(prev_active_insn): Likewise.

	* config/sh/sh-protos.h (sh_find_set_of_reg): Convert function ptr
	param "stepfunc" so that it returns an rtx_insn * rather than an
	rtx, to track the change to prev_nonnote_insn_bb, which is the
	only function this is called with.
	* config/sh/sh.c (sh_find_set_of_reg): Likewise.
---
 gcc/config/sh/sh-protos.h |  2 +-
 gcc/config/sh/sh.c        |  2 +-
 gcc/emit-rtl.c            | 60 +++++++++++++++++++++++------------------------
 gcc/rtl.h                 | 28 +++++++++++-----------
 4 files changed, 46 insertions(+), 46 deletions(-)

diff --git a/gcc/config/sh/sh-protos.h b/gcc/config/sh/sh-protos.h
index 685cd23..cec324c 100644
--- a/gcc/config/sh/sh-protos.h
+++ b/gcc/config/sh/sh-protos.h
@@ -181,7 +181,7 @@ struct set_of_reg
   rtx set_src;
 };
 
-extern set_of_reg sh_find_set_of_reg (rtx reg, rtx insn, rtx(*stepfunc)(rtx));
+extern set_of_reg sh_find_set_of_reg (rtx reg, rtx insn, rtx_insn *(*stepfunc)(rtx));
 extern bool sh_is_logical_t_store_expr (rtx op, rtx insn);
 extern rtx sh_try_omit_signzero_extend (rtx extended_op, rtx insn);
 #endif /* RTX_CODE */
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index a5118c6..a21625f 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -13478,7 +13478,7 @@ sh_find_equiv_gbr_addr (rtx insn, rtx mem)
    'prev_nonnote_insn_bb'.  When the insn is found, try to extract the rtx
    of the reg set.  */
 set_of_reg
-sh_find_set_of_reg (rtx reg, rtx insn, rtx(*stepfunc)(rtx))
+sh_find_set_of_reg (rtx reg, rtx insn, rtx_insn *(*stepfunc)(rtx))
 {
   set_of_reg result;
   result.insn = insn;
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 729e0cc..c51b7d8 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3166,7 +3166,7 @@ get_max_insn_count (void)
 /* Return the next insn.  If it is a SEQUENCE, return the first insn
    of the sequence.  */
 
-rtx
+rtx_insn *
 next_insn (rtx insn)
 {
   if (insn)
@@ -3177,13 +3177,13 @@ next_insn (rtx insn)
 	insn = XVECEXP (PATTERN (insn), 0, 0);
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the previous insn.  If it is a SEQUENCE, return the last insn
    of the sequence.  */
 
-rtx
+rtx_insn *
 previous_insn (rtx insn)
 {
   if (insn)
@@ -3194,13 +3194,13 @@ previous_insn (rtx insn)
 	insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the next insn after INSN that is not a NOTE.  This routine does not
    look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 next_nonnote_insn (rtx insn)
 {
   while (insn)
@@ -3210,14 +3210,14 @@ next_nonnote_insn (rtx insn)
 	break;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the next insn after INSN that is not a NOTE, but stop the
    search before we enter another basic block.  This routine does not
    look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 next_nonnote_insn_bb (rtx insn)
 {
   while (insn)
@@ -3226,16 +3226,16 @@ next_nonnote_insn_bb (rtx insn)
       if (insn == 0 || !NOTE_P (insn))
 	break;
       if (NOTE_INSN_BASIC_BLOCK_P (insn))
-	return NULL_RTX;
+	return NULL;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the previous insn before INSN that is not a NOTE.  This routine does
    not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 prev_nonnote_insn (rtx insn)
 {
   while (insn)
@@ -3245,14 +3245,14 @@ prev_nonnote_insn (rtx insn)
 	break;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the previous insn before INSN that is not a NOTE, but stop
    the search before we enter another basic block.  This routine does
    not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 prev_nonnote_insn_bb (rtx insn)
 {
   while (insn)
@@ -3261,16 +3261,16 @@ prev_nonnote_insn_bb (rtx insn)
       if (insn == 0 || !NOTE_P (insn))
 	break;
       if (NOTE_INSN_BASIC_BLOCK_P (insn))
-	return NULL_RTX;
+	return NULL;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the next insn after INSN that is not a DEBUG_INSN.  This
    routine does not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 next_nondebug_insn (rtx insn)
 {
   while (insn)
@@ -3280,13 +3280,13 @@ next_nondebug_insn (rtx insn)
 	break;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the previous insn before INSN that is not a DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 prev_nondebug_insn (rtx insn)
 {
   while (insn)
@@ -3296,13 +3296,13 @@ prev_nondebug_insn (rtx insn)
 	break;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 next_nonnote_nondebug_insn (rtx insn)
 {
   while (insn)
@@ -3312,13 +3312,13 @@ next_nonnote_nondebug_insn (rtx insn)
 	break;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 prev_nonnote_nondebug_insn (rtx insn)
 {
   while (insn)
@@ -3328,14 +3328,14 @@ prev_nonnote_nondebug_insn (rtx insn)
 	break;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
    or 0, if there is none.  This routine does not look inside
    SEQUENCEs.  */
 
-rtx
+rtx_insn *
 next_real_insn (rtx insn)
 {
   while (insn)
@@ -3345,14 +3345,14 @@ next_real_insn (rtx insn)
 	break;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
    or 0, if there is none.  This routine does not look inside
    SEQUENCEs.  */
 
-rtx
+rtx_insn *
 prev_real_insn (rtx insn)
 {
   while (insn)
@@ -3362,7 +3362,7 @@ prev_real_insn (rtx insn)
 	break;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the last CALL_INSN in the current list, or 0 if there is none.
@@ -3396,7 +3396,7 @@ active_insn_p (const_rtx insn)
 		      && GET_CODE (PATTERN (insn)) != CLOBBER))));
 }
 
-rtx
+rtx_insn *
 next_active_insn (rtx insn)
 {
   while (insn)
@@ -3406,14 +3406,14 @@ next_active_insn (rtx insn)
 	break;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Find the last insn before INSN that really does something.  This routine
    does not look inside SEQUENCEs.  After reload this also skips over
    standalone USE and CLOBBER insn.  */
 
-rtx
+rtx_insn *
 prev_active_insn (rtx insn)
 {
   while (insn)
@@ -3423,7 +3423,7 @@ prev_active_insn (rtx insn)
 	break;
     }
 
-  return insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 \f
 #ifdef HAVE_cc0
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 31df60f..049f01e 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2395,20 +2395,20 @@ extern rtx emit_use (rtx);
 extern rtx make_insn_raw (rtx);
 extern void add_function_usage_to (rtx, rtx);
 extern rtx last_call_insn (void);
-extern rtx previous_insn (rtx);
-extern rtx next_insn (rtx);
-extern rtx prev_nonnote_insn (rtx);
-extern rtx prev_nonnote_insn_bb (rtx);
-extern rtx next_nonnote_insn (rtx);
-extern rtx next_nonnote_insn_bb (rtx);
-extern rtx prev_nondebug_insn (rtx);
-extern rtx next_nondebug_insn (rtx);
-extern rtx prev_nonnote_nondebug_insn (rtx);
-extern rtx next_nonnote_nondebug_insn (rtx);
-extern rtx prev_real_insn (rtx);
-extern rtx next_real_insn (rtx);
-extern rtx prev_active_insn (rtx);
-extern rtx next_active_insn (rtx);
+extern rtx_insn *previous_insn (rtx);
+extern rtx_insn *next_insn (rtx);
+extern rtx_insn *prev_nonnote_insn (rtx);
+extern rtx_insn *prev_nonnote_insn_bb (rtx);
+extern rtx_insn *next_nonnote_insn (rtx);
+extern rtx_insn *next_nonnote_insn_bb (rtx);
+extern rtx_insn *prev_nondebug_insn (rtx);
+extern rtx_insn *next_nondebug_insn (rtx);
+extern rtx_insn *prev_nonnote_nondebug_insn (rtx);
+extern rtx_insn *next_nonnote_nondebug_insn (rtx);
+extern rtx_insn *prev_real_insn (rtx);
+extern rtx_insn *next_real_insn (rtx);
+extern rtx_insn *prev_active_insn (rtx);
+extern rtx_insn *next_active_insn (rtx);
 extern int active_insn_p (const_rtx);
 extern rtx next_cc0_user (rtx);
 extern rtx prev_cc0_setter (rtx);
-- 
1.8.5.3

Re: [PATCH 018/236] Strengthen return types of various {next|prev}_*insn from rtx to rtx_insn *

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> These should all eventually require an rtx_insn * as an argument,
> but we'll save that for a later patch.
>
> gcc/
> 	* rtl.h (previous_insn): Strengthen return type from rtx to
> 	rtx_insn *.
> 	(next_insn): Likewise.
> 	(prev_nonnote_insn): Likewise.
> 	(prev_nonnote_insn_bb): Likewise.
> 	(next_nonnote_insn): Likewise.
> 	(next_nonnote_insn_bb): Likewise.
> 	(prev_nondebug_insn): Likewise.
> 	(next_nondebug_insn): Likewise.
> 	(prev_nonnote_nondebug_insn): Likewise.
> 	(next_nonnote_nondebug_insn): Likewise.
> 	(prev_real_insn): Likewise.
> 	(next_real_insn): Likewise.
> 	(prev_active_insn): Likewise.
> 	(next_active_insn): Likewise.
>
> 	* emit-rtl.c (next_insn): Strengthen return type from rtx to
> 	rtx_insn *, adding a checked cast.
> 	(previous_insn): Likewise.
> 	(next_nonnote_insn): Likewise.
> 	(next_nonnote_insn_bb): Likewise.
> 	(prev_nonnote_insn): Likewise.
> 	(prev_nonnote_insn_bb): Likewise.
> 	(next_nondebug_insn): Likewise.
> 	(prev_nondebug_insn): Likewise.
> 	(next_nonnote_nondebug_insn): Likewise.
> 	(prev_nonnote_nondebug_insn): Likewise.
> 	(next_real_insn): Likewise.
> 	(prev_real_insn): Likewise.
> 	(next_active_insn): Likewise.
> 	(prev_active_insn): Likewise.
>
> 	* config/sh/sh-protos.h (sh_find_set_of_reg): Convert function ptr
> 	param "stepfunc" so that it returns an rtx_insn * rather than an
> 	rtx, to track the change to prev_nonnote_insn_bb, which is the
> 	only function this is called with.
> 	* config/sh/sh.c (sh_find_set_of_reg): Likewise.
OK.

Jeff

Re: [PATCH 018/236] Strengthen return types of various {next|prev}_*insn from rtx to rtx_insn *

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 2083 bytes --]

On Tue, 2014-08-12 at 15:59 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > These should all eventually require an rtx_insn * as an argument,
> > but we'll save that for a later patch.
> >
> > gcc/
> > 	* rtl.h (previous_insn): Strengthen return type from rtx to
> > 	rtx_insn *.
> > 	(next_insn): Likewise.
> > 	(prev_nonnote_insn): Likewise.
> > 	(prev_nonnote_insn_bb): Likewise.
> > 	(next_nonnote_insn): Likewise.
> > 	(next_nonnote_insn_bb): Likewise.
> > 	(prev_nondebug_insn): Likewise.
> > 	(next_nondebug_insn): Likewise.
> > 	(prev_nonnote_nondebug_insn): Likewise.
> > 	(next_nonnote_nondebug_insn): Likewise.
> > 	(prev_real_insn): Likewise.
> > 	(next_real_insn): Likewise.
> > 	(prev_active_insn): Likewise.
> > 	(next_active_insn): Likewise.
> >
> > 	* emit-rtl.c (next_insn): Strengthen return type from rtx to
> > 	rtx_insn *, adding a checked cast.
> > 	(previous_insn): Likewise.
> > 	(next_nonnote_insn): Likewise.
> > 	(next_nonnote_insn_bb): Likewise.
> > 	(prev_nonnote_insn): Likewise.
> > 	(prev_nonnote_insn_bb): Likewise.
> > 	(next_nondebug_insn): Likewise.
> > 	(prev_nondebug_insn): Likewise.
> > 	(next_nonnote_nondebug_insn): Likewise.
> > 	(prev_nonnote_nondebug_insn): Likewise.
> > 	(next_real_insn): Likewise.
> > 	(prev_real_insn): Likewise.
> > 	(next_active_insn): Likewise.
> > 	(prev_active_insn): Likewise.
> >
> > 	* config/sh/sh-protos.h (sh_find_set_of_reg): Convert function ptr
> > 	param "stepfunc" so that it returns an rtx_insn * rather than an
> > 	rtx, to track the change to prev_nonnote_insn_bb, which is the
> > 	only function this is called with.
> > 	* config/sh/sh.c (sh_find_set_of_reg): Likewise.
> OK.

Thanks.

I fixed up the various as_a_nullable to safe_as_a, and committed to
trunk as r214178, having verified bootstrap&regrtest on
x86_64-unknown-linux-gnu (Fedora 20) albeit in combination with patches
9-29 [1], and verified that it builds standalone with 10 targets,
including sh-elf.

Am attaching what I committed.

Dave

[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html


[-- Attachment #2: r214178.patch --]
[-- Type: text/x-patch, Size: 9186 bytes --]

Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214177)
+++ gcc/ChangeLog	(revision 214178)
@@ -1,3 +1,43 @@
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	* rtl.h (previous_insn): Strengthen return type from rtx to
+	rtx_insn *.
+	(next_insn): Likewise.
+	(prev_nonnote_insn): Likewise.
+	(prev_nonnote_insn_bb): Likewise.
+	(next_nonnote_insn): Likewise.
+	(next_nonnote_insn_bb): Likewise.
+	(prev_nondebug_insn): Likewise.
+	(next_nondebug_insn): Likewise.
+	(prev_nonnote_nondebug_insn): Likewise.
+	(next_nonnote_nondebug_insn): Likewise.
+	(prev_real_insn): Likewise.
+	(next_real_insn): Likewise.
+	(prev_active_insn): Likewise.
+	(next_active_insn): Likewise.
+
+	* emit-rtl.c (next_insn): Strengthen return type from rtx to
+	rtx_insn *, adding a checked cast.
+	(previous_insn): Likewise.
+	(next_nonnote_insn): Likewise.
+	(next_nonnote_insn_bb): Likewise.
+	(prev_nonnote_insn): Likewise.
+	(prev_nonnote_insn_bb): Likewise.
+	(next_nondebug_insn): Likewise.
+	(prev_nondebug_insn): Likewise.
+	(next_nonnote_nondebug_insn): Likewise.
+	(prev_nonnote_nondebug_insn): Likewise.
+	(next_real_insn): Likewise.
+	(prev_real_insn): Likewise.
+	(next_active_insn): Likewise.
+	(prev_active_insn): Likewise.
+
+	* config/sh/sh-protos.h (sh_find_set_of_reg): Convert function ptr
+	param "stepfunc" so that it returns an rtx_insn * rather than an
+	rtx, to track the change to prev_nonnote_insn_bb, which is the
+	only function this is called with.
+	* config/sh/sh.c (sh_find_set_of_reg): Likewise.
+
 2014-08-19  Jan Hubicka  <hubicka@ucw.cz>
 
 	* ipa-visibility.c (update_visibility_by_resolution_info): Fix
Index: gcc/emit-rtl.c
===================================================================
--- gcc/emit-rtl.c	(revision 214177)
+++ gcc/emit-rtl.c	(revision 214178)
@@ -3179,7 +3179,7 @@
 /* Return the next insn.  If it is a SEQUENCE, return the first insn
    of the sequence.  */
 
-rtx
+rtx_insn *
 next_insn (rtx insn)
 {
   if (insn)
@@ -3190,13 +3190,13 @@
 	insn = XVECEXP (PATTERN (insn), 0, 0);
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the previous insn.  If it is a SEQUENCE, return the last insn
    of the sequence.  */
 
-rtx
+rtx_insn *
 previous_insn (rtx insn)
 {
   if (insn)
@@ -3207,13 +3207,13 @@
 	insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the next insn after INSN that is not a NOTE.  This routine does not
    look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 next_nonnote_insn (rtx insn)
 {
   while (insn)
@@ -3223,7 +3223,7 @@
 	break;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the next insn after INSN that is not a NOTE, but stop the
@@ -3230,7 +3230,7 @@
    search before we enter another basic block.  This routine does not
    look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 next_nonnote_insn_bb (rtx insn)
 {
   while (insn)
@@ -3239,16 +3239,16 @@
       if (insn == 0 || !NOTE_P (insn))
 	break;
       if (NOTE_INSN_BASIC_BLOCK_P (insn))
-	return NULL_RTX;
+	return NULL;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the previous insn before INSN that is not a NOTE.  This routine does
    not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 prev_nonnote_insn (rtx insn)
 {
   while (insn)
@@ -3258,7 +3258,7 @@
 	break;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the previous insn before INSN that is not a NOTE, but stop
@@ -3265,7 +3265,7 @@
    the search before we enter another basic block.  This routine does
    not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 prev_nonnote_insn_bb (rtx insn)
 {
   while (insn)
@@ -3274,16 +3274,16 @@
       if (insn == 0 || !NOTE_P (insn))
 	break;
       if (NOTE_INSN_BASIC_BLOCK_P (insn))
-	return NULL_RTX;
+	return NULL;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the next insn after INSN that is not a DEBUG_INSN.  This
    routine does not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 next_nondebug_insn (rtx insn)
 {
   while (insn)
@@ -3293,13 +3293,13 @@
 	break;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the previous insn before INSN that is not a DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 prev_nondebug_insn (rtx insn)
 {
   while (insn)
@@ -3309,13 +3309,13 @@
 	break;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 next_nonnote_nondebug_insn (rtx insn)
 {
   while (insn)
@@ -3325,13 +3325,13 @@
 	break;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
-rtx
+rtx_insn *
 prev_nonnote_nondebug_insn (rtx insn)
 {
   while (insn)
@@ -3341,7 +3341,7 @@
 	break;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
@@ -3348,7 +3348,7 @@
    or 0, if there is none.  This routine does not look inside
    SEQUENCEs.  */
 
-rtx
+rtx_insn *
 next_real_insn (rtx insn)
 {
   while (insn)
@@ -3358,7 +3358,7 @@
 	break;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
@@ -3365,7 +3365,7 @@
    or 0, if there is none.  This routine does not look inside
    SEQUENCEs.  */
 
-rtx
+rtx_insn *
 prev_real_insn (rtx insn)
 {
   while (insn)
@@ -3375,7 +3375,7 @@
 	break;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Return the last CALL_INSN in the current list, or 0 if there is none.
@@ -3409,7 +3409,7 @@
 		      && GET_CODE (PATTERN (insn)) != CLOBBER))));
 }
 
-rtx
+rtx_insn *
 next_active_insn (rtx insn)
 {
   while (insn)
@@ -3419,7 +3419,7 @@
 	break;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Find the last insn before INSN that really does something.  This routine
@@ -3426,7 +3426,7 @@
    does not look inside SEQUENCEs.  After reload this also skips over
    standalone USE and CLOBBER insn.  */
 
-rtx
+rtx_insn *
 prev_active_insn (rtx insn)
 {
   while (insn)
@@ -3436,7 +3436,7 @@
 	break;
     }
 
-  return insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 \f
 #ifdef HAVE_cc0
Index: gcc/rtl.h
===================================================================
--- gcc/rtl.h	(revision 214177)
+++ gcc/rtl.h	(revision 214178)
@@ -2417,20 +2417,20 @@
 extern rtx make_insn_raw (rtx);
 extern void add_function_usage_to (rtx, rtx);
 extern rtx last_call_insn (void);
-extern rtx previous_insn (rtx);
-extern rtx next_insn (rtx);
-extern rtx prev_nonnote_insn (rtx);
-extern rtx prev_nonnote_insn_bb (rtx);
-extern rtx next_nonnote_insn (rtx);
-extern rtx next_nonnote_insn_bb (rtx);
-extern rtx prev_nondebug_insn (rtx);
-extern rtx next_nondebug_insn (rtx);
-extern rtx prev_nonnote_nondebug_insn (rtx);
-extern rtx next_nonnote_nondebug_insn (rtx);
-extern rtx prev_real_insn (rtx);
-extern rtx next_real_insn (rtx);
-extern rtx prev_active_insn (rtx);
-extern rtx next_active_insn (rtx);
+extern rtx_insn *previous_insn (rtx);
+extern rtx_insn *next_insn (rtx);
+extern rtx_insn *prev_nonnote_insn (rtx);
+extern rtx_insn *prev_nonnote_insn_bb (rtx);
+extern rtx_insn *next_nonnote_insn (rtx);
+extern rtx_insn *next_nonnote_insn_bb (rtx);
+extern rtx_insn *prev_nondebug_insn (rtx);
+extern rtx_insn *next_nondebug_insn (rtx);
+extern rtx_insn *prev_nonnote_nondebug_insn (rtx);
+extern rtx_insn *next_nonnote_nondebug_insn (rtx);
+extern rtx_insn *prev_real_insn (rtx);
+extern rtx_insn *next_real_insn (rtx);
+extern rtx_insn *prev_active_insn (rtx);
+extern rtx_insn *next_active_insn (rtx);
 extern int active_insn_p (const_rtx);
 extern rtx next_cc0_user (rtx);
 extern rtx prev_cc0_setter (rtx);
Index: gcc/config/sh/sh-protos.h
===================================================================
--- gcc/config/sh/sh-protos.h	(revision 214177)
+++ gcc/config/sh/sh-protos.h	(revision 214178)
@@ -181,7 +181,7 @@
   rtx set_src;
 };
 
-extern set_of_reg sh_find_set_of_reg (rtx reg, rtx insn, rtx(*stepfunc)(rtx));
+extern set_of_reg sh_find_set_of_reg (rtx reg, rtx insn, rtx_insn *(*stepfunc)(rtx));
 extern bool sh_is_logical_t_store_expr (rtx op, rtx insn);
 extern rtx sh_try_omit_signzero_extend (rtx extended_op, rtx insn);
 #endif /* RTX_CODE */
Index: gcc/config/sh/sh.c
===================================================================
--- gcc/config/sh/sh.c	(revision 214177)
+++ gcc/config/sh/sh.c	(revision 214178)
@@ -13505,7 +13505,7 @@
    'prev_nonnote_insn_bb'.  When the insn is found, try to extract the rtx
    of the reg set.  */
 set_of_reg
-sh_find_set_of_reg (rtx reg, rtx insn, rtx(*stepfunc)(rtx))
+sh_find_set_of_reg (rtx reg, rtx insn, rtx_insn *(*stepfunc)(rtx))
 {
   set_of_reg result;
   result.insn = insn;

[PATCH 099/236] predict.*: Use rtx_insn (also touches function.c and config/cris/cris.c)

[David Malcolm]

gcc/
	* predict.h (predict_insn_def): Strengthen param "insn" from rtx
	to rtx_insn *.

	* function.c (stack_protect_epilogue): Add checked cast to
	rtx_insn for now when invoking predict_insn_def.

	* predict.c (predict_insn): Strengthen param "insn" from rtx to
	rtx_insn *.
	(predict_insn_def): Likewise.
	(rtl_predict_edge): Likewise for local "last_insn".
	(can_predict_insn_p): Strengthen param "insn" from const_rtx to
	const rtx_insn *.
	(combine_predictions_for_insn): Strengthen param "insn" from rtx
	to rtx_insn *.
	(bb_estimate_probability_locally): Likewise for local "last_insn".
	(expensive_function_p): Likewise for local "insn".

	* config/cris/cris.c (cris_emit_trap_for_misalignment): Likewise for
	local "jmp", since this is used when invoking predict_insn_def.
---
 gcc/config/cris/cris.c |  3 ++-
 gcc/function.c         |  2 +-
 gcc/predict.c          | 18 +++++++++---------
 gcc/predict.h          |  2 +-
 4 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c
index 194dd14..56adf45 100644
--- a/gcc/config/cris/cris.c
+++ b/gcc/config/cris/cris.c
@@ -1987,7 +1987,8 @@ cris_simple_epilogue (void)
 void
 cris_emit_trap_for_misalignment (rtx mem)
 {
-  rtx addr, reg, ok_label, andop, jmp;
+  rtx addr, reg, ok_label, andop;
+  rtx_insn *jmp;
   int natural_alignment;
   gcc_assert (MEM_P (mem));
 
diff --git a/gcc/function.c b/gcc/function.c
index b2c9d81..c5619e9 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -4675,7 +4675,7 @@ stack_protect_epilogue (void)
      except adding the prediction by hand.  */
   tmp = get_last_insn ();
   if (JUMP_P (tmp))
-    predict_insn_def (tmp, PRED_NORETURN, TAKEN);
+    predict_insn_def (as_a <rtx_insn *> (tmp), PRED_NORETURN, TAKEN);
 
   expand_call (targetm.stack_protect_fail (), NULL_RTX, /*ignore=*/true);
   free_temp_slots ();
diff --git a/gcc/predict.c b/gcc/predict.c
index 55a645d..e08c982 100644
--- a/gcc/predict.c
+++ b/gcc/predict.c
@@ -74,11 +74,11 @@ along with GCC; see the file COPYING3.  If not see
 static sreal real_zero, real_one, real_almost_one, real_br_prob_base,
 	     real_inv_br_prob_base, real_one_half, real_bb_freq_max;
 
-static void combine_predictions_for_insn (rtx, basic_block);
+static void combine_predictions_for_insn (rtx_insn *, basic_block);
 static void dump_prediction (FILE *, enum br_predictor, int, basic_block, int);
 static void predict_paths_leading_to (basic_block, enum br_predictor, enum prediction);
 static void predict_paths_leading_to_edge (edge, enum br_predictor, enum prediction);
-static bool can_predict_insn_p (const_rtx);
+static bool can_predict_insn_p (const rtx_insn *);
 
 /* Information we hold about each branch predictor.
    Filled using information from predict.def.  */
@@ -560,7 +560,7 @@ br_prob_note_reliable_p (const_rtx note)
 }
 
 static void
-predict_insn (rtx insn, enum br_predictor predictor, int probability)
+predict_insn (rtx_insn *insn, enum br_predictor predictor, int probability)
 {
   gcc_assert (any_condjump_p (insn));
   if (!flag_guess_branch_prob)
@@ -575,7 +575,7 @@ predict_insn (rtx insn, enum br_predictor predictor, int probability)
 /* Predict insn by given predictor.  */
 
 void
-predict_insn_def (rtx insn, enum br_predictor predictor,
+predict_insn_def (rtx_insn *insn, enum br_predictor predictor,
 		  enum prediction taken)
 {
    int probability = predictor_info[(int) predictor].hitrate;
@@ -591,7 +591,7 @@ predict_insn_def (rtx insn, enum br_predictor predictor,
 void
 rtl_predict_edge (edge e, enum br_predictor predictor, int probability)
 {
-  rtx last_insn;
+  rtx_insn *last_insn;
   last_insn = BB_END (e->src);
 
   /* We can store the branch prediction information only about
@@ -680,7 +680,7 @@ clear_bb_predictions (basic_block bb)
    At the moment we represent predictions only on conditional
    jumps, not at computed jump or other complicated cases.  */
 static bool
-can_predict_insn_p (const_rtx insn)
+can_predict_insn_p (const rtx_insn *insn)
 {
   return (JUMP_P (insn)
 	  && any_condjump_p (insn)
@@ -773,7 +773,7 @@ set_even_probabilities (basic_block bb)
    note if not already present.  Remove now useless REG_BR_PRED notes.  */
 
 static void
-combine_predictions_for_insn (rtx insn, basic_block bb)
+combine_predictions_for_insn (rtx_insn *insn, basic_block bb)
 {
   rtx prob_note;
   rtx *pnote;
@@ -1668,7 +1668,7 @@ predict_loops (void)
 static void
 bb_estimate_probability_locally (basic_block bb)
 {
-  rtx last_insn = BB_END (bb);
+  rtx_insn *last_insn = BB_END (bb);
   rtx cond;
 
   if (! can_predict_insn_p (last_insn))
@@ -2891,7 +2891,7 @@ expensive_function_p (int threshold)
   limit = ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency * threshold;
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       FOR_BB_INSNS (bb, insn)
 	if (active_insn_p (insn))
diff --git a/gcc/predict.h b/gcc/predict.h
index 1555f80..c75b6b6 100644
--- a/gcc/predict.h
+++ b/gcc/predict.h
@@ -45,7 +45,7 @@ enum prediction
    TAKEN
 };
 
-extern void predict_insn_def (rtx, enum br_predictor, enum prediction);
+extern void predict_insn_def (rtx_insn *, enum br_predictor, enum prediction);
 extern int counts_to_freqs (void);
 extern void handle_missing_profiles (void);
 extern void estimate_bb_frequencies (bool);
-- 
1.8.5.3

[PATCH 077/236] fwprop.c: Use rtx_insn

[David Malcolm]

gcc/
	* fwprop.c (single_def_use_dom_walker::before_dom_children):
	Strengthen local "insn" from rtx to rtx_insn *.
	(use_killed_between): Likewise for param "target_insn".
	(all_uses_available_at): Likewise for param "target_insn" and
	local "next".
	(update_df_init): Likewise for params "def_insn", "insn".
	(update_df): Likewise for param "insn".
	(try_fwprop_subst): Likewise for param "def_insn" and local
	"insn".
	(free_load_extend): Likewise for param "insn".
	(forward_propagate_subreg): Likewise for param "def_insn" and
	local "use_insn".
	(forward_propagate_asm): Likewise for param "def_insn" and local
	"use_insn".
	(forward_propagate_and_simplify): Likewise for param "def_insn"
	and local "use_insn".
	(forward_propagate_into): Likewise for locals "def_insn" and
	"use_insn".
---
 gcc/fwprop.c | 36 ++++++++++++++++++++----------------
 1 file changed, 20 insertions(+), 16 deletions(-)

diff --git a/gcc/fwprop.c b/gcc/fwprop.c
index 0179bf1..9a1f085 100644
--- a/gcc/fwprop.c
+++ b/gcc/fwprop.c
@@ -220,7 +220,7 @@ single_def_use_dom_walker::before_dom_children (basic_block bb)
   int bb_index = bb->index;
   struct df_md_bb_info *md_bb_info = df_md_get_bb_info (bb_index);
   struct df_lr_bb_info *lr_bb_info = df_lr_get_bb_info (bb_index);
-  rtx insn;
+  rtx_insn *insn;
 
   bitmap_copy (local_md, &md_bb_info->in);
   bitmap_copy (local_lr, &lr_bb_info->in);
@@ -724,7 +724,7 @@ local_ref_killed_between_p (df_ref ref, rtx from, rtx to)
      we check if the definition is killed after DEF_INSN or before
      TARGET_INSN insn, in their respective basic blocks.  */
 static bool
-use_killed_between (df_ref use, rtx def_insn, rtx target_insn)
+use_killed_between (df_ref use, rtx_insn *def_insn, rtx_insn *target_insn)
 {
   basic_block def_bb = BLOCK_FOR_INSN (def_insn);
   basic_block target_bb = BLOCK_FOR_INSN (target_insn);
@@ -788,12 +788,12 @@ use_killed_between (df_ref use, rtx def_insn, rtx target_insn)
    would require full computation of available expressions;
    we check only restricted conditions, see use_killed_between.  */
 static bool
-all_uses_available_at (rtx def_insn, rtx target_insn)
+all_uses_available_at (rtx_insn *def_insn, rtx_insn *target_insn)
 {
   df_ref *use_rec;
   struct df_insn_info *insn_info = DF_INSN_INFO_GET (def_insn);
   rtx def_set = single_set (def_insn);
-  rtx next;
+  rtx_insn *next;
 
   gcc_assert (def_set);
 
@@ -883,7 +883,7 @@ register_active_defs (df_ref *use_rec)
    I'm not doing this yet, though.  */
 
 static void
-update_df_init (rtx def_insn, rtx insn)
+update_df_init (rtx_insn *def_insn, rtx_insn *insn)
 {
 #ifdef ENABLE_CHECKING
   sparseset_clear (active_defs_check);
@@ -921,7 +921,7 @@ update_uses (df_ref *use_rec)
    uses if NOTES_ONLY is true.  */
 
 static void
-update_df (rtx insn, rtx note)
+update_df (rtx_insn *insn, rtx note)
 {
   struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
 
@@ -948,9 +948,10 @@ update_df (rtx insn, rtx note)
    performed.  */
 
 static bool
-try_fwprop_subst (df_ref use, rtx *loc, rtx new_rtx, rtx def_insn, bool set_reg_equal)
+try_fwprop_subst (df_ref use, rtx *loc, rtx new_rtx, rtx_insn *def_insn,
+		  bool set_reg_equal)
 {
-  rtx insn = DF_REF_INSN (use);
+  rtx_insn *insn = DF_REF_INSN (use);
   rtx set = single_set (insn);
   rtx note = NULL_RTX;
   bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
@@ -1031,7 +1032,7 @@ try_fwprop_subst (df_ref use, rtx *loc, rtx new_rtx, rtx def_insn, bool set_reg_
    load from memory.  */
 
 static bool
-free_load_extend (rtx src, rtx insn)
+free_load_extend (rtx src, rtx_insn *insn)
 {
   rtx reg;
   df_ref *use_vec;
@@ -1077,10 +1078,11 @@ free_load_extend (rtx src, rtx insn)
 /* If USE is a subreg, see if it can be replaced by a pseudo.  */
 
 static bool
-forward_propagate_subreg (df_ref use, rtx def_insn, rtx def_set)
+forward_propagate_subreg (df_ref use, rtx_insn *def_insn, rtx def_set)
 {
   rtx use_reg = DF_REF_REG (use);
-  rtx use_insn, src;
+  rtx_insn *use_insn;
+  rtx src;
 
   /* Only consider subregs... */
   enum machine_mode use_mode = GET_MODE (use_reg);
@@ -1147,9 +1149,10 @@ forward_propagate_subreg (df_ref use, rtx def_insn, rtx def_set)
 /* Try to replace USE with SRC (defined in DEF_INSN) in __asm.  */
 
 static bool
-forward_propagate_asm (df_ref use, rtx def_insn, rtx def_set, rtx reg)
+forward_propagate_asm (df_ref use, rtx_insn *def_insn, rtx def_set, rtx reg)
 {
-  rtx use_insn = DF_REF_INSN (use), src, use_pat, asm_operands, new_rtx, *loc;
+  rtx_insn *use_insn = DF_REF_INSN (use);
+  rtx src, use_pat, asm_operands, new_rtx, *loc;
   int speed_p, i;
   df_ref *use_vec;
 
@@ -1224,9 +1227,9 @@ forward_propagate_asm (df_ref use, rtx def_insn, rtx def_set, rtx reg)
    result.  */
 
 static bool
-forward_propagate_and_simplify (df_ref use, rtx def_insn, rtx def_set)
+forward_propagate_and_simplify (df_ref use, rtx_insn *def_insn, rtx def_set)
 {
-  rtx use_insn = DF_REF_INSN (use);
+  rtx_insn *use_insn = DF_REF_INSN (use);
   rtx use_set = single_set (use_insn);
   rtx src, reg, new_rtx, *loc;
   bool set_reg_equal;
@@ -1349,7 +1352,8 @@ static bool
 forward_propagate_into (df_ref use)
 {
   df_ref def;
-  rtx def_insn, def_set, use_insn;
+  rtx_insn *def_insn, *use_insn;
+  rtx def_set;
   rtx parent;
 
   if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE)
-- 
1.8.5.3

[PATCH 084/236] internal-fn.c: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* internal-fn.c (ubsan_expand_si_overflow_addsub_check):
	Strengthen locals "done_label", "do_error" from rtx to
	rtx_code_label *.
	(ubsan_expand_si_overflow_addsub_check): Strengthen local "last"
	from rtx to rtx_insn *.  Strengthen local "sub_check from rtx to
	rtx_code_label *.
	(ubsan_expand_si_overflow_neg_check): Likewise for locals
	"done_label", "do_error" to rtx_code_label * and local  "last" to
	rtx_insn *.
	(ubsan_expand_si_overflow_mul_check): Likewise for locals
	"done_label", "do_error", "large_op0", "small_op0_large_op1",
	"one_small_one_large", "both_ops_large", "after_hipart_neg",
	"after_lopart_neg", "do_overflow", "hipart_different"  to
	rtx_code_label * and local  "last" to rtx_insn *.
---
 gcc/internal-fn.c | 33 ++++++++++++++++++---------------
 1 file changed, 18 insertions(+), 15 deletions(-)

diff --git a/gcc/internal-fn.c b/gcc/internal-fn.c
index 68b2b66..ba97c10 100644
--- a/gcc/internal-fn.c
+++ b/gcc/internal-fn.c
@@ -167,7 +167,8 @@ ubsan_expand_si_overflow_addsub_check (tree_code code, gimple stmt)
 {
   rtx res, op0, op1;
   tree lhs, fn, arg0, arg1;
-  rtx done_label, do_error, target = NULL_RTX;
+  rtx_code_label *done_label, *do_error;
+  rtx target = NULL_RTX;
 
   lhs = gimple_call_lhs (stmt);
   arg0 = gimple_call_arg (stmt, 0);
@@ -187,7 +188,7 @@ ubsan_expand_si_overflow_addsub_check (tree_code code, gimple stmt)
   if (icode != CODE_FOR_nothing)
     {
       struct expand_operand ops[4];
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
 
       res = gen_reg_rtx (mode);
       create_output_operand (&ops[0], res, mode);
@@ -213,7 +214,7 @@ ubsan_expand_si_overflow_addsub_check (tree_code code, gimple stmt)
 
   if (icode == CODE_FOR_nothing)
     {
-      rtx sub_check = gen_label_rtx ();
+      rtx_code_label *sub_check = gen_label_rtx ();
       int pos_neg = 3;
 
       /* Compute the operation.  On RTL level, the addition is always
@@ -315,7 +316,8 @@ ubsan_expand_si_overflow_neg_check (gimple stmt)
 {
   rtx res, op1;
   tree lhs, fn, arg1;
-  rtx done_label, do_error, target = NULL_RTX;
+  rtx_code_label *done_label, *do_error;
+  rtx target = NULL_RTX;
 
   lhs = gimple_call_lhs (stmt);
   arg1 = gimple_call_arg (stmt, 1);
@@ -333,7 +335,7 @@ ubsan_expand_si_overflow_neg_check (gimple stmt)
   if (icode != CODE_FOR_nothing)
     {
       struct expand_operand ops[3];
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
 
       res = gen_reg_rtx (mode);
       create_output_operand (&ops[0], res, mode);
@@ -391,7 +393,8 @@ ubsan_expand_si_overflow_mul_check (gimple stmt)
 {
   rtx res, op0, op1;
   tree lhs, fn, arg0, arg1;
-  rtx done_label, do_error, target = NULL_RTX;
+  rtx_code_label *done_label, *do_error;
+  rtx target = NULL_RTX;
 
   lhs = gimple_call_lhs (stmt);
   arg0 = gimple_call_arg (stmt, 0);
@@ -411,7 +414,7 @@ ubsan_expand_si_overflow_mul_check (gimple stmt)
   if (icode != CODE_FOR_nothing)
     {
       struct expand_operand ops[4];
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
 
       res = gen_reg_rtx (mode);
       create_output_operand (&ops[0], res, mode);
@@ -469,14 +472,14 @@ ubsan_expand_si_overflow_mul_check (gimple stmt)
       else if (hmode != BLKmode
 	       && 2 * GET_MODE_PRECISION (hmode) == GET_MODE_PRECISION (mode))
 	{
-	  rtx large_op0 = gen_label_rtx ();
-	  rtx small_op0_large_op1 = gen_label_rtx ();
-	  rtx one_small_one_large = gen_label_rtx ();
-	  rtx both_ops_large = gen_label_rtx ();
-	  rtx after_hipart_neg = gen_label_rtx ();
-	  rtx after_lopart_neg = gen_label_rtx ();
-	  rtx do_overflow = gen_label_rtx ();
-	  rtx hipart_different = gen_label_rtx ();
+	  rtx_code_label *large_op0 = gen_label_rtx ();
+	  rtx_code_label *small_op0_large_op1 = gen_label_rtx ();
+	  rtx_code_label *one_small_one_large = gen_label_rtx ();
+	  rtx_code_label *both_ops_large = gen_label_rtx ();
+	  rtx_code_label *after_hipart_neg = gen_label_rtx ();
+	  rtx_code_label *after_lopart_neg = gen_label_rtx ();
+	  rtx_code_label *do_overflow = gen_label_rtx ();
+	  rtx_code_label *hipart_different = gen_label_rtx ();
 
 	  unsigned int hprec = GET_MODE_PRECISION (hmode);
 	  rtx hipart0 = expand_shift (RSHIFT_EXPR, mode, op0, hprec,
-- 
1.8.5.3

[PATCH 048/236] alias.c: Use rtx_insn

[David Malcolm]

gcc/
	* alias.c (init_alias_analysis): Strengthen local "insn" from rtx
	to rtx_insn *.
---
 gcc/alias.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/alias.c b/gcc/alias.c
index 0246dd7..903840c 100644
--- a/gcc/alias.c
+++ b/gcc/alias.c
@@ -2840,7 +2840,8 @@ init_alias_analysis (void)
   int changed, pass;
   int i;
   unsigned int ui;
-  rtx insn, val;
+  rtx_insn *insn;
+  rtx val;
   int rpo_cnt;
   int *rpo;
 
-- 
1.8.5.3

Re: [PATCH 048/236] alias.c: Use rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* alias.c (init_alias_analysis): Strengthen local "insn" from rtx
> 	to rtx_insn *.
OK.
jeff

[PATCH 049/236] asan.c: strengthen some rtx locals

[David Malcolm]

This is an example of strengthening rtx.  For example, we
now have strong enough types provided by the existing scaffolding to
turn "insn" and "insns" in this:

  for (insn = insns; insn; insn = NEXT_INSN (insn))

from plain rtx into rtx_insn *.

gcc/
	* asan.c (asan_clear_shadow): Strengthen locals "insn", "insns"
	and "jump" from rtx to rtx_insn *.  Strengthen local "top_label"
	from rtx to rtx_code_label *.
---
 gcc/asan.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/gcc/asan.c b/gcc/asan.c
index 11627c7..82e601d 100644
--- a/gcc/asan.c
+++ b/gcc/asan.c
@@ -905,7 +905,9 @@ asan_shadow_cst (unsigned char shadow_bytes[4])
 static void
 asan_clear_shadow (rtx shadow_mem, HOST_WIDE_INT len)
 {
-  rtx insn, insns, top_label, end, addr, tmp, jump;
+  rtx_insn *insn, *insns, *jump;
+  rtx_code_label *top_label;
+  rtx end, addr, tmp;
 
   start_sequence ();
   clear_storage (shadow_mem, GEN_INT (len), BLOCK_OP_NORMAL);
-- 
1.8.5.3

Re: [PATCH 049/236] asan.c: strengthen some rtx locals

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> This is an example of strengthening rtx.  For example, we
> now have strong enough types provided by the existing scaffolding to
> turn "insn" and "insns" in this:
>
>    for (insn = insns; insn; insn = NEXT_INSN (insn))
>
> from plain rtx into rtx_insn *.
>
> gcc/
> 	* asan.c (asan_clear_shadow): Strengthen locals "insn", "insns"
> 	and "jump" from rtx to rtx_insn *.  Strengthen local "top_label"
> 	from rtx to rtx_code_label *.
OK.
jeff

[PATCH 068/236] df-*.c: Use rtx_insn

[David Malcolm]

gcc/
	* df-core.c (df_bb_regno_first_def_find): Strengthen local "insn"
	from rtx to rtx_insn *.
	(df_bb_regno_last_def_find): Likewise.

	* df-problems.c (df_rd_bb_local_compute): Likewise.
	(df_lr_bb_local_compute): Likewise.
	(df_live_bb_local_compute): Likewise.
	(df_chain_remove_problem): Likewise.
	(df_chain_create_bb): Likewise.
	(df_word_lr_bb_local_compute): Likewise.
	(df_remove_dead_eq_notes): Likewise for param "insn".
	(df_note_bb_compute): Likewise for local "insn".
	(simulate_backwards_to_point): Likewise.
	(df_md_bb_local_compute): Likewise.

	* df-scan.c (df_scan_free_bb_info): Likewise.
	(df_scan_start_dump): Likewise.
	(df_scan_start_block): Likewise.
	(df_install_ref_incremental): Likewise for local "insn".
	(df_insn_rescan_all): Likewise.
	(df_reorganize_refs_by_reg_by_insn): Likewise.
	(df_reorganize_refs_by_insn_bb): Likewise.
	(df_recompute_luids): Likewise.
	(df_bb_refs_record): Likewise.
	(df_update_entry_exit_and_calls): Likewise.
	(df_bb_verify): Likewise.
---
 gcc/df-core.c     |  4 ++--
 gcc/df-problems.c | 20 ++++++++++----------
 gcc/df-scan.c     | 24 ++++++++++++------------
 3 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/gcc/df-core.c b/gcc/df-core.c
index 0dd8cc4..0267bde 100644
--- a/gcc/df-core.c
+++ b/gcc/df-core.c
@@ -1946,7 +1946,7 @@ df_set_clean_cfg (void)
 df_ref
 df_bb_regno_first_def_find (basic_block bb, unsigned int regno)
 {
-  rtx insn;
+  rtx_insn *insn;
   df_ref *def_rec;
   unsigned int uid;
 
@@ -1972,7 +1972,7 @@ df_bb_regno_first_def_find (basic_block bb, unsigned int regno)
 df_ref
 df_bb_regno_last_def_find (basic_block bb, unsigned int regno)
 {
-  rtx insn;
+  rtx_insn *insn;
   df_ref *def_rec;
   unsigned int uid;
 
diff --git a/gcc/df-problems.c b/gcc/df-problems.c
index 77f8c99..47902f7 100644
--- a/gcc/df-problems.c
+++ b/gcc/df-problems.c
@@ -355,7 +355,7 @@ df_rd_bb_local_compute (unsigned int bb_index)
 {
   basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
   struct df_rd_bb_info *bb_info = df_rd_get_bb_info (bb_index);
-  rtx insn;
+  rtx_insn *insn;
 
   bitmap_clear (&seen_in_block);
   bitmap_clear (&seen_in_insn);
@@ -835,7 +835,7 @@ df_lr_bb_local_compute (unsigned int bb_index)
 {
   basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
   struct df_lr_bb_info *bb_info = df_lr_get_bb_info (bb_index);
-  rtx insn;
+  rtx_insn *insn;
   df_ref *def_rec;
   df_ref *use_rec;
 
@@ -1462,7 +1462,7 @@ df_live_bb_local_compute (unsigned int bb_index)
 {
   basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
   struct df_live_bb_info *bb_info = df_live_get_bb_info (bb_index);
-  rtx insn;
+  rtx_insn *insn;
   df_ref *def_rec;
   int luid = 0;
 
@@ -1982,7 +1982,7 @@ df_chain_remove_problem (void)
 
   EXECUTE_IF_SET_IN_BITMAP (df_chain->out_of_date_transfer_functions, 0, bb_index, bi)
     {
-      rtx insn;
+      rtx_insn *insn;
       df_ref *def_rec;
       df_ref *use_rec;
       basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
@@ -2105,7 +2105,7 @@ df_chain_create_bb (unsigned int bb_index)
 {
   basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
   struct df_rd_bb_info *bb_info = df_rd_get_bb_info (bb_index);
-  rtx insn;
+  rtx_insn *insn;
   bitmap_head cpy;
 
   bitmap_initialize (&cpy, &bitmap_default_obstack);
@@ -2531,7 +2531,7 @@ df_word_lr_bb_local_compute (unsigned int bb_index)
 {
   basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
   struct df_word_lr_bb_info *bb_info = df_word_lr_get_bb_info (bb_index);
-  rtx insn;
+  rtx_insn *insn;
   df_ref *def_rec;
   df_ref *use_rec;
 
@@ -2883,7 +2883,7 @@ df_remove_dead_and_unused_notes (rtx insn)
    as the bitmap of currently live registers.  */
 
 static void
-df_remove_dead_eq_notes (rtx insn, bitmap live)
+df_remove_dead_eq_notes (rtx_insn *insn, bitmap live)
 {
   rtx *pprev = &REG_NOTES (insn);
   rtx link = *pprev;
@@ -3153,7 +3153,7 @@ df_note_bb_compute (unsigned int bb_index,
 		    bitmap live, bitmap do_not_gen, bitmap artificial_uses)
 {
   basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
-  rtx insn;
+  rtx_insn *insn;
   df_ref *def_rec;
   df_ref *use_rec;
   struct dead_debug_local debug;
@@ -3784,7 +3784,7 @@ find_memory_stores (rtx x, const_rtx pat ATTRIBUTE_UNUSED,
 void
 simulate_backwards_to_point (basic_block bb, regset live, rtx point)
 {
-  rtx insn;
+  rtx_insn *insn;
   bitmap_copy (live, df_get_live_out (bb));
   df_simulate_initialize_backwards (bb, live);
 
@@ -4271,7 +4271,7 @@ df_md_bb_local_compute (unsigned int bb_index)
 {
   basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
   struct df_md_bb_info *bb_info = df_md_get_bb_info (bb_index);
-  rtx insn;
+  rtx_insn *insn;
 
   /* Artificials are only hard regs.  */
   if (!(df->changeable_flags & DF_NO_HARD_REGS))
diff --git a/gcc/df-scan.c b/gcc/df-scan.c
index 992d0af..28196b3 100644
--- a/gcc/df-scan.c
+++ b/gcc/df-scan.c
@@ -283,7 +283,7 @@ df_scan_free_bb_info (basic_block bb, void *vbb_info)
   /* See if bb_info is initialized.  */
   if (bb_info->artificial_defs)
     {
-      rtx insn;
+      rtx_insn *insn;
       FOR_BB_INSNS (bb, insn)
 	{
 	  if (INSN_P (insn))
@@ -403,7 +403,7 @@ df_scan_start_dump (FILE *file ATTRIBUTE_UNUSED)
   int icount = 0;
   int ccount = 0;
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
 
   fprintf (file, ";;  invalidated by call \t");
   df_print_regset (file, regs_invalidated_by_call_regset);
@@ -482,7 +482,7 @@ df_scan_start_block (basic_block bb, FILE *file)
     }
 #if 0
   {
-    rtx insn;
+    rtx_insn *insn;
     FOR_BB_INSNS (bb, insn)
       if (INSN_P (insn))
 	df_insn_debug (insn, false, file);
@@ -730,7 +730,7 @@ df_install_ref_incremental (df_ref ref)
   unsigned int count = 0;
   bool add_to_table;
 
-  rtx insn = DF_REF_INSN (ref);
+  rtx_insn *insn = DF_REF_INSN (ref);
   basic_block bb = BLOCK_FOR_INSN (insn);
 
   if (DF_REF_REG_DEF_P (ref))
@@ -1417,7 +1417,7 @@ df_insn_rescan_all (void)
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
       FOR_BB_INSNS (bb, insn)
 	{
 	  df_insn_rescan (insn);
@@ -1638,7 +1638,7 @@ df_reorganize_refs_by_reg_by_insn (struct df_ref_info *ref_info,
   EXECUTE_IF_SET_IN_BITMAP (df->blocks_to_analyze, 0, bb_index, bi)
     {
       basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
-      rtx insn;
+      rtx_insn *insn;
       df_ref *ref_rec;
 
       if (include_defs)
@@ -1692,7 +1692,7 @@ df_reorganize_refs_by_reg_by_insn (struct df_ref_info *ref_info,
   EXECUTE_IF_SET_IN_BITMAP (df->blocks_to_analyze, 0, bb_index, bi)
     {
       basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
-      rtx insn;
+      rtx_insn *insn;
       df_ref *ref_rec;
 
       if (include_defs)
@@ -1827,7 +1827,7 @@ df_reorganize_refs_by_insn_bb (basic_block bb, unsigned int offset,
 			       bool include_defs, bool include_uses,
 			       bool include_eq_uses)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (include_defs)
     offset = df_add_refs_to_table (offset, ref_info,
@@ -3528,7 +3528,7 @@ df_insn_refs_collect (struct df_collection_rec *collection_rec,
 void
 df_recompute_luids (basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
   int luid = 0;
 
   df_grow_insn_info ();
@@ -3622,7 +3622,7 @@ void
 df_bb_refs_record (int bb_index, bool scan_insns)
 {
   basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
-  rtx insn;
+  rtx_insn *insn;
   int luid = 0;
 
   if (!df)
@@ -4159,7 +4159,7 @@ df_update_entry_exit_and_calls (void)
      in the set of registers clobbered across the call.  */
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
       FOR_BB_INSNS (bb, insn)
 	{
 	  if (INSN_P (insn) && CALL_P (insn))
@@ -4430,7 +4430,7 @@ df_insn_refs_verify (struct df_collection_rec *collection_rec,
 static bool
 df_bb_verify (basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
   struct df_scan_bb_info *bb_info = df_scan_get_bb_info (bb->index);
   struct df_collection_rec collection_rec;
 
-- 
1.8.5.3

[PATCH 125/236] config/aarch64/aarch64.c: Use rtx_insn

[David Malcolm]

gcc/
	* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
	Strengthen local "insns" from rtx to rtx_insn *.
	(aarch64_set_frame_expr): Likewise for local "insn".
	(aarch64_save_or_restore_fprs): Likewise.
	(aarch64_save_or_restore_callee_save_registers): Likewise.
	(aarch64_expand_prologue): Likewise.
	(aarch64_expand_epilogue): Likewise.
	(aarch64_output_mi_thunk): Likewise.
	(aarch64_split_compare_and_swap): Strengthen locals "label1" and
	"label2" from rtx to rtx_code_label *.
	(aarch64_split_atomic_op): Likewise for local "label".
---
 gcc/config/aarch64/aarch64.c | 23 +++++++++++++----------
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index f69457a..4c821f5 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -691,7 +691,7 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
 
     case SYMBOL_SMALL_TLSGD:
       {
-	rtx insns;
+	rtx_insn *insns;
 	rtx result = gen_rtx_REG (Pmode, R0_REGNUM);
 
 	start_sequence ();
@@ -1882,7 +1882,7 @@ aarch64_layout_frame (void)
 static void
 aarch64_set_frame_expr (rtx frame_pattern)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   insn = get_last_insn ();
   RTX_FRAME_RELATED_P (insn) = 1;
@@ -1906,7 +1906,7 @@ aarch64_save_or_restore_fprs (int start_offset, int increment,
 {
   unsigned regno;
   unsigned regno2;
-  rtx insn;
+  rtx_insn *insn;
   rtx (*gen_mem_ref)(enum machine_mode, rtx)
     = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM;
 
@@ -1990,7 +1990,7 @@ static void
 aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT offset,
 					    bool restore)
 {
-  rtx insn;
+  rtx_insn *insn;
   rtx base_rtx = stack_pointer_rtx;
   HOST_WIDE_INT start_offset = offset;
   HOST_WIDE_INT increment = UNITS_PER_WORD;
@@ -2128,7 +2128,7 @@ aarch64_expand_prologue (void)
   HOST_WIDE_INT original_frame_size;	/* local variables + vararg save */
   HOST_WIDE_INT frame_size, offset;
   HOST_WIDE_INT fp_offset;		/* FP offset from SP */
-  rtx insn;
+  rtx_insn *insn;
 
   aarch64_layout_frame ();
   original_frame_size = get_frame_size () + cfun->machine->saved_varargs_size;
@@ -2293,7 +2293,7 @@ aarch64_expand_epilogue (bool for_sibcall)
 {
   HOST_WIDE_INT original_frame_size, frame_size, offset;
   HOST_WIDE_INT fp_offset;
-  rtx insn;
+  rtx_insn *insn;
   rtx cfa_reg;
 
   aarch64_layout_frame ();
@@ -2669,7 +2669,8 @@ aarch64_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
      to return a pointer to an aggregate.  On AArch64 a result value
      pointer will be in x8.  */
   int this_regno = R0_REGNUM;
-  rtx this_rtx, temp0, temp1, addr, insn, funexp;
+  rtx this_rtx, temp0, temp1, addr, funexp;
+  rtx_insn *insn;
 
   reload_completed = 1;
   emit_note (NOTE_INSN_PROLOGUE_END);
@@ -8294,7 +8295,8 @@ aarch64_split_compare_and_swap (rtx operands[])
   rtx rval, mem, oldval, newval, scratch;
   enum machine_mode mode;
   bool is_weak;
-  rtx label1, label2, x, cond;
+  rtx_code_label *label1, *label2;
+  rtx x, cond;
 
   rval = operands[0];
   mem = operands[1];
@@ -8304,7 +8306,7 @@ aarch64_split_compare_and_swap (rtx operands[])
   scratch = operands[7];
   mode = GET_MODE (mem);
 
-  label1 = NULL_RTX;
+  label1 = NULL;
   if (!is_weak)
     {
       label1 = gen_label_rtx ();
@@ -8347,7 +8349,8 @@ aarch64_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem,
 {
   enum machine_mode mode = GET_MODE (mem);
   enum machine_mode wmode = (mode == DImode ? DImode : SImode);
-  rtx label, x;
+  rtx_code_label *label;
+  rtx x;
 
   label = gen_label_rtx ();
   emit_label (label);
-- 
1.8.5.3

Re: [PATCH 125/236] config/aarch64/aarch64.c: Use rtx_insn

[Richard Earnshaw]

On 06/08/14 18:21, David Malcolm wrote:
> gcc/
> 	* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
> 	Strengthen local "insns" from rtx to rtx_insn *.
> 	(aarch64_set_frame_expr): Likewise for local "insn".
> 	(aarch64_save_or_restore_fprs): Likewise.
> 	(aarch64_save_or_restore_callee_save_registers): Likewise.
> 	(aarch64_expand_prologue): Likewise.
> 	(aarch64_expand_epilogue): Likewise.
> 	(aarch64_output_mi_thunk): Likewise.
> 	(aarch64_split_compare_and_swap): Strengthen locals "label1" and
> 	"label2" from rtx to rtx_code_label *.
> 	(aarch64_split_atomic_op): Likewise for local "label".

OK.

R.

[PATCH 030/236] Convert various rtx to rtx_note *

[David Malcolm]

gcc/
	* basic-block.h (create_basic_block_structure): Strengthen third
	param "bb_note" from rtx to rtx_note *.
	* rtl.h (emit_note_before): Strengthen return type from rtx to
	rtx_note *.
	(emit_note_after): Likewise.
	(emit_note): Likewise.
	(emit_note_copy): Likewise.  Also, strengthen param similarly.
	* function.h (struct rtl_data): Strengthen field
	"x_stack_check_probe_note" from rtx to rtx_note *.

	* cfgexpand.c (expand_gimple_basic_block): Strengthen local "note"
	from rtx to rtx_note *.
	* cfgrtl.c (create_basic_block_structure): Strengthen third param
	"bb_note" from rtx to rtx_note *.
	(duplicate_insn_chain): Likewise for local "last".  Add a checked cast
	when calling emit_note_copy.
	* emit-rtl.c (make_note_raw): Strengthen return type from rtx to
	rtx_note *.
	(emit_note_after): Likewise.
	(emit_note_before): Likewise.
	(emit_note_copy): Likewise.  Also, strengthen param similarly.
	(emit_note): Likewise.
	* except.c (convert_to_eh_region_ranges): Strengthen local "note"
	from rtx to rtx_note *.
	* final.c (change_scope): Likewise.
	(reemit_insn_block_notes): Likewise, for both locals named "note".
	Also, strengthen local "insn" from rtx to rtx_insn *.
	* haifa-sched.c (sched_extend_bb): Strengthen local "note" from
	rtx to rtx_note *.
	* reg-stack.c (compensate_edge): Likewise for local "after". Also,
	strengthen local "seq" from rtx to rtx_insn *.
	* reload1.c (reload_as_needed): Strengthen local "marker" from rtx
	to rtx_note *.
	* sel-sched-ir.c (bb_note_pool): Strengthen from rtx_vec_t to
	vec<rtx_note *>.
	(get_bb_note_from_pool): Strengthen return type from rtx to
	rtx_note *.
	(sel_create_basic_block): Strengthen local "new_bb_note" from
	insn_t to rtx_note *.
	* var-tracking.c (emit_note_insn_var_location): Strengthen local
	"note" from rtx to rtx_note *.
	(emit_notes_in_bb): Likewise.
---
 gcc/basic-block.h  |  3 ++-
 gcc/cfgexpand.c    |  4 ++--
 gcc/cfgrtl.c       |  8 +++++---
 gcc/emit-rtl.c     | 22 +++++++++++-----------
 gcc/except.c       |  3 ++-
 gcc/final.c        |  7 ++++---
 gcc/function.h     |  2 +-
 gcc/haifa-sched.c  |  2 +-
 gcc/reg-stack.c    |  3 ++-
 gcc/reload1.c      |  3 ++-
 gcc/rtl.h          |  8 ++++----
 gcc/sel-sched-ir.c | 10 +++++-----
 gcc/var-tracking.c |  6 ++++--
 13 files changed, 45 insertions(+), 36 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 87094c6..03dbdbc 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -412,7 +412,8 @@ extern void remove_edge_raw (edge);
 extern void redirect_edge_succ (edge, basic_block);
 extern edge redirect_edge_succ_nodup (edge, basic_block);
 extern void redirect_edge_pred (edge, basic_block);
-extern basic_block create_basic_block_structure (rtx, rtx, rtx, basic_block);
+extern basic_block create_basic_block_structure (rtx, rtx, rtx_note *,
+						 basic_block);
 extern void clear_bb_flags (void);
 extern void dump_bb_info (FILE *, basic_block, int, int, bool, bool);
 extern void dump_edge_info (FILE *, edge, int, int);
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 643bb19..d2dc924 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -4878,7 +4878,7 @@ expand_gimple_basic_block (basic_block bb, bool disable_tail_calls)
   gimple_stmt_iterator gsi;
   gimple_seq stmts;
   gimple stmt = NULL;
-  rtx note;
+  rtx_note *note;
   rtx_insn *last;
   edge e;
   edge_iterator ei;
@@ -4951,7 +4951,7 @@ expand_gimple_basic_block (basic_block bb, bool disable_tail_calls)
       maybe_dump_rtl_for_gimple_stmt (stmt, last);
     }
   else
-    note = SET_BB_HEAD (bb) = emit_note (NOTE_INSN_BASIC_BLOCK);
+    SET_BB_HEAD (bb) = note = emit_note (NOTE_INSN_BASIC_BLOCK);
 
   NOTE_BASIC_BLOCK (note) = bb;
 
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index ac3bc87..2a490f9 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -272,7 +272,8 @@ delete_insn_chain (rtx start, rtx finish, bool clear_bb)
    AFTER is the basic block we should be put after.  */
 
 basic_block
-create_basic_block_structure (rtx head, rtx end, rtx bb_note, basic_block after)
+create_basic_block_structure (rtx head, rtx end, rtx_note *bb_note,
+			      basic_block after)
 {
   basic_block bb;
 
@@ -4085,7 +4086,8 @@ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
 rtx
 duplicate_insn_chain (rtx from, rtx to)
 {
-  rtx insn, next, last, copy;
+  rtx insn, next, copy;
+  rtx_note *last;
 
   /* Avoid updating of boundaries of previous basic block.  The
      note will get removed from insn stream in fixup.  */
@@ -4153,7 +4155,7 @@ duplicate_insn_chain (rtx from, rtx to)
 	      break;
 
 	    case NOTE_INSN_EPILOGUE_BEG:
-	      emit_note_copy (insn);
+	      emit_note_copy (as_a <rtx_note *> (insn));
 	      break;
 
 	    default:
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index bbc7fb7..afbb6a0 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3839,7 +3839,7 @@ make_call_insn_raw (rtx pattern)
 
 /* Like `make_insn_raw' but make a NOTE instead of an insn.  */
 
-static rtx
+static rtx_note *
 make_note_raw (enum insn_note subtype)
 {
   /* Some notes are never created this way at all.  These notes are
@@ -3847,7 +3847,7 @@ make_note_raw (enum insn_note subtype)
   gcc_assert (subtype != NOTE_INSN_DELETED_LABEL
 	      && subtype != NOTE_INSN_DELETED_DEBUG_LABEL);
 
-  rtx note = rtx_alloc (NOTE);
+  rtx_note *note = as_a <rtx_note *> (rtx_alloc (NOTE));
   INSN_UID (note) = cur_insn_uid++;
   NOTE_KIND (note) = subtype;
   BLOCK_FOR_INSN (note) = NULL;
@@ -4544,10 +4544,10 @@ note_outside_basic_block_p (enum insn_note subtype, bool on_bb_boundary_p)
 
 /* Emit a note of subtype SUBTYPE after the insn AFTER.  */
 
-rtx
+rtx_note *
 emit_note_after (enum insn_note subtype, rtx after)
 {
-  rtx note = make_note_raw (subtype);
+  rtx_note *note = make_note_raw (subtype);
   basic_block bb = BARRIER_P (after) ? NULL : BLOCK_FOR_INSN (after);
   bool on_bb_boundary_p = (bb != NULL && BB_END (bb) == after);
 
@@ -4560,10 +4560,10 @@ emit_note_after (enum insn_note subtype, rtx after)
 
 /* Emit a note of subtype SUBTYPE before the insn BEFORE.  */
 
-rtx
+rtx_note *
 emit_note_before (enum insn_note subtype, rtx before)
 {
-  rtx note = make_note_raw (subtype);
+  rtx_note *note = make_note_raw (subtype);
   basic_block bb = BARRIER_P (before) ? NULL : BLOCK_FOR_INSN (before);
   bool on_bb_boundary_p = (bb != NULL && BB_HEAD (bb) == before);
 
@@ -5010,11 +5010,11 @@ emit_barrier (void)
 
 /* Emit a copy of note ORIG.  */
 
-rtx
-emit_note_copy (rtx orig)
+rtx_note *
+emit_note_copy (rtx_note *orig)
 {
   enum insn_note kind = (enum insn_note) NOTE_KIND (orig);
-  rtx note = make_note_raw (kind);
+  rtx_note *note = make_note_raw (kind);
   NOTE_DATA (note) = NOTE_DATA (orig);
   add_insn (note);
   return note;
@@ -5023,10 +5023,10 @@ emit_note_copy (rtx orig)
 /* Make an insn of code NOTE or type NOTE_NO
    and add it to the end of the doubly-linked list.  */
 
-rtx
+rtx_note *
 emit_note (enum insn_note kind)
 {
-  rtx note = make_note_raw (kind);
+  rtx_note *note = make_note_raw (kind);
   add_insn (note);
   return note;
 }
diff --git a/gcc/except.c b/gcc/except.c
index fe1de06..ec712a9 100644
--- a/gcc/except.c
+++ b/gcc/except.c
@@ -2479,7 +2479,8 @@ add_call_site (rtx landing_pad, int action, int section)
 static unsigned int
 convert_to_eh_region_ranges (void)
 {
-  rtx insn, iter, note;
+  rtx insn, iter;
+  rtx_note *note;
   action_hash_type ar_hash;
   int last_action = -3;
   rtx last_action_insn = NULL_RTX;
diff --git a/gcc/final.c b/gcc/final.c
index c6339ae..38f6e0c 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -1631,7 +1631,7 @@ change_scope (rtx orig_insn, tree s1, tree s2)
   s = s1;
   while (s != com)
     {
-      rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
+      rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
       NOTE_BLOCK (note) = s;
       s = BLOCK_SUPERCONTEXT (s);
     }
@@ -1653,7 +1653,8 @@ static void
 reemit_insn_block_notes (void)
 {
   tree cur_block = DECL_INITIAL (cfun->decl);
-  rtx insn, note;
+  rtx_insn *insn;
+  rtx_note *note;
 
   insn = get_insns ();
   for (; insn; insn = NEXT_INSN (insn))
@@ -1666,7 +1667,7 @@ reemit_insn_block_notes (void)
           for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
                s = BLOCK_SUPERCONTEXT (s))
             {
-              rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
+              rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
               NOTE_BLOCK (note) = s;
               note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
               NOTE_BLOCK (note) = s;
diff --git a/gcc/function.h b/gcc/function.h
index 0367225..575de1b 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -286,7 +286,7 @@ struct GTY(()) rtl_data {
   struct frame_space *frame_space_list;
 
   /* Place after which to insert the tail_recursion_label if we need one.  */
-  rtx x_stack_check_probe_note;
+  rtx_note *x_stack_check_probe_note;
 
   /* Location at which to save the argument pointer if it will need to be
      referenced.  There are two cases where this is done: if nonlocal gotos
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index caee1b8..04a3576 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -7549,7 +7549,7 @@ sched_extend_bb (void)
 	  /* Don't emit a NOTE if it would end up before a BARRIER.  */
 	  && !BARRIER_P (NEXT_INSN (end))))
     {
-      rtx note = emit_note_after (NOTE_INSN_DELETED, end);
+      rtx_note *note = emit_note_after (NOTE_INSN_DELETED, end);
       /* Make note appear outside BB.  */
       set_block_for_insn (note, NULL);
       SET_BB_END (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb) = end;
diff --git a/gcc/reg-stack.c b/gcc/reg-stack.c
index e0d5d70..94de021 100644
--- a/gcc/reg-stack.c
+++ b/gcc/reg-stack.c
@@ -2815,7 +2815,8 @@ compensate_edge (edge e)
     }
   else
     {
-      rtx seq, after;
+      rtx_insn *seq;
+      rtx_note *after;
 
       current_block = NULL;
       start_sequence ();
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 9daafa4..940fa67 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -4586,7 +4586,8 @@ reload_as_needed (int live_known)
 #if defined (AUTO_INC_DEC)
   int i;
 #endif
-  rtx x, marker;
+  rtx x;
+  rtx_note *marker;
 
   memset (spill_reg_rtx, 0, sizeof spill_reg_rtx);
   memset (spill_reg_store, 0, sizeof spill_reg_store);
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 51e8a45..cca0e20 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2371,7 +2371,7 @@ extern rtx emit_debug_insn_before_noloc (rtx, rtx);
 extern rtx emit_debug_insn_before_setloc (rtx, rtx, int);
 extern rtx emit_barrier_before (rtx);
 extern rtx emit_label_before (rtx, rtx);
-extern rtx emit_note_before (enum insn_note, rtx);
+extern rtx_note *emit_note_before (enum insn_note, rtx);
 extern rtx emit_insn_after (rtx, rtx);
 extern rtx emit_insn_after_noloc (rtx, rtx, basic_block);
 extern rtx emit_insn_after_setloc (rtx, rtx, int);
@@ -2386,7 +2386,7 @@ extern rtx emit_debug_insn_after_noloc (rtx, rtx);
 extern rtx emit_debug_insn_after_setloc (rtx, rtx, int);
 extern rtx emit_barrier_after (rtx);
 extern rtx emit_label_after (rtx, rtx);
-extern rtx emit_note_after (enum insn_note, rtx);
+extern rtx_note *emit_note_after (enum insn_note, rtx);
 extern rtx emit_insn (rtx);
 extern rtx emit_debug_insn (rtx);
 extern rtx emit_jump_insn (rtx);
@@ -2394,8 +2394,8 @@ extern rtx emit_call_insn (rtx);
 extern rtx emit_label (rtx);
 extern rtx emit_jump_table_data (rtx);
 extern rtx emit_barrier (void);
-extern rtx emit_note (enum insn_note);
-extern rtx emit_note_copy (rtx);
+extern rtx_note *emit_note (enum insn_note);
+extern rtx_note *emit_note_copy (rtx_note *);
 extern rtx gen_clobber (rtx);
 extern rtx emit_clobber (rtx);
 extern rtx gen_use (rtx);
diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 01e1dd3..d7352b7 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -126,7 +126,7 @@ static struct
 } nop_pool = { NULL, 0, 0 };
 
 /* The pool for basic block notes.  */
-static rtx_vec_t bb_note_pool;
+static vec<rtx_note *> bb_note_pool;
 
 /* A NOP pattern used to emit placeholder insns.  */
 rtx nop_pattern = NULL_RTX;
@@ -4981,14 +4981,14 @@ return_bb_to_pool (basic_block bb)
 }
 
 /* Get a bb_note from pool or return NULL_RTX if pool is empty.  */
-static rtx
+static rtx_note *
 get_bb_note_from_pool (void)
 {
   if (bb_note_pool.is_empty ())
-    return NULL_RTX;
+    return NULL;
   else
     {
-      rtx note = bb_note_pool.pop ();
+      rtx_note *note = bb_note_pool.pop ();
 
       SET_PREV_INSN (note) = NULL_RTX;
       SET_NEXT_INSN (note) = NULL_RTX;
@@ -5346,7 +5346,7 @@ static basic_block
 sel_create_basic_block (void *headp, void *endp, basic_block after)
 {
   basic_block new_bb;
-  insn_t new_bb_note;
+  rtx_note *new_bb_note;
 
   gcc_assert (flag_sel_sched_pipelining_outer_loops
               || !last_added_blocks.exists ());
diff --git a/gcc/var-tracking.c b/gcc/var-tracking.c
index 9e71165..ed8abdc 100644
--- a/gcc/var-tracking.c
+++ b/gcc/var-tracking.c
@@ -8588,7 +8588,8 @@ emit_note_insn_var_location (variable_def **varp, emit_note_data *data)
   rtx insn = data->insn;
   enum emit_note_where where = data->where;
   variable_table_type vars = data->vars;
-  rtx note, note_vl;
+  rtx_note *note;
+  rtx note_vl;
   int i, j, n_var_parts;
   bool complete;
   enum var_init_status initialized = VAR_INIT_STATUS_UNINITIALIZED;
@@ -9134,7 +9135,8 @@ emit_notes_in_bb (basic_block bb, dataflow_set *set)
 	    dataflow_set_clear_at_call (set);
 	    emit_notes_for_changes (insn, EMIT_NOTE_AFTER_CALL_INSN, set->vars);
 	    {
-	      rtx arguments = mo->u.loc, *p = &arguments, note;
+	      rtx arguments = mo->u.loc, *p = &arguments;
+	      rtx_note *note;
 	      while (*p)
 		{
 		  XEXP (XEXP (*p, 0), 1)
-- 
1.8.5.3

Re: [PATCH 030/236] Convert various rtx to rtx_note *

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 2523 bytes --]

On Wed, 2014-08-06 at 13:20 -0400, David Malcolm wrote:
> gcc/
> 	* basic-block.h (create_basic_block_structure): Strengthen third
> 	param "bb_note" from rtx to rtx_note *.
> 	* rtl.h (emit_note_before): Strengthen return type from rtx to
> 	rtx_note *.
> 	(emit_note_after): Likewise.
> 	(emit_note): Likewise.
> 	(emit_note_copy): Likewise.  Also, strengthen param similarly.
> 	* function.h (struct rtl_data): Strengthen field
> 	"x_stack_check_probe_note" from rtx to rtx_note *.
> 
> 	* cfgexpand.c (expand_gimple_basic_block): Strengthen local "note"
> 	from rtx to rtx_note *.
> 	* cfgrtl.c (create_basic_block_structure): Strengthen third param
> 	"bb_note" from rtx to rtx_note *.
> 	(duplicate_insn_chain): Likewise for local "last".  Add a checked cast
> 	when calling emit_note_copy.
> 	* emit-rtl.c (make_note_raw): Strengthen return type from rtx to
> 	rtx_note *.
> 	(emit_note_after): Likewise.
> 	(emit_note_before): Likewise.
> 	(emit_note_copy): Likewise.  Also, strengthen param similarly.
> 	(emit_note): Likewise.
> 	* except.c (convert_to_eh_region_ranges): Strengthen local "note"
> 	from rtx to rtx_note *.
> 	* final.c (change_scope): Likewise.
> 	(reemit_insn_block_notes): Likewise, for both locals named "note".
> 	Also, strengthen local "insn" from rtx to rtx_insn *.
> 	* haifa-sched.c (sched_extend_bb): Strengthen local "note" from
> 	rtx to rtx_note *.
> 	* reg-stack.c (compensate_edge): Likewise for local "after". Also,
> 	strengthen local "seq" from rtx to rtx_insn *.
> 	* reload1.c (reload_as_needed): Strengthen local "marker" from rtx
> 	to rtx_note *.
> 	* sel-sched-ir.c (bb_note_pool): Strengthen from rtx_vec_t to
> 	vec<rtx_note *>.
> 	(get_bb_note_from_pool): Strengthen return type from rtx to
> 	rtx_note *.
> 	(sel_create_basic_block): Strengthen local "new_bb_note" from
> 	insn_t to rtx_note *.
> 	* var-tracking.c (emit_note_insn_var_location): Strengthen local
> 	"note" from rtx to rtx_note *.
> 	(emit_notes_in_bb): Likewise.

I believe this is covered by Jeff's blanket approval here:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01337.html

Successfully bootstrapped&regrtested on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 31-39, and verified that
it builds standalone for 7 targets. 

Committed to trunk as r214192.

This required some additional changes relative to what I originally
posted, specifically to emit_note_eh_region_end (since
emit_note_eh_region_end was added in r212171).  I'm attaching what I
actually committed.



[-- Attachment #2: r214192.patch --]
[-- Type: text/x-patch, Size: 13764 bytes --]

Index: gcc/final.c
===================================================================
--- gcc/final.c	(revision 214191)
+++ gcc/final.c	(revision 214192)
@@ -1631,7 +1631,7 @@
   s = s1;
   while (s != com)
     {
-      rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
+      rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
       NOTE_BLOCK (note) = s;
       s = BLOCK_SUPERCONTEXT (s);
     }
@@ -1653,7 +1653,8 @@
 reemit_insn_block_notes (void)
 {
   tree cur_block = DECL_INITIAL (cfun->decl);
-  rtx insn, note;
+  rtx_insn *insn;
+  rtx_note *note;
 
   insn = get_insns ();
   for (; insn; insn = NEXT_INSN (insn))
@@ -1666,7 +1667,7 @@
           for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
                s = BLOCK_SUPERCONTEXT (s))
             {
-              rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
+              rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
               NOTE_BLOCK (note) = s;
               note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
               NOTE_BLOCK (note) = s;
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214191)
+++ gcc/ChangeLog	(revision 214192)
@@ -1,6 +1,53 @@
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
 
+	* basic-block.h (create_basic_block_structure): Strengthen third
+	param "bb_note" from rtx to rtx_note *.
+	* rtl.h (emit_note_before): Strengthen return type from rtx to
+	rtx_note *.
+	(emit_note_after): Likewise.
+	(emit_note): Likewise.
+	(emit_note_copy): Likewise.  Also, strengthen param similarly.
 	* function.h (struct rtl_data): Strengthen field
+	"x_stack_check_probe_note" from rtx to rtx_note *.
+
+	* cfgexpand.c (expand_gimple_basic_block): Strengthen local "note"
+	from rtx to rtx_note *.
+	* cfgrtl.c (create_basic_block_structure): Strengthen third param
+	"bb_note" from rtx to rtx_note *.
+	(duplicate_insn_chain): Likewise for local "last".  Add a checked cast
+	when calling emit_note_copy.
+	* emit-rtl.c (make_note_raw): Strengthen return type from rtx to
+	rtx_note *.
+	(emit_note_after): Likewise.
+	(emit_note_before): Likewise.
+	(emit_note_copy): Likewise.  Also, strengthen param similarly.
+	(emit_note): Likewise.
+	* except.c (emit_note_eh_region_end): Likewise for return type.
+	Strengthen local "next" from rtx to rtx_insn *.
+	(convert_to_eh_region_ranges): Strengthen local "note"
+	from rtx to rtx_note *.
+	* final.c (change_scope): Likewise.
+	(reemit_insn_block_notes): Likewise, for both locals named "note".
+	Also, strengthen local "insn" from rtx to rtx_insn *.
+	* haifa-sched.c (sched_extend_bb): Strengthen local "note" from
+	rtx to rtx_note *.
+	* reg-stack.c (compensate_edge): Likewise for local "after". Also,
+	strengthen local "seq" from rtx to rtx_insn *.
+	* reload1.c (reload_as_needed): Strengthen local "marker" from rtx
+	to rtx_note *.
+	* sel-sched-ir.c (bb_note_pool): Strengthen from rtx_vec_t to
+	vec<rtx_note *>.
+	(get_bb_note_from_pool): Strengthen return type from rtx to
+	rtx_note *.
+	(sel_create_basic_block): Strengthen local "new_bb_note" from
+	insn_t to rtx_note *.
+	* var-tracking.c (emit_note_insn_var_location): Strengthen local
+	"note" from rtx to rtx_note *.
+	(emit_notes_in_bb): Likewise.
+
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	* function.h (struct rtl_data): Strengthen field
 	"x_parm_birth_insn" from rtx to rtx_insn *.
 	* function.c (struct assign_parm_data_all): Strengthen fields
 	"first_conversion_insn" and "last_conversion_insn" from rtx to
Index: gcc/haifa-sched.c
===================================================================
--- gcc/haifa-sched.c	(revision 214191)
+++ gcc/haifa-sched.c	(revision 214192)
@@ -7610,7 +7610,7 @@
 	  /* Don't emit a NOTE if it would end up before a BARRIER.  */
 	  && !BARRIER_P (NEXT_INSN (end))))
     {
-      rtx note = emit_note_after (NOTE_INSN_DELETED, end);
+      rtx_note *note = emit_note_after (NOTE_INSN_DELETED, end);
       /* Make note appear outside BB.  */
       set_block_for_insn (note, NULL);
       SET_BB_END (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb) = end;
Index: gcc/sel-sched-ir.c
===================================================================
--- gcc/sel-sched-ir.c	(revision 214191)
+++ gcc/sel-sched-ir.c	(revision 214192)
@@ -126,7 +126,7 @@
 } nop_pool = { NULL, 0, 0 };
 
 /* The pool for basic block notes.  */
-static rtx_vec_t bb_note_pool;
+static vec<rtx_note *> bb_note_pool;
 
 /* A NOP pattern used to emit placeholder insns.  */
 rtx nop_pattern = NULL_RTX;
@@ -4976,14 +4976,14 @@
 }
 
 /* Get a bb_note from pool or return NULL_RTX if pool is empty.  */
-static rtx
+static rtx_note *
 get_bb_note_from_pool (void)
 {
   if (bb_note_pool.is_empty ())
-    return NULL_RTX;
+    return NULL;
   else
     {
-      rtx note = bb_note_pool.pop ();
+      rtx_note *note = bb_note_pool.pop ();
 
       SET_PREV_INSN (note) = NULL_RTX;
       SET_NEXT_INSN (note) = NULL_RTX;
@@ -5341,7 +5341,7 @@
 sel_create_basic_block (void *headp, void *endp, basic_block after)
 {
   basic_block new_bb;
-  insn_t new_bb_note;
+  rtx_note *new_bb_note;
 
   gcc_assert (flag_sel_sched_pipelining_outer_loops
               || !last_added_blocks.exists ());
Index: gcc/function.h
===================================================================
--- gcc/function.h	(revision 214191)
+++ gcc/function.h	(revision 214192)
@@ -286,7 +286,7 @@
   struct frame_space *frame_space_list;
 
   /* Place after which to insert the tail_recursion_label if we need one.  */
-  rtx x_stack_check_probe_note;
+  rtx_note *x_stack_check_probe_note;
 
   /* Location at which to save the argument pointer if it will need to be
      referenced.  There are two cases where this is done: if nonlocal gotos
Index: gcc/except.c
===================================================================
--- gcc/except.c	(revision 214191)
+++ gcc/except.c	(revision 214192)
@@ -2458,10 +2458,10 @@
   return call_site_base + crtl->eh.call_site_record_v[section]->length () - 1;
 }
 
-static rtx
+static rtx_note *
 emit_note_eh_region_end (rtx insn)
 {
-  rtx next = NEXT_INSN (insn);
+  rtx_insn *next = NEXT_INSN (insn);
 
   /* Make sure we do not split a call and its corresponding
      CALL_ARG_LOCATION note.  */
@@ -2479,7 +2479,8 @@
 static unsigned int
 convert_to_eh_region_ranges (void)
 {
-  rtx insn, iter, note;
+  rtx insn, iter;
+  rtx_note *note;
   action_hash_type ar_hash (31);
   int last_action = -3;
   rtx last_action_insn = NULL_RTX;
Index: gcc/emit-rtl.c
===================================================================
--- gcc/emit-rtl.c	(revision 214191)
+++ gcc/emit-rtl.c	(revision 214192)
@@ -3852,7 +3852,7 @@
 
 /* Like `make_insn_raw' but make a NOTE instead of an insn.  */
 
-static rtx
+static rtx_note *
 make_note_raw (enum insn_note subtype)
 {
   /* Some notes are never created this way at all.  These notes are
@@ -3860,7 +3860,7 @@
   gcc_assert (subtype != NOTE_INSN_DELETED_LABEL
 	      && subtype != NOTE_INSN_DELETED_DEBUG_LABEL);
 
-  rtx note = rtx_alloc (NOTE);
+  rtx_note *note = as_a <rtx_note *> (rtx_alloc (NOTE));
   INSN_UID (note) = cur_insn_uid++;
   NOTE_KIND (note) = subtype;
   BLOCK_FOR_INSN (note) = NULL;
@@ -4557,10 +4557,10 @@
 
 /* Emit a note of subtype SUBTYPE after the insn AFTER.  */
 
-rtx
+rtx_note *
 emit_note_after (enum insn_note subtype, rtx after)
 {
-  rtx note = make_note_raw (subtype);
+  rtx_note *note = make_note_raw (subtype);
   basic_block bb = BARRIER_P (after) ? NULL : BLOCK_FOR_INSN (after);
   bool on_bb_boundary_p = (bb != NULL && BB_END (bb) == after);
 
@@ -4573,10 +4573,10 @@
 
 /* Emit a note of subtype SUBTYPE before the insn BEFORE.  */
 
-rtx
+rtx_note *
 emit_note_before (enum insn_note subtype, rtx before)
 {
-  rtx note = make_note_raw (subtype);
+  rtx_note *note = make_note_raw (subtype);
   basic_block bb = BARRIER_P (before) ? NULL : BLOCK_FOR_INSN (before);
   bool on_bb_boundary_p = (bb != NULL && BB_HEAD (bb) == before);
 
@@ -5023,11 +5023,11 @@
 
 /* Emit a copy of note ORIG.  */
 
-rtx
-emit_note_copy (rtx orig)
+rtx_note *
+emit_note_copy (rtx_note *orig)
 {
   enum insn_note kind = (enum insn_note) NOTE_KIND (orig);
-  rtx note = make_note_raw (kind);
+  rtx_note *note = make_note_raw (kind);
   NOTE_DATA (note) = NOTE_DATA (orig);
   add_insn (note);
   return note;
@@ -5036,10 +5036,10 @@
 /* Make an insn of code NOTE or type NOTE_NO
    and add it to the end of the doubly-linked list.  */
 
-rtx
+rtx_note *
 emit_note (enum insn_note kind)
 {
-  rtx note = make_note_raw (kind);
+  rtx_note *note = make_note_raw (kind);
   add_insn (note);
   return note;
 }
Index: gcc/cfgexpand.c
===================================================================
--- gcc/cfgexpand.c	(revision 214191)
+++ gcc/cfgexpand.c	(revision 214192)
@@ -4893,7 +4893,7 @@
   gimple_stmt_iterator gsi;
   gimple_seq stmts;
   gimple stmt = NULL;
-  rtx note;
+  rtx_note *note;
   rtx_insn *last;
   edge e;
   edge_iterator ei;
@@ -4965,7 +4965,7 @@
       maybe_dump_rtl_for_gimple_stmt (stmt, last);
     }
   else
-    note = SET_BB_HEAD (bb) = emit_note (NOTE_INSN_BASIC_BLOCK);
+    SET_BB_HEAD (bb) = note = emit_note (NOTE_INSN_BASIC_BLOCK);
 
   NOTE_BASIC_BLOCK (note) = bb;
 
Index: gcc/rtl.h
===================================================================
--- gcc/rtl.h	(revision 214191)
+++ gcc/rtl.h	(revision 214192)
@@ -2393,7 +2393,7 @@
 extern rtx emit_debug_insn_before_setloc (rtx, rtx, int);
 extern rtx emit_barrier_before (rtx);
 extern rtx emit_label_before (rtx, rtx);
-extern rtx emit_note_before (enum insn_note, rtx);
+extern rtx_note *emit_note_before (enum insn_note, rtx);
 extern rtx emit_insn_after (rtx, rtx);
 extern rtx emit_insn_after_noloc (rtx, rtx, basic_block);
 extern rtx emit_insn_after_setloc (rtx, rtx, int);
@@ -2408,7 +2408,7 @@
 extern rtx emit_debug_insn_after_setloc (rtx, rtx, int);
 extern rtx emit_barrier_after (rtx);
 extern rtx emit_label_after (rtx, rtx);
-extern rtx emit_note_after (enum insn_note, rtx);
+extern rtx_note *emit_note_after (enum insn_note, rtx);
 extern rtx emit_insn (rtx);
 extern rtx emit_debug_insn (rtx);
 extern rtx emit_jump_insn (rtx);
@@ -2416,8 +2416,8 @@
 extern rtx emit_label (rtx);
 extern rtx emit_jump_table_data (rtx);
 extern rtx emit_barrier (void);
-extern rtx emit_note (enum insn_note);
-extern rtx emit_note_copy (rtx);
+extern rtx_note *emit_note (enum insn_note);
+extern rtx_note *emit_note_copy (rtx_note *);
 extern rtx gen_clobber (rtx);
 extern rtx emit_clobber (rtx);
 extern rtx gen_use (rtx);
Index: gcc/var-tracking.c
===================================================================
--- gcc/var-tracking.c	(revision 214191)
+++ gcc/var-tracking.c	(revision 214192)
@@ -8589,7 +8589,8 @@
   rtx insn = data->insn;
   enum emit_note_where where = data->where;
   variable_table_type *vars = data->vars;
-  rtx note, note_vl;
+  rtx_note *note;
+  rtx note_vl;
   int i, j, n_var_parts;
   bool complete;
   enum var_init_status initialized = VAR_INIT_STATUS_UNINITIALIZED;
@@ -9135,7 +9136,8 @@
 	    dataflow_set_clear_at_call (set);
 	    emit_notes_for_changes (insn, EMIT_NOTE_AFTER_CALL_INSN, set->vars);
 	    {
-	      rtx arguments = mo->u.loc, *p = &arguments, note;
+	      rtx arguments = mo->u.loc, *p = &arguments;
+	      rtx_note *note;
 	      while (*p)
 		{
 		  XEXP (XEXP (*p, 0), 1)
Index: gcc/reg-stack.c
===================================================================
--- gcc/reg-stack.c	(revision 214191)
+++ gcc/reg-stack.c	(revision 214192)
@@ -2810,7 +2810,8 @@
     }
   else
     {
-      rtx seq, after;
+      rtx_insn *seq;
+      rtx_note *after;
 
       current_block = NULL;
       start_sequence ();
Index: gcc/basic-block.h
===================================================================
--- gcc/basic-block.h	(revision 214191)
+++ gcc/basic-block.h	(revision 214192)
@@ -412,7 +412,8 @@
 extern void redirect_edge_succ (edge, basic_block);
 extern edge redirect_edge_succ_nodup (edge, basic_block);
 extern void redirect_edge_pred (edge, basic_block);
-extern basic_block create_basic_block_structure (rtx, rtx, rtx, basic_block);
+extern basic_block create_basic_block_structure (rtx, rtx, rtx_note *,
+						 basic_block);
 extern void clear_bb_flags (void);
 extern void dump_bb_info (FILE *, basic_block, int, int, bool, bool);
 extern void dump_edge_info (FILE *, edge, int, int);
Index: gcc/cfgrtl.c
===================================================================
--- gcc/cfgrtl.c	(revision 214191)
+++ gcc/cfgrtl.c	(revision 214192)
@@ -272,7 +272,8 @@
    AFTER is the basic block we should be put after.  */
 
 basic_block
-create_basic_block_structure (rtx head, rtx end, rtx bb_note, basic_block after)
+create_basic_block_structure (rtx head, rtx end, rtx_note *bb_note,
+			      basic_block after)
 {
   basic_block bb;
 
@@ -4082,7 +4083,8 @@
 rtx
 duplicate_insn_chain (rtx from, rtx to)
 {
-  rtx insn, next, last, copy;
+  rtx insn, next, copy;
+  rtx_note *last;
 
   /* Avoid updating of boundaries of previous basic block.  The
      note will get removed from insn stream in fixup.  */
@@ -4150,7 +4152,7 @@
 	      break;
 
 	    case NOTE_INSN_EPILOGUE_BEG:
-	      emit_note_copy (insn);
+	      emit_note_copy (as_a <rtx_note *> (insn));
 	      break;
 
 	    default:
Index: gcc/reload1.c
===================================================================
--- gcc/reload1.c	(revision 214191)
+++ gcc/reload1.c	(revision 214192)
@@ -4573,7 +4573,8 @@
 #if defined (AUTO_INC_DEC)
   int i;
 #endif
-  rtx x, marker;
+  rtx x;
+  rtx_note *marker;
 
   memset (spill_reg_rtx, 0, sizeof spill_reg_rtx);
   memset (spill_reg_store, 0, sizeof spill_reg_store);

[PATCH 109/236] resource.c: Use rtx_insn

[David Malcolm]

gcc/
	* resource.c (next_insn_no_annul): Strengthen local "next" from
	rtx to rtx_insn *.
	(mark_referenced_resources): Likewise for local "insn".
---
 gcc/resource.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/resource.c b/gcc/resource.c
index b555682..ef08976 100644
--- a/gcc/resource.c
+++ b/gcc/resource.c
@@ -174,7 +174,7 @@ next_insn_no_annul (rtx insn)
 	  && INSN_ANNULLED_BRANCH_P (insn)
 	  && NEXT_INSN (PREV_INSN (insn)) != insn)
 	{
-	  rtx next = NEXT_INSN (insn);
+	  rtx_insn *next = NEXT_INSN (insn);
 
 	  while ((NONJUMP_INSN_P (next) || JUMP_P (next) || CALL_P (next))
 		 && INSN_FROM_TARGET_P (next))
@@ -308,7 +308,7 @@ mark_referenced_resources (rtx x, struct resources *res,
 	     However, we may have moved some of the parameter loading insns
 	     into the delay slot of this CALL.  If so, the USE's for them
 	     don't count and should be skipped.  */
-	  rtx insn = PREV_INSN (x);
+	  rtx_insn *insn = PREV_INSN (x);
 	  rtx sequence = 0;
 	  int seq_size = 0;
 	  int i;
-- 
1.8.5.3

Re: [PATCH 109/236] resource.c: Use rtx_insn

[Jeff Law]

On 08/06/14 11:21, David Malcolm wrote:
> gcc/
> 	* resource.c (next_insn_no_annul): Strengthen local "next" from
> 	rtx to rtx_insn *.
> 	(mark_referenced_resources): Likewise for local "insn".
> ---
>   gcc/resource.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
OK.

As are patches #110-#123.

Jeff

[PATCH 087/236] loop-doloop.c: Use rtx_insn in a few places

[David Malcolm]

gcc/
	* loop-doloop.c (doloop_valid_p): Strengthen local "insn" from rtx
	to rtx_insn *.
	(add_test): Likewise for locals "seq", "jump".
	(doloop_modify): Likewise for locals "sequence", "jump_insn".
---
 gcc/loop-doloop.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/gcc/loop-doloop.c b/gcc/loop-doloop.c
index 0e84393..42e7f70 100644
--- a/gcc/loop-doloop.c
+++ b/gcc/loop-doloop.c
@@ -261,7 +261,7 @@ static bool
 doloop_valid_p (struct loop *loop, struct niter_desc *desc)
 {
   basic_block *body = get_loop_body (loop), bb;
-  rtx insn;
+  rtx_insn *insn;
   unsigned i;
   bool result = true;
 
@@ -336,7 +336,8 @@ cleanup:
 static bool
 add_test (rtx cond, edge *e, basic_block dest)
 {
-  rtx seq, jump, label;
+  rtx_insn *seq, *jump;
+  rtx label;
   enum machine_mode mode;
   rtx op0 = XEXP (cond, 0), op1 = XEXP (cond, 1);
   enum rtx_code code = GET_CODE (cond);
@@ -401,8 +402,8 @@ doloop_modify (struct loop *loop, struct niter_desc *desc,
 {
   rtx counter_reg;
   rtx tmp, noloop = NULL_RTX;
-  rtx sequence;
-  rtx jump_insn;
+  rtx_insn *sequence;
+  rtx_insn *jump_insn;
   rtx jump_label;
   int nonneg = 0;
   bool increment_count;
-- 
1.8.5.3

[PATCH 003/236] config/mn10300: Fix missing PATTERN in PARALLEL handling

[David Malcolm]

gcc/
	* config/mn10300/mn10300.c (mn10300_adjust_sched_cost): Fix the
	handling of PARALLEL to work on PATTERN (insn) and PATTERN (dep),
	rather than just on insn, dep themselves.  The latter are insns,
	and thus can't be PARALLEL.
---
 gcc/config/mn10300/mn10300.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c
index eb00077..99b5d19 100644
--- a/gcc/config/mn10300/mn10300.c
+++ b/gcc/config/mn10300/mn10300.c
@@ -2772,11 +2772,11 @@ mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
   if (!TARGET_AM33)
     return 1;
 
-  if (GET_CODE (insn) == PARALLEL)
-    insn = XVECEXP (insn, 0, 0);
+  if (GET_CODE (PATTERN (insn)) == PARALLEL)
+    insn = XVECEXP (PATTERN (insn), 0, 0);
 
-  if (GET_CODE (dep) == PARALLEL)
-    dep = XVECEXP (dep, 0, 0);
+  if (GET_CODE (PATTERN (dep)) == PARALLEL)
+    dep = XVECEXP (PATTERN (dep), 0, 0);
 
   /* For the AM34 a load instruction that follows a
      store instruction incurs an extra cycle of delay.  */
-- 
1.8.5.3

Re: [PATCH 003/236] config/mn10300: Fix missing PATTERN in PARALLEL handling

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> gcc/
> 	* config/mn10300/mn10300.c (mn10300_adjust_sched_cost): Fix the
> 	handling of PARALLEL to work on PATTERN (insn) and PATTERN (dep),
> 	rather than just on insn, dep themselves.  The latter are insns,
> 	and thus can't be PARALLEL.
Approved.  Should go forward independently.

Jeff

Re: [PATCH 003/236] config/mn10300: Fix missing PATTERN in PARALLEL handling

[Richard Henderson]

On 08/06/2014 10:19 AM, David Malcolm wrote:
> @@ -2772,11 +2772,11 @@ mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
>    if (!TARGET_AM33)
>      return 1;
>  
> -  if (GET_CODE (insn) == PARALLEL)
> -    insn = XVECEXP (insn, 0, 0);
> +  if (GET_CODE (PATTERN (insn)) == PARALLEL)
> +    insn = XVECEXP (PATTERN (insn), 0, 0);
>  
> -  if (GET_CODE (dep) == PARALLEL)
> -    dep = XVECEXP (dep, 0, 0);
> +  if (GET_CODE (PATTERN (dep)) == PARALLEL)
> +    dep = XVECEXP (PATTERN (dep), 0, 0);

I think these tests are simply wrong and should be removed.

Certainly one can't expect to extract the first element of an insn's pattern
and then a few lines later test the pattern vs JUMP_P.


r~

Re: [PATCH 003/236] config/mn10300: Fix missing PATTERN in PARALLEL handling

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 2906 bytes --]

On Tue, 2014-08-19 at 11:02 -0700, Richard Henderson wrote:
> On 08/06/2014 10:19 AM, David Malcolm wrote:
> > @@ -2772,11 +2772,11 @@ mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
> >    if (!TARGET_AM33)
> >      return 1;
> >  
> > -  if (GET_CODE (insn) == PARALLEL)
> > -    insn = XVECEXP (insn, 0, 0);
> > +  if (GET_CODE (PATTERN (insn)) == PARALLEL)
> > +    insn = XVECEXP (PATTERN (insn), 0, 0);
> >  
> > -  if (GET_CODE (dep) == PARALLEL)
> > -    dep = XVECEXP (dep, 0, 0);
> > +  if (GET_CODE (PATTERN (dep)) == PARALLEL)
> > +    dep = XVECEXP (PATTERN (dep), 0, 0);
> 
> I think these tests are simply wrong and should be removed.
> 
> Certainly one can't expect to extract the first element of an insn's pattern
> and then a few lines later test the pattern vs JUMP_P.

You're correct: both old and new versions of the code are confusing
insns with patterns.

I was able to trigger these lines of code by running with optimization
enabled with -fschedule-insns -mam33 (mn10300_processor >=
PROCESSOR_AM33 is needed to avoid mn10300_option_override from turning
off -fschedule-insns).

It does encounter insns with PARALLEL patterns e.g.:

(gdb) call debug(dep)
(insn 90 4 75 2 (parallel [
            (set (reg:SI 0 d0 [orig:58 D.1504 ] [58])
                (const_int 0 [0]))
            (clobber (reg:CC 51 EPSW))
        ]) /home/david/coding/gcc-python/smoketest/smoketest.c:30 7 {*movsi_clr}
     (expr_list:REG_UNUSED (reg:CC 51 EPSW)
        (nil)))

and my patch updates dep to the inner SET within the PARALLEL:
(gdb) call debug(dep)
(set (reg:SI 0 d0 [orig:58 D.1504 ] [58])
    (const_int 0 [0]))

which is a pattern, not an insn.  I think I was confusing PARALLEL with
SEQUENCE, where the elements of the latter are insns, but the elements
of the former are patterns.

I had a go at reworking the logic here to (I hope) properly handle a SET
within a PARALLEL (assuming some clobbers); patch attached.  Appears to
work (in light smoketesting); am working on running the full testsuite
with this build.  Alternatively, should this simply use "single_set"?
(though I think that's a more invasive change, especially since some of
the logic is for non-SETs).

	* gcc/config/mn10300/mn10300.c (is_load_insn): Rename to...
	(is_load_pat): ...this, updating to work on a pattern rather than
	an insn.
	(is_store_insn): Rename to...
	(is_store_pat): ...this, updating to work on a pattern rather than
	an insn.
	(mn10300_adjust_sched_cost): Rewrite the bogus condition that
	checks for "insn" and "dep" being PARALLEL to work on their patterns
	instead, introducing locals "insn_pat" and "dep_pat" to track
	these, updating if needed to the initial pattern within any such
	PARALLEL.  Rewrite all uses of PATTERN (dep) and PATTERN (insn) to
	instead use these new locals, and update calls to
	is_load_insn/is_store_insn to be calls to is_load_pat/is_store_pat.



[-- Attachment #2: mn10300-sched-cost-rewrite.patch --]
[-- Type: text/x-patch, Size: 3489 bytes --]

Index: gcc/config/mn10300/mn10300.c
===================================================================
--- gcc/config/mn10300/mn10300.c	(revision 214575)
+++ gcc/config/mn10300/mn10300.c	(working copy)
@@ -2742,21 +2742,21 @@
 }
 
 static inline bool
-is_load_insn (rtx insn)
+is_load_pat (rtx pat)
 {
-  if (GET_CODE (PATTERN (insn)) != SET)
+  if (GET_CODE (pat) != SET)
     return false;
 
-  return MEM_P (SET_SRC (PATTERN (insn)));
+  return MEM_P (SET_SRC (pat));
 }
 
 static inline bool
-is_store_insn (rtx insn)
+is_store_pat (rtx pat)
 {
-  if (GET_CODE (PATTERN (insn)) != SET)
+  if (GET_CODE (pat) != SET)
     return false;
 
-  return MEM_P (SET_DEST (PATTERN (insn)));
+  return MEM_P (SET_DEST (pat));
 }
 
 /* Update scheduling costs for situations that cannot be
@@ -2768,33 +2768,38 @@
 static int
 mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
 {
+  rtx insn_pat;
+  rtx dep_pat;
+
   int timings = get_attr_timings (insn);
 
   if (!TARGET_AM33)
     return 1;
 
-  if (GET_CODE (insn) == PARALLEL)
-    insn = XVECEXP (insn, 0, 0);
+  insn_pat = PATTERN (insn);
+  if (GET_CODE (insn_pat) == PARALLEL)
+    insn_pat = XVECEXP (insn_pat, 0, 0);
 
-  if (GET_CODE (dep) == PARALLEL)
-    dep = XVECEXP (dep, 0, 0);
+  dep_pat = PATTERN (dep);
+  if (GET_CODE (dep_pat) == PARALLEL)
+    dep_pat = XVECEXP (dep_pat, 0, 0);
 
   /* For the AM34 a load instruction that follows a
      store instruction incurs an extra cycle of delay.  */
   if (mn10300_tune_cpu == PROCESSOR_AM34
-      && is_load_insn (dep)
-      && is_store_insn (insn))
+      && is_load_pat (dep_pat)
+      && is_store_pat (insn_pat))
     cost += 1;
 
   /* For the AM34 a non-store, non-branch FPU insn that follows
      another FPU insn incurs a one cycle throughput increase.  */
   else if (mn10300_tune_cpu == PROCESSOR_AM34
-      && ! is_store_insn (insn)
+      && ! is_store_pat (insn_pat)
       && ! JUMP_P (insn)
-      && GET_CODE (PATTERN (dep)) == SET
-      && GET_CODE (PATTERN (insn)) == SET
-      && GET_MODE_CLASS (GET_MODE (SET_SRC (PATTERN (dep)))) == MODE_FLOAT
-      && GET_MODE_CLASS (GET_MODE (SET_SRC (PATTERN (insn)))) == MODE_FLOAT)
+      && GET_CODE (dep_pat) == SET
+      && GET_CODE (insn_pat) == SET
+      && GET_MODE_CLASS (GET_MODE (SET_SRC (dep_pat))) == MODE_FLOAT
+      && GET_MODE_CLASS (GET_MODE (SET_SRC (insn_pat))) == MODE_FLOAT)
     cost += 1;
 
   /*  Resolve the conflict described in section 1-7-4 of
@@ -2816,20 +2821,20 @@
     return cost;
 
   /* Check that the instruction about to scheduled is an FPU instruction.  */
-  if (GET_CODE (PATTERN (dep)) != SET)
+  if (GET_CODE (dep_pat) != SET)
     return cost;
 
-  if (GET_MODE_CLASS (GET_MODE (SET_SRC (PATTERN (dep)))) != MODE_FLOAT)
+  if (GET_MODE_CLASS (GET_MODE (SET_SRC (dep_pat))) != MODE_FLOAT)
     return cost;
 
   /* Now check to see if the previous instruction is a load or store.  */
-  if (! is_load_insn (insn) && ! is_store_insn (insn))
+  if (! is_load_pat (insn_pat) && ! is_store_pat (insn_pat))
     return cost;
 
   /* XXX: Verify: The text of 1-7-4 implies that the restriction
      only applies when an INTEGER load/store precedes an FPU
      instruction, but is this true ?  For now we assume that it is.  */
-  if (GET_MODE_CLASS (GET_MODE (SET_SRC (PATTERN (insn)))) != MODE_INT)
+  if (GET_MODE_CLASS (GET_MODE (SET_SRC (insn_pat))) != MODE_INT)
     return cost;
 
   /* Extract the latency value from the timings attribute.  */

Re: [PATCH 003/236] config/mn10300: Fix missing PATTERN in PARALLEL handling

[Richard Henderson]

On 08/27/2014 08:48 AM, David Malcolm wrote:
> Alternatively, should this simply use "single_set"?

Yes.

> (though I think that's a more invasive change, especially since some of
> the logic is for non-SETs).

I don't think that's the case.  Take the tests in order:

  if (mn10300_tune_cpu == PROCESSOR_AM34
      && is_load_insn (dep)
      && is_store_insn (insn))
    cost += 1;

Requires sets for both.

  else if (mn10300_tune_cpu == PROCESSOR_AM34
      && ! is_store_insn (insn)
      && ! JUMP_P (insn)
      && GET_CODE (PATTERN (dep)) == SET
      && GET_CODE (PATTERN (insn)) == SET

Duh.

  if (GET_CODE (PATTERN (dep)) != SET)
    return cost;

Filtering out non-sets from dep.

  /* Now check to see if the previous instruction is a load or store.  */
  if (! is_load_insn (insn) && ! is_store_insn (insn))
    return cost;

Filtering out non-sets from insn.

Thus in no case do we return anything but the original "cost" when either the
dep or insn pattern is not a set.

Oh, and while you're massaging this function...

mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
{
  int timings = get_attr_timings (insn);
...
  /* Extract the latency value from the timings attribute.  */
  return timings < 100 ? (timings % 10) : (timings % 100);
}


Will you please move the (expensive) get_attr_timings call to the end, after
we've discarded all of the cases in which it isn't used?


r~

Re: [PATCH 003/236] config/mn10300: Fix missing PATTERN in PARALLEL handling

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 2503 bytes --]

On Wed, 2014-08-27 at 09:11 -0700, Richard Henderson wrote:
> On 08/27/2014 08:48 AM, David Malcolm wrote:
> > Alternatively, should this simply use "single_set"?
> 
> Yes.
> 
> > (though I think that's a more invasive change, especially since some of
> > the logic is for non-SETs).
> 
> I don't think that's the case.  Take the tests in order:
> 
>   if (mn10300_tune_cpu == PROCESSOR_AM34
>       && is_load_insn (dep)
>       && is_store_insn (insn))
>     cost += 1;
> 
> Requires sets for both.
> 
>   else if (mn10300_tune_cpu == PROCESSOR_AM34
>       && ! is_store_insn (insn)
>       && ! JUMP_P (insn)
>       && GET_CODE (PATTERN (dep)) == SET
>       && GET_CODE (PATTERN (insn)) == SET
> 
> Duh.
> 
>   if (GET_CODE (PATTERN (dep)) != SET)
>     return cost;
> 
> Filtering out non-sets from dep.
> 
>   /* Now check to see if the previous instruction is a load or store.  */
>   if (! is_load_insn (insn) && ! is_store_insn (insn))
>     return cost;
> 
> Filtering out non-sets from insn.
> 
> Thus in no case do we return anything but the original "cost" when either the
> dep or insn pattern is not a set.
> 
> Oh, and while you're massaging this function...
> 
> mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
> {
>   int timings = get_attr_timings (insn);
> ...
>   /* Extract the latency value from the timings attribute.  */
>   return timings < 100 ? (timings % 10) : (timings % 100);
> }
> 
> 
> Will you please move the (expensive) get_attr_timings call to the end, after
> we've discarded all of the cases in which it isn't used?

Fair enough.

Update version of patch attached; again, only lightly tested so far.

	* gcc/config/mn10300/mn10300.c (is_load_insn): Rename to...
	(set_is_load_p): ...this, updating to work on a SET pattern rather
	than an insn.
	(is_store_insn): Rename to...
	(set_is_store_p): ...this, updating to work on a SET pattern
	rather than an insn.
	(mn10300_adjust_sched_cost): Move call to get_attr_timings from
	top of function to where it is needed.  Rewrite the bogus
	condition that checks for "insn" and "dep" being PARALLEL to
	instead use single_set, introducing locals "insn_set" and
	"dep_set".  Given that we only ever returned "cost" for a non-pair
	of SETs, bail out early if we don't have a pair of SET.
	Rewrite all uses of PATTERN (dep) and PATTERN (insn) to instead
	use the new locals "insn_set" and "dep_set", and update calls to
	is_load_insn and is_store_insn to be calls to set_is_load_p and
	set_is_store_p.


[-- Attachment #2: mn10300-sched-cost-rewrite-v2.patch --]
[-- Type: text/x-patch, Size: 3507 bytes --]

Index: gcc/config/mn10300/mn10300.c
===================================================================
--- gcc/config/mn10300/mn10300.c	(revision 214575)
+++ gcc/config/mn10300/mn10300.c	(working copy)
@@ -2742,21 +2742,15 @@
 }
 
 static inline bool
-is_load_insn (rtx insn)
+set_is_load_p (rtx set)
 {
-  if (GET_CODE (PATTERN (insn)) != SET)
-    return false;
-
-  return MEM_P (SET_SRC (PATTERN (insn)));
+  return MEM_P (SET_SRC (set));
 }
 
 static inline bool
-is_store_insn (rtx insn)
+set_is_store_p (rtx set)
 {
-  if (GET_CODE (PATTERN (insn)) != SET)
-    return false;
-
-  return MEM_P (SET_DEST (PATTERN (insn)));
+  return MEM_P (SET_DEST (set));
 }
 
 /* Update scheduling costs for situations that cannot be
@@ -2768,33 +2762,39 @@
 static int
 mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
 {
-  int timings = get_attr_timings (insn);
+  rtx insn_set;
+  rtx dep_set;
+  int timings;
 
   if (!TARGET_AM33)
     return 1;
 
-  if (GET_CODE (insn) == PARALLEL)
-    insn = XVECEXP (insn, 0, 0);
+  /* We are only interested in pairs of SET. */
+  insn_set = single_set (insn);
+  if (!insn_set)
+    return cost;
 
-  if (GET_CODE (dep) == PARALLEL)
-    dep = XVECEXP (dep, 0, 0);
+  dep_set = single_set (dep);
+  if (!dep_set)
+    return cost;
 
+  gcc_assert (GET_CODE (insn_set) == SET);
+  gcc_assert (GET_CODE (dep_set) == SET);
+
   /* For the AM34 a load instruction that follows a
      store instruction incurs an extra cycle of delay.  */
   if (mn10300_tune_cpu == PROCESSOR_AM34
-      && is_load_insn (dep)
-      && is_store_insn (insn))
+      && set_is_load_p (dep_set)
+      && set_is_store_p (insn_set))
     cost += 1;
 
   /* For the AM34 a non-store, non-branch FPU insn that follows
      another FPU insn incurs a one cycle throughput increase.  */
   else if (mn10300_tune_cpu == PROCESSOR_AM34
-      && ! is_store_insn (insn)
+      && ! set_is_store_p (insn_set)
       && ! JUMP_P (insn)
-      && GET_CODE (PATTERN (dep)) == SET
-      && GET_CODE (PATTERN (insn)) == SET
-      && GET_MODE_CLASS (GET_MODE (SET_SRC (PATTERN (dep)))) == MODE_FLOAT
-      && GET_MODE_CLASS (GET_MODE (SET_SRC (PATTERN (insn)))) == MODE_FLOAT)
+      && GET_MODE_CLASS (GET_MODE (SET_SRC (dep_set))) == MODE_FLOAT
+      && GET_MODE_CLASS (GET_MODE (SET_SRC (insn_set))) == MODE_FLOAT)
     cost += 1;
 
   /*  Resolve the conflict described in section 1-7-4 of
@@ -2816,23 +2816,21 @@
     return cost;
 
   /* Check that the instruction about to scheduled is an FPU instruction.  */
-  if (GET_CODE (PATTERN (dep)) != SET)
+  if (GET_MODE_CLASS (GET_MODE (SET_SRC (dep_set))) != MODE_FLOAT)
     return cost;
 
-  if (GET_MODE_CLASS (GET_MODE (SET_SRC (PATTERN (dep)))) != MODE_FLOAT)
-    return cost;
-
   /* Now check to see if the previous instruction is a load or store.  */
-  if (! is_load_insn (insn) && ! is_store_insn (insn))
+  if (! set_is_load_p (insn_set) && ! set_is_store_p (insn_set))
     return cost;
 
   /* XXX: Verify: The text of 1-7-4 implies that the restriction
      only applies when an INTEGER load/store precedes an FPU
      instruction, but is this true ?  For now we assume that it is.  */
-  if (GET_MODE_CLASS (GET_MODE (SET_SRC (PATTERN (insn)))) != MODE_INT)
+  if (GET_MODE_CLASS (GET_MODE (SET_SRC (insn_set))) != MODE_INT)
     return cost;
 
   /* Extract the latency value from the timings attribute.  */
+  timings = get_attr_timings (insn);
   return timings < 100 ? (timings % 10) : (timings % 100);
 }
 

Re: [PATCH 003/236] config/mn10300: Fix missing PATTERN in PARALLEL handling

[Richard Henderson]

On 08/27/2014 09:32 AM, David Malcolm wrote:
> 	* gcc/config/mn10300/mn10300.c (is_load_insn): Rename to...
> 	(set_is_load_p): ...this, updating to work on a SET pattern rather
> 	than an insn.
> 	(is_store_insn): Rename to...
> 	(set_is_store_p): ...this, updating to work on a SET pattern
> 	rather than an insn.
> 	(mn10300_adjust_sched_cost): Move call to get_attr_timings from
> 	top of function to where it is needed.  Rewrite the bogus
> 	condition that checks for "insn" and "dep" being PARALLEL to
> 	instead use single_set, introducing locals "insn_set" and
> 	"dep_set".  Given that we only ever returned "cost" for a non-pair
> 	of SETs, bail out early if we don't have a pair of SET.
> 	Rewrite all uses of PATTERN (dep) and PATTERN (insn) to instead
> 	use the new locals "insn_set" and "dep_set", and update calls to
> 	is_load_insn and is_store_insn to be calls to set_is_load_p and
> 	set_is_store_p.

Ok, if it passes your smoke tests.

> +  /* We are only interested in pairs of SET. */
> +  insn_set = single_set (insn);
> +  if (!insn_set)
> +    return cost;
>  
> +  dep_set = single_set (dep);
> +  if (!dep_set)
> +    return cost;
>  
> +  gcc_assert (GET_CODE (insn_set) == SET);
> +  gcc_assert (GET_CODE (dep_set) == SET);

I don't think you need the asserts; we should be able to trust single_set.


r~

[PATCH 092/236] lra: use rtx_insn

[David Malcolm]

gcc/
	* lra-int.h (struct lra_insn_recog_data): Strengthen field "insn"
	from rtx to rtx_insn *.
	(lra_push_insn): Likewise for 1st param.
	(lra_push_insn_and_update_insn_regno_info): Likewise.
	(lra_pop_insn): Likewise for return type.
	(lra_invalidate_insn_data): Likewise for 1st param.
	(lra_set_insn_deleted): Likewise.
	(lra_delete_dead_insn): Likewise.
	(lra_process_new_insns): Likewise for first 3 params.
	(lra_set_insn_recog_data): Likewise for 1st param.
	(lra_update_insn_recog_data): Likewise.
	(lra_set_used_insn_alternative): Likewise.
	(lra_invalidate_insn_regno_info): Likewise.
	(lra_update_insn_regno_info): Likewise.
	(lra_former_scratch_operand_p): Likewise.
	(lra_eliminate_regs_1): Likewise.
	(lra_get_insn_recog_data): Likewise.

	* lra-assigns.c (assign_by_spills): Strengthen local "insn" from
	rtx to rtx_insn *.

	* lra-coalesce.c (move_freq_compare_func): Likewise for locals
	"mv1" and "mv2".
	(substitute_within_insn): New.
	(lra_coalesce): Strengthen locals "mv", "insn", "next" from rtx to
	rtx_insn *.  Strengthen sorted_moves from rtx * to rxt_insn **.
	Replace call to "substitute" with call to substitute_within_insn.

	* lra-constraints.c (curr_insn): Strengthen from rtx to
	rtx_insn *.
	(get_equiv_with_elimination): Likewise for param "insn".
	(match_reload): Strengthen params "before" and "after" from rtx *
	to rtx_insn **.
	(emit_spill_move): Likewise for return type.  Add a checked cast
	to rtx_insn * on result of gen_move_insn for now.
	(check_and_process_move): Likewise for local "before".  Replace
	NULL_RTX with NULL when referring to insns.
	(process_addr_reg): Strengthen params "before" and "after" from
	rtx * to rtx_insn **.
	(insert_move_for_subreg): Likewise.
	(simplify_operand_subreg): Strengthen locals "before" and "after"
	from rtx to rtx_insn *.
	(process_address_1): Strengthen params "before" and "after" from
	rtx * to rtx_insn **.  Strengthen locals "insns", "last_insn" from
	rtx to rtx_insn *.
	(process_address): Strengthen params "before" and "after" from
	rtx * to rtx_insn **.
	(emit_inc): Strengthen local "last" from rtx to rtx_insn *.
	(curr_insn_transform): Strengthen locals "before" and "after"
	from rtx to rtx_insn *.  Replace NULL_RTX with NULL when referring
	to insns.
	(loc_equivalence_callback): Update cast of "data", changing
	resulting type from rtx to rtx_insn *.
	(substitute_pseudo_within_insn): New.
	(inherit_reload_reg): Strengthen param "insn" from rtx to
	rtx_insn *; likewise for local "new_insns".  Replace NULL_RTX with
	NULL when referring to insns.  Add a checked cast to rtx_insn *
	when using usage_insn to invoke lra_update_insn_regno_info.
	(split_reg): Strengthen param "insn" from rtx to rtx_insn *;
	likewise for locals "restore", "save".  Add checked casts to
	rtx_insn * when using usage_insn to invoke
	lra_update_insn_regno_info and lra_process_new_insns.  Replace
	NULL_RTX with NULL when referring to insns.
	(split_if_necessary): Strengthen param "insn" from rtx to
	rtx_insn *.
	(update_ebb_live_info): Likewise for params "head", "tail" and local
	"prev_insn".
	(get_last_insertion_point): Likewise for return type and local "insn".
	(get_live_on_other_edges): Likewise for local "last".
	(inherit_in_ebb): Likewise for params "head", "tail" and locals
	"prev_insn", "next_insn", "restore".
	(remove_inheritance_pseudos): Likewise for local "prev_insn".
	(undo_optional_reloads): Likewise for local "insn".

	* lra-eliminations.c (lra_eliminate_regs_1): Likewise for param
	"insn".
	(lra_eliminate_regs): Replace NULL_RTX with NULL when referring to
	insns.
	(eliminate_regs_in_insn): Strengthen param "insn" from rtx to
	rtx_insn *.
	(spill_pseudos): Likewise for local "insn".
	(init_elimination): Likewise.
	(process_insn_for_elimination): Likewise for param "insn".

	* lra-lives.c (curr_insn): Likewise.;

	* lra-spills.c (assign_spill_hard_regs): Likewise for local "insn".
	(remove_pseudos): Likewise for param "insn".
	(spill_pseudos): Likewise for local "insn".
	(lra_final_code_change): Likewise for locals "insn", "curr".

	* lra.c (lra_invalidate_insn_data): Likewise for param "insn".
	(lra_set_insn_deleted): Likewise.
	(lra_delete_dead_insn): Likewise, and for local "prev".
	(new_insn_reg): Likewise for param "insn".
	(lra_set_insn_recog_data): Likewise.
	(lra_update_insn_recog_data): Likewise.
	(lra_set_used_insn_alternative): Likewise.
	(get_insn_freq): Likewise.
	(invalidate_insn_data_regno_info): Likewise.
	(lra_invalidate_insn_regno_info): Likewise.
	(lra_update_insn_regno_info): Likewise.
	(lra_constraint_insn_stack): Strengthen from vec<rtx> to
	vec<rtx_insn *>.
	(lra_push_insn_1): Strengthen param "insn" from rtx to
	rtx_insn *.
	(lra_push_insn): Likewise.
	(lra_push_insn_and_update_insn_regno_info): Likewise.
	(lra_pop_insn): Likewise for return type and local "insn".
	(push_insns): Likewise for params "from", "to", and local "insn".
	(setup_sp_offset): Likewise for params "from", "last" and locals
	"before", "insn".
	(lra_process_new_insns): Likewise for params "insn", "before",
	"after" and local "last".
	(struct sloc): Likewise for field "insn".
	(lra_former_scratch_operand_p): Likewise for param "insn".
	(remove_scratches): Likewise for locals "insn", "last".
	(check_rtl): Likewise for local "insn".
	(add_auto_inc_notes): Likewise for param "insn".
	(update_inc_notes): Likewise for local "insn".
	(lra): Replace NULL_RTX with NULL when referring to insn.
---
 gcc/lra-assigns.c      |   2 +-
 gcc/lra-coalesce.c     |  21 ++++++--
 gcc/lra-constraints.c  | 128 +++++++++++++++++++++++++++++--------------------
 gcc/lra-eliminations.c |  12 ++---
 gcc/lra-int.h          |  34 ++++++-------
 gcc/lra-lives.c        |   2 +-
 gcc/lra-spills.c       |   9 ++--
 gcc/lra.c              |  74 ++++++++++++++--------------
 8 files changed, 162 insertions(+), 120 deletions(-)

diff --git a/gcc/lra-assigns.c b/gcc/lra-assigns.c
index f7bb86b..dda0543 100644
--- a/gcc/lra-assigns.c
+++ b/gcc/lra-assigns.c
@@ -1221,7 +1221,7 @@ static void
 assign_by_spills (void)
 {
   int i, n, nfails, iter, regno, hard_regno, cost, restore_regno;
-  rtx insn;
+  rtx_insn *insn;
   bitmap_head changed_insns, do_not_assign_nonreload_pseudos;
   unsigned int u, conflict_regno;
   bitmap_iterator bi;
diff --git a/gcc/lra-coalesce.c b/gcc/lra-coalesce.c
index 350977c..70e74f3 100644
--- a/gcc/lra-coalesce.c
+++ b/gcc/lra-coalesce.c
@@ -75,8 +75,8 @@ static int *first_coalesced_pseudo, *next_coalesced_pseudo;
 static int
 move_freq_compare_func (const void *v1p, const void *v2p)
 {
-  rtx mv1 = *(const rtx *) v1p;
-  rtx mv2 = *(const rtx *) v2p;
+  rtx_insn *mv1 = *(rtx_insn * const *) v1p;
+  rtx_insn *mv2 = *(rtx_insn * const *) v2p;
   int pri1, pri2;
 
   pri1 = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (mv1));
@@ -168,6 +168,16 @@ substitute (rtx *loc)
   return res;
 }
 
+/* Specialize "substitute" for use on an insn.  This can't change
+   the insn ptr, just the contents of the insn.  */
+
+static bool
+substitute_within_insn (rtx_insn *insn)
+{
+  rtx loc = insn;
+  return substitute (&loc);
+}
+
 /* The current iteration (1, 2, ...) of the coalescing pass.  */
 int lra_coalesce_iter;
 
@@ -219,7 +229,8 @@ bool
 lra_coalesce (void)
 {
   basic_block bb;
-  rtx mv, set, insn, next, *sorted_moves;
+  rtx_insn *mv, *insn, *next, **sorted_moves;
+  rtx set;
   int i, mv_num, sregno, dregno;
   unsigned int regno;
   int coalesced_moves;
@@ -238,7 +249,7 @@ lra_coalesce (void)
   next_coalesced_pseudo = XNEWVEC (int, max_regno);
   for (i = 0; i < max_regno; i++)
     first_coalesced_pseudo[i] = next_coalesced_pseudo[i] = i;
-  sorted_moves = XNEWVEC (rtx, get_max_uid ());
+  sorted_moves = XNEWVEC (rtx_insn *, get_max_uid ());
   mv_num = 0;
   /* Collect moves.  */
   coalesced_moves = 0;
@@ -308,7 +319,7 @@ lra_coalesce (void)
 	if (INSN_P (insn)
 	    && bitmap_bit_p (&involved_insns_bitmap, INSN_UID (insn)))
 	  {
-	    if (! substitute (&insn))
+	    if (! substitute_within_insn (insn))
 	      continue;
 	    lra_update_insn_regno_info (insn);
 	    if ((set = single_set (insn)) != NULL_RTX && set_noop_p (set))
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 69ffdcd..d665a09 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -138,7 +138,7 @@ static int bb_reload_num;
 /* The current insn being processed and corresponding its single set
    (NULL otherwise), its data (basic block, the insn data, the insn
    static data, and the mode of each operand).  */
-static rtx curr_insn;
+static rtx_insn *curr_insn;
 static rtx curr_insn_set;
 static basic_block curr_bb;
 static lra_insn_recog_data_t curr_id;
@@ -381,7 +381,7 @@ get_equiv (rtx x)
    return that value after elimination for INSN, otherwise return
    X.  */
 static rtx
-get_equiv_with_elimination (rtx x, rtx insn)
+get_equiv_with_elimination (rtx x, rtx_insn *insn)
 {
   rtx res = get_equiv (x);
 
@@ -724,7 +724,7 @@ narrow_reload_pseudo_class (rtx reg, enum reg_class cl)
    matched input operands INS.  */
 static void
 match_reload (signed char out, signed char *ins, enum reg_class goal_class,
-	      rtx *before, rtx *after)
+	      rtx_insn **before, rtx_insn **after)
 {
   int i, in;
   rtx new_in_reg, new_out_reg, reg, clobber;
@@ -901,7 +901,7 @@ get_op_class (rtx op)
 /* Return generated insn mem_pseudo:=val if TO_P or val:=mem_pseudo
    otherwise.  If modes of MEM_PSEUDO and VAL are different, use
    SUBREG for VAL to make them equal.  */
-static rtx
+static rtx_insn *
 emit_spill_move (bool to_p, rtx mem_pseudo, rtx val)
 {
   if (GET_MODE (mem_pseudo) != GET_MODE (val))
@@ -922,9 +922,9 @@ emit_spill_move (bool to_p, rtx mem_pseudo, rtx val)
 	  LRA_SUBREG_P (mem_pseudo) = 1;
 	}
     }
-  return (to_p
-	  ? gen_move_insn (mem_pseudo, val)
-	  : gen_move_insn (val, mem_pseudo));
+  return as_a <rtx_insn *> (to_p
+			    ? gen_move_insn (mem_pseudo, val)
+			    : gen_move_insn (val, mem_pseudo));
 }
 
 /* Process a special case insn (register move), return true if we
@@ -936,7 +936,8 @@ static bool
 check_and_process_move (bool *change_p, bool *sec_mem_p ATTRIBUTE_UNUSED)
 {
   int sregno, dregno;
-  rtx dest, src, dreg, sreg, old_sreg, new_reg, before, scratch_reg;
+  rtx dest, src, dreg, sreg, old_sreg, new_reg, scratch_reg;
+  rtx_insn *before;
   enum reg_class dclass, sclass, secondary_class;
   enum machine_mode sreg_mode;
   secondary_reload_info sri;
@@ -1062,7 +1063,7 @@ check_and_process_move (bool *change_p, bool *sec_mem_p ATTRIBUTE_UNUSED)
     }
   before = get_insns ();
   end_sequence ();
-  lra_process_new_insns (curr_insn, before, NULL_RTX, "Inserting the move");
+  lra_process_new_insns (curr_insn, before, NULL, "Inserting the move");
   if (new_reg != NULL_RTX)
     {
       if (GET_CODE (src) == SUBREG)
@@ -1136,7 +1137,8 @@ static int curr_swapped;
    automodified value; handle that case by adding the required output
    reloads to list AFTER.  Return true if the RTL was changed.  */
 static bool
-process_addr_reg (rtx *loc, rtx *before, rtx *after, enum reg_class cl)
+process_addr_reg (rtx *loc, rtx_insn **before, rtx_insn **after,
+		  enum reg_class cl)
 {
   int regno;
   enum reg_class rclass, new_class;
@@ -1212,7 +1214,8 @@ process_addr_reg (rtx *loc, rtx *before, rtx *after, enum reg_class cl)
    the insn to be inserted after curr insn.  ORIGREG and NEWREG
    are the original reg and new reg for reload.  */
 static void
-insert_move_for_subreg (rtx *before, rtx *after, rtx origreg, rtx newreg)
+insert_move_for_subreg (rtx_insn **before, rtx_insn **after, rtx origreg,
+			rtx newreg)
 {
   if (before)
     {
@@ -1238,14 +1241,14 @@ static bool
 simplify_operand_subreg (int nop, enum machine_mode reg_mode)
 {
   int hard_regno;
-  rtx before, after;
+  rtx_insn *before, *after;
   enum machine_mode mode;
   rtx reg, new_reg;
   rtx operand = *curr_id->operand_loc[nop];
   enum reg_class regclass;
   enum op_type type;
 
-  before = after = NULL_RTX;
+  before = after = NULL;
 
   if (GET_CODE (operand) != SUBREG)
     return false;
@@ -2791,7 +2794,7 @@ equiv_address_substitution (struct address_info *ad)
    To do all necessary transformations use function
    process_address.  */
 static bool
-process_address_1 (int nop, rtx *before, rtx *after)
+process_address_1 (int nop, rtx_insn **before, rtx_insn **after)
 {
   struct address_info ad;
   rtx new_reg;
@@ -2929,7 +2932,8 @@ process_address_1 (int nop, rtx *before, rtx *after)
     {
       int regno;
       enum reg_class cl;
-      rtx set, insns, last_insn;
+      rtx set;
+      rtx_insn *insns, *last_insn;
       /* base + disp => new base, cases (1) and (3) above.  */
       /* Another option would be to reload the displacement into an
 	 index register.  However, postreload has code to optimize
@@ -2994,7 +2998,7 @@ process_address_1 (int nop, rtx *before, rtx *after)
 /* Do address reloads until it is necessary.  Use process_address_1 as
    a helper function.  Return true for any RTL changes.  */
 static bool
-process_address (int nop, rtx *before, rtx *after)
+process_address (int nop, rtx_insn **before, rtx_insn **after)
 {
   bool res = false;
 
@@ -3021,7 +3025,7 @@ emit_inc (enum reg_class new_rclass, rtx in, rtx value, int inc_amount)
   /* Nonzero if increment after copying.  */
   int post = (GET_CODE (value) == POST_DEC || GET_CODE (value) == POST_INC
 	      || GET_CODE (value) == POST_MODIFY);
-  rtx last;
+  rtx_insn *last;
   rtx inc;
   rtx add_insn;
   int code;
@@ -3181,7 +3185,7 @@ curr_insn_transform (void)
   int commutative;
   signed char goal_alt_matched[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
   signed char match_inputs[MAX_RECOG_OPERANDS + 1];
-  rtx before, after;
+  rtx_insn *before, *after;
   bool alt_p = false;
   /* Flag that the insn has been changed through a transformation.  */
   bool change_p;
@@ -3279,7 +3283,7 @@ curr_insn_transform (void)
 
   /* Reload address registers and displacements.  We do it before
      finding an alternative because of memory constraints.  */
-  before = after = NULL_RTX;
+  before = after = NULL;
   for (i = 0; i < n_operands; i++)
     if (! curr_static_id->operand[i].is_operator
 	&& process_address (i, &before, &after))
@@ -3398,7 +3402,7 @@ curr_insn_transform (void)
 	     secondary memory moves we can not reuse the original
 	     insn.  */
 	  after = emit_spill_move (false, new_reg, dest);
-	  lra_process_new_insns (curr_insn, NULL_RTX, after,
+	  lra_process_new_insns (curr_insn, NULL, after,
 				 "Inserting the sec. move");
 	  /* We may have non null BEFORE here (e.g. after address
 	     processing.  */
@@ -3407,14 +3411,14 @@ curr_insn_transform (void)
 	  emit_insn (before);
 	  before = get_insns ();
 	  end_sequence ();
-	  lra_process_new_insns (curr_insn, before, NULL_RTX, "Changing on");
+	  lra_process_new_insns (curr_insn, before, NULL, "Changing on");
 	  lra_set_insn_deleted (curr_insn);
 	}
       else if (dest == rld)
         {
 	  *curr_id->operand_loc[0] = new_reg;
 	  after = emit_spill_move (false, new_reg, dest);
-	  lra_process_new_insns (curr_insn, NULL_RTX, after,
+	  lra_process_new_insns (curr_insn, NULL, after,
 				 "Inserting the sec. move");
 	}
       else
@@ -3426,7 +3430,7 @@ curr_insn_transform (void)
 	  emit_insn (before);
 	  before = get_insns ();
 	  end_sequence ();
-	  lra_process_new_insns (curr_insn, before, NULL_RTX,
+	  lra_process_new_insns (curr_insn, before, NULL,
 				 "Inserting the sec. move");
 	}
       lra_update_insn_regno_info (curr_insn);
@@ -3878,7 +3882,7 @@ loc_equivalence_callback (rtx loc, const_rtx, void *data)
     return NULL_RTX;
 
   rtx subst = (data == NULL
-	       ? get_equiv (loc) : get_equiv_with_elimination (loc, (rtx) data));
+	       ? get_equiv (loc) : get_equiv_with_elimination (loc, (rtx_insn *) data));
   if (subst != loc)
     return subst;
 
@@ -4406,6 +4410,16 @@ substitute_pseudo (rtx *loc, int old_regno, rtx new_reg)
   return result;
 }
 
+/* Call substitute_pseudo within an insn.  This won't update the insn ptr,
+   just the contents of the insn.  */
+
+static bool
+substitute_pseudo_within_insn (rtx_insn *insn, int old_regno, rtx new_reg)
+{
+  rtx loc = insn;
+  return substitute_pseudo (&loc, old_regno, new_reg);
+}
+
 /* Return first non-debug insn in list USAGE_INSNS.  */
 static rtx
 skip_usage_debug_insns (rtx usage_insns)
@@ -4477,14 +4491,15 @@ static bitmap_head check_only_regs;
    class of ORIGINAL REGNO.  */
 static bool
 inherit_reload_reg (bool def_p, int original_regno,
-		    enum reg_class cl, rtx insn, rtx next_usage_insns)
+		    enum reg_class cl, rtx_insn *insn, rtx next_usage_insns)
 {
   if (optimize_function_for_size_p (cfun))
     return false;
 
   enum reg_class rclass = lra_get_allocno_class (original_regno);
   rtx original_reg = regno_reg_rtx[original_regno];
-  rtx new_reg, new_insns, usage_insn;
+  rtx new_reg, usage_insn;
+  rtx_insn *new_insns;
 
   lra_assert (! usage_insns[original_regno].after_p);
   if (lra_dump_file != NULL)
@@ -4565,7 +4580,7 @@ inherit_reload_reg (bool def_p, int original_regno,
 	}
       return false;
     }
-  substitute_pseudo (&insn, original_regno, new_reg);
+  substitute_pseudo_within_insn (insn, original_regno, new_reg);
   lra_update_insn_regno_info (insn);
   if (! def_p)
     /* We now have a new usage insn for original regno.  */
@@ -4578,10 +4593,10 @@ inherit_reload_reg (bool def_p, int original_regno,
   bitmap_set_bit (&check_only_regs, original_regno);
   bitmap_set_bit (&lra_inheritance_pseudos, REGNO (new_reg));
   if (def_p)
-    lra_process_new_insns (insn, NULL_RTX, new_insns,
+    lra_process_new_insns (insn, NULL, new_insns,
 			   "Add original<-inheritance");
   else
-    lra_process_new_insns (insn, new_insns, NULL_RTX,
+    lra_process_new_insns (insn, new_insns, NULL,
 			   "Add inheritance<-original");
   while (next_usage_insns != NULL_RTX)
     {
@@ -4598,7 +4613,7 @@ inherit_reload_reg (bool def_p, int original_regno,
 	  next_usage_insns = XEXP (next_usage_insns, 1);
 	}
       substitute_pseudo (&usage_insn, original_regno, new_reg);
-      lra_update_insn_regno_info (usage_insn);
+      lra_update_insn_regno_info (as_a <rtx_insn *> (usage_insn));
       if (lra_dump_file != NULL)
 	{
 	  fprintf (lra_dump_file,
@@ -4746,12 +4761,14 @@ choose_split_class (enum reg_class allocno_class,
    if BEFORE_P is true.	 Return true if we succeed in such
    transformation.  */
 static bool
-split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
+split_reg (bool before_p, int original_regno, rtx_insn *insn,
+	   rtx next_usage_insns)
 {
   enum reg_class rclass;
   rtx original_reg;
   int hard_regno, nregs;
-  rtx new_reg, save, restore, usage_insn;
+  rtx new_reg, usage_insn;
+  rtx_insn *restore, *save;
   bool after_p;
   bool call_save_p;
 
@@ -4857,7 +4874,7 @@ split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
       lra_assert (DEBUG_INSN_P (usage_insn));
       next_usage_insns = XEXP (next_usage_insns, 1);
       substitute_pseudo (&usage_insn, original_regno, new_reg);
-      lra_update_insn_regno_info (usage_insn);
+      lra_update_insn_regno_info (as_a <rtx_insn *> (usage_insn));
       if (lra_dump_file != NULL)
 	{
 	  fprintf (lra_dump_file, "    Split reuse change %d->%d:\n",
@@ -4867,12 +4884,13 @@ split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
     }
   lra_assert (NOTE_P (usage_insn) || NONDEBUG_INSN_P (usage_insn));
   lra_assert (usage_insn != insn || (after_p && before_p));
-  lra_process_new_insns (usage_insn, after_p ? NULL_RTX : restore,
-			 after_p ? restore : NULL_RTX,
+  lra_process_new_insns (as_a <rtx_insn *> (usage_insn),
+			 after_p ? NULL : restore,
+			 after_p ? restore : NULL,
 			 call_save_p
 			 ?  "Add reg<-save" : "Add reg<-split");
-  lra_process_new_insns (insn, before_p ? save : NULL_RTX,
-			 before_p ? NULL_RTX : save,
+  lra_process_new_insns (insn, before_p ? save : NULL,
+			 before_p ? NULL : save,
 			 call_save_p
 			 ?  "Add save<-reg" : "Add split<-reg");
   if (nregs > 1)
@@ -4898,7 +4916,7 @@ split_reg (bool before_p, int original_regno, rtx insn, rtx next_usage_insns)
 static bool
 split_if_necessary (int regno, enum machine_mode mode,
 		    HARD_REG_SET potential_reload_hard_regs,
-		    bool before_p, rtx insn, int max_uid)
+		    bool before_p, rtx_insn *insn, int max_uid)
 {
   bool res = false;
   int i, nregs = 1;
@@ -4928,12 +4946,13 @@ static bitmap_head live_regs;
    inheritance/split transformation.  The function removes dead moves
    too.	 */
 static void
-update_ebb_live_info (rtx head, rtx tail)
+update_ebb_live_info (rtx_insn *head, rtx_insn *tail)
 {
   unsigned int j;
   int i, regno;
   bool live_p;
-  rtx prev_insn, set;
+  rtx_insn *prev_insn;
+  rtx set;
   bool remove_p;
   basic_block last_bb, prev_bb, curr_bb;
   bitmap_iterator bi;
@@ -5068,10 +5087,10 @@ add_to_inherit (int regno, rtx insns)
 
 /* Return the last non-debug insn in basic block BB, or the block begin
    note if none.  */
-static rtx
+static rtx_insn *
 get_last_insertion_point (basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   FOR_BB_INSNS_REVERSE (bb, insn)
     if (NONDEBUG_INSN_P (insn) || NOTE_INSN_BASIC_BLOCK_P (insn))
@@ -5084,7 +5103,7 @@ get_last_insertion_point (basic_block bb)
 static void
 get_live_on_other_edges (basic_block from, basic_block to, bitmap res)
 {
-  rtx last;
+  rtx_insn *last;
   struct lra_insn_reg *reg;
   edge e;
   edge_iterator ei;
@@ -5128,11 +5147,12 @@ static const int max_small_class_regs_num = 2;
    splitting even more but it is to expensive and the current approach
    works well enough.  */
 static bool
-inherit_in_ebb (rtx head, rtx tail)
+inherit_in_ebb (rtx_insn *head, rtx_insn *tail)
 {
   int i, src_regno, dst_regno, nregs;
   bool change_p, succ_p, update_reloads_num_p;
-  rtx prev_insn, next_usage_insns, set, last_insn;
+  rtx_insn *prev_insn, *last_insn;
+  rtx next_usage_insns, set;
   enum reg_class cl;
   struct lra_insn_reg *reg;
   basic_block last_processed_bb, curr_bb = NULL;
@@ -5332,7 +5352,8 @@ inherit_in_ebb (rtx head, rtx tail)
 	      change_p = true;
 	  if (CALL_P (curr_insn))
 	    {
-	      rtx cheap, pat, dest, restore;
+	      rtx cheap, pat, dest;
+	      rtx_insn *restore;
 	      int regno, hard_regno;
 
 	      calls_num++;
@@ -5631,7 +5652,8 @@ remove_inheritance_pseudos (bitmap remove_pseudos)
 {
   basic_block bb;
   int regno, sregno, prev_sregno, dregno, restore_regno;
-  rtx set, prev_set, prev_insn;
+  rtx set, prev_set;
+  rtx_insn *prev_insn;
   bool change_p, done_p;
 
   change_p = ! bitmap_empty_p (remove_pseudos);
@@ -5751,8 +5773,8 @@ remove_inheritance_pseudos (bitmap remove_pseudos)
 		    {
 		      if (change_p && bitmap_bit_p (remove_pseudos, regno))
 			{
-			  substitute_pseudo (&curr_insn, regno,
-					     regno_reg_rtx[restore_regno]);
+			  substitute_pseudo_within_insn (
+			    curr_insn, regno, regno_reg_rtx[restore_regno]);
 			  restored_regs_p = true;
 			}
 		      else
@@ -5793,7 +5815,8 @@ undo_optional_reloads (void)
   bool change_p, keep_p;
   unsigned int regno, uid;
   bitmap_iterator bi, bi2;
-  rtx insn, set, src, dest;
+  rtx_insn *insn;
+  rtx set, src, dest;
   bitmap_head removed_optional_reload_pseudos, insn_bitmap;
 
   bitmap_initialize (&removed_optional_reload_pseudos, &reg_obstack);
@@ -5874,8 +5897,9 @@ undo_optional_reloads (void)
 		 we remove the inheritance pseudo and the optional
 		 reload.  */
 	    }
-	  substitute_pseudo (&insn, regno,
-			     regno_reg_rtx[lra_reg_info[regno].restore_regno]);
+	  substitute_pseudo_within_insn (
+	    insn, regno,
+	    regno_reg_rtx[lra_reg_info[regno].restore_regno]);
 	  lra_update_insn_regno_info (insn);
 	  if (lra_dump_file != NULL)
 	    {
diff --git a/gcc/lra-eliminations.c b/gcc/lra-eliminations.c
index 2787820..2113a88 100644
--- a/gcc/lra-eliminations.c
+++ b/gcc/lra-eliminations.c
@@ -302,7 +302,7 @@ get_elimination (rtx reg)
    If we make full substitution to SP for non-null INSN, add the insn
    sp offset.  */
 rtx
-lra_eliminate_regs_1 (rtx insn, rtx x, enum machine_mode mem_mode,
+lra_eliminate_regs_1 (rtx_insn *insn, rtx x, enum machine_mode mem_mode,
 		      bool subst_p, bool update_p, bool full_p)
 {
   enum rtx_code code = GET_CODE (x);
@@ -657,7 +657,7 @@ rtx
 lra_eliminate_regs (rtx x, enum machine_mode mem_mode,
 		    rtx insn ATTRIBUTE_UNUSED)
 {
-  return lra_eliminate_regs_1 (NULL_RTX, x, mem_mode, true, false, true);
+  return lra_eliminate_regs_1 (NULL, x, mem_mode, true, false, true);
 }
 
 /* Stack pointer offset before the current insn relative to one at the
@@ -848,7 +848,7 @@ remove_reg_equal_offset_note (rtx insn, rtx what)
    previously used) in future.  */
 
 static void
-eliminate_regs_in_insn (rtx insn, bool replace_p, bool first_p)
+eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p)
 {
   int icode = recog_memoized (insn);
   rtx old_set = single_set (insn);
@@ -1086,7 +1086,7 @@ spill_pseudos (HARD_REG_SET set)
 {
   int i;
   bitmap_head to_process;
-  rtx insn;
+  rtx_insn *insn;
 
   if (hard_reg_set_empty_p (set))
     return;
@@ -1290,7 +1290,7 @@ init_elimination (void)
 {
   bool stop_to_sp_elimination_p;
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
   struct elim_table *ep;
 
   init_elim_table ();
@@ -1339,7 +1339,7 @@ lra_eliminate_reg_if_possible (rtx *loc)
    the insn for subsequent processing in the constraint pass, update
    the insn info.  */
 static void
-process_insn_for_elimination (rtx insn, bool final_p, bool first_p)
+process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p)
 {
   eliminate_regs_in_insn (insn, final_p, first_p);
   if (! final_p)
diff --git a/gcc/lra-int.h b/gcc/lra-int.h
index 41c9849..2e4f870 100644
--- a/gcc/lra-int.h
+++ b/gcc/lra-int.h
@@ -214,7 +214,7 @@ struct lra_insn_recog_data
   /* SP offset before the insn relative to one at the func start.  */
   HOST_WIDE_INT sp_offset;
   /* The insn itself.  */
-  rtx insn;
+  rtx_insn *insn;
   /* Common data for insns with the same ICODE.  Asm insns (their
      ICODE is negative) do not share such structures.  */
   struct lra_static_insn_data *insn_static_data;
@@ -276,38 +276,39 @@ extern lra_insn_recog_data_t *lra_insn_recog_data;
 
 extern int lra_curr_reload_num;
 
-extern void lra_push_insn (rtx);
+extern void lra_push_insn (rtx_insn *);
 extern void lra_push_insn_by_uid (unsigned int);
-extern void lra_push_insn_and_update_insn_regno_info (rtx);
-extern rtx lra_pop_insn (void);
+extern void lra_push_insn_and_update_insn_regno_info (rtx_insn *);
+extern rtx_insn *lra_pop_insn (void);
 extern unsigned int lra_insn_stack_length (void);
 
 extern rtx lra_create_new_reg_with_unique_value (enum machine_mode, rtx,
 						 enum reg_class, const char *);
 extern void lra_set_regno_unique_value (int);
-extern void lra_invalidate_insn_data (rtx);
-extern void lra_set_insn_deleted (rtx);
-extern void lra_delete_dead_insn (rtx);
+extern void lra_invalidate_insn_data (rtx_insn *);
+extern void lra_set_insn_deleted (rtx_insn *);
+extern void lra_delete_dead_insn (rtx_insn *);
 extern void lra_emit_add (rtx, rtx, rtx);
 extern void lra_emit_move (rtx, rtx);
 extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
 
-extern void lra_process_new_insns (rtx, rtx, rtx, const char *);
+extern void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *,
+				   const char *);
 
-extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx);
-extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx);
-extern void lra_set_used_insn_alternative (rtx, int);
+extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *);
+extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *);
+extern void lra_set_used_insn_alternative (rtx_insn *, int);
 extern void lra_set_used_insn_alternative_by_uid (int, int);
 
-extern void lra_invalidate_insn_regno_info (rtx);
-extern void lra_update_insn_regno_info (rtx);
+extern void lra_invalidate_insn_regno_info (rtx_insn *);
+extern void lra_update_insn_regno_info (rtx_insn *);
 extern struct lra_insn_reg *lra_get_insn_regs (int);
 
 extern void lra_free_copies (void);
 extern void lra_create_copy (int, int, int);
 extern lra_copy_t lra_get_copy (int);
 extern bool lra_former_scratch_p (int);
-extern bool lra_former_scratch_operand_p (rtx, int);
+extern bool lra_former_scratch_operand_p (rtx_insn *, int);
 
 extern int lra_new_regno_start;
 extern int lra_constraint_new_regno_start;
@@ -380,7 +381,8 @@ extern void lra_final_code_change (void);
 
 extern void lra_debug_elim_table (void);
 extern int lra_get_elimination_hard_regno (int);
-extern rtx lra_eliminate_regs_1 (rtx, rtx, enum machine_mode, bool, bool, bool);
+extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, enum machine_mode, bool,
+				 bool, bool);
 extern void lra_eliminate (bool, bool);
 
 extern void lra_eliminate_reg_if_possible (rtx *);
@@ -446,7 +448,7 @@ lra_update_operator_dups (lra_insn_recog_data_t id)
 
 /* Return info about INSN.  Set up the info if it is not done yet.  */
 static inline lra_insn_recog_data_t
-lra_get_insn_recog_data (rtx insn)
+lra_get_insn_recog_data (rtx_insn *insn)
 {
   lra_insn_recog_data_t data;
   unsigned int uid = INSN_UID (insn);
diff --git a/gcc/lra-lives.c b/gcc/lra-lives.c
index 8444ade..f2462ec 100644
--- a/gcc/lra-lives.c
+++ b/gcc/lra-lives.c
@@ -358,7 +358,7 @@ mark_regno_dead (int regno, enum machine_mode mode, int point)
 }
 
 /* Insn currently scanned.  */
-static rtx curr_insn;
+static rtx_insn *curr_insn;
 /* The insn data.  */
 static lra_insn_recog_data_t curr_id;
 /* The insn static data.  */
diff --git a/gcc/lra-spills.c b/gcc/lra-spills.c
index 50f63fc..a6fb65b 100644
--- a/gcc/lra-spills.c
+++ b/gcc/lra-spills.c
@@ -256,7 +256,8 @@ assign_spill_hard_regs (int *pseudo_regnos, int n)
   enum reg_class rclass, spill_class;
   enum machine_mode mode;
   lra_live_range_t r;
-  rtx insn, set;
+  rtx_insn *insn;
+  rtx set;
   basic_block bb;
   HARD_REG_SET conflict_hard_regs;
   bitmap_head ok_insn_bitmap;
@@ -411,7 +412,7 @@ assign_stack_slot_num_and_sort_pseudos (int *pseudo_regnos, int n)
    corresponding memory or spilled hard reg.  Ignore spilled pseudos
    created from the scratches.	*/
 static void
-remove_pseudos (rtx *loc, rtx insn)
+remove_pseudos (rtx *loc, rtx_insn *insn)
 {
   int i;
   rtx hard_reg;
@@ -463,7 +464,7 @@ static void
 spill_pseudos (void)
 {
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
   int i;
   bitmap_head spilled_pseudos, changed_insns;
 
@@ -679,7 +680,7 @@ lra_final_code_change (void)
 {
   int i, hard_regno;
   basic_block bb;
-  rtx insn, curr;
+  rtx_insn *insn, *curr;
   int max_regno = max_reg_num ();
 
   for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
diff --git a/gcc/lra.c b/gcc/lra.c
index ecec890..a97ec77 100644
--- a/gcc/lra.c
+++ b/gcc/lra.c
@@ -125,8 +125,9 @@ HARD_REG_SET lra_no_alloc_regs;
 static int get_new_reg_value (void);
 static void expand_reg_info (void);
 static void invalidate_insn_recog_data (int);
-static int get_insn_freq (rtx);
-static void invalidate_insn_data_regno_info (lra_insn_recog_data_t, rtx, int);
+static int get_insn_freq (rtx_insn *);
+static void invalidate_insn_data_regno_info (lra_insn_recog_data_t,
+					     rtx_insn *, int);
 
 /* Expand all regno related info needed for LRA.  */
 static void
@@ -210,7 +211,7 @@ lra_set_regno_unique_value (int regno)
 /* Invalidate INSN related info used by LRA.  The info should never be
    used after that.  */
 void
-lra_invalidate_insn_data (rtx insn)
+lra_invalidate_insn_data (rtx_insn *insn)
 {
   lra_invalidate_insn_regno_info (insn);
   invalidate_insn_recog_data (INSN_UID (insn));
@@ -219,7 +220,7 @@ lra_invalidate_insn_data (rtx insn)
 /* Mark INSN deleted and invalidate the insn related info used by
    LRA.	 */
 void
-lra_set_insn_deleted (rtx insn)
+lra_set_insn_deleted (rtx_insn *insn)
 {
   lra_invalidate_insn_data (insn);
   SET_INSN_DELETED (insn);
@@ -228,9 +229,9 @@ lra_set_insn_deleted (rtx insn)
 /* Delete an unneeded INSN and any previous insns who sole purpose is
    loading data that is dead in INSN.  */
 void
-lra_delete_dead_insn (rtx insn)
+lra_delete_dead_insn (rtx_insn *insn)
 {
-  rtx prev = prev_real_insn (insn);
+  rtx_insn *prev = prev_real_insn (insn);
   rtx prev_dest;
 
   /* If the previous insn sets a register that dies in our insn,
@@ -503,7 +504,8 @@ init_insn_regs (void)
    in the insn (EARLY_CLOBBER), and reference to the next insn reg
    info (NEXT).	 */
 static struct lra_insn_reg *
-new_insn_reg (rtx insn, int regno, enum op_type type, enum machine_mode mode,
+new_insn_reg (rtx_insn *insn, int regno, enum op_type type,
+	      enum machine_mode mode,
 	      bool subreg_p, bool early_clobber, struct lra_insn_reg *next)
 {
   struct lra_insn_reg *ir;
@@ -1041,7 +1043,7 @@ collect_non_operand_hard_regs (rtx *x, lra_insn_recog_data_t data,
 /* Set up and return info about INSN.  Set up the info if it is not set up
    yet.	 */
 lra_insn_recog_data_t
-lra_set_insn_recog_data (rtx insn)
+lra_set_insn_recog_data (rtx_insn *insn)
 {
   lra_insn_recog_data_t data;
   int i, n, icode;
@@ -1267,7 +1269,7 @@ invalidate_insn_recog_data (int uid)
 /* Update all the insn info about INSN.	 It is usually called when
    something in the insn was changed.  Return the updated info.	 */
 lra_insn_recog_data_t
-lra_update_insn_recog_data (rtx insn)
+lra_update_insn_recog_data (rtx_insn *insn)
 {
   lra_insn_recog_data_t data;
   int n;
@@ -1371,7 +1373,7 @@ lra_update_insn_recog_data (rtx insn)
 
 /* Set up that INSN is using alternative ALT now.  */
 void
-lra_set_used_insn_alternative (rtx insn, int alt)
+lra_set_used_insn_alternative (rtx_insn *insn, int alt)
 {
   lra_insn_recog_data_t data;
 
@@ -1664,7 +1666,7 @@ add_regs_to_insn_regno_info (lra_insn_recog_data_t data, rtx x, int uid,
 
 /* Return execution frequency of INSN.	*/
 static int
-get_insn_freq (rtx insn)
+get_insn_freq (rtx_insn *insn)
 {
   basic_block bb = BLOCK_FOR_INSN (insn);
 
@@ -1675,7 +1677,7 @@ get_insn_freq (rtx insn)
 /* Invalidate all reg info of INSN with DATA and execution frequency
    FREQ.  Update common info about the invalidated registers.  */
 static void
-invalidate_insn_data_regno_info (lra_insn_recog_data_t data, rtx insn,
+invalidate_insn_data_regno_info (lra_insn_recog_data_t data, rtx_insn *insn,
 				 int freq)
 {
   int uid;
@@ -1704,7 +1706,7 @@ invalidate_insn_data_regno_info (lra_insn_recog_data_t data, rtx insn,
 /* Invalidate all reg info of INSN.  Update common info about the
    invalidated registers.  */
 void
-lra_invalidate_insn_regno_info (rtx insn)
+lra_invalidate_insn_regno_info (rtx_insn *insn)
 {
   invalidate_insn_data_regno_info (lra_get_insn_recog_data (insn), insn,
 				   get_insn_freq (insn));
@@ -1729,7 +1731,7 @@ setup_insn_reg_info (lra_insn_recog_data_t data, int freq)
 /* Set up insn reg info of INSN.  Update common reg info from reg info
    of INSN.  */
 void
-lra_update_insn_regno_info (rtx insn)
+lra_update_insn_regno_info (rtx_insn *insn)
 {
   int i, uid, freq;
   lra_insn_recog_data_t data;
@@ -1773,13 +1775,13 @@ lra_get_insn_regs (int uid)
 static sbitmap lra_constraint_insn_stack_bitmap;
 
 /* The stack itself.  */
-vec<rtx> lra_constraint_insn_stack;
+vec<rtx_insn *> lra_constraint_insn_stack;
 
 /* Put INSN on the stack.  If ALWAYS_UPDATE is true, always update the reg
    info for INSN, otherwise only update it if INSN is not already on the
    stack.  */
 static inline void
-lra_push_insn_1 (rtx insn, bool always_update)
+lra_push_insn_1 (rtx_insn *insn, bool always_update)
 {
   unsigned int uid = INSN_UID (insn);
   if (always_update)
@@ -1797,14 +1799,14 @@ lra_push_insn_1 (rtx insn, bool always_update)
 
 /* Put INSN on the stack.  */
 void
-lra_push_insn (rtx insn)
+lra_push_insn (rtx_insn *insn)
 {
   lra_push_insn_1 (insn, false);
 }
 
 /* Put INSN on the stack and update its reg info.  */
 void
-lra_push_insn_and_update_insn_regno_info (rtx insn)
+lra_push_insn_and_update_insn_regno_info (rtx_insn *insn)
 {
   lra_push_insn_1 (insn, true);
 }
@@ -1817,10 +1819,10 @@ lra_push_insn_by_uid (unsigned int uid)
 }
 
 /* Take the last-inserted insns off the stack and return it.  */
-rtx
+rtx_insn *
 lra_pop_insn (void)
 {
-  rtx insn = lra_constraint_insn_stack.pop ();
+  rtx_insn *insn = lra_constraint_insn_stack.pop ();
   bitmap_clear_bit (lra_constraint_insn_stack_bitmap, INSN_UID (insn));
   return insn;
 }
@@ -1834,9 +1836,9 @@ lra_insn_stack_length (void)
 
 /* Push insns FROM to TO (excluding it) going in reverse order.	 */
 static void
-push_insns (rtx from, rtx to)
+push_insns (rtx_insn *from, rtx_insn *to)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (from == NULL_RTX)
     return;
@@ -1849,13 +1851,13 @@ push_insns (rtx from, rtx to)
    taken from the next BB insn after LAST or zero if there in such
    insn.  */
 static void
-setup_sp_offset (rtx from, rtx last)
+setup_sp_offset (rtx_insn *from, rtx_insn *last)
 {
-  rtx before = next_nonnote_insn_bb (last);
+  rtx_insn *before = next_nonnote_insn_bb (last);
   HOST_WIDE_INT offset = (before == NULL_RTX || ! INSN_P (before)
 			  ? 0 : lra_get_insn_recog_data (before)->sp_offset);
 
-  for (rtx insn = from; insn != NEXT_INSN (last); insn = NEXT_INSN (insn))
+  for (rtx_insn *insn = from; insn != NEXT_INSN (last); insn = NEXT_INSN (insn))
     lra_get_insn_recog_data (insn)->sp_offset = offset;
 }
 
@@ -1863,9 +1865,10 @@ setup_sp_offset (rtx from, rtx last)
    insns onto the stack.  Print about emitting the insns with
    TITLE.  */
 void
-lra_process_new_insns (rtx insn, rtx before, rtx after, const char *title)
+lra_process_new_insns (rtx_insn *insn, rtx_insn *before, rtx_insn *after,
+		       const char *title)
 {
-  rtx last;
+  rtx_insn *last;
 
   if (before == NULL_RTX && after == NULL_RTX)
     return;
@@ -1915,7 +1918,7 @@ lra_process_new_insns (rtx insn, rtx before, rtx after, const char *title)
 /* Description of location of a former scratch operand.	 */
 struct sloc
 {
-  rtx insn; /* Insn where the scratch was.  */
+  rtx_insn *insn; /* Insn where the scratch was.  */
   int nop;  /* Number of the operand which was a scratch.  */
 };
 
@@ -1939,7 +1942,7 @@ lra_former_scratch_p (int regno)
 
 /* Return true if the operand NOP of INSN is a former scratch.	*/
 bool
-lra_former_scratch_operand_p (rtx insn, int nop)
+lra_former_scratch_operand_p (rtx_insn *insn, int nop)
 {
   return bitmap_bit_p (&scratch_operand_bitmap,
 		       INSN_UID (insn) * MAX_RECOG_OPERANDS + nop) != 0;
@@ -1952,7 +1955,8 @@ remove_scratches (void)
   int i;
   bool insn_changed_p;
   basic_block bb;
-  rtx insn, reg;
+  rtx_insn *insn;
+  rtx reg;
   sloc_t loc;
   lra_insn_recog_data_t id;
   struct lra_static_insn_data *static_id;
@@ -2003,7 +2007,7 @@ restore_scratches (void)
   int regno;
   unsigned i;
   sloc_t loc;
-  rtx last = NULL_RTX;
+  rtx_insn *last = NULL;
   lra_insn_recog_data_t id = NULL;
 
   for (i = 0; scratches.iterate (i, &loc); i++)
@@ -2046,7 +2050,7 @@ static void
 check_rtl (bool final_p)
 {
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
 
   lra_assert (! final_p || reload_completed);
   FOR_EACH_BB_FN (bb, cfun)
@@ -2128,7 +2132,7 @@ has_nonexceptional_receiver (void)
 
 /* Process recursively X of INSN and add REG_INC notes if necessary.  */
 static void
-add_auto_inc_notes (rtx insn, rtx x)
+add_auto_inc_notes (rtx_insn *insn, rtx x)
 {
   enum rtx_code code = GET_CODE (x);
   const char *fmt;
@@ -2163,7 +2167,7 @@ update_inc_notes (void)
 {
   rtx *pnote;
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
 
   FOR_EACH_BB_FN (bb, cfun)
     FOR_BB_INSNS (bb, insn)
@@ -2308,7 +2312,7 @@ lra (FILE *f)
   lra_live_ranges_init ();
   lra_constraints_init ();
   lra_curr_reload_num = 0;
-  push_insns (get_last_insn (), NULL_RTX);
+  push_insns (get_last_insn (), NULL);
   /* It is needed for the 1st coalescing.  */
   lra_constraint_new_insn_uid_start = get_max_uid ();
   bitmap_initialize (&lra_inheritance_pseudos, &reg_obstack);
-- 
1.8.5.3

Re: [PATCH 092/236] lra: use rtx_insn

[Jeff Law]

On 08/06/14 11:21, David Malcolm wrote:
> gcc/
> 	* lra-int.h (struct lra_insn_recog_data): Strengthen field "insn"
> 	from rtx to rtx_insn *.
> 	(lra_push_insn): Likewise for 1st param.
> 	(lra_push_insn_and_update_insn_regno_info): Likewise.
> 	(lra_pop_insn): Likewise for return type.
> 	(lra_invalidate_insn_data): Likewise for 1st param.
> 	(lra_set_insn_deleted): Likewise.
> 	(lra_delete_dead_insn): Likewise.
> 	(lra_process_new_insns): Likewise for first 3 params.
> 	(lra_set_insn_recog_data): Likewise for 1st param.
> 	(lra_update_insn_recog_data): Likewise.
> 	(lra_set_used_insn_alternative): Likewise.
> 	(lra_invalidate_insn_regno_info): Likewise.
> 	(lra_update_insn_regno_info): Likewise.
> 	(lra_former_scratch_operand_p): Likewise.
> 	(lra_eliminate_regs_1): Likewise.
> 	(lra_get_insn_recog_data): Likewise.
>
> 	* lra-assigns.c (assign_by_spills): Strengthen local "insn" from
> 	rtx to rtx_insn *.
>
> 	* lra-coalesce.c (move_freq_compare_func): Likewise for locals
> 	"mv1" and "mv2".
> 	(substitute_within_insn): New.
> 	(lra_coalesce): Strengthen locals "mv", "insn", "next" from rtx to
> 	rtx_insn *.  Strengthen sorted_moves from rtx * to rxt_insn **.
> 	Replace call to "substitute" with call to substitute_within_insn.
>
> 	* lra-constraints.c (curr_insn): Strengthen from rtx to
> 	rtx_insn *.
> 	(get_equiv_with_elimination): Likewise for param "insn".
> 	(match_reload): Strengthen params "before" and "after" from rtx *
> 	to rtx_insn **.
> 	(emit_spill_move): Likewise for return type.  Add a checked cast
> 	to rtx_insn * on result of gen_move_insn for now.
> 	(check_and_process_move): Likewise for local "before".  Replace
> 	NULL_RTX with NULL when referring to insns.
> 	(process_addr_reg): Strengthen params "before" and "after" from
> 	rtx * to rtx_insn **.
> 	(insert_move_for_subreg): Likewise.
> 	(simplify_operand_subreg): Strengthen locals "before" and "after"
> 	from rtx to rtx_insn *.
> 	(process_address_1): Strengthen params "before" and "after" from
> 	rtx * to rtx_insn **.  Strengthen locals "insns", "last_insn" from
> 	rtx to rtx_insn *.
> 	(process_address): Strengthen params "before" and "after" from
> 	rtx * to rtx_insn **.
> 	(emit_inc): Strengthen local "last" from rtx to rtx_insn *.
> 	(curr_insn_transform): Strengthen locals "before" and "after"
> 	from rtx to rtx_insn *.  Replace NULL_RTX with NULL when referring
> 	to insns.
> 	(loc_equivalence_callback): Update cast of "data", changing
> 	resulting type from rtx to rtx_insn *.
> 	(substitute_pseudo_within_insn): New.
> 	(inherit_reload_reg): Strengthen param "insn" from rtx to
> 	rtx_insn *; likewise for local "new_insns".  Replace NULL_RTX with
> 	NULL when referring to insns.  Add a checked cast to rtx_insn *
> 	when using usage_insn to invoke lra_update_insn_regno_info.
> 	(split_reg): Strengthen param "insn" from rtx to rtx_insn *;
> 	likewise for locals "restore", "save".  Add checked casts to
> 	rtx_insn * when using usage_insn to invoke
> 	lra_update_insn_regno_info and lra_process_new_insns.  Replace
> 	NULL_RTX with NULL when referring to insns.
> 	(split_if_necessary): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(update_ebb_live_info): Likewise for params "head", "tail" and local
> 	"prev_insn".
> 	(get_last_insertion_point): Likewise for return type and local "insn".
> 	(get_live_on_other_edges): Likewise for local "last".
> 	(inherit_in_ebb): Likewise for params "head", "tail" and locals
> 	"prev_insn", "next_insn", "restore".
> 	(remove_inheritance_pseudos): Likewise for local "prev_insn".
> 	(undo_optional_reloads): Likewise for local "insn".
>
> 	* lra-eliminations.c (lra_eliminate_regs_1): Likewise for param
> 	"insn".
> 	(lra_eliminate_regs): Replace NULL_RTX with NULL when referring to
> 	insns.
> 	(eliminate_regs_in_insn): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(spill_pseudos): Likewise for local "insn".
> 	(init_elimination): Likewise.
> 	(process_insn_for_elimination): Likewise for param "insn".
>
> 	* lra-lives.c (curr_insn): Likewise.;
>
> 	* lra-spills.c (assign_spill_hard_regs): Likewise for local "insn".
> 	(remove_pseudos): Likewise for param "insn".
> 	(spill_pseudos): Likewise for local "insn".
> 	(lra_final_code_change): Likewise for locals "insn", "curr".
>
> 	* lra.c (lra_invalidate_insn_data): Likewise for param "insn".
> 	(lra_set_insn_deleted): Likewise.
> 	(lra_delete_dead_insn): Likewise, and for local "prev".
> 	(new_insn_reg): Likewise for param "insn".
> 	(lra_set_insn_recog_data): Likewise.
> 	(lra_update_insn_recog_data): Likewise.
> 	(lra_set_used_insn_alternative): Likewise.
> 	(get_insn_freq): Likewise.
> 	(invalidate_insn_data_regno_info): Likewise.
> 	(lra_invalidate_insn_regno_info): Likewise.
> 	(lra_update_insn_regno_info): Likewise.
> 	(lra_constraint_insn_stack): Strengthen from vec<rtx> to
> 	vec<rtx_insn *>.
> 	(lra_push_insn_1): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(lra_push_insn): Likewise.
> 	(lra_push_insn_and_update_insn_regno_info): Likewise.
> 	(lra_pop_insn): Likewise for return type and local "insn".
> 	(push_insns): Likewise for params "from", "to", and local "insn".
> 	(setup_sp_offset): Likewise for params "from", "last" and locals
> 	"before", "insn".
> 	(lra_process_new_insns): Likewise for params "insn", "before",
> 	"after" and local "last".
> 	(struct sloc): Likewise for field "insn".
> 	(lra_former_scratch_operand_p): Likewise for param "insn".
> 	(remove_scratches): Likewise for locals "insn", "last".
> 	(check_rtl): Likewise for local "insn".
> 	(add_auto_inc_notes): Likewise for param "insn".
> 	(update_inc_notes): Likewise for local "insn".
> 	(lra): Replace NULL_RTX with NULL when referring to insn.
OK.

Similarly for patches #93-107.

Jeff

[PATCH 104/236] regcprop.c: Use rtx_insn

[David Malcolm]

gcc/
	* regcprop.c (struct queued_debug_insn_change): Strengthen field
	"insn" from rtx to rtx_insn *.
	(replace_oldest_value_reg): Likewise for param "insn".
	(replace_oldest_value_addr): Likewise.
	(replace_oldest_value_mem): Likewise.
	(apply_debug_insn_changes): Likewise for local "last_insn".
	(copyprop_hardreg_forward_1): Likewise for local "insn".
---
 gcc/regcprop.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/gcc/regcprop.c b/gcc/regcprop.c
index 7a5a4f6..6f1851a 100644
--- a/gcc/regcprop.c
+++ b/gcc/regcprop.c
@@ -50,7 +50,7 @@
 struct queued_debug_insn_change
 {
   struct queued_debug_insn_change *next;
-  rtx insn;
+  rtx_insn *insn;
   rtx *loc;
   rtx new_rtx;
 };
@@ -93,12 +93,12 @@ static bool mode_change_ok (enum machine_mode, enum machine_mode,
 static rtx maybe_mode_change (enum machine_mode, enum machine_mode,
 			      enum machine_mode, unsigned int, unsigned int);
 static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *);
-static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx,
+static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx_insn *,
 				      struct value_data *);
 static bool replace_oldest_value_addr (rtx *, enum reg_class,
-				       enum machine_mode, addr_space_t, rtx,
-				       struct value_data *);
-static bool replace_oldest_value_mem (rtx, rtx, struct value_data *);
+				       enum machine_mode, addr_space_t,
+				       rtx_insn *, struct value_data *);
+static bool replace_oldest_value_mem (rtx, rtx_insn *, struct value_data *);
 static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *);
 extern void debug_value_data (struct value_data *);
 #ifdef ENABLE_CHECKING
@@ -482,7 +482,7 @@ find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd)
    in register class CL.  Return true if successfully replaced.  */
 
 static bool
-replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx insn,
+replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx_insn *insn,
 			  struct value_data *vd)
 {
   rtx new_rtx = find_oldest_value_reg (cl, *loc, vd);
@@ -523,7 +523,7 @@ replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx insn,
 static bool
 replace_oldest_value_addr (rtx *loc, enum reg_class cl,
 			   enum machine_mode mode, addr_space_t as,
-			   rtx insn, struct value_data *vd)
+			   rtx_insn *insn, struct value_data *vd)
 {
   rtx x = *loc;
   RTX_CODE code = GET_CODE (x);
@@ -669,7 +669,7 @@ replace_oldest_value_addr (rtx *loc, enum reg_class cl,
 /* Similar to replace_oldest_value_reg, but X contains a memory.  */
 
 static bool
-replace_oldest_value_mem (rtx x, rtx insn, struct value_data *vd)
+replace_oldest_value_mem (rtx x, rtx_insn *insn, struct value_data *vd)
 {
   enum reg_class cl;
 
@@ -690,7 +690,7 @@ static void
 apply_debug_insn_changes (struct value_data *vd, unsigned int regno)
 {
   struct queued_debug_insn_change *change;
-  rtx last_insn = vd->e[regno].debug_insn_changes->insn;
+  rtx_insn *last_insn = vd->e[regno].debug_insn_changes->insn;
 
   for (change = vd->e[regno].debug_insn_changes;
        change;
@@ -741,7 +741,7 @@ static bool
 copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd)
 {
   bool anything_changed = false;
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
     {
-- 
1.8.5.3

[PATCH 123/236] web.c: Use rtx_insn

[David Malcolm]

gcc/
	* web.c (union_match_dups): Strengthen param "insn" from rtx to
	rtx_insn *.
	(pass_web::execute): Likewise for local "insn".
---
 gcc/web.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/web.c b/gcc/web.c
index 2c038f2..3fdb777 100644
--- a/gcc/web.c
+++ b/gcc/web.c
@@ -88,7 +88,7 @@ unionfind_union (struct web_entry *first, struct web_entry *second)
    FUN is the function that does the union.  */
 
 static void
-union_match_dups (rtx insn, struct web_entry *def_entry,
+union_match_dups (rtx_insn *insn, struct web_entry *def_entry,
 		  struct web_entry *use_entry,
 		  bool (*fun) (struct web_entry *, struct web_entry *))
 {
@@ -363,7 +363,7 @@ pass_web::execute (function *fun)
   unsigned int *used;
   basic_block bb;
   unsigned int uses_num = 0;
-  rtx insn;
+  rtx_insn *insn;
 
   df_set_flags (DF_NO_HARD_REGS + DF_EQ_NOTES);
   df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
-- 
1.8.5.3

[PATCH 132/236] config/epiphany: Use rtx_insn

[David Malcolm]

gcc/
	* config/epiphany/epiphany-protos.h (epiphany_final_prescan_insn):
	Strengthen first param "insn" from rtx to rtx_insn *.

	* config/epiphany/epiphany.c (epiphany_final_prescan_insn):
	Likewise.
	(frame_insn): Likewise for return type.  Introduce local "insn"
	for use in place of local "x" for use as an rtx_insn *.
	(frame_move_insn): Strengthen return type from rtx to rtx_insn *.
	(epiphany_expand_prologue): Likewise for local "insn".
	* config/epiphany/mode-switch-use.c (insert_uses): Likewise.
	* config/epiphany/resolve-sw-modes.c
	(pass_resolve_sw_modes::execute): Likewise for locals "insn" and
	"seq".
---
 gcc/config/epiphany/epiphany-protos.h  |  2 +-
 gcc/config/epiphany/epiphany.c         | 20 +++++++++++---------
 gcc/config/epiphany/mode-switch-use.c  |  2 +-
 gcc/config/epiphany/resolve-sw-modes.c |  5 +++--
 4 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/gcc/config/epiphany/epiphany-protos.h b/gcc/config/epiphany/epiphany-protos.h
index bfa4802..de2ea40 100644
--- a/gcc/config/epiphany/epiphany-protos.h
+++ b/gcc/config/epiphany/epiphany-protos.h
@@ -27,7 +27,7 @@ extern struct rtx_def *gen_compare_reg (enum machine_mode, enum rtx_code,
 #endif
 
 /* Declarations for various fns used in the .md file.  */
-extern void epiphany_final_prescan_insn (rtx, rtx *, int);
+extern void epiphany_final_prescan_insn (rtx_insn *, rtx *, int);
 extern bool epiphany_is_long_call_p (rtx);
 extern bool epiphany_small16 (rtx);
 bool epiphany_uninterruptible_p (tree decl);
diff --git a/gcc/config/epiphany/epiphany.c b/gcc/config/epiphany/epiphany.c
index 598f61b..1f0bba1 100644
--- a/gcc/config/epiphany/epiphany.c
+++ b/gcc/config/epiphany/epiphany.c
@@ -75,7 +75,7 @@ static tree epiphany_handle_forwarder_attribute (tree *, tree, tree, int,
 						 bool *);
 static bool epiphany_pass_by_reference (cumulative_args_t, enum machine_mode,
 					const_tree, bool);
-static rtx frame_insn (rtx);
+static rtx_insn *frame_insn (rtx);
 \f
 /* defines for the initialization of the GCC target structure.  */
 #define TARGET_ATTRIBUTE_TABLE epiphany_attribute_table
@@ -1439,7 +1439,7 @@ epiphany_print_operand_address (FILE *file, rtx addr)
 }
 
 void
-epiphany_final_prescan_insn (rtx insn ATTRIBUTE_UNUSED,
+epiphany_final_prescan_insn (rtx_insn *insn ATTRIBUTE_UNUSED,
 			     rtx *opvec ATTRIBUTE_UNUSED,
 			     int noperands ATTRIBUTE_UNUSED)
 {
@@ -1544,11 +1544,12 @@ frame_subreg_note (rtx set, int offset)
   return set;
 }
 
-static rtx
+static rtx_insn *
 frame_insn (rtx x)
 {
   int i;
   rtx note = NULL_RTX;
+  rtx_insn *insn;
 
   if (GET_CODE (x) == PARALLEL)
     {
@@ -1583,14 +1584,14 @@ frame_insn (rtx x)
     note = gen_rtx_PARALLEL (VOIDmode,
 			     gen_rtvec (2, frame_subreg_note (x, 0),
 					frame_subreg_note (x, UNITS_PER_WORD)));
-  x = emit_insn (x);
-  RTX_FRAME_RELATED_P (x) = 1;
+  insn = emit_insn (x);
+  RTX_FRAME_RELATED_P (insn) = 1;
   if (note)
-    add_reg_note (x, REG_FRAME_RELATED_EXPR, note);
-  return x;
+    add_reg_note (insn, REG_FRAME_RELATED_EXPR, note);
+  return insn;
 }
 
-static rtx
+static rtx_insn *
 frame_move_insn (rtx to, rtx from)
 {
   return frame_insn (gen_rtx_SET (VOIDmode, to, from));
@@ -1818,7 +1819,8 @@ epiphany_expand_prologue (void)
      register save.  */
   if (current_frame_info.last_slot >= 0)
     {
-      rtx ip, mem2, insn, note;
+      rtx ip, mem2, note;
+      rtx_insn *insn;
 
       gcc_assert (current_frame_info.last_slot != GPR_FP
 		  || (!current_frame_info.need_fp
diff --git a/gcc/config/epiphany/mode-switch-use.c b/gcc/config/epiphany/mode-switch-use.c
index cc80d10..b3f2b86 100644
--- a/gcc/config/epiphany/mode-switch-use.c
+++ b/gcc/config/epiphany/mode-switch-use.c
@@ -49,7 +49,7 @@ insert_uses (void)
   for (e = N_ENTITIES - 1; e >= 0; e--)
     {
       int no_mode = num_modes[e];
-      rtx insn;
+      rtx_insn *insn;
       int mode;
 
       if (!OPTIMIZE_MODE_SWITCHING (e))
diff --git a/gcc/config/epiphany/resolve-sw-modes.c b/gcc/config/epiphany/resolve-sw-modes.c
index f65fe2a..b89f708 100644
--- a/gcc/config/epiphany/resolve-sw-modes.c
+++ b/gcc/config/epiphany/resolve-sw-modes.c
@@ -78,7 +78,8 @@ unsigned
 pass_resolve_sw_modes::execute (function *fun)
 {
   basic_block bb;
-  rtx insn, src;
+  rtx_insn *insn;
+  rtx src;
   vec<basic_block> todo;
   sbitmap pushed;
   bool need_commit = false;
@@ -156,7 +157,7 @@ pass_resolve_sw_modes::execute (function *fun)
       FOR_EACH_EDGE (e, ei, bb->succs)
 	{
 	  basic_block succ = e->dest;
-	  rtx seq;
+	  rtx_insn *seq;
 
 	  if (!REGNO_REG_SET_P (DF_LIVE_IN (succ), jilted_reg))
 	    continue;
-- 
1.8.5.3

[PATCH 151/236] config/spu/spu.c: Use rtx_insn

[David Malcolm]

gcc/
	* config/spu/spu.c (frame_emit_store): Strengthen return type from
	rtx to rtx_insn *.
	(frame_emit_load): Likewise.
	(frame_emit_add_imm): Likewise, also for local "insn".
	(spu_expand_prologue): Likewise for local "insn".
	(struct spu_bb_info): Likewise for field "prop_jump".
	(emit_nop_for_insn): Likewise for param "insn" and local
	"new_insn".
	(pad_bb): Likewise for locals "insn", "next_insn", "prev_insn",
	"hbr_insn".
	(spu_emit_branch_hint): Likewise for params "before", "branch" and
	locals "hint", "insn".
	(get_branch_target): Likewise for param "branch".
	(insn_clobbers_hbr): Likewise for param "insn".
	(insert_hbrp_for_ilb_runout): Likewise for param "first" and
	locals "insn", "before_4", "before_16".
	(insert_hbrp): Likewise for local "insn".
	(spu_machine_dependent_reorg): Likewise for locals "branch",
	"insn", "next", "bbend".
	(uses_ls_unit): Likewise for param "insn".
	(get_pipe): Likewise.
	(spu_sched_variable_issue): Rename param "insn" to "uncast_insn",
	introducing a checked cast.
	(spu_sched_adjust_cost): Likewise for params "insn" and
	"dep_insn".
	(ea_load_store_inline): Strengthen local "insn" from rtx to rtx_insn *.
	(spu_sms_res_mii): Likewise.
---
 gcc/config/spu/spu.c | 60 +++++++++++++++++++++++++++++-----------------------
 1 file changed, 33 insertions(+), 27 deletions(-)

diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index e2bcfe9..2f4f7c7 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -160,7 +160,7 @@ static struct spu_builtin_range spu_builtin_range[] = {
 char regs_ever_allocated[FIRST_PSEUDO_REGISTER];
 
 /*  Prototypes and external defs.  */
-static int get_pipe (rtx insn);
+static int get_pipe (rtx_insn *insn);
 static int spu_naked_function_p (tree func);
 static int mem_is_padded_component_ref (rtx x);
 static void fix_range (const char *);
@@ -1632,7 +1632,7 @@ spu_saved_regs_size (void)
   return reg_save_size;
 }
 
-static rtx
+static rtx_insn *
 frame_emit_store (int regno, rtx addr, HOST_WIDE_INT offset)
 {
   rtx reg = gen_rtx_REG (V4SImode, regno);
@@ -1641,7 +1641,7 @@ frame_emit_store (int regno, rtx addr, HOST_WIDE_INT offset)
   return emit_insn (gen_movv4si (mem, reg));
 }
 
-static rtx
+static rtx_insn *
 frame_emit_load (int regno, rtx addr, HOST_WIDE_INT offset)
 {
   rtx reg = gen_rtx_REG (V4SImode, regno);
@@ -1651,10 +1651,10 @@ frame_emit_load (int regno, rtx addr, HOST_WIDE_INT offset)
 }
 
 /* This happens after reload, so we need to expand it.  */
-static rtx
+static rtx_insn *
 frame_emit_add_imm (rtx dst, rtx src, HOST_WIDE_INT imm, rtx scratch)
 {
-  rtx insn;
+  rtx_insn *insn;
   if (satisfies_constraint_K (GEN_INT (imm)))
     {
       insn = emit_insn (gen_addsi3 (dst, src, GEN_INT (imm)));
@@ -1725,7 +1725,8 @@ spu_expand_prologue (void)
   HOST_WIDE_INT saved_regs_size;
   rtx sp_reg = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
   rtx scratch_reg_0, scratch_reg_1;
-  rtx insn, real;
+  rtx_insn *insn;
+  rtx real;
 
   if (flag_pic && optimize == 0 && !cfun->machine->pic_reg)
     cfun->machine->pic_reg = pic_offset_table_rtx;
@@ -1969,7 +1970,7 @@ spu_const_from_ints(enum machine_mode mode, int a, int b, int c, int d)
 /* An array of these is used to propagate hints to predecessor blocks. */
 struct spu_bb_info
 {
-  rtx prop_jump; /* propagated from another block */
+  rtx_insn *prop_jump; /* propagated from another block */
   int bb_index;  /* the original block. */
 };
 static struct spu_bb_info *spu_bb_info;
@@ -1993,10 +1994,10 @@ static struct spu_bb_info *spu_bb_info;
    We check for TImode to handle a MULTI1 insn which has dual issued its
    first instruction.  get_pipe returns -1 for MULTI0 or inline asm.  */
 static void
-emit_nop_for_insn (rtx insn)
+emit_nop_for_insn (rtx_insn *insn)
 {
   int p;
-  rtx new_insn;
+  rtx_insn *new_insn;
 
   /* We need to handle JUMP_TABLE_DATA separately.  */
   if (JUMP_TABLE_DATA_P (insn))
@@ -2028,7 +2029,7 @@ emit_nop_for_insn (rtx insn)
 static void
 pad_bb(void)
 {
-  rtx insn, next_insn, prev_insn, hbr_insn = 0;
+  rtx_insn *insn, *next_insn, *prev_insn, *hbr_insn = 0;
   int length;
   int addr;
 
@@ -2098,12 +2099,12 @@ pad_bb(void)
 /* Routines for branch hints. */
 
 static void
-spu_emit_branch_hint (rtx before, rtx branch, rtx target,
+spu_emit_branch_hint (rtx_insn *before, rtx_insn *branch, rtx target,
 		      int distance, sbitmap blocks)
 {
   rtx branch_label = 0;
-  rtx hint;
-  rtx insn;
+  rtx_insn *hint;
+  rtx_insn *insn;
   rtx_jump_table_data *table;
 
   if (before == 0 || branch == 0 || target == 0)
@@ -2183,7 +2184,7 @@ spu_emit_branch_hint (rtx before, rtx branch, rtx target,
 /* Returns 0 if we don't want a hint for this branch.  Otherwise return
    the rtx for the branch target. */
 static rtx
-get_branch_target (rtx branch)
+get_branch_target (rtx_insn *branch)
 {
   if (JUMP_P (branch))
     {
@@ -2251,7 +2252,7 @@ get_branch_target (rtx branch)
    should only be used in a clobber, and this function searches for
    insns which clobber it.  */
 static bool
-insn_clobbers_hbr (rtx insn)
+insn_clobbers_hbr (rtx_insn *insn)
 {
   if (INSN_P (insn)
       && GET_CODE (PATTERN (insn)) == PARALLEL)
@@ -2282,9 +2283,9 @@ insn_clobbers_hbr (rtx insn)
    and an hbrp within 16 instructions of FIRST.
  */
 static void
-insert_hbrp_for_ilb_runout (rtx first)
+insert_hbrp_for_ilb_runout (rtx_insn *first)
 {
-  rtx insn, before_4 = 0, before_16 = 0;
+  rtx_insn *insn, *before_4 = 0, *before_16 = 0;
   int addr = 0, length, first_addr = -1;
   int hbrp_addr0 = 128 * 4, hbrp_addr1 = 128 * 4;
   int insert_lnop_after = 0;
@@ -2414,7 +2415,7 @@ insert_hbrp_for_ilb_runout (rtx first)
 static void
 insert_hbrp (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   if (TARGET_SAFE_HINTS)
     {
       shorten_branches (get_insns ());
@@ -2451,7 +2452,7 @@ spu_machine_dependent_reorg (void)
 {
   sbitmap blocks;
   basic_block bb;
-  rtx branch, insn;
+  rtx_insn *branch, *insn;
   rtx branch_target = 0;
   int branch_addr = 0, insn_addr, required_dist = 0;
   int i;
@@ -2523,7 +2524,7 @@ spu_machine_dependent_reorg (void)
 		      || insn_clobbers_hbr (insn)
 		      || branch_addr - insn_addr > 600))
 		{
-		  rtx next = NEXT_INSN (insn);
+		  rtx_insn *next = NEXT_INSN (insn);
 		  int next_addr = INSN_ADDRESSES (INSN_UID (next));
 		  if (insn != BB_END (bb)
 		      && branch_addr - next_addr >= required_dist)
@@ -2562,7 +2563,7 @@ spu_machine_dependent_reorg (void)
 	  /* If we haven't emitted a hint for this branch yet, it might
 	     be profitable to emit it in one of the predecessor blocks,
 	     especially for loops.  */
-	  rtx bbend;
+	  rtx_insn *bbend;
 	  basic_block prev = 0, prop = 0, prev2 = 0;
 	  int loop_exit = 0, simple_loop = 0;
 	  int next_addr = INSN_ADDRESSES (INSN_UID (NEXT_INSN (insn)));
@@ -2693,7 +2694,7 @@ spu_sched_issue_rate (void)
 }
 
 static int
-uses_ls_unit(rtx insn)
+uses_ls_unit(rtx_insn *insn)
 {
   rtx set = single_set (insn);
   if (set != 0
@@ -2704,7 +2705,7 @@ uses_ls_unit(rtx insn)
 }
 
 static int
-get_pipe (rtx insn)
+get_pipe (rtx_insn *insn)
 {
   enum attr_type t;
   /* Handle inline asm */
@@ -2800,10 +2801,12 @@ spu_sched_init (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
 
 static int
 spu_sched_variable_issue (FILE *file ATTRIBUTE_UNUSED,
-			  int verbose ATTRIBUTE_UNUSED, rtx insn, int more)
+			  int verbose ATTRIBUTE_UNUSED,
+			  rtx uncast_insn, int more)
 {
   int len;
   int p;
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   if (GET_CODE (PATTERN (insn)) == USE
       || GET_CODE (PATTERN (insn)) == CLOBBER
       || (len = get_attr_length (insn)) == 0)
@@ -2997,9 +3000,11 @@ spu_sched_reorder (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
 
 /* INSN is dependent on DEP_INSN. */
 static int
-spu_sched_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+spu_sched_adjust_cost (rtx uncast_insn, rtx link, rtx uncast_dep_insn, int cost)
 {
   rtx set;
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
+  rtx_insn *dep_insn = as_a <rtx_insn *> (uncast_dep_insn);
 
   /* The blockage pattern is used to prevent instructions from being
      moved across it and has no cost. */
@@ -4272,7 +4277,8 @@ ea_load_store_inline (rtx mem, bool is_store, rtx ea_addr, rtx data_addr)
   rtx tag_eq_pack = gen_reg_rtx (V4SImode);
   rtx tag_eq_pack_si = gen_reg_rtx (SImode);
   rtx eq_index = gen_reg_rtx (SImode);
-  rtx bcomp, hit_label, hit_ref, cont_label, insn;
+  rtx bcomp, hit_label, hit_ref, cont_label;
+  rtx_insn *insn;
 
   if (spu_ea_model != 32)
     {
@@ -6839,7 +6845,7 @@ spu_sms_res_mii (struct ddg *g)
 
   for (i = 0; i < g->num_nodes; i++)
     {
-      rtx insn = g->nodes[i].insn;
+      rtx_insn *insn = g->nodes[i].insn;
       int p = get_pipe (insn) + 2;
 
       gcc_assert (p >= 0);
-- 
1.8.5.3

[PATCH 116/236] shrink-wrap.*: Use rtx_insn (touches config/i386/i386.c)

[David Malcolm]

gcc/
	* shrink-wrap.h (requires_stack_frame_p): Strengthen param 1
	"insn" from rtx to rtx_insn *.
	(dup_block_and_redirect): Likewise for param 3 "before".

	* shrink-wrap.c (requires_stack_frame_p): Strengthen param "insn"
	from rtx to rtx_insn *.
	(move_insn_for_shrink_wrap): Likewise.
	(prepare_shrink_wrap): Likewise for locals "insn", "curr".
	(dup_block_and_redirect): Likewise for param "before" and local
	"insn".
	(try_shrink_wrapping): Likewise for locals "insn", "insert_point",
	"end".
	(convert_to_simple_return): Likewise for local "start".

	* config/i386/i386.c (ix86_finalize_stack_realign_flags):
	Strengthen local "insn" from rtx to rtx_insn *, for use when
	invoking requires_stack_frame_p.
---
 gcc/config/i386/i386.c |  2 +-
 gcc/shrink-wrap.c      | 19 ++++++++++---------
 gcc/shrink-wrap.h      |  5 +++--
 3 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 8827256..ea79519 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -10669,7 +10669,7 @@ ix86_finalize_stack_realign_flags (void)
 			   HARD_FRAME_POINTER_REGNUM);
       FOR_EACH_BB_FN (bb, cfun)
         {
-          rtx insn;
+          rtx_insn *insn;
 	  FOR_BB_INSNS (bb, insn)
 	    if (NONDEBUG_INSN_P (insn)
 		&& requires_stack_frame_p (insn, prologue_used,
diff --git a/gcc/shrink-wrap.c b/gcc/shrink-wrap.c
index 7d9c6e7..785ca21 100644
--- a/gcc/shrink-wrap.c
+++ b/gcc/shrink-wrap.c
@@ -61,7 +61,7 @@ along with GCC; see the file COPYING3.  If not see
    prologue.  SET_UP_BY_PROLOGUE is the set of registers we expect the
    prologue to set up for the function.  */
 bool
-requires_stack_frame_p (rtx insn, HARD_REG_SET prologue_used,
+requires_stack_frame_p (rtx_insn *insn, HARD_REG_SET prologue_used,
 			HARD_REG_SET set_up_by_prologue)
 {
   df_ref *df_rec;
@@ -162,7 +162,7 @@ live_edge_for_reg (basic_block bb, int regno, int end_regno)
    is splitted or not.  */
 
 static bool
-move_insn_for_shrink_wrap (basic_block bb, rtx insn,
+move_insn_for_shrink_wrap (basic_block bb, rtx_insn *insn,
 			   const HARD_REG_SET uses,
 			   const HARD_REG_SET defs,
 			   bool *split_p)
@@ -331,7 +331,8 @@ move_insn_for_shrink_wrap (basic_block bb, rtx insn,
 void
 prepare_shrink_wrap (basic_block entry_block)
 {
-  rtx insn, curr, x;
+  rtx_insn *insn, *curr;
+  rtx x;
   HARD_REG_SET uses, defs;
   df_ref *ref;
   bool split_p = false;
@@ -373,12 +374,12 @@ prepare_shrink_wrap (basic_block entry_block)
 /* Create a copy of BB instructions and insert at BEFORE.  Redirect
    preds of BB to COPY_BB if they don't appear in NEED_PROLOGUE.  */
 void
-dup_block_and_redirect (basic_block bb, basic_block copy_bb, rtx before,
+dup_block_and_redirect (basic_block bb, basic_block copy_bb, rtx_insn *before,
 			bitmap_head *need_prologue)
 {
   edge_iterator ei;
   edge e;
-  rtx insn = BB_END (bb);
+  rtx_insn *insn = BB_END (bb);
 
   /* We know BB has a single successor, so there is no need to copy a
      simple jump at the end of BB.  */
@@ -513,7 +514,7 @@ try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
 
       FOR_EACH_BB_FN (bb, cfun)
 	{
-	  rtx insn;
+	  rtx_insn *insn;
 	  unsigned size = 0;
 
 	  FOR_BB_INSNS (bb, insn)
@@ -707,7 +708,7 @@ try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
 	    FOR_EACH_BB_REVERSE_FN (bb, cfun)
 	      {
 		basic_block copy_bb, tbb;
-		rtx insert_point;
+		rtx_insn *insert_point;
 		int eflags;
 
 		if (!bitmap_clear_bit (&bb_tail, bb->index))
@@ -724,7 +725,7 @@ try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
 		if (e)
 		  {
                     /* Make sure we insert after any barriers.  */
-                    rtx end = get_last_bb_insn (e->src);
+                    rtx_insn *end = get_last_bb_insn (e->src);
                     copy_bb = create_basic_block (NEXT_INSN (end),
                                                   NULL_RTX, e->src);
 		    BB_COPY_PARTITION (copy_bb, e->src);
@@ -902,7 +903,7 @@ convert_to_simple_return (edge entry_edge, edge orig_entry_edge,
 	  else if (*pdest_bb == NULL)
 	    {
 	      basic_block bb;
-	      rtx start;
+	      rtx_insn *start;
 
 	      bb = create_basic_block (NULL, NULL, exit_pred);
 	      BB_COPY_PARTITION (bb, e->src);
diff --git a/gcc/shrink-wrap.h b/gcc/shrink-wrap.h
index bccfb31..5576d36 100644
--- a/gcc/shrink-wrap.h
+++ b/gcc/shrink-wrap.h
@@ -34,10 +34,11 @@ extern basic_block emit_return_for_exit (edge exit_fallthru_edge,
 					 bool simple_p);
 
 /* In shrink-wrap.c.  */
-extern bool requires_stack_frame_p (rtx, HARD_REG_SET, HARD_REG_SET);
+extern bool requires_stack_frame_p (rtx_insn *, HARD_REG_SET, HARD_REG_SET);
 extern void prepare_shrink_wrap (basic_block entry_block);
 extern void dup_block_and_redirect (basic_block bb, basic_block copy_bb,
-				    rtx before,	bitmap_head *need_prologue);
+				    rtx_insn *before,
+				    bitmap_head *need_prologue);
 extern void try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
 				 bitmap_head *bb_flags, rtx prologue_seq);
 extern edge get_unconverted_simple_return (edge, bitmap_head,
-- 
1.8.5.3

[PATCH 144/236] config/picochip: Use rtx_insn

[David Malcolm]

gcc/
	* config/picochip/picochip-protos.h (picochip_final_prescan_insn):
	Strengthen param "insn" from rtx to rtx_insn *.
	* config/picochip/picochip.c (picochip_current_prescan_insn):
	Likewise for this variable.
	(picochip_final_prescan_insn): Likewise for param "insn".
---
 gcc/config/picochip/picochip-protos.h | 3 ++-
 gcc/config/picochip/picochip.c        | 4 ++--
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/gcc/config/picochip/picochip-protos.h b/gcc/config/picochip/picochip-protos.h
index 4d8dfd6..e7efc40 100644
--- a/gcc/config/picochip/picochip-protos.h
+++ b/gcc/config/picochip/picochip-protos.h
@@ -73,7 +73,8 @@ extern rtx picochip_get_high_const (rtx value);
 extern void picochip_expand_prologue (void);
 extern void picochip_expand_epilogue (int is_sibling_call);
 
-extern void picochip_final_prescan_insn (rtx insn, rtx * operand, int num_operands);
+extern void picochip_final_prescan_insn (rtx_insn *insn, rtx * operand,
+					 int num_operands);
 extern const char *picochip_asm_output_opcode (FILE * f, const char *ptr);
 
 extern int picochip_check_conditional_copy (rtx * operands);
diff --git a/gcc/config/picochip/picochip.c b/gcc/config/picochip/picochip.c
index 25802ef..3151ec1 100644
--- a/gcc/config/picochip/picochip.c
+++ b/gcc/config/picochip/picochip.c
@@ -163,7 +163,7 @@ static int picochip_vliw_continuation = 0;
    between final_prescan_insn and functions such as asm_output_opcode,
    and picochip_get_vliw_alu_id (which are otherwise unable to determine the
    current instruction. */
-static rtx picochip_current_prescan_insn;
+static rtx_insn *picochip_current_prescan_insn;
 
 static bool picochip_is_delay_slot_pending = 0;
 
@@ -3872,7 +3872,7 @@ picochip_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED,
 }
 
 void
-picochip_final_prescan_insn (rtx insn, rtx * opvec ATTRIBUTE_UNUSED,
+picochip_final_prescan_insn (rtx_insn *insn, rtx * opvec ATTRIBUTE_UNUSED,
 			     int num_operands ATTRIBUTE_UNUSED)
 {
   rtx local_insn;
-- 
1.8.5.3

[PATCH 066/236] dce.c: Use rtx subclasses

[David Malcolm]

gcc/
	* dce.c (worklist): Strengthen from vec<rtx> to vec<rtx_insn *>.
	(deletable_insn_p): Strengthen param "insn" from rtx to
	rtx_insn *.  Add checked cast to rtx_call_insn when invoking
	find_call_stack_args, since this is guarded by CALL_P (insn).
	(marked_insn_p): Strengthen param "insn" from rtx to
	rtx_insn *.
	(mark_insn): Likewise.  Add checked cast to rtx_call_insn when
	invoking find_call_stack_args, since this is guarded by
	CALL_P (insn).
	(mark_nonreg_stores_1): Strengthen cast of "data" from rtx to
	rtx_insn *; we know this is an insn since this was called by
	mark_nonreg_stores.
	(mark_nonreg_stores_2): Likewise.
	(mark_nonreg_stores): Strengthen param "insn" from rtx to
	rtx_insn *.
	(find_call_stack_args): Strengthen param "call_insn" from rtx to
	rtx_call_insn *; strengthen locals "insn" and "prev_insn" from rtx
	to rtx_insn *.
	(remove_reg_equal_equiv_notes_for_defs): Strengthen param "insn"
	from rtx to rtx_insn *.
	(reset_unmarked_insns_debug_uses): Likewise for locals "insn",
	"next", "ref_insn".
	(delete_unmarked_insns): Likewise for locals "insn", "next".
	(prescan_insns_for_dce): Likewise for locals "insn", "prev".
	(mark_reg_dependencies): Likewise for param "insn".
	(rest_of_handle_ud_dce): Likewise for local "insn".
	(word_dce_process_block): Likewise.
	(dce_process_block): Likewise.
---
 gcc/dce.c | 46 ++++++++++++++++++++++++----------------------
 1 file changed, 24 insertions(+), 22 deletions(-)

diff --git a/gcc/dce.c b/gcc/dce.c
index 0e24577..921c9d9 100644
--- a/gcc/dce.c
+++ b/gcc/dce.c
@@ -51,7 +51,7 @@ static bool can_alter_cfg = false;
 
 /* Instructions that have been marked but whose dependencies have not
    yet been processed.  */
-static vec<rtx> worklist;
+static vec<rtx_insn *> worklist;
 
 /* Bitmap of instructions marked as needed indexed by INSN_UID.  */
 static sbitmap marked;
@@ -60,7 +60,7 @@ static sbitmap marked;
 static bitmap_obstack dce_blocks_bitmap_obstack;
 static bitmap_obstack dce_tmp_bitmap_obstack;
 
-static bool find_call_stack_args (rtx, bool, bool, bitmap);
+static bool find_call_stack_args (rtx_call_insn *, bool, bool, bitmap);
 
 /* A subroutine for which BODY is part of the instruction being tested;
    either the top-level pattern, or an element of a PARALLEL.  The
@@ -92,7 +92,7 @@ deletable_insn_p_1 (rtx body)
    the DCE pass.  */
 
 static bool
-deletable_insn_p (rtx insn, bool fast, bitmap arg_stores)
+deletable_insn_p (rtx_insn *insn, bool fast, bitmap arg_stores)
 {
   rtx body, x;
   int i;
@@ -109,7 +109,8 @@ deletable_insn_p (rtx insn, bool fast, bitmap arg_stores)
          infinite loop.  */
       && (RTL_CONST_OR_PURE_CALL_P (insn)
 	  && !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)))
-    return find_call_stack_args (insn, false, fast, arg_stores);
+    return find_call_stack_args (as_a <rtx_call_insn *> (insn), false,
+				 fast, arg_stores);
 
   /* Don't delete jumps, notes and the like.  */
   if (!NONJUMP_INSN_P (insn))
@@ -163,7 +164,7 @@ deletable_insn_p (rtx insn, bool fast, bitmap arg_stores)
 /* Return true if INSN has been marked as needed.  */
 
 static inline int
-marked_insn_p (rtx insn)
+marked_insn_p (rtx_insn *insn)
 {
   /* Artificial defs are always needed and they do not have an insn.
      We should never see them here.  */
@@ -176,7 +177,7 @@ marked_insn_p (rtx insn)
    the worklist.  */
 
 static void
-mark_insn (rtx insn, bool fast)
+mark_insn (rtx_insn *insn, bool fast)
 {
   if (!marked_insn_p (insn))
     {
@@ -190,7 +191,7 @@ mark_insn (rtx insn, bool fast)
 	  && !SIBLING_CALL_P (insn)
 	  && (RTL_CONST_OR_PURE_CALL_P (insn)
 	      && !RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)))
-	find_call_stack_args (insn, true, fast, NULL);
+	find_call_stack_args (as_a <rtx_call_insn *> (insn), true, fast, NULL);
     }
 }
 
@@ -202,7 +203,7 @@ static void
 mark_nonreg_stores_1 (rtx dest, const_rtx pattern, void *data)
 {
   if (GET_CODE (pattern) != CLOBBER && !REG_P (dest))
-    mark_insn ((rtx) data, true);
+    mark_insn ((rtx_insn *) data, true);
 }
 
 
@@ -213,14 +214,14 @@ static void
 mark_nonreg_stores_2 (rtx dest, const_rtx pattern, void *data)
 {
   if (GET_CODE (pattern) != CLOBBER && !REG_P (dest))
-    mark_insn ((rtx) data, false);
+    mark_insn ((rtx_insn *) data, false);
 }
 
 
 /* Mark INSN if BODY stores to a non-register destination.  */
 
 static void
-mark_nonreg_stores (rtx body, rtx insn, bool fast)
+mark_nonreg_stores (rtx body, rtx_insn *insn, bool fast)
 {
   if (fast)
     note_stores (body, mark_nonreg_stores_1, insn);
@@ -257,10 +258,11 @@ check_argument_store (rtx mem, HOST_WIDE_INT off, HOST_WIDE_INT min_sp_off,
    going to be marked called again with DO_MARK true.  */
 
 static bool
-find_call_stack_args (rtx call_insn, bool do_mark, bool fast,
+find_call_stack_args (rtx_call_insn *call_insn, bool do_mark, bool fast,
 		      bitmap arg_stores)
 {
-  rtx p, insn, prev_insn;
+  rtx p;
+  rtx_insn *insn, *prev_insn;
   bool ret;
   HOST_WIDE_INT min_sp_off, max_sp_off;
   bitmap sp_bytes;
@@ -396,7 +398,7 @@ find_call_stack_args (rtx call_insn, bool do_mark, bool fast,
       HOST_WIDE_INT off;
 
       if (insn == BB_HEAD (BLOCK_FOR_INSN (call_insn)))
-	prev_insn = NULL_RTX;
+	prev_insn = NULL;
       else
 	prev_insn = PREV_INSN (insn);
 
@@ -494,7 +496,7 @@ find_call_stack_args (rtx call_insn, bool do_mark, bool fast,
    writes to.  */
 
 static void
-remove_reg_equal_equiv_notes_for_defs (rtx insn)
+remove_reg_equal_equiv_notes_for_defs (rtx_insn *insn)
 {
   df_ref *def_rec;
 
@@ -509,7 +511,7 @@ static void
 reset_unmarked_insns_debug_uses (void)
 {
   basic_block bb;
-  rtx insn, next;
+  rtx_insn *insn, *next;
 
   FOR_EACH_BB_REVERSE_FN (bb, cfun)
     FOR_BB_INSNS_REVERSE_SAFE (bb, insn, next)
@@ -523,7 +525,7 @@ reset_unmarked_insns_debug_uses (void)
 	      struct df_link *defs;
 	      for (defs = DF_REF_CHAIN (use); defs; defs = defs->next)
 		{
-		  rtx ref_insn;
+		  rtx_insn *ref_insn;
 		  if (DF_REF_IS_ARTIFICIAL (defs->ref))
 		    continue;
 		  ref_insn = DF_REF_INSN (defs->ref);
@@ -547,7 +549,7 @@ static void
 delete_unmarked_insns (void)
 {
   basic_block bb;
-  rtx insn, next;
+  rtx_insn *insn, *next;
   bool must_clean = false;
 
   FOR_EACH_BB_REVERSE_FN (bb, cfun)
@@ -614,7 +616,7 @@ static void
 prescan_insns_for_dce (bool fast)
 {
   basic_block bb;
-  rtx insn, prev;
+  rtx_insn *insn, *prev;
   bitmap arg_stores = NULL;
 
   if (dump_file)
@@ -677,7 +679,7 @@ mark_artificial_uses (void)
 /* Mark every instruction that defines a register value that INSN uses.  */
 
 static void
-mark_reg_dependencies (rtx insn)
+mark_reg_dependencies (rtx_insn *insn)
 {
   struct df_link *defs;
   df_ref *use_rec;
@@ -753,7 +755,7 @@ fini_dce (bool fast)
 static unsigned int
 rest_of_handle_ud_dce (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   init_dce (false);
 
@@ -839,7 +841,7 @@ word_dce_process_block (basic_block bb, bool redo_out,
 			struct dead_debug_global *global_debug)
 {
   bitmap local_live = BITMAP_ALLOC (&dce_tmp_bitmap_obstack);
-  rtx insn;
+  rtx_insn *insn;
   bool block_changed;
   struct dead_debug_local debug;
 
@@ -937,7 +939,7 @@ dce_process_block (basic_block bb, bool redo_out, bitmap au,
 		   struct dead_debug_global *global_debug)
 {
   bitmap local_live = BITMAP_ALLOC (&dce_tmp_bitmap_obstack);
-  rtx insn;
+  rtx_insn *insn;
   bool block_changed;
   df_ref *def_rec;
   struct dead_debug_local debug;
-- 
1.8.5.3

[PATCH 145/236] config/rs6000: Use rtx_insn

[David Malcolm]

gcc/
	* config/rs6000/rs6000-protos.h (output_cbranch): Strengthen param
	4 from rtx to rtx_insn *.
	(rs6000_final_prescan_insn): Likewise for first param.
	* config/rs6000/rs6000.c (rs6000_emit_set_const): Likewise for
	local "insn".
	(rs6000_get_some_local_dynamic_name): Likewise.
	(output_cbranch): Likewise for param "insn".
	(spe_func_has_64bit_regs_p): Likewise for locals "insns", "insn".
	(rs6000_function_ok_for_sibcall): Likewise for locals "top", "insn".
	(rs6000_emit_allocate_stack): Likewise for local "insn".
	(load_cr_save): Likewise.
	(restore_saved_cr): Likewise.
	(restore_saved_lr): Likewise.
	(emit_cfa_restores): Likewise.
	(rs6000_output_function_epilogue): Likewise for locals "insn" and
	"deleted_debug_label".
	(rs6000_output_mi_thunk): Likewise for local "insn".
	(rs6000_final_prescan_insn): Likewise for param "insn".
---
 gcc/config/rs6000/rs6000-protos.h |  4 ++--
 gcc/config/rs6000/rs6000.c        | 34 ++++++++++++++++++----------------
 2 files changed, 20 insertions(+), 18 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h
index bbcc1df..6708ecf 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -111,7 +111,7 @@ extern enum rtx_code rs6000_reverse_condition (enum machine_mode,
 extern void rs6000_emit_sISEL (enum machine_mode, rtx[]);
 extern void rs6000_emit_sCOND (enum machine_mode, rtx[]);
 extern void rs6000_emit_cbranch (enum machine_mode, rtx[]);
-extern char * output_cbranch (rtx, const char *, int, rtx);
+extern char * output_cbranch (rtx, const char *, int, rtx_insn *);
 extern char * output_e500_flip_gt_bit (rtx, rtx);
 extern const char * output_probe_stack_range (rtx, rtx);
 extern bool rs6000_emit_set_const (rtx, rtx);
@@ -214,7 +214,7 @@ char *output_call (rtx, rtx *, int, int);
 const char * rs6000_xcoff_strip_dollar (const char *);
 #endif
 
-void rs6000_final_prescan_insn (rtx, rtx *operand, int num_operands);
+void rs6000_final_prescan_insn (rtx_insn *, rtx *operand, int num_operands);
 
 extern bool rs6000_hard_regno_mode_ok_p[][FIRST_PSEUDO_REGISTER];
 extern unsigned char rs6000_class_max_nregs[][LIM_REG_CLASSES];
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 5faf329..149bc13 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -7856,7 +7856,8 @@ bool
 rs6000_emit_set_const (rtx dest, rtx source)
 {
   enum machine_mode mode = GET_MODE (dest);
-  rtx temp, insn, set;
+  rtx temp, set;
+  rtx_insn *insn;
   HOST_WIDE_INT c;
 
   gcc_checking_assert (CONST_INT_P (source));
@@ -17705,7 +17706,7 @@ extract_ME (rtx op)
 static const char *
 rs6000_get_some_local_dynamic_name (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (cfun->machine->some_ld_name)
     return cfun->machine->some_ld_name;
@@ -19009,7 +19010,7 @@ rs6000_emit_cbranch (enum machine_mode mode, rtx operands[])
    INSN is the insn.  */
 
 char *
-output_cbranch (rtx op, const char *label, int reversed, rtx insn)
+output_cbranch (rtx op, const char *label, int reversed, rtx_insn *insn)
 {
   static char string[64];
   enum rtx_code code = GET_CODE (op);
@@ -21317,7 +21318,7 @@ rs6000_stack_info (void)
 static bool
 spe_func_has_64bit_regs_p (void)
 {
-  rtx insns, insn;
+  rtx_insn *insns, *insn;
 
   /* Functions that save and restore all the call-saved registers will
      need to save/restore the registers in 64-bits.  */
@@ -21586,9 +21587,9 @@ rs6000_function_ok_for_sibcall (tree decl, tree exp)
 static int
 rs6000_ra_ever_killed (void)
 {
-  rtx top;
+  rtx_insn *top;
   rtx reg;
-  rtx insn;
+  rtx_insn *insn;
 
   if (cfun->is_thunk)
     return 0;
@@ -21897,7 +21898,7 @@ rs6000_emit_stack_tie (rtx fp, bool hard_frame_needed)
 static void
 rs6000_emit_allocate_stack (HOST_WIDE_INT size, rtx copy_reg, int copy_off)
 {
-  rtx insn;
+  rtx_insn *insn;
   rtx stack_reg = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
   rtx tmp_reg = gen_rtx_REG (Pmode, 0);
   rtx todec = gen_int_mode (-size, Pmode);
@@ -23795,7 +23796,7 @@ load_cr_save (int regno, rtx frame_reg_rtx, int offset, bool exit_func)
 {
   rtx mem = gen_frame_mem_offset (SImode, frame_reg_rtx, offset);
   rtx reg = gen_rtx_REG (SImode, regno);
-  rtx insn = emit_move_insn (reg, mem);
+  rtx_insn *insn = emit_move_insn (reg, mem);
 
   if (!exit_func && DEFAULT_ABI == ABI_V4)
     {
@@ -23826,7 +23827,7 @@ restore_saved_cr (rtx reg, int using_mfcr_multiple, bool exit_func)
 
   if (using_mfcr_multiple && count > 1)
     {
-      rtx insn;
+      rtx_insn *insn;
       rtvec p;
       int ndx;
 
@@ -23882,7 +23883,7 @@ restore_saved_cr (rtx reg, int using_mfcr_multiple, bool exit_func)
   if (!exit_func && DEFAULT_ABI != ABI_ELFv2
       && (DEFAULT_ABI == ABI_V4 || flag_shrink_wrap))
     {
-      rtx insn = get_last_insn ();
+      rtx_insn *insn = get_last_insn ();
       rtx cr = gen_rtx_REG (SImode, CR2_REGNO);
 
       add_reg_note (insn, REG_CFA_RESTORE, cr);
@@ -23909,7 +23910,7 @@ restore_saved_lr (int regno, bool exit_func)
 {
   rtx reg = gen_rtx_REG (Pmode, regno);
   rtx lr = gen_rtx_REG (Pmode, LR_REGNO);
-  rtx insn = emit_move_insn (lr, reg);
+  rtx_insn *insn = emit_move_insn (lr, reg);
 
   if (!exit_func && flag_shrink_wrap)
     {
@@ -23961,7 +23962,7 @@ offset_below_red_zone_p (HOST_WIDE_INT offset)
 static void
 emit_cfa_restores (rtx cfa_restores)
 {
-  rtx insn = get_last_insn ();
+  rtx_insn *insn = get_last_insn ();
   rtx *loc = &REG_NOTES (insn);
 
   while (*loc)
@@ -24841,8 +24842,8 @@ rs6000_output_function_epilogue (FILE *file,
   /* Mach-O doesn't support labels at the end of objects, so if
      it looks like we might want one, insert a NOP.  */
   {
-    rtx insn = get_last_insn ();
-    rtx deleted_debug_label = NULL_RTX;
+    rtx_insn *insn = get_last_insn ();
+    rtx_insn *deleted_debug_label = NULL;
     while (insn
 	   && NOTE_P (insn)
 	   && NOTE_KIND (insn) != NOTE_INSN_DELETED_LABEL)
@@ -25141,7 +25142,8 @@ rs6000_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
 			HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
 			tree function)
 {
-  rtx this_rtx, insn, funexp;
+  rtx this_rtx, funexp;
+  rtx_insn *insn;
 
   reload_completed = 1;
   epilogue_completed = 1;
@@ -31259,7 +31261,7 @@ rs6000_stack_protect_fail (void)
 }
 
 void
-rs6000_final_prescan_insn (rtx insn, rtx *operand ATTRIBUTE_UNUSED,
+rs6000_final_prescan_insn (rtx_insn *insn, rtx *operand ATTRIBUTE_UNUSED,
 			   int num_operands ATTRIBUTE_UNUSED)
 {
   if (rs6000_warn_cell_microcode)
-- 
1.8.5.3

[PATCH 020/236] Return rtx_insn from get_insns/get_last_insn

[David Malcolm]

Ultimately, the underlying fields should become rtx_insn *, but for now we
can do this with a checked cast.

Note to self:
  config/m32c/m32c.c: m32c_leaf_function_p directly manipulates
  x_first_insn and x_last_insn, using sequence_stack.

gcc/
	* emit-rtl.h (get_insns): Strengthen return type from rtx to
	rtx_insn *, adding a checked cast for now.
	(get_last_insn): Likewise.
---
 gcc/emit-rtl.h | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/gcc/emit-rtl.h b/gcc/emit-rtl.h
index c72c24f..f97ac49 100644
--- a/gcc/emit-rtl.h
+++ b/gcc/emit-rtl.h
@@ -74,10 +74,11 @@ extern bool need_atomic_barrier_p (enum memmodel, bool);
 
 /* Return the first insn of the current sequence or current function.  */
 
-static inline rtx
+static inline rtx_insn *
 get_insns (void)
 {
-  return crtl->emit.x_first_insn;
+  rtx insn = crtl->emit.x_first_insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Specify a new insn as the first in the chain.  */
@@ -91,10 +92,11 @@ set_first_insn (rtx insn)
 
 /* Return the last insn emitted in current sequence or current function.  */
 
-static inline rtx
+static inline rtx_insn *
 get_last_insn (void)
 {
-  return crtl->emit.x_last_insn;
+  rtx insn = crtl->emit.x_last_insn;
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Specify a new insn as the last in the chain.  */
-- 
1.8.5.3

Re: [PATCH 020/236] Return rtx_insn from get_insns/get_last_insn

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> Ultimately, the underlying fields should become rtx_insn *, but for now we
> can do this with a checked cast.
>
> Note to self:
>    config/m32c/m32c.c: m32c_leaf_function_p directly manipulates
>    x_first_insn and x_last_insn, using sequence_stack.
>
> gcc/
> 	* emit-rtl.h (get_insns): Strengthen return type from rtx to
> 	rtx_insn *, adding a checked cast for now.
> 	(get_last_insn): Likewise.
OK.
jeff

Re: [PATCH 020/236] Return rtx_insn from get_insns/get_last_insn

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 819 bytes --]

On Tue, 2014-08-12 at 16:01 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > Ultimately, the underlying fields should become rtx_insn *, but for now we
> > can do this with a checked cast.
> >
> > Note to self:
> >    config/m32c/m32c.c: m32c_leaf_function_p directly manipulates
> >    x_first_insn and x_last_insn, using sequence_stack.
> >
> > gcc/
> > 	* emit-rtl.h (get_insns): Strengthen return type from rtx to
> > 	rtx_insn *, adding a checked cast for now.
> > 	(get_last_insn): Likewise.
> OK.

Thanks; fixed up uses of as_a_nullable to safe_as_a, and committed to
trunk as r214180, having verified
bootstrap&regrtest on x86_64-unknown-linux-gnu (Fedora 20) albeit in
combination with patches 9-29, and verified that it builds standalone
with 10 targets.

Am attaching what I committed.



[-- Attachment #2: r214180.patch --]
[-- Type: text/x-patch, Size: 1351 bytes --]

Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214179)
+++ gcc/ChangeLog	(revision 214180)
@@ -1,5 +1,11 @@
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
 
+	* emit-rtl.h (get_insns): Strengthen return type from rtx to
+	rtx_insn *, adding a checked cast for now.
+	(get_last_insn): Likewise.
+
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
 	* rtl.h (gen_label_rtx): Strengthen return type from rtx to
 	rtx_code_label *.
 
Index: gcc/emit-rtl.h
===================================================================
--- gcc/emit-rtl.h	(revision 214179)
+++ gcc/emit-rtl.h	(revision 214180)
@@ -77,10 +77,11 @@
 
 /* Return the first insn of the current sequence or current function.  */
 
-static inline rtx
+static inline rtx_insn *
 get_insns (void)
 {
-  return crtl->emit.x_first_insn;
+  rtx insn = crtl->emit.x_first_insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Specify a new insn as the first in the chain.  */
@@ -94,10 +95,11 @@
 
 /* Return the last insn emitted in current sequence or current function.  */
 
-static inline rtx
+static inline rtx_insn *
 get_last_insn (void)
 {
-  return crtl->emit.x_last_insn;
+  rtx insn = crtl->emit.x_last_insn;
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Specify a new insn as the last in the chain.  */

[PATCH 175/236] Remove DEP_PRO/CON scaffolding

[David Malcolm]

gcc/
	* sched-int.h (struct _dep): Strengthen fields "pro" and "con"
	from rtx to rtx_insn *.
	(DEP_PRO): Delete this function and...
	(SET_DEP_PRO): ...this function in favor of...
	(DEP_PRO): ...reinstate this macro.
	(DEP_CON): Delete this function and...
	(SET_DEP_CON): ...this function in favor of...
	(DEP_CON): ...reinstate this old macro.
	(init_dep_1): Strengthen params 2 and 3 from rtx to rtx_insn *.
	(init_dep): Likewise.
	(set_priorities): Likewise for both params.
	(sd_copy_back_deps): Likewise for params 1 and 2.

	* haifa-sched.c (priority): Likewise for param "insn" and local
	"next".
	(set_priorities): Likewise for params "head" and "tail" and local
	"insn".
	(process_insn_forw_deps_be_in_spec): Likewise for param "twin" and
	local "consumer".
	(add_to_speculative_block): Add a checked cast.
	(create_check_block_twin): Drop use of SET_DEP_CON.
	(add_jump_dependencies): Strengthen params "insn" and "jump" from
	rtx to rtx_insn *.

	* sched-deps.c (init_dep_1): Likewise for params "pro" and "con".
	Drop use of SET_DEP_PRO
	(init_dep): Strengthen params "pro" and "con" from rtx to
	rtx_insn *.
	(sd_copy_back_deps): Likewise for params "to" and "from".  Drop
	use of SET_DEP_CON.
	(DEP_PRO): Delete.
	(DEP_CON): Delete.
	(SET_DEP_PRO): Delete.
	(SET_DEP_CON): Delete.

/
	* rtx-classes-status.txt: SET_DEP_PRO and SET_DEP_CON are done.
---
 gcc/haifa-sched.c      | 24 ++++++++++++------------
 gcc/sched-deps.c       | 32 ++++++--------------------------
 gcc/sched-int.h        | 18 ++++++++----------
 rtx-classes-status.txt |  1 -
 4 files changed, 26 insertions(+), 49 deletions(-)

diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 28b99de..a27e404 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -826,7 +826,7 @@ add_delay_dependencies (rtx_insn *insn)
 \f
 /* Forward declarations.  */
 
-static int priority (rtx);
+static int priority (rtx_insn *);
 static int rank_for_schedule (const void *, const void *);
 static void swap_sort (rtx_insn **, int);
 static void queue_insn (rtx_insn *, int, const char *);
@@ -875,7 +875,7 @@ static void extend_h_i_d (void);
 static void init_h_i_d (rtx);
 static int haifa_speculate_insn (rtx, ds_t, rtx *);
 static void generate_recovery_code (rtx_insn *);
-static void process_insn_forw_deps_be_in_spec (rtx, rtx, ds_t);
+static void process_insn_forw_deps_be_in_spec (rtx, rtx_insn *, ds_t);
 static void begin_speculative_block (rtx_insn *);
 static void add_to_speculative_block (rtx_insn *);
 static void init_before_recovery (basic_block *);
@@ -890,7 +890,7 @@ static void move_succs (vec<edge, va_gc> **, basic_block);
 static void sched_remove_insn (rtx_insn *);
 static void clear_priorities (rtx_insn *, rtx_vec_t *);
 static void calc_priorities (rtx_vec_t);
-static void add_jump_dependencies (rtx, rtx);
+static void add_jump_dependencies (rtx_insn *, rtx_insn *);
 
 #endif /* INSN_SCHEDULING */
 \f
@@ -1582,7 +1582,7 @@ dep_list_size (rtx insn, sd_list_types_def list)
 
 /* Compute the priority number for INSN.  */
 static int
-priority (rtx insn)
+priority (rtx_insn *insn)
 {
   if (! INSN_P (insn))
     return 0;
@@ -1631,7 +1631,7 @@ priority (rtx insn)
 
 	      FOR_EACH_DEP (twin, SD_LIST_FORW, sd_it, dep)
 		{
-		  rtx next;
+		  rtx_insn *next;
 		  int next_priority;
 
 		  next = DEP_CON (dep);
@@ -6561,9 +6561,9 @@ schedule_block (basic_block *target_bb, state_t init_state)
 /* Set_priorities: compute priority of each insn in the block.  */
 
 int
-set_priorities (rtx head, rtx tail)
+set_priorities (rtx_insn *head, rtx_insn *tail)
 {
-  rtx insn;
+  rtx_insn *insn;
   int n_insn;
   int sched_max_insns_priority =
 	current_sched_info->sched_max_insns_priority;
@@ -7281,7 +7281,7 @@ generate_recovery_code (rtx_insn *insn)
    Tries to add speculative dependencies of type FS between instructions
    in deps_list L and TWIN.  */
 static void
-process_insn_forw_deps_be_in_spec (rtx insn, rtx twin, ds_t fs)
+process_insn_forw_deps_be_in_spec (rtx insn, rtx_insn *twin, ds_t fs)
 {
   sd_iterator_def sd_it;
   dep_t dep;
@@ -7289,7 +7289,7 @@ process_insn_forw_deps_be_in_spec (rtx insn, rtx twin, ds_t fs)
   FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
     {
       ds_t ds;
-      rtx consumer;
+      rtx_insn *consumer;
 
       consumer = DEP_CON (dep);
 
@@ -7479,7 +7479,7 @@ add_to_speculative_block (rtx_insn *insn)
       {
 	dep_def _new_dep, *new_dep = &_new_dep;
 
-	init_dep (new_dep, insn, twin, REG_DEP_OUTPUT);
+	init_dep (new_dep, insn, as_a <rtx_insn *> (twin), REG_DEP_OUTPUT);
 	sd_add_dep (new_dep, false);
       }
 
@@ -7889,7 +7889,7 @@ create_check_block_twin (rtx_insn *insn, bool mutate_p)
 
       if (rec != EXIT_BLOCK_PTR_FOR_FN (cfun))
 	{
-	  SET_DEP_CON (new_dep) = twin;
+	  DEP_CON (new_dep) = twin;
 	  sd_add_dep (new_dep, false);
 	}
     }
@@ -8368,7 +8368,7 @@ calc_priorities (rtx_vec_t roots)
 /* Add dependences between JUMP and other instructions in the recovery
    block.  INSN is the first insn the recovery block.  */
 static void
-add_jump_dependencies (rtx insn, rtx jump)
+add_jump_dependencies (rtx_insn *insn, rtx_insn *jump)
 {
   do
     {
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index f299891..8e77fc8 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -101,10 +101,10 @@ dk_to_ds (enum reg_note dk)
 
 /* Init DEP with the arguments.  */
 void
-init_dep_1 (dep_t dep, rtx pro, rtx con, enum reg_note type, ds_t ds)
+init_dep_1 (dep_t dep, rtx_insn *pro, rtx_insn *con, enum reg_note type, ds_t ds)
 {
-  SET_DEP_PRO (dep) = pro;
-  SET_DEP_CON (dep) = con;
+  DEP_PRO (dep) = pro;
+  DEP_CON (dep) = con;
   DEP_TYPE (dep) = type;
   DEP_STATUS (dep) = ds;
   DEP_COST (dep) = UNKNOWN_DEP_COST;
@@ -117,7 +117,7 @@ init_dep_1 (dep_t dep, rtx pro, rtx con, enum reg_note type, ds_t ds)
    While most of the scheduler (including targets) only need the major type
    of the dependency, it is convenient to hide full dep_status from them.  */
 void
-init_dep (dep_t dep, rtx pro, rtx con, enum reg_note kind)
+init_dep (dep_t dep, rtx_insn *pro, rtx_insn *con, enum reg_note kind)
 {
   ds_t ds;
 
@@ -1403,7 +1403,7 @@ sd_unresolve_dep (sd_iterator_def sd_it)
 /* Make TO depend on all the FROM's producers.
    If RESOLVED_P is true add dependencies to the resolved lists.  */
 void
-sd_copy_back_deps (rtx to, rtx from, bool resolved_p)
+sd_copy_back_deps (rtx_insn *to, rtx_insn *from, bool resolved_p)
 {
   sd_list_types_def list_type;
   sd_iterator_def sd_it;
@@ -1416,7 +1416,7 @@ sd_copy_back_deps (rtx to, rtx from, bool resolved_p)
       dep_def _new_dep, *new_dep = &_new_dep;
 
       copy_dep (new_dep, dep);
-      SET_DEP_CON (new_dep) = to;
+      DEP_CON (new_dep) = to;
       sd_add_dep (new_dep, resolved_p);
     }
 }
@@ -4902,24 +4902,4 @@ find_modifiable_mems (rtx_insn *head, rtx_insn *tail)
 	     success_in_block);
 }
 
-rtx_insn *DEP_PRO (dep_t dep)
-{
-  return as_a_nullable <rtx_insn *> (dep->pro);
-}
-
-rtx_insn *DEP_CON (dep_t dep)
-{
-  return as_a_nullable <rtx_insn *> (dep->con);
-}
-
-rtx& SET_DEP_PRO (dep_t dep)
-{
-  return dep->pro;
-}
-
-rtx& SET_DEP_CON (dep_t dep)
-{
-  return dep->con;
-}
-
 #endif /* INSN_SCHEDULING */
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index 7ac0c8e..e7d93ffd 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -218,10 +218,10 @@ struct dep_replacement
 struct _dep
 {
   /* Producer.  */
-  rtx pro;
+  rtx_insn *pro;
 
   /* Consumer.  */
-  rtx con;
+  rtx_insn *con;
 
   /* If nonnull, holds a pointer to information about how to break the
      dependency by making a replacement in one of the insns.  There is
@@ -250,10 +250,8 @@ struct _dep
 typedef struct _dep dep_def;
 typedef dep_def *dep_t;
 
-extern rtx_insn *DEP_PRO (dep_t dep);
-extern rtx_insn *DEP_CON (dep_t dep);
-extern rtx& SET_DEP_PRO (dep_t dep);
-extern rtx& SET_DEP_CON (dep_t dep);
+#define DEP_PRO(D) ((D)->pro)
+#define DEP_CON(D) ((D)->con)
 #define DEP_TYPE(D) ((D)->type)
 #define DEP_STATUS(D) ((D)->status)
 #define DEP_COST(D) ((D)->cost)
@@ -263,8 +261,8 @@ extern rtx& SET_DEP_CON (dep_t dep);
 
 /* Functions to work with dep.  */
 
-extern void init_dep_1 (dep_t, rtx, rtx, enum reg_note, ds_t);
-extern void init_dep (dep_t, rtx, rtx, enum reg_note);
+extern void init_dep_1 (dep_t, rtx_insn *, rtx_insn *, enum reg_note, ds_t);
+extern void init_dep (dep_t, rtx_insn *, rtx_insn *, enum reg_note);
 
 extern void sd_debug_dep (dep_t);
 
@@ -1349,7 +1347,7 @@ extern int no_real_insns_p (const_rtx, const_rtx);
 extern int insn_cost (rtx);
 extern int dep_cost_1 (dep_t, dw_t);
 extern int dep_cost (dep_t);
-extern int set_priorities (rtx, rtx);
+extern int set_priorities (rtx_insn *, rtx_insn *);
 
 extern void sched_setup_bb_reg_pressure_info (basic_block, rtx);
 extern bool schedule_block (basic_block *, state_t);
@@ -1615,7 +1613,7 @@ extern void sd_add_dep (dep_t, bool);
 extern enum DEPS_ADJUST_RESULT sd_add_or_update_dep (dep_t, bool);
 extern void sd_resolve_dep (sd_iterator_def);
 extern void sd_unresolve_dep (sd_iterator_def);
-extern void sd_copy_back_deps (rtx, rtx, bool);
+extern void sd_copy_back_deps (rtx_insn *, rtx_insn *, bool);
 extern void sd_delete_dep (sd_iterator_def);
 extern void sd_debug_lists (rtx, sd_list_types_def);
 
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index 347114b..787e992 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -12,5 +12,4 @@ TODO: "Scaffolding" to be removed
 =================================
 * DF_REF_INSN
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER
-* SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
-- 
1.8.5.3

[PATCH 137/236] config/iq2000: Use rtx_insn

[David Malcolm]

gcc/
	* config/iq2000/iq2000-protos.h (final_prescan_insn): Strengthen
	first param from rtx to rtx_insn *.
	(iq2000_adjust_insn_length): Likewise.
	(iq2000_output_conditional_branch): Likewise.
	* config/iq2000/iq2000.c (final_prescan_insn): Likewise for param
	"insn" and local "nop_insn".
	(iq2000_annotate_frame_insn): Likewise for param "insn".
	(iq2000_expand_prologue): Likewise for both locals "insn".
	(iq2000_adjust_insn_length): Likewise for param "insn".
	(iq2000_output_conditional_branch): Likewise.
---
 gcc/config/iq2000/iq2000-protos.h |  7 ++++---
 gcc/config/iq2000/iq2000.c        | 18 ++++++++++--------
 2 files changed, 14 insertions(+), 11 deletions(-)

diff --git a/gcc/config/iq2000/iq2000-protos.h b/gcc/config/iq2000/iq2000-protos.h
index 6be8da9..17adef6 100644
--- a/gcc/config/iq2000/iq2000-protos.h
+++ b/gcc/config/iq2000/iq2000-protos.h
@@ -25,15 +25,16 @@ extern int              iq2000_reg_mode_ok_for_base_p (rtx, enum machine_mode, i
 extern const char *     iq2000_fill_delay_slot (const char *, enum delay_type, rtx *, rtx);
 extern const char *     iq2000_move_1word (rtx *, rtx, int);
 extern HOST_WIDE_INT    iq2000_debugger_offset (rtx, HOST_WIDE_INT);
-extern void             final_prescan_insn (rtx, rtx *, int);
+extern void             final_prescan_insn (rtx_insn *, rtx *, int);
 extern HOST_WIDE_INT    compute_frame_size (HOST_WIDE_INT);
 extern int              iq2000_initial_elimination_offset (int, int);
 extern void             iq2000_expand_prologue (void);
 extern void             iq2000_expand_epilogue (void);
 extern void             iq2000_expand_eh_return (rtx);
 extern int              iq2000_can_use_return_insn (void);
-extern int              iq2000_adjust_insn_length (rtx, int);
-extern char *           iq2000_output_conditional_branch (rtx, rtx *, int, int, int, int);
+extern int              iq2000_adjust_insn_length (rtx_insn *, int);
+extern char *           iq2000_output_conditional_branch (rtx_insn *, rtx *,
+							  int, int, int, int);
 
 #ifdef RTX_CODE
 extern rtx              gen_int_relational (enum rtx_code, rtx, rtx, rtx, int *);
diff --git a/gcc/config/iq2000/iq2000.c b/gcc/config/iq2000/iq2000.c
index 717df2e..9e7fecd 100644
--- a/gcc/config/iq2000/iq2000.c
+++ b/gcc/config/iq2000/iq2000.c
@@ -1506,7 +1506,7 @@ iq2000_debugger_offset (rtx addr, HOST_WIDE_INT offset)
    of load delays, and also to update the delay slot statistics.  */
 
 void
-final_prescan_insn (rtx insn, rtx opvec[] ATTRIBUTE_UNUSED,
+final_prescan_insn (rtx_insn *insn, rtx opvec[] ATTRIBUTE_UNUSED,
 		    int noperands ATTRIBUTE_UNUSED)
 {
   if (dslots_number_nops > 0)
@@ -1540,7 +1540,7 @@ final_prescan_insn (rtx insn, rtx opvec[] ATTRIBUTE_UNUSED,
        || (GET_CODE (PATTERN (insn)) == RETURN))
 	   && NEXT_INSN (PREV_INSN (insn)) == insn)
     {
-      rtx nop_insn = emit_insn_after (gen_nop (), insn);
+      rtx_insn *nop_insn = emit_insn_after (gen_nop (), insn);
 
       INSN_ADDRESSES_NEW (nop_insn, -1);
     }
@@ -1772,7 +1772,7 @@ iq2000_add_large_offset_to_sp (HOST_WIDE_INT offset)
    operation DWARF_PATTERN.  */
 
 static void
-iq2000_annotate_frame_insn (rtx insn, rtx dwarf_pattern)
+iq2000_annotate_frame_insn (rtx_insn *insn, rtx dwarf_pattern)
 {
   RTX_FRAME_RELATED_P (insn) = 1;
   REG_NOTES (insn) = alloc_EXPR_LIST (REG_FRAME_RELATED_EXPR,
@@ -2020,7 +2020,8 @@ iq2000_expand_prologue (void)
   if (tsize > 0)
     {
       rtx tsize_rtx = GEN_INT (tsize);
-      rtx adjustment_rtx, insn, dwarf_pattern;
+      rtx adjustment_rtx, dwarf_pattern;
+      rtx_insn *insn;
 
       if (tsize > 32767)
 	{
@@ -2043,7 +2044,7 @@ iq2000_expand_prologue (void)
 
       if (frame_pointer_needed)
 	{
-	  rtx insn = 0;
+	  rtx_insn *insn = 0;
 
 	  insn = emit_insn (gen_movsi (hard_frame_pointer_rtx,
 				       stack_pointer_rtx));
@@ -2282,7 +2283,7 @@ iq2000_pass_by_reference (cumulative_args_t cum_v, enum machine_mode mode,
    attributes in the machine-description file.  */
 
 int
-iq2000_adjust_insn_length (rtx insn, int length)
+iq2000_adjust_insn_length (rtx_insn *insn, int length)
 {
   /* A unconditional jump has an unfilled delay slot if it is not part
      of a sequence.  A conditional jump normally has a delay slot.  */
@@ -2310,8 +2311,9 @@ iq2000_adjust_insn_length (rtx insn, int length)
    reversed conditional branch around a `jr' instruction.  */
 
 char *
-iq2000_output_conditional_branch (rtx insn, rtx * operands, int two_operands_p,
-				  int float_p, int inverted_p, int length)
+iq2000_output_conditional_branch (rtx_insn *insn, rtx * operands,
+				  int two_operands_p, int float_p,
+				  int inverted_p, int length)
 {
   static char buffer[200];
   /* The kind of comparison we are doing.  */
-- 
1.8.5.3

[PATCH 142/236] config/nds32: Use rtx_insn

[David Malcolm]

gcc/
	* config/nds32/nds32-protos.h (nds32_adjust_insn_length):
	Strengthen first param from rtx to rtx_insn *.
	* config/nds32/nds32.c (nds32_adjust_insn_length): Likewise for
	param "insn".
---
 gcc/config/nds32/nds32-protos.h | 2 +-
 gcc/config/nds32/nds32.c        | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/nds32/nds32-protos.h b/gcc/config/nds32/nds32-protos.h
index 6d94027..ddcec9c 100644
--- a/gcc/config/nds32/nds32-protos.h
+++ b/gcc/config/nds32/nds32-protos.h
@@ -92,7 +92,7 @@ extern int nds32_can_use_bitci_p (int);
 
 /* Auxiliary function for 'Computing the Length of an Insn'.  */
 
-extern int nds32_adjust_insn_length (rtx, int);
+extern int nds32_adjust_insn_length (rtx_insn *, int);
 
 /* Auxiliary functions for FP_AS_GP detection.  */
 
diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c
index 47b1318..47e5ae4 100644
--- a/gcc/config/nds32/nds32.c
+++ b/gcc/config/nds32/nds32.c
@@ -4412,7 +4412,7 @@ nds32_valid_stack_push_pop (rtx op, bool push_p)
    Modifies the length assigned to instruction INSN.
    LEN is the initially computed length of the insn.  */
 int
-nds32_adjust_insn_length (rtx insn, int length)
+nds32_adjust_insn_length (rtx_insn *insn, int length)
 {
   rtx src, dst;
 
-- 
1.8.5.3

Re: [PATCH 142/236] config/nds32: Use rtx_insn

[Chung-Ju Wu]

2014-08-07 1:22 GMT+08:00 David Malcolm <dmalcolm@redhat.com>:
> gcc/
>         * config/nds32/nds32-protos.h (nds32_adjust_insn_length):
>         Strengthen first param from rtx to rtx_insn *.
>         * config/nds32/nds32.c (nds32_adjust_insn_length): Likewise for
>         param "insn".
> ---
>  gcc/config/nds32/nds32-protos.h | 2 +-
>  gcc/config/nds32/nds32.c        | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config/nds32/nds32-protos.h b/gcc/config/nds32/nds32-protos.h
> index 6d94027..ddcec9c 100644
> --- a/gcc/config/nds32/nds32-protos.h
> +++ b/gcc/config/nds32/nds32-protos.h
> @@ -92,7 +92,7 @@ extern int nds32_can_use_bitci_p (int);
>
>  /* Auxiliary function for 'Computing the Length of an Insn'.  */
>
> -extern int nds32_adjust_insn_length (rtx, int);
> +extern int nds32_adjust_insn_length (rtx_insn *, int);
>
>  /* Auxiliary functions for FP_AS_GP detection.  */
>
> diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c
> index 47b1318..47e5ae4 100644
> --- a/gcc/config/nds32/nds32.c
> +++ b/gcc/config/nds32/nds32.c
> @@ -4412,7 +4412,7 @@ nds32_valid_stack_push_pop (rtx op, bool push_p)
>     Modifies the length assigned to instruction INSN.
>     LEN is the initially computed length of the insn.  */
>  int
> -nds32_adjust_insn_length (rtx insn, int length)
> +nds32_adjust_insn_length (rtx_insn *insn, int length)
>  {
>    rtx src, dst;
>
> --

The changes in nds32 part are obvious to me.
I will check bootstrap and regression if there is any problem.

Thank you, David. :)


Best reagrds,
jasonwucj

[PATCH 090/236] loop-unroll.c: Use rtx_insn (also touches basic-block.h)

[David Malcolm]

gcc/
	* basic-block.h (basic_block split_edge_and_insert): Strengthen
	param "insns" from rtx to rtx_insn *.

	* loop-unroll.c (struct iv_to_split): Strengthen field "insn" from
	rtx to rtx_insn *.
	(struct iv_to_split): Likewise.
	(loop_exit_at_end_p): Likewise for local "insn".
	(split_edge_and_insert): Likewise for param "insns".
	(compare_and_jump_seq): Likewise for return type, param "cinsn",
	and locals "seq", "jump".
	(unroll_loop_runtime_iterations): Likewise for locals "init_code",
	"branch_code"; update invocations of compare_and_jump_seq to
	eliminate NULL_RTX in favor of NULL.
	(referenced_in_one_insn_in_loop_p): Strengthen local "insn" from
	rtx to rtx_insn *.
	(reset_debug_uses_in_loop): Likewise.
	(analyze_insn_to_expand_var): Likewise for param "insn".
	(analyze_iv_to_split_insn): Likewise.
	(analyze_insns_in_loop): Likewise for local "insn".
	(insert_base_initialization): Likewise for param
	"insn" and local "seq".
	(split_iv): Likewise for param "insn" and local "seq".
	(expand_var_during_unrolling): Likewise for param "insn".
	(insert_var_expansion_initialization): Likewise for local "seq".
	(combine_var_copies_in_loop_exit): Likewise.
	(combine_var_copies_in_loop_exit): Likewise for locals "seq" and
	"insn".
	(maybe_strip_eq_note_for_split_iv): Likewise for param "insn".
	(apply_opt_in_copies): Likewise for locals "insn", "orig_insn",
	"next".
---
 gcc/basic-block.h |  2 +-
 gcc/loop-unroll.c | 53 +++++++++++++++++++++++++++++------------------------
 2 files changed, 30 insertions(+), 25 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 172908d..18d3871 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -399,7 +399,7 @@ extern unsigned int free_bb_for_insn (void);
 extern void update_bb_for_insn (basic_block);
 
 extern void insert_insn_on_edge (rtx, edge);
-basic_block split_edge_and_insert (edge, rtx);
+basic_block split_edge_and_insert (edge, rtx_insn *);
 
 extern void commit_one_edge_insertion (edge e);
 extern void commit_edge_insertions (void);
diff --git a/gcc/loop-unroll.c b/gcc/loop-unroll.c
index c283900..67dbe8b 100644
--- a/gcc/loop-unroll.c
+++ b/gcc/loop-unroll.c
@@ -73,7 +73,7 @@ along with GCC; see the file COPYING3.  If not see
 
 struct iv_to_split
 {
-  rtx insn;		/* The insn in that the induction variable occurs.  */
+  rtx_insn *insn;	/* The insn in that the induction variable occurs.  */
   rtx orig_var;		/* The variable (register) for the IV before split.  */
   rtx base_var;		/* The variable on that the values in the further
 			   iterations are based.  */
@@ -90,7 +90,7 @@ struct iv_to_split
 
 struct var_to_expand
 {
-  rtx insn;		           /* The insn in that the variable expansion occurs.  */
+  rtx_insn *insn;	           /* The insn in that the variable expansion occurs.  */
   rtx reg;                         /* The accumulator which is expanded.  */
   vec<rtx> var_expansions;   /* The copies of the accumulator which is expanded.  */
   struct var_to_expand *next;	   /* Next entry in walking order.  */
@@ -192,10 +192,10 @@ static struct opt_info *analyze_insns_in_loop (struct loop *);
 static void opt_info_start_duplication (struct opt_info *);
 static void apply_opt_in_copies (struct opt_info *, unsigned, bool, bool);
 static void free_opt_info (struct opt_info *);
-static struct var_to_expand *analyze_insn_to_expand_var (struct loop*, rtx);
+static struct var_to_expand *analyze_insn_to_expand_var (struct loop*, rtx_insn *);
 static bool referenced_in_one_insn_in_loop_p (struct loop *, rtx, int *);
 static struct iv_to_split *analyze_iv_to_split_insn (rtx_insn *);
-static void expand_var_during_unrolling (struct var_to_expand *, rtx);
+static void expand_var_during_unrolling (struct var_to_expand *, rtx_insn *);
 static void insert_var_expansion_initialization (struct var_to_expand *,
 						 basic_block);
 static void combine_var_copies_in_loop_exit (struct var_to_expand *,
@@ -324,7 +324,7 @@ static bool
 loop_exit_at_end_p (struct loop *loop)
 {
   struct niter_desc *desc = get_simple_loop_desc (loop);
-  rtx insn;
+  rtx_insn *insn;
 
   if (desc->in_edge->dest != loop->latch)
     return false;
@@ -1012,7 +1012,7 @@ decide_unroll_runtime_iterations (struct loop *loop, int flags)
    and NULL is returned instead.  */
 
 basic_block
-split_edge_and_insert (edge e, rtx insns)
+split_edge_and_insert (edge e, rtx_insn *insns)
 {
   basic_block bb;
 
@@ -1058,11 +1058,12 @@ split_edge_and_insert (edge e, rtx insns)
    true, with probability PROB.  If CINSN is not NULL, it is the insn to copy
    in order to create a jump.  */
 
-static rtx
+static rtx_insn *
 compare_and_jump_seq (rtx op0, rtx op1, enum rtx_code comp, rtx label, int prob,
-		      rtx cinsn)
+		      rtx_insn *cinsn)
 {
-  rtx seq, jump, cond;
+  rtx_insn *seq, *jump;
+  rtx cond;
   enum machine_mode mode;
 
   mode = GET_MODE (op0);
@@ -1141,7 +1142,8 @@ compare_and_jump_seq (rtx op0, rtx op1, enum rtx_code comp, rtx label, int prob,
 static void
 unroll_loop_runtime_iterations (struct loop *loop)
 {
-  rtx old_niter, niter, init_code, branch_code, tmp;
+  rtx old_niter, niter, tmp;
+  rtx_insn *init_code, *branch_code;
   unsigned i, j, p;
   basic_block preheader, *body, swtch, ezc_swtch;
   sbitmap wont_exit;
@@ -1258,7 +1260,7 @@ unroll_loop_runtime_iterations (struct loop *loop)
       preheader = split_edge (loop_preheader_edge (loop));
       branch_code = compare_and_jump_seq (copy_rtx (niter), GEN_INT (j), EQ,
 					  block_label (preheader), p,
-					  NULL_RTX);
+					  NULL);
 
       /* We rely on the fact that the compare and jump cannot be optimized out,
 	 and hence the cfg we create is correct.  */
@@ -1281,7 +1283,7 @@ unroll_loop_runtime_iterations (struct loop *loop)
       preheader = split_edge (loop_preheader_edge (loop));
       branch_code = compare_and_jump_seq (copy_rtx (niter), const0_rtx, EQ,
 					  block_label (preheader), p,
-					  NULL_RTX);
+					  NULL);
       gcc_assert (branch_code != NULL_RTX);
 
       swtch = split_edge_and_insert (single_succ_edge (swtch), branch_code);
@@ -1689,7 +1691,7 @@ referenced_in_one_insn_in_loop_p (struct loop *loop, rtx reg,
   basic_block *body, bb;
   unsigned i;
   int count_ref = 0;
-  rtx insn;
+  rtx_insn *insn;
 
   body = get_loop_body (loop);
   for (i = 0; i < loop->num_nodes; i++)
@@ -1715,7 +1717,7 @@ reset_debug_uses_in_loop (struct loop *loop, rtx reg, int debug_uses)
 {
   basic_block *body, bb;
   unsigned i;
-  rtx insn;
+  rtx_insn *insn;
 
   body = get_loop_body (loop);
   for (i = 0; debug_uses && i < loop->num_nodes; i++)
@@ -1760,7 +1762,7 @@ reset_debug_uses_in_loop (struct loop *loop, rtx reg, int debug_uses)
 */
 
 static struct var_to_expand *
-analyze_insn_to_expand_var (struct loop *loop, rtx insn)
+analyze_insn_to_expand_var (struct loop *loop, rtx_insn *insn)
 {
   rtx set, dest, src;
   struct var_to_expand *ves;
@@ -2107,10 +2109,10 @@ allocate_basic_variable (struct iv_to_split *ivts)
    the initial value from INSN.  */
 
 static void
-insert_base_initialization (struct iv_to_split *ivts, rtx insn)
+insert_base_initialization (struct iv_to_split *ivts, rtx_insn *insn)
 {
   rtx expr = copy_rtx (*get_ivts_expr (single_set (insn), ivts));
-  rtx seq;
+  rtx_insn *seq;
 
   start_sequence ();
   expr = force_operand (expr, ivts->base_var);
@@ -2126,9 +2128,10 @@ insert_base_initialization (struct iv_to_split *ivts, rtx insn)
    by base variable + DELTA * step.  */
 
 static void
-split_iv (struct iv_to_split *ivts, rtx insn, unsigned delta)
+split_iv (struct iv_to_split *ivts, rtx_insn *insn, unsigned delta)
 {
-  rtx expr, *loc, seq, incr, var;
+  rtx expr, *loc, incr, var;
+  rtx_insn *seq;
   enum machine_mode mode = GET_MODE (ivts->base_var);
   rtx src, dest, set;
 
@@ -2208,7 +2211,7 @@ get_expansion (struct var_to_expand *ve)
    with a new register.  */
 
 static void
-expand_var_during_unrolling (struct var_to_expand *ve, rtx insn)
+expand_var_during_unrolling (struct var_to_expand *ve, rtx_insn *insn)
 {
   rtx new_reg, set;
   bool really_new_expansion = false;
@@ -2266,7 +2269,8 @@ static void
 insert_var_expansion_initialization (struct var_to_expand *ve,
 				     basic_block place)
 {
-  rtx seq, var, zero_init;
+  rtx_insn *seq;
+  rtx var, zero_init;
   unsigned i;
   enum machine_mode mode = GET_MODE (ve->reg);
   bool honor_signed_zero_p = HONOR_SIGNED_ZEROS (mode);
@@ -2317,7 +2321,8 @@ static void
 combine_var_copies_in_loop_exit (struct var_to_expand *ve, basic_block place)
 {
   rtx sum = ve->reg;
-  rtx expr, seq, var, insn;
+  rtx expr, var;
+  rtx_insn *seq, *insn;
   unsigned i;
 
   if (ve->var_expansions.length () == 0)
@@ -2368,7 +2373,7 @@ combine_var_copies_in_loop_exit (struct var_to_expand *ve, basic_block place)
    any notes attached to them.  So resort to old techniques...  */
 
 static void
-maybe_strip_eq_note_for_split_iv (struct opt_info *opt_info, rtx insn)
+maybe_strip_eq_note_for_split_iv (struct opt_info *opt_info, rtx_insn *insn)
 {
   struct iv_to_split *ivts;
   rtx note = find_reg_equal_equiv_note (insn);
@@ -2398,7 +2403,7 @@ apply_opt_in_copies (struct opt_info *opt_info,
 {
   unsigned i, delta;
   basic_block bb, orig_bb;
-  rtx insn, orig_insn, next;
+  rtx_insn *insn, *orig_insn, *next;
   struct iv_to_split ivts_templ, *ivts;
   struct var_to_expand ve_templ, *ves;
 
-- 
1.8.5.3

[PATCH 120/236] valtrack.c: Use rtx_insn

[David Malcolm]

gcc/
	* valtrack.c (dead_debug_reset_uses): Strengthen local "insn" from
	rtx to rtx_insn *.
	(dead_debug_promote_uses): Likewise.
	(dead_debug_insert_temp): Likewise.
---
 gcc/valtrack.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/valtrack.c b/gcc/valtrack.c
index 91cb0d5..977f584 100644
--- a/gcc/valtrack.c
+++ b/gcc/valtrack.c
@@ -341,7 +341,7 @@ dead_debug_reset_uses (struct dead_debug_local *debug,
   while (head)
     {
       struct dead_debug_use *next = head->next;
-      rtx insn;
+      rtx_insn *insn;
 
       insn = DF_REF_INSN (head->use);
       if (!next || DF_REF_INSN (next->use) != insn)
@@ -429,7 +429,7 @@ dead_debug_promote_uses (struct dead_debug_local *debug)
 						 REGNO (reg),
 						 &debug->to_rescan))
 	      {
-		rtx insn = DF_REF_INSN (ref);
+		rtx_insn *insn = DF_REF_INSN (ref);
 		INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
 		bitmap_set_bit (debug->to_rescan, INSN_UID (insn));
 	      }
@@ -445,7 +445,7 @@ dead_debug_promote_uses (struct dead_debug_local *debug)
 					 DEBUG_EXPR_TREE_DECL (entry->dtemp),
 					 gen_rtx_UNKNOWN_VAR_LOC (),
 					 VAR_INIT_STATUS_INITIALIZED);
-	    rtx insn = emit_debug_insn_before (bind, DF_REF_INSN (ref));
+	    rtx_insn *insn = emit_debug_insn_before (bind, DF_REF_INSN (ref));
 	    bitmap_set_bit (debug->to_rescan, INSN_UID (insn));
 	  }
 
@@ -695,7 +695,7 @@ dead_debug_insert_temp (struct dead_debug_local *debug, unsigned int uregno,
      probably doesn't make sense to introduce a new debug temp.  */
   if (where == DEBUG_TEMP_AFTER_WITH_REG && !uses->next)
     {
-      rtx next = DF_REF_INSN (uses->use);
+      rtx_insn *next = DF_REF_INSN (uses->use);
 
       if (DEBUG_INSN_P (next) && reg == INSN_VAR_LOCATION_LOC (next))
 	{
-- 
1.8.5.3

[PATCH 111/236] sched-deps.c: Use rtx_insn

[David Malcolm]

gcc/
	* sched-deps.c (maybe_add_or_update_dep_1): Strengthen locals
	"elem", "insn" from rtx to rtx_insn *.
	(change_spec_dep_to_hard): Likewise.
	(get_back_and_forw_lists): Likewise for local "con".
	(sd_add_dep): Likewise for locals "elem", "insn".
	(sd_resolve_dep): Likewise for locals "pro", "con".
	(sd_unresolve_dep): Likewise.
	(sd_delete_dep): Likewise.
	(chain_to_prev_insn): Likewise for local "pro".
	(find_inc): Likewise for locals "pro", "con".
---
 gcc/sched-deps.c | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index d59cffc..7228356 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -927,8 +927,8 @@ sd_find_dep_between (rtx pro, rtx con, bool resolved_p)
 static enum DEPS_ADJUST_RESULT
 maybe_add_or_update_dep_1 (dep_t dep, bool resolved_p, rtx mem1, rtx mem2)
 {
-  rtx elem = DEP_PRO (dep);
-  rtx insn = DEP_CON (dep);
+  rtx_insn *elem = DEP_PRO (dep);
+  rtx_insn *insn = DEP_CON (dep);
 
   gcc_assert (INSN_P (insn) && INSN_P (elem));
 
@@ -1118,8 +1118,8 @@ change_spec_dep_to_hard (sd_iterator_def sd_it)
   dep_node_t node = DEP_LINK_NODE (*sd_it.linkp);
   dep_link_t link = DEP_NODE_BACK (node);
   dep_t dep = DEP_NODE_DEP (node);
-  rtx elem = DEP_PRO (dep);
-  rtx insn = DEP_CON (dep);
+  rtx_insn *elem = DEP_PRO (dep);
+  rtx_insn *insn = DEP_CON (dep);
 
   move_dep_link (link, INSN_SPEC_BACK_DEPS (insn), INSN_HARD_BACK_DEPS (insn));
 
@@ -1296,7 +1296,7 @@ get_back_and_forw_lists (dep_t dep, bool resolved_p,
 			 deps_list_t *back_list_ptr,
 			 deps_list_t *forw_list_ptr)
 {
-  rtx con = DEP_CON (dep);
+  rtx_insn *con = DEP_CON (dep);
 
   if (!resolved_p)
     {
@@ -1322,8 +1322,8 @@ sd_add_dep (dep_t dep, bool resolved_p)
   dep_node_t n = create_dep_node ();
   deps_list_t con_back_deps;
   deps_list_t pro_forw_deps;
-  rtx elem = DEP_PRO (dep);
-  rtx insn = DEP_CON (dep);
+  rtx_insn *elem = DEP_PRO (dep);
+  rtx_insn *insn = DEP_CON (dep);
 
   gcc_assert (INSN_P (insn) && INSN_P (elem) && insn != elem);
 
@@ -1365,8 +1365,8 @@ sd_resolve_dep (sd_iterator_def sd_it)
 {
   dep_node_t node = DEP_LINK_NODE (*sd_it.linkp);
   dep_t dep = DEP_NODE_DEP (node);
-  rtx pro = DEP_PRO (dep);
-  rtx con = DEP_CON (dep);
+  rtx_insn *pro = DEP_PRO (dep);
+  rtx_insn *con = DEP_CON (dep);
 
   if (dep_spec_p (dep))
     move_dep_link (DEP_NODE_BACK (node), INSN_SPEC_BACK_DEPS (con),
@@ -1386,8 +1386,8 @@ sd_unresolve_dep (sd_iterator_def sd_it)
 {
   dep_node_t node = DEP_LINK_NODE (*sd_it.linkp);
   dep_t dep = DEP_NODE_DEP (node);
-  rtx pro = DEP_PRO (dep);
-  rtx con = DEP_CON (dep);
+  rtx_insn *pro = DEP_PRO (dep);
+  rtx_insn *con = DEP_CON (dep);
 
   if (dep_spec_p (dep))
     move_dep_link (DEP_NODE_BACK (node), INSN_RESOLVED_BACK_DEPS (con),
@@ -1428,8 +1428,8 @@ sd_delete_dep (sd_iterator_def sd_it)
 {
   dep_node_t n = DEP_LINK_NODE (*sd_it.linkp);
   dep_t dep = DEP_NODE_DEP (n);
-  rtx pro = DEP_PRO (dep);
-  rtx con = DEP_CON (dep);
+  rtx_insn *pro = DEP_PRO (dep);
+  rtx_insn *con = DEP_CON (dep);
   deps_list_t con_back_deps;
   deps_list_t pro_forw_deps;
 
@@ -1670,7 +1670,7 @@ chain_to_prev_insn (rtx insn)
   FOR_EACH_DEP (insn, SD_LIST_BACK, sd_it, dep)
     {
       rtx i = insn;
-      rtx pro = DEP_PRO (dep);
+      rtx_insn *pro = DEP_PRO (dep);
 
       do
 	{
@@ -4717,8 +4717,8 @@ find_inc (struct mem_inc_info *mii, bool backwards)
   while (sd_iterator_cond (&sd_it, &dep))
     {
       dep_node_t node = DEP_LINK_NODE (*sd_it.linkp);
-      rtx pro = DEP_PRO (dep);
-      rtx con = DEP_CON (dep);
+      rtx_insn *pro = DEP_PRO (dep);
+      rtx_insn *con = DEP_CON (dep);
       rtx inc_cand = backwards ? pro : con;
       if (DEP_NONREG (dep) || DEP_MULTIPLE (dep))
 	goto next;
-- 
1.8.5.3

[PATCH 107/236] regstat.c: Use rtx_insn

[David Malcolm]

gcc/
	* regstat.c (regstat_bb_compute_ri): Strengthen local "insn" from
	rtx to rtx_insn *.
	(regstat_bb_compute_calls_crossed): Likewise.
---
 gcc/regstat.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/regstat.c b/gcc/regstat.c
index 75d9cb4..be5d92f 100644
--- a/gcc/regstat.c
+++ b/gcc/regstat.c
@@ -121,7 +121,7 @@ regstat_bb_compute_ri (unsigned int bb_index,
 		       int *local_live_last_luid)
 {
   basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
-  rtx insn;
+  rtx_insn *insn;
   df_ref *def_rec;
   df_ref *use_rec;
   int luid = 0;
@@ -441,7 +441,7 @@ static void
 regstat_bb_compute_calls_crossed (unsigned int bb_index, bitmap live)
 {
   basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
-  rtx insn;
+  rtx_insn *insn;
   df_ref *def_rec;
   df_ref *use_rec;
 
-- 
1.8.5.3

[PATCH 200/236] Use rtx_insn_list in various places

[David Malcolm]

gcc/
	* rtl.h (free_INSN_LIST_list): Strengthen param from rtx * to
	rtx_insn_list **.
	(alloc_INSN_LIST): Strengthen return type from rtx to
	rtx_insn_list *.
	(copy_INSN_LIST): Likewise for return type and param.
	(concat_INSN_LIST): Likewise for both params and return type.
	(remove_free_INSN_LIST_elem): Strenghten first param from rtx to
	rtx_insn *.  Strengthen second param from rtx * to rtx_insn_list **.
	(remove_free_INSN_LIST_node): Strenghten return type from rtx to
	rtx_insn *.  Strengthen param from rtx * to rtx_insn_list **.

	* sched-int.h (struct deps_reg): Strengthen fields "uses", "sets",
	"implicit_sets", "control_uses", "clobbers" from rtx to
	rtx_insn_list *.
	(struct deps_desc): Likewise for fields "pending_read_insns",
	"pending_write_insns", "pending_jump_insns",
	"last_pending_memory_flush", "last_function_call",
	"last_function_call_may_noreturn", "sched_before_next_call",
	"sched_before_next_jump".
	(struct _haifa_deps_insn_data): Likewise for field "cond_deps".
	(remove_from_deps): Strengthen second param from rtx to rtx_insn *.

	* gcse.c (struct ls_expr): Strengthen fields "loads" and "stores"
	from rtx to rtx_insn_list *.
	(ldst_entry): Replace use of NULL_RTX with NULL when dealing with
	rtx_insn_list *.

	* haifa-sched.c (insn_queue): Strengthen this variable from rtx *
	to rtx_insn_list **.
	(dep_cost_1): Strengthen local "dep_cost_rtx_link" from rtx to
	rtx_insn_list *.
	(queue_insn): Likewise for local "link".
	(struct haifa_saved_data): Strengthen field "insn_queue" from
	rtx * to rtx_insn_list **.
	(save_backtrack_point): Update allocation of save->insn_queue to
	reflect the strengthening of elements from rtx to rtx_insn_list *.
	(queue_to_ready): Strengthen local "link" from rtx to
	rtx_insn_list *; use methods "next" and "insn" when traversing the
	list.
	(early_queue_to_ready): Likewise for locals "link", "next_link",
	"prev_link".
	(schedule_block): Update allocation of insn_queue to reflect the
	strengthening of elements from rtx to rtx_insn_list *.  Strengthen
	local "link" from rtx to rtx_insn_list *, and use methods when
	working it.
	(add_to_speculative_block): Strengthen locals "twins" and
	"next_node" from rtx to rtx_insn_list *, and use methods when
	working with them.  Strengthen local "twin" from rtx to
	rtx_insn *, eliminating a checked cast.
	(fix_recovery_deps): Strengthen locals "ready_list" and "link"
	from rtx to rtx_insn_list *, and use methods when working with
	them.

	* lists.c (alloc_INSN_LIST): Strengthen return type and local "r"
	from rtx to rtx_insn_list *, adding a checked cast.
	(free_INSN_LIST_list): Strengthen param "listp" from rtx * to
	rtx_insn_list **.
	(copy_INSN_LIST): Strengthen return type and locals "new_queue",
	"newlink" from rtx to rtx_insn_list *.  Strengthen local
	"pqueue" from rtx * to rtx_insn_list **.  Strengthen local "x"
	from rtx to rtx_insn *.
	(concat_INSN_LIST): Strengthen return type and local "new_rtx",
	from rtx to rtx_insn_list *.  Use methods of the latter class.
	(remove_free_INSN_LIST_elem): Strengthen param "elem" from rtx to
	rtx_insn *, and param "listp" from rtx * to rtx_insn_list **.
	(remove_free_INSN_LIST_node): Strengthen return type and local
	"elem" from rtx to rtx_insn *.  Strenghten param "listp" from
	rtx * to rtx_insn_list **.  Strengthen local "node" from rtx to
	rtx_insn_list *, using "insn" method.

	* sched-deps.c (add_dependence_list):  Strengthen param "list"
	from rtx to rtx_insn_list *, and use methods when working with it.
	(add_dependence_list_and_free):  Strengthen param "listp" from
	rtx * to rtx_insn_list **.
	(remove_from_dependence_list): Strenghten param "listp" from rtx *
	to rtx_insn_list **, and use methods when working with *listp.
	(remove_from_both_dependence_lists): Strengthen param "listp" from
	rtx * to rtx_insn_list **
	(add_insn_mem_dependence): Strengthen local "insn_list" from rtx *
	to rtx_insn_list **.  Eliminate local "link", in favor of two new
	locals "insn_node" and "mem_node", an rtx_insn_list * and an rtx
	respectively.
	(deps_analyze_insn): Split out uses 'f local "t" as an INSN_LIST
	by introducing local "cond_deps".
	(remove_from_deps): Strengthen param "insn" from rtx to
	rtx_insn *.

	* sched-rgn.c (concat_insn_mem_list): Strengthen param
	"copy_insns" and local "new_insns" from rtx to rtx_insn_list *.
	Strengthen param "old_insns_p" from rtx * to rtx_insn_list **.
	Use methods of rtx_insn_list.

	* store-motion.c (struct st_expr): Strengthen fields
	"antic_stores" and "avail_stores" from rtx to rtx_insn_list *.
	(st_expr_entry): Replace NULL_RTX with NULL when dealing with
	rtx_insn_list *.
	(find_moveable_store): Split out "tmp" into multiple more-tightly
	scoped locals.  Use methods of rtx_insn_list *.
	(compute_store_table): Strengthen local "tmp" from rtx to
	rtx_insn *.  Use methods of rtx_insn_list *.
---
 gcc/gcse.c         |  8 ++++----
 gcc/haifa-sched.c  | 58 ++++++++++++++++++++++++++++--------------------------
 gcc/lists.c        | 54 +++++++++++++++++++++++++-------------------------
 gcc/rtl.h          | 12 +++++------
 gcc/sched-deps.c   | 58 ++++++++++++++++++++++++++++++------------------------
 gcc/sched-int.h    | 30 ++++++++++++++--------------
 gcc/sched-rgn.c    | 12 ++++++-----
 gcc/store-motion.c | 24 +++++++++++-----------
 8 files changed, 134 insertions(+), 122 deletions(-)

diff --git a/gcc/gcse.c b/gcc/gcse.c
index 3d282c9..c4fec8d 100644
--- a/gcc/gcse.c
+++ b/gcc/gcse.c
@@ -347,8 +347,8 @@ struct ls_expr
   struct expr * expr;		/* Gcse expression reference for LM.  */
   rtx pattern;			/* Pattern of this mem.  */
   rtx pattern_regs;		/* List of registers mentioned by the mem.  */
-  rtx loads;			/* INSN list of loads seen.  */
-  rtx stores;			/* INSN list of stores seen.  */
+  rtx_insn_list *loads;		/* INSN list of loads seen.  */
+  rtx_insn_list *stores;	/* INSN list of stores seen.  */
   struct ls_expr * next;	/* Next in the list.  */
   int invalid;			/* Invalid for some reason.  */
   int index;			/* If it maps to a bitmap index.  */
@@ -3769,8 +3769,8 @@ ldst_entry (rtx x)
   ptr->expr         = NULL;
   ptr->pattern      = x;
   ptr->pattern_regs = NULL_RTX;
-  ptr->loads        = NULL_RTX;
-  ptr->stores       = NULL_RTX;
+  ptr->loads        = NULL;
+  ptr->stores       = NULL;
   ptr->reaching_reg = NULL_RTX;
   ptr->invalid      = 0;
   ptr->index        = 0;
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 72308da..9ae6af6 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -318,7 +318,7 @@ bool adding_bb_to_current_region_p = true;
    the base maximal time of functional unit reservations and getting a
    result.  This is the longest time an insn may be queued.  */
 
-static rtx *insn_queue;
+static rtx_insn_list **insn_queue;
 static int q_ptr = 0;
 static int q_size = 0;
 #define NEXT_Q(X) (((X)+1) & max_insn_queue_index)
@@ -1475,7 +1475,8 @@ dep_cost_1 (dep_t link, dw_t dw)
 	{
 	  /* This variable is used for backward compatibility with the
 	     targets.  */
-	  rtx dep_cost_rtx_link = alloc_INSN_LIST (NULL_RTX, NULL_RTX);
+	  rtx_insn_list *dep_cost_rtx_link =
+	    alloc_INSN_LIST (NULL_RTX, NULL);
 
 	  /* Make it self-cycled, so that if some tries to walk over this
 	     incomplete list he/she will be caught in an endless loop.  */
@@ -2727,7 +2728,7 @@ HAIFA_INLINE static void
 queue_insn (rtx_insn *insn, int n_cycles, const char *reason)
 {
   int next_q = NEXT_Q_AFTER (q_ptr, n_cycles);
-  rtx link = alloc_INSN_LIST (insn, insn_queue[next_q]);
+  rtx_insn_list *link = alloc_INSN_LIST (insn, insn_queue[next_q]);
   int new_tick;
 
   gcc_assert (n_cycles <= max_insn_queue_index);
@@ -4060,7 +4061,7 @@ struct haifa_saved_data
   /* We don't need to save q_ptr, as its value is arbitrary and we can set it
      to 0 when restoring.  */
   int q_size;
-  rtx *insn_queue;
+  rtx_insn_list **insn_queue;
 
   /* Describe pattern replacements that occurred since this backtrack point
      was queued.  */
@@ -4111,7 +4112,7 @@ save_backtrack_point (struct delay_pair *pair,
   save->ready.vec = XNEWVEC (rtx_insn *, ready.veclen);
   memcpy (save->ready.vec, ready.vec, ready.veclen * sizeof (rtx));
 
-  save->insn_queue = XNEWVEC (rtx, max_insn_queue_index + 1);
+  save->insn_queue = XNEWVEC (rtx_insn_list *, max_insn_queue_index + 1);
   save->q_size = q_size;
   for (i = 0; i <= max_insn_queue_index; i++)
     {
@@ -4874,7 +4875,7 @@ static void
 queue_to_ready (struct ready_list *ready)
 {
   rtx_insn *insn;
-  rtx link;
+  rtx_insn_list *link;
   rtx skip_insn;
 
   q_ptr = NEXT_Q (q_ptr);
@@ -4888,9 +4889,9 @@ queue_to_ready (struct ready_list *ready)
 
   /* Add all pending insns that can be scheduled without stalls to the
      ready list.  */
-  for (link = insn_queue[q_ptr]; link; link = XEXP (link, 1))
+  for (link = insn_queue[q_ptr]; link; link = link->next ())
     {
-      insn = as_a <rtx_insn *> (XEXP (link, 0));
+      insn = link->insn ();
       q_size -= 1;
 
       if (sched_verbose >= 2)
@@ -4936,7 +4937,7 @@ queue_to_ready (struct ready_list *ready)
 	{
 	  if ((link = insn_queue[NEXT_Q_AFTER (q_ptr, stalls)]))
 	    {
-	      for (; link; link = XEXP (link, 1))
+	      for (; link; link = link->next ())
 		{
 		  insn = as_a <rtx_insn *> (XEXP (link, 0));
 		  q_size -= 1;
@@ -5030,9 +5031,9 @@ static int
 early_queue_to_ready (state_t state, struct ready_list *ready)
 {
   rtx_insn *insn;
-  rtx link;
-  rtx next_link;
-  rtx prev_link;
+  rtx_insn_list *link;
+  rtx_insn_list *next_link;
+  rtx_insn_list *prev_link;
   bool move_to_ready;
   int cost;
   state_t temp_state = alloca (dfa_state_size);
@@ -5066,8 +5067,8 @@ early_queue_to_ready (state_t state, struct ready_list *ready)
 	  prev_link = 0;
 	  while (link)
 	    {
-	      next_link = XEXP (link, 1);
-	      insn = as_a <rtx_insn *> (XEXP (link, 0));
+	      next_link = link->next ();
+	      insn = link->insn ();
 	      if (insn && sched_verbose > 6)
 		print_rtl_single (sched_dump, insn);
 
@@ -5982,7 +5983,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
   q_ptr = 0;
   q_size = 0;
 
-  insn_queue = XALLOCAVEC (rtx, max_insn_queue_index + 1);
+  insn_queue = XALLOCAVEC (rtx_insn_list *, max_insn_queue_index + 1);
   memset (insn_queue, 0, (max_insn_queue_index + 1) * sizeof (rtx));
 
   /* Start just before the beginning of time.  */
@@ -6445,11 +6446,11 @@ schedule_block (basic_block *target_bb, state_t init_state)
 	}
       for (i = 0; i <= max_insn_queue_index; i++)
 	{
-	  rtx link;
+	  rtx_insn_list *link;
 	  while ((link = insn_queue[i]) != NULL)
 	    {
-	      rtx_insn *x = as_a <rtx_insn *> (XEXP (link, 0));
-	      insn_queue[i] = XEXP (link, 1);
+	      rtx_insn *x = link->insn ();
+	      insn_queue[i] = link->next ();
 	      QUEUE_INDEX (x) = QUEUE_NOWHERE;
 	      free_INSN_LIST_node (link);
 	      resolve_dependencies (x);
@@ -7363,7 +7364,7 @@ add_to_speculative_block (rtx_insn *insn)
   ds_t ts;
   sd_iterator_def sd_it;
   dep_t dep;
-  rtx twins = NULL;
+  rtx_insn_list *twins = NULL;
   rtx_vec_t priorities_roots;
 
   ts = TODO_SPEC (insn);
@@ -7474,20 +7475,21 @@ add_to_speculative_block (rtx_insn *insn)
      because that would make TWINS appear in the INSN_BACK_DEPS (INSN).  */
   while (twins)
     {
-      rtx twin;
+      rtx_insn *twin;
+      rtx_insn_list *next_node;
 
-      twin = XEXP (twins, 0);
+      twin = twins->insn ();
 
       {
 	dep_def _new_dep, *new_dep = &_new_dep;
 
-	init_dep (new_dep, insn, as_a <rtx_insn *> (twin), REG_DEP_OUTPUT);
+	init_dep (new_dep, insn, twin, REG_DEP_OUTPUT);
 	sd_add_dep (new_dep, false);
       }
 
-      twin = XEXP (twins, 1);
+      next_node = twins->next ();
       free_INSN_LIST_node (twins);
-      twins = twin;
+      twins = next_node;
     }
 
   calc_priorities (priorities_roots);
@@ -8005,9 +8007,9 @@ static void
 fix_recovery_deps (basic_block rec)
 {
   rtx_insn *note, *insn, *jump;
-  rtx ready_list = 0;
+  rtx_insn_list *ready_list = 0;
   bitmap_head in_ready;
-  rtx link;
+  rtx_insn_list *link;
 
   bitmap_initialize (&in_ready, 0);
 
@@ -8050,8 +8052,8 @@ fix_recovery_deps (basic_block rec)
   bitmap_clear (&in_ready);
 
   /* Try to add instructions to the ready or queue list.  */
-  for (link = ready_list; link; link = XEXP (link, 1))
-    try_ready (as_a <rtx_insn *> (XEXP (link, 0)));
+  for (link = ready_list; link; link = link->next ())
+    try_ready (link->insn ());
   free_INSN_LIST_list (&ready_list);
 
   /* Fixing jump's dependences.  */
diff --git a/gcc/lists.c b/gcc/lists.c
index ce545cb..5e07880 100644
--- a/gcc/lists.c
+++ b/gcc/lists.c
@@ -101,15 +101,15 @@ remove_list_elem (rtx elem, rtx *listp)
 /* This call is used in place of a gen_rtx_INSN_LIST. If there is a cached
    node available, we'll use it, otherwise a call to gen_rtx_INSN_LIST
    is made.  */
-rtx
+rtx_insn_list *
 alloc_INSN_LIST (rtx val, rtx next)
 {
-  rtx r;
+  rtx_insn_list *r;
 
   if (unused_insn_list)
     {
-      r = unused_insn_list;
-      unused_insn_list = XEXP (r, 1);
+      r = as_a <rtx_insn_list *> (unused_insn_list);
+      unused_insn_list = r->next ();
       XEXP (r, 0) = val;
       XEXP (r, 1) = next;
       PUT_REG_NOTE_KIND (r, VOIDmode);
@@ -155,39 +155,39 @@ free_EXPR_LIST_list (rtx *listp)
 
 /* This function will free up an entire list of INSN_LIST nodes.  */
 void
-free_INSN_LIST_list (rtx *listp)
+free_INSN_LIST_list (rtx_insn_list **listp)
 {
   if (*listp == 0)
     return;
-  free_list (listp, &unused_insn_list);
+  free_list ((rtx *)listp, &unused_insn_list);
 }
 
 /* Make a copy of the INSN_LIST list LINK and return it.  */
-rtx
-copy_INSN_LIST (rtx link)
+rtx_insn_list *
+copy_INSN_LIST (rtx_insn_list *link)
 {
-  rtx new_queue;
-  rtx *pqueue = &new_queue;
+  rtx_insn_list *new_queue;
+  rtx_insn_list **pqueue = &new_queue;
 
-  for (; link; link = XEXP (link, 1))
+  for (; link; link = link->next ())
     {
-      rtx x = XEXP (link, 0);
-      rtx newlink = alloc_INSN_LIST (x, NULL);
+      rtx_insn *x = link->insn ();
+      rtx_insn_list *newlink = alloc_INSN_LIST (x, NULL);
       *pqueue = newlink;
-      pqueue = &XEXP (newlink, 1);
+      pqueue = (rtx_insn_list **)&XEXP (newlink, 1);
     }
-  *pqueue = NULL_RTX;
+  *pqueue = NULL;
   return new_queue;
 }
 
 /* Duplicate the INSN_LIST elements of COPY and prepend them to OLD.  */
-rtx
-concat_INSN_LIST (rtx copy, rtx old)
+rtx_insn_list *
+concat_INSN_LIST (rtx_insn_list *copy, rtx_insn_list *old)
 {
-  rtx new_rtx = old;
-  for (; copy ; copy = XEXP (copy, 1))
+  rtx_insn_list *new_rtx = old;
+  for (; copy ; copy = copy->next ())
     {
-      new_rtx = alloc_INSN_LIST (XEXP (copy, 0), new_rtx);
+      new_rtx = alloc_INSN_LIST (copy->insn (), new_rtx);
       PUT_REG_NOTE_KIND (new_rtx, REG_NOTE_KIND (copy));
     }
   return new_rtx;
@@ -213,19 +213,19 @@ free_INSN_LIST_node (rtx ptr)
 /* Remove and free corresponding to ELEM node in the INSN_LIST pointed to
    by LISTP.  */
 void
-remove_free_INSN_LIST_elem (rtx elem, rtx *listp)
+remove_free_INSN_LIST_elem (rtx_insn *elem, rtx_insn_list **listp)
 {
-  free_INSN_LIST_node (remove_list_elem (elem, listp));
+  free_INSN_LIST_node (remove_list_elem (elem, (rtx *)listp));
 }
 
 /* Remove and free the first node in the INSN_LIST pointed to by LISTP.  */
-rtx
-remove_free_INSN_LIST_node (rtx *listp)
+rtx_insn *
+remove_free_INSN_LIST_node (rtx_insn_list **listp)
 {
-  rtx node = *listp;
-  rtx elem = XEXP (node, 0);
+  rtx_insn_list *node = *listp;
+  rtx_insn *elem = node->insn ();
 
-  remove_list_node (listp);
+  remove_list_node ((rtx *)listp);
   free_INSN_LIST_node (node);
 
   return elem;
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 1440897..327b9ac 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2752,16 +2752,16 @@ extern void subreg_get_info (unsigned int, enum machine_mode,
 /* lists.c */
 
 extern void free_EXPR_LIST_list (rtx *);
-extern void free_INSN_LIST_list (rtx *);
+extern void free_INSN_LIST_list (rtx_insn_list **);
 extern void free_EXPR_LIST_node (rtx);
 extern void free_INSN_LIST_node (rtx);
-extern rtx alloc_INSN_LIST (rtx, rtx);
-extern rtx copy_INSN_LIST (rtx);
-extern rtx concat_INSN_LIST (rtx, rtx);
+extern rtx_insn_list *alloc_INSN_LIST (rtx, rtx);
+extern rtx_insn_list *copy_INSN_LIST (rtx_insn_list *);
+extern rtx_insn_list *concat_INSN_LIST (rtx_insn_list *, rtx_insn_list *);
 extern rtx alloc_EXPR_LIST (int, rtx, rtx);
-extern void remove_free_INSN_LIST_elem (rtx, rtx *);
+extern void remove_free_INSN_LIST_elem (rtx_insn *, rtx_insn_list **);
 extern rtx remove_list_elem (rtx, rtx *);
-extern rtx remove_free_INSN_LIST_node (rtx *);
+extern rtx_insn *remove_free_INSN_LIST_node (rtx_insn_list **);
 extern rtx remove_free_EXPR_LIST_node (rtx *);
 
 
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index 4045086..7d4f6d3 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -483,9 +483,11 @@ static bool mark_as_hard;
 
 static int deps_may_trap_p (const_rtx);
 static void add_dependence_1 (rtx_insn *, rtx_insn *, enum reg_note);
-static void add_dependence_list (rtx_insn *, rtx, int, enum reg_note, bool);
+static void add_dependence_list (rtx_insn *, rtx_insn_list *, int,
+				 enum reg_note, bool);
 static void add_dependence_list_and_free (struct deps_desc *, rtx_insn *,
-					  rtx *, int, enum reg_note, bool);
+					  rtx_insn_list **, int, enum reg_note,
+					  bool);
 static void delete_all_dependences (rtx);
 static void chain_to_prev_insn (rtx_insn *);
 
@@ -1561,14 +1563,14 @@ add_dependence (rtx_insn *con, rtx_insn *pro, enum reg_note dep_type)
    true if DEP_NONREG should be set on newly created dependencies.  */
 
 static void
-add_dependence_list (rtx_insn *insn, rtx list, int uncond, enum reg_note dep_type,
-		     bool hard)
+add_dependence_list (rtx_insn *insn, rtx_insn_list *list, int uncond,
+		     enum reg_note dep_type, bool hard)
 {
   mark_as_hard = hard;
-  for (; list; list = XEXP (list, 1))
+  for (; list; list = list->next ())
     {
-      if (uncond || ! sched_insns_conditions_mutex_p (insn, XEXP (list, 0)))
-	add_dependence (insn, as_a <rtx_insn *> (XEXP (list, 0)), dep_type);
+      if (uncond || ! sched_insns_conditions_mutex_p (insn, list->insn ()))
+	add_dependence (insn, list->insn (), dep_type);
     }
   mark_as_hard = false;
 }
@@ -1578,7 +1580,8 @@ add_dependence_list (rtx_insn *insn, rtx list, int uncond, enum reg_note dep_typ
    newly created dependencies.  */
 
 static void
-add_dependence_list_and_free (struct deps_desc *deps, rtx_insn *insn, rtx *listp,
+add_dependence_list_and_free (struct deps_desc *deps, rtx_insn *insn,
+			      rtx_insn_list **listp,
                               int uncond, enum reg_note dep_type, bool hard)
 {
   add_dependence_list (insn, *listp, uncond, dep_type, hard);
@@ -1596,20 +1599,20 @@ add_dependence_list_and_free (struct deps_desc *deps, rtx_insn *insn, rtx *listp
    occurrences removed.  */
 
 static int
-remove_from_dependence_list (rtx insn, rtx* listp)
+remove_from_dependence_list (rtx insn, rtx_insn_list **listp)
 {
   int removed = 0;
 
   while (*listp)
     {
-      if (XEXP (*listp, 0) == insn)
+      if ((*listp)->insn () == insn)
         {
           remove_free_INSN_LIST_node (listp);
           removed++;
           continue;
         }
 
-      listp = &XEXP (*listp, 1);
+      listp = (rtx_insn_list **)&XEXP (*listp, 1);
     }
 
   return removed;
@@ -1617,7 +1620,9 @@ remove_from_dependence_list (rtx insn, rtx* listp)
 
 /* Same as above, but process two lists at once.  */
 static int
-remove_from_both_dependence_lists (rtx insn, rtx *listp, rtx *exprp)
+remove_from_both_dependence_lists (rtx insn,
+				   rtx_insn_list **listp,
+				   rtx *exprp)
 {
   int removed = 0;
 
@@ -1631,7 +1636,7 @@ remove_from_both_dependence_lists (rtx insn, rtx *listp, rtx *exprp)
           continue;
         }
 
-      listp = &XEXP (*listp, 1);
+      listp = (rtx_insn_list **)&XEXP (*listp, 1);
       exprp = &XEXP (*exprp, 1);
     }
 
@@ -1712,9 +1717,10 @@ static void
 add_insn_mem_dependence (struct deps_desc *deps, bool read_p,
 			 rtx_insn *insn, rtx mem)
 {
-  rtx *insn_list;
+  rtx_insn_list **insn_list;
+  rtx_insn_list *insn_node;
   rtx *mem_list;
-  rtx link;
+  rtx mem_node;
 
   gcc_assert (!deps->readonly);
   if (read_p)
@@ -1731,8 +1737,8 @@ add_insn_mem_dependence (struct deps_desc *deps, bool read_p,
       deps->pending_write_list_length++;
     }
 
-  link = alloc_INSN_LIST (insn, *insn_list);
-  *insn_list = link;
+  insn_node = alloc_INSN_LIST (insn, *insn_list);
+  *insn_list = insn_node;
 
   if (sched_deps_info->use_cselib)
     {
@@ -1740,8 +1746,8 @@ add_insn_mem_dependence (struct deps_desc *deps, bool read_p,
       XEXP (mem, 0) = cselib_subst_to_values_from_insn (XEXP (mem, 0),
 							GET_MODE (mem), insn);
     }
-  link = alloc_EXPR_LIST (VOIDmode, canon_rtx (mem), *mem_list);
-  *mem_list = link;
+  mem_node = alloc_EXPR_LIST (VOIDmode, canon_rtx (mem), *mem_list);
+  *mem_list = mem_node;
 }
 
 /* Make a dependency between every memory reference on the pending lists
@@ -3595,7 +3601,7 @@ deps_analyze_insn (struct deps_desc *deps, rtx_insn *insn)
       rtx t;
       sched_get_condition_with_rev (insn, NULL);
       t = INSN_CACHED_COND (insn);
-      INSN_COND_DEPS (insn) = NULL_RTX;
+      INSN_COND_DEPS (insn) = NULL;
       if (reload_completed
 	  && (current_sched_info->flags & DO_PREDICATION)
 	  && COMPARISON_P (t)
@@ -3604,18 +3610,18 @@ deps_analyze_insn (struct deps_desc *deps, rtx_insn *insn)
 	{
 	  unsigned int regno;
 	  int nregs;
+	  rtx_insn_list *cond_deps = NULL;
 	  t = XEXP (t, 0);
 	  regno = REGNO (t);
 	  nregs = hard_regno_nregs[regno][GET_MODE (t)];
-	  t = NULL_RTX;
 	  while (nregs-- > 0)
 	    {
 	      struct deps_reg *reg_last = &deps->reg_last[regno + nregs];
-	      t = concat_INSN_LIST (reg_last->sets, t);
-	      t = concat_INSN_LIST (reg_last->clobbers, t);
-	      t = concat_INSN_LIST (reg_last->implicit_sets, t);
+	      cond_deps = concat_INSN_LIST (reg_last->sets, cond_deps);
+	      cond_deps = concat_INSN_LIST (reg_last->clobbers, cond_deps);
+	      cond_deps = concat_INSN_LIST (reg_last->implicit_sets, cond_deps);
 	    }
-	  INSN_COND_DEPS (insn) = t;
+	  INSN_COND_DEPS (insn) = cond_deps;
 	}
     }
 
@@ -3960,7 +3966,7 @@ free_deps (struct deps_desc *deps)
 
 /* Remove INSN from dependence contexts DEPS.  */
 void
-remove_from_deps (struct deps_desc *deps, rtx insn)
+remove_from_deps (struct deps_desc *deps, rtx_insn *insn)
 {
   int removed;
   unsigned i;
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index 0332751..f8e5e74 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -449,11 +449,11 @@ enum post_call_group
 /* Insns which affect pseudo-registers.  */
 struct deps_reg
 {
-  rtx uses;
-  rtx sets;
-  rtx implicit_sets;
-  rtx control_uses;
-  rtx clobbers;
+  rtx_insn_list *uses;
+  rtx_insn_list *sets;
+  rtx_insn_list *implicit_sets;
+  rtx_insn_list *control_uses;
+  rtx_insn_list *clobbers;
   int uses_length;
   int clobbers_length;
 };
@@ -471,19 +471,19 @@ struct deps_desc
      to a list more than once.  */
 
   /* An INSN_LIST containing all insns with pending read operations.  */
-  rtx pending_read_insns;
+  rtx_insn_list *pending_read_insns;
 
   /* An EXPR_LIST containing all MEM rtx's which are pending reads.  */
   rtx pending_read_mems;
 
   /* An INSN_LIST containing all insns with pending write operations.  */
-  rtx pending_write_insns;
+  rtx_insn_list *pending_write_insns;
 
   /* An EXPR_LIST containing all MEM rtx's which are pending writes.  */
   rtx pending_write_mems;
 
   /* An INSN_LIST containing all jump insns.  */
-  rtx pending_jump_insns;
+  rtx_insn_list *pending_jump_insns;
 
   /* We must prevent the above lists from ever growing too large since
      the number of dependencies produced is at least O(N*N),
@@ -510,27 +510,27 @@ struct deps_desc
      alias analysis, this restriction can be relaxed.
      This may also be an INSN that writes memory if the pending lists grow
      too large.  */
-  rtx last_pending_memory_flush;
+  rtx_insn_list *last_pending_memory_flush;
 
   /* A list of the last function calls we have seen.  We use a list to
      represent last function calls from multiple predecessor blocks.
      Used to prevent register lifetimes from expanding unnecessarily.  */
-  rtx last_function_call;
+  rtx_insn_list *last_function_call;
 
   /* A list of the last function calls that may not return normally
      we have seen.  We use a list to represent last function calls from
      multiple predecessor blocks.  Used to prevent moving trapping insns
      across such calls.  */
-  rtx last_function_call_may_noreturn;
+  rtx_insn_list *last_function_call_may_noreturn;
 
   /* A list of insns which use a pseudo register that does not already
      cross a call.  We create dependencies between each of those insn
      and the next call insn, to ensure that they won't cross a call after
      scheduling is done.  */
-  rtx sched_before_next_call;
+  rtx_insn_list *sched_before_next_call;
 
   /* Similarly, a list of insns which should not cross a branch.  */
-  rtx sched_before_next_jump;
+  rtx_insn_list *sched_before_next_jump;
 
   /* Used to keep post-call pseudo/hard reg movements together with
      the call.  */
@@ -737,7 +737,7 @@ struct _haifa_deps_insn_data
 
   /* For a conditional insn, a list of insns that could set the condition
      register.  Used when generating control dependencies.  */
-  rtx cond_deps;
+  rtx_insn_list *cond_deps;
 
   /* True if the condition in 'cond' should be reversed to get the actual
      condition.  */
@@ -1302,7 +1302,7 @@ extern void free_deps (struct deps_desc *);
 extern void init_deps_global (void);
 extern void finish_deps_global (void);
 extern void deps_analyze_insn (struct deps_desc *, rtx_insn *);
-extern void remove_from_deps (struct deps_desc *, rtx);
+extern void remove_from_deps (struct deps_desc *, rtx_insn *);
 extern void init_insn_reg_pressure_info (rtx);
 
 extern dw_t get_dep_weak (ds_t, ds_t);
diff --git a/gcc/sched-rgn.c b/gcc/sched-rgn.c
index ceeeacc..f843c03 100644
--- a/gcc/sched-rgn.c
+++ b/gcc/sched-rgn.c
@@ -240,7 +240,8 @@ static void add_branch_dependences (rtx_insn *, rtx_insn *);
 static void compute_block_dependences (int);
 
 static void schedule_region (int);
-static void concat_insn_mem_list (rtx, rtx, rtx *, rtx *);
+static void concat_insn_mem_list (rtx_insn_list *, rtx,
+				  rtx_insn_list **, rtx *);
 static void propagate_deps (int, struct deps_desc *);
 static void free_pending_lists (void);
 
@@ -2584,17 +2585,18 @@ add_branch_dependences (rtx_insn *head, rtx_insn *tail)
 static struct deps_desc *bb_deps;
 
 static void
-concat_insn_mem_list (rtx copy_insns, rtx copy_mems, rtx *old_insns_p,
+concat_insn_mem_list (rtx_insn_list *copy_insns, rtx copy_mems,
+		      rtx_insn_list **old_insns_p,
 		      rtx *old_mems_p)
 {
-  rtx new_insns = *old_insns_p;
+  rtx_insn_list *new_insns = *old_insns_p;
   rtx new_mems = *old_mems_p;
 
   while (copy_insns)
     {
-      new_insns = alloc_INSN_LIST (XEXP (copy_insns, 0), new_insns);
+      new_insns = alloc_INSN_LIST (copy_insns->insn (), new_insns);
       new_mems = alloc_EXPR_LIST (VOIDmode, XEXP (copy_mems, 0), new_mems);
-      copy_insns = XEXP (copy_insns, 1);
+      copy_insns = copy_insns->next ();
       copy_mems = XEXP (copy_mems, 1);
     }
 
diff --git a/gcc/store-motion.c b/gcc/store-motion.c
index 567ab07..1dcc0ad 100644
--- a/gcc/store-motion.c
+++ b/gcc/store-motion.c
@@ -72,9 +72,9 @@ struct st_expr
   /* List of registers mentioned by the mem.  */
   rtx pattern_regs;
   /* INSN list of stores that are locally anticipatable.  */
-  rtx antic_stores;
+  rtx_insn_list *antic_stores;
   /* INSN list of stores that are locally available.  */
-  rtx avail_stores;
+  rtx_insn_list *avail_stores;
   /* Next in the list.  */
   struct st_expr * next;
   /* Store ID in the dataflow bitmaps.  */
@@ -156,8 +156,8 @@ st_expr_entry (rtx x)
   ptr->next         = store_motion_mems;
   ptr->pattern      = x;
   ptr->pattern_regs = NULL_RTX;
-  ptr->antic_stores = NULL_RTX;
-  ptr->avail_stores = NULL_RTX;
+  ptr->antic_stores = NULL;
+  ptr->avail_stores = NULL;
   ptr->reaching_reg = NULL_RTX;
   ptr->index        = 0;
   ptr->hash_index   = hash;
@@ -540,7 +540,7 @@ static void
 find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
 {
   struct st_expr * ptr;
-  rtx dest, set, tmp;
+  rtx dest, set;
   int check_anticipatable, check_available;
   basic_block bb = BLOCK_FOR_INSN (insn);
 
@@ -587,15 +587,16 @@ find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
     check_anticipatable = 1;
   else
     {
-      tmp = XEXP (ptr->antic_stores, 0);
+      rtx_insn *tmp = ptr->antic_stores->insn ();
       if (tmp != NULL_RTX
 	  && BLOCK_FOR_INSN (tmp) != bb)
 	check_anticipatable = 1;
     }
   if (check_anticipatable)
     {
+      rtx_insn *tmp;
       if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before))
-	tmp = NULL_RTX;
+	tmp = NULL;
       else
 	tmp = insn;
       ptr->antic_stores = alloc_INSN_LIST (tmp, ptr->antic_stores);
@@ -609,7 +610,7 @@ find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
     check_available = 1;
   else
     {
-      tmp = XEXP (ptr->avail_stores, 0);
+      rtx_insn *tmp = ptr->avail_stores->insn ();
       if (BLOCK_FOR_INSN (tmp) != bb)
 	check_available = 1;
     }
@@ -619,6 +620,7 @@ find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
 	 failed last time.  */
       if (LAST_AVAIL_CHECK_FAILURE (ptr))
 	{
+	  rtx_insn *tmp;
 	  for (tmp = BB_END (bb);
 	       tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr);
 	       tmp = PREV_INSN (tmp))
@@ -646,7 +648,7 @@ compute_store_table (void)
   unsigned regno;
 #endif
   rtx_insn *insn;
-  rtx tmp;
+  rtx_insn *tmp;
   df_ref *def_rec;
   int *last_set_in, *already_set;
   struct st_expr * ptr, **prev_next_ptr_ptr;
@@ -701,8 +703,8 @@ compute_store_table (void)
 	{
 	  LAST_AVAIL_CHECK_FAILURE (ptr) = NULL_RTX;
 	  if (ptr->antic_stores
-	      && (tmp = XEXP (ptr->antic_stores, 0)) == NULL_RTX)
-	    ptr->antic_stores = XEXP (ptr->antic_stores, 1);
+	      && (tmp = ptr->antic_stores->insn ()) == NULL_RTX)
+	    ptr->antic_stores = ptr->antic_stores->next ();
 	}
     }
 
-- 
1.8.5.3

[PATCH 159/236] Convert edge_def.insns.r to rtx_insn *

[David Malcolm]

gcc/
	* basic-block.h (struct edge_def). Strengthen "r" within
	union edge_def_insns from rtx to rtx_insn *.

	* cfgexpand.c (pass_expand::execute): Remove now-redundant cast
	from rtx to rtx_insn *.  Strengthen local "insns" from rtx to
	rtx_insn *.
	* cfgrtl.c (commit_one_edge_insertion): Remove now-redundant cast
	from rtx to rtx_insn *.
	* cprop.c (find_bypass_set): Strengthen local "insn" from rtx to
	rtx_insn *.
	* postreload-gcse.c (reg_killed_on_edge): Likewise.
	(reg_used_on_edge): Likewise.
	* tree-cfg.c (gt_ggc_mx): New overload for rtx_insn *&.
	(gt_pch_nx): New overload for rtx_insn *&.
	* tree-outof-ssa.c (expand_phi_nodes): Strengthen local "insns"
	from rtx to rtx_insn *.
---
 gcc/basic-block.h     |  2 +-
 gcc/cfgexpand.c       |  6 +++---
 gcc/cfgrtl.c          |  4 ++--
 gcc/cprop.c           |  2 +-
 gcc/postreload-gcse.c |  4 ++--
 gcc/tree-cfg.c        | 14 ++++++++++++++
 gcc/tree-outof-ssa.c  |  4 ++--
 7 files changed, 25 insertions(+), 11 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 0f55a8b..8d1c924 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -39,7 +39,7 @@ struct GTY((user)) edge_def {
   /* Instructions queued on the edge.  */
   union edge_def_insns {
     gimple_seq g;
-    rtx r;
+    rtx_insn *r;
   } insns;
 
   /* Auxiliary info specific to a pass.  */
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 731faeb..51dfe73 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -5856,14 +5856,14 @@ pass_expand::execute (function *fun)
 	{
 	  if (e->insns.r)
 	    {
-	      rebuild_jump_labels_chain (as_a <rtx_insn *> (e->insns.r));
+	      rebuild_jump_labels_chain (e->insns.r);
 	      /* Put insns after parm birth, but before
 		 NOTE_INSNS_FUNCTION_BEG.  */
 	      if (e->src == ENTRY_BLOCK_PTR_FOR_FN (fun)
 		  && single_succ_p (ENTRY_BLOCK_PTR_FOR_FN (fun)))
 		{
-		  rtx insns = e->insns.r;
-		  e->insns.r = NULL_RTX;
+		  rtx_insn *insns = e->insns.r;
+		  e->insns.r = NULL;
 		  if (NOTE_P (parm_birth_insn)
 		      && NOTE_KIND (parm_birth_insn) == NOTE_INSN_FUNCTION_BEG)
 		    emit_insn_before_noloc (insns, parm_birth_insn, e->dest);
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 1525a75..dc731aa 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -1951,8 +1951,8 @@ commit_one_edge_insertion (edge e)
   basic_block bb;
 
   /* Pull the insns off the edge now since the edge might go away.  */
-  insns = as_a_nullable <rtx_insn *> (e->insns.r);
-  e->insns.r = NULL_RTX;
+  insns = e->insns.r;
+  e->insns.r = NULL;
 
   /* Figure out where to put these insns.  If the destination has
      one predecessor, insert there.  Except for the exit block.  */
diff --git a/gcc/cprop.c b/gcc/cprop.c
index 3826b74..5fc5d11 100644
--- a/gcc/cprop.c
+++ b/gcc/cprop.c
@@ -1472,7 +1472,7 @@ find_bypass_set (int regno, int bb)
 static bool
 reg_killed_on_edge (const_rtx reg, const_edge e)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = e->insns.r; insn; insn = NEXT_INSN (insn))
     if (INSN_P (insn) && reg_set_p (reg, insn))
diff --git a/gcc/postreload-gcse.c b/gcc/postreload-gcse.c
index 73848b7..e4c598a 100644
--- a/gcc/postreload-gcse.c
+++ b/gcc/postreload-gcse.c
@@ -859,7 +859,7 @@ compute_hash_table (void)
 static bool
 reg_killed_on_edge (rtx reg, edge e)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = e->insns.r; insn; insn = NEXT_INSN (insn))
     if (INSN_P (insn) && reg_set_p (reg, insn))
@@ -876,7 +876,7 @@ reg_killed_on_edge (rtx reg, edge e)
 static bool
 reg_used_on_edge (rtx reg, edge e)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = e->insns.r; insn; insn = NEXT_INSN (insn))
     if (INSN_P (insn) && reg_overlap_mentioned_p (reg, PATTERN (insn)))
diff --git a/gcc/tree-cfg.c b/gcc/tree-cfg.c
index 126a1a9..db559f0 100644
--- a/gcc/tree-cfg.c
+++ b/gcc/tree-cfg.c
@@ -8583,6 +8583,13 @@ extern void gt_ggc_mx (gimple&);
 extern void gt_ggc_mx (rtx&);
 extern void gt_ggc_mx (basic_block&);
 
+static void
+gt_ggc_mx (rtx_insn *& x)
+{
+  if (x)
+    gt_ggc_mx_rtx_def ((void *) x);
+}
+
 void
 gt_ggc_mx (edge_def *e)
 {
@@ -8603,6 +8610,13 @@ extern void gt_pch_nx (gimple&);
 extern void gt_pch_nx (rtx&);
 extern void gt_pch_nx (basic_block&);
 
+static void
+gt_pch_nx (rtx_insn *& x)
+{
+  if (x)
+    gt_pch_nx_rtx_def ((void *) x);
+}
+
 void
 gt_pch_nx (edge_def *e)
 {
diff --git a/gcc/tree-outof-ssa.c b/gcc/tree-outof-ssa.c
index d5a635b..f397f79 100644
--- a/gcc/tree-outof-ssa.c
+++ b/gcc/tree-outof-ssa.c
@@ -958,9 +958,9 @@ expand_phi_nodes (struct ssaexpand *sa)
 	    if (e->insns.r && (e->flags & EDGE_EH)
 		&& !single_pred_p (e->dest))
 	      {
-		rtx insns = e->insns.r;
+		rtx_insn *insns = e->insns.r;
 		basic_block bb;
-		e->insns.r = NULL_RTX;
+		e->insns.r = NULL;
 		bb = split_edge (e);
 		single_pred_edge (bb)->insns.r = insns;
 	      }
-- 
1.8.5.3

[PATCH 236/236] END OF PATCHES: Delete rtx-classes-status.txt

[David Malcolm]

/
	rtx-classes-status.txt: Delete
---
 rtx-classes-status.txt | 9 ---------
 1 file changed, 9 deletions(-)
 delete mode 100644 rtx-classes-status.txt

diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
deleted file mode 100644
index 020deba..0000000
--- a/rtx-classes-status.txt
+++ /dev/null
@@ -1,9 +0,0 @@
-"git rebase" has a tendency to delete empty commits, so this dummy file
-exists to be modified by marker commits.
-
-Phase 1: initial "scaffolding" commits:            DONE
-Phase 2: per-file commits in main source dir:      DONE
-Phase 3: per-file commits within "config" subdirs: DONE
-Phase 4: removal of "scaffolding":                 DONE
-Phase 5: additional rtx_def subclasses:            DONE
-Phase 6: use extra rtx_def subclasses:             IN PROGRESS
-- 
1.8.5.3

Re: [PATCH 236/236] END OF PATCHES: Delete rtx-classes-status.txt

[Richard Henderson]

On 08/06/2014 10:23 AM, David Malcolm wrote:
> /
> 	rtx-classes-status.txt: Delete
> ---
>  rtx-classes-status.txt | 9 ---------
>  1 file changed, 9 deletions(-)
>  delete mode 100644 rtx-classes-status.txt

#230 - #236 are ok.


r~

[PATCH 191/236] Remove DF_REF_INSN scaffolding

[David Malcolm]

gcc/
	* df.h (df_dump_insn_problem_function): Strengthen first param of
	this callback from const_rtx to const rtx_insn *.
	(struct df_insn_info): Strengthen field "insn" from rtx to
	rtx_insn *.
	(DF_REF_INSN): Eliminate this function, reinstating the older
	macro definition.
	(df_find_def): Strengthen param 1 from rtx to rtx_insn *.
	(df_reg_defined): Likewise.
	(df_find_use): Likewise.
	(df_reg_used): Likewise.
	(df_dump_insn_top): Strengthen param 1 from const_rtx to
	const rtx_insn *.
	(df_dump_insn_bottom): Likewise.
	(df_insn_debug): Strengthen param 1 from rtx to rtx_insn *.
	(df_insn_debug_regno): Likewise.
	(debug_df_insn): Likewise.
	(df_rd_simulate_one_insn): Likewise for param 2.
	(df_word_lr_simulate_defs): Likewise for param 1.
	(df_word_lr_simulate_uses): Likewise.
	(df_md_simulate_one_insn): Likewise for param 2.
	(df_simulate_find_noclobber_defs): Likewise for param 1.
	(df_simulate_find_defs): Likewise.
	(df_simulate_defs): Likewise.
	(df_simulate_uses): Likewise.
	(df_simulate_one_insn_backwards): Likewise for param 2.
	(df_simulate_one_insn_forwards): Likewise.
	(df_ref_create): Likewise for param 3.
	(df_uses_create): Likewise for param 2.
	(df_insn_create_insn_record): Likewise for param 1.
	(df_insn_delete): Likewise.
	(df_insn_rescan): Likewise.
	(df_insn_rescan_debug_internal): Likewise.
	(df_insn_change_bb): Likewise.
	(df_notes_rescan): Likewise.
	* rtl.h (remove_death): Likewise for param 2.
	(print_rtl_with_bb): Strengthen param 2 from const_rtx to
	const rtx_insn *.
	* sched-int.h (reemit_notes): Strengthen param from rtx to
	rtx_insn *.
	* valtrack.h (propagate_for_debug): Likewise for param 1.

	* cfgrtl.c (print_rtl_with_bb): Strengthen param "rtx_first" and
	local "tmp_rtx" from const_rtx to const rtx_insn *.
	* combine.c (remove_death): Strengthen param "insn" from rtx to
	rtx_insn *.
	(move_deaths): Likewise for local "where_dead".
	* cse.c (delete_trivially_dead_insns): Introduce local
	"bind_var_loc" so that "bind" can be strengthened to an rtx_insn *.
	* df-core.c (df_find_def): Strengthen param "insn" from rtx to
	rtx_insn *.
	(df_reg_defined): Likewise.
	(df_find_use): Likewise.
	(df_reg_used): Likewise.
	(df_dump_insn_problem_data): Strengthen param "insn" from
	const_rtx to const rtx_insn *.
	(df_dump_insn_top): Likewise.
	(df_dump_insn_bottom): Likewise.
	(df_insn_debug): Strengthen param "insn" from rtx to rtx_insn *.
	(df_insn_debug_regno): Likewise.
	(debug_df_insn): Likewise.
	(DF_REF_INSN): Delete.
	* df-problems.c (df_rd_simulate_one_insn): Strengthen param "insn"
	from rtx to rtx_insn *.
	(df_chain_insn_top_dump): Strengthen param "insn" from
	const_rtx to const rtx_insn *.
	(df_chain_insn_bottom_dump): Likewise.
	(df_word_lr_simulate_defs): Strengthen param "insn" from rtx to
	rtx_insn *.
	(df_word_lr_simulate_uses): Likewise.
	(df_print_note): Likewise.
	(df_remove_dead_and_unused_notes): Likewise.
	(df_set_unused_notes_for_mw): Likewise.
	(df_set_dead_notes_for_mw): Likewise.
	(df_create_unused_note): Likewise.
	(df_simulate_find_defs): Likewise.
	(df_simulate_find_uses): Likewise.
	(df_simulate_find_noclobber_defs): Likewise.
	(df_simulate_defs): Likewise.
	(df_simulate_uses): Likewise.
	(df_simulate_one_insn_backwards): Likewise.
	(df_simulate_one_insn_forwards): Likewise.
	(df_md_simulate_one_insn): Likewise.
	* df-scan.c (df_uses_create): Likewise.
	(df_ref_create): Likewise.
	(df_insn_create_insn_record): Likewise.
	(df_insn_delete): Likewise.
	(df_insn_rescan): Likewise.
	(df_insn_rescan_debug_internal): Likewise.
	(df_insn_change_bb): Likewise.
	(df_notes_rescan): Likewise.
	(df_refs_add_to_chains): Likewise.
	(df_insn_refs_verify): Likewise.
	* emit-rtl.c (set_insn_deleted): Add checked cast to rtx_insn *
	when invoking df_insn_delete.
	(reorder_insns): Strengthen local "x" from rtx to rtx_insn *.
	(set_unique_reg_note): Add checked cast.
	* final.c (cleanup_subreg_operands): Likewise.
	* gcse.c (update_ld_motion_stores): Likewise, strengthening local
	"insn" from rtx to rtx_insn *.
	* haifa-sched.c (reemit_notes): Strengthen param "insn" and local
	"last" from rtx to rtx_insn *.
	* ira-emit.c (change_regs_in_insn): New function.
	(change_loop): Strengthen local "insn" from rtx to rtx_insn *.
	Invoke change_regs_in_insn rather than change_regs.
	* ira.c (update_equiv_regs): Strengthen locals "insn",
	"init_insn", "new_insn" from rtx to rtx_insn *.  Invoke
	for_each_rtx_in_insn rather than for_each_rtx.
	* recog.c (confirm_change_group): Add checked casts.
	(peep2_update_life): Strengthen local "x" from rtx to rtx_insn *.
	Add checked cast.
	(peep2_fill_buffer): Add checked cast.
	* rtlanal.c (remove_note): Likewise.
	* valtrack.c (propagate_for_debug): Strengthen param "insn" and
	locals "next" "end" from rtx to rtx_insn *.

/
	* rtx-classes-status.txt: DF_REF_INSN is done.
---
 gcc/cfgrtl.c           |  4 ++--
 gcc/combine.c          |  4 ++--
 gcc/cse.c              | 18 ++++++++-------
 gcc/df-core.c          | 26 +++++++++-------------
 gcc/df-problems.c      | 36 +++++++++++++++---------------
 gcc/df-scan.c          | 25 +++++++++++----------
 gcc/df.h               | 60 +++++++++++++++++++++++++-------------------------
 gcc/emit-rtl.c         |  6 ++---
 gcc/final.c            |  2 +-
 gcc/gcse.c             |  2 +-
 gcc/haifa-sched.c      |  5 +++--
 gcc/ira-emit.c         | 14 ++++++++++--
 gcc/ira.c              | 10 +++++----
 gcc/recog.c            | 10 ++++-----
 gcc/rtl.h              |  4 ++--
 gcc/rtlanal.c          |  2 +-
 gcc/sched-int.h        |  2 +-
 gcc/valtrack.c         |  5 +++--
 gcc/valtrack.h         |  2 +-
 rtx-classes-status.txt |  1 -
 20 files changed, 124 insertions(+), 114 deletions(-)

diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index de31e8f..0b385a1 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -2129,9 +2129,9 @@ rtl_dump_bb (FILE *outf, basic_block bb, int indent, int flags)
    in dumpfile.h.  */
 
 void
-print_rtl_with_bb (FILE *outf, const_rtx rtx_first, int flags)
+print_rtl_with_bb (FILE *outf, const rtx_insn *rtx_first, int flags)
 {
-  const_rtx tmp_rtx;
+  const rtx_insn *tmp_rtx;
   if (rtx_first == 0)
     fprintf (outf, "(nil)\n");
   else
diff --git a/gcc/combine.c b/gcc/combine.c
index 4a73e0b..cbd158c 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -12968,7 +12968,7 @@ mark_used_regs_combine (rtx x)
    Return the note used to record the death, if there was one.  */
 
 rtx
-remove_death (unsigned int regno, rtx insn)
+remove_death (unsigned int regno, rtx_insn *insn)
 {
   rtx note = find_regno_note (insn, REG_DEAD, regno);
 
@@ -12999,7 +12999,7 @@ move_deaths (rtx x, rtx maybe_kill_insn, int from_luid, rtx_insn *to_insn,
   if (code == REG)
     {
       unsigned int regno = REGNO (x);
-      rtx where_dead = reg_stat[regno].last_death;
+      rtx_insn *where_dead = reg_stat[regno].last_death;
 
       /* Don't move the register if it gets killed in between from and to.  */
       if (maybe_kill_insn && reg_set_p (x, maybe_kill_insn)
diff --git a/gcc/cse.c b/gcc/cse.c
index 9c39fea..a9fee28 100644
--- a/gcc/cse.c
+++ b/gcc/cse.c
@@ -7021,20 +7021,22 @@ delete_trivially_dead_insns (rtx_insn *insns, int nreg)
 		  && !side_effects_p (SET_SRC (set))
 		  && asm_noperands (PATTERN (insn)) < 0)
 		{
-		  rtx dval, bind;
+		  rtx dval, bind_var_loc;
+		  rtx_insn *bind;
 
 		  /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL).  */
 		  dval = make_debug_expr_from_rtl (SET_DEST (set));
 
 		  /* Emit a debug bind insn before the insn in which
 		     reg dies.  */
-		  bind = gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
-					       DEBUG_EXPR_TREE_DECL (dval),
-					       SET_SRC (set),
-					       VAR_INIT_STATUS_INITIALIZED);
-		  count_reg_usage (bind, counts + nreg, NULL_RTX, 1);
-
-		  bind = emit_debug_insn_before (bind, insn);
+		  bind_var_loc =
+		    gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
+					  DEBUG_EXPR_TREE_DECL (dval),
+					  SET_SRC (set),
+					  VAR_INIT_STATUS_INITIALIZED);
+		  count_reg_usage (bind_var_loc, counts + nreg, NULL_RTX, 1);
+
+		  bind = emit_debug_insn_before (bind_var_loc, insn);
 		  df_insn_rescan (bind);
 
 		  if (replacements == NULL)
diff --git a/gcc/df-core.c b/gcc/df-core.c
index 0267bde..69abc3d 100644
--- a/gcc/df-core.c
+++ b/gcc/df-core.c
@@ -1997,7 +1997,7 @@ df_bb_regno_last_def_find (basic_block bb, unsigned int regno)
    DF is the dataflow object.  */
 
 df_ref
-df_find_def (rtx insn, rtx reg)
+df_find_def (rtx_insn *insn, rtx reg)
 {
   unsigned int uid;
   df_ref *def_rec;
@@ -2021,7 +2021,7 @@ df_find_def (rtx insn, rtx reg)
 /* Return true if REG is defined in INSN, zero otherwise.  */
 
 bool
-df_reg_defined (rtx insn, rtx reg)
+df_reg_defined (rtx_insn *insn, rtx reg)
 {
   return df_find_def (insn, reg) != NULL;
 }
@@ -2031,7 +2031,7 @@ df_reg_defined (rtx insn, rtx reg)
    DF is the dataflow object.  */
 
 df_ref
-df_find_use (rtx insn, rtx reg)
+df_find_use (rtx_insn *insn, rtx reg)
 {
   unsigned int uid;
   df_ref *use_rec;
@@ -2061,7 +2061,7 @@ df_find_use (rtx insn, rtx reg)
 /* Return true if REG is referenced in INSN, zero otherwise.  */
 
 bool
-df_reg_used (rtx insn, rtx reg)
+df_reg_used (rtx_insn *insn, rtx reg)
 {
   return df_find_use (insn, reg) != NULL;
 }
@@ -2287,7 +2287,7 @@ df_dump_bottom (basic_block bb, FILE *file)
 
 /* Dump information about INSN just before or after dumping INSN itself.  */
 static void
-df_dump_insn_problem_data (const_rtx insn, FILE *file, bool top)
+df_dump_insn_problem_data (const rtx_insn *insn, FILE *file, bool top)
 {
   int i;
 
@@ -2315,7 +2315,7 @@ df_dump_insn_problem_data (const_rtx insn, FILE *file, bool top)
 /* Dump information about INSN before dumping INSN itself.  */
 
 void
-df_dump_insn_top (const_rtx insn, FILE *file)
+df_dump_insn_top (const rtx_insn *insn, FILE *file)
 {
   df_dump_insn_problem_data (insn,  file, /*top=*/true);
 }
@@ -2323,7 +2323,7 @@ df_dump_insn_top (const_rtx insn, FILE *file)
 /* Dump information about INSN after dumping INSN itself.  */
 
 void
-df_dump_insn_bottom (const_rtx insn, FILE *file)
+df_dump_insn_bottom (const rtx_insn *insn, FILE *file)
 {
   df_dump_insn_problem_data (insn,  file, /*top=*/false);
 }
@@ -2419,13 +2419,13 @@ df_insn_uid_debug (unsigned int uid,
 
 
 DEBUG_FUNCTION void
-df_insn_debug (rtx insn, bool follow_chain, FILE *file)
+df_insn_debug (rtx_insn *insn, bool follow_chain, FILE *file)
 {
   df_insn_uid_debug (INSN_UID (insn), follow_chain, file);
 }
 
 DEBUG_FUNCTION void
-df_insn_debug_regno (rtx insn, FILE *file)
+df_insn_debug_regno (rtx_insn *insn, FILE *file)
 {
   struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
 
@@ -2484,7 +2484,7 @@ df_ref_debug (df_ref ref, FILE *file)
 /* Functions for debugging from GDB.  */
 
 DEBUG_FUNCTION void
-debug_df_insn (rtx insn)
+debug_df_insn (rtx_insn *insn)
 {
   df_insn_debug (insn, true, stderr);
   debug_rtx (insn);
@@ -2532,9 +2532,3 @@ debug_df_chain (struct df_link *link)
   df_chain_dump (link, stderr);
   fputc ('\n', stderr);
 }
-
-rtx_insn *DF_REF_INSN (df_ref ref)
-{
-  rtx insn = ref->base.insn_info->insn;
-  return as_a_nullable <rtx_insn *> (insn);
-}
diff --git a/gcc/df-problems.c b/gcc/df-problems.c
index 6da3418..8b4dbd6 100644
--- a/gcc/df-problems.c
+++ b/gcc/df-problems.c
@@ -265,7 +265,7 @@ df_rd_simulate_artificial_defs_at_top (basic_block bb, bitmap local_rd)
    LOCAL_RD.  */
 
 void
-df_rd_simulate_one_insn (basic_block bb ATTRIBUTE_UNUSED, rtx insn,
+df_rd_simulate_one_insn (basic_block bb ATTRIBUTE_UNUSED, rtx_insn *insn,
 			 bitmap local_rd)
 {
   unsigned uid = INSN_UID (insn);
@@ -2249,7 +2249,7 @@ df_chain_bottom_dump (basic_block bb, FILE *file)
 }
 
 static void
-df_chain_insn_top_dump (const_rtx insn, FILE *file)
+df_chain_insn_top_dump (const rtx_insn *insn, FILE *file)
 {
   if (df_chain_problem_p (DF_UD_CHAIN) && INSN_P (insn))
     {
@@ -2291,7 +2291,7 @@ df_chain_insn_top_dump (const_rtx insn, FILE *file)
 }
 
 static void
-df_chain_insn_bottom_dump (const_rtx insn, FILE *file)
+df_chain_insn_bottom_dump (const rtx_insn *insn, FILE *file)
 {
   if (df_chain_problem_p (DF_DU_CHAIN) && INSN_P (insn))
     {
@@ -2750,7 +2750,7 @@ df_word_lr_add_problem (void)
    an insn.  */
 
 bool
-df_word_lr_simulate_defs (rtx insn, bitmap live)
+df_word_lr_simulate_defs (rtx_insn *insn, bitmap live)
 {
   bool changed = false;
   df_ref *def_rec;
@@ -2771,7 +2771,7 @@ df_word_lr_simulate_defs (rtx insn, bitmap live)
 /* Simulate the effects of the uses of INSN on LIVE.  */
 
 void
-df_word_lr_simulate_uses (rtx insn, bitmap live)
+df_word_lr_simulate_uses (rtx_insn *insn, bitmap live)
 {
   df_ref *use_rec;
   unsigned int uid = INSN_UID (insn);
@@ -2792,7 +2792,7 @@ df_note_alloc (bitmap all_blocks ATTRIBUTE_UNUSED)
 
 /* This is only used if REG_DEAD_DEBUGGING is in effect.  */
 static void
-df_print_note (const char *prefix, rtx insn, rtx note)
+df_print_note (const char *prefix, rtx_insn *insn, rtx note)
 {
   if (dump_file)
     {
@@ -2826,7 +2826,7 @@ df_ignore_stack_reg (int regno ATTRIBUTE_UNUSED)
 /* Remove all of the REG_DEAD or REG_UNUSED notes from INSN.  */
 
 static void
-df_remove_dead_and_unused_notes (rtx insn)
+df_remove_dead_and_unused_notes (rtx_insn *insn)
 {
   rtx *pprev = &REG_NOTES (insn);
   rtx link = *pprev;
@@ -2985,7 +2985,7 @@ df_whole_mw_reg_unused_p (struct df_mw_hardreg *mws,
 */
 
 static void
-df_set_unused_notes_for_mw (rtx insn, struct df_mw_hardreg *mws,
+df_set_unused_notes_for_mw (rtx_insn *insn, struct df_mw_hardreg *mws,
 			    bitmap live, bitmap do_not_gen,
 			    bitmap artificial_uses,
 			    struct dead_debug_local *debug)
@@ -3058,7 +3058,7 @@ df_whole_mw_reg_dead_p (struct df_mw_hardreg *mws,
    register.  */
 
 static void
-df_set_dead_notes_for_mw (rtx insn, struct df_mw_hardreg *mws,
+df_set_dead_notes_for_mw (rtx_insn *insn, struct df_mw_hardreg *mws,
 			  bitmap live, bitmap do_not_gen,
 			  bitmap artificial_uses, bool *added_notes_p)
 {
@@ -3115,7 +3115,7 @@ df_set_dead_notes_for_mw (rtx insn, struct df_mw_hardreg *mws,
    LIVE.  Do not generate notes for registers in ARTIFICIAL_USES.  */
 
 static void
-df_create_unused_note (rtx insn, df_ref def,
+df_create_unused_note (rtx_insn *insn, df_ref def,
 		       bitmap live, bitmap artificial_uses,
 		       struct dead_debug_local *debug)
 {
@@ -3473,7 +3473,7 @@ df_note_add_problem (void)
 /* Find the set of DEFs for INSN.  */
 
 void
-df_simulate_find_defs (rtx insn, bitmap defs)
+df_simulate_find_defs (rtx_insn *insn, bitmap defs)
 {
   df_ref *def_rec;
   unsigned int uid = INSN_UID (insn);
@@ -3488,7 +3488,7 @@ df_simulate_find_defs (rtx insn, bitmap defs)
 /* Find the set of uses for INSN.  This includes partial defs.  */
 
 static void
-df_simulate_find_uses (rtx insn, bitmap uses)
+df_simulate_find_uses (rtx_insn *insn, bitmap uses)
 {
   df_ref *rec;
   unsigned int uid = INSN_UID (insn);
@@ -3509,7 +3509,7 @@ df_simulate_find_uses (rtx insn, bitmap uses)
 /* Find the set of real DEFs, which are not clobbers, for INSN.  */
 
 void
-df_simulate_find_noclobber_defs (rtx insn, bitmap defs)
+df_simulate_find_noclobber_defs (rtx_insn *insn, bitmap defs)
 {
   df_ref *def_rec;
   unsigned int uid = INSN_UID (insn);
@@ -3526,7 +3526,7 @@ df_simulate_find_noclobber_defs (rtx insn, bitmap defs)
 /* Simulate the effects of the defs of INSN on LIVE.  */
 
 void
-df_simulate_defs (rtx insn, bitmap live)
+df_simulate_defs (rtx_insn *insn, bitmap live)
 {
   df_ref *def_rec;
   unsigned int uid = INSN_UID (insn);
@@ -3547,7 +3547,7 @@ df_simulate_defs (rtx insn, bitmap live)
 /* Simulate the effects of the uses of INSN on LIVE.  */
 
 void
-df_simulate_uses (rtx insn, bitmap live)
+df_simulate_uses (rtx_insn *insn, bitmap live)
 {
   df_ref *use_rec;
   unsigned int uid = INSN_UID (insn);
@@ -3619,7 +3619,7 @@ df_simulate_initialize_backwards (basic_block bb, bitmap live)
 /* Simulate the backwards effects of INSN on the bitmap LIVE.  */
 
 void
-df_simulate_one_insn_backwards (basic_block bb, rtx insn, bitmap live)
+df_simulate_one_insn_backwards (basic_block bb, rtx_insn *insn, bitmap live)
 {
   if (!NONDEBUG_INSN_P (insn))
     return;
@@ -3691,7 +3691,7 @@ df_simulate_initialize_forwards (basic_block bb, bitmap live)
 /* Simulate the forwards effects of INSN on the bitmap LIVE.  */
 
 void
-df_simulate_one_insn_forwards (basic_block bb, rtx insn, bitmap live)
+df_simulate_one_insn_forwards (basic_block bb, rtx_insn *insn, bitmap live)
 {
   rtx link;
   if (! INSN_P (insn))
@@ -4206,7 +4206,7 @@ df_md_simulate_artificial_defs_at_top (basic_block bb, bitmap local_md)
    LOCAL_MD.  */
 
 void
-df_md_simulate_one_insn (basic_block bb ATTRIBUTE_UNUSED, rtx insn,
+df_md_simulate_one_insn (basic_block bb ATTRIBUTE_UNUSED, rtx_insn *insn,
                         bitmap local_md)
 {
   unsigned uid = INSN_UID (insn);
diff --git a/gcc/df-scan.c b/gcc/df-scan.c
index 28196b3..3354f25 100644
--- a/gcc/df-scan.c
+++ b/gcc/df-scan.c
@@ -131,9 +131,10 @@ static void df_ref_chain_delete_du_chain (df_ref *);
 static void df_ref_chain_delete (df_ref *);
 
 static void df_refs_add_to_chains (struct df_collection_rec *,
-				   basic_block, rtx, unsigned int);
+				   basic_block, rtx_insn *, unsigned int);
 
-static bool df_insn_refs_verify (struct df_collection_rec *, basic_block, rtx, bool);
+static bool df_insn_refs_verify (struct df_collection_rec *, basic_block,
+				 rtx_insn *, bool);
 static void df_entry_block_defs_collect (struct df_collection_rec *, bitmap);
 static void df_exit_block_uses_collect (struct df_collection_rec *, bitmap);
 static void df_install_ref (df_ref, struct df_reg_info *,
@@ -685,7 +686,7 @@ df_scan_blocks (void)
    depending on whether LOC is inside PATTERN (INSN) or a note.  */
 
 void
-df_uses_create (rtx *loc, rtx insn, int ref_flags)
+df_uses_create (rtx *loc, rtx_insn *insn, int ref_flags)
 {
   gcc_assert (!(ref_flags & ~DF_REF_IN_NOTE));
   df_uses_record (NULL, loc, DF_REF_REG_USE,
@@ -698,7 +699,7 @@ df_uses_create (rtx *loc, rtx insn, int ref_flags)
    LOC within INSN of BB.  This function is only used externally.  */
 
 df_ref
-df_ref_create (rtx reg, rtx *loc, rtx insn,
+df_ref_create (rtx reg, rtx *loc, rtx_insn *insn,
 	       basic_block bb,
 	       enum df_ref_type ref_type,
 	       int ref_flags)
@@ -1021,7 +1022,7 @@ df_ref_remove (df_ref ref)
    out.  */
 
 struct df_insn_info *
-df_insn_create_insn_record (rtx insn)
+df_insn_create_insn_record (rtx_insn *insn)
 {
   struct df_scan_problem_data *problem_data
     = (struct df_scan_problem_data *) df_scan->problem_data;
@@ -1144,7 +1145,7 @@ df_insn_info_delete (unsigned int uid)
    or marked for later in deferred mode.  */
 
 void
-df_insn_delete (rtx insn)
+df_insn_delete (rtx_insn *insn)
 {
   unsigned int uid;
   basic_block bb;
@@ -1230,7 +1231,7 @@ df_free_collection_rec (struct df_collection_rec *collection_rec)
 /* Rescan INSN.  Return TRUE if the rescanning produced any changes.  */
 
 bool
-df_insn_rescan (rtx insn)
+df_insn_rescan (rtx_insn *insn)
 {
   unsigned int uid = INSN_UID (insn);
   struct df_insn_info *insn_info = NULL;
@@ -1320,7 +1321,7 @@ df_insn_rescan (rtx insn)
    dirty.  */
 
 bool
-df_insn_rescan_debug_internal (rtx insn)
+df_insn_rescan_debug_internal (rtx_insn *insn)
 {
   unsigned int uid = INSN_UID (insn);
   struct df_insn_info *insn_info;
@@ -1979,7 +1980,7 @@ df_maybe_reorganize_def_refs (enum df_ref_order order)
    instructions from one block to another.  */
 
 void
-df_insn_change_bb (rtx insn, basic_block new_bb)
+df_insn_change_bb (rtx_insn *insn, basic_block new_bb)
 {
   basic_block old_bb = BLOCK_FOR_INSN (insn);
   struct df_insn_info *insn_info;
@@ -2169,7 +2170,7 @@ df_mw_hardreg_chain_delete_eq_uses (struct df_insn_info *insn_info)
 /* Rescan only the REG_EQUIV/REG_EQUAL notes part of INSN.  */
 
 void
-df_notes_rescan (rtx insn)
+df_notes_rescan (rtx_insn *insn)
 {
   struct df_insn_info *insn_info;
   unsigned int uid = INSN_UID (insn);
@@ -2690,7 +2691,7 @@ df_install_mws (const vec<df_mw_hardreg_ptr, va_heap> *old_vec)
 
 static void
 df_refs_add_to_chains (struct df_collection_rec *collection_rec,
-		       basic_block bb, rtx insn, unsigned int flags)
+		       basic_block bb, rtx_insn *insn, unsigned int flags)
 {
   if (insn)
     {
@@ -4391,7 +4392,7 @@ df_mws_verify (const vec<df_mw_hardreg_ptr, va_heap> *new_rec,
 static bool
 df_insn_refs_verify (struct df_collection_rec *collection_rec,
 		     basic_block bb,
-                     rtx insn,
+                     rtx_insn *insn,
 		     bool abort_if_fail)
 {
   bool ret1, ret2, ret3, ret4;
diff --git a/gcc/df.h b/gcc/df.h
index a235996..3e80f05 100644
--- a/gcc/df.h
+++ b/gcc/df.h
@@ -239,7 +239,7 @@ typedef void (*df_dump_problem_function) (FILE *);
 typedef void (*df_dump_bb_problem_function) (basic_block, FILE *);
 
 /* Function to dump before or after an insn to FILE.  */
-typedef void (*df_dump_insn_problem_function) (const_rtx, FILE *);
+typedef void (*df_dump_insn_problem_function) (const rtx_insn *, FILE *);
 
 /* Function to dump top or bottom of basic block results to FILE.  */
 typedef void (*df_verify_solution_start) (void);
@@ -419,7 +419,7 @@ typedef union df_ref_d *df_ref;
 /* One of these structures is allocated for every insn.  */
 struct df_insn_info
 {
-  rtx insn;                     /* The insn this info comes from.  */
+  rtx_insn *insn;	                /* The insn this info comes from.  */
   df_ref *defs;	                /* Head of insn-def chain.  */
   df_ref *uses;	                /* Head of insn-use chain.  */
   /* Head of insn-use chain for uses in REG_EQUAL/EQUIV notes.  */
@@ -647,7 +647,7 @@ struct df_d
 			: BLOCK_FOR_INSN (DF_REF_INSN (REF)))
 #define DF_REF_BBNO(REF) (DF_REF_BB (REF)->index)
 #define DF_REF_INSN_INFO(REF) ((REF)->base.insn_info)
-extern rtx_insn *DF_REF_INSN (df_ref ref);
+#define DF_REF_INSN(REF) ((REF)->base.insn_info->insn)
 #define DF_REF_INSN_UID(REF) (INSN_UID (DF_REF_INSN(REF)))
 #define DF_REF_CLASS(REF) ((REF)->base.cl)
 #define DF_REF_TYPE(REF) ((REF)->base.type)
@@ -919,10 +919,10 @@ extern void df_check_cfg_clean (void);
 #endif
 extern df_ref df_bb_regno_first_def_find (basic_block, unsigned int);
 extern df_ref df_bb_regno_last_def_find (basic_block, unsigned int);
-extern df_ref df_find_def (rtx, rtx);
-extern bool df_reg_defined (rtx, rtx);
-extern df_ref df_find_use (rtx, rtx);
-extern bool df_reg_used (rtx, rtx);
+extern df_ref df_find_def (rtx_insn *, rtx);
+extern bool df_reg_defined (rtx_insn *, rtx);
+extern df_ref df_find_use (rtx_insn *, rtx);
+extern bool df_reg_used (rtx_insn *, rtx);
 extern void df_worklist_dataflow (struct dataflow *,bitmap, int *, int);
 extern void df_print_regset (FILE *file, bitmap r);
 extern void df_print_word_regset (FILE *file, bitmap r);
@@ -931,15 +931,15 @@ extern void df_dump_region (FILE *);
 extern void df_dump_start (FILE *);
 extern void df_dump_top (basic_block, FILE *);
 extern void df_dump_bottom (basic_block, FILE *);
-extern void df_dump_insn_top (const_rtx, FILE *);
-extern void df_dump_insn_bottom (const_rtx, FILE *);
+extern void df_dump_insn_top (const rtx_insn *, FILE *);
+extern void df_dump_insn_bottom (const rtx_insn *, FILE *);
 extern void df_refs_chain_dump (df_ref *, bool, FILE *);
 extern void df_regs_chain_dump (df_ref,  FILE *);
-extern void df_insn_debug (rtx, bool, FILE *);
-extern void df_insn_debug_regno (rtx, FILE *);
+extern void df_insn_debug (rtx_insn *, bool, FILE *);
+extern void df_insn_debug_regno (rtx_insn *, FILE *);
 extern void df_regno_debug (unsigned int, FILE *);
 extern void df_ref_debug (df_ref, FILE *);
-extern void debug_df_insn (rtx);
+extern void debug_df_insn (rtx_insn *);
 extern void debug_df_regno (unsigned int);
 extern void debug_df_reg (rtx);
 extern void debug_df_defno (unsigned int);
@@ -957,7 +957,7 @@ extern void df_chain_dump (struct df_link *, FILE *);
 extern void df_print_bb_index (basic_block bb, FILE *file);
 extern void df_rd_add_problem (void);
 extern void df_rd_simulate_artificial_defs_at_top (basic_block, bitmap);
-extern void df_rd_simulate_one_insn (basic_block, rtx, bitmap);
+extern void df_rd_simulate_one_insn (basic_block, rtx_insn *, bitmap);
 extern void df_lr_add_problem (void);
 extern void df_lr_verify_transfer_functions (void);
 extern void df_live_verify_transfer_functions (void);
@@ -966,23 +966,23 @@ extern void df_live_set_all_dirty (void);
 extern void df_chain_add_problem (unsigned int);
 extern void df_word_lr_add_problem (void);
 extern bool df_word_lr_mark_ref (df_ref, bool, bitmap);
-extern bool df_word_lr_simulate_defs (rtx, bitmap);
-extern void df_word_lr_simulate_uses (rtx, bitmap);
+extern bool df_word_lr_simulate_defs (rtx_insn *, bitmap);
+extern void df_word_lr_simulate_uses (rtx_insn *, bitmap);
 extern void df_word_lr_simulate_artificial_refs_at_top (basic_block, bitmap);
 extern void df_word_lr_simulate_artificial_refs_at_end (basic_block, bitmap);
 extern void df_note_add_problem (void);
 extern void df_md_add_problem (void);
 extern void df_md_simulate_artificial_defs_at_top (basic_block, bitmap);
-extern void df_md_simulate_one_insn (basic_block, rtx, bitmap);
-extern void df_simulate_find_noclobber_defs (rtx, bitmap);
-extern void df_simulate_find_defs (rtx, bitmap);
-extern void df_simulate_defs (rtx, bitmap);
-extern void df_simulate_uses (rtx, bitmap);
+extern void df_md_simulate_one_insn (basic_block, rtx_insn *, bitmap);
+extern void df_simulate_find_noclobber_defs (rtx_insn *, bitmap);
+extern void df_simulate_find_defs (rtx_insn *, bitmap);
+extern void df_simulate_defs (rtx_insn *, bitmap);
+extern void df_simulate_uses (rtx_insn *, bitmap);
 extern void df_simulate_initialize_backwards (basic_block, bitmap);
-extern void df_simulate_one_insn_backwards (basic_block, rtx, bitmap);
+extern void df_simulate_one_insn_backwards (basic_block, rtx_insn *, bitmap);
 extern void df_simulate_finalize_backwards (basic_block, bitmap);
 extern void df_simulate_initialize_forwards (basic_block, bitmap);
-extern void df_simulate_one_insn_forwards (basic_block, rtx, bitmap);
+extern void df_simulate_one_insn_forwards (basic_block, rtx_insn *, bitmap);
 extern void simulate_backwards_to_point (basic_block, regset, rtx);
 extern bool can_move_insns_across (rtx_insn *, rtx_insn *,
 				   rtx_insn *, rtx_insn *,
@@ -995,23 +995,23 @@ extern void df_scan_add_problem (void);
 extern void df_grow_reg_info (void);
 extern void df_grow_insn_info (void);
 extern void df_scan_blocks (void);
-extern df_ref df_ref_create (rtx, rtx *, rtx,basic_block,
+extern df_ref df_ref_create (rtx, rtx *, rtx_insn *, basic_block,
 			     enum df_ref_type, int ref_flags);
-extern void df_uses_create (rtx *, rtx, int);
+extern void df_uses_create (rtx *, rtx_insn *, int);
 extern void df_ref_remove (df_ref);
-extern struct df_insn_info * df_insn_create_insn_record (rtx);
-extern void df_insn_delete (rtx);
+extern struct df_insn_info * df_insn_create_insn_record (rtx_insn *);
+extern void df_insn_delete (rtx_insn *);
 extern void df_bb_refs_record (int, bool);
-extern bool df_insn_rescan (rtx);
-extern bool df_insn_rescan_debug_internal (rtx);
+extern bool df_insn_rescan (rtx_insn *);
+extern bool df_insn_rescan_debug_internal (rtx_insn *);
 extern void df_insn_rescan_all (void);
 extern void df_process_deferred_rescans (void);
 extern void df_recompute_luids (basic_block);
-extern void df_insn_change_bb (rtx, basic_block);
+extern void df_insn_change_bb (rtx_insn *, basic_block);
 extern void df_maybe_reorganize_use_refs (enum df_ref_order);
 extern void df_maybe_reorganize_def_refs (enum df_ref_order);
 extern void df_ref_change_reg_with_loc (int, int, rtx);
-extern void df_notes_rescan (rtx);
+extern void df_notes_rescan (rtx_insn *);
 extern void df_hard_reg_init (void);
 extern void df_update_entry_block_defs (void);
 extern void df_update_exit_block_uses (void);
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 0374a35..a343895 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -4030,7 +4030,7 @@ void
 set_insn_deleted (rtx insn)
 {
   if (INSN_P (insn))
-    df_insn_delete (insn);
+    df_insn_delete (as_a <rtx_insn *> (insn));
   PUT_CODE (insn, NOTE);
   NOTE_KIND (insn) = NOTE_INSN_DELETED;
 }
@@ -4214,7 +4214,7 @@ reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn *after)
   if (!BARRIER_P (after)
       && (bb = BLOCK_FOR_INSN (after)))
     {
-      rtx x;
+      rtx_insn *x;
       df_set_bb_dirty (bb);
 
       if (!BARRIER_P (from)
@@ -5171,7 +5171,7 @@ set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
     {
     case REG_EQUAL:
     case REG_EQUIV:
-      df_notes_rescan (insn);
+      df_notes_rescan (as_a <rtx_insn *> (insn));
       break;
     default:
       break;
diff --git a/gcc/final.c b/gcc/final.c
index 5e53b2e..ea22464 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -3100,7 +3100,7 @@ cleanup_subreg_operands (rtx insn)
 	*recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
     }
   if (changed)
-    df_insn_rescan (insn);
+    df_insn_rescan (as_a <rtx_insn *> (insn));
 }
 
 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
diff --git a/gcc/gcse.c b/gcc/gcse.c
index 0889e45..3d282c9 100644
--- a/gcc/gcse.c
+++ b/gcc/gcse.c
@@ -4087,7 +4087,7 @@ update_ld_motion_stores (struct expr * expr)
 
       for ( ; list != NULL_RTX; list = XEXP (list, 1))
 	{
-	  rtx insn = XEXP (list, 0);
+	  rtx_insn *insn = as_a <rtx_insn *> (XEXP (list, 0));
 	  rtx pat = PATTERN (insn);
 	  rtx src = SET_SRC (pat);
 	  rtx reg = expr->reaching_reg;
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 844124d..574c9d2 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -5171,9 +5171,10 @@ debug_ready_list (struct ready_list *ready)
    NOTEs.  This is used for NOTE_INSN_EPILOGUE_BEG, so that sched-ebb
    replaces the epilogue note in the correct basic block.  */
 void
-reemit_notes (rtx insn)
+reemit_notes (rtx_insn *insn)
 {
-  rtx note, last = insn;
+  rtx note;
+  rtx_insn *last = insn;
 
   for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
     {
diff --git a/gcc/ira-emit.c b/gcc/ira-emit.c
index 445b386..a3bf41e 100644
--- a/gcc/ira-emit.c
+++ b/gcc/ira-emit.c
@@ -301,6 +301,15 @@ change_regs (rtx *loc)
   return result;
 }
 
+static bool
+change_regs_in_insn (rtx_insn **insn_ptr)
+{
+  rtx rtx = *insn_ptr;
+  bool result = change_regs (&rtx);
+  *insn_ptr = as_a <rtx_insn *> (rtx);
+  return result;
+}
+
 /* Attach MOVE to the edge E.  The move is attached to the head of the
    list if HEAD_P is TRUE.  */
 static void
@@ -557,7 +566,8 @@ change_loop (ira_loop_tree_node_t node)
   int regno;
   bool used_p;
   ira_allocno_t allocno, parent_allocno, *map;
-  rtx insn, original_reg;
+  rtx_insn *insn;
+  rtx original_reg;
   enum reg_class aclass, pclass;
   ira_loop_tree_node_t parent;
 
@@ -568,7 +578,7 @@ change_loop (ira_loop_tree_node_t node)
       if (node->bb != NULL)
 	{
 	  FOR_BB_INSNS (node->bb, insn)
-	    if (INSN_P (insn) && change_regs (&insn))
+	    if (INSN_P (insn) && change_regs_in_insn (&insn))
 	      {
 		df_insn_rescan (insn);
 		df_notes_rescan (insn);
diff --git a/gcc/ira.c b/gcc/ira.c
index 527b927..7edf8ec 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -3422,7 +3422,7 @@ static int recorded_label_ref;
 static int
 update_equiv_regs (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   basic_block bb;
   int loop_depth;
   bitmap cleared_regs;
@@ -3448,7 +3448,8 @@ update_equiv_regs (void)
   FOR_EACH_BB_FN (bb, cfun)
     FOR_BB_INSNS (bb, insn)
       if (NONDEBUG_INSN_P (insn))
-	for_each_rtx (&insn, set_paradoxical_subreg, (void *) pdx_subregs);
+	for_each_rtx_in_insn (&insn, set_paradoxical_subreg,
+			      (void *) pdx_subregs);
 
   /* Scan the insns and find which registers have equivalences.  Do this
      in a separate scan of the insns because (due to -fcse-follow-jumps)
@@ -3719,7 +3720,8 @@ update_equiv_regs (void)
 	  && ! contains_replace_regs (XEXP (dest, 0))
 	  && ! pdx_subregs[regno])
 	{
-	  rtx init_insn = XEXP (reg_equiv[regno].init_insns, 0);
+	  rtx_insn *init_insn =
+	    as_a <rtx_insn *> (XEXP (reg_equiv[regno].init_insns, 0));
 	  if (validate_equiv_mem (init_insn, src, dest)
 	      && ! memref_used_between_p (dest, init_insn, insn)
 	      /* Attaching a REG_EQUIV note will fail if INIT_INSN has
@@ -3840,7 +3842,7 @@ update_equiv_regs (void)
 		     INSN.  Update the flow information.  */
 		  else if (prev_nondebug_insn (insn) != equiv_insn)
 		    {
-		      rtx new_insn;
+		      rtx_insn *new_insn;
 
 		      new_insn = emit_insn_before (PATTERN (equiv_insn), insn);
 		      REG_NOTES (new_insn) = REG_NOTES (equiv_insn);
diff --git a/gcc/recog.c b/gcc/recog.c
index 9f4291e..b67bd27 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -495,13 +495,13 @@ confirm_change_group (void)
       if (object)
 	{
 	  if (object != last_object && last_object && INSN_P (last_object))
-	    df_insn_rescan (last_object);
+	    df_insn_rescan (as_a <rtx_insn *> (last_object));
 	  last_object = object;
 	}
     }
 
   if (last_object && INSN_P (last_object))
-    df_insn_rescan (last_object);
+    df_insn_rescan (as_a <rtx_insn *> (last_object));
   num_changes = 0;
 }
 
@@ -3581,7 +3581,7 @@ static void
 peep2_update_life (basic_block bb, int match_len, rtx last, rtx prev)
 {
   int i = peep2_buf_position (peep2_current + match_len + 1);
-  rtx x;
+  rtx_insn *x;
   regset_head live;
 
   INIT_REG_SET (&live);
@@ -3590,7 +3590,7 @@ peep2_update_life (basic_block bb, int match_len, rtx last, rtx prev)
   gcc_assert (peep2_current_count >= match_len + 1);
   peep2_current_count -= match_len + 1;
 
-  x = last;
+  x = as_a <rtx_insn *> (last);
   do
     {
       if (INSN_P (x))
@@ -3646,7 +3646,7 @@ peep2_fill_buffer (basic_block bb, rtx insn, regset live)
   COPY_REG_SET (peep2_insn_data[pos].live_before, live);
   peep2_current_count++;
 
-  df_simulate_one_insn_forwards (bb, insn, live);
+  df_simulate_one_insn_forwards (bb, as_a <rtx_insn *> (insn), live);
   return true;
 }
 
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 4505b07..79cca1b 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3108,7 +3108,7 @@ extern bool validate_subreg (enum machine_mode, enum machine_mode,
 
 /* In combine.c  */
 extern unsigned int extended_count (const_rtx, enum machine_mode, int);
-extern rtx remove_death (unsigned int, rtx);
+extern rtx remove_death (unsigned int, rtx_insn *);
 extern void dump_combine_stats (FILE *);
 extern void dump_combine_total_stats (FILE *);
 extern rtx make_compound_operation (rtx, enum rtx_code);
@@ -3172,7 +3172,7 @@ extern HOST_WIDE_INT find_args_size_adjust (rtx);
 extern int fixup_args_size_notes (rtx, rtx, int);
 
 /* In cfgrtl.c */
-extern void print_rtl_with_bb (FILE *, const_rtx, int);
+extern void print_rtl_with_bb (FILE *, const rtx_insn *, int);
 extern rtx_insn *duplicate_insn_chain (rtx_insn *, rtx_insn *);
 
 /* In expmed.c */
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 99869a1..bbec8fe 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -2060,7 +2060,7 @@ remove_note (rtx insn, const_rtx note)
     {
     case REG_EQUAL:
     case REG_EQUIV:
-      df_notes_rescan (insn);
+      df_notes_rescan (as_a <rtx_insn *> (insn));
       break;
     default:
       break;
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index a3e9e46..2b0eb92 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -134,7 +134,7 @@ extern void sched_insns_finish (void);
 
 extern void *xrecalloc (void *, size_t, size_t, size_t);
 
-extern void reemit_notes (rtx);
+extern void reemit_notes (rtx_insn *);
 
 /* Functions in haifa-sched.c.  */
 extern int haifa_classify_insn (const_rtx);
diff --git a/gcc/valtrack.c b/gcc/valtrack.c
index 977f584..efc252e 100644
--- a/gcc/valtrack.c
+++ b/gcc/valtrack.c
@@ -177,10 +177,11 @@ propagate_for_debug_subst (rtx from, const_rtx old_rtx, void *data)
    of THIS_BASIC_BLOCK.  */
 
 void
-propagate_for_debug (rtx insn, rtx last, rtx dest, rtx src,
+propagate_for_debug (rtx_insn *insn, rtx last, rtx dest, rtx src,
 		     basic_block this_basic_block)
 {
-  rtx next, loc, end = NEXT_INSN (BB_END (this_basic_block));
+  rtx_insn *next, *end = NEXT_INSN (BB_END (this_basic_block));
+  rtx loc;
   rtx (*saved_rtl_hook_no_emit) (enum machine_mode, rtx);
 
   struct rtx_subst_pair p;
diff --git a/gcc/valtrack.h b/gcc/valtrack.h
index 7ed9ae2..495aeb8 100644
--- a/gcc/valtrack.h
+++ b/gcc/valtrack.h
@@ -149,7 +149,7 @@ extern int dead_debug_insert_temp (struct dead_debug_local *,
 				   unsigned int uregno, rtx insn,
 				   enum debug_temp_where);
 
-extern void propagate_for_debug (rtx, rtx, rtx, rtx, basic_block);
+extern void propagate_for_debug (rtx_insn *, rtx, rtx, rtx, basic_block);
 
 
 #endif /* GCC_VALTRACK_H */
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index 8d56d11..5667ae9 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -10,5 +10,4 @@ Phase 6: use extra rtx_def subclasses:             TODO
 
 TODO: "Scaffolding" to be removed
 =================================
-* DF_REF_INSN
 * SET_NEXT_INSN, SET_PREV_INSN
-- 
1.8.5.3

[PATCH 170/236] Eliminate BB_NOTE_LIST scaffolding

[David Malcolm]

gcc/
	* sel-sched-ir.h (struct sel_region_bb_info_def): Strengthen field
	"note_list" from rtx to rtx_insn *.
	(BB_NOTE_LIST): Replace this function and...
	(SET_BB_NOTE_LIST): ...this function with...
	(BB_NOTE_LIST): ...the former macro implementation.

	* sched-int.h (concat_note_lists): Strengthen param "from_end" and
	local "from_start" from rtx to rtx_insn *.  Strengthen param
	"to_endp" from rtx * to rtx_insn **.

	* haifa-sched.c (concat_note_lists): Likewise.
	* sel-sched-ir.c (init_bb): Eliminate SET_BB_NOTE_LIST in favor of
	BB_NOTE_LIST.
	(sel_restore_notes): Likewise.
	(move_bb_info): Likewise.
	(BB_NOTE_LIST): Delete this function.
	(SET_BB_NOTE_LIST): Delete this function.
	* sel-sched.c (create_block_for_bookkeeping): Eliminate
	SET_BB_NOTE_LIST in favor of BB_NOTE_LIST.

/
	* rtx-classes-status.txt: Remove SET_BB_NOTE_LIST.
---
 gcc/haifa-sched.c      |  4 ++--
 gcc/sched-int.h        |  2 +-
 gcc/sel-sched-ir.c     | 19 ++++---------------
 gcc/sel-sched-ir.h     |  5 ++---
 gcc/sel-sched.c        |  4 ++--
 rtx-classes-status.txt |  1 -
 6 files changed, 11 insertions(+), 24 deletions(-)

diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 256c198..132d9a2 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -3953,9 +3953,9 @@ schedule_insn (rtx_insn *insn)
 
 /* Add note list that ends on FROM_END to the end of TO_ENDP.  */
 void
-concat_note_lists (rtx from_end, rtx *to_endp)
+concat_note_lists (rtx_insn *from_end, rtx_insn **to_endp)
 {
-  rtx from_start;
+  rtx_insn *from_start;
 
   /* It's easy when have nothing to concat.  */
   if (from_end == NULL)
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index 2e52722..9f2a3e4 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -1370,7 +1370,7 @@ extern int sched_speculate_insn (rtx, ds_t, rtx *);
 extern void unlink_bb_notes (basic_block, basic_block);
 extern void add_block (basic_block, basic_block);
 extern rtx_note *bb_note (basic_block);
-extern void concat_note_lists (rtx, rtx *);
+extern void concat_note_lists (rtx_insn *, rtx_insn **);
 extern rtx_insn *sched_emit_insn (rtx);
 extern rtx get_ready_element (int);
 extern int number_in_ready (void);
diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 5d4c12c..8493481 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -4628,7 +4628,7 @@ static void
 init_bb (basic_block bb)
 {
   remove_notes (bb_note (bb), BB_END (bb));
-  SET_BB_NOTE_LIST (bb) = note_list;
+  BB_NOTE_LIST (bb) = note_list;
 }
 
 void
@@ -4663,7 +4663,7 @@ sel_restore_notes (void)
 	{
 	  note_list = BB_NOTE_LIST (first);
 	  restore_other_notes (NULL, first);
-	  SET_BB_NOTE_LIST (first) = NULL_RTX;
+	  BB_NOTE_LIST (first) = NULL;
 
 	  FOR_BB_INSNS (first, insn)
 	    if (NONDEBUG_INSN_P (insn))
@@ -5271,8 +5271,8 @@ move_bb_info (basic_block merge_bb, basic_block empty_bb)
 {
   if (in_current_region_p (merge_bb))
     concat_note_lists (BB_NOTE_LIST (empty_bb),
-		       &SET_BB_NOTE_LIST (merge_bb));
-  SET_BB_NOTE_LIST (empty_bb) = NULL_RTX;
+		       &BB_NOTE_LIST (merge_bb));
+  BB_NOTE_LIST (empty_bb) = NULL;
 
 }
 
@@ -6461,17 +6461,6 @@ rtx& SET_VINSN_INSN_RTX (vinsn_t vi)
   return vi->insn_rtx;
 }
 
-rtx_insn *BB_NOTE_LIST (basic_block bb)
-{
-  rtx note_list = SEL_REGION_BB_INFO (bb)->note_list;
-  return as_a_nullable <rtx_insn *> (note_list);
-}
-
-rtx& SET_BB_NOTE_LIST (basic_block bb)
-{
-  return SEL_REGION_BB_INFO (bb)->note_list;
-}
-
 rtx_insn *BND_TO (bnd_t bnd)
 {
   return as_a_nullable <rtx_insn *> (bnd->to);
diff --git a/gcc/sel-sched-ir.h b/gcc/sel-sched-ir.h
index d2bf7e2..2af7f03 100644
--- a/gcc/sel-sched-ir.h
+++ b/gcc/sel-sched-ir.h
@@ -898,7 +898,7 @@ struct sel_region_bb_info_def
 {
   /* This insn stream is constructed in such a way that it should be
      traversed by PREV_INSN field - (*not* NEXT_INSN).  */
-  rtx note_list;
+  rtx_insn *note_list;
 
   /* Cached availability set at the beginning of a block.
      See also AV_LEVEL () for conditions when this av_set can be used.  */
@@ -921,8 +921,7 @@ extern vec<sel_region_bb_info_def> sel_region_bb_info;
    A note_list is a list of various notes that was scattered across BB
    before scheduling, and will be appended at the beginning of BB after
    scheduling is finished.  */
-extern rtx_insn *BB_NOTE_LIST (basic_block);
-extern rtx& SET_BB_NOTE_LIST (basic_block);
+#define BB_NOTE_LIST(BB) (SEL_REGION_BB_INFO (BB)->note_list)
 
 #define BB_AV_SET(BB) (SEL_REGION_BB_INFO (BB)->av_set)
 #define BB_AV_LEVEL(BB) (SEL_REGION_BB_INFO (BB)->av_level)
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index fe82a78..9cd23ef 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -4593,8 +4593,8 @@ create_block_for_bookkeeping (edge e1, edge e2)
 
   /* Move note_list from the upper bb.  */
   gcc_assert (BB_NOTE_LIST (new_bb) == NULL_RTX);
-  SET_BB_NOTE_LIST (new_bb) = BB_NOTE_LIST (bb);
-  SET_BB_NOTE_LIST (bb) = NULL_RTX;
+  BB_NOTE_LIST (new_bb) = BB_NOTE_LIST (bb);
+  BB_NOTE_LIST (bb) = NULL;
 
   gcc_assert (e2->dest == bb);
 
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index d26dd89..84d53ba 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -12,7 +12,6 @@ TODO: "Scaffolding" to be removed
 =================================
 * DF_REF_INSN
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER
-* SET_BB_NOTE_LIST
 * SET_BND_TO
 * SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
-- 
1.8.5.3

[PATCH 182/236] get_last_insn_anywhere returns an rtx_insn

[David Malcolm]

gcc/
	* rtl.h (get_last_insn_anywhere): Strengthen return type from rtx
	to rtx_insn*.
	* emit-rtl.c (get_last_insn_anywhere): Likewise.
---
 gcc/emit-rtl.c | 2 +-
 gcc/rtl.h      | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 2d0f506..64ae70f 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3078,7 +3078,7 @@ make_safe_from (rtx x, rtx other)
 
 /* Return the last insn emitted, even if it is in a sequence now pushed.  */
 
-rtx
+rtx_insn *
 get_last_insn_anywhere (void)
 {
   struct sequence_stack *stack;
diff --git a/gcc/rtl.h b/gcc/rtl.h
index d6bb252..f982fd6 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2336,7 +2336,7 @@ extern rtx convert_memory_address_addr_space (enum machine_mode, rtx,
 #define convert_memory_address(to_mode,x) \
 	convert_memory_address_addr_space ((to_mode), (x), ADDR_SPACE_GENERIC)
 extern const char *get_insn_name (int);
-extern rtx get_last_insn_anywhere (void);
+extern rtx_insn *get_last_insn_anywhere (void);
 extern rtx get_first_nonnote_insn (void);
 extern rtx get_last_nonnote_insn (void);
 extern void start_sequence (void);
-- 
1.8.5.3

[PATCH 217/236] Add JUMP_LABEL_AS_INSN

[David Malcolm]

JUMP_LABEL(X) is not always an insn, but often is.  Add a variant that
adds a checked cast.

gcc/
	* rtl.h (JUMP_LABEL_AS_INSN): New.
---
 gcc/rtl.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/gcc/rtl.h b/gcc/rtl.h
index 1f1caaf..7a8e592 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -1681,6 +1681,11 @@ enum label_kind
    be set to simple_return_rtx, a SIMPLE_RETURN.  */
 #define JUMP_LABEL(INSN)   XCEXP (INSN, 7, JUMP_INSN)
 
+inline rtx_insn *JUMP_LABEL_AS_INSN (rtx_insn *insn)
+{
+  return as_a_nullable <rtx_insn *> (JUMP_LABEL (insn));
+}
+
 /* Once basic blocks are found, each CODE_LABEL starts a chain that
    goes through all the LABEL_REFs that jump to that label.  The chain
    eventually winds up at the CODE_LABEL: it is circular.  */
-- 
1.8.5.3

[PATCH 201/236] Introduce rtx_sequence subclass of rtx_def

[David Malcolm]

gcc/
	* coretypes.h (class rtx_sequence): Add forward declaration.
	* rtl.h (class rtx_sequence): New subclass of rtx_def, adding
	invariant: GET_CODE (X) == SEQUENCE.
	(is_a_helper <rtx_sequence *>::test): New.
	(is_a_helper <const rtx_sequence *>::test): New.
	(rtx_sequence::len): New.
	(rtx_sequence::element): New.
	(rtx_sequence::insn): New.
---
 gcc/coretypes.h |  1 +
 gcc/rtl.h       | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 53 insertions(+)

diff --git a/gcc/coretypes.h b/gcc/coretypes.h
index 574d378..02cac5a 100644
--- a/gcc/coretypes.h
+++ b/gcc/coretypes.h
@@ -61,6 +61,7 @@ typedef const struct rtx_def *const_rtx;
    Where possible, keep this list in the same order as in rtl.def.  */
 class rtx_def;
   class rtx_insn_list;           /* GET_CODE (X) == INSN_LIST */
+  class rtx_sequence;            /* GET_CODE (X) == SEQUENCE */
   class rtx_insn;
     class rtx_real_insn;         /* INSN_P (X) */
       class rtx_debug_insn;      /* DEBUG_INSN_P (X) */
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 327b9ac..ed736cc 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -431,6 +431,41 @@ is_a_helper <rtx_insn_list *>::test (rtx rt)
   return rt->code == INSN_LIST;
 }
 
+/* A node with invariant GET_CODE (X) == SEQUENCE i.e. a vector of rtx,
+   typically (but not always) of rtx_insn *, used in the late passes.  */
+
+class GTY(()) rtx_sequence : public rtx_def
+{
+  /* No extra fields, but adds invariant: (GET_CODE (X) == SEQUENCE).  */
+
+public:
+  /* Get number of elements in sequence.  */
+  int len () const;
+
+  /* Get i-th element of the sequence.  */
+  rtx element (int index) const;
+
+  /* Get i-th element of the sequence, with a checked cast to
+     rtx_insn *.  */
+  rtx_insn *insn (int index) const;
+};
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_sequence *>::test (rtx rt)
+{
+  return rt->code == SEQUENCE;
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <const rtx_sequence *>::test (const_rtx rt)
+{
+  return rt->code == SEQUENCE;
+}
+
 class GTY(()) rtx_insn : public rtx_def
 {
   /* No extra fields, but adds the invariant:
@@ -1231,6 +1266,23 @@ inline rtx_insn *rtx_insn_list::insn () const
   return as_a_nullable <rtx_insn *> (tmp);
 }
 
+/* Methods of rtx_sequence.  */
+
+inline int rtx_sequence::len () const
+{
+  return XVECLEN (this, 0);
+}
+
+inline rtx rtx_sequence::element (int index) const
+{
+  return XVECEXP (this, 0, index);
+}
+
+inline rtx_insn *rtx_sequence::insn (int index) const
+{
+  return as_a <rtx_insn *> (XVECEXP (this, 0, index));
+}
+
 /* ACCESS MACROS for particular fields of insns.  */
 
 /* Holds a unique number for each insn.
-- 
1.8.5.3

[PATCH 162/236] delete_insn_and_edges takes an rtx_insn *

[David Malcolm]

All in-tree users of delete_insn_and_edges now pass in an rtx_insn *.

gcc/
	* rtl.h (delete_insn_and_edges): Strengthen param "insn" from rtx
	to rtx_insn *.
	* cfgrtl.c (delete_insn_and_edges): Likewise.

Fix for delete_insn_and_edges

gcc/
	* hw-doloop.c (discover_loops): Likewise for local "tail".
---
 gcc/cfgrtl.c | 2 +-
 gcc/rtl.h    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index dc731aa..a31214f 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -220,7 +220,7 @@ delete_insn (rtx insn)
 /* Like delete_insn but also purge dead edges from BB.  */
 
 void
-delete_insn_and_edges (rtx insn)
+delete_insn_and_edges (rtx_insn *insn)
 {
   bool purge = false;
 
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 0a245cc..6afafcc 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3073,7 +3073,7 @@ extern rtx_insn *entry_of_function (void);
 extern void emit_insn_at_entry (rtx);
 extern void delete_insn_chain (rtx, rtx, bool);
 extern rtx_insn *unlink_insn_chain (rtx, rtx);
-extern void delete_insn_and_edges (rtx);
+extern void delete_insn_and_edges (rtx_insn *);
 extern rtx gen_lowpart_SUBREG (enum machine_mode, rtx);
 extern rtx gen_const_mem (enum machine_mode, rtx);
 extern rtx gen_frame_mem (enum machine_mode, rtx);
-- 
1.8.5.3

[PATCH 189/236] Various scheduling strengthenings

[David Malcolm]

gcc/
	* insn-addr.h (insn_addresses_new): Strengthen param "insn" from
	rtx to rtx_insn *.

	* sched-int.h (sched_init_insn_luid): Likewise for param 1.
	(struct reg_use_data): Likewise for field "insn".
	(insn_cost): Likewise for param.
	(real_insn_for_shadow): Likewise for return type and param.
	(increase_insn_priority): Likewise for param 1.
	(debug_dependencies): Likewise for both params.

	* haifa-sched.c (insn_delay): Likewise for param "insn".
	(real_insn_for_shadow): Likewise for return type and param "insn".
	(update_insn_after_change): Likewise for param "insn".
	(recompute_todo_spec): Likewise for param "next" and locals "pro",
	"other".
	(insn_cost): Likewise for param "insn".
	(increase_insn_priority): Likewise.
	(calculate_reg_deaths): Likewise.
	(setup_insn_reg_pressure_info): Likewise.
	(model_schedule): Strengthen from vec<rtx> to vec<rtx_insn *>.
	(model_index): Strengthen param "insn" from rtx to rtx_insn *.
	(model_recompute): Likewise.
	(must_restore_pattern_p): Likewise for param "next".
	(model_excess_cost): Likewise for param "insn".
	(queue_remove): Likewise.
	(adjust_priority): Likewise for param "prev".
	(update_register_pressure): Likewise for param "insn".
	(setup_insn_max_reg_pressure): Likewise for local "insn".
	(update_reg_and_insn_max_reg_pressure): Likewise for param "insn".
	(model_add_to_schedule): Likewise.
	(model_reset_queue_indices): Likewise for local "insn".
	(unschedule_insns_until): Strengthen local "recompute_vec" from
	auto_vec<rtx> to auto_vec<rtx_insn *>.  Strengthen locals "last",
	"con" from rtx to rtx_insn *.
	(restore_last_backtrack_point): Likewise for both locals "x". Add
	checked casts.
	(estimate_insn_tick): Likewise for param "insn".
	(commit_schedule): Likewise for params "prev_head", "tail" and
	local "x".
	(verify_shadows): Likewise for locals "i1", "i2".
	(dump_insn_stream): Likewise for params "head", "tail" and locals
	"next_tail", "insn".
	(schedule_block): Likewise for locals "insn", "x".  Add a checked
	cast.
	(fix_inter_tick): Likewise for params "head", "tail".
	(create_check_block_twin): Likewise for local "jump".
	(haifa_change_pattern): Likewise for param "insn".
	(haifa_speculate_insn): Likewise.
	(dump_new_block_header): Likewise for params "head", "tail".
	(fix_jump_move): Likewise for param "jump".
	(move_block_after_check): Likewise.
	(sched_init_insn_luid): Likewise for param "insn".
	(sched_init_luids): Likewise for local "insn".
	(insn_luid): Likewise for param "insn".
	(init_h_i_d): Likewise.
	(haifa_init_h_i_d): Likewise for local "insn".
	(haifa_init_insn): Likewise for param "insn".
	* sched-deps.c (add_dependence): Likewise for local "real_pro",
	"other".
	(create_insn_reg_use): Likewise for param "insn".
	(setup_insn_reg_uses): Likewise.  Add a checked cast.
	* sched-ebb.c (debug_ebb_dependencies): Strengthen params "head",
	"tail" from rtx to rtx_insn *.
	* sched-rgn.c (void debug_dependencies): Likewise, also for locals
	"insn", "next_tail".
---
 gcc/haifa-sched.c | 129 +++++++++++++++++++++++++++---------------------------
 gcc/insn-addr.h   |   2 +-
 gcc/sched-deps.c  |  10 ++---
 gcc/sched-ebb.c   |   4 +-
 gcc/sched-int.h   |  12 ++---
 gcc/sched-rgn.c   |   6 +--
 6 files changed, 82 insertions(+), 81 deletions(-)

diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 72ed6a1..844124d 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -419,7 +419,7 @@ basic_block (* sched_create_empty_bb) (basic_block);
 /* Return the number of cycles until INSN is expected to be ready.
    Return zero if it already is.  */
 static int
-insn_delay (rtx insn)
+insn_delay (rtx_insn *insn)
 {
   return MAX (INSN_TICK (insn) - clock_var, 0);
 }
@@ -750,17 +750,17 @@ record_delay_slot_pair (rtx_insn *i1, rtx_insn *i2, int cycles, int stages)
 
 /* Examine the delay pair hashtable to see if INSN is a shadow for another,
    and return the other insn if so.  Return NULL otherwise.  */
-rtx
-real_insn_for_shadow (rtx insn)
+rtx_insn *
+real_insn_for_shadow (rtx_insn *insn)
 {
   struct delay_pair *pair;
 
   if (!delay_htab.is_created ())
-    return NULL_RTX;
+    return NULL;
 
   pair = delay_htab_i2.find_with_hash (insn, htab_hash_pointer (insn));
   if (!pair || pair->stages > 0)
-    return NULL_RTX;
+    return NULL;
   return pair->i1;
 }
 
@@ -831,7 +831,7 @@ static int rank_for_schedule (const void *, const void *);
 static void swap_sort (rtx_insn **, int);
 static void queue_insn (rtx_insn *, int, const char *);
 static int schedule_insn (rtx_insn *);
-static void adjust_priority (rtx);
+static void adjust_priority (rtx_insn *);
 static void advance_one_cycle (void);
 static void extend_h_i_d (void);
 
@@ -864,7 +864,7 @@ static int early_queue_to_ready (state_t, struct ready_list *);
 static rtx_insn *ready_remove (struct ready_list *, int);
 static void ready_remove_insn (rtx);
 
-static void fix_inter_tick (rtx, rtx);
+static void fix_inter_tick (rtx_insn *, rtx_insn *);
 static int fix_tick_ready (rtx_insn *);
 static void change_queue_index (rtx_insn *, int);
 
@@ -872,8 +872,8 @@ static void change_queue_index (rtx_insn *, int);
    speculative instructions.  */
 
 static void extend_h_i_d (void);
-static void init_h_i_d (rtx);
-static int haifa_speculate_insn (rtx, ds_t, rtx *);
+static void init_h_i_d (rtx_insn *);
+static int haifa_speculate_insn (rtx_insn *, ds_t, rtx *);
 static void generate_recovery_code (rtx_insn *);
 static void process_insn_forw_deps_be_in_spec (rtx, rtx_insn *, ds_t);
 static void begin_speculative_block (rtx_insn *);
@@ -881,11 +881,11 @@ static void add_to_speculative_block (rtx_insn *);
 static void init_before_recovery (basic_block *);
 static void create_check_block_twin (rtx_insn *, bool);
 static void fix_recovery_deps (basic_block);
-static bool haifa_change_pattern (rtx, rtx);
-static void dump_new_block_header (int, basic_block, rtx, rtx);
+static bool haifa_change_pattern (rtx_insn *, rtx);
+static void dump_new_block_header (int, basic_block, rtx_insn *, rtx_insn *);
 static void restore_bb_notes (basic_block);
-static void fix_jump_move (rtx);
-static void move_block_after_check (rtx);
+static void fix_jump_move (rtx_insn *);
+static void move_block_after_check (rtx_insn *);
 static void move_succs (vec<edge, va_gc> **, basic_block);
 static void sched_remove_insn (rtx_insn *);
 static void clear_priorities (rtx_insn *, rtx_vec_t *);
@@ -1144,7 +1144,7 @@ cond_clobbered_p (rtx_insn *insn, HARD_REG_SET set_regs)
 /* This function should be called after modifying the pattern of INSN,
    to update scheduler data structures as needed.  */
 static void
-update_insn_after_change (rtx insn)
+update_insn_after_change (rtx_insn *insn)
 {
   sd_iterator_def sd_it;
   dep_t dep;
@@ -1184,7 +1184,7 @@ static void restore_pattern (dep_t, bool);
    false.  */
 
 static ds_t
-recompute_todo_spec (rtx next, bool for_backtrack)
+recompute_todo_spec (rtx_insn *next, bool for_backtrack)
 {
   ds_t new_ds;
   sd_iterator_def sd_it;
@@ -1268,7 +1268,8 @@ recompute_todo_spec (rtx next, bool for_backtrack)
   
   else if (n_control == 1 && n_replace == 0 && n_spec == 0)
     {
-      rtx pro, other, new_pat;
+      rtx_insn *pro, *other;
+      rtx new_pat;
       rtx cond = NULL_RTX;
       bool success;
       rtx_insn *prev = NULL;
@@ -1365,7 +1366,7 @@ static rtx_insn *nonscheduled_insns_begin;
    This is the number of cycles between instruction issue and
    instruction results.  */
 int
-insn_cost (rtx insn)
+insn_cost (rtx_insn *insn)
 {
   int cost;
 
@@ -1509,7 +1510,7 @@ dep_cost (dep_t link)
 /* Use this sel-sched.c friendly function in reorder2 instead of increasing
    INSN_PRIORITY explicitly.  */
 void
-increase_insn_priority (rtx insn, int amount)
+increase_insn_priority (rtx_insn *insn, int amount)
 {
   if (!sel_sched_p ())
     {
@@ -1694,7 +1695,7 @@ while (0)
    in that class that die in INSN.  */
 
 static void
-calculate_reg_deaths (rtx insn, int *death)
+calculate_reg_deaths (rtx_insn *insn, int *death)
 {
   int i;
   struct reg_use_data *use;
@@ -1709,7 +1710,7 @@ calculate_reg_deaths (rtx insn, int *death)
 /* Setup info about the current register pressure impact of scheduling
    INSN at the current scheduling point.  */
 static void
-setup_insn_reg_pressure_info (rtx insn)
+setup_insn_reg_pressure_info (rtx_insn *insn)
 {
   int i, change, before, after, hard_regno;
   int excess_cost_change;
@@ -1883,7 +1884,7 @@ struct model_pressure_group {
 
 /* Index POINT gives the instruction at point POINT of the model schedule.
    This array doesn't change during main scheduling.  */
-static vec<rtx> model_schedule;
+static vec<rtx_insn *> model_schedule;
 
 /* The list of instructions in the model worklist, sorted in order of
    decreasing priority.  */
@@ -1934,7 +1935,7 @@ static unsigned int model_next_priority;
    doesn't belong to that schedule.  */
 
 static int
-model_index (rtx insn)
+model_index (rtx_insn *insn)
 {
   if (INSN_MODEL_INDEX (insn) == 0)
     return model_num_insns;
@@ -2103,7 +2104,7 @@ model_update_pressure (struct model_pressure_group *group,
 /* INSN has just been scheduled.  Update the model schedule accordingly.  */
 
 static void
-model_recompute (rtx insn)
+model_recompute (rtx_insn *insn)
 {
   struct {
     int last_use;
@@ -2236,7 +2237,7 @@ model_recompute (rtx insn)
 /* After DEP, which was cancelled, has been resolved for insn NEXT,
    check whether the insn's pattern needs restoring.  */
 static bool
-must_restore_pattern_p (rtx next, dep_t dep)
+must_restore_pattern_p (rtx_insn *next, dep_t dep)
 {
   if (QUEUE_INDEX (next) == QUEUE_SCHEDULED)
     return false;
@@ -2412,7 +2413,7 @@ model_excess_group_cost (struct model_pressure_group *group,
    if PRINT_P.  */
 
 static int
-model_excess_cost (rtx insn, bool print_p)
+model_excess_cost (rtx_insn *insn, bool print_p)
 {
   int point, pci, cl, cost, this_cost, delta;
   struct reg_pressure_data *insn_reg_pressure;
@@ -2763,7 +2764,7 @@ queue_insn (rtx_insn *insn, int n_cycles, const char *reason)
 
 /* Remove INSN from queue.  */
 static void
-queue_remove (rtx insn)
+queue_remove (rtx_insn *insn)
 {
   gcc_assert (QUEUE_INDEX (insn) >= 0);
   remove_free_INSN_LIST_elem (insn, &insn_queue[QUEUE_INDEX (insn)]);
@@ -2929,7 +2930,7 @@ ready_sort (struct ready_list *ready)
    provide a hook for the target to tweak itself.  */
 
 HAIFA_INLINE static void
-adjust_priority (rtx prev)
+adjust_priority (rtx_insn *prev)
 {
   /* ??? There used to be code here to try and estimate how an insn
      affected register lifetimes, but it did it by looking at REG_DEAD
@@ -2975,7 +2976,7 @@ advance_one_cycle (void)
 
 /* Update register pressure after scheduling INSN.  */
 static void
-update_register_pressure (rtx insn)
+update_register_pressure (rtx_insn *insn)
 {
   struct reg_use_data *use;
   struct reg_set_data *set;
@@ -2999,7 +3000,7 @@ setup_insn_max_reg_pressure (rtx after, bool update_p)
 {
   int i, p;
   bool eq_p;
-  rtx insn;
+  rtx_insn *insn;
   static int max_reg_pressure[N_REG_CLASSES];
 
   save_reg_pressure ();
@@ -3039,7 +3040,7 @@ setup_insn_max_reg_pressure (rtx after, bool update_p)
    also max register pressure for unscheduled insns of the current
    BB.  */
 static void
-update_reg_and_insn_max_reg_pressure (rtx insn)
+update_reg_and_insn_max_reg_pressure (rtx_insn *insn)
 {
   int i;
   int before[N_REG_CLASSES];
@@ -3280,7 +3281,7 @@ model_promote_insn (struct model_insn_info *insn)
 /* Add INSN to the end of the model schedule.  */
 
 static void
-model_add_to_schedule (rtx insn)
+model_add_to_schedule (rtx_insn *insn)
 {
   unsigned int point;
 
@@ -3640,7 +3641,7 @@ static void
 model_reset_queue_indices (void)
 {
   unsigned int i;
-  rtx insn;
+  rtx_insn *insn;
 
   FOR_EACH_VEC_ELT (model_schedule, i, insn)
     QUEUE_INDEX (insn) = MODEL_INSN_INFO (insn)->old_queue;
@@ -4227,13 +4228,13 @@ undo_replacements_for_backtrack (struct haifa_saved_data *save)
 static void
 unschedule_insns_until (rtx insn)
 {
-  auto_vec<rtx> recompute_vec;
+  auto_vec<rtx_insn *> recompute_vec;
 
   /* Make two passes over the insns to be unscheduled.  First, we clear out
      dependencies and other trivial bookkeeping.  */
   for (;;)
     {
-      rtx last;
+      rtx_insn *last;
       sd_iterator_def sd_it;
       dep_t dep;
 
@@ -4271,7 +4272,7 @@ unschedule_insns_until (rtx insn)
      up-to-date.  */
   while (!recompute_vec.is_empty ())
     {
-      rtx con;
+      rtx_insn *con;
 
       con = recompute_vec.pop ();
       MUST_RECOMPUTE_SPEC_P (con) = 0;
@@ -4332,7 +4333,7 @@ restore_last_backtrack_point (struct sched_block_state *psched_block)
 
       for (link = insn_queue[q]; link; link = XEXP (link, 1))
 	{
-	  rtx x = XEXP (link, 0);
+	  rtx_insn *x = as_a <rtx_insn *> (XEXP (link, 0));
 	  QUEUE_INDEX (x) = QUEUE_NOWHERE;
 	  INSN_TICK (x) = INVALID_TICK;
 	}
@@ -4364,7 +4365,7 @@ restore_last_backtrack_point (struct sched_block_state *psched_block)
 
       for (link = insn_queue[q]; link; link = XEXP (link, 1))
 	{
-	  rtx x = XEXP (link, 0);
+	  rtx_insn *x = as_a <rtx_insn *> (XEXP (link, 0));
 	  QUEUE_INDEX (x) = i;
 	  TODO_SPEC (x) = recompute_todo_spec (x, true);
 	  INSN_TICK (x) = save->clock_var + i;
@@ -4573,7 +4574,7 @@ perform_replacements_new_cycle (void)
    reduced on recursive calls.  Return true if we produced a good
    estimate, or false if we exceeded the budget.  */
 static bool
-estimate_insn_tick (bitmap processed, rtx insn, int budget)
+estimate_insn_tick (bitmap processed, rtx_insn *insn, int budget)
 {
   sd_iterator_def sd_it;
   dep_t dep;
@@ -5657,7 +5658,7 @@ choose_ready (struct ready_list *ready, bool first_cycle_insn_p,
    block.  TARGET_BB is the argument passed to schedule_block.  */
 
 static void
-commit_schedule (rtx_insn *prev_head, rtx tail, basic_block *target_bb)
+commit_schedule (rtx_insn *prev_head, rtx_insn *tail, basic_block *target_bb)
 {
   unsigned int i;
   rtx_insn *insn;
@@ -5674,7 +5675,7 @@ commit_schedule (rtx_insn *prev_head, rtx tail, basic_block *target_bb)
 
 	  if (sched_verbose)
 	    {
-	      rtx x;
+	      rtx_insn *x;
 
 	      x = next_real_insn (last_scheduled_insn);
 	      gcc_assert (x);
@@ -5833,11 +5834,11 @@ verify_shadows (void)
     {
       int t;
       struct delay_pair *pair = save->delay_pair;
-      rtx i1 = pair->i1;
+      rtx_insn *i1 = pair->i1;
 
       for (; pair; pair = pair->next_same_i1)
 	{
-	  rtx i2 = pair->i2;
+	  rtx_insn *i2 = pair->i2;
 
 	  if (QUEUE_INDEX (i2) == QUEUE_SCHEDULED)
 	    continue;
@@ -5879,12 +5880,12 @@ verify_shadows (void)
 /* Print instructions together with useful scheduling information between
    HEAD and TAIL (inclusive).  */
 static void
-dump_insn_stream (rtx head, rtx tail)
+dump_insn_stream (rtx_insn *head, rtx_insn *tail)
 {
   fprintf (sched_dump, ";;\t| insn | prio |\n");
 
-  rtx next_tail = NEXT_INSN (tail);
-  for (rtx insn = head; insn != next_tail; insn = NEXT_INSN (insn))
+  rtx_insn *next_tail = NEXT_INSN (tail);
+  for (rtx_insn *insn = head; insn != next_tail; insn = NEXT_INSN (insn))
     {
       int priority = NOTE_P (insn) ? 0 : INSN_PRIORITY (insn);
       const char *pattern = (NOTE_P (insn)
@@ -6361,7 +6362,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
       if (!must_backtrack)
 	for (i = 0; i < ready.n_ready; i++)
 	  {
-	    rtx insn = ready_element (&ready, i);
+	    rtx_insn *insn = ready_element (&ready, i);
 	    if (INSN_EXACT_TICK (insn) == clock_var)
 	      {
 		must_backtrack = true;
@@ -6424,7 +6425,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
     restart_debug_insn_loop:
       for (i = ready.n_ready - 1; i >= 0; i--)
 	{
-	  rtx x;
+	  rtx_insn *x;
 
 	  x = ready_element (&ready, i);
 	  if (DEPS_LIST_FIRST (INSN_HARD_BACK_DEPS (x)) != NULL
@@ -6474,7 +6475,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
       /* We must maintain QUEUE_INDEX between blocks in region.  */
       for (i = ready.n_ready - 1; i >= 0; i--)
 	{
-	  rtx x;
+	  rtx_insn *x;
 
 	  x = ready_element (&ready, i);
 	  QUEUE_INDEX (x) = QUEUE_NOWHERE;
@@ -6487,9 +6488,9 @@ schedule_block (basic_block *target_bb, state_t init_state)
 	    rtx link;
 	    for (link = insn_queue[i]; link; link = XEXP (link, 1))
 	      {
-		rtx x;
+		rtx_insn *x;
 
-		x = XEXP (link, 0);
+		x = as_a <rtx_insn *> (XEXP (link, 0));
 		QUEUE_INDEX (x) = QUEUE_NOWHERE;
 		TODO_SPEC (x) = HARD_DEP;
 	      }
@@ -6885,7 +6886,7 @@ free_delay_pairs (void)
    INSN_TICKs of their dependents.
    HEAD and TAIL are the begin and the end of the current scheduled block.  */
 static void
-fix_inter_tick (rtx head, rtx tail)
+fix_inter_tick (rtx_insn *head, rtx_insn *tail)
 {
   /* Set of instructions with corrected INSN_TICK.  */
   bitmap_head processed;
@@ -7352,7 +7353,7 @@ begin_speculative_block (rtx_insn *insn)
   TODO_SPEC (insn) &= ~BEGIN_SPEC;
 }
 
-static void haifa_init_insn (rtx);
+static void haifa_init_insn (rtx_insn *);
 
 /* Generates recovery code for BE_IN speculative INSN.  */
 static void
@@ -7838,7 +7839,7 @@ create_check_block_twin (rtx_insn *insn, bool mutate_p)
     /* In case of branchy check, fix CFG.  */
     {
       basic_block first_bb, second_bb;
-      rtx jump;
+      rtx_insn *jump;
 
       first_bb = BLOCK_FOR_INSN (check);
       second_bb = sched_split_block (first_bb, check);
@@ -8066,7 +8067,7 @@ fix_recovery_deps (basic_block rec)
 /* Change pattern of INSN to NEW_PAT.  Invalidate cached haifa
    instruction data.  */
 static bool
-haifa_change_pattern (rtx insn, rtx new_pat)
+haifa_change_pattern (rtx_insn *insn, rtx new_pat)
 {
   int t;
 
@@ -8100,7 +8101,7 @@ sched_speculate_insn (rtx insn, ds_t request, rtx *new_pat)
 }
 
 static int
-haifa_speculate_insn (rtx insn, ds_t request, rtx *new_pat)
+haifa_speculate_insn (rtx_insn *insn, ds_t request, rtx *new_pat)
 {
   gcc_assert (sched_deps_info->generate_spec_deps
 	      && !IS_SPECULATION_CHECK_P (insn));
@@ -8116,7 +8117,7 @@ haifa_speculate_insn (rtx insn, ds_t request, rtx *new_pat)
    ends with TAIL, before scheduling it.
    I is zero, if scheduler is about to start with the fresh ebb.  */
 static void
-dump_new_block_header (int i, basic_block bb, rtx head, rtx tail)
+dump_new_block_header (int i, basic_block bb, rtx_insn *head, rtx_insn *tail)
 {
   if (!i)
     fprintf (sched_dump,
@@ -8227,7 +8228,7 @@ restore_bb_notes (basic_block first)
    Fix CFG after both in- and inter-block movement of
    control_flow_insn_p JUMP.  */
 static void
-fix_jump_move (rtx jump)
+fix_jump_move (rtx_insn *jump)
 {
   basic_block bb, jump_bb, jump_bb_next;
 
@@ -8258,7 +8259,7 @@ fix_jump_move (rtx jump)
 
 /* Fix CFG after interblock movement of control_flow_insn_p JUMP.  */
 static void
-move_block_after_check (rtx jump)
+move_block_after_check (rtx_insn *jump)
 {
   basic_block bb, jump_bb, jump_bb_next;
   vec<edge, va_gc> *t;
@@ -8400,7 +8401,7 @@ sched_extend_luids (void)
 
 /* Initialize LUID for INSN.  */
 void
-sched_init_insn_luid (rtx insn)
+sched_init_insn_luid (rtx_insn *insn)
 {
   int i = INSN_P (insn) ? 1 : common_sched_info->luid_for_non_insn (insn);
   int luid;
@@ -8428,7 +8429,7 @@ sched_init_luids (bb_vec_t bbs)
   sched_extend_luids ();
   FOR_EACH_VEC_ELT (bbs, i, bb)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       FOR_BB_INSNS (bb, insn)
 	sched_init_insn_luid (insn);
@@ -8445,7 +8446,7 @@ sched_finish_luids (void)
 
 /* Return logical uid of INSN.  Helpful while debugging.  */
 int
-insn_luid (rtx insn)
+insn_luid (rtx_insn *insn)
 {
   return INSN_LUID (insn);
 }
@@ -8475,7 +8476,7 @@ extend_h_i_d (void)
 /* Initialize h_i_d entry of the INSN with default values.
    Values, that are not explicitly initialized here, hold zero.  */
 static void
-init_h_i_d (rtx insn)
+init_h_i_d (rtx_insn *insn)
 {
   if (INSN_LUID (insn) > 0)
     {
@@ -8498,7 +8499,7 @@ haifa_init_h_i_d (bb_vec_t bbs)
   extend_h_i_d ();
   FOR_EACH_VEC_ELT (bbs, i, bb)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       FOR_BB_INSNS (bb, insn)
 	init_h_i_d (insn);
@@ -8528,7 +8529,7 @@ haifa_finish_h_i_d (void)
 
 /* Init data for the new insn INSN.  */
 static void
-haifa_init_insn (rtx insn)
+haifa_init_insn (rtx_insn *insn)
 {
   gcc_assert (insn != NULL);
 
diff --git a/gcc/insn-addr.h b/gcc/insn-addr.h
index aec09fd..e255ac4 100644
--- a/gcc/insn-addr.h
+++ b/gcc/insn-addr.h
@@ -38,7 +38,7 @@ extern int insn_current_address;
 #define INSN_ADDRESSES_SIZE() (insn_addresses_.length ())
 
 static inline void
-insn_addresses_new (rtx insn, int insn_addr)
+insn_addresses_new (rtx_insn *insn, int insn_addr)
 {
   unsigned insn_uid = INSN_UID ((insn));
 
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index 8e77fc8..0ebca10 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -1524,8 +1524,8 @@ add_dependence (rtx_insn *con, rtx_insn *pro, enum reg_note dep_type)
      condition.  */
   if (dep_type == REG_DEP_CONTROL)
     {
-      rtx real_pro = pro;
-      rtx other = real_insn_for_shadow (real_pro);
+      rtx_insn *real_pro = pro;
+      rtx_insn *other = real_insn_for_shadow (real_pro);
       rtx cond;
 
       if (other != NULL_RTX)
@@ -1926,7 +1926,7 @@ ds_to_dt (ds_t ds)
 
 /* Allocate and return reg_use_data structure for REGNO and INSN.  */
 static struct reg_use_data *
-create_insn_reg_use (int regno, rtx insn)
+create_insn_reg_use (int regno, rtx_insn *insn)
 {
   struct reg_use_data *use;
 
@@ -1953,7 +1953,7 @@ create_insn_reg_set (int regno, rtx insn)
 
 /* Set up insn register uses for INSN and dependency context DEPS.  */
 static void
-setup_insn_reg_uses (struct deps_desc *deps, rtx insn)
+setup_insn_reg_uses (struct deps_desc *deps, rtx_insn *insn)
 {
   unsigned i;
   reg_set_iterator rsi;
@@ -1980,7 +1980,7 @@ setup_insn_reg_uses (struct deps_desc *deps, rtx insn)
       /* Create the cycle list of uses.  */
       for (list = reg_last->uses; list; list = XEXP (list, 1))
 	{
-	  use2 = create_insn_reg_use (i, XEXP (list, 0));
+	  use2 = create_insn_reg_use (i, as_a <rtx_insn *> (XEXP (list, 0)));
 	  next = use->next_regno_use;
 	  use->next_regno_use = use2;
 	  use2->next_regno_use = next;
diff --git a/gcc/sched-ebb.c b/gcc/sched-ebb.c
index 621fddb..f502668 100644
--- a/gcc/sched-ebb.c
+++ b/gcc/sched-ebb.c
@@ -62,7 +62,7 @@ static int rank (rtx_insn *, rtx_insn *);
 static int ebb_contributes_to_priority (rtx_insn *, rtx_insn *);
 static basic_block earliest_block_with_similiar_load (basic_block, rtx);
 static void add_deps_for_risky_insns (rtx_insn *, rtx_insn *);
-static void debug_ebb_dependencies (rtx, rtx);
+static void debug_ebb_dependencies (rtx_insn *, rtx_insn *);
 
 static void ebb_add_remove_insn (rtx_insn *, int);
 static void ebb_add_block (basic_block, basic_block);
@@ -98,7 +98,7 @@ schedule_more_p (void)
 
 /* Print dependency information about ebb between HEAD and TAIL.  */
 static void
-debug_ebb_dependencies (rtx head, rtx tail)
+debug_ebb_dependencies (rtx_insn *head, rtx_insn *tail)
 {
   fprintf (sched_dump,
 	   ";;   --------------- forward dependences: ------------ \n");
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index e7d93ffd..a3e9e46 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -47,7 +47,7 @@ typedef vec<rtx_insn *> rtx_vec_t;
 extern void sched_init_bbs (void);
 
 extern void sched_extend_luids (void);
-extern void sched_init_insn_luid (rtx);
+extern void sched_init_insn_luid (rtx_insn *);
 extern void sched_init_luids (bb_vec_t);
 extern void sched_finish_luids (void);
 
@@ -774,7 +774,7 @@ struct reg_use_data
   /* Regno used in the insn.  */
   int regno;
   /* Insn using the regno.  */
-  rtx insn;
+  rtx_insn *insn;
   /* Cyclic list of elements with the same regno.  */
   struct reg_use_data *next_regno_use;
   /* List of elements with the same insn.  */
@@ -1344,7 +1344,7 @@ extern void get_ebb_head_tail (basic_block, basic_block,
 			       rtx_insn **, rtx_insn **);
 extern int no_real_insns_p (const_rtx, const_rtx);
 
-extern int insn_cost (rtx);
+extern int insn_cost (rtx_insn *);
 extern int dep_cost_1 (dep_t, dw_t);
 extern int dep_cost (dep_t);
 extern int set_priorities (rtx_insn *, rtx_insn *);
@@ -1430,7 +1430,7 @@ extern bool sched_no_dce;
 
 extern void set_modulo_params (int, int, int, int);
 extern void record_delay_slot_pair (rtx_insn *, rtx_insn *, int, int);
-extern rtx real_insn_for_shadow (rtx);
+extern rtx_insn *real_insn_for_shadow (rtx_insn *);
 extern void discard_delay_pairs_above (int);
 extern void free_delay_pairs (void);
 extern void add_delay_dependencies (rtx_insn *);
@@ -1446,9 +1446,9 @@ extern void extend_regions (void);
 extern void rgn_make_new_region_out_of_new_block (basic_block);
 
 extern void compute_priorities (void);
-extern void increase_insn_priority (rtx, int);
+extern void increase_insn_priority (rtx_insn *, int);
 extern void debug_rgn_dependencies (int);
-extern void debug_dependencies (rtx, rtx);
+extern void debug_dependencies (rtx_insn *, rtx_insn *);
 extern void free_rgn_deps (void);
 extern int contributes_to_priority (rtx_insn *, rtx_insn *);
 extern void extend_rgns (int *, int *, sbitmap, int *);
diff --git a/gcc/sched-rgn.c b/gcc/sched-rgn.c
index 723f376..ceeeacc 100644
--- a/gcc/sched-rgn.c
+++ b/gcc/sched-rgn.c
@@ -2806,10 +2806,10 @@ debug_rgn_dependencies (int from_bb)
 
 /* Print dependencies information for instructions between HEAD and TAIL.
    ??? This function would probably fit best in haifa-sched.c.  */
-void debug_dependencies (rtx head, rtx tail)
+void debug_dependencies (rtx_insn *head, rtx_insn *tail)
 {
-  rtx insn;
-  rtx next_tail = NEXT_INSN (tail);
+  rtx_insn *insn;
+  rtx_insn *next_tail = NEXT_INSN (tail);
 
   fprintf (sched_dump, ";;   %7s%6s%6s%6s%6s%6s%14s\n",
 	   "insn", "code", "bb", "dep", "prio", "cost",
-- 
1.8.5.3

[PATCH 171/236] du_chain.insn is an rtx_insn

[David Malcolm]

gcc/
	* regrename.h (struct du_chain): Strengthen field "insn" from rtx
	to rtx_insn *.
---
 gcc/regrename.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/regrename.h b/gcc/regrename.h
index 9a611f0..03b7164 100644
--- a/gcc/regrename.h
+++ b/gcc/regrename.h
@@ -56,7 +56,7 @@ struct du_chain
   struct du_chain *next_use;
 
   /* The insn where the register appears.  */
-  rtx insn;
+  rtx_insn *insn;
   /* The location inside the insn.  */
   rtx *loc;
   /* The register class required by the insn at this location.  */
-- 
1.8.5.3

[PATCH 130/236] config/bfin: Use rtx_insn

[David Malcolm]

gcc/
	* config/bfin/bfin-protos.h (asm_conditional_branch): Strengthen
	param 1 from rtx to rtx_insn *.
	* config/bfin/bfin.c (expand_prologue_reg_save): Likewise for
	the various locals named "insn".
	(expand_epilogue_reg_restore): Likewise.
	(frame_related_constant_load): Likewise.
	(add_to_reg): Likewise.
	(emit_link_insn): Likewise.
	(do_link): Likewise.
	(expand_interrupt_handler_prologue): Likewise.
	(branch_dest): Likewise for param "branch".
	(asm_conditional_branch): Likewise for param "insn".
	(gen_one_bundle): Likewise for elements of param "slot" and local
	"t".
	(bfin_gen_bundles): Likewise for locals "insn", "next" and
	elements of local "slot".
	(reorder_var_tracking_notes): Likewise for locals "insn", "next",
	"queue", "next_queue", "prev".
	(workaround_rts_anomaly): Likewise for locals "insn", "first_insn".
	(add_sched_insns_for_speculation): Likewise for local "insn".
---
 gcc/config/bfin/bfin-protos.h |  2 +-
 gcc/config/bfin/bfin.c        | 56 ++++++++++++++++++++++---------------------
 2 files changed, 30 insertions(+), 28 deletions(-)

diff --git a/gcc/config/bfin/bfin-protos.h b/gcc/config/bfin/bfin-protos.h
index be26ad1..f230a3a 100644
--- a/gcc/config/bfin/bfin-protos.h
+++ b/gcc/config/bfin/bfin-protos.h
@@ -97,7 +97,7 @@ extern void print_address_operand (FILE *, rtx);
 extern void split_di (rtx [], int, rtx [], rtx []);
 extern int split_load_immediate (rtx []);
 extern void emit_pic_move (rtx *, enum machine_mode);
-extern void asm_conditional_branch (rtx, rtx *, int, int);
+extern void asm_conditional_branch (rtx_insn *, rtx *, int, int);
 extern rtx bfin_gen_compare (rtx, enum machine_mode);
 
 extern unsigned bfin_local_alignment (tree, unsigned);
diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index 02bd4bd..fadfb5f 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -345,7 +345,7 @@ expand_prologue_reg_save (rtx spreg, int saveall, bool is_inthandler)
 
   if (saveall || is_inthandler)
     {
-      rtx insn = emit_move_insn (predec, gen_rtx_REG (SImode, REG_ASTAT));
+      rtx_insn *insn = emit_move_insn (predec, gen_rtx_REG (SImode, REG_ASTAT));
 
       RTX_FRAME_RELATED_P (insn) = 1;
       for (dregno = REG_LT0; dregno <= REG_LB1; dregno++)
@@ -362,7 +362,7 @@ expand_prologue_reg_save (rtx spreg, int saveall, bool is_inthandler)
 
   if (total_consec != 0)
     {
-      rtx insn;
+      rtx_insn *insn;
       rtx val = GEN_INT (-total_consec * 4);
       rtx pat = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (total_consec + 2));
 
@@ -404,7 +404,8 @@ expand_prologue_reg_save (rtx spreg, int saveall, bool is_inthandler)
     {
       if (must_save_p (is_inthandler, dregno))
 	{
-	  rtx insn = emit_move_insn (predec, gen_rtx_REG (word_mode, dregno));
+	  rtx_insn *insn =
+	    emit_move_insn (predec, gen_rtx_REG (word_mode, dregno));
 	  RTX_FRAME_RELATED_P (insn) = 1;
 	  ndregs--;
 	}
@@ -413,7 +414,8 @@ expand_prologue_reg_save (rtx spreg, int saveall, bool is_inthandler)
     {
       if (must_save_p (is_inthandler, pregno))
 	{
-	  rtx insn = emit_move_insn (predec, gen_rtx_REG (word_mode, pregno));
+	  rtx_insn *insn =
+	    emit_move_insn (predec, gen_rtx_REG (word_mode, pregno));
 	  RTX_FRAME_RELATED_P (insn) = 1;
 	  npregs--;
 	}
@@ -424,7 +426,7 @@ expand_prologue_reg_save (rtx spreg, int saveall, bool is_inthandler)
 	    && (df_regs_ever_live_p (i)
 		|| (!leaf_function_p () && call_used_regs[i]))))
       {
-	rtx insn;
+	rtx_insn *insn;
 	if (i == REG_A0 || i == REG_A1)
 	  insn = emit_move_insn (gen_rtx_MEM (PDImode, predec1),
 				 gen_rtx_REG (PDImode, i));
@@ -451,7 +453,7 @@ expand_epilogue_reg_restore (rtx spreg, bool saveall, bool is_inthandler)
   int npregs_consec = saveall ? 6 : n_pregs_to_save (is_inthandler, true);
   int total_consec = ndregs_consec + npregs_consec;
   int i, regno;
-  rtx insn;
+  rtx_insn *insn;
 
   /* A slightly crude technique to stop flow from trying to delete "dead"
      insns.  */
@@ -705,7 +707,7 @@ bfin_initial_elimination_offset (int from, int to)
 static void
 frame_related_constant_load (rtx reg, HOST_WIDE_INT constant, bool related)
 {
-  rtx insn;
+  rtx_insn *insn;
   rtx cst = GEN_INT (constant);
 
   if (constant >= -32768 && constant < 65536)
@@ -742,7 +744,7 @@ add_to_reg (rtx reg, HOST_WIDE_INT value, int frame, int epilogue_p)
     {
       rtx tmpreg;
       rtx tmpreg2;
-      rtx insn;
+      rtx_insn *insn;
 
       tmpreg2 = NULL_RTX;
 
@@ -791,7 +793,7 @@ add_to_reg (rtx reg, HOST_WIDE_INT value, int frame, int epilogue_p)
     do
       {
 	int size = value;
-	rtx insn;
+	rtx_insn *insn;
 
 	if (size > 60)
 	  size = 60;
@@ -816,7 +818,7 @@ static void
 emit_link_insn (rtx spreg, HOST_WIDE_INT frame_size)
 {
   HOST_WIDE_INT link_size = frame_size;
-  rtx insn;
+  rtx_insn *insn;
   int i;
 
   if (link_size > 262140)
@@ -883,7 +885,7 @@ do_link (rtx spreg, HOST_WIDE_INT frame_size, bool all)
 	  rtx pat = gen_movsi (gen_rtx_MEM (Pmode,
 					    gen_rtx_PRE_DEC (Pmode, spreg)),
 			       bfin_rets_rtx);
-	  rtx insn = emit_insn (pat);
+	  rtx_insn *insn = emit_insn (pat);
 	  RTX_FRAME_RELATED_P (insn) = 1;
 	}
       if (must_save_fp_p ())
@@ -891,7 +893,7 @@ do_link (rtx spreg, HOST_WIDE_INT frame_size, bool all)
 	  rtx pat = gen_movsi (gen_rtx_MEM (Pmode,
 					    gen_rtx_PRE_DEC (Pmode, spreg)),
 			       gen_rtx_REG (Pmode, REG_FP));
-	  rtx insn = emit_insn (pat);
+	  rtx_insn *insn = emit_insn (pat);
 	  RTX_FRAME_RELATED_P (insn) = 1;
 	}
       add_to_reg (spreg, -frame_size, 1, 0);
@@ -939,7 +941,7 @@ expand_interrupt_handler_prologue (rtx spreg, e_funkind fkind, bool all)
   HOST_WIDE_INT frame_size = get_frame_size ();
   rtx predec1 = gen_rtx_PRE_DEC (SImode, spreg);
   rtx predec = gen_rtx_MEM (SImode, predec1);
-  rtx insn;
+  rtx_insn *insn;
   tree attrs = TYPE_ATTRIBUTES (TREE_TYPE (current_function_decl));
   tree kspisusp = lookup_attribute ("kspisusp", attrs);
 
@@ -2415,7 +2417,7 @@ bfin_option_override (void)
    we still prefer to use shorter sequences.  */
 
 static int
-branch_dest (rtx branch)
+branch_dest (rtx_insn *branch)
 {
   rtx dest;
   int dest_uid;
@@ -2469,7 +2471,7 @@ static const char *ccbranch_templates[][3] = {
    anyway.  */
 
 void
-asm_conditional_branch (rtx insn, rtx *operands, int n_nops, int predict_taken)
+asm_conditional_branch (rtx_insn *insn, rtx *operands, int n_nops, int predict_taken)
 {
   int offset = branch_dest (insn) - INSN_ADDRESSES (INSN_UID (insn));
   /* Note : offset for instructions like if cc jmp; jump.[sl] offset
@@ -3894,7 +3896,7 @@ bfin_reorg_loops (void)
 /* Possibly generate a SEQUENCE out of three insns found in SLOT.
    Returns true if we modified the insn chain, false otherwise.  */
 static bool
-gen_one_bundle (rtx slot[3])
+gen_one_bundle (rtx_insn *slot[3])
 {
   gcc_assert (slot[1] != NULL_RTX);
 
@@ -3916,7 +3918,7 @@ gen_one_bundle (rtx slot[3])
     }
   if (slot[2])
     {
-      rtx t = NEXT_INSN (slot[1]);
+      rtx_insn *t = NEXT_INSN (slot[1]);
       while (t != slot[2])
 	{
 	  if (! NOTE_P (t) || NOTE_KIND (t) != NOTE_INSN_DELETED)
@@ -3962,11 +3964,11 @@ bfin_gen_bundles (void)
   basic_block bb;
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn, next;
-      rtx slot[3];
+      rtx_insn *insn, *next;
+      rtx_insn *slot[3];
       int n_filled = 0;
 
-      slot[0] = slot[1] = slot[2] = NULL_RTX;
+      slot[0] = slot[1] = slot[2] = NULL;
       for (insn = BB_HEAD (bb);; insn = next)
 	{
 	  int at_end;
@@ -4022,7 +4024,7 @@ bfin_gen_bundles (void)
 		    }
 		}
 	      n_filled = 0;
-	      slot[0] = slot[1] = slot[2] = NULL_RTX;
+	      slot[0] = slot[1] = slot[2] = NULL;
 	    }
 	  if (delete_this != NULL_RTX)
 	    delete_insn (delete_this);
@@ -4041,8 +4043,8 @@ reorder_var_tracking_notes (void)
   basic_block bb;
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn, next;
-      rtx queue = NULL_RTX;
+      rtx_insn *insn, *next;
+      rtx_insn *queue = NULL;
       bool in_bundle = false;
 
       for (insn = BB_HEAD (bb); insn != BB_END (bb); insn = next)
@@ -4056,7 +4058,7 @@ reorder_var_tracking_notes (void)
 		{
 		  while (queue)
 		    {
-		      rtx next_queue = PREV_INSN (queue);
+		      rtx_insn *next_queue = PREV_INSN (queue);
 		      SET_PREV_INSN (NEXT_INSN (insn)) = queue;
 		      SET_NEXT_INSN (queue) = NEXT_INSN (insn);
 		      SET_NEXT_INSN (insn) = queue;
@@ -4072,7 +4074,7 @@ reorder_var_tracking_notes (void)
 	    {
 	      if (in_bundle)
 		{
-		  rtx prev = PREV_INSN (insn);
+		  rtx_insn *prev = PREV_INSN (insn);
 		  SET_PREV_INSN (next) = prev;
 		  SET_NEXT_INSN (prev) = next;
 
@@ -4090,7 +4092,7 @@ reorder_var_tracking_notes (void)
 static void
 workaround_rts_anomaly (void)
 {
-  rtx insn, first_insn = NULL_RTX;
+  rtx_insn *insn, *first_insn = NULL;
   int cycles = 4;
 
   if (! ENABLE_WA_RETS)
@@ -4525,7 +4527,7 @@ workaround_speculation (void)
 static void
 add_sched_insns_for_speculation (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (! ENABLE_WA_SPECULATIVE_LOADS && ! ENABLE_WA_SPECULATIVE_SYNCS
       && ! ENABLE_WA_INDIRECT_CALLS)
-- 
1.8.5.3

Re: [PATCH 130/236] config/bfin: Use rtx_insn

[Jeff Law]

On 08/06/14 11:21, David Malcolm wrote:
> gcc/
> 	* config/bfin/bfin-protos.h (asm_conditional_branch): Strengthen
> 	param 1 from rtx to rtx_insn *.
> 	* config/bfin/bfin.c (expand_prologue_reg_save): Likewise for
> 	the various locals named "insn".
> 	(expand_epilogue_reg_restore): Likewise.
> 	(frame_related_constant_load): Likewise.
> 	(add_to_reg): Likewise.
> 	(emit_link_insn): Likewise.
> 	(do_link): Likewise.
> 	(expand_interrupt_handler_prologue): Likewise.
> 	(branch_dest): Likewise for param "branch".
> 	(asm_conditional_branch): Likewise for param "insn".
> 	(gen_one_bundle): Likewise for elements of param "slot" and local
> 	"t".
> 	(bfin_gen_bundles): Likewise for locals "insn", "next" and
> 	elements of local "slot".
> 	(reorder_var_tracking_notes): Likewise for locals "insn", "next",
> 	"queue", "next_queue", "prev".
> 	(workaround_rts_anomaly): Likewise for locals "insn", "first_insn".
> 	(add_sched_insns_for_speculation): Likewise for local "insn".
OK.

As are patches: #131-155


I resisted the nostalgia trip through a variety of backends I've hacked 
through the years and focused strictly on the patches  :-)

Jeff

[PATCH 219/236] Make SET_NEXT_INSN/SET_PREV_INSN require an rtx_insn

[David Malcolm]

gcc/
	* rtl.h (SET_PREV_INSN): Strengthen param from rtx to rtx_insn *.
	(SET_NEXT_INSN): Likewise.
	(gen_rtvec_v): Add an overload for param types (int, rtx_insn **).

	* emit-rtl.h (copy_delay_slot_insn): Strengthen return type and
	param from rtx to rtx_insn *.

	* config/c6x/c6x.c (gen_one_bundle): Strengthen param "slot" from
	rtx * to rtx_insn **.  Introduce a new local rtx "seq", using it
	to split out the SEQUENCE from local "bundle", strengthening the
	latter from rtx to rtx_insn * to hold the insn holding the SEQUENCE.
	Strengthen locals "t" and "insn" from rtx to rtx_insn *.
	(c6x_gen_bundles): Strengthen locals "insn", "next", "last_call"
	and the type of the elements of the "slot" array from rtx to
	rtx_insn *.
	(reorg_split_calls): Likewise for locals "insn" and "next", and
	the type of the elements of the "slot" array.

	* config/frv/frv.c (frv_nops): Likewise for the elements of this
	array.
	(frv_function_prologue): Likewise for locals "insn", "next",
	"last_call".
	(frv_register_nop): Introduce a local "nop_insn" to be the
	rtx_insn * containing rtx "nop".

	* config/mep/mep.c (mep_make_bundle): Param "core" is sometimes
	used as an insn and sometimes as a pattern, so rename it to
	"core_insn_or_pat", and introduce local rtx_insn * "core_insn",
	using it where dealing with the core insn.

	* config/picochip/picochip.c (reorder_var_tracking_notes):
	Strengthen locals "insn", "next", "last_insn", "queue",
	"next_queue", "prev" from rtx to rtx_insn *.

	* emit-rtl.c (gen_rtvec_v): Add overloaded implementation for when
	the second param is an rtx_insn ** rather than an rtx **.
	(link_insn_into_chain): Strengthen locals "seq" and "sequence"
	from rtx to rtx_sequence *, and introduce local named "sequence",
	using methods of rtx_sequence to clarify the code.
	(remove_insn): Introduce local rtx_sequence * named "sequence" and
	use its methods.
	(emit_insn_after_1): Strengthen return type from rtx to rtx_insn *.
	Rename param "after" to "uncast_after", reintroducing "after" as a
	local rtx_insn * with a checked cast.
	(emit_pattern_after_noloc): Rename param "after" to "uncast_after",
	reintroducing "after" as a local rtx_insn * with a checked cast.
	Strengthen local "last" from rtx to rtx_insn * and remove the
	now-redundant checked casts.
	(copy_delay_slot_insn): Strengthen return type and param from rtx
	to rtx_insn *.

	* haifa-sched.c (reemit_notes): Strengthen params "insn" and
	"last" from rtx to rtx_insn *.
---
 gcc/config/c6x/c6x.c           | 29 +++++++++----------
 gcc/config/frv/frv.c           | 16 +++++------
 gcc/config/mep/mep.c           | 28 +++++++++++--------
 gcc/config/picochip/picochip.c | 10 +++----
 gcc/emit-rtl.c                 | 63 ++++++++++++++++++++++++++++++------------
 gcc/emit-rtl.h                 |  2 +-
 gcc/haifa-sched.c              |  2 +-
 gcc/rtl.h                      |  5 ++--
 8 files changed, 94 insertions(+), 61 deletions(-)

diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index d5f2184..c7e0ad8 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -4590,23 +4590,24 @@ c6x_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
    first in the original stream.  */
 
 static void
-gen_one_bundle (rtx *slot, int n_filled, int real_first)
+gen_one_bundle (rtx_insn **slot, int n_filled, int real_first)
 {
-  rtx bundle;
-  rtx t;
+  rtx seq;
+  rtx_insn *bundle;
+  rtx_insn *t;
   int i;
 
-  bundle = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec_v (n_filled, slot));
-  bundle = make_insn_raw (bundle);
+  seq = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec_v (n_filled, slot));
+  bundle = make_insn_raw (seq);
   BLOCK_FOR_INSN (bundle) = BLOCK_FOR_INSN (slot[0]);
   INSN_LOCATION (bundle) = INSN_LOCATION (slot[0]);
   SET_PREV_INSN (bundle) = SET_PREV_INSN (slot[real_first]);
 
-  t = NULL_RTX;
+  t = NULL;
 
   for (i = 0; i < n_filled; i++)
     {
-      rtx insn = slot[i];
+      rtx_insn *insn = slot[i];
       remove_insn (insn);
       SET_PREV_INSN (insn) = t ? t : PREV_INSN (bundle);
       if (t != NULL_RTX)
@@ -4629,14 +4630,14 @@ static void
 c6x_gen_bundles (void)
 {
   basic_block bb;
-  rtx insn, next, last_call;
+  rtx_insn *insn, *next, *last_call;
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn, next;
+      rtx_insn *insn, *next;
       /* The machine is eight insns wide.  We can have up to six shadow
 	 insns, plus an extra slot for merging the jump shadow.  */
-      rtx slot[15];
+      rtx_insn *slot[15];
       int n_filled = 0;
       int first_slot = 0;
 
@@ -4699,7 +4700,7 @@ c6x_gen_bundles (void)
   /* Bundling, and emitting nops, can separate
      NOTE_INSN_CALL_ARG_LOCATION from the corresponding calls.  Fix
      that up here.  */
-  last_call = NULL_RTX;
+  last_call = NULL;
   for (insn = get_insns (); insn; insn = next)
     {
       next = NEXT_INSN (insn);
@@ -4854,13 +4855,13 @@ static void
 reorg_split_calls (rtx *call_labels)
 {
   unsigned int reservation_mask = 0;
-  rtx insn = get_insns ();
+  rtx_insn *insn = get_insns ();
   gcc_assert (NOTE_P (insn));
   insn = next_real_insn (insn);
   while (insn)
     {
       int uid;
-      rtx next = next_real_insn (insn);
+      rtx_insn *next = next_real_insn (insn);
 
       if (DEBUG_INSN_P (insn))
 	goto done;
@@ -4885,7 +4886,7 @@ reorg_split_calls (rtx *call_labels)
 	      else
 		{
 		  rtx t;
-		  rtx slot[4];
+		  rtx_insn *slot[4];
 		  emit_label_after (label, insn);
 
 		  /* Bundle the call and its delay slots into a single
diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c
index b7b3185..a9823c9 100644
--- a/gcc/config/frv/frv.c
+++ b/gcc/config/frv/frv.c
@@ -104,7 +104,7 @@ static unsigned int frv_type_to_unit[TYPE_UNKNOWN + 1];
 
 /* An array of dummy nop INSNs, one for each type of nop that the
    target supports.  */
-static GTY(()) rtx frv_nops[NUM_NOP_PATTERNS];
+static GTY(()) rtx_insn *frv_nops[NUM_NOP_PATTERNS];
 
 /* The number of nop instructions in frv_nops[].  */
 static unsigned int frv_num_nops;
@@ -1423,7 +1423,7 @@ frv_function_contains_far_jump (void)
 static void
 frv_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
 {
-  rtx insn, next, last_call;
+  rtx_insn *insn, *next, *last_call;
 
   /* If no frame was created, check whether the function uses a call
      instruction to implement a far jump.  If so, save the link in gr3 and
@@ -1433,7 +1433,7 @@ frv_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
      a stack frame.  */
   if (frv_stack_info ()->total_size == 0 && frv_function_contains_far_jump ())
     {
-      rtx insn;
+      rtx_insn *insn;
 
       /* Just to check that the above comment is true.  */
       gcc_assert (!df_regs_ever_live_p (GPR_FIRST + 3));
@@ -1468,7 +1468,7 @@ frv_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
 
   /* Locate CALL_ARG_LOCATION notes that have been misplaced
      and move them back to where they should be located.  */
-  last_call = NULL_RTX;
+  last_call = NULL;
   for (insn = get_insns (); insn; insn = next)
     {
       next = NEXT_INSN (insn);
@@ -8179,10 +8179,10 @@ frv_reorg_packet (void)
 static void
 frv_register_nop (rtx nop)
 {
-  nop = make_insn_raw (nop);
-  SET_NEXT_INSN (nop) = 0;
-  SET_PREV_INSN (nop) = 0;
-  frv_nops[frv_num_nops++] = nop;
+  rtx_insn *nop_insn = make_insn_raw (nop);
+  SET_NEXT_INSN (nop_insn) = 0;
+  SET_PREV_INSN (nop_insn) = 0;
+  frv_nops[frv_num_nops++] = nop_insn;
 }
 
 /* Implement TARGET_MACHINE_DEPENDENT_REORG.  Divide the instructions
diff --git a/gcc/config/mep/mep.c b/gcc/config/mep/mep.c
index ea231c1..da03a54 100644
--- a/gcc/config/mep/mep.c
+++ b/gcc/config/mep/mep.c
@@ -6804,38 +6804,42 @@ mep_ipipe_ldc_p (rtx_insn *insn)
    Emit the bundle in place of COP and return it.  */
 
 static rtx_insn *
-mep_make_bundle (rtx core, rtx_insn *cop)
+mep_make_bundle (rtx core_insn_or_pat, rtx_insn *cop)
 {
   rtx seq;
+  rtx_insn *core_insn;
   rtx_insn *insn;
 
   /* If CORE is an existing instruction, remove it, otherwise put
      the new pattern in an INSN harness.  */
-  if (INSN_P (core))
-    remove_insn (core);
+  if (INSN_P (core_insn_or_pat))
+    {
+      core_insn = as_a <rtx_insn *> (core_insn_or_pat);
+      remove_insn (core_insn);
+    }
   else
-    core = make_insn_raw (core);
+    core_insn = make_insn_raw (core_insn_or_pat);
 
   /* Generate the bundle sequence and replace COP with it.  */
-  seq = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec (2, core, cop));
+  seq = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec (2, core_insn, cop));
   insn = emit_insn_after (seq, cop);
   remove_insn (cop);
 
   /* Set up the links of the insns inside the SEQUENCE.  */
-  SET_PREV_INSN (core) = PREV_INSN (insn);
-  SET_NEXT_INSN (core) = cop;
-  SET_PREV_INSN (cop) = core;
+  SET_PREV_INSN (core_insn) = PREV_INSN (insn);
+  SET_NEXT_INSN (core_insn) = cop;
+  SET_PREV_INSN (cop) = core_insn;
   SET_NEXT_INSN (cop) = NEXT_INSN (insn);
 
   /* Set the VLIW flag for the coprocessor instruction.  */
-  PUT_MODE (core, VOIDmode);
+  PUT_MODE (core_insn, VOIDmode);
   PUT_MODE (cop, BImode);
 
   /* Derive a location for the bundle.  Individual instructions cannot
      have their own location because there can be no assembler labels
-     between CORE and COP.  */
-  INSN_LOCATION (insn) = INSN_LOCATION (INSN_LOCATION (core) ? core : cop);
-  INSN_LOCATION (core) = 0;
+     between CORE_INSN and COP.  */
+  INSN_LOCATION (insn) = INSN_LOCATION (INSN_LOCATION (core_insn) ? core_insn : cop);
+  INSN_LOCATION (core_insn) = 0;
   INSN_LOCATION (cop) = 0;
 
   return insn;
diff --git a/gcc/config/picochip/picochip.c b/gcc/config/picochip/picochip.c
index 0da151f..e58907c 100644
--- a/gcc/config/picochip/picochip.c
+++ b/gcc/config/picochip/picochip.c
@@ -3176,8 +3176,8 @@ reorder_var_tracking_notes (void)
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn, next, last_insn = NULL_RTX;
-      rtx queue = NULL_RTX;
+      rtx_insn *insn, *next, *last_insn = NULL;
+      rtx_insn *queue = NULL;
 
       /* Iterate through the bb and find the last non-debug insn */
       for (insn = BB_HEAD (bb); insn != NEXT_INSN(BB_END (bb)); insn = NEXT_INSN(insn))
@@ -3197,7 +3197,7 @@ reorder_var_tracking_notes (void)
             {
               while (queue)
                 {
-                  rtx next_queue = PREV_INSN (queue);
+                  rtx_insn *next_queue = PREV_INSN (queue);
                   SET_PREV_INSN (NEXT_INSN(insn)) = queue;
                   SET_NEXT_INSN(queue) = NEXT_INSN(insn);
                   SET_PREV_INSN(queue) = insn;
@@ -3214,7 +3214,7 @@ reorder_var_tracking_notes (void)
                 {
                   while (queue)
                     {
-                      rtx next_queue = PREV_INSN (queue);
+                      rtx_insn *next_queue = PREV_INSN (queue);
                       SET_NEXT_INSN (PREV_INSN(insn)) = queue;
                       SET_PREV_INSN (queue) = PREV_INSN(insn);
                       SET_PREV_INSN (insn) = queue;
@@ -3225,7 +3225,7 @@ reorder_var_tracking_notes (void)
             }
           else if (NOTE_P (insn))
             {
-               rtx prev = PREV_INSN (insn);
+               rtx_insn *prev = PREV_INSN (insn);
                SET_PREV_INSN (next) = prev;
                SET_NEXT_INSN (prev) = next;
                /* Ignore call_arg notes. They are expected to be just after the
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 5a2d549..6269b74 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -927,6 +927,25 @@ gen_rtvec_v (int n, rtx *argp)
 
   return rt_val;
 }
+
+rtvec
+gen_rtvec_v (int n, rtx_insn **argp)
+{
+  int i;
+  rtvec rt_val;
+
+  /* Don't allocate an empty rtvec...  */
+  if (n == 0)
+    return NULL_RTVEC;
+
+  rt_val = rtvec_alloc (n);
+
+  for (i = 0; i < n; i++)
+    rt_val->elem[i] = *argp++;
+
+  return rt_val;
+}
+
 \f
 /* Return the number of bytes between the start of an OUTER_MODE
    in-memory value and the start of an INNER_MODE in-memory value,
@@ -3884,22 +3903,25 @@ link_insn_into_chain (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
       SET_NEXT_INSN (prev) = insn;
       if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
 	{
-	  rtx sequence = PATTERN (prev);
-	  SET_NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
+	  rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
+	  SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = insn;
 	}
     }
   if (next != NULL)
     {
       SET_PREV_INSN (next) = insn;
       if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
-	SET_PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
+	{
+	  rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
+	  SET_PREV_INSN (sequence->insn (0)) = insn;
+	}
     }
 
   if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
     {
-      rtx sequence = PATTERN (insn);
-      SET_PREV_INSN (XVECEXP (sequence, 0, 0)) = prev;
-      SET_NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
+      rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (insn));
+      SET_PREV_INSN (sequence->insn (0)) = prev;
+      SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
     }
 }
 
@@ -4078,8 +4100,8 @@ remove_insn (rtx insn)
       SET_NEXT_INSN (prev) = next;
       if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
 	{
-	  rtx sequence = PATTERN (prev);
-	  SET_NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
+	  rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
+	  SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
 	}
     }
   else if (get_insns () == insn)
@@ -4106,7 +4128,10 @@ remove_insn (rtx insn)
     {
       SET_PREV_INSN (next) = prev;
       if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
-	SET_PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
+	{
+	  rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
+	  SET_PREV_INSN (sequence->insn (0)) = prev;
+	}
     }
   else if (get_last_insn () == insn)
     set_last_insn (prev);
@@ -4386,9 +4411,10 @@ emit_label_before (rtx label, rtx before)
 /* Helper for emit_insn_after, handles lists of instructions
    efficiently.  */
 
-static rtx
-emit_insn_after_1 (rtx_insn *first, rtx after, basic_block bb)
+static rtx_insn *
+emit_insn_after_1 (rtx_insn *first, rtx uncast_after, basic_block bb)
 {
+  rtx_insn *after = as_a_nullable <rtx_insn *> (uncast_after);
   rtx_insn *last;
   rtx_insn *after_after;
   if (!bb && !BARRIER_P (after))
@@ -4430,15 +4456,16 @@ emit_insn_after_1 (rtx_insn *first, rtx after, basic_block bb)
 }
 
 static rtx_insn *
-emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
+emit_pattern_after_noloc (rtx x, rtx uncast_after, basic_block bb,
 			  rtx_insn *(*make_raw)(rtx))
 {
-  rtx last = after;
+  rtx_insn *after = as_a_nullable <rtx_insn *> (uncast_after);
+  rtx_insn *last = after;
 
   gcc_assert (after);
 
   if (x == NULL_RTX)
-    return as_a_nullable <rtx_insn *> (last);
+    return last;
 
   switch (GET_CODE (x))
     {
@@ -4464,7 +4491,7 @@ emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
       break;
     }
 
-  return as_a_nullable <rtx_insn *> (last);
+  return last;
 }
 
 /* Make X be output after the insn AFTER and set the BB of insn.  If
@@ -5594,11 +5621,11 @@ copy_insn (rtx insn)
 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
    on that assumption that INSN itself remains in its original place.  */
 
-rtx
-copy_delay_slot_insn (rtx insn)
+rtx_insn *
+copy_delay_slot_insn (rtx_insn *insn)
 {
   /* Copy INSN with its rtx_code, all its notes, location etc.  */
-  insn = copy_rtx (insn);
+  insn = as_a <rtx_insn *> (copy_rtx (insn));
   INSN_UID (insn) = cur_insn_uid++;
   return insn;
 }
diff --git a/gcc/emit-rtl.h b/gcc/emit-rtl.h
index f339886..ed75f09 100644
--- a/gcc/emit-rtl.h
+++ b/gcc/emit-rtl.h
@@ -61,7 +61,7 @@ extern rtx gen_blockage (void);
 extern rtvec gen_rtvec (int, ...);
 extern rtx copy_insn_1 (rtx);
 extern rtx copy_insn (rtx);
-extern rtx copy_delay_slot_insn (rtx);
+extern rtx_insn *copy_delay_slot_insn (rtx_insn *);
 extern rtx gen_int_mode (HOST_WIDE_INT, enum machine_mode);
 extern rtx_insn *emit_copy_of_insn_after (rtx, rtx);
 extern void set_reg_attrs_from_value (rtx, rtx);
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 9ae6af6..df4003d 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -5191,7 +5191,7 @@ reemit_notes (rtx_insn *insn)
 
 /* Move INSN.  Reemit notes if needed.  Update CFG, if needed.  */
 static void
-move_insn (rtx_insn *insn, rtx last, rtx nt)
+move_insn (rtx_insn *insn, rtx_insn *last, rtx nt)
 {
   if (PREV_INSN (insn) != last)
     {
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 7a8e592..d028be1 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -1346,7 +1346,7 @@ inline rtx_insn *PREV_INSN (const_rtx insn)
   return as_a_nullable <rtx_insn *> (prev);
 }
 
-inline rtx& SET_PREV_INSN (rtx insn)
+inline rtx& SET_PREV_INSN (rtx_insn *insn)
 {
   return XEXP (insn, 0);
 }
@@ -1357,7 +1357,7 @@ inline rtx_insn *NEXT_INSN (const_rtx insn)
   return as_a_nullable <rtx_insn *> (next);
 }
 
-inline rtx& SET_NEXT_INSN (rtx insn)
+inline rtx& SET_NEXT_INSN (rtx_insn *insn)
 {
   return XEXP (insn, 1);
 }
@@ -2476,6 +2476,7 @@ extern hashval_t iterative_hash_rtx (const_rtx, hashval_t);
 
 /* In emit-rtl.c */
 extern rtvec gen_rtvec_v (int, rtx *);
+extern rtvec gen_rtvec_v (int, rtx_insn **);
 extern rtx gen_reg_rtx (enum machine_mode);
 extern rtx gen_rtx_REG_offset (rtx, enum machine_mode, unsigned int, int);
 extern rtx gen_reg_rtx_offset (rtx, enum machine_mode, int);
-- 
1.8.5.3

[PATCH 202/236] dwarf2cfi.c: Use rtx_sequence

[David Malcolm]

gcc/
	* dwarf2cfi.c (create_trace_edges): Convert GET_CODE check into a
	dyn_cast, strengthening local "seq" from rtx to rtx_sequence *.
	Use methods of rtx_sequence.
	(scan_trace): Likewise for local "pat".
---
 gcc/dwarf2cfi.c | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index bcfc9dd..38c60d0 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -2341,12 +2341,11 @@ create_trace_edges (rtx insn)
 	for (lab = nonlocal_goto_handler_labels; lab; lab = XEXP (lab, 1))
 	  maybe_record_trace_start_abnormal (XEXP (lab, 0), insn);
     }
-  else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
+  else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
     {
-      rtx seq = PATTERN (insn);
-      int i, n = XVECLEN (seq, 0);
+      int i, n = seq->len ();
       for (i = 0; i < n; ++i)
-	create_trace_edges (XVECEXP (seq, 0, i));
+	create_trace_edges (seq->insn (i));
       return;
     }
 
@@ -2421,12 +2420,12 @@ scan_trace (dw_trace_info *trace)
 
       /* Handle all changes to the row state.  Sequences require special
 	 handling for the positioning of the notes.  */
-      if (GET_CODE (PATTERN (insn)) == SEQUENCE)
+      if (rtx_sequence *pat = dyn_cast <rtx_sequence *> (PATTERN (insn)))
 	{
-	  rtx elt, pat = PATTERN (insn);
-	  int i, n = XVECLEN (pat, 0);
+	  rtx elt;
+	  int i, n = pat->len ();
 
-	  control = XVECEXP (pat, 0, 0);
+	  control = pat->element (0);
 	  if (can_throw_internal (control))
 	    notice_eh_throw (control);
 	  dwarf2out_flush_queued_reg_saves ();
@@ -2438,7 +2437,7 @@ scan_trace (dw_trace_info *trace)
 	      gcc_assert (!RTX_FRAME_RELATED_P (control));
 	      gcc_assert (!find_reg_note (control, REG_ARGS_SIZE, NULL));
 
-	      elt = XVECEXP (pat, 0, 1);
+	      elt = pat->element (1);
 
 	      if (INSN_FROM_TARGET_P (elt))
 		{
@@ -2493,7 +2492,7 @@ scan_trace (dw_trace_info *trace)
 
 	  for (i = 1; i < n; ++i)
 	    {
-	      elt = XVECEXP (pat, 0, i);
+	      elt = pat->element (i);
 	      scan_insn_after (elt);
 	    }
 
-- 
1.8.5.3

[PATCH 140/236] config/microblaze/microblaze.c: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* config/microblaze/microblaze.c (microblaze_call_tls_get_addr):
	Strengthen return type and local "insns" from rtx to rtx_insn *.
	(microblaze_legitimize_tls_address): Likewise for local "insns".
	(microblaze_block_move_loop): Strengthen local "label" from rtx
	to rtx_code_label *.
	(microblaze_expand_prologue): Strengthen two locals named "insn"
	from rtx to rtx_insn *.
	(microblaze_asm_output_mi_thunk): Likewise for local "insn".
	(microblaze_expand_divide): Likewise for locals "jump", "cjump",
	"insn".  Strengthen locals "div_label", "div_end_label" from rtx
	to rtx_code_label *.
---
 gcc/config/microblaze/microblaze.c | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
index b12b7bf..e1a0497 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
@@ -567,10 +567,11 @@ load_tls_operand (rtx x, rtx reg)
   return reg;
 }
 
-static rtx
+static rtx_insn *
 microblaze_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
 {
-  rtx insns, tls_entry;
+  rtx_insn *insns;
+  rtx tls_entry;
 
   df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true);
 
@@ -594,7 +595,8 @@ microblaze_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
 rtx
 microblaze_legitimize_tls_address(rtx x, rtx reg)
 {
-  rtx dest, insns, ret, eqv, addend;
+  rtx dest, ret, eqv, addend;
+  rtx_insn *insns;
   enum tls_model model;
   model = SYMBOL_REF_TLS_MODEL (x);
 
@@ -1143,7 +1145,8 @@ microblaze_adjust_block_mem (rtx mem, HOST_WIDE_INT length,
 static void
 microblaze_block_move_loop (rtx dest, rtx src, HOST_WIDE_INT length)
 {
-  rtx label, src_reg, dest_reg, final_src;
+  rtx_code_label *label;
+  rtx src_reg, dest_reg, final_src;
   HOST_WIDE_INT leftover;
 
   leftover = length % MAX_MOVE_BYTES;
@@ -2850,7 +2853,7 @@ microblaze_expand_prologue (void)
     {
       rtx fsiz_rtx = GEN_INT (fsiz);
 
-      rtx insn = NULL;
+      rtx_insn *insn = NULL;
       insn = emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx,
 				    fsiz_rtx));
       if (insn)
@@ -2877,7 +2880,7 @@ microblaze_expand_prologue (void)
 
       if (frame_pointer_needed)
 	{
-	  rtx insn = 0;
+	  rtx_insn *insn = 0;
 
 	  insn = emit_insn (gen_movsi (hard_frame_pointer_rtx,
 				       stack_pointer_rtx));
@@ -3124,7 +3127,8 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
         HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
         tree function)
 {
-  rtx this_rtx, insn, funexp;
+  rtx this_rtx, funexp;
+  rtx_insn *insn;
 
   reload_completed = 1;
   epilogue_completed = 1;
@@ -3429,12 +3433,12 @@ microblaze_expand_divide (rtx operands[])
   rtx regt1 = gen_reg_rtx (SImode); 
   rtx reg18 = gen_rtx_REG (SImode, R_TMP);
   rtx regqi = gen_reg_rtx (QImode);
-  rtx div_label = gen_label_rtx ();
-  rtx div_end_label = gen_label_rtx ();
+  rtx_code_label *div_label = gen_label_rtx ();
+  rtx_code_label *div_end_label = gen_label_rtx ();
   rtx div_table_rtx = gen_rtx_SYMBOL_REF (QImode,"_divsi3_table");
   rtx mem_rtx;
   rtx ret;
-  rtx jump, cjump, insn;
+  rtx_insn *jump, *cjump, *insn;
 
   insn = emit_insn (gen_iorsi3 (regt1, operands[1], operands[2]));
   cjump = emit_jump_insn_after (gen_cbranchsi4 (
-- 
1.8.5.3

Re: [PATCH 140/236] config/microblaze/microblaze.c: Use rtx_insn and rtx_code_label

[Michael Eager]

On 08/06/14 10:21, David Malcolm wrote:
> gcc/
> 	* config/microblaze/microblaze.c (microblaze_call_tls_get_addr):
> 	Strengthen return type and local "insns" from rtx to rtx_insn *.
> 	(microblaze_legitimize_tls_address): Likewise for local "insns".
> 	(microblaze_block_move_loop): Strengthen local "label" from rtx
> 	to rtx_code_label *.
> 	(microblaze_expand_prologue): Strengthen two locals named "insn"
> 	from rtx to rtx_insn *.
> 	(microblaze_asm_output_mi_thunk): Likewise for local "insn".
> 	(microblaze_expand_divide): Likewise for locals "jump", "cjump",
> 	"insn".  Strengthen locals "div_label", "div_end_label" from rtx
> 	to rtx_code_label *.


OK


-- 
Michael Eager	 eager@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306  650-325-8077

[PATCH 206/236] jump.c: Use rtx_sequence

[David Malcolm]

gcc/
	* jump.c (mark_jump_label_1): Within the SEQUENCE case, introduce
	local "seq" with a checked cast, and use methods of rtx_sequence
	to clarify the code.
---
 gcc/jump.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/gcc/jump.c b/gcc/jump.c
index 1aab9bb..d24e51f 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -1107,9 +1107,12 @@ mark_jump_label_1 (rtx x, rtx insn, bool in_mem, bool is_target)
       break;
 
     case SEQUENCE:
-      for (i = 0; i < XVECLEN (x, 0); i++)
-	mark_jump_label (PATTERN (XVECEXP (x, 0, i)),
-			 XVECEXP (x, 0, i), 0);
+      {
+	rtx_sequence *seq = as_a <rtx_sequence *> (x);
+	for (i = 0; i < seq->len (); i++)
+	  mark_jump_label (PATTERN (seq->insn (i)),
+			   seq->insn (i), 0);
+      }
       return;
 
     case SYMBOL_REF:
-- 
1.8.5.3

[PATCH 223/236] inside_basic_block_p requires a const rtx_insn *

[David Malcolm]

gcc/
	* basic-block.h (inside_basic_block_p): Strengthen param from
	const_rtx to const rtx_insn *.
	* cfgbuild.c (inside_basic_block_p): Likewise.
---
 gcc/basic-block.h | 2 +-
 gcc/cfgbuild.c    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index b96c28a..b527f9e 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -819,7 +819,7 @@ extern int flow_find_head_matching_sequence (basic_block, basic_block,
 extern bool delete_unreachable_blocks (void);
 
 extern void update_br_prob_note (basic_block);
-extern bool inside_basic_block_p (const_rtx);
+extern bool inside_basic_block_p (const rtx_insn *);
 extern bool control_flow_insn_p (const_rtx);
 extern rtx_insn *get_last_bb_insn (basic_block);
 
diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index 082f070..ab268ae 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -44,7 +44,7 @@ static void compute_outgoing_frequencies (basic_block);
    block.  */
 
 bool
-inside_basic_block_p (const_rtx insn)
+inside_basic_block_p (const rtx_insn *insn)
 {
   switch (GET_CODE (insn))
     {
-- 
1.8.5.3

[PATCH 177/236] Tighten up params of create_basic_block_structure

[David Malcolm]

gcc/
	* basic-block.h (create_basic_block_structure): Strengthen params
	1 "head" and 2 "end" from rtx to rtx_insn *.
	* cfgrtl.c (create_basic_block_structure): Likewise.
	(rtl_create_basic_block): Update casts from void * to rtx to
	rtx_insn *, so that we can pass them as rtx_insn * to
	create_basic_block_structure.
	* sel-sched-ir.c (sel_create_basic_block): Likewise.
---
 gcc/basic-block.h  | 4 ++--
 gcc/cfgrtl.c       | 5 +++--
 gcc/sel-sched-ir.c | 3 ++-
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 8d1c924..5b2af29 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -411,8 +411,8 @@ extern void remove_edge_raw (edge);
 extern void redirect_edge_succ (edge, basic_block);
 extern edge redirect_edge_succ_nodup (edge, basic_block);
 extern void redirect_edge_pred (edge, basic_block);
-extern basic_block create_basic_block_structure (rtx, rtx, rtx_note *,
-						 basic_block);
+extern basic_block create_basic_block_structure (rtx_insn *, rtx_insn *,
+						 rtx_note *, basic_block);
 extern void clear_bb_flags (void);
 extern void dump_bb_info (FILE *, basic_block, int, int, bool, bool);
 extern void dump_edge_info (FILE *, edge, int, int);
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index e8990c4..1949aff 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -271,7 +271,7 @@ delete_insn_chain (rtx start, rtx finish, bool clear_bb)
    AFTER is the basic block we should be put after.  */
 
 basic_block
-create_basic_block_structure (rtx head, rtx end, rtx_note *bb_note,
+create_basic_block_structure (rtx_insn *head, rtx_insn *end, rtx_note *bb_note,
 			      basic_block after)
 {
   basic_block bb;
@@ -351,7 +351,8 @@ create_basic_block_structure (rtx head, rtx end, rtx_note *bb_note,
 static basic_block
 rtl_create_basic_block (void *headp, void *endp, basic_block after)
 {
-  rtx head = (rtx) headp, end = (rtx) endp;
+  rtx_insn *head = (rtx_insn *) headp;
+  rtx_insn *end = (rtx_insn *) endp;
   basic_block bb;
 
   /* Grow the basic block array if needed.  */
diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index a996cc8..8fc1b1a 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -5363,7 +5363,8 @@ sel_create_basic_block (void *headp, void *endp, basic_block after)
     new_bb = orig_cfg_hooks.create_basic_block (headp, endp, after);
   else
     {
-      new_bb = create_basic_block_structure ((rtx) headp, (rtx) endp,
+      new_bb = create_basic_block_structure ((rtx_insn *) headp,
+					     (rtx_insn *) endp,
 					     new_bb_note, after);
       new_bb->aux = NULL;
     }
-- 
1.8.5.3

[PATCH 186/236] Various condition-handling calls

[David Malcolm]

gcc/
	* rtl.h (canonicalize_condition): Strengthen param 1 from rtx to
	rtx_insn * and param 4 from rtx * to rtx_insn **.
	(get_condition): Strengthen param 1 from rtx to rtx_insn * and
	param 2 from rtx * to rtx_insn **.

	* df.h (can_move_insns_across): Strengthen params 1-4 from rtx to
	rtx_insn * and final param from rtx * to rtx_insn **.

	* cfgcleanup.c (try_head_merge_bb): Strengthen local "move_before"
	from rtx to rtx_insn *.
	(try_head_merge_bb): Likewise for both locals named "move_upto".
	* df-problems.c (can_move_insns_across): Likewise for params
	"from", "to", "across_from", "across_to" and locals "insn",
	"next", "max_to".  Strengthen param "pmove_upto" from rtx * to
	rtx_insn **.
	* ifcvt.c (struct noce_if_info): Strengthen field "cond_earliest"
	from rtx to rtx_insn *.
	(noce_get_alt_condition): Strengthen param "earliest" from rtx *
	to rtx_insn **.  Strengthen local "insn" from rtx to rtx_insn *.
	(noce_try_minmax): Strengthen locals "earliest", "seq" from rtx to
	rtx_insn *.
	(noce_try_abs): Likewise.
	(noce_get_condition): Likewise for param "jump".  Strengthen param
	"earliest" from rtx * to rtx_insn **.
	(noce_find_if_block): Strengthen local "cond_earliest" from rtx to
	rtx_insn *.
	(find_cond_trap): Likewise.
	(dead_or_predicable): Likewise for local "earliest".
	* loop-iv.c (check_simple_exit): Likewise for local "at".  Add
	checked cast.
	* rtlanal.c (canonicalize_condition): Likewise for param "insn"
	and local "prev".  Strengthen param "earliest" from rtx * to
	rtx_insn **.
	(get_condition): Strengthen param "jump" from rtx to rtx_insn *
	Strengthen param "earliest" from rtx * to rtx_insn **.
---
 gcc/cfgcleanup.c  |  7 ++++---
 gcc/df-problems.c | 11 ++++++-----
 gcc/df.h          |  6 ++++--
 gcc/ifcvt.c       | 29 ++++++++++++++++-------------
 gcc/loop-iv.c     |  6 +++---
 gcc/rtl.h         |  5 +++--
 gcc/rtlanal.c     |  8 +++++---
 7 files changed, 41 insertions(+), 31 deletions(-)

diff --git a/gcc/cfgcleanup.c b/gcc/cfgcleanup.c
index 1a35a89..fe0de9f 100644
--- a/gcc/cfgcleanup.c
+++ b/gcc/cfgcleanup.c
@@ -2291,7 +2291,8 @@ try_head_merge_bb (basic_block bb)
   bool changed, moveall;
   unsigned ix;
   rtx_insn *e0_last_head;
-  rtx cond, move_before;
+  rtx cond;
+  rtx_insn *move_before;
   unsigned nedges = EDGE_COUNT (bb->succs);
   rtx_insn *jump = BB_END (bb);
   regset live, live_union;
@@ -2455,7 +2456,7 @@ try_head_merge_bb (basic_block bb)
      with the final move.  */
   if (final_dest_bb != NULL)
     {
-      rtx move_upto;
+      rtx_insn *move_upto;
 
       moveall = can_move_insns_across (currptr[0], e0_last_head, move_before,
 				       jump, e0->dest, live_union,
@@ -2490,7 +2491,7 @@ try_head_merge_bb (basic_block bb)
 
   do
     {
-      rtx move_upto;
+      rtx_insn *move_upto;
       moveall = can_move_insns_across (currptr[0], e0_last_head,
 				       move_before, jump, e0->dest, live_union,
 				       NULL, &move_upto);
diff --git a/gcc/df-problems.c b/gcc/df-problems.c
index 47902f7..6da3418 100644
--- a/gcc/df-problems.c
+++ b/gcc/df-problems.c
@@ -3816,11 +3816,12 @@ simulate_backwards_to_point (basic_block bb, regset live, rtx point)
    is set to point at the last moveable insn in such a case.  */
 
 bool
-can_move_insns_across (rtx from, rtx to, rtx across_from, rtx across_to,
+can_move_insns_across (rtx_insn *from, rtx_insn *to,
+		       rtx_insn *across_from, rtx_insn *across_to,
 		       basic_block merge_bb, regset merge_live,
-		       regset other_branch_live, rtx *pmove_upto)
+		       regset other_branch_live, rtx_insn **pmove_upto)
 {
-  rtx insn, next, max_to;
+  rtx_insn *insn, *next, *max_to;
   bitmap merge_set, merge_use, local_merge_live;
   bitmap test_set, test_use;
   unsigned i, fail = 0;
@@ -3830,7 +3831,7 @@ can_move_insns_across (rtx from, rtx to, rtx across_from, rtx across_to,
   bool trapping_insns_in_across = false;
 
   if (pmove_upto != NULL)
-    *pmove_upto = NULL_RTX;
+    *pmove_upto = NULL;
 
   /* Find real bounds, ignoring debug insns.  */
   while (!NONDEBUG_INSN_P (from) && from != to)
@@ -3906,7 +3907,7 @@ can_move_insns_across (rtx from, rtx to, rtx across_from, rtx across_to,
      the first insn in MERGE that sets a register in TEST_USE, or uses
      a register in TEST_SET.  We also check for calls, trapping operations,
      and memory references.  */
-  max_to = NULL_RTX;
+  max_to = NULL;
   for (insn = from; ; insn = next)
     {
       if (CALL_P (insn))
diff --git a/gcc/df.h b/gcc/df.h
index aabde63..a235996 100644
--- a/gcc/df.h
+++ b/gcc/df.h
@@ -984,8 +984,10 @@ extern void df_simulate_finalize_backwards (basic_block, bitmap);
 extern void df_simulate_initialize_forwards (basic_block, bitmap);
 extern void df_simulate_one_insn_forwards (basic_block, rtx, bitmap);
 extern void simulate_backwards_to_point (basic_block, regset, rtx);
-extern bool can_move_insns_across (rtx, rtx, rtx, rtx, basic_block, regset,
-				   regset, rtx *);
+extern bool can_move_insns_across (rtx_insn *, rtx_insn *,
+				   rtx_insn *, rtx_insn *,
+				   basic_block, regset,
+				   regset, rtx_insn **);
 /* Functions defined in df-scan.c.  */
 
 extern void df_scan_alloc (bitmap);
diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index 25e6493..c5f3647 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -93,7 +93,7 @@ static rtx find_active_insn_after (basic_block, rtx);
 static basic_block block_fallthru (basic_block);
 static int cond_exec_process_insns (ce_if_block *, rtx, rtx, rtx, int, int);
 static rtx cond_exec_get_condition (rtx);
-static rtx noce_get_condition (rtx, rtx *, bool);
+static rtx noce_get_condition (rtx_insn *, rtx_insn **, bool);
 static int noce_operand_ok (const_rtx);
 static void merge_if_block (ce_if_block *);
 static int find_cond_trap (basic_block, edge, edge);
@@ -762,7 +762,7 @@ struct noce_if_info
   rtx cond;
 
   /* New insns should be inserted before this one.  */
-  rtx cond_earliest;
+  rtx_insn *cond_earliest;
 
   /* Insns in the THEN and ELSE block.  There is always just this
      one insns in those blocks.  The insns are single_set insns.
@@ -798,7 +798,7 @@ static rtx noce_emit_cmove (struct noce_if_info *, rtx, enum rtx_code, rtx,
 			    rtx, rtx, rtx);
 static int noce_try_cmove (struct noce_if_info *);
 static int noce_try_cmove_arith (struct noce_if_info *);
-static rtx noce_get_alt_condition (struct noce_if_info *, rtx, rtx *);
+static rtx noce_get_alt_condition (struct noce_if_info *, rtx, rtx_insn **);
 static int noce_try_minmax (struct noce_if_info *);
 static int noce_try_abs (struct noce_if_info *);
 static int noce_try_sign_mask (struct noce_if_info *);
@@ -1730,9 +1730,10 @@ noce_try_cmove_arith (struct noce_if_info *if_info)
 
 static rtx
 noce_get_alt_condition (struct noce_if_info *if_info, rtx target,
-			rtx *earliest)
+			rtx_insn **earliest)
 {
-  rtx cond, set, insn;
+  rtx cond, set;
+  rtx_insn *insn;
   int reverse;
 
   /* If target is already mentioned in the known condition, return it.  */
@@ -1882,8 +1883,8 @@ noce_get_alt_condition (struct noce_if_info *if_info, rtx target,
 static int
 noce_try_minmax (struct noce_if_info *if_info)
 {
-  rtx cond, earliest, target;
-  rtx_insn *seq;
+  rtx cond, target;
+  rtx_insn *earliest, *seq;
   enum rtx_code code, op;
   int unsignedp;
 
@@ -1978,8 +1979,8 @@ noce_try_minmax (struct noce_if_info *if_info)
 static int
 noce_try_abs (struct noce_if_info *if_info)
 {
-  rtx cond, earliest, target, a, b, c;
-  rtx_insn *seq;
+  rtx cond, target, a, b, c;
+  rtx_insn *earliest, *seq;
   int negate;
   bool one_cmpl = false;
 
@@ -2306,7 +2307,7 @@ noce_try_bitop (struct noce_if_info *if_info)
    THEN block of the caller, and we have to reverse the condition.  */
 
 static rtx
-noce_get_condition (rtx jump, rtx *earliest, bool then_else_reversed)
+noce_get_condition (rtx_insn *jump, rtx_insn **earliest, bool then_else_reversed)
 {
   rtx cond, set, tmp;
   bool reverse;
@@ -3027,7 +3028,7 @@ noce_find_if_block (basic_block test_bb, edge then_edge, edge else_edge,
   bool then_else_reversed = false;
   rtx_insn *jump;
   rtx cond;
-  rtx cond_earliest;
+  rtx_insn *cond_earliest;
   struct noce_if_info if_info;
 
   /* We only ever should get here before reload.  */
@@ -3681,7 +3682,8 @@ find_cond_trap (basic_block test_bb, edge then_edge, edge else_edge)
   basic_block else_bb = else_edge->dest;
   basic_block other_bb, trap_bb;
   rtx_insn *trap, *jump;
-  rtx cond, cond_earliest, seq;
+  rtx cond, seq;
+  rtx_insn *cond_earliest;
   enum rtx_code code;
 
   /* Locate the block with the trap instruction.  */
@@ -4117,7 +4119,8 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
 {
   basic_block new_dest = dest_edge->dest;
   rtx_insn *head, *end, *jump;
-  rtx earliest = NULL_RTX, old_dest;
+  rtx_insn *earliest = NULL;
+  rtx old_dest;
   bitmap merge_set = NULL;
   /* Number of pending changes.  */
   int n_validated_changes = 0;
diff --git a/gcc/loop-iv.c b/gcc/loop-iv.c
index b8b5d19..74e38e1 100644
--- a/gcc/loop-iv.c
+++ b/gcc/loop-iv.c
@@ -2892,7 +2892,8 @@ static void
 check_simple_exit (struct loop *loop, edge e, struct niter_desc *desc)
 {
   basic_block exit_bb;
-  rtx condition, at;
+  rtx condition;
+  rtx_insn *at;
   edge ein;
 
   exit_bb = e->src;
@@ -2930,8 +2931,7 @@ check_simple_exit (struct loop *loop, edge e, struct niter_desc *desc)
 
   /* Check that we are able to determine number of iterations and fill
      in information about it.  */
-  iv_number_of_iterations (loop, as_a_nullable <rtx_insn *> (at),
-			   condition, desc);
+  iv_number_of_iterations (loop, at, condition, desc);
 }
 
 /* Finds a simple exit of LOOP and stores its description into DESC.  */
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 2c27b84..cda76cd 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2648,11 +2648,12 @@ extern int insn_rtx_cost (rtx, bool);
 
 /* Given an insn and condition, return a canonical description of
    the test being made.  */
-extern rtx canonicalize_condition (rtx, rtx, int, rtx *, rtx, int, int);
+extern rtx canonicalize_condition (rtx_insn *, rtx, int, rtx_insn **, rtx,
+				   int, int);
 
 /* Given a JUMP_INSN, return a canonical description of the test
    being made.  */
-extern rtx get_condition (rtx, rtx *, int, int);
+extern rtx get_condition (rtx_insn *, rtx_insn **, int, int);
 
 /* Information about a subreg of a hard register.  */
 struct subreg_info
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 5c5e643..99869a1 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -4985,11 +4985,12 @@ insn_rtx_cost (rtx pat, bool speed)
    and at INSN.  */
 
 rtx
-canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
+canonicalize_condition (rtx_insn *insn, rtx cond, int reverse,
+			rtx_insn **earliest,
 			rtx want_reg, int allow_cc_mode, int valid_at_insn_p)
 {
   enum rtx_code code;
-  rtx prev = insn;
+  rtx_insn *prev = insn;
   const_rtx set;
   rtx tem;
   rtx op0, op1;
@@ -5254,7 +5255,8 @@ canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
    VALID_AT_INSN_P is the same as for canonicalize_condition.  */
 
 rtx
-get_condition (rtx jump, rtx *earliest, int allow_cc_mode, int valid_at_insn_p)
+get_condition (rtx_insn *jump, rtx_insn **earliest, int allow_cc_mode,
+	       int valid_at_insn_p)
 {
   rtx cond;
   int reverse;
-- 
1.8.5.3

[PATCH 212/236] Use rtx_expr_list for expr_status.x_forced_labels

[David Malcolm]

gcc/
	* function.h (struct expr_status): Strengthen field
	"x_forced_labels" from rtx to rtx_expr_list *.

	* cfgbuild.c (make_edges): Split local "x" into two locals,
	strengthening one from rtx to rtx_expr_list *, and using methods
	of said class.
	* dwarf2cfi.c (create_trace_edges): Split local "lab" out; within
	loop over forced_labels, introduce strengthen it from rtx to
	rtx_expr_list *, using methods to clarify the code.
	* jump.c (rebuild_jump_labels_1): Strengthen local "insn" from rtx
	to rtx_expr_list *, using methods of said class to clarify the
	code.
	* reload1.c (set_initial_label_offsets): Split local "x" into two
	per-loop variables, strengthening the first from rtx to
	rtx_expr_list * and using methods.
---
 gcc/cfgbuild.c  |  7 +++----
 gcc/dwarf2cfi.c | 14 +++++++-------
 gcc/function.h  |  2 +-
 gcc/jump.c      |  8 ++++----
 gcc/reload1.c   |  9 ++++-----
 5 files changed, 19 insertions(+), 21 deletions(-)

diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index dd6ed7a..05adac0 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -219,7 +219,6 @@ make_edges (basic_block min, basic_block max, int update_p)
   FOR_BB_BETWEEN (bb, min, max->next_bb, next_bb)
     {
       rtx_insn *insn;
-      rtx x;
       enum rtx_code code;
       edge e;
       edge_iterator ei;
@@ -285,8 +284,8 @@ make_edges (basic_block min, basic_block max, int update_p)
 	     everything on the forced_labels list.  */
 	  else if (computed_jump_p (insn))
 	    {
-	      for (x = forced_labels; x; x = XEXP (x, 1))
-		make_label_edge (edge_cache, bb, XEXP (x, 0), EDGE_ABNORMAL);
+	      for (rtx_expr_list *x = forced_labels; x; x = x->next ())
+		make_label_edge (edge_cache, bb, x->element (), EDGE_ABNORMAL);
 	    }
 
 	  /* Returns create an exit out.  */
@@ -338,7 +337,7 @@ make_edges (basic_block min, basic_block max, int update_p)
 		     taken, then only calls to those functions or to other
 		     nested functions that use them could possibly do
 		     nonlocal gotos.  */
-		  for (x = nonlocal_goto_handler_labels; x; x = XEXP (x, 1))
+		  for (rtx x = nonlocal_goto_handler_labels; x; x = XEXP (x, 1))
 		    make_label_edge (edge_cache, bb, XEXP (x, 0),
 				     EDGE_ABNORMAL | EDGE_ABNORMAL_CALL);
 		}
diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index 38c60d0..b5ea683 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -2286,7 +2286,7 @@ maybe_record_trace_start_abnormal (rtx start, rtx origin)
 static void
 create_trace_edges (rtx insn)
 {
-  rtx tmp, lab;
+  rtx tmp;
   int i, n;
 
   if (JUMP_P (insn))
@@ -2303,14 +2303,14 @@ create_trace_edges (rtx insn)
 	  n = GET_NUM_ELEM (vec);
 	  for (i = 0; i < n; ++i)
 	    {
-	      lab = XEXP (RTVEC_ELT (vec, i), 0);
+	      rtx lab = XEXP (RTVEC_ELT (vec, i), 0);
 	      maybe_record_trace_start (lab, insn);
 	    }
 	}
       else if (computed_jump_p (insn))
 	{
-	  for (lab = forced_labels; lab; lab = XEXP (lab, 1))
-	    maybe_record_trace_start (XEXP (lab, 0), insn);
+	  for (rtx_expr_list *lab = forced_labels; lab; lab = lab->next ())
+	    maybe_record_trace_start (lab->element (), insn);
 	}
       else if (returnjump_p (insn))
 	;
@@ -2319,13 +2319,13 @@ create_trace_edges (rtx insn)
 	  n = ASM_OPERANDS_LABEL_LENGTH (tmp);
 	  for (i = 0; i < n; ++i)
 	    {
-	      lab = XEXP (ASM_OPERANDS_LABEL (tmp, i), 0);
+	      rtx lab = XEXP (ASM_OPERANDS_LABEL (tmp, i), 0);
 	      maybe_record_trace_start (lab, insn);
 	    }
 	}
       else
 	{
-	  lab = JUMP_LABEL (insn);
+	  rtx lab = JUMP_LABEL (insn);
 	  gcc_assert (lab != NULL);
 	  maybe_record_trace_start (lab, insn);
 	}
@@ -2338,7 +2338,7 @@ create_trace_edges (rtx insn)
 
       /* Process non-local goto edges.  */
       if (can_nonlocal_goto (insn))
-	for (lab = nonlocal_goto_handler_labels; lab; lab = XEXP (lab, 1))
+	for (rtx lab = nonlocal_goto_handler_labels; lab; lab = XEXP (lab, 1))
 	  maybe_record_trace_start_abnormal (XEXP (lab, 0), insn);
     }
   else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
diff --git a/gcc/function.h b/gcc/function.h
index 28a20f3..ba7597c 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -135,7 +135,7 @@ struct GTY(()) expr_status {
   rtx x_apply_args_value;
 
   /* List of labels that must never be deleted.  */
-  rtx x_forced_labels;
+  rtx_expr_list *x_forced_labels;
 };
 
 typedef struct call_site_record_d *call_site_record;
diff --git a/gcc/jump.c b/gcc/jump.c
index d24e51f..ca1f2d2 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -74,7 +74,7 @@ static int returnjump_p_1 (rtx *, void *);
 static void
 rebuild_jump_labels_1 (rtx_insn *f, bool count_forced)
 {
-  rtx insn;
+  rtx_expr_list *insn;
 
   timevar_push (TV_REBUILD_JUMP);
   init_label_info (f);
@@ -85,9 +85,9 @@ rebuild_jump_labels_1 (rtx_insn *f, bool count_forced)
      count doesn't drop to zero.  */
 
   if (count_forced)
-    for (insn = forced_labels; insn; insn = XEXP (insn, 1))
-      if (LABEL_P (XEXP (insn, 0)))
-	LABEL_NUSES (XEXP (insn, 0))++;
+    for (insn = forced_labels; insn; insn = insn->next ())
+      if (LABEL_P (insn->element ()))
+	LABEL_NUSES (insn->element ())++;
   timevar_pop (TV_REBUILD_JUMP);
 }
 
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 6f9ec47..c669043 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -3922,14 +3922,13 @@ set_initial_eh_label_offset (rtx label)
 static void
 set_initial_label_offsets (void)
 {
-  rtx x;
   memset (offsets_known_at, 0, num_labels);
 
-  for (x = forced_labels; x; x = XEXP (x, 1))
-    if (XEXP (x, 0))
-      set_label_offsets (XEXP (x, 0), NULL, 1);
+  for (rtx_expr_list *x = forced_labels; x; x = x->next ())
+    if (x->element ())
+      set_label_offsets (x->element (), NULL, 1);
 
-  for (x = nonlocal_goto_handler_labels; x; x = XEXP (x, 1))
+  for (rtx x = nonlocal_goto_handler_labels; x; x = XEXP (x, 1))
     if (XEXP (x, 0))
       set_label_offsets (XEXP (x, 0), NULL, 1);
 
-- 
1.8.5.3

Re: [PATCH 212/236] Use rtx_expr_list for expr_status.x_forced_labels

[Bernd Schmidt]

On 08/06/2014 07:23 PM, David Malcolm wrote:
> diff --git a/gcc/function.h b/gcc/function.h
> index 28a20f3..ba7597c 100644
> --- a/gcc/function.h
> +++ b/gcc/function.h
> @@ -135,7 +135,7 @@ struct GTY(()) expr_status {
>     rtx x_apply_args_value;
>
>     /* List of labels that must never be deleted.  */
> -  rtx x_forced_labels;
> +  rtx_expr_list *x_forced_labels;
>   };
>

As I said at the Cauldron, this sort of thing seems like the wrong thing 
to do - when eliminating our own ancient list implementations we should 
just go to normal C++ such as list<rtx>, or maybe even just a vec in 
this case and some others. This applies to both expr_list and insn_list 
- in the end we really shouldn't have either rtx_expr_list or rtx_insn_list.


Bernd

Re: [PATCH 212/236] Use rtx_expr_list for expr_status.x_forced_labels

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 1830 bytes --]

On Thu, 2014-08-07 at 13:32 +0200, Bernd Schmidt wrote:
> On 08/06/2014 07:23 PM, David Malcolm wrote:
> > diff --git a/gcc/function.h b/gcc/function.h
> > index 28a20f3..ba7597c 100644
> > --- a/gcc/function.h
> > +++ b/gcc/function.h
> > @@ -135,7 +135,7 @@ struct GTY(()) expr_status {
> >     rtx x_apply_args_value;
> >
> >     /* List of labels that must never be deleted.  */
> > -  rtx x_forced_labels;
> > +  rtx_expr_list *x_forced_labels;
> >   };
> >
> 
> As I said at the Cauldron, this sort of thing seems like the wrong thing 
> to do - when eliminating our own ancient list implementations we should 
> just go to normal C++ such as list<rtx>, or maybe even just a vec in 
> this case and some others. This applies to both expr_list and insn_list 
> - in the end we really shouldn't have either rtx_expr_list or rtx_insn_list.

Thanks.

As I see it, if we want to eliminate EXPR_LIST, INSN_LIST (and
INT_LIST?) in favor of more optimal data structures, then identifying
everywhere they're used seems to me like a good first step, and that's
one of the benefits of these patches.

These patches don't fundamentally change the data structures we're
currently using - they just make them more visible.

As an experiment, I've now tried converting forced_labels to a different
data structure: from an EXPR_LIST to a:
  vec<rtx_code_label *, va_gc> *

I'm attaching the result (I haven't bootstrapped it yet, though it does
compile and run OK on a simple testcase).

I don't know if such a change is an improvement (perhaps a set would be
better than a list, to get better than O(N) when determining if a label
is forced?), but my feeling is that the patchkit makes this kind of
experimentation *much* easier, since
it highlights where we're using EXPR_LIST, thus suggesting targets for
data structure overhauls.

Dave

[-- Attachment #2: use-a-vec-for-forced_labels.patch --]
[-- Type: text/x-patch, Size: 7979 bytes --]

commit 012a3d7ebbfed963db2a8f6f1275c451cbe25d5a
Author: David Malcolm <dmalcolm@redhat.com>
Date:   Thu Aug 7 11:14:54 2014 -0400

    Experimentally use a vec rather than an EXPR_LIST for forced_labels
    
    gcc/
    	* function.h (struct expr_status): Convert field "x_forced_labels"
    	from rtx_expr_list * to vec<rtx_code_label *, va_gc> *.
    	(rtl_data::mark_label_as_forced): New method.
    	(rtl_data::label_forced_p): New method.
    
    	* cfgbuild.c (make_edges): Rewrite forced_labels iteration from a
    	walk down an EXPR_LIST to instead use FOR_EACH_VEC_ELT.
    	* cfgrtl.c (can_delete_label_p): Replace determination of "label"
    	being forced from using in_expr_list_p to using the new
    	rtl_data::label_forced_p method.
    	* dwarf2cfi.c (create_trace_edges): Rewrite forced_labels iteration from a
    	walk down an EXPR_LIST to instead use FOR_EACH_VEC_ELT.
    	* except.c (sjlj_emit_dispatch_table): When marking dispatch_label
    	as a forced label, replace the prepend to an EXPR_LIST logic with
    	a call to the new method rtl_data::mark_label_as_forced.
    	* function.c (rtl_data::mark_label_as_forced): New method,
    	allocating/growing a vec if necessary.
    	(rtl_data::label_forced_p): New method.  Replace linear walk
    	down a linked list with linear search through a vec.
    	* jump.c (rebuild_jump_labels_1): Update for conversion of
    	forced_labels from an EXPR_LIST to a vec.
    	* reload1.c (set_initial_label_offsets): Likewise.
    	* stmt.c (force_label_rtx): When marking "ref" as a forced label,
    	replace the prepend to an EXPR_LIST logic with a call to the new
    	method rtl_data::mark_label_as_forced, adding a checked cast to
    	rtx_code_label *.
    	(expand_label): Likewise for "label_r".

diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index ab268ae..1d9e8be 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -284,8 +284,13 @@ make_edges (basic_block min, basic_block max, int update_p)
 	     everything on the forced_labels list.  */
 	  else if (computed_jump_p (insn))
 	    {
-	      for (rtx_expr_list *x = forced_labels; x; x = x->next ())
-		make_label_edge (edge_cache, bb, x->element (), EDGE_ABNORMAL);
+	      if (forced_labels)
+		{
+		  int i;
+		  rtx_code_label *forced_lab;
+		  FOR_EACH_VEC_ELT (*forced_labels, i, forced_lab)
+		    make_label_edge (edge_cache, bb, forced_lab, EDGE_ABNORMAL);
+		}
 	    }
 
 	  /* Returns create an exit out.  */
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 5e42a97..bb053de 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -117,7 +117,7 @@ can_delete_label_p (const rtx_code_label *label)
   return (!LABEL_PRESERVE_P (label)
 	  /* User declared labels must be preserved.  */
 	  && LABEL_NAME (label) == 0
-	  && !in_expr_list_p (forced_labels, label));
+	  && !crtl->label_forced_p (label));
 }
 
 /* Delete INSN by patching it out.  */
diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index 28d8ff3..55802d0 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -2309,8 +2309,13 @@ create_trace_edges (rtx_insn *insn)
 	}
       else if (computed_jump_p (insn))
 	{
-	  for (rtx_expr_list *lab = forced_labels; lab; lab = lab->next ())
-	    maybe_record_trace_start (lab->insn (), insn);
+	  if (forced_labels)
+	    {
+	      int i;
+	      rtx_code_label *forced_lab;
+	      FOR_EACH_VEC_ELT (*forced_labels, i, forced_lab)
+		maybe_record_trace_start (forced_lab, insn);
+	    }
 	}
       else if (returnjump_p (insn))
 	;
diff --git a/gcc/except.c b/gcc/except.c
index 13df541..737cd2f 100644
--- a/gcc/except.c
+++ b/gcc/except.c
@@ -1321,8 +1321,7 @@ sjlj_emit_dispatch_table (rtx_code_label *dispatch_label, int num_dispatch)
      label on the nonlocal_goto_label list.  Since we're modeling these
      CFG edges more exactly, we can use the forced_labels list instead.  */
   LABEL_PRESERVE_P (dispatch_label) = 1;
-  forced_labels
-    = gen_rtx_EXPR_LIST (VOIDmode, dispatch_label, forced_labels);
+  crtl->mark_label_as_forced (dispatch_label);
 #endif
 
   /* Load up exc_ptr and filter values from the function context.  */
diff --git a/gcc/function.c b/gcc/function.c
index 9eee7668..a027260 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -126,6 +126,32 @@ static void prepare_function_start (void);
 static void do_clobber_return_reg (rtx, void *);
 static void do_use_return_reg (rtx, void *);
 \f
+
+void
+rtl_data::mark_label_as_forced (rtx_code_label *lab)
+{
+  if (!expr.x_forced_labels)
+    vec_alloc (expr.x_forced_labels, 1);
+
+  expr.x_forced_labels->quick_push (lab);
+}
+
+bool
+rtl_data::label_forced_p (const rtx_code_label *lab) const
+{
+  int i;
+  rtx_code_label *forced_lab;
+
+  if (expr.x_forced_labels)
+    FOR_EACH_VEC_ELT (*expr.x_forced_labels, i, forced_lab)
+      if (lab == forced_lab)
+	return true;
+
+  return false;
+}
+
+\f
+
 /* Stack of nested functions.  */
 /* Keep track of the cfun stack.  */
 
diff --git a/gcc/function.h b/gcc/function.h
index c2e0366..38909ef 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -135,7 +135,7 @@ struct GTY(()) expr_status {
   rtx x_apply_args_value;
 
   /* List of labels that must never be deleted.  */
-  rtx_expr_list *x_forced_labels;
+  vec<rtx_code_label *, va_gc> *x_forced_labels;
 };
 
 typedef struct call_site_record_d *call_site_record;
@@ -460,6 +460,11 @@ struct GTY(()) rtl_data {
      to eliminable regs (like the frame pointer) are set if an asm
      sets them.  */
   HARD_REG_SET asm_clobbers;
+
+ public:
+   void mark_label_as_forced (rtx_code_label *lab);
+   bool label_forced_p (const rtx_code_label *lab) const;
+
 };
 
 #define return_label (crtl->x_return_label)
diff --git a/gcc/jump.c b/gcc/jump.c
index be6a8fd..fdaaf0e 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -74,8 +74,6 @@ static int returnjump_p_1 (rtx *, void *);
 static void
 rebuild_jump_labels_1 (rtx_insn *f, bool count_forced)
 {
-  rtx_expr_list *insn;
-
   timevar_push (TV_REBUILD_JUMP);
   init_label_info (f);
   mark_all_labels (f);
@@ -85,9 +83,14 @@ rebuild_jump_labels_1 (rtx_insn *f, bool count_forced)
      count doesn't drop to zero.  */
 
   if (count_forced)
-    for (insn = forced_labels; insn; insn = insn->next ())
-      if (LABEL_P (insn->element ()))
-	LABEL_NUSES (insn->element ())++;
+    if (forced_labels)
+      {
+	int i;
+	rtx_code_label *forced_lab;
+	FOR_EACH_VEC_ELT (*forced_labels, i, forced_lab)
+	  if (LABEL_P (forced_lab))
+	    LABEL_NUSES (forced_lab)++;
+      }
   timevar_pop (TV_REBUILD_JUMP);
 }
 
diff --git a/gcc/reload1.c b/gcc/reload1.c
index ff9d047c..04867a0 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -3922,11 +3922,14 @@ set_initial_eh_label_offset (rtx label)
 static void
 set_initial_label_offsets (void)
 {
+  int i;
+  rtx_code_label *lab;
   memset (offsets_known_at, 0, num_labels);
 
-  for (rtx_expr_list *x = forced_labels; x; x = x->next ())
-    if (x->element ())
-      set_label_offsets (x->element (), NULL, 1);
+  if (forced_labels)
+    FOR_EACH_VEC_ELT (*forced_labels, i, lab)
+      if (lab)
+	set_label_offsets (lab, NULL, 1);
 
   for (rtx_expr_list *x = nonlocal_goto_handler_labels; x; x = x->next ())
     if (x->element ())
diff --git a/gcc/stmt.c b/gcc/stmt.c
index af74142..508ef17 100644
--- a/gcc/stmt.c
+++ b/gcc/stmt.c
@@ -140,12 +140,13 @@ label_rtx (tree label)
 rtx
 force_label_rtx (tree label)
 {
-  rtx ref = label_rtx (label);
+  rtx_code_label *ref = as_a <rtx_code_label *> (label_rtx (label));
   tree function = decl_function_context (label);
 
   gcc_assert (function);
 
-  forced_labels = gen_rtx_EXPR_LIST (VOIDmode, ref, forced_labels);
+  crtl->mark_label_as_forced (ref);
+
   return ref;
 }
 
@@ -191,7 +192,7 @@ expand_label (tree label)
     }
 
   if (FORCED_LABEL (label))
-    forced_labels = gen_rtx_EXPR_LIST (VOIDmode, label_r, forced_labels);
+    crtl->mark_label_as_forced (as_a <rtx_code_label *> (label_r));
 
   if (DECL_NONLOCAL (label) || FORCED_LABEL (label))
     maybe_set_first_label_num (label_r);

Re: [PATCH 212/236] Use rtx_expr_list for expr_status.x_forced_labels

[Jeff Law]

On 08/07/14 05:32, Bernd Schmidt wrote:
> On 08/06/2014 07:23 PM, David Malcolm wrote:
>> diff --git a/gcc/function.h b/gcc/function.h
>> index 28a20f3..ba7597c 100644
>> --- a/gcc/function.h
>> +++ b/gcc/function.h
>> @@ -135,7 +135,7 @@ struct GTY(()) expr_status {
>>     rtx x_apply_args_value;
>>
>>     /* List of labels that must never be deleted.  */
>> -  rtx x_forced_labels;
>> +  rtx_expr_list *x_forced_labels;
>>   };
>>
>
> As I said at the Cauldron, this sort of thing seems like the wrong thing
> to do - when eliminating our own ancient list implementations we should
> just go to normal C++ such as list<rtx>, or maybe even just a vec in
> this case and some others. This applies to both expr_list and insn_list
> - in the end we really shouldn't have either rtx_expr_list or
> rtx_insn_list.
I agree.

But at this point I'd rather see David's work go forward independently, 
then we can go back and do replacement of our home grown list with a 
standard container.  I suspect there's many of these kind of projects 
that could be undertaken throughout GCC's sources.

Jeff

[PATCH 232/236] Use rtx_insn in various places in resource.[ch]

[David Malcolm]

After fixing reorg.c's update_block and reorg_redirect_jump, all
in-tree users of the given resource.h functions now are rtx_insn *, so we
can update the API itself.

gcc/
	* resource.h (clear_hashed_info_for_insn): Strengthen param from
	rtx to rtx_insn *.
	(incr_ticks_for_insn): Likewise.
	(init_resource_info): Likewise.

	* resource.c (init_resource_info): Likewise.
	(clear_hashed_info_for_insn): Likewise.
	(incr_ticks_for_insn): Likewise.

	* reorg.c (delete_scheduled_jump): Strengthen param "insn" from
	rtx to rtx_insn *.
	(steal_delay_list_from_target): Use methods of "seq".
	(try_merge_delay_insns): Use methods of "merged_insns".
	(update_block): Strengthen param "insn" from rtx to rtx_insn *.
	(reorg_redirect_jump): Likewise for param "jump".
---
 gcc/reorg.c    | 22 +++++++++++-----------
 gcc/resource.c |  6 +++---
 gcc/resource.h |  6 +++---
 3 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/gcc/reorg.c b/gcc/reorg.c
index 6f43e40..197081b 100644
--- a/gcc/reorg.c
+++ b/gcc/reorg.c
@@ -210,7 +210,7 @@ static rtx_code_label *find_end_label (rtx);
 static rtx_insn *emit_delay_sequence (rtx_insn *, rtx_insn_list *, int);
 static rtx_insn_list *add_to_delay_list (rtx_insn *, rtx_insn_list *);
 static rtx_insn *delete_from_delay_slot (rtx_insn *);
-static void delete_scheduled_jump (rtx);
+static void delete_scheduled_jump (rtx_insn *);
 static void note_delay_statistics (int, int);
 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
 static rtx_insn_list *optimize_skip (rtx_insn *);
@@ -240,8 +240,8 @@ static rtx_insn_list *steal_delay_list_from_fallthrough (rtx_insn *, rtx,
 static void try_merge_delay_insns (rtx, rtx_insn *);
 static rtx redundant_insn (rtx, rtx_insn *, rtx);
 static int own_thread_p (rtx_insn *, rtx, int);
-static void update_block (rtx, rtx);
-static int reorg_redirect_jump (rtx, rtx);
+static void update_block (rtx_insn *, rtx);
+static int reorg_redirect_jump (rtx_insn *, rtx);
 static void update_reg_dead_notes (rtx, rtx);
 static void fix_reg_dead_note (rtx, rtx);
 static void update_reg_unused_notes (rtx, rtx);
@@ -666,7 +666,7 @@ delete_from_delay_slot (rtx_insn *insn)
    the insn that sets CC0 for it and delete it too.  */
 
 static void
-delete_scheduled_jump (rtx insn)
+delete_scheduled_jump (rtx_insn *insn)
 {
   /* Delete the insn that sets cc0 for us.  On machines without cc0, we could
      delete the insn that sets the condition code, but it is hard to find it.
@@ -1197,9 +1197,9 @@ steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq,
 
   /* Record the effect of the instructions that were redundant and which
      we therefore decided not to copy.  */
-  for (i = 1; i < XVECLEN (seq, 0); i++)
+  for (i = 1; i < seq->len (); i++)
     if (redundant[i])
-      update_block (XVECEXP (seq, 0, i), insn);
+      update_block (seq->insn (i), insn);
 
   /* Show the place to which we will be branching.  */
   *pnew_thread = first_active_target_insn (JUMP_LABEL_AS_INSN (seq->insn (0)));
@@ -1460,15 +1460,15 @@ try_merge_delay_insns (rtx insn, rtx_insn *thread)
 	    {
 	      rtx_insn *new_rtx;
 
-	      update_block (XEXP (merged_insns, 0), thread);
+	      update_block (merged_insns->insn (), thread);
 	      new_rtx = delete_from_delay_slot (merged_insns->insn ());
 	      if (INSN_DELETED_P (thread))
 		thread = new_rtx;
 	    }
 	  else
 	    {
-	      update_block (XEXP (merged_insns, 0), thread);
-	      delete_related_insns (XEXP (merged_insns, 0));
+	      update_block (merged_insns->insn (), thread);
+	      delete_related_insns (merged_insns->insn ());
 	    }
 	}
 
@@ -1759,7 +1759,7 @@ own_thread_p (rtx_insn *thread, rtx label, int allow_fallthrough)
    BARRIER in relax_delay_slots.  */
 
 static void
-update_block (rtx insn, rtx where)
+update_block (rtx_insn *insn, rtx where)
 {
   /* Ignore if this was in a delay slot and it came from the target of
      a branch.  */
@@ -1778,7 +1778,7 @@ update_block (rtx insn, rtx where)
    the basic block containing the jump.  */
 
 static int
-reorg_redirect_jump (rtx jump, rtx nlabel)
+reorg_redirect_jump (rtx_insn *jump, rtx nlabel)
 {
   incr_ticks_for_insn (jump);
   return redirect_jump (jump, nlabel, 1);
diff --git a/gcc/resource.c b/gcc/resource.c
index eb5374e..607baa0 100644
--- a/gcc/resource.c
+++ b/gcc/resource.c
@@ -1155,7 +1155,7 @@ mark_target_live_regs (rtx_insn *insns, rtx_insn *target, struct resources *res)
    This should be invoked before the first call to mark_target_live_regs.  */
 
 void
-init_resource_info (rtx epilogue_insn)
+init_resource_info (rtx_insn *epilogue_insn)
 {
   int i;
   basic_block bb;
@@ -1275,7 +1275,7 @@ free_resource_info (void)
 /* Clear any hashed information that we have stored for INSN.  */
 
 void
-clear_hashed_info_for_insn (rtx insn)
+clear_hashed_info_for_insn (rtx_insn *insn)
 {
   struct target_info *tinfo;
 
@@ -1294,7 +1294,7 @@ clear_hashed_info_for_insn (rtx insn)
 /* Increment the tick count for the basic block that contains INSN.  */
 
 void
-incr_ticks_for_insn (rtx insn)
+incr_ticks_for_insn (rtx_insn *insn)
 {
   int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH);
 
diff --git a/gcc/resource.h b/gcc/resource.h
index 633d1ab..5bc30fd 100644
--- a/gcc/resource.h
+++ b/gcc/resource.h
@@ -48,10 +48,10 @@ extern void mark_target_live_regs (rtx_insn *, rtx_insn *, struct resources *);
 extern void mark_set_resources (rtx, struct resources *, int,
 				enum mark_resource_type);
 extern void mark_referenced_resources (rtx, struct resources *, bool);
-extern void clear_hashed_info_for_insn (rtx);
-extern void incr_ticks_for_insn (rtx);
+extern void clear_hashed_info_for_insn (rtx_insn *);
+extern void incr_ticks_for_insn (rtx_insn *);
 extern void mark_end_of_function_resources (rtx, bool);
-extern void init_resource_info (rtx);
+extern void init_resource_info (rtx_insn *);
 extern void free_resource_info (void);
 
 #endif /* GCC_RESOURCE_H */
-- 
1.8.5.3

[PATCH 226/236] Delete find_last_value

[David Malcolm]

Nothing in the tree appears to use this.

gcc/
	* rtl.h (find_last_value): Delete.
	* rtlanal.c (find_last_value): Delete.
---
 gcc/rtl.h     |  1 -
 gcc/rtlanal.c | 46 ----------------------------------------------
 2 files changed, 47 deletions(-)

diff --git a/gcc/rtl.h b/gcc/rtl.h
index 613d06c..8cdb88d 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2745,7 +2745,6 @@ extern rtx single_set_2 (const_rtx, const_rtx);
 extern int multiple_sets (const_rtx);
 extern int set_noop_p (const_rtx);
 extern int noop_move_p (const_rtx);
-extern rtx find_last_value (rtx, rtx *, rtx, int);
 extern int refers_to_regno_p (unsigned int, unsigned int, const_rtx, rtx *);
 extern int reg_overlap_mentioned_p (const_rtx, const_rtx);
 extern const_rtx set_of (const_rtx, const_rtx);
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 46a5fc1..6429906 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -1274,52 +1274,6 @@ noop_move_p (const_rtx insn)
 }
 \f
 
-/* Return the last thing that X was assigned from before *PINSN.  If VALID_TO
-   is not NULL_RTX then verify that the object is not modified up to VALID_TO.
-   If the object was modified, if we hit a partial assignment to X, or hit a
-   CODE_LABEL first, return X.  If we found an assignment, update *PINSN to
-   point to it.  ALLOW_HWREG is set to 1 if hardware registers are allowed to
-   be the src.  */
-
-rtx
-find_last_value (rtx x, rtx *pinsn, rtx valid_to, int allow_hwreg)
-{
-  rtx p;
-
-  for (p = PREV_INSN (*pinsn); p && !LABEL_P (p);
-       p = PREV_INSN (p))
-    if (INSN_P (p))
-      {
-	rtx set = single_set (p);
-	rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
-
-	if (set && rtx_equal_p (x, SET_DEST (set)))
-	  {
-	    rtx src = SET_SRC (set);
-
-	    if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
-	      src = XEXP (note, 0);
-
-	    if ((valid_to == NULL_RTX
-		 || ! modified_between_p (src, PREV_INSN (p), valid_to))
-		/* Reject hard registers because we don't usually want
-		   to use them; we'd rather use a pseudo.  */
-		&& (! (REG_P (src)
-		      && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg))
-	      {
-		*pinsn = p;
-		return src;
-	      }
-	  }
-
-	/* If set in non-simple way, we don't have a value.  */
-	if (reg_set_p (x, p))
-	  break;
-      }
-
-  return x;
-}
-\f
 /* Return nonzero if register in range [REGNO, ENDREGNO)
    appears either explicitly or implicitly in X
    other than being stored into.
-- 
1.8.5.3

[PATCH 230/236] Make INSN_HAS_LOCATION require an rtx_insn

[David Malcolm]

gcc/
	* rtl.h (INSN_HAS_LOCATION): Strengthen param from const_rtx to
	const rtx_insn *.
---
 gcc/rtl.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/rtl.h b/gcc/rtl.h
index f6167d8..49ad08b 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -1402,7 +1402,7 @@ inline unsigned int& INSN_LOCATION (rtx insn)
   return XUINT (insn, 4);
 }
 
-inline bool INSN_HAS_LOCATION (const_rtx insn)
+inline bool INSN_HAS_LOCATION (const rtx_insn *insn)
 {
   return LOCATION_LOCUS (INSN_LOCATION (insn)) != UNKNOWN_LOCATION;
 }
-- 
1.8.5.3

[PATCH 032/236] emit_* functions return rtx_insn

[David Malcolm]

More scaffolding: strengthen the return types from the various emit_
functions from rtx to rtx_insn * (or to the rtx_barrier * subclass in a
few cases).

These will ultimately have their params strengthened also, but we
postpone that until much later in the patch series.  So for now there
are also various checked casts to ensure we really got an insn when
returning such params back.

Doing so requires a minor tweak to config/sh/sh.c

gcc/
	* emit-rtl.h (emit_copy_of_insn_after): Strengthen return type
	from rtx to rtx_insn *.

	* rtl.h (emit_insn_before): Likewise.
	(emit_insn_before_noloc): Likewise.
	(emit_insn_before_setloc): Likewise.
	(emit_jump_insn_before): Likewise.
	(emit_jump_insn_before_noloc): Likewise.
	(emit_jump_insn_before_setloc): Likewise.
	(emit_call_insn_before): Likewise.
	(emit_call_insn_before_noloc): Likewise.
	(emit_call_insn_before_setloc): Likewise.
	(emit_debug_insn_before): Likewise.
	(emit_debug_insn_before_noloc): Likewise.
	(emit_debug_insn_before_setloc): Likewise.
	(emit_label_before): Likewise.
	(emit_insn_after): Likewise.
	(emit_insn_after_noloc): Likewise.
	(emit_insn_after_setloc): Likewise.
	(emit_jump_insn_after): Likewise.
	(emit_jump_insn_after_noloc): Likewise.
	(emit_jump_insn_after_setloc): Likewise.
	(emit_call_insn_after): Likewise.
	(emit_call_insn_after_noloc): Likewise.
	(emit_call_insn_after_setloc): Likewise.
	(emit_debug_insn_after): Likewise.
	(emit_debug_insn_after_noloc): Likewise.
	(emit_debug_insn_after_setloc): Likewise.
	(emit_label_after): Likewise.
	(emit_insn): Likewise.
	(emit_debug_insn): Likewise.
	(emit_jump_insn): Likewise.
	(emit_call_insn): Likewise.
	(emit_label): Likewise.
	(gen_clobber): Likewise.
	(emit_clobber): Likewise.
	(gen_use): Likewise.
	(emit_use): Likewise.
	(emit): Likewise.

	(emit_barrier_before): Strengthen return type from rtx to
	rtx_barrier *.
	(emit_barrier_after): Likewise.
	(emit_barrier): Likewise.

	* emit-rtl.c (emit_pattern_before_noloc):  Strengthen return type
	from rtx to rtx_insn *.  Add checked casts for now when converting
	"last" from rtx to rtx_insn *.
	(emit_insn_before_noloc): Likewise for return type.
	(emit_jump_insn_before_noloc): Likewise.
	(emit_call_insn_before_noloc): Likewise.
	(emit_debug_insn_before_noloc): Likewise.
	(emit_barrier_before): Strengthen return type and local "insn"
	from rtx to rtx_barrier *.
	(emit_label_before): Strengthen return type from rtx to
	rtx_insn *.  Add checked cast for now when returning param
	(emit_pattern_after_noloc): Strengthen return type from rtx to
	rtx_insn *.  Add checked casts for now when converting "last" from
	rtx to rtx_insn *.
	(emit_insn_after_noloc): Strengthen return type from rtx to
	rtx_insn *.
	(emit_jump_insn_after_noloc): Likewise.
	(emit_call_insn_after_noloc): Likewise.
	(emit_debug_insn_after_noloc): Likewise.
	(emit_barrier_after): Strengthen return type from rtx to
	rtx_barrier *.
	(emit_label_after): Strengthen return type from rtx to rtx_insn *.
	Add checked cast for now when converting "label" from rtx to
	rtx_insn *.
	(emit_pattern_after_setloc): Strengthen return type from rtx to
	rtx_insn *.  Add checked casts for now when converting "last" from
	rtx to rtx_insn *.
	(emit_pattern_after): Strengthen return type from rtx to
	rtx_insn *.
	(emit_insn_after_setloc): Likewise.
	(emit_insn_after): Likewise.
	(emit_jump_insn_after_setloc): Likewise.
	(emit_jump_insn_after): Likewise.
	(emit_call_insn_after_setloc): Likewise.
	(emit_call_insn_after): Likewise.
	(emit_debug_insn_after_setloc): Likewise.
	(emit_debug_insn_after): Likewise.
	(emit_pattern_before_setloc): Likewise.  Add checked casts for now
	when converting "last" from rtx to rtx_insn *.
	(emit_pattern_before): Strengthen return type from rtx to
	rtx_insn *.
	(emit_insn_before_setloc): Likewise.
	(emit_insn_before): Likewise.
	(emit_jump_insn_before_setloc): Likewise.
	(emit_jump_insn_before): Likewise.
	(emit_call_insn_before_setloc): Likewise.
	(emit_call_insn_before): Likewise.
	(emit_debug_insn_before_setloc): Likewise.
	(emit_debug_insn_before): Likewise.
	(emit_insn): Strengthen return type and locals "last", "insn",
	"next" from rtx to rtx_insn *.  Add checked cast to rtx_insn
	within cases where we know we have an insn.
	(emit_debug_insn): Likewise.
	(emit_jump_insn): Likewise.
	(emit_call_insn): Strengthen return type and local "insn" from rtx
	to rtx_insn *.
	(emit_label): Strengthen return type from rtx to rtx_insn *.  Add
	a checked cast to rtx_insn * for now on "label".
	(emit_barrier): Strengthen return type from rtx to rtx_barrier *.
	(emit_clobber): Strengthen return type from rtx to rtx_insn *.
	(emit_use): Likewise.
	(gen_use): Likewise, also for local "seq".
	(emit): Likewise for return type and local "insn".
	(rtx_insn): Likewise for return type and local "new_rtx".

	* cfgrtl.c (emit_barrier_after_bb): Strengthen local "barrier"
	from rtx to rtx_barrier *.

	* config/sh/sh.c (output_stack_adjust): Since emit_insn has
	changed return type from rtx to rtx_insn *, we must update
	"emit_fn" type, and this in turn means updating...
	(frame_insn): ...this.  Strengthen return type from rtx to
	rtx_insn *.  Introduce a new local "insn" of the appropriate type.
---
 gcc/cfgrtl.c       |   2 +-
 gcc/config/sh/sh.c |  12 ++---
 gcc/emit-rtl.c     | 154 +++++++++++++++++++++++++++--------------------------
 gcc/emit-rtl.h     |   2 +-
 gcc/rtl.h          |  78 +++++++++++++--------------
 5 files changed, 125 insertions(+), 123 deletions(-)

diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 2a490f9..9f15a7d 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -1447,7 +1447,7 @@ rtl_redirect_edge_and_branch (edge e, basic_block target)
 void
 emit_barrier_after_bb (basic_block bb)
 {
-  rtx barrier = emit_barrier_after (BB_END (bb));
+  rtx_barrier *barrier = emit_barrier_after (BB_END (bb));
   gcc_assert (current_ir_type () == IR_RTL_CFGRTL
               || current_ir_type () == IR_RTL_CFGLAYOUT);
   if (current_ir_type () == IR_RTL_CFGLAYOUT)
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index a21625f..df6a5bb 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -195,7 +195,7 @@ static rtx gen_block_redirect (rtx, int, int);
 static void sh_reorg (void);
 static void sh_option_override (void);
 static void output_stack_adjust (int, rtx, int, HARD_REG_SET *, bool);
-static rtx frame_insn (rtx);
+static rtx_insn *frame_insn (rtx);
 static rtx push (int);
 static void pop (int);
 static void push_regs (HARD_REG_SET *, int);
@@ -6783,7 +6783,7 @@ static void
 output_stack_adjust (int size, rtx reg, int epilogue_p,
 		     HARD_REG_SET *live_regs_mask, bool frame_p)
 {
-  rtx (*emit_fn) (rtx) = frame_p ? &frame_insn : &emit_insn;
+  rtx_insn *(*emit_fn) (rtx) = frame_p ? &frame_insn : &emit_insn;
   if (size)
     {
       HOST_WIDE_INT align = STACK_BOUNDARY / BITS_PER_UNIT;
@@ -6943,12 +6943,12 @@ output_stack_adjust (int size, rtx reg, int epilogue_p,
 
 /* Emit the specified insn and mark it as frame related.
    FIXME: Rename this to emit_frame_insn.  */
-static rtx
+static rtx_insn *
 frame_insn (rtx x)
 {
-  x = emit_insn (x);
-  RTX_FRAME_RELATED_P (x) = 1;
-  return x;
+  rtx_insn *insn = emit_insn (x);
+  RTX_FRAME_RELATED_P (insn) = 1;
+  return insn;
 }
 
 /* Output RTL to push register RN onto the stack.  */
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 2614937..042694a 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -4256,7 +4256,7 @@ reorder_insns (rtx from, rtx to, rtx after)
    SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
    generated would almost certainly die right after it was created.  */
 
-static rtx
+static rtx_insn *
 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
                            rtx_insn *(*make_raw) (rtx))
 {
@@ -4265,7 +4265,7 @@ emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
   gcc_assert (before);
 
   if (x == NULL_RTX)
-    return last;
+    return as_a_nullable <rtx_insn *> (last);
 
   switch (GET_CODE (x))
     {
@@ -4298,12 +4298,12 @@ emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
       break;
     }
 
-  return last;
+  return as_a_nullable <rtx_insn *> (last);
 }
 
 /* Make X be output before the instruction BEFORE.  */
 
-rtx
+rtx_insn *
 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
 {
   return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
@@ -4312,7 +4312,7 @@ emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
 /* Make an instruction with body X and code JUMP_INSN
    and output it before the instruction BEFORE.  */
 
-rtx
+rtx_insn *
 emit_jump_insn_before_noloc (rtx x, rtx before)
 {
   return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
@@ -4322,7 +4322,7 @@ emit_jump_insn_before_noloc (rtx x, rtx before)
 /* Make an instruction with body X and code CALL_INSN
    and output it before the instruction BEFORE.  */
 
-rtx
+rtx_insn *
 emit_call_insn_before_noloc (rtx x, rtx before)
 {
   return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
@@ -4332,7 +4332,7 @@ emit_call_insn_before_noloc (rtx x, rtx before)
 /* Make an instruction with body X and code DEBUG_INSN
    and output it before the instruction BEFORE.  */
 
-rtx
+rtx_insn *
 emit_debug_insn_before_noloc (rtx x, rtx before)
 {
   return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
@@ -4342,10 +4342,10 @@ emit_debug_insn_before_noloc (rtx x, rtx before)
 /* Make an insn of code BARRIER
    and output it before the insn BEFORE.  */
 
-rtx
+rtx_barrier *
 emit_barrier_before (rtx before)
 {
-  rtx insn = rtx_alloc (BARRIER);
+  rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
 
   INSN_UID (insn) = cur_insn_uid++;
 
@@ -4355,13 +4355,13 @@ emit_barrier_before (rtx before)
 
 /* Emit the label LABEL before the insn BEFORE.  */
 
-rtx
+rtx_insn *
 emit_label_before (rtx label, rtx before)
 {
   gcc_checking_assert (INSN_UID (label) == 0);
   INSN_UID (label) = cur_insn_uid++;
   add_insn_before (label, before, NULL);
-  return label;
+  return as_a <rtx_insn *> (label);
 }
 \f
 /* Helper for emit_insn_after, handles lists of instructions
@@ -4410,7 +4410,7 @@ emit_insn_after_1 (rtx first, rtx after, basic_block bb)
   return last;
 }
 
-static rtx
+static rtx_insn *
 emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
 			  rtx_insn *(*make_raw)(rtx))
 {
@@ -4419,7 +4419,7 @@ emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
   gcc_assert (after);
 
   if (x == NULL_RTX)
-    return last;
+    return as_a_nullable <rtx_insn *> (last);
 
   switch (GET_CODE (x))
     {
@@ -4445,13 +4445,13 @@ emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
       break;
     }
 
-  return last;
+  return as_a_nullable <rtx_insn *> (last);
 }
 
 /* Make X be output after the insn AFTER and set the BB of insn.  If
    BB is NULL, an attempt is made to infer the BB from AFTER.  */
 
-rtx
+rtx_insn *
 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
 {
   return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
@@ -4461,7 +4461,7 @@ emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
 /* Make an insn of code JUMP_INSN with body X
    and output it after the insn AFTER.  */
 
-rtx
+rtx_insn *
 emit_jump_insn_after_noloc (rtx x, rtx after)
 {
   return emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw);
@@ -4470,7 +4470,7 @@ emit_jump_insn_after_noloc (rtx x, rtx after)
 /* Make an instruction with body X and code CALL_INSN
    and output it after the instruction AFTER.  */
 
-rtx
+rtx_insn *
 emit_call_insn_after_noloc (rtx x, rtx after)
 {
   return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
@@ -4479,7 +4479,7 @@ emit_call_insn_after_noloc (rtx x, rtx after)
 /* Make an instruction with body X and code CALL_INSN
    and output it after the instruction AFTER.  */
 
-rtx
+rtx_insn *
 emit_debug_insn_after_noloc (rtx x, rtx after)
 {
   return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
@@ -4488,10 +4488,10 @@ emit_debug_insn_after_noloc (rtx x, rtx after)
 /* Make an insn of code BARRIER
    and output it after the insn AFTER.  */
 
-rtx
+rtx_barrier *
 emit_barrier_after (rtx after)
 {
-  rtx insn = rtx_alloc (BARRIER);
+  rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
 
   INSN_UID (insn) = cur_insn_uid++;
 
@@ -4501,13 +4501,13 @@ emit_barrier_after (rtx after)
 
 /* Emit the label LABEL after the insn AFTER.  */
 
-rtx
+rtx_insn *
 emit_label_after (rtx label, rtx after)
 {
   gcc_checking_assert (INSN_UID (label) == 0);
   INSN_UID (label) = cur_insn_uid++;
   add_insn_after (label, after, NULL);
-  return label;
+  return as_a <rtx_insn *> (label);
 }
 \f
 /* Notes require a bit of special handling: Some notes need to have their
@@ -4577,14 +4577,14 @@ emit_note_before (enum insn_note subtype, rtx before)
 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
    MAKE_RAW indicates how to turn PATTERN into a real insn.  */
 
-static rtx
+static rtx_insn *
 emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
 			   rtx_insn *(*make_raw) (rtx))
 {
   rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
 
   if (pattern == NULL_RTX || !loc)
-    return last;
+    return as_a_nullable <rtx_insn *> (last);
 
   after = NEXT_INSN (after);
   while (1)
@@ -4595,14 +4595,14 @@ emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
 	break;
       after = NEXT_INSN (after);
     }
-  return last;
+  return as_a_nullable <rtx_insn *> (last);
 }
 
 /* Insert PATTERN after AFTER.  MAKE_RAW indicates how to turn PATTERN
    into a real insn.  SKIP_DEBUG_INSNS indicates whether to insert after
    any DEBUG_INSNs.  */
 
-static rtx
+static rtx_insn *
 emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
 		    rtx_insn *(*make_raw) (rtx))
 {
@@ -4620,56 +4620,56 @@ emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
 }
 
 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
 {
   return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
 }
 
 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER.  */
-rtx
+rtx_insn *
 emit_insn_after (rtx pattern, rtx after)
 {
   return emit_pattern_after (pattern, after, true, make_insn_raw);
 }
 
 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
 {
   return emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw);
 }
 
 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER.  */
-rtx
+rtx_insn *
 emit_jump_insn_after (rtx pattern, rtx after)
 {
   return emit_pattern_after (pattern, after, true, make_jump_insn_raw);
 }
 
 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
 {
   return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
 }
 
 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER.  */
-rtx
+rtx_insn *
 emit_call_insn_after (rtx pattern, rtx after)
 {
   return emit_pattern_after (pattern, after, true, make_call_insn_raw);
 }
 
 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
 {
   return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
 }
 
 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER.  */
-rtx
+rtx_insn *
 emit_debug_insn_after (rtx pattern, rtx after)
 {
   return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
@@ -4680,7 +4680,7 @@ emit_debug_insn_after (rtx pattern, rtx after)
    indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
    CALL_INSN, etc.  */
 
-static rtx
+static rtx_insn *
 emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
 			    rtx_insn *(*make_raw) (rtx))
 {
@@ -4690,7 +4690,7 @@ emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
                                         NULL, make_raw);
 
   if (pattern == NULL_RTX || !loc)
-    return last;
+    return as_a_nullable <rtx_insn *> (last);
 
   if (!first)
     first = get_insns ();
@@ -4704,7 +4704,7 @@ emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
 	break;
       first = NEXT_INSN (first);
     }
-  return last;
+  return as_a_nullable <rtx_insn *> (last);
 }
 
 /* Insert PATTERN before BEFORE.  MAKE_RAW indicates how to turn PATTERN
@@ -4712,7 +4712,7 @@ emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
    before any DEBUG_INSNs.  INSNP indicates if PATTERN is meant for an
    INSN as opposed to a JUMP_INSN, CALL_INSN, etc.  */
 
-static rtx
+static rtx_insn *
 emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
 		     bool insnp, rtx_insn *(*make_raw) (rtx))
 {
@@ -4732,7 +4732,7 @@ emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
 }
 
 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
 {
   return emit_pattern_before_setloc (pattern, before, loc, true,
@@ -4740,14 +4740,14 @@ emit_insn_before_setloc (rtx pattern, rtx before, int loc)
 }
 
 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE.  */
-rtx
+rtx_insn *
 emit_insn_before (rtx pattern, rtx before)
 {
   return emit_pattern_before (pattern, before, true, true, make_insn_raw);
 }
 
 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
 {
   return emit_pattern_before_setloc (pattern, before, loc, false,
@@ -4755,7 +4755,7 @@ emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
 }
 
 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE.  */
-rtx
+rtx_insn *
 emit_jump_insn_before (rtx pattern, rtx before)
 {
   return emit_pattern_before (pattern, before, true, false,
@@ -4763,7 +4763,7 @@ emit_jump_insn_before (rtx pattern, rtx before)
 }
 
 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
 {
   return emit_pattern_before_setloc (pattern, before, loc, false,
@@ -4772,7 +4772,7 @@ emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
 
 /* Like emit_call_insn_before_noloc,
    but set insn_location according to BEFORE.  */
-rtx
+rtx_insn *
 emit_call_insn_before (rtx pattern, rtx before)
 {
   return emit_pattern_before (pattern, before, true, false,
@@ -4780,7 +4780,7 @@ emit_call_insn_before (rtx pattern, rtx before)
 }
 
 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
 {
   return emit_pattern_before_setloc (pattern, before, loc, false,
@@ -4789,7 +4789,7 @@ emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
 
 /* Like emit_debug_insn_before_noloc,
    but set insn_location according to BEFORE.  */
-rtx
+rtx_insn *
 emit_debug_insn_before (rtx pattern, rtx before)
 {
   return emit_pattern_before (pattern, before, false, false,
@@ -4801,11 +4801,11 @@ emit_debug_insn_before (rtx pattern, rtx before)
 
    Returns the last insn emitted.  */
 
-rtx
+rtx_insn *
 emit_insn (rtx x)
 {
-  rtx last = get_last_insn ();
-  rtx insn;
+  rtx_insn *last = get_last_insn ();
+  rtx_insn *insn;
 
   if (x == NULL_RTX)
     return last;
@@ -4819,10 +4819,10 @@ emit_insn (rtx x)
     case CODE_LABEL:
     case BARRIER:
     case NOTE:
-      insn = x;
+      insn = as_a <rtx_insn *> (x);
       while (insn)
 	{
-	  rtx next = NEXT_INSN (insn);
+	  rtx_insn *next = NEXT_INSN (insn);
 	  add_insn (insn);
 	  last = insn;
 	  insn = next;
@@ -4848,11 +4848,11 @@ emit_insn (rtx x)
 /* Make an insn of code DEBUG_INSN with pattern X
    and add it to the end of the doubly-linked list.  */
 
-rtx
+rtx_insn *
 emit_debug_insn (rtx x)
 {
-  rtx last = get_last_insn ();
-  rtx insn;
+  rtx_insn *last = get_last_insn ();
+  rtx_insn *insn;
 
   if (x == NULL_RTX)
     return last;
@@ -4866,10 +4866,10 @@ emit_debug_insn (rtx x)
     case CODE_LABEL:
     case BARRIER:
     case NOTE:
-      insn = x;
+      insn = as_a <rtx_insn *> (x);
       while (insn)
 	{
-	  rtx next = NEXT_INSN (insn);
+	  rtx_insn *next = NEXT_INSN (insn);
 	  add_insn (insn);
 	  last = insn;
 	  insn = next;
@@ -4895,10 +4895,11 @@ emit_debug_insn (rtx x)
 /* Make an insn of code JUMP_INSN with pattern X
    and add it to the end of the doubly-linked list.  */
 
-rtx
+rtx_insn *
 emit_jump_insn (rtx x)
 {
-  rtx last = NULL_RTX, insn;
+  rtx_insn *last = NULL;
+  rtx_insn *insn;
 
   switch (GET_CODE (x))
     {
@@ -4909,10 +4910,10 @@ emit_jump_insn (rtx x)
     case CODE_LABEL:
     case BARRIER:
     case NOTE:
-      insn = x;
+      insn = as_a <rtx_insn *> (x);
       while (insn)
 	{
-	  rtx next = NEXT_INSN (insn);
+	  rtx_insn *next = NEXT_INSN (insn);
 	  add_insn (insn);
 	  last = insn;
 	  insn = next;
@@ -4938,10 +4939,10 @@ emit_jump_insn (rtx x)
 /* Make an insn of code CALL_INSN with pattern X
    and add it to the end of the doubly-linked list.  */
 
-rtx
+rtx_insn *
 emit_call_insn (rtx x)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   switch (GET_CODE (x))
     {
@@ -4973,13 +4974,13 @@ emit_call_insn (rtx x)
 
 /* Add the label LABEL to the end of the doubly-linked list.  */
 
-rtx
+rtx_insn *
 emit_label (rtx label)
 {
   gcc_checking_assert (INSN_UID (label) == 0);
   INSN_UID (label) = cur_insn_uid++;
   add_insn (label);
-  return label;
+  return as_a <rtx_insn *> (label);
 }
 
 /* Make an insn of code JUMP_TABLE_DATA
@@ -5000,10 +5001,10 @@ emit_jump_table_data (rtx table)
 /* Make an insn of code BARRIER
    and add it to the end of the doubly-linked list.  */
 
-rtx
+rtx_barrier *
 emit_barrier (void)
 {
-  rtx barrier = rtx_alloc (BARRIER);
+  rtx_barrier *barrier = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
   INSN_UID (barrier) = cur_insn_uid++;
   add_insn (barrier);
   return barrier;
@@ -5034,7 +5035,7 @@ emit_note (enum insn_note kind)
 
 /* Emit a clobber of lvalue X.  */
 
-rtx
+rtx_insn *
 emit_clobber (rtx x)
 {
   /* CONCATs should not appear in the insn stream.  */
@@ -5048,10 +5049,10 @@ emit_clobber (rtx x)
 
 /* Return a sequence of insns to clobber lvalue X.  */
 
-rtx
+rtx_insn *
 gen_clobber (rtx x)
 {
-  rtx seq;
+  rtx_insn *seq;
 
   start_sequence ();
   emit_clobber (x);
@@ -5062,7 +5063,7 @@ gen_clobber (rtx x)
 
 /* Emit a use of rvalue X.  */
 
-rtx
+rtx_insn *
 emit_use (rtx x)
 {
   /* CONCATs should not appear in the insn stream.  */
@@ -5076,10 +5077,10 @@ emit_use (rtx x)
 
 /* Return a sequence of insns to use rvalue X.  */
 
-rtx
+rtx_insn *
 gen_use (rtx x)
 {
-  rtx seq;
+  rtx_insn *seq;
 
   start_sequence ();
   emit_use (x);
@@ -5224,7 +5225,7 @@ classify_insn (rtx x)
 /* Emit the rtl pattern X as an appropriate kind of insn.
    If X is a label, it is simply added into the insn chain.  */
 
-rtx
+rtx_insn *
 emit (rtx x)
 {
   enum rtx_code code = classify_insn (x);
@@ -5237,7 +5238,7 @@ emit (rtx x)
       return emit_insn (x);
     case  JUMP_INSN:
       {
-	rtx insn = emit_jump_insn (x);
+	rtx_insn *insn = emit_jump_insn (x);
 	if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
 	  return emit_barrier ();
 	return insn;
@@ -6042,10 +6043,11 @@ init_emit_once (void)
 /* Produce exact duplicate of insn INSN after AFTER.
    Care updating of libcall regions if present.  */
 
-rtx
+rtx_insn *
 emit_copy_of_insn_after (rtx insn, rtx after)
 {
-  rtx new_rtx, link;
+  rtx_insn *new_rtx;
+  rtx link;
 
   switch (GET_CODE (insn))
     {
diff --git a/gcc/emit-rtl.h b/gcc/emit-rtl.h
index f97ac49..30425c2 100644
--- a/gcc/emit-rtl.h
+++ b/gcc/emit-rtl.h
@@ -63,7 +63,7 @@ extern rtx copy_insn_1 (rtx);
 extern rtx copy_insn (rtx);
 extern rtx copy_delay_slot_insn (rtx);
 extern rtx gen_int_mode (HOST_WIDE_INT, enum machine_mode);
-extern rtx emit_copy_of_insn_after (rtx, rtx);
+extern rtx_insn *emit_copy_of_insn_after (rtx, rtx);
 extern void set_reg_attrs_from_value (rtx, rtx);
 extern void set_reg_attrs_for_parm (rtx, rtx);
 extern void set_reg_attrs_for_decl_rtl (tree t, rtx x);
diff --git a/gcc/rtl.h b/gcc/rtl.h
index ed65d1e..d519908 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2357,49 +2357,49 @@ extern rtx assign_stack_temp_for_type (enum machine_mode, HOST_WIDE_INT, tree);
 extern rtx assign_temp (tree, int, int);
 
 /* In emit-rtl.c */
-extern rtx emit_insn_before (rtx, rtx);
-extern rtx emit_insn_before_noloc (rtx, rtx, basic_block);
-extern rtx emit_insn_before_setloc (rtx, rtx, int);
-extern rtx emit_jump_insn_before (rtx, rtx);
-extern rtx emit_jump_insn_before_noloc (rtx, rtx);
-extern rtx emit_jump_insn_before_setloc (rtx, rtx, int);
-extern rtx emit_call_insn_before (rtx, rtx);
-extern rtx emit_call_insn_before_noloc (rtx, rtx);
-extern rtx emit_call_insn_before_setloc (rtx, rtx, int);
-extern rtx emit_debug_insn_before (rtx, rtx);
-extern rtx emit_debug_insn_before_noloc (rtx, rtx);
-extern rtx emit_debug_insn_before_setloc (rtx, rtx, int);
-extern rtx emit_barrier_before (rtx);
-extern rtx emit_label_before (rtx, rtx);
+extern rtx_insn *emit_insn_before (rtx, rtx);
+extern rtx_insn *emit_insn_before_noloc (rtx, rtx, basic_block);
+extern rtx_insn *emit_insn_before_setloc (rtx, rtx, int);
+extern rtx_insn *emit_jump_insn_before (rtx, rtx);
+extern rtx_insn *emit_jump_insn_before_noloc (rtx, rtx);
+extern rtx_insn *emit_jump_insn_before_setloc (rtx, rtx, int);
+extern rtx_insn *emit_call_insn_before (rtx, rtx);
+extern rtx_insn *emit_call_insn_before_noloc (rtx, rtx);
+extern rtx_insn *emit_call_insn_before_setloc (rtx, rtx, int);
+extern rtx_insn *emit_debug_insn_before (rtx, rtx);
+extern rtx_insn *emit_debug_insn_before_noloc (rtx, rtx);
+extern rtx_insn *emit_debug_insn_before_setloc (rtx, rtx, int);
+extern rtx_barrier *emit_barrier_before (rtx);
+extern rtx_insn *emit_label_before (rtx, rtx);
 extern rtx_note *emit_note_before (enum insn_note, rtx);
-extern rtx emit_insn_after (rtx, rtx);
-extern rtx emit_insn_after_noloc (rtx, rtx, basic_block);
-extern rtx emit_insn_after_setloc (rtx, rtx, int);
-extern rtx emit_jump_insn_after (rtx, rtx);
-extern rtx emit_jump_insn_after_noloc (rtx, rtx);
-extern rtx emit_jump_insn_after_setloc (rtx, rtx, int);
-extern rtx emit_call_insn_after (rtx, rtx);
-extern rtx emit_call_insn_after_noloc (rtx, rtx);
-extern rtx emit_call_insn_after_setloc (rtx, rtx, int);
-extern rtx emit_debug_insn_after (rtx, rtx);
-extern rtx emit_debug_insn_after_noloc (rtx, rtx);
-extern rtx emit_debug_insn_after_setloc (rtx, rtx, int);
-extern rtx emit_barrier_after (rtx);
-extern rtx emit_label_after (rtx, rtx);
+extern rtx_insn *emit_insn_after (rtx, rtx);
+extern rtx_insn *emit_insn_after_noloc (rtx, rtx, basic_block);
+extern rtx_insn *emit_insn_after_setloc (rtx, rtx, int);
+extern rtx_insn *emit_jump_insn_after (rtx, rtx);
+extern rtx_insn *emit_jump_insn_after_noloc (rtx, rtx);
+extern rtx_insn *emit_jump_insn_after_setloc (rtx, rtx, int);
+extern rtx_insn *emit_call_insn_after (rtx, rtx);
+extern rtx_insn *emit_call_insn_after_noloc (rtx, rtx);
+extern rtx_insn *emit_call_insn_after_setloc (rtx, rtx, int);
+extern rtx_insn *emit_debug_insn_after (rtx, rtx);
+extern rtx_insn *emit_debug_insn_after_noloc (rtx, rtx);
+extern rtx_insn *emit_debug_insn_after_setloc (rtx, rtx, int);
+extern rtx_barrier *emit_barrier_after (rtx);
+extern rtx_insn *emit_label_after (rtx, rtx);
 extern rtx_note *emit_note_after (enum insn_note, rtx);
-extern rtx emit_insn (rtx);
-extern rtx emit_debug_insn (rtx);
-extern rtx emit_jump_insn (rtx);
-extern rtx emit_call_insn (rtx);
-extern rtx emit_label (rtx);
+extern rtx_insn *emit_insn (rtx);
+extern rtx_insn *emit_debug_insn (rtx);
+extern rtx_insn *emit_jump_insn (rtx);
+extern rtx_insn *emit_call_insn (rtx);
+extern rtx_insn *emit_label (rtx);
 extern rtx_jump_table_data *emit_jump_table_data (rtx);
-extern rtx emit_barrier (void);
+extern rtx_barrier *emit_barrier (void);
 extern rtx_note *emit_note (enum insn_note);
 extern rtx_note *emit_note_copy (rtx_note *);
-extern rtx gen_clobber (rtx);
-extern rtx emit_clobber (rtx);
-extern rtx gen_use (rtx);
-extern rtx emit_use (rtx);
+extern rtx_insn *gen_clobber (rtx);
+extern rtx_insn *emit_clobber (rtx);
+extern rtx_insn *gen_use (rtx);
+extern rtx_insn *emit_use (rtx);
 extern rtx_insn *make_insn_raw (rtx);
 extern void add_function_usage_to (rtx, rtx);
 extern rtx_call_insn *last_call_insn (void);
@@ -3067,7 +3067,7 @@ extern void add_insn (rtx);
 extern void add_insn_before (rtx, rtx, basic_block);
 extern void add_insn_after (rtx, rtx, basic_block);
 extern void remove_insn (rtx);
-extern rtx emit (rtx);
+extern rtx_insn *emit (rtx);
 extern void delete_insn (rtx);
 extern rtx_insn *entry_of_function (void);
 extern void emit_insn_at_entry (rtx);
-- 
1.8.5.3

Re: [PATCH 032/236] emit_* functions return rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> More scaffolding: strengthen the return types from the various emit_
> functions from rtx to rtx_insn * (or to the rtx_barrier * subclass in a
> few cases).
>
> These will ultimately have their params strengthened also, but we
> postpone that until much later in the patch series.  So for now there
> are also various checked casts to ensure we really got an insn when
> returning such params back.
>
> Doing so requires a minor tweak to config/sh/sh.c
>
> gcc/
> 	* emit-rtl.h (emit_copy_of_insn_after): Strengthen return type
> 	from rtx to rtx_insn *.
>
> 	* rtl.h (emit_insn_before): Likewise.
> 	(emit_insn_before_noloc): Likewise.
> 	(emit_insn_before_setloc): Likewise.
> 	(emit_jump_insn_before): Likewise.
> 	(emit_jump_insn_before_noloc): Likewise.
> 	(emit_jump_insn_before_setloc): Likewise.
> 	(emit_call_insn_before): Likewise.
> 	(emit_call_insn_before_noloc): Likewise.
> 	(emit_call_insn_before_setloc): Likewise.
> 	(emit_debug_insn_before): Likewise.
> 	(emit_debug_insn_before_noloc): Likewise.
> 	(emit_debug_insn_before_setloc): Likewise.
> 	(emit_label_before): Likewise.
> 	(emit_insn_after): Likewise.
> 	(emit_insn_after_noloc): Likewise.
> 	(emit_insn_after_setloc): Likewise.
> 	(emit_jump_insn_after): Likewise.
> 	(emit_jump_insn_after_noloc): Likewise.
> 	(emit_jump_insn_after_setloc): Likewise.
> 	(emit_call_insn_after): Likewise.
> 	(emit_call_insn_after_noloc): Likewise.
> 	(emit_call_insn_after_setloc): Likewise.
> 	(emit_debug_insn_after): Likewise.
> 	(emit_debug_insn_after_noloc): Likewise.
> 	(emit_debug_insn_after_setloc): Likewise.
> 	(emit_label_after): Likewise.
> 	(emit_insn): Likewise.
> 	(emit_debug_insn): Likewise.
> 	(emit_jump_insn): Likewise.
> 	(emit_call_insn): Likewise.
> 	(emit_label): Likewise.
> 	(gen_clobber): Likewise.
> 	(emit_clobber): Likewise.
> 	(gen_use): Likewise.
> 	(emit_use): Likewise.
> 	(emit): Likewise.
>
> 	(emit_barrier_before): Strengthen return type from rtx to
> 	rtx_barrier *.
> 	(emit_barrier_after): Likewise.
> 	(emit_barrier): Likewise.
>
> 	* emit-rtl.c (emit_pattern_before_noloc):  Strengthen return type
> 	from rtx to rtx_insn *.  Add checked casts for now when converting
> 	"last" from rtx to rtx_insn *.
> 	(emit_insn_before_noloc): Likewise for return type.
> 	(emit_jump_insn_before_noloc): Likewise.
> 	(emit_call_insn_before_noloc): Likewise.
> 	(emit_debug_insn_before_noloc): Likewise.
> 	(emit_barrier_before): Strengthen return type and local "insn"
> 	from rtx to rtx_barrier *.
> 	(emit_label_before): Strengthen return type from rtx to
> 	rtx_insn *.  Add checked cast for now when returning param
> 	(emit_pattern_after_noloc): Strengthen return type from rtx to
> 	rtx_insn *.  Add checked casts for now when converting "last" from
> 	rtx to rtx_insn *.
> 	(emit_insn_after_noloc): Strengthen return type from rtx to
> 	rtx_insn *.
> 	(emit_jump_insn_after_noloc): Likewise.
> 	(emit_call_insn_after_noloc): Likewise.
> 	(emit_debug_insn_after_noloc): Likewise.
> 	(emit_barrier_after): Strengthen return type from rtx to
> 	rtx_barrier *.
> 	(emit_label_after): Strengthen return type from rtx to rtx_insn *.
> 	Add checked cast for now when converting "label" from rtx to
> 	rtx_insn *.
> 	(emit_pattern_after_setloc): Strengthen return type from rtx to
> 	rtx_insn *.  Add checked casts for now when converting "last" from
> 	rtx to rtx_insn *.
> 	(emit_pattern_after): Strengthen return type from rtx to
> 	rtx_insn *.
> 	(emit_insn_after_setloc): Likewise.
> 	(emit_insn_after): Likewise.
> 	(emit_jump_insn_after_setloc): Likewise.
> 	(emit_jump_insn_after): Likewise.
> 	(emit_call_insn_after_setloc): Likewise.
> 	(emit_call_insn_after): Likewise.
> 	(emit_debug_insn_after_setloc): Likewise.
> 	(emit_debug_insn_after): Likewise.
> 	(emit_pattern_before_setloc): Likewise.  Add checked casts for now
> 	when converting "last" from rtx to rtx_insn *.
> 	(emit_pattern_before): Strengthen return type from rtx to
> 	rtx_insn *.
> 	(emit_insn_before_setloc): Likewise.
> 	(emit_insn_before): Likewise.
> 	(emit_jump_insn_before_setloc): Likewise.
> 	(emit_jump_insn_before): Likewise.
> 	(emit_call_insn_before_setloc): Likewise.
> 	(emit_call_insn_before): Likewise.
> 	(emit_debug_insn_before_setloc): Likewise.
> 	(emit_debug_insn_before): Likewise.
> 	(emit_insn): Strengthen return type and locals "last", "insn",
> 	"next" from rtx to rtx_insn *.  Add checked cast to rtx_insn
> 	within cases where we know we have an insn.
> 	(emit_debug_insn): Likewise.
> 	(emit_jump_insn): Likewise.
> 	(emit_call_insn): Strengthen return type and local "insn" from rtx
> 	to rtx_insn *.
> 	(emit_label): Strengthen return type from rtx to rtx_insn *.  Add
> 	a checked cast to rtx_insn * for now on "label".
> 	(emit_barrier): Strengthen return type from rtx to rtx_barrier *.
> 	(emit_clobber): Strengthen return type from rtx to rtx_insn *.
> 	(emit_use): Likewise.
> 	(gen_use): Likewise, also for local "seq".
> 	(emit): Likewise for return type and local "insn".
> 	(rtx_insn): Likewise for return type and local "new_rtx".
>
> 	* cfgrtl.c (emit_barrier_after_bb): Strengthen local "barrier"
> 	from rtx to rtx_barrier *.
>
> 	* config/sh/sh.c (output_stack_adjust): Since emit_insn has
> 	changed return type from rtx to rtx_insn *, we must update
> 	"emit_fn" type, and this in turn means updating...
> 	(frame_insn): ...this.  Strengthen return type from rtx to
> 	rtx_insn *.  Introduce a new local "insn" of the appropriate type.
OK.  This will require the obvious updates for the nullable change.

jeff

Re: [PATCH 032/236] emit_* functions return rtx_insn

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 6213 bytes --]

On Wed, 2014-08-13 at 11:52 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > More scaffolding: strengthen the return types from the various emit_
> > functions from rtx to rtx_insn * (or to the rtx_barrier * subclass in a
> > few cases).
> >
> > These will ultimately have their params strengthened also, but we
> > postpone that until much later in the patch series.  So for now there
> > are also various checked casts to ensure we really got an insn when
> > returning such params back.
> >
> > Doing so requires a minor tweak to config/sh/sh.c
> >
> > gcc/
> > 	* emit-rtl.h (emit_copy_of_insn_after): Strengthen return type
> > 	from rtx to rtx_insn *.
> >
> > 	* rtl.h (emit_insn_before): Likewise.
> > 	(emit_insn_before_noloc): Likewise.
> > 	(emit_insn_before_setloc): Likewise.
> > 	(emit_jump_insn_before): Likewise.
> > 	(emit_jump_insn_before_noloc): Likewise.
> > 	(emit_jump_insn_before_setloc): Likewise.
> > 	(emit_call_insn_before): Likewise.
> > 	(emit_call_insn_before_noloc): Likewise.
> > 	(emit_call_insn_before_setloc): Likewise.
> > 	(emit_debug_insn_before): Likewise.
> > 	(emit_debug_insn_before_noloc): Likewise.
> > 	(emit_debug_insn_before_setloc): Likewise.
> > 	(emit_label_before): Likewise.
> > 	(emit_insn_after): Likewise.
> > 	(emit_insn_after_noloc): Likewise.
> > 	(emit_insn_after_setloc): Likewise.
> > 	(emit_jump_insn_after): Likewise.
> > 	(emit_jump_insn_after_noloc): Likewise.
> > 	(emit_jump_insn_after_setloc): Likewise.
> > 	(emit_call_insn_after): Likewise.
> > 	(emit_call_insn_after_noloc): Likewise.
> > 	(emit_call_insn_after_setloc): Likewise.
> > 	(emit_debug_insn_after): Likewise.
> > 	(emit_debug_insn_after_noloc): Likewise.
> > 	(emit_debug_insn_after_setloc): Likewise.
> > 	(emit_label_after): Likewise.
> > 	(emit_insn): Likewise.
> > 	(emit_debug_insn): Likewise.
> > 	(emit_jump_insn): Likewise.
> > 	(emit_call_insn): Likewise.
> > 	(emit_label): Likewise.
> > 	(gen_clobber): Likewise.
> > 	(emit_clobber): Likewise.
> > 	(gen_use): Likewise.
> > 	(emit_use): Likewise.
> > 	(emit): Likewise.
> >
> > 	(emit_barrier_before): Strengthen return type from rtx to
> > 	rtx_barrier *.
> > 	(emit_barrier_after): Likewise.
> > 	(emit_barrier): Likewise.
> >
> > 	* emit-rtl.c (emit_pattern_before_noloc):  Strengthen return type
> > 	from rtx to rtx_insn *.  Add checked casts for now when converting
> > 	"last" from rtx to rtx_insn *.
> > 	(emit_insn_before_noloc): Likewise for return type.
> > 	(emit_jump_insn_before_noloc): Likewise.
> > 	(emit_call_insn_before_noloc): Likewise.
> > 	(emit_debug_insn_before_noloc): Likewise.
> > 	(emit_barrier_before): Strengthen return type and local "insn"
> > 	from rtx to rtx_barrier *.
> > 	(emit_label_before): Strengthen return type from rtx to
> > 	rtx_insn *.  Add checked cast for now when returning param
> > 	(emit_pattern_after_noloc): Strengthen return type from rtx to
> > 	rtx_insn *.  Add checked casts for now when converting "last" from
> > 	rtx to rtx_insn *.
> > 	(emit_insn_after_noloc): Strengthen return type from rtx to
> > 	rtx_insn *.
> > 	(emit_jump_insn_after_noloc): Likewise.
> > 	(emit_call_insn_after_noloc): Likewise.
> > 	(emit_debug_insn_after_noloc): Likewise.
> > 	(emit_barrier_after): Strengthen return type from rtx to
> > 	rtx_barrier *.
> > 	(emit_label_after): Strengthen return type from rtx to rtx_insn *.
> > 	Add checked cast for now when converting "label" from rtx to
> > 	rtx_insn *.
> > 	(emit_pattern_after_setloc): Strengthen return type from rtx to
> > 	rtx_insn *.  Add checked casts for now when converting "last" from
> > 	rtx to rtx_insn *.
> > 	(emit_pattern_after): Strengthen return type from rtx to
> > 	rtx_insn *.
> > 	(emit_insn_after_setloc): Likewise.
> > 	(emit_insn_after): Likewise.
> > 	(emit_jump_insn_after_setloc): Likewise.
> > 	(emit_jump_insn_after): Likewise.
> > 	(emit_call_insn_after_setloc): Likewise.
> > 	(emit_call_insn_after): Likewise.
> > 	(emit_debug_insn_after_setloc): Likewise.
> > 	(emit_debug_insn_after): Likewise.
> > 	(emit_pattern_before_setloc): Likewise.  Add checked casts for now
> > 	when converting "last" from rtx to rtx_insn *.
> > 	(emit_pattern_before): Strengthen return type from rtx to
> > 	rtx_insn *.
> > 	(emit_insn_before_setloc): Likewise.
> > 	(emit_insn_before): Likewise.
> > 	(emit_jump_insn_before_setloc): Likewise.
> > 	(emit_jump_insn_before): Likewise.
> > 	(emit_call_insn_before_setloc): Likewise.
> > 	(emit_call_insn_before): Likewise.
> > 	(emit_debug_insn_before_setloc): Likewise.
> > 	(emit_debug_insn_before): Likewise.
> > 	(emit_insn): Strengthen return type and locals "last", "insn",
> > 	"next" from rtx to rtx_insn *.  Add checked cast to rtx_insn
> > 	within cases where we know we have an insn.
> > 	(emit_debug_insn): Likewise.
> > 	(emit_jump_insn): Likewise.
> > 	(emit_call_insn): Strengthen return type and local "insn" from rtx
> > 	to rtx_insn *.
> > 	(emit_label): Strengthen return type from rtx to rtx_insn *.  Add
> > 	a checked cast to rtx_insn * for now on "label".
> > 	(emit_barrier): Strengthen return type from rtx to rtx_barrier *.
> > 	(emit_clobber): Strengthen return type from rtx to rtx_insn *.
> > 	(emit_use): Likewise.
> > 	(gen_use): Likewise, also for local "seq".
> > 	(emit): Likewise for return type and local "insn".
> > 	(rtx_insn): Likewise for return type and local "new_rtx".
> >
> > 	* cfgrtl.c (emit_barrier_after_bb): Strengthen local "barrier"
> > 	from rtx to rtx_barrier *.
> >
> > 	* config/sh/sh.c (output_stack_adjust): Since emit_insn has
> > 	changed return type from rtx to rtx_insn *, we must update
> > 	"emit_fn" type, and this in turn means updating...
> > 	(frame_insn): ...this.  Strengthen return type from rtx to
> > 	rtx_insn *.  Introduce a new local "insn" of the appropriate type.
> OK.  This will require the obvious updates for the nullable change.

Thanks.

Fixed up and committed to trunk as r214194, having having
bootstrapped&regrtested on x86_64-unknown-linux-gnu (Fedora 20) albeit
in combination with patches 30-39, and verified that it builds
standalone both for that target, and for sh-elf, to give additional
coverage for the sh.c change.

Am attaching what I committed.


[-- Attachment #2: r214194.patch --]
[-- Type: text/x-patch, Size: 27143 bytes --]

Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214193)
+++ gcc/ChangeLog	(revision 214194)
@@ -1,5 +1,126 @@
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
 
+	* emit-rtl.h (emit_copy_of_insn_after): Strengthen return type
+	from rtx to rtx_insn *.
+
+	* rtl.h (emit_insn_before): Likewise.
+	(emit_insn_before_noloc): Likewise.
+	(emit_insn_before_setloc): Likewise.
+	(emit_jump_insn_before): Likewise.
+	(emit_jump_insn_before_noloc): Likewise.
+	(emit_jump_insn_before_setloc): Likewise.
+	(emit_call_insn_before): Likewise.
+	(emit_call_insn_before_noloc): Likewise.
+	(emit_call_insn_before_setloc): Likewise.
+	(emit_debug_insn_before): Likewise.
+	(emit_debug_insn_before_noloc): Likewise.
+	(emit_debug_insn_before_setloc): Likewise.
+	(emit_label_before): Likewise.
+	(emit_insn_after): Likewise.
+	(emit_insn_after_noloc): Likewise.
+	(emit_insn_after_setloc): Likewise.
+	(emit_jump_insn_after): Likewise.
+	(emit_jump_insn_after_noloc): Likewise.
+	(emit_jump_insn_after_setloc): Likewise.
+	(emit_call_insn_after): Likewise.
+	(emit_call_insn_after_noloc): Likewise.
+	(emit_call_insn_after_setloc): Likewise.
+	(emit_debug_insn_after): Likewise.
+	(emit_debug_insn_after_noloc): Likewise.
+	(emit_debug_insn_after_setloc): Likewise.
+	(emit_label_after): Likewise.
+	(emit_insn): Likewise.
+	(emit_debug_insn): Likewise.
+	(emit_jump_insn): Likewise.
+	(emit_call_insn): Likewise.
+	(emit_label): Likewise.
+	(gen_clobber): Likewise.
+	(emit_clobber): Likewise.
+	(gen_use): Likewise.
+	(emit_use): Likewise.
+	(emit): Likewise.
+
+	(emit_barrier_before): Strengthen return type from rtx to
+	rtx_barrier *.
+	(emit_barrier_after): Likewise.
+	(emit_barrier): Likewise.
+
+	* emit-rtl.c (emit_pattern_before_noloc):  Strengthen return type
+	from rtx to rtx_insn *.  Add checked casts for now when converting
+	"last" from rtx to rtx_insn *.
+	(emit_insn_before_noloc): Likewise for return type.
+	(emit_jump_insn_before_noloc): Likewise.
+	(emit_call_insn_before_noloc): Likewise.
+	(emit_debug_insn_before_noloc): Likewise.
+	(emit_barrier_before): Strengthen return type and local "insn"
+	from rtx to rtx_barrier *.
+	(emit_label_before): Strengthen return type from rtx to
+	rtx_insn *.  Add checked cast for now when returning param
+	(emit_pattern_after_noloc): Strengthen return type from rtx to
+	rtx_insn *.  Add checked casts for now when converting "last" from
+	rtx to rtx_insn *.
+	(emit_insn_after_noloc): Strengthen return type from rtx to
+	rtx_insn *.
+	(emit_jump_insn_after_noloc): Likewise.
+	(emit_call_insn_after_noloc): Likewise.
+	(emit_debug_insn_after_noloc): Likewise.
+	(emit_barrier_after): Strengthen return type from rtx to
+	rtx_barrier *.
+	(emit_label_after): Strengthen return type from rtx to rtx_insn *.
+	Add checked cast for now when converting "label" from rtx to
+	rtx_insn *.
+	(emit_pattern_after_setloc): Strengthen return type from rtx to
+	rtx_insn *.  Add checked casts for now when converting "last" from
+	rtx to rtx_insn *.
+	(emit_pattern_after): Strengthen return type from rtx to
+	rtx_insn *.
+	(emit_insn_after_setloc): Likewise.
+	(emit_insn_after): Likewise.
+	(emit_jump_insn_after_setloc): Likewise.
+	(emit_jump_insn_after): Likewise.
+	(emit_call_insn_after_setloc): Likewise.
+	(emit_call_insn_after): Likewise.
+	(emit_debug_insn_after_setloc): Likewise.
+	(emit_debug_insn_after): Likewise.
+	(emit_pattern_before_setloc): Likewise.  Add checked casts for now
+	when converting "last" from rtx to rtx_insn *.
+	(emit_pattern_before): Strengthen return type from rtx to
+	rtx_insn *.
+	(emit_insn_before_setloc): Likewise.
+	(emit_insn_before): Likewise.
+	(emit_jump_insn_before_setloc): Likewise.
+	(emit_jump_insn_before): Likewise.
+	(emit_call_insn_before_setloc): Likewise.
+	(emit_call_insn_before): Likewise.
+	(emit_debug_insn_before_setloc): Likewise.
+	(emit_debug_insn_before): Likewise.
+	(emit_insn): Strengthen return type and locals "last", "insn",
+	"next" from rtx to rtx_insn *.  Add checked cast to rtx_insn
+	within cases where we know we have an insn.
+	(emit_debug_insn): Likewise.
+	(emit_jump_insn): Likewise.
+	(emit_call_insn): Strengthen return type and local "insn" from rtx
+	to rtx_insn *.
+	(emit_label): Strengthen return type from rtx to rtx_insn *.  Add
+	a checked cast to rtx_insn * for now on "label".
+	(emit_barrier): Strengthen return type from rtx to rtx_barrier *.
+	(emit_clobber): Strengthen return type from rtx to rtx_insn *.
+	(emit_use): Likewise.
+	(gen_use): Likewise, also for local "seq".
+	(emit): Likewise for return type and local "insn".
+	(rtx_insn): Likewise for return type and local "new_rtx".
+
+	* cfgrtl.c (emit_barrier_after_bb): Strengthen local "barrier"
+	from rtx to rtx_barrier *.
+
+	* config/sh/sh.c (output_stack_adjust): Since emit_insn has
+	changed return type from rtx to rtx_insn *, we must update
+	"emit_fn" type, and this in turn means updating...
+	(frame_insn): ...this.  Strengthen return type from rtx to
+	rtx_insn *.  Introduce a new local "insn" of the appropriate type.
+
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
 	* emit-rtl.c (emit_jump_table_data): Strengthen return type from
 	rtx to rtx_jump_table_data *.  Also for local.
 	* rtl.h (emit_jump_table_data): Likewise.
Index: gcc/emit-rtl.c
===================================================================
--- gcc/emit-rtl.c	(revision 214193)
+++ gcc/emit-rtl.c	(revision 214194)
@@ -4269,7 +4269,7 @@
    SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
    generated would almost certainly die right after it was created.  */
 
-static rtx
+static rtx_insn *
 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
                            rtx_insn *(*make_raw) (rtx))
 {
@@ -4278,7 +4278,7 @@
   gcc_assert (before);
 
   if (x == NULL_RTX)
-    return last;
+    return safe_as_a <rtx_insn *> (last);
 
   switch (GET_CODE (x))
     {
@@ -4311,12 +4311,12 @@
       break;
     }
 
-  return last;
+  return safe_as_a <rtx_insn *> (last);
 }
 
 /* Make X be output before the instruction BEFORE.  */
 
-rtx
+rtx_insn *
 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
 {
   return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
@@ -4325,7 +4325,7 @@
 /* Make an instruction with body X and code JUMP_INSN
    and output it before the instruction BEFORE.  */
 
-rtx
+rtx_insn *
 emit_jump_insn_before_noloc (rtx x, rtx before)
 {
   return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
@@ -4335,7 +4335,7 @@
 /* Make an instruction with body X and code CALL_INSN
    and output it before the instruction BEFORE.  */
 
-rtx
+rtx_insn *
 emit_call_insn_before_noloc (rtx x, rtx before)
 {
   return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
@@ -4345,7 +4345,7 @@
 /* Make an instruction with body X and code DEBUG_INSN
    and output it before the instruction BEFORE.  */
 
-rtx
+rtx_insn *
 emit_debug_insn_before_noloc (rtx x, rtx before)
 {
   return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
@@ -4355,10 +4355,10 @@
 /* Make an insn of code BARRIER
    and output it before the insn BEFORE.  */
 
-rtx
+rtx_barrier *
 emit_barrier_before (rtx before)
 {
-  rtx insn = rtx_alloc (BARRIER);
+  rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
 
   INSN_UID (insn) = cur_insn_uid++;
 
@@ -4368,13 +4368,13 @@
 
 /* Emit the label LABEL before the insn BEFORE.  */
 
-rtx
+rtx_insn *
 emit_label_before (rtx label, rtx before)
 {
   gcc_checking_assert (INSN_UID (label) == 0);
   INSN_UID (label) = cur_insn_uid++;
   add_insn_before (label, before, NULL);
-  return label;
+  return as_a <rtx_insn *> (label);
 }
 \f
 /* Helper for emit_insn_after, handles lists of instructions
@@ -4423,7 +4423,7 @@
   return last;
 }
 
-static rtx
+static rtx_insn *
 emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
 			  rtx_insn *(*make_raw)(rtx))
 {
@@ -4432,7 +4432,7 @@
   gcc_assert (after);
 
   if (x == NULL_RTX)
-    return last;
+    return safe_as_a <rtx_insn *> (last);
 
   switch (GET_CODE (x))
     {
@@ -4458,13 +4458,13 @@
       break;
     }
 
-  return last;
+  return safe_as_a <rtx_insn *> (last);
 }
 
 /* Make X be output after the insn AFTER and set the BB of insn.  If
    BB is NULL, an attempt is made to infer the BB from AFTER.  */
 
-rtx
+rtx_insn *
 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
 {
   return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
@@ -4474,7 +4474,7 @@
 /* Make an insn of code JUMP_INSN with body X
    and output it after the insn AFTER.  */
 
-rtx
+rtx_insn *
 emit_jump_insn_after_noloc (rtx x, rtx after)
 {
   return emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw);
@@ -4483,7 +4483,7 @@
 /* Make an instruction with body X and code CALL_INSN
    and output it after the instruction AFTER.  */
 
-rtx
+rtx_insn *
 emit_call_insn_after_noloc (rtx x, rtx after)
 {
   return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
@@ -4492,7 +4492,7 @@
 /* Make an instruction with body X and code CALL_INSN
    and output it after the instruction AFTER.  */
 
-rtx
+rtx_insn *
 emit_debug_insn_after_noloc (rtx x, rtx after)
 {
   return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
@@ -4501,10 +4501,10 @@
 /* Make an insn of code BARRIER
    and output it after the insn AFTER.  */
 
-rtx
+rtx_barrier *
 emit_barrier_after (rtx after)
 {
-  rtx insn = rtx_alloc (BARRIER);
+  rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
 
   INSN_UID (insn) = cur_insn_uid++;
 
@@ -4514,13 +4514,13 @@
 
 /* Emit the label LABEL after the insn AFTER.  */
 
-rtx
+rtx_insn *
 emit_label_after (rtx label, rtx after)
 {
   gcc_checking_assert (INSN_UID (label) == 0);
   INSN_UID (label) = cur_insn_uid++;
   add_insn_after (label, after, NULL);
-  return label;
+  return as_a <rtx_insn *> (label);
 }
 \f
 /* Notes require a bit of special handling: Some notes need to have their
@@ -4590,7 +4590,7 @@
 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
    MAKE_RAW indicates how to turn PATTERN into a real insn.  */
 
-static rtx
+static rtx_insn *
 emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
 			   rtx_insn *(*make_raw) (rtx))
 {
@@ -4597,7 +4597,7 @@
   rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
 
   if (pattern == NULL_RTX || !loc)
-    return last;
+    return safe_as_a <rtx_insn *> (last);
 
   after = NEXT_INSN (after);
   while (1)
@@ -4608,7 +4608,7 @@
 	break;
       after = NEXT_INSN (after);
     }
-  return last;
+  return safe_as_a <rtx_insn *> (last);
 }
 
 /* Insert PATTERN after AFTER.  MAKE_RAW indicates how to turn PATTERN
@@ -4615,7 +4615,7 @@
    into a real insn.  SKIP_DEBUG_INSNS indicates whether to insert after
    any DEBUG_INSNs.  */
 
-static rtx
+static rtx_insn *
 emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
 		    rtx_insn *(*make_raw) (rtx))
 {
@@ -4633,7 +4633,7 @@
 }
 
 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
 {
   return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
@@ -4640,7 +4640,7 @@
 }
 
 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER.  */
-rtx
+rtx_insn *
 emit_insn_after (rtx pattern, rtx after)
 {
   return emit_pattern_after (pattern, after, true, make_insn_raw);
@@ -4647,7 +4647,7 @@
 }
 
 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
 {
   return emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw);
@@ -4654,7 +4654,7 @@
 }
 
 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER.  */
-rtx
+rtx_insn *
 emit_jump_insn_after (rtx pattern, rtx after)
 {
   return emit_pattern_after (pattern, after, true, make_jump_insn_raw);
@@ -4661,7 +4661,7 @@
 }
 
 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
 {
   return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
@@ -4668,7 +4668,7 @@
 }
 
 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER.  */
-rtx
+rtx_insn *
 emit_call_insn_after (rtx pattern, rtx after)
 {
   return emit_pattern_after (pattern, after, true, make_call_insn_raw);
@@ -4675,7 +4675,7 @@
 }
 
 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
 {
   return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
@@ -4682,7 +4682,7 @@
 }
 
 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER.  */
-rtx
+rtx_insn *
 emit_debug_insn_after (rtx pattern, rtx after)
 {
   return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
@@ -4693,7 +4693,7 @@
    indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
    CALL_INSN, etc.  */
 
-static rtx
+static rtx_insn *
 emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
 			    rtx_insn *(*make_raw) (rtx))
 {
@@ -4703,7 +4703,7 @@
                                         NULL, make_raw);
 
   if (pattern == NULL_RTX || !loc)
-    return last;
+    return safe_as_a <rtx_insn *> (last);
 
   if (!first)
     first = get_insns ();
@@ -4717,7 +4717,7 @@
 	break;
       first = NEXT_INSN (first);
     }
-  return last;
+  return safe_as_a <rtx_insn *> (last);
 }
 
 /* Insert PATTERN before BEFORE.  MAKE_RAW indicates how to turn PATTERN
@@ -4725,7 +4725,7 @@
    before any DEBUG_INSNs.  INSNP indicates if PATTERN is meant for an
    INSN as opposed to a JUMP_INSN, CALL_INSN, etc.  */
 
-static rtx
+static rtx_insn *
 emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
 		     bool insnp, rtx_insn *(*make_raw) (rtx))
 {
@@ -4745,7 +4745,7 @@
 }
 
 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
 {
   return emit_pattern_before_setloc (pattern, before, loc, true,
@@ -4753,7 +4753,7 @@
 }
 
 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE.  */
-rtx
+rtx_insn *
 emit_insn_before (rtx pattern, rtx before)
 {
   return emit_pattern_before (pattern, before, true, true, make_insn_raw);
@@ -4760,7 +4760,7 @@
 }
 
 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
 {
   return emit_pattern_before_setloc (pattern, before, loc, false,
@@ -4768,7 +4768,7 @@
 }
 
 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE.  */
-rtx
+rtx_insn *
 emit_jump_insn_before (rtx pattern, rtx before)
 {
   return emit_pattern_before (pattern, before, true, false,
@@ -4776,7 +4776,7 @@
 }
 
 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
 {
   return emit_pattern_before_setloc (pattern, before, loc, false,
@@ -4785,7 +4785,7 @@
 
 /* Like emit_call_insn_before_noloc,
    but set insn_location according to BEFORE.  */
-rtx
+rtx_insn *
 emit_call_insn_before (rtx pattern, rtx before)
 {
   return emit_pattern_before (pattern, before, true, false,
@@ -4793,7 +4793,7 @@
 }
 
 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.  */
-rtx
+rtx_insn *
 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
 {
   return emit_pattern_before_setloc (pattern, before, loc, false,
@@ -4802,7 +4802,7 @@
 
 /* Like emit_debug_insn_before_noloc,
    but set insn_location according to BEFORE.  */
-rtx
+rtx_insn *
 emit_debug_insn_before (rtx pattern, rtx before)
 {
   return emit_pattern_before (pattern, before, false, false,
@@ -4814,11 +4814,11 @@
 
    Returns the last insn emitted.  */
 
-rtx
+rtx_insn *
 emit_insn (rtx x)
 {
-  rtx last = get_last_insn ();
-  rtx insn;
+  rtx_insn *last = get_last_insn ();
+  rtx_insn *insn;
 
   if (x == NULL_RTX)
     return last;
@@ -4832,10 +4832,10 @@
     case CODE_LABEL:
     case BARRIER:
     case NOTE:
-      insn = x;
+      insn = as_a <rtx_insn *> (x);
       while (insn)
 	{
-	  rtx next = NEXT_INSN (insn);
+	  rtx_insn *next = NEXT_INSN (insn);
 	  add_insn (insn);
 	  last = insn;
 	  insn = next;
@@ -4861,11 +4861,11 @@
 /* Make an insn of code DEBUG_INSN with pattern X
    and add it to the end of the doubly-linked list.  */
 
-rtx
+rtx_insn *
 emit_debug_insn (rtx x)
 {
-  rtx last = get_last_insn ();
-  rtx insn;
+  rtx_insn *last = get_last_insn ();
+  rtx_insn *insn;
 
   if (x == NULL_RTX)
     return last;
@@ -4879,10 +4879,10 @@
     case CODE_LABEL:
     case BARRIER:
     case NOTE:
-      insn = x;
+      insn = as_a <rtx_insn *> (x);
       while (insn)
 	{
-	  rtx next = NEXT_INSN (insn);
+	  rtx_insn *next = NEXT_INSN (insn);
 	  add_insn (insn);
 	  last = insn;
 	  insn = next;
@@ -4908,10 +4908,11 @@
 /* Make an insn of code JUMP_INSN with pattern X
    and add it to the end of the doubly-linked list.  */
 
-rtx
+rtx_insn *
 emit_jump_insn (rtx x)
 {
-  rtx last = NULL_RTX, insn;
+  rtx_insn *last = NULL;
+  rtx_insn *insn;
 
   switch (GET_CODE (x))
     {
@@ -4922,10 +4923,10 @@
     case CODE_LABEL:
     case BARRIER:
     case NOTE:
-      insn = x;
+      insn = as_a <rtx_insn *> (x);
       while (insn)
 	{
-	  rtx next = NEXT_INSN (insn);
+	  rtx_insn *next = NEXT_INSN (insn);
 	  add_insn (insn);
 	  last = insn;
 	  insn = next;
@@ -4951,10 +4952,10 @@
 /* Make an insn of code CALL_INSN with pattern X
    and add it to the end of the doubly-linked list.  */
 
-rtx
+rtx_insn *
 emit_call_insn (rtx x)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   switch (GET_CODE (x))
     {
@@ -4986,13 +4987,13 @@
 
 /* Add the label LABEL to the end of the doubly-linked list.  */
 
-rtx
+rtx_insn *
 emit_label (rtx label)
 {
   gcc_checking_assert (INSN_UID (label) == 0);
   INSN_UID (label) = cur_insn_uid++;
   add_insn (label);
-  return label;
+  return as_a <rtx_insn *> (label);
 }
 
 /* Make an insn of code JUMP_TABLE_DATA
@@ -5013,10 +5014,10 @@
 /* Make an insn of code BARRIER
    and add it to the end of the doubly-linked list.  */
 
-rtx
+rtx_barrier *
 emit_barrier (void)
 {
-  rtx barrier = rtx_alloc (BARRIER);
+  rtx_barrier *barrier = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
   INSN_UID (barrier) = cur_insn_uid++;
   add_insn (barrier);
   return barrier;
@@ -5047,7 +5048,7 @@
 
 /* Emit a clobber of lvalue X.  */
 
-rtx
+rtx_insn *
 emit_clobber (rtx x)
 {
   /* CONCATs should not appear in the insn stream.  */
@@ -5061,10 +5062,10 @@
 
 /* Return a sequence of insns to clobber lvalue X.  */
 
-rtx
+rtx_insn *
 gen_clobber (rtx x)
 {
-  rtx seq;
+  rtx_insn *seq;
 
   start_sequence ();
   emit_clobber (x);
@@ -5075,7 +5076,7 @@
 
 /* Emit a use of rvalue X.  */
 
-rtx
+rtx_insn *
 emit_use (rtx x)
 {
   /* CONCATs should not appear in the insn stream.  */
@@ -5089,10 +5090,10 @@
 
 /* Return a sequence of insns to use rvalue X.  */
 
-rtx
+rtx_insn *
 gen_use (rtx x)
 {
-  rtx seq;
+  rtx_insn *seq;
 
   start_sequence ();
   emit_use (x);
@@ -5237,7 +5238,7 @@
 /* Emit the rtl pattern X as an appropriate kind of insn.
    If X is a label, it is simply added into the insn chain.  */
 
-rtx
+rtx_insn *
 emit (rtx x)
 {
   enum rtx_code code = classify_insn (x);
@@ -5250,7 +5251,7 @@
       return emit_insn (x);
     case  JUMP_INSN:
       {
-	rtx insn = emit_jump_insn (x);
+	rtx_insn *insn = emit_jump_insn (x);
 	if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
 	  return emit_barrier ();
 	return insn;
@@ -6055,10 +6056,11 @@
 /* Produce exact duplicate of insn INSN after AFTER.
    Care updating of libcall regions if present.  */
 
-rtx
+rtx_insn *
 emit_copy_of_insn_after (rtx insn, rtx after)
 {
-  rtx new_rtx, link;
+  rtx_insn *new_rtx;
+  rtx link;
 
   switch (GET_CODE (insn))
     {
Index: gcc/emit-rtl.h
===================================================================
--- gcc/emit-rtl.h	(revision 214193)
+++ gcc/emit-rtl.h	(revision 214194)
@@ -66,7 +66,7 @@
 extern rtx copy_insn (rtx);
 extern rtx copy_delay_slot_insn (rtx);
 extern rtx gen_int_mode (HOST_WIDE_INT, enum machine_mode);
-extern rtx emit_copy_of_insn_after (rtx, rtx);
+extern rtx_insn *emit_copy_of_insn_after (rtx, rtx);
 extern void set_reg_attrs_from_value (rtx, rtx);
 extern void set_reg_attrs_for_parm (rtx, rtx);
 extern void set_reg_attrs_for_decl_rtl (tree t, rtx x);
Index: gcc/rtl.h
===================================================================
--- gcc/rtl.h	(revision 214193)
+++ gcc/rtl.h	(revision 214194)
@@ -2379,49 +2379,49 @@
 extern rtx assign_temp (tree, int, int);
 
 /* In emit-rtl.c */
-extern rtx emit_insn_before (rtx, rtx);
-extern rtx emit_insn_before_noloc (rtx, rtx, basic_block);
-extern rtx emit_insn_before_setloc (rtx, rtx, int);
-extern rtx emit_jump_insn_before (rtx, rtx);
-extern rtx emit_jump_insn_before_noloc (rtx, rtx);
-extern rtx emit_jump_insn_before_setloc (rtx, rtx, int);
-extern rtx emit_call_insn_before (rtx, rtx);
-extern rtx emit_call_insn_before_noloc (rtx, rtx);
-extern rtx emit_call_insn_before_setloc (rtx, rtx, int);
-extern rtx emit_debug_insn_before (rtx, rtx);
-extern rtx emit_debug_insn_before_noloc (rtx, rtx);
-extern rtx emit_debug_insn_before_setloc (rtx, rtx, int);
-extern rtx emit_barrier_before (rtx);
-extern rtx emit_label_before (rtx, rtx);
+extern rtx_insn *emit_insn_before (rtx, rtx);
+extern rtx_insn *emit_insn_before_noloc (rtx, rtx, basic_block);
+extern rtx_insn *emit_insn_before_setloc (rtx, rtx, int);
+extern rtx_insn *emit_jump_insn_before (rtx, rtx);
+extern rtx_insn *emit_jump_insn_before_noloc (rtx, rtx);
+extern rtx_insn *emit_jump_insn_before_setloc (rtx, rtx, int);
+extern rtx_insn *emit_call_insn_before (rtx, rtx);
+extern rtx_insn *emit_call_insn_before_noloc (rtx, rtx);
+extern rtx_insn *emit_call_insn_before_setloc (rtx, rtx, int);
+extern rtx_insn *emit_debug_insn_before (rtx, rtx);
+extern rtx_insn *emit_debug_insn_before_noloc (rtx, rtx);
+extern rtx_insn *emit_debug_insn_before_setloc (rtx, rtx, int);
+extern rtx_barrier *emit_barrier_before (rtx);
+extern rtx_insn *emit_label_before (rtx, rtx);
 extern rtx_note *emit_note_before (enum insn_note, rtx);
-extern rtx emit_insn_after (rtx, rtx);
-extern rtx emit_insn_after_noloc (rtx, rtx, basic_block);
-extern rtx emit_insn_after_setloc (rtx, rtx, int);
-extern rtx emit_jump_insn_after (rtx, rtx);
-extern rtx emit_jump_insn_after_noloc (rtx, rtx);
-extern rtx emit_jump_insn_after_setloc (rtx, rtx, int);
-extern rtx emit_call_insn_after (rtx, rtx);
-extern rtx emit_call_insn_after_noloc (rtx, rtx);
-extern rtx emit_call_insn_after_setloc (rtx, rtx, int);
-extern rtx emit_debug_insn_after (rtx, rtx);
-extern rtx emit_debug_insn_after_noloc (rtx, rtx);
-extern rtx emit_debug_insn_after_setloc (rtx, rtx, int);
-extern rtx emit_barrier_after (rtx);
-extern rtx emit_label_after (rtx, rtx);
+extern rtx_insn *emit_insn_after (rtx, rtx);
+extern rtx_insn *emit_insn_after_noloc (rtx, rtx, basic_block);
+extern rtx_insn *emit_insn_after_setloc (rtx, rtx, int);
+extern rtx_insn *emit_jump_insn_after (rtx, rtx);
+extern rtx_insn *emit_jump_insn_after_noloc (rtx, rtx);
+extern rtx_insn *emit_jump_insn_after_setloc (rtx, rtx, int);
+extern rtx_insn *emit_call_insn_after (rtx, rtx);
+extern rtx_insn *emit_call_insn_after_noloc (rtx, rtx);
+extern rtx_insn *emit_call_insn_after_setloc (rtx, rtx, int);
+extern rtx_insn *emit_debug_insn_after (rtx, rtx);
+extern rtx_insn *emit_debug_insn_after_noloc (rtx, rtx);
+extern rtx_insn *emit_debug_insn_after_setloc (rtx, rtx, int);
+extern rtx_barrier *emit_barrier_after (rtx);
+extern rtx_insn *emit_label_after (rtx, rtx);
 extern rtx_note *emit_note_after (enum insn_note, rtx);
-extern rtx emit_insn (rtx);
-extern rtx emit_debug_insn (rtx);
-extern rtx emit_jump_insn (rtx);
-extern rtx emit_call_insn (rtx);
-extern rtx emit_label (rtx);
+extern rtx_insn *emit_insn (rtx);
+extern rtx_insn *emit_debug_insn (rtx);
+extern rtx_insn *emit_jump_insn (rtx);
+extern rtx_insn *emit_call_insn (rtx);
+extern rtx_insn *emit_label (rtx);
 extern rtx_jump_table_data *emit_jump_table_data (rtx);
-extern rtx emit_barrier (void);
+extern rtx_barrier *emit_barrier (void);
 extern rtx_note *emit_note (enum insn_note);
 extern rtx_note *emit_note_copy (rtx_note *);
-extern rtx gen_clobber (rtx);
-extern rtx emit_clobber (rtx);
-extern rtx gen_use (rtx);
-extern rtx emit_use (rtx);
+extern rtx_insn *gen_clobber (rtx);
+extern rtx_insn *emit_clobber (rtx);
+extern rtx_insn *gen_use (rtx);
+extern rtx_insn *emit_use (rtx);
 extern rtx_insn *make_insn_raw (rtx);
 extern void add_function_usage_to (rtx, rtx);
 extern rtx_call_insn *last_call_insn (void);
@@ -3094,7 +3094,7 @@
 extern void add_insn_before (rtx, rtx, basic_block);
 extern void add_insn_after (rtx, rtx, basic_block);
 extern void remove_insn (rtx);
-extern rtx emit (rtx);
+extern rtx_insn *emit (rtx);
 extern void delete_insn (rtx);
 extern rtx_insn *entry_of_function (void);
 extern void emit_insn_at_entry (rtx);
Index: gcc/config/sh/sh.c
===================================================================
--- gcc/config/sh/sh.c	(revision 214193)
+++ gcc/config/sh/sh.c	(revision 214194)
@@ -195,7 +195,7 @@
 static void sh_reorg (void);
 static void sh_option_override (void);
 static void output_stack_adjust (int, rtx, int, HARD_REG_SET *, bool);
-static rtx frame_insn (rtx);
+static rtx_insn *frame_insn (rtx);
 static rtx push (int);
 static void pop (int);
 static void push_regs (HARD_REG_SET *, int);
@@ -6784,7 +6784,7 @@
 output_stack_adjust (int size, rtx reg, int epilogue_p,
 		     HARD_REG_SET *live_regs_mask, bool frame_p)
 {
-  rtx (*emit_fn) (rtx) = frame_p ? &frame_insn : &emit_insn;
+  rtx_insn *(*emit_fn) (rtx) = frame_p ? &frame_insn : &emit_insn;
   if (size)
     {
       HOST_WIDE_INT align = STACK_BOUNDARY / BITS_PER_UNIT;
@@ -6944,12 +6944,12 @@
 
 /* Emit the specified insn and mark it as frame related.
    FIXME: Rename this to emit_frame_insn.  */
-static rtx
+static rtx_insn *
 frame_insn (rtx x)
 {
-  x = emit_insn (x);
-  RTX_FRAME_RELATED_P (x) = 1;
-  return x;
+  rtx_insn *insn = emit_insn (x);
+  RTX_FRAME_RELATED_P (insn) = 1;
+  return insn;
 }
 
 /* Output RTL to push register RN onto the stack.  */
Index: gcc/cfgrtl.c
===================================================================
--- gcc/cfgrtl.c	(revision 214193)
+++ gcc/cfgrtl.c	(revision 214194)
@@ -1446,7 +1446,7 @@
 void
 emit_barrier_after_bb (basic_block bb)
 {
-  rtx barrier = emit_barrier_after (BB_END (bb));
+  rtx_barrier *barrier = emit_barrier_after (BB_END (bb));
   gcc_assert (current_ir_type () == IR_RTL_CFGRTL
               || current_ir_type () == IR_RTL_CFGLAYOUT);
   if (current_ir_type () == IR_RTL_CFGLAYOUT)

[PATCH 164/236] Add rtx_jump_table_data::get_labels method

[David Malcolm]

See e.g. stmt.c:emit_case_dispatch_table for how the rtvec is set up.

gcc/
	* rtl.h (rtx_jump_table_data::get_labels): New method.
	* cfgbuild.c (make_edges): Replace hand-coded lookup of labels
	with use of the new rtx_jump_table_data::get_labels method.
	(purge_dead_tablejump_edges): Strengthen param "table" from rtx
	to rtx_jump_table_data *.  Simplify by using get_labels method.
	* cfgrtl.c (delete_insn): Replace use of JUMP_TABLE_DATA_P with
	a dyn_cast, introducing local "table", using it to replace
	label-lookup logic with a get_labels method call.
	(patch_jump_insn): Simplify using get_labels method.
	* dwarf2cfi.c (create_trace_edges): Likewise.
	* rtlanal.c (label_is_jump_target_p): Likewise.
---
 gcc/cfgbuild.c  | 14 +++-----------
 gcc/cfgrtl.c    | 14 +++++---------
 gcc/dwarf2cfi.c |  5 +----
 gcc/rtl.h       | 24 ++++++++++++++++++++++++
 gcc/rtlanal.c   |  3 +--
 5 files changed, 34 insertions(+), 26 deletions(-)

diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index 8bbf325..3cd782c 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -263,14 +263,9 @@ make_edges (basic_block min, basic_block max, int update_p)
 	  /* Recognize a tablejump and do the right thing.  */
 	  else if (tablejump_p (insn, NULL, &table))
 	    {
-	      rtvec vec;
+	      rtvec vec = table->get_labels ();
 	      int j;
 
-	      if (GET_CODE (PATTERN (table)) == ADDR_VEC)
-		vec = XVEC (PATTERN (table), 0);
-	      else
-		vec = XVEC (PATTERN (table), 1);
-
 	      for (j = GET_NUM_ELEM (vec) - 1; j >= 0; --j)
 		make_label_edge (edge_cache, bb,
 				 XEXP (RTVEC_ELT (vec, j), 0), 0);
@@ -398,7 +393,7 @@ mark_tablejump_edge (rtx label)
 }
 
 static void
-purge_dead_tablejump_edges (basic_block bb, rtx table)
+purge_dead_tablejump_edges (basic_block bb, rtx_jump_table_data *table)
 {
   rtx_insn *insn = BB_END (bb);
   rtx tmp;
@@ -407,10 +402,7 @@ purge_dead_tablejump_edges (basic_block bb, rtx table)
   edge_iterator ei;
   edge e;
 
-  if (GET_CODE (PATTERN (table)) == ADDR_VEC)
-    vec = XVEC (PATTERN (table), 0);
-  else
-    vec = XVEC (PATTERN (table), 1);
+  vec = table->get_labels ();
 
   for (j = GET_NUM_ELEM (vec) - 1; j >= 0; --j)
     mark_tablejump_edge (XEXP (RTVEC_ELT (vec, j), 0));
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index a31214f..e8990c4 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -197,16 +197,15 @@ delete_insn (rtx insn)
       remove_note (insn, note);
     }
 
-  if (JUMP_TABLE_DATA_P (insn))
+  if (rtx_jump_table_data *table = dyn_cast <rtx_jump_table_data *> (insn))
     {
-      rtx pat = PATTERN (insn);
-      int diff_vec_p = GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC;
-      int len = XVECLEN (pat, diff_vec_p);
+      rtvec vec = table->get_labels ();
+      int len = GET_NUM_ELEM (vec);
       int i;
 
       for (i = 0; i < len; i++)
 	{
-	  rtx label = XEXP (XVECEXP (pat, diff_vec_p, i), 0);
+	  rtx label = XEXP (RTVEC_ELT (vec, i), 0);
 
 	  /* When deleting code in bulk (e.g. removing many unreachable
 	     blocks) we can delete a label that's a target of the vector
@@ -1187,10 +1186,7 @@ patch_jump_insn (rtx_insn *insn, rtx_insn *old_label, basic_block new_bb)
 
       if (new_bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
 	return false;
-      if (GET_CODE (PATTERN (table)) == ADDR_VEC)
-	vec = XVEC (PATTERN (table), 0);
-      else
-	vec = XVEC (PATTERN (table), 1);
+      vec = table->get_labels ();
 
       for (j = GET_NUM_ELEM (vec) - 1; j >= 0; --j)
 	if (XEXP (RTVEC_ELT (vec, j), 0) == old_label)
diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index 7abe48c..bcfc9dd 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -2298,10 +2298,7 @@ create_trace_edges (rtx insn)
 
       if (tablejump_p (insn, NULL, &table))
 	{
-	  rtvec vec;
-
-	  tmp = PATTERN (table);
-	  vec = XVEC (tmp, GET_CODE (tmp) == ADDR_DIFF_VEC);
+	  rtvec vec = table->get_labels ();
 
 	  n = GET_NUM_ELEM (vec);
 	  for (i = 0; i < n; ++i)
diff --git a/gcc/rtl.h b/gcc/rtl.h
index f0b48c3..3b7ff48 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -490,6 +490,21 @@ class GTY(()) rtx_jump_table_data : public rtx_insn
      This is an instance of:
        DEF_RTL_EXPR(JUMP_TABLE_DATA, "jump_table_data", "uuBe0000", RTX_INSN)
      from rtl.def.  */
+
+public:
+
+  /* This can be either:
+
+       (a) a table of absolute jumps, in which case PATTERN (this) is an
+           ADDR_VEC with arg 0 a vector of labels, or
+
+       (b) a table of relative jumps (e.g. for -fPIC), in which case
+           PATTERN (this) is an ADDR_DIFF_VEC, with arg 0 a LABEL_REF and
+	   arg 1 the vector of labels.
+
+     This method gets the underlying vec.  */
+
+  inline rtvec get_labels () const;
 };
 
 class GTY(()) rtx_barrier : public rtx_insn
@@ -1226,6 +1241,15 @@ inline rtx& SET_NEXT_INSN (rtx insn)
    -1 means this instruction has not been recognized yet.  */
 #define INSN_CODE(INSN) XINT (INSN, 5)
 
+inline rtvec rtx_jump_table_data::get_labels () const
+{
+  rtx pat = PATTERN (this);
+  if (GET_CODE (pat) == ADDR_VEC)
+    return XVEC (pat, 0);
+  else
+    return XVEC (pat, 1); /* presumably an ADDR_DIFF_VEC */
+}
+
 #define RTX_FRAME_RELATED_P(RTX)					\
   (RTL_FLAG_CHECK6 ("RTX_FRAME_RELATED_P", (RTX), DEBUG_INSN, INSN,	\
 		    CALL_INSN, JUMP_INSN, BARRIER, SET)->frame_related)
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 13f9b78..9481d52 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -3801,8 +3801,7 @@ label_is_jump_target_p (const_rtx label, const_rtx jump_insn)
 
   if (tablejump_p (jump_insn, NULL, &table))
     {
-      rtvec vec = XVEC (PATTERN (table),
-			GET_CODE (PATTERN (table)) == ADDR_DIFF_VEC);
+      rtvec vec = table->get_labels ();
       int i, veclen = GET_NUM_ELEM (vec);
 
       for (i = 0; i < veclen; ++i)
-- 
1.8.5.3

[PATCH 192/236] Tweak to dse.c

[David Malcolm]

gcc/
	* dse.c (dse_step6): Strengthen local "rinsn" from rtx to
	rtx_insn *.
---
 gcc/dse.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/dse.c b/gcc/dse.c
index 0dc6b22..a122eff 100644
--- a/gcc/dse.c
+++ b/gcc/dse.c
@@ -3624,7 +3624,7 @@ dse_step6 (void)
 		  && s_info->redundant_reason->insn
 		  && INSN_P (s_info->redundant_reason->insn))
 		{
-		  rtx rinsn = s_info->redundant_reason->insn;
+		  rtx_insn *rinsn = s_info->redundant_reason->insn;
 		  if (dump_file && (dump_flags & TDF_DETAILS))
 		    fprintf (dump_file, "Locally deleting insn %d "
 					"because insn %d stores the "
-- 
1.8.5.3

[PATCH 194/236] Use rtx_insn for various target.def hooks

[David Malcolm]

This patch updates params of 22 of the target hooks to pass an rtx_insn *
rather than an rtx, as appropriate.

Known to compile on:
alpha
arc
arm
bfin
c6x
epiphany
ia64
m32c
m32r
m68k
mep
microblaze
mips
pa
pdp11
picochip
rs6000
s390
sh
sparc
spu
tilegx
tilepro
x86_64

gcc/
	* target.def (unwind_emit): Strengthen param "insn" from rtx to
	rtx_insn *.
	(final_postscan_insn): Likewise.
	(adjust_cost): Likewise.
	(adjust_priority): Likewise.
	(variable_issue): Likewise.
	(macro_fusion_pair_p): Likewise.
	(dfa_post_cycle_insn): Likewise.
	(first_cycle_multipass_dfa_lookahead_guard): Likewise.
	(first_cycle_multipass_issue): Likewise.
	(dfa_new_cycle): Likewise.
	(adjust_cost_2): Likewise for params "insn" and "dep_insn".
	(speculate_insn): Likewise for param "insn".
	(gen_spec_check): Likewise for params "insn" and "label".
	(get_insn_spec_ds): Likewise for param "insn".
	(get_insn_checked_ds): Likewise.
	(dispatch_do): Likewise.
	(dispatch): Likewise.
	(cannot_copy_insn_p): Likewise.
	(invalid_within_doloop): Likewise.
	(legitimate_combined_insn): Likewise.
	(needed): Likewise.
	(after): Likewise.

	* doc/tm.texi: Automatically updated to reflect changes to
	target.def.

	* haifa-sched.c (choose_ready): Convert NULL_RTX to NULL when
	working with insn.
	(schedule_block): Likewise.
	(sched_init): Likewise.
	(sched_speculate_insn): Strengthen param "insn" from rtx to
	rtx_insn *.
	(ready_remove_first_dispatch): Convert NULL_RTX to NULL when
	working with insn.
	* hooks.c (hook_bool_rtx_true): Rename to...
	hook_bool_rtx_insn_true): ...this, and strengthen first param from
	rtx to rtx_insn *.
	(hook_constcharptr_const_rtx_null): Rename to...
	(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
	first param from const_rtx to const rtx_insn *.
	(hook_bool_rtx_int_false): Rename to...
	(hook_bool_rtx_insn_int_false): ...this, and strengthen first
	param from rtx to rtx_insn *.
	(hook_void_rtx_int): Rename to...
	(hook_void_rtx_insn_int): ...this, and strengthen first param from
	rtx to rtx_insn *.

	* hooks.h (hook_bool_rtx_true): Rename to...
	(hook_bool_rtx_insn_true): ...this, and strengthen first param from
	rtx to rtx_insn *.
	(hook_bool_rtx_int_false): Rename to...
	(hook_bool_rtx_insn_int_false): ...this, and strengthen first
	param from rtx to rtx_insn *.
	(hook_void_rtx_int): Rename to...
	(hook_void_rtx_insn_int): ...this, and strengthen first param from
	rtx to rtx_insn *.
	(hook_constcharptr_const_rtx_null): Rename to...
	(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
	first param from const_rtx to const rtx_insn *.

	* sched-deps.c (try_group_insn): Strengthen param "insn" and local
	"prev" from rtx to rtx_insn *.

	* sched-int.h (sched_speculate_insn): Strengthen first param from
	rtx to rtx_insn *.

	* sel-sched.c (create_speculation_check): Likewise for local "label".
	* targhooks.c (default_invalid_within_doloop): Strengthen param
	"insn" from const_rtx to const rtx_insn *.
	* targhooks.h (default_invalid_within_doloop): Strengthen param
	from const_rtx to const rtx_insn *.

	* config/alpha/alpha.c (alpha_cannot_copy_insn_p): Likewise.
	(alpha_adjust_cost): Likewise for params "insn", "dep_insn".

	* config/arc/arc.c (arc_sched_adjust_priority): Likewise for param "insn".
	(arc_invalid_within_doloop): Likewise, with const.

	* config/arm/arm.c (arm_adjust_cost): Likewise for params "insn", "dep".
	(arm_cannot_copy_insn_p): Likewise for param "insn".
	(arm_unwind_emit): Likewise.

	* config/bfin/bfin.c (bfin_adjust_cost): Likewise for params "insn",
	"dep_insn".

	* config/c6x/c6x.c (c6x_dfa_new_cycle): Likewise for param "insn".
	(c6x_variable_issue): Likewise.  Removed now-redundant checked
	cast.
	(c6x_adjust_cost): Likewise for params "insn", "dep_insn".

	* config/epiphany/epiphany-protos.h (epiphany_mode_needed):
	Likewise for param "insn".
	(epiphany_mode_after): Likewise.
	* config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise for
	params "insn", "dep_insn".
	(epiphany_mode_needed): Likewise for param "insn".
	(epiphany_mode_after): Likewise.

	* config/i386/i386-protos.h (i386_pe_seh_unwind_emit): Likewise.
	* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
	(ix86_avx_u128_mode_needed): Likewise.
	(ix86_i387_mode_needed): Likewise.
	(ix86_mode_needed): Likewise.
	(ix86_avx_u128_mode_after): Likewise.
	(ix86_mode_after): Likewise.
	(ix86_adjust_cost): Likewise for params "insn", "dep_insn".
	(ix86_macro_fusion_pair_p): Likewise for params "condgen", "condjmp".
	(ix86_adjust_priority): Likewise for param "insn".
	(core2i7_first_cycle_multipass_issue): Likewise for param "insn".
	(do_dispatch): Likewise.
	(has_dispatch): Likewise.
	* config/i386/winnt.c (i386_pe_seh_unwind_emit): Likewise.

	* config/ia64/ia64.c (TARGET_INVALID_WITHIN_DOLOOP): Update to
	reflect renaming of default hook implementation from
	hook_constcharptr_const_rtx_null to
	hook_constcharptr_const_rtx_insn_null.
	(ia64_adjust_cost_2): Strengthen params "insn", "dep_insn" from
	rtx to rtx_insn *.
	(ia64_variable_issue): Likewise for param "insn".
	(ia64_first_cycle_multipass_dfa_lookahead_guard): Likewise.
	(ia64_dfa_new_cycle): Likewise.
	(ia64_get_insn_spec_ds): Likewise.
	(ia64_get_insn_checked_ds): Likewise.
	(ia64_speculate_insn): Likewise.
	(ia64_gen_spec_check): Likewise for params "insn", "label".
	(ia64_asm_unwind_emit): Likewise for param "insn".

	* config/m32r/m32r.c (m32r_adjust_priority): Likewise.

	* config/m68k/m68k.c (m68k_sched_adjust_cost): Likewise for params
	"insn", "def_insn".
	(m68k_sched_variable_issue): Likewise for param "insn".

	* config/mep/mep.c (mep_adjust_cost): Likewise for params "insn",
	"def_insn".

	* config/microblaze/microblaze.c (microblaze_adjust_cost):
	Likewise for params "insn", "dep".

	* config/mips/mips.c (mips_adjust_cost): Likewise.
	(mips_variable_issue): Likewise for param "insn".
	(mips_final_postscan_insn): Likewise.

	* config/mn10300/mn10300.c (mn10300_adjust_sched_cost): Likewise
	for params "insn", "dep".  Add checked casts when extracting first
	insn from PARALLEL.

	* config/pa/pa.c (pa_adjust_cost): Likewise for params "insn",
	"dep_insn".
	(pa_adjust_priority): Likewise for param "insn".

	* config/picochip/picochip.c (picochip_sched_adjust_cost):
	Likewise for params "insn", "dep_insn".

	* config/rs6000/rs6000.c (rs6000_variable_issue_1): Likewise for
	param "insn".
	(rs6000_variable_issue): Likewise.
	(rs6000_adjust_cost): Likewise for params "insn", "dep_insn".
	(rs6000_debug_adjust_cost): Likewise.
	(rs6000_adjust_priority): Likewise for param "insn".
	(rs6000_use_sched_lookahead_guard): Likewise.
	(get_next_active_insn): Likewise for return type and both params.
	(redefine_groups): Likewise for params "prev_head_insn", "tail"
	and locals "insn", "next_insn".
	(pad_groups): Likewise.

	* config/s390/s390.c (s390_adjust_priority): Likewise for param
	"insn".
	(s390_cannot_copy_insn_p): Likewise.
	(s390_sched_variable_issue): Likewise for third param, eliminating
	checked cast.
	(TARGET_INVALID_WITHIN_DOLOOP): Update to reflect renaming of
	default hook implementation from hook_constcharptr_const_rtx_null
	to hook_constcharptr_const_rtx_insn_null.

	* config/sh/sh.c (sh_cannot_copy_insn_p): Strengthen param "insn"
	from rtx to rtx_insn *.
	(sh_adjust_cost): Likewise for params "insn", "dep_insn".
	(sh_variable_issue): Likewise for param "insn".
	(sh_dfa_new_cycle): Likewise.
	(sh_mode_needed): Likewise.
	(sh_mode_after): Likewise.

	* config/sparc/sparc.c (supersparc_adjust_cost): Likewise for
	params "insn", "dep_insn".
	(hypersparc_adjust_cost): Likewise.
	(sparc_adjust_cost): Likewise.

	* config/spu/spu.c (spu_sched_variable_issue): Likewise for third
	param, eliminated checked cast.
	(spu_sched_adjust_cost): Likewise for first and third params.

	* config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Strengthen
	params "insn" and "dep_insn" from rtx to rtx_insn *.

	* config/tilepro/tilepro.c (tilepro_sched_adjust_cost): Likewise.
---
 gcc/config/alpha/alpha.c              |  4 +--
 gcc/config/arc/arc.c                  |  6 ++--
 gcc/config/arm/arm.c                  | 12 ++++----
 gcc/config/bfin/bfin.c                |  2 +-
 gcc/config/c6x/c6x.c                  |  9 +++---
 gcc/config/epiphany/epiphany-protos.h |  4 +--
 gcc/config/epiphany/epiphany.c        |  6 ++--
 gcc/config/i386/i386-protos.h         |  2 +-
 gcc/config/i386/i386.c                | 24 ++++++++--------
 gcc/config/i386/winnt.c               |  2 +-
 gcc/config/ia64/ia64.c                | 39 +++++++++++++-------------
 gcc/config/m32r/m32r.c                |  4 +--
 gcc/config/m68k/m68k.c                | 10 +++----
 gcc/config/mep/mep.c                  |  4 +--
 gcc/config/microblaze/microblaze.c    |  4 +--
 gcc/config/mips/mips.c                |  8 +++---
 gcc/config/mn10300/mn10300.c          |  6 ++--
 gcc/config/pa/pa.c                    |  8 +++---
 gcc/config/picochip/picochip.c        |  7 +++--
 gcc/config/rs6000/rs6000.c            | 33 ++++++++++++----------
 gcc/config/s390/s390.c                |  9 +++---
 gcc/config/sh/sh.c                    | 25 +++++++++--------
 gcc/config/sparc/sparc.c              | 12 ++++----
 gcc/config/spu/spu.c                  |  7 ++---
 gcc/config/tilegx/tilegx.c            |  3 +-
 gcc/config/tilepro/tilepro.c          |  3 +-
 gcc/doc/tm.texi                       | 36 ++++++++++++------------
 gcc/haifa-sched.c                     | 12 ++++----
 gcc/hooks.c                           | 16 ++++++-----
 gcc/hooks.h                           |  8 +++---
 gcc/sched-deps.c                      |  4 +--
 gcc/sched-int.h                       |  2 +-
 gcc/sel-sched.c                       |  4 +--
 gcc/target.def                        | 52 ++++++++++++++++++-----------------
 gcc/targhooks.c                       |  2 +-
 gcc/targhooks.h                       |  2 +-
 36 files changed, 200 insertions(+), 191 deletions(-)

diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 2764f79..bcab091 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -1146,7 +1146,7 @@ split_small_symbolic_operand (rtx x)
    containing the call and branch to the block containing the ldgp.  */
 
 static bool
-alpha_cannot_copy_insn_p (rtx insn)
+alpha_cannot_copy_insn_p (rtx_insn *insn)
 {
   if (!reload_completed || !TARGET_EXPLICIT_RELOCS)
     return false;
@@ -4675,7 +4675,7 @@ alpha_split_atomic_exchange_12 (rtx operands[])
    a dependency LINK or INSN on DEP_INSN.  COST is the current cost.  */
 
 static int
-alpha_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+alpha_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type dep_insn_type;
 
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 46d17c3..1c97322 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -394,7 +394,7 @@ static bool arc_vector_mode_supported_p (enum machine_mode);
 
 static bool arc_can_use_doloop_p (const widest_int &, const widest_int &,
 				  unsigned int, bool);
-static const char *arc_invalid_within_doloop (const_rtx);
+static const char *arc_invalid_within_doloop (const rtx_insn *);
 
 static void output_short_suffix (FILE *file);
 
@@ -571,7 +571,7 @@ static void arc_finalize_pic (void);
    use the peephole2 pattern.  */
 
 static int
-arc_sched_adjust_priority (rtx insn, int priority)
+arc_sched_adjust_priority (rtx_insn *insn, int priority)
 {
   rtx set = single_set (insn);
   if (set
@@ -5721,7 +5721,7 @@ arc_can_use_doloop_p (const widest_int &iterations, const widest_int &,
    Otherwise return why doloop cannot be applied.  */
 
 static const char *
-arc_invalid_within_doloop (const_rtx insn)
+arc_invalid_within_doloop (const rtx_insn *insn)
 {
   if (CALL_P (insn))
     return "Function call in the loop.";
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 36a9298..4d0932a 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -135,7 +135,7 @@ static void arm_output_function_epilogue (FILE *, HOST_WIDE_INT);
 static void arm_output_function_prologue (FILE *, HOST_WIDE_INT);
 static int arm_comp_type_attributes (const_tree, const_tree);
 static void arm_set_default_type_attributes (tree);
-static int arm_adjust_cost (rtx, rtx, rtx, int);
+static int arm_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static int arm_sched_reorder (FILE *, int, rtx_insn **, int *, int);
 static int optimal_immediate_sequence (enum rtx_code code,
 				       unsigned HOST_WIDE_INT val,
@@ -214,7 +214,7 @@ static bool arm_return_in_msb (const_tree);
 static bool arm_must_pass_in_stack (enum machine_mode, const_tree);
 static bool arm_return_in_memory (const_tree, const_tree);
 #if ARM_UNWIND_INFO
-static void arm_unwind_emit (FILE *, rtx);
+static void arm_unwind_emit (FILE *, rtx_insn *);
 static bool arm_output_ttype (rtx);
 static void arm_asm_emit_except_personality (rtx);
 static void arm_asm_init_sections (void);
@@ -236,7 +236,7 @@ static void arm_expand_builtin_va_start (tree, rtx);
 static tree arm_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *);
 static void arm_option_override (void);
 static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode);
-static bool arm_cannot_copy_insn_p (rtx);
+static bool arm_cannot_copy_insn_p (rtx_insn *);
 static int arm_issue_rate (void);
 static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
 static bool arm_output_addr_const_extra (FILE *, rtx);
@@ -11776,7 +11776,7 @@ arm_sched_reorder (FILE *file, int verbose, rtx_insn **ready, int *n_readyp,
    adjust_cost function. Only put bits of code into arm_adjust_cost that
    are common across all cores.  */
 static int
-arm_adjust_cost (rtx insn, rtx link, rtx dep, int cost)
+arm_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
 {
   rtx i_pat, d_pat;
 
@@ -13001,7 +13001,7 @@ arm_note_pic_base (rtx *x, void *date ATTRIBUTE_UNUSED)
 }
 
 static bool
-arm_cannot_copy_insn_p (rtx insn)
+arm_cannot_copy_insn_p (rtx_insn *insn)
 {
   /* The tls call insn cannot be copied, as it is paired with a data
      word.  */
@@ -29145,7 +29145,7 @@ arm_unwind_emit_set (FILE * asm_out_file, rtx p)
 /* Emit unwind directives for the given insn.  */
 
 static void
-arm_unwind_emit (FILE * asm_out_file, rtx insn)
+arm_unwind_emit (FILE * asm_out_file, rtx_insn *insn)
 {
   rtx note, pat;
   bool handled_one = false;
diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index fadfb5f..0a08faf 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -3309,7 +3309,7 @@ bfin_issue_rate (void)
 }
 
 static int
-bfin_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+bfin_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type dep_insn_type;
   int dep_insn_code_number;
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index 9a83c3b..d5f2184 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -3981,7 +3981,8 @@ c6x_sched_init (FILE *dump ATTRIBUTE_UNUSED,
 
 static int
 c6x_dfa_new_cycle (FILE *dump ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
-		   rtx insn ATTRIBUTE_UNUSED, int last_clock ATTRIBUTE_UNUSED,
+		   rtx_insn *insn ATTRIBUTE_UNUSED,
+		   int last_clock ATTRIBUTE_UNUSED,
 		   int clock ATTRIBUTE_UNUSED, int *sort_p ATTRIBUTE_UNUSED)
 {
   if (clock != last_clock)
@@ -4357,11 +4358,11 @@ maybe_clobber_cond (rtx insn, int clock_var)
 static int
 c6x_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
 		    int sched_verbose ATTRIBUTE_UNUSED,
-		    rtx insn, int can_issue_more ATTRIBUTE_UNUSED)
+		    rtx_insn *insn, int can_issue_more ATTRIBUTE_UNUSED)
 {
   ss.last_scheduled_insn = insn;
   if (INSN_UID (insn) < sploop_max_uid_iter0 && !JUMP_P (insn))
-    ss.last_scheduled_iter0 = as_a <rtx_insn *> (insn);
+    ss.last_scheduled_iter0 = insn;
   if (GET_CODE (PATTERN (insn)) != USE && GET_CODE (PATTERN (insn)) != CLOBBER)
     ss.issued_this_cycle++;
   if (insn_info.exists ())
@@ -4464,7 +4465,7 @@ c6x_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
    anti- and output dependencies.  */
 
 static int
-c6x_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+c6x_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type insn_type = TYPE_UNKNOWN, dep_insn_type = TYPE_UNKNOWN;
   int dep_insn_code_number, insn_code_number;
diff --git a/gcc/config/epiphany/epiphany-protos.h b/gcc/config/epiphany/epiphany-protos.h
index de2ea40..fe948e0 100644
--- a/gcc/config/epiphany/epiphany-protos.h
+++ b/gcc/config/epiphany/epiphany-protos.h
@@ -44,8 +44,8 @@ extern void emit_set_fp_mode (int entity, int mode, HARD_REG_SET regs_live);
 #endif
 extern void epiphany_insert_mode_switch_use (rtx insn, int, int);
 extern void epiphany_expand_set_fp_mode (rtx *operands);
-extern int epiphany_mode_needed (int entity, rtx insn);
-extern int epiphany_mode_after (int entity, int last_mode, rtx insn);
+extern int epiphany_mode_needed (int entity, rtx_insn *insn);
+extern int epiphany_mode_after (int entity, int last_mode, rtx_insn *insn);
 extern bool epiphany_epilogue_uses (int regno);
 extern bool epiphany_optimize_mode_switching (int entity);
 extern bool epiphany_is_interrupt_p (tree);
diff --git a/gcc/config/epiphany/epiphany.c b/gcc/config/epiphany/epiphany.c
index 1f0bba1..70670af 100644
--- a/gcc/config/epiphany/epiphany.c
+++ b/gcc/config/epiphany/epiphany.c
@@ -1985,7 +1985,7 @@ epiphany_issue_rate (void)
    the same cost as a data-dependence.  The return value should be
    the new value for COST.  */
 static int
-epiphany_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+epiphany_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   if (REG_NOTE_KIND (link) == 0)
     {
@@ -2384,7 +2384,7 @@ epiphany_mode_priority (int entity, int priority)
 }
 
 int
-epiphany_mode_needed (int entity, rtx insn)
+epiphany_mode_needed (int entity, rtx_insn *insn)
 {
   enum attr_fp_mode mode;
 
@@ -2482,7 +2482,7 @@ epiphany_mode_entry_exit (int entity, bool exit)
 }
 
 int
-epiphany_mode_after (int entity, int last_mode, rtx insn)
+epiphany_mode_after (int entity, int last_mode, rtx_insn *insn)
 {
   /* We have too few call-saved registers to hope to keep the masks across
      calls.  */
diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
index 0670962..bc08985 100644
--- a/gcc/config/i386/i386-protos.h
+++ b/gcc/config/i386/i386-protos.h
@@ -260,7 +260,7 @@ extern void i386_pe_record_stub (const char *);
 
 extern void i386_pe_seh_init (FILE *);
 extern void i386_pe_seh_end_prologue (FILE *);
-extern void i386_pe_seh_unwind_emit (FILE *, rtx);
+extern void i386_pe_seh_unwind_emit (FILE *, rtx_insn *);
 extern void i386_pe_seh_emit_except_personality (rtx);
 extern void i386_pe_seh_init_sections (void);
 
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index a4cc259..8fac72c 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -5814,7 +5814,7 @@ ix86_return_pops_args (tree fundecl, tree funtype, int size)
 /* Implement the TARGET_LEGITIMATE_COMBINED_INSN hook.  */
 
 static bool
-ix86_legitimate_combined_insn (rtx insn)
+ix86_legitimate_combined_insn (rtx_insn *insn)
 {
   /* Check operand constraints in case hard registers were propagated
      into insn pattern.  This check prevents combine pass from
@@ -16082,7 +16082,7 @@ ix86_check_avx256_register (rtx *pexp, void *data ATTRIBUTE_UNUSED)
 /* Return needed mode for entity in optimize_mode_switching pass.  */
 
 static int
-ix86_avx_u128_mode_needed (rtx insn)
+ix86_avx_u128_mode_needed (rtx_insn *insn)
 {
   if (CALL_P (insn))
     {
@@ -16120,7 +16120,7 @@ ix86_avx_u128_mode_needed (rtx insn)
    prior to the execution of insn.  */
 
 static int
-ix86_i387_mode_needed (int entity, rtx insn)
+ix86_i387_mode_needed (int entity, rtx_insn *insn)
 {
   enum attr_i387_cw mode;
 
@@ -16173,7 +16173,7 @@ ix86_i387_mode_needed (int entity, rtx insn)
    prior to the execution of insn.  */
 
 static int
-ix86_mode_needed (int entity, rtx insn)
+ix86_mode_needed (int entity, rtx_insn *insn)
 {
   switch (entity)
     {
@@ -16205,7 +16205,7 @@ ix86_check_avx256_stores (rtx dest, const_rtx set ATTRIBUTE_UNUSED, void *data)
 /* Calculate mode of upper 128bit AVX registers after the insn.  */
 
 static int
-ix86_avx_u128_mode_after (int mode, rtx insn)
+ix86_avx_u128_mode_after (int mode, rtx_insn *insn)
 {
   rtx pat = PATTERN (insn);
 
@@ -16232,7 +16232,7 @@ ix86_avx_u128_mode_after (int mode, rtx insn)
 /* Return the mode that an insn results in.  */
 
 int
-ix86_mode_after (int entity, int mode, rtx insn)
+ix86_mode_after (int entity, int mode, rtx_insn *insn)
 {
   switch (entity)
     {
@@ -25537,7 +25537,7 @@ exact_store_load_dependency (rtx store, rtx load)
 }
 
 static int
-ix86_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+ix86_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type insn_type, dep_insn_type;
   enum attr_memory memory;
@@ -25815,7 +25815,7 @@ ix86_macro_fusion_p ()
    "Intel Architectures Optimization Reference Manual". */
 
 static bool
-ix86_macro_fusion_pair_p (rtx condgen, rtx condjmp)
+ix86_macro_fusion_pair_p (rtx_insn *condgen, rtx_insn *condjmp)
 {
   rtx src, dest;
   rtx single_set = single_set (condgen);
@@ -26311,7 +26311,7 @@ ix86_dependencies_evaluation_hook (rtx_insn *head, rtx_insn *tail)
    moves from function argument registers at the top of the function entry
    and moves from function return value registers after call.  */
 static int
-ix86_adjust_priority (rtx insn, int priority)
+ix86_adjust_priority (rtx_insn *insn, int priority)
 {
   rtx set;
 
@@ -26450,7 +26450,7 @@ core2i7_first_cycle_multipass_begin (void *_data,
 static void
 core2i7_first_cycle_multipass_issue (void *_data,
 				     signed char *ready_try, int n_ready,
-				     rtx insn, const void *_prev_data)
+				     rtx_insn *insn, const void *_prev_data)
 {
   ix86_first_cycle_multipass_data_t data
     = (ix86_first_cycle_multipass_data_t) _data;
@@ -46302,7 +46302,7 @@ debug_ready_dispatch (void)
 /* This routine is the driver of the dispatch scheduler.  */
 
 static void
-do_dispatch (rtx insn, int mode)
+do_dispatch (rtx_insn *insn, int mode)
 {
   if (mode == DISPATCH_INIT)
     init_dispatch_sched ();
@@ -46313,7 +46313,7 @@ do_dispatch (rtx insn, int mode)
 /* Return TRUE if Dispatch Scheduling is supported.  */
 
 static bool
-has_dispatch (rtx insn, int action)
+has_dispatch (rtx_insn *insn, int action)
 {
   if ((TARGET_BDVER1 || TARGET_BDVER2 || TARGET_BDVER3 || TARGET_BDVER4)
       && flag_dispatch_scheduler)
diff --git a/gcc/config/i386/winnt.c b/gcc/config/i386/winnt.c
index 03e77aa..32257ea 100644
--- a/gcc/config/i386/winnt.c
+++ b/gcc/config/i386/winnt.c
@@ -1173,7 +1173,7 @@ seh_frame_related_expr (FILE *f, struct seh_frame_state *seh, rtx pat)
    required for unwind of this insn.  */
 
 void
-i386_pe_seh_unwind_emit (FILE *asm_out_file, rtx insn)
+i386_pe_seh_unwind_emit (FILE *asm_out_file, rtx_insn *insn)
 {
   rtx note, pat;
   bool handled_one = false;
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index c95dcfc..ae62b49 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -169,8 +169,8 @@ static int ia64_first_cycle_multipass_dfa_lookahead (void);
 static void ia64_dependencies_evaluation_hook (rtx_insn *, rtx_insn *);
 static void ia64_init_dfa_pre_cycle_insn (void);
 static rtx ia64_dfa_pre_cycle_insn (void);
-static int ia64_first_cycle_multipass_dfa_lookahead_guard (rtx, int);
-static int ia64_dfa_new_cycle (FILE *, int, rtx, int, int, int *);
+static int ia64_first_cycle_multipass_dfa_lookahead_guard (rtx_insn *, int);
+static int ia64_dfa_new_cycle (FILE *, int, rtx_insn *, int, int, int *);
 static void ia64_h_i_d_extended (void);
 static void * ia64_alloc_sched_context (void);
 static void ia64_init_sched_context (void *, bool);
@@ -179,12 +179,12 @@ static void ia64_clear_sched_context (void *);
 static void ia64_free_sched_context (void *);
 static int ia64_mode_to_int (enum machine_mode);
 static void ia64_set_sched_flags (spec_info_t);
-static ds_t ia64_get_insn_spec_ds (rtx);
-static ds_t ia64_get_insn_checked_ds (rtx);
+static ds_t ia64_get_insn_spec_ds (rtx_insn *);
+static ds_t ia64_get_insn_checked_ds (rtx_insn *);
 static bool ia64_skip_rtx_p (const_rtx);
-static int ia64_speculate_insn (rtx, ds_t, rtx *);
+static int ia64_speculate_insn (rtx_insn *, ds_t, rtx *);
 static bool ia64_needs_block_p (ds_t);
-static rtx ia64_gen_spec_check (rtx, rtx, ds_t);
+static rtx ia64_gen_spec_check (rtx_insn *, rtx_insn *, ds_t);
 static int ia64_spec_check_p (rtx);
 static int ia64_spec_check_src_p (rtx);
 static rtx gen_tls_get_addr (void);
@@ -250,7 +250,7 @@ static void ia64_print_operand_address (FILE *, rtx);
 static bool ia64_print_operand_punct_valid_p (unsigned char code);
 
 static int ia64_issue_rate (void);
-static int ia64_adjust_cost_2 (rtx, int, rtx, int, dw_t);
+static int ia64_adjust_cost_2 (rtx_insn *, int, rtx_insn *, int, dw_t);
 static void ia64_sched_init (FILE *, int, int);
 static void ia64_sched_init_global (FILE *, int, int);
 static void ia64_sched_finish_global (FILE *, int);
@@ -258,9 +258,9 @@ static void ia64_sched_finish (FILE *, int);
 static int ia64_dfa_sched_reorder (FILE *, int, rtx_insn **, int *, int, int);
 static int ia64_sched_reorder (FILE *, int, rtx_insn **, int *, int);
 static int ia64_sched_reorder2 (FILE *, int, rtx_insn **, int *, int);
-static int ia64_variable_issue (FILE *, int, rtx, int);
+static int ia64_variable_issue (FILE *, int, rtx_insn *, int);
 
-static void ia64_asm_unwind_emit (FILE *, rtx);
+static void ia64_asm_unwind_emit (FILE *, rtx_insn *);
 static void ia64_asm_emit_except_personality (rtx);
 static void ia64_asm_init_sections (void);
 
@@ -632,7 +632,7 @@ static const struct attribute_spec ia64_attribute_table[] =
 #undef TARGET_CAN_USE_DOLOOP_P
 #define TARGET_CAN_USE_DOLOOP_P can_use_doloop_if_innermost
 #undef TARGET_INVALID_WITHIN_DOLOOP
-#define TARGET_INVALID_WITHIN_DOLOOP hook_constcharptr_const_rtx_null
+#define TARGET_INVALID_WITHIN_DOLOOP hook_constcharptr_const_rtx_insn_null
 
 #undef TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE
 #define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE ia64_override_options_after_change
@@ -7177,7 +7177,8 @@ ia64_single_set (rtx insn)
    Return the new cost of a dependency of type DEP_TYPE or INSN on DEP_INSN.
    COST is the current cost, DW is dependency weakness.  */
 static int
-ia64_adjust_cost_2 (rtx insn, int dep_type1, rtx dep_insn, int cost, dw_t dw)
+ia64_adjust_cost_2 (rtx_insn *insn, int dep_type1, rtx_insn *dep_insn,
+		    int cost, dw_t dw)
 {
   enum reg_note dep_type = (enum reg_note) dep_type1;
   enum attr_itanium_class dep_class;
@@ -7498,7 +7499,7 @@ ia64_sched_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
 static int
 ia64_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
 		     int sched_verbose ATTRIBUTE_UNUSED,
-		     rtx insn ATTRIBUTE_UNUSED,
+		     rtx_insn *insn,
 		     int can_issue_more ATTRIBUTE_UNUSED)
 {
   if (sched_deps_info->generate_spec_deps && !sel_sched_p ())
@@ -7535,7 +7536,7 @@ ia64_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
    can be chosen.  */
 
 static int
-ia64_first_cycle_multipass_dfa_lookahead_guard (rtx insn, int ready_index)
+ia64_first_cycle_multipass_dfa_lookahead_guard (rtx_insn *insn, int ready_index)
 {
   gcc_assert (insn && INSN_P (insn));
 
@@ -7588,7 +7589,7 @@ scheduled_good_insn (rtx last)
    the ready queue on the next clock start.  */
 
 static int
-ia64_dfa_new_cycle (FILE *dump, int verbose, rtx insn, int last_clock,
+ia64_dfa_new_cycle (FILE *dump, int verbose, rtx_insn *insn, int last_clock,
 		    int clock, int *sort_p)
 {
   gcc_assert (insn && INSN_P (insn));
@@ -8112,7 +8113,7 @@ get_insn_spec_code (const_rtx insn)
 /* If INSN is a speculative load, return a ds with the speculation types.
    Otherwise [if INSN is a normal instruction] return 0.  */
 static ds_t
-ia64_get_insn_spec_ds (rtx insn)
+ia64_get_insn_spec_ds (rtx_insn *insn)
 {
   int code = get_insn_spec_code (insn);
 
@@ -8137,7 +8138,7 @@ ia64_get_insn_spec_ds (rtx insn)
    will be checked.
    Otherwise [if INSN is a normal instruction] return 0.  */
 static ds_t
-ia64_get_insn_checked_ds (rtx insn)
+ia64_get_insn_checked_ds (rtx_insn *insn)
 {
   int code = get_insn_spec_code (insn);
 
@@ -8195,7 +8196,7 @@ insn_can_be_in_speculative_p (rtx insn ATTRIBUTE_UNUSED,
    If current pattern of the INSN already provides TS speculation,
    return 0.  */
 static int
-ia64_speculate_insn (rtx insn, ds_t ts, rtx *new_pat)
+ia64_speculate_insn (rtx_insn *insn, ds_t ts, rtx *new_pat)
 {  
   int mode_no;
   int res;
@@ -8370,7 +8371,7 @@ ia64_needs_block_p (ds_t ts)
 
 /* Generate (or regenerate) a recovery check for INSN.  */
 static rtx
-ia64_gen_spec_check (rtx insn, rtx label, ds_t ds)
+ia64_gen_spec_check (rtx_insn *insn, rtx_insn *label, ds_t ds)
 {
   rtx op1, pat, check_pat;
   gen_func_t gen_check;
@@ -10177,7 +10178,7 @@ process_cfa_offset (FILE *asm_out_file, rtx pat, bool unwind)
    required to unwind this insn.  */
 
 static void
-ia64_asm_unwind_emit (FILE *asm_out_file, rtx insn)
+ia64_asm_unwind_emit (FILE *asm_out_file, rtx_insn *insn)
 {
   bool unwind = ia64_except_unwind_info (&global_options) == UI_TARGET;
   bool frame = dwarf2out_do_frame ();
diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c
index 2b84b0f..6131547 100644
--- a/gcc/config/m32r/m32r.c
+++ b/gcc/config/m32r/m32r.c
@@ -75,7 +75,7 @@ static void  m32r_output_function_epilogue (FILE *, HOST_WIDE_INT);
 
 static void  m32r_file_start (void);
 
-static int    m32r_adjust_priority (rtx, int);
+static int    m32r_adjust_priority (rtx_insn *, int);
 static int    m32r_issue_rate (void);
 
 static void m32r_encode_section_info (tree, rtx, int);
@@ -1322,7 +1322,7 @@ m32r_is_insn (rtx insn)
    short instructions are scheduled ahead of the long ones.  */
 
 static int
-m32r_adjust_priority (rtx insn, int priority)
+m32r_adjust_priority (rtx_insn *insn, int priority)
 {
   if (m32r_is_insn (insn)
       && get_attr_insn_size (insn) != INSN_SIZE_SHORT)
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index 4cd2149..6e76a17 100644
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -124,9 +124,9 @@ struct m68k_address {
   int scale;
 };
 
-static int m68k_sched_adjust_cost (rtx, rtx, rtx, int);
+static int m68k_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static int m68k_sched_issue_rate (void);
-static int m68k_sched_variable_issue (FILE *, int, rtx, int);
+static int m68k_sched_variable_issue (FILE *, int, rtx_insn *, int);
 static void m68k_sched_md_init_global (FILE *, int, int);
 static void m68k_sched_md_finish_global (FILE *, int);
 static void m68k_sched_md_init (FILE *, int, int);
@@ -5920,8 +5920,8 @@ static state_t sched_adjust_cost_state;
 /* Implement adjust_cost scheduler hook.
    Return adjusted COST of dependency LINK between DEF_INSN and INSN.  */
 static int
-m68k_sched_adjust_cost (rtx insn, rtx link ATTRIBUTE_UNUSED, rtx def_insn,
-			int cost)
+m68k_sched_adjust_cost (rtx_insn *insn, rtx link ATTRIBUTE_UNUSED,
+			rtx_insn *def_insn, int cost)
 {
   int delay;
 
@@ -6031,7 +6031,7 @@ static int sched_mem_unit_code;
 static int
 m68k_sched_variable_issue (FILE *sched_dump ATTRIBUTE_UNUSED,
 			   int sched_verbose ATTRIBUTE_UNUSED,
-			   rtx insn, int can_issue_more)
+			   rtx_insn *insn, int can_issue_more)
 {
   int insn_size;
 
diff --git a/gcc/config/mep/mep.c b/gcc/config/mep/mep.c
index a32175e..ea231c1 100644
--- a/gcc/config/mep/mep.c
+++ b/gcc/config/mep/mep.c
@@ -218,7 +218,7 @@ static rtx mep_convert_regnum (const struct cgen_regnum_operand *, rtx);
 static rtx mep_legitimize_arg (const struct insn_operand_data *, rtx, int);
 static void mep_incompatible_arg (const struct insn_operand_data *, rtx, int, tree);
 static rtx mep_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
-static int mep_adjust_cost (rtx, rtx, rtx, int);
+static int mep_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static int mep_issue_rate (void);
 static rtx_insn *mep_find_ready_insn (rtx_insn **, int, enum attr_slot, int);
 static void mep_move_ready_insn (rtx_insn **, int, rtx_insn *);
@@ -6477,7 +6477,7 @@ global_reg_mentioned_p (rtx x)
    insns.  Not implemented.  */
 
 static int
-mep_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+mep_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   int cost_specified;
 
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
index e1a0497..0e783b4 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
@@ -3484,8 +3484,8 @@ microblaze_function_value (const_tree valtype,
 
 /* Implement TARGET_SCHED_ADJUST_COST.  */
 static int
-microblaze_adjust_cost (rtx insn ATTRIBUTE_UNUSED, rtx link,
-			rtx dep ATTRIBUTE_UNUSED, int cost)
+microblaze_adjust_cost (rtx_insn *insn ATTRIBUTE_UNUSED, rtx link,
+			rtx_insn *dep ATTRIBUTE_UNUSED, int cost)
 {
   if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT)
     return cost;
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index fa0404b..446d044 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -13164,8 +13164,8 @@ static struct
    is treated like input-dependence.  */
 
 static int
-mips_adjust_cost (rtx insn ATTRIBUTE_UNUSED, rtx link,
-		  rtx dep ATTRIBUTE_UNUSED, int cost)
+mips_adjust_cost (rtx_insn *insn ATTRIBUTE_UNUSED, rtx link,
+		  rtx_insn *dep ATTRIBUTE_UNUSED, int cost)
 {
   if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT
       && TUNE_20KC)
@@ -13697,7 +13697,7 @@ mips_ls2_variable_issue (rtx insn)
 
 static int
 mips_variable_issue (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
-		     rtx insn, int more)
+		     rtx_insn *insn, int more)
 {
   /* Ignore USEs and CLOBBERs; don't count them against the issue rate.  */
   if (USEFUL_INSN_P (insn))
@@ -17643,7 +17643,7 @@ mips_final_prescan_insn (rtx_insn *insn, rtx *opvec, int noperands)
 /* Implement TARGET_ASM_FINAL_POSTSCAN_INSN.  */
 
 static void
-mips_final_postscan_insn (FILE *file ATTRIBUTE_UNUSED, rtx insn,
+mips_final_postscan_insn (FILE *file ATTRIBUTE_UNUSED, rtx_insn *insn,
 			  rtx *opvec, int noperands)
 {
   if (mips_need_noat_wrapper_p (insn, opvec, noperands))
diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c
index 99b5d19..acc5cc9 100644
--- a/gcc/config/mn10300/mn10300.c
+++ b/gcc/config/mn10300/mn10300.c
@@ -2765,7 +2765,7 @@ is_store_insn (rtx insn)
    COST is the current cycle cost for DEP.  */
 
 static int
-mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
+mn10300_adjust_sched_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
 {
   int timings = get_attr_timings (insn);
 
@@ -2773,10 +2773,10 @@ mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
     return 1;
 
   if (GET_CODE (PATTERN (insn)) == PARALLEL)
-    insn = XVECEXP (PATTERN (insn), 0, 0);
+    insn = as_a <rtx_insn *> (XVECEXP (PATTERN (insn), 0, 0));
 
   if (GET_CODE (PATTERN (dep)) == PARALLEL)
-    dep = XVECEXP (PATTERN (dep), 0, 0);
+    dep = as_a <rtx_insn *> (XVECEXP (PATTERN (dep), 0, 0));
 
   /* For the AM34 a load instruction that follows a
      store instruction incurs an extra cycle of delay.  */
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index e552775..a66524d 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -116,8 +116,8 @@ static bool pa_function_value_regno_p (const unsigned int);
 static void pa_output_function_prologue (FILE *, HOST_WIDE_INT);
 static void update_total_code_bytes (unsigned int);
 static void pa_output_function_epilogue (FILE *, HOST_WIDE_INT);
-static int pa_adjust_cost (rtx, rtx, rtx, int);
-static int pa_adjust_priority (rtx, int);
+static int pa_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
+static int pa_adjust_priority (rtx_insn *, int);
 static int pa_issue_rate (void);
 static void pa_som_asm_init_sections (void) ATTRIBUTE_UNUSED;
 static section *pa_som_tm_clone_table_section (void) ATTRIBUTE_UNUSED;
@@ -4663,7 +4663,7 @@ pa_emit_bcond_fp (rtx operands[])
    a dependency LINK or INSN on DEP_INSN.  COST is the current cost.  */
 
 static int
-pa_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+pa_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type attr_type;
 
@@ -4852,7 +4852,7 @@ pa_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
 /* Adjust scheduling priorities.  We use this to try and keep addil
    and the next use of %r1 close together.  */
 static int
-pa_adjust_priority (rtx insn, int priority)
+pa_adjust_priority (rtx_insn *insn, int priority)
 {
   rtx set = single_set (insn);
   rtx src, dest;
diff --git a/gcc/config/picochip/picochip.c b/gcc/config/picochip/picochip.c
index 6f977d2..0da151f 100644
--- a/gcc/config/picochip/picochip.c
+++ b/gcc/config/picochip/picochip.c
@@ -97,8 +97,8 @@ unsigned int picochip_function_arg_boundary (enum machine_mode mode,
 
 int picochip_sched_lookahead (void);
 int picochip_sched_issue_rate (void);
-int picochip_sched_adjust_cost (rtx insn, rtx link,
-				       rtx dep_insn, int cost);
+int picochip_sched_adjust_cost (rtx_insn *insn, rtx link,
+				rtx_insn *dep_insn, int cost);
 int picochip_sched_reorder (FILE * file, int verbose, rtx_insn ** ready,
 				   int *n_readyp, int clock);
 
@@ -3534,7 +3534,8 @@ picochip_sched_issue_rate (void)
 /* Adjust the scheduling cost between the two given instructions,
    which have the given dependency. */
 int
-picochip_sched_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+picochip_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn,
+			    int cost)
 {
 
   if (TARGET_DEBUG)
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index e7379d4..8cec569 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1073,7 +1073,7 @@ static int rs6000_memory_move_cost (enum machine_mode, reg_class_t, bool);
 static bool rs6000_debug_rtx_costs (rtx, int, int, int, int *, bool);
 static int rs6000_debug_address_cost (rtx, enum machine_mode, addr_space_t,
 				      bool);
-static int rs6000_debug_adjust_cost (rtx, rtx, rtx, int);
+static int rs6000_debug_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static bool is_microcoded_insn (rtx);
 static bool is_nonpipeline_insn (rtx);
 static bool is_cracked_insn (rtx);
@@ -26071,7 +26071,7 @@ static int load_store_pendulum;
    instructions to issue in this cycle.  */
 
 static int
-rs6000_variable_issue_1 (rtx insn, int more)
+rs6000_variable_issue_1 (rtx_insn *insn, int more)
 {
   last_scheduled_insn = insn;
   if (GET_CODE (PATTERN (insn)) == USE
@@ -26111,7 +26111,7 @@ rs6000_variable_issue_1 (rtx insn, int more)
 }
 
 static int
-rs6000_variable_issue (FILE *stream, int verbose, rtx insn, int more)
+rs6000_variable_issue (FILE *stream, int verbose, rtx_insn *insn, int more)
 {
   int r = rs6000_variable_issue_1 (insn, more);
   if (verbose)
@@ -26123,7 +26123,7 @@ rs6000_variable_issue (FILE *stream, int verbose, rtx insn, int more)
    a dependency LINK or INSN on DEP_INSN.  COST is the current cost.  */
 
 static int
-rs6000_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+rs6000_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type attr_type;
 
@@ -26392,7 +26392,8 @@ rs6000_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
 /* Debug version of rs6000_adjust_cost.  */
 
 static int
-rs6000_debug_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+rs6000_debug_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn,
+			  int cost)
 {
   int ret = rs6000_adjust_cost (insn, link, dep_insn, cost);
 
@@ -26617,7 +26618,7 @@ mem_locations_overlap (rtx mem1, rtx mem2)
    priorities of insns.  */
 
 static int
-rs6000_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
+rs6000_adjust_priority (rtx_insn *insn ATTRIBUTE_UNUSED, int priority)
 {
   rtx load_mem, str_mem;
   /* On machines (like the 750) which have asymmetric integer units,
@@ -26780,7 +26781,7 @@ rs6000_use_sched_lookahead (void)
 /* We are choosing insn from the ready queue.  Return zero if INSN can be
    chosen.  */
 static int
-rs6000_use_sched_lookahead_guard (rtx insn, int ready_index)
+rs6000_use_sched_lookahead_guard (rtx_insn *insn, int ready_index)
 {
   if (ready_index == 0)
     return 0;
@@ -26962,17 +26963,17 @@ rs6000_is_costly_dependence (dep_t dep, int cost, int distance)
    skipping any "non-active" insns - insns that will not actually occupy
    an issue slot.  Return NULL_RTX if such an insn is not found.  */
 
-static rtx
-get_next_active_insn (rtx insn, rtx tail)
+static rtx_insn *
+get_next_active_insn (rtx_insn *insn, rtx_insn *tail)
 {
   if (insn == NULL_RTX || insn == tail)
-    return NULL_RTX;
+    return NULL;
 
   while (1)
     {
       insn = NEXT_INSN (insn);
       if (insn == NULL_RTX || insn == tail)
-	return NULL_RTX;
+	return NULL;
 
       if (CALL_P (insn)
 	  || JUMP_P (insn) || JUMP_TABLE_DATA_P (insn)
@@ -27745,9 +27746,10 @@ force_new_group (int sched_verbose, FILE *dump, rtx *group_insns,
      start a new group.  */
 
 static int
-redefine_groups (FILE *dump, int sched_verbose, rtx prev_head_insn, rtx tail)
+redefine_groups (FILE *dump, int sched_verbose, rtx_insn *prev_head_insn,
+		 rtx_insn *tail)
 {
-  rtx insn, next_insn;
+  rtx_insn *insn, *next_insn;
   int issue_rate;
   int can_issue_more;
   int slot, i;
@@ -27822,9 +27824,10 @@ redefine_groups (FILE *dump, int sched_verbose, rtx prev_head_insn, rtx tail)
    returns the number of dispatch groups found.  */
 
 static int
-pad_groups (FILE *dump, int sched_verbose, rtx prev_head_insn, rtx tail)
+pad_groups (FILE *dump, int sched_verbose, rtx_insn *prev_head_insn,
+	    rtx_insn *tail)
 {
-  rtx insn, next_insn;
+  rtx_insn *insn, *next_insn;
   rtx nop;
   int issue_rate;
   int can_issue_more;
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index ac3676e..13d6a94 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -5864,7 +5864,7 @@ s390_agen_dep_p (rtx dep_insn, rtx insn)
    A STD instruction should be scheduled earlier,
    in order to use the bypass.  */
 static int
-s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
+s390_adjust_priority (rtx_insn *insn, int priority)
 {
   if (! INSN_P (insn))
     return priority;
@@ -6540,7 +6540,7 @@ s390_execute_target (rtx insn)
    execute insns that carry a unique label.  */
 
 static bool
-s390_cannot_copy_insn_p (rtx insn)
+s390_cannot_copy_insn_p (rtx_insn *insn)
 {
   rtx label = s390_execute_label (insn);
   return label && label != const0_rtx;
@@ -11710,9 +11710,8 @@ s390_sched_reorder (FILE *file, int verbose,
    last_scheduled_insn in order to make it available for
    s390_sched_reorder.  */
 static int
-s390_sched_variable_issue (FILE *file, int verbose, rtx uncast_insn, int more)
+s390_sched_variable_issue (FILE *file, int verbose, rtx_insn *insn, int more)
 {
-  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   last_scheduled_insn = insn;
 
   if (s390_tune == PROCESSOR_2827_ZEC12
@@ -12182,7 +12181,7 @@ s390_option_override (void)
 #define TARGET_CC_MODES_COMPATIBLE s390_cc_modes_compatible
 
 #undef TARGET_INVALID_WITHIN_DOLOOP
-#define TARGET_INVALID_WITHIN_DOLOOP hook_constcharptr_const_rtx_null
+#define TARGET_INVALID_WITHIN_DOLOOP hook_constcharptr_const_rtx_insn_null
 
 #ifdef HAVE_AS_TLS
 #undef TARGET_ASM_OUTPUT_DWARF_DTPREL
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index bc83222..056eb32 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -203,8 +203,8 @@ static int calc_live_regs (HARD_REG_SET *);
 static HOST_WIDE_INT rounded_frame_size (int);
 static bool sh_frame_pointer_required (void);
 static void sh_emit_mode_set (int, int, HARD_REG_SET);
-static int sh_mode_needed (int, rtx);
-static int sh_mode_after (int, int, rtx);
+static int sh_mode_needed (int, rtx_insn *);
+static int sh_mode_after (int, int, rtx_insn *);
 static int sh_mode_entry (int);
 static int sh_mode_exit (int);
 static int sh_mode_priority (int entity, int n);
@@ -227,9 +227,9 @@ static void sh_output_function_epilogue (FILE *, HOST_WIDE_INT);
 static void sh_insert_attributes (tree, tree *);
 static const char *sh_check_pch_target_flags (int);
 static int sh_register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
-static int sh_adjust_cost (rtx, rtx, rtx, int);
+static int sh_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static int sh_issue_rate (void);
-static int sh_dfa_new_cycle (FILE *, int, rtx, int, int, int *sort_p);
+static int sh_dfa_new_cycle (FILE *, int, rtx_insn *, int, int, int *sort_p);
 static short find_set_regmode_weight (rtx, enum machine_mode);
 static short find_insn_regmode_weight (rtx, enum machine_mode);
 static void find_regmode_weight (basic_block, enum machine_mode);
@@ -243,7 +243,7 @@ static bool high_pressure (enum machine_mode);
 static int sh_reorder (FILE *, int, rtx_insn **, int *, int);
 static int sh_reorder2 (FILE *, int, rtx_insn **, int *, int);
 static void sh_md_init (FILE *, int, int);
-static int sh_variable_issue (FILE *, int, rtx, int);
+static int sh_variable_issue (FILE *, int, rtx_insn *, int);
 
 static bool sh_function_ok_for_sibcall (tree, tree);
 
@@ -265,7 +265,7 @@ static int and_xor_ior_costs (rtx, int);
 static int addsubcosts (rtx);
 static int multcosts (rtx);
 static bool unspec_caller_rtx_p (rtx);
-static bool sh_cannot_copy_insn_p (rtx);
+static bool sh_cannot_copy_insn_p (rtx_insn *);
 static bool sh_rtx_costs (rtx, int, int, int, int *, bool);
 static int sh_address_cost (rtx, enum machine_mode, addr_space_t, bool);
 static int sh_pr_n_sets (void);
@@ -2941,7 +2941,7 @@ unspec_caller_rtx_p (rtx pat)
 /* Indicate that INSN cannot be duplicated.  This is true for insn
    that generates a unique label.  */
 static bool
-sh_cannot_copy_insn_p (rtx insn)
+sh_cannot_copy_insn_p (rtx_insn *insn)
 {
   rtx pat;
 
@@ -10751,7 +10751,8 @@ sh_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED,
    the same cost as a data-dependence.  The return value should be
    the new value for COST.  */
 static int
-sh_adjust_cost (rtx insn, rtx link ATTRIBUTE_UNUSED, rtx dep_insn, int cost)
+sh_adjust_cost (rtx_insn *insn, rtx link ATTRIBUTE_UNUSED,
+		rtx_insn *dep_insn, int cost)
 {
   rtx reg, use_pat;
 
@@ -11239,7 +11240,7 @@ sh_scalar_mode_supported_p (enum machine_mode mode)
 static int
 sh_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
 		   int sched_verbose ATTRIBUTE_UNUSED,
-		   rtx insn,
+		   rtx_insn *insn,
 		   int can_issue_more)
 {
   if (GET_CODE (PATTERN (insn)) != USE
@@ -11336,7 +11337,7 @@ sh_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
 static int
 sh_dfa_new_cycle (FILE *sched_dump ATTRIBUTE_UNUSED,
 		  int sched_verbose ATTRIBUTE_UNUSED,
-		  rtx insn ATTRIBUTE_UNUSED,
+		  rtx_insn *insn ATTRIBUTE_UNUSED,
 		  int last_clock_var,
 		  int clock_var,
 		  int *sort_p)
@@ -13589,13 +13590,13 @@ sh_emit_mode_set (int entity ATTRIBUTE_UNUSED, int mode,
 }
 
 static int
-sh_mode_needed (int entity ATTRIBUTE_UNUSED, rtx insn)
+sh_mode_needed (int entity ATTRIBUTE_UNUSED, rtx_insn *insn)
 {
   return recog_memoized (insn) >= 0  ? get_attr_fp_mode (insn) : FP_MODE_NONE;
 }
 
 static int
-sh_mode_after (int entity ATTRIBUTE_UNUSED, int mode, rtx insn)
+sh_mode_after (int entity ATTRIBUTE_UNUSED, int mode, rtx_insn *insn)
 {
   if (TARGET_HITACHI && recog_memoized (insn) >= 0 &&
       get_attr_fp_set (insn) != FP_SET_NONE)
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 7c2e57f..368d458 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -537,8 +537,8 @@ static void scan_record_type (const_tree, int *, int *, int *);
 static int function_arg_slotno (const CUMULATIVE_ARGS *, enum machine_mode,
 				const_tree, bool, bool, int *, int *);
 
-static int supersparc_adjust_cost (rtx, rtx, rtx, int);
-static int hypersparc_adjust_cost (rtx, rtx, rtx, int);
+static int supersparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
+static int hypersparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 
 static void sparc_emit_set_const32 (rtx, rtx);
 static void sparc_emit_set_const64 (rtx, rtx);
@@ -557,7 +557,7 @@ static void sparc_asm_function_epilogue (FILE *, HOST_WIDE_INT);
 static void sparc_solaris_elf_asm_named_section (const char *, unsigned int,
 						 tree) ATTRIBUTE_UNUSED;
 #endif
-static int sparc_adjust_cost (rtx, rtx, rtx, int);
+static int sparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
 static int sparc_issue_rate (void);
 static void sparc_sched_init (FILE *, int, int);
 static int sparc_use_sched_lookahead (void);
@@ -9408,7 +9408,7 @@ sparc_trampoline_init (rtx m_tramp, tree fndecl, rtx cxt)
    a dependency LINK or INSN on DEP_INSN.  COST is the current cost.  */
 
 static int
-supersparc_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+supersparc_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type insn_type;
 
@@ -9469,7 +9469,7 @@ supersparc_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
 }
 
 static int
-hypersparc_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+hypersparc_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   enum attr_type insn_type, dep_type;
   rtx pat = PATTERN(insn);
@@ -9546,7 +9546,7 @@ hypersparc_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
 }
 
 static int
-sparc_adjust_cost(rtx insn, rtx link, rtx dep, int cost)
+sparc_adjust_cost(rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
 {
   switch (sparc_cpu)
     {
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index 2d511d4..811a6c8 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -2802,11 +2802,10 @@ spu_sched_init (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
 static int
 spu_sched_variable_issue (FILE *file ATTRIBUTE_UNUSED,
 			  int verbose ATTRIBUTE_UNUSED,
-			  rtx uncast_insn, int more)
+			  rtx_insn *insn, int more)
 {
   int len;
   int p;
-  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   if (GET_CODE (PATTERN (insn)) == USE
       || GET_CODE (PATTERN (insn)) == CLOBBER
       || (len = get_attr_length (insn)) == 0)
@@ -3000,11 +2999,9 @@ spu_sched_reorder (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
 
 /* INSN is dependent on DEP_INSN. */
 static int
-spu_sched_adjust_cost (rtx uncast_insn, rtx link, rtx uncast_dep_insn, int cost)
+spu_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 {
   rtx set;
-  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
-  rtx_insn *dep_insn = as_a <rtx_insn *> (uncast_dep_insn);
 
   /* The blockage pattern is used to prevent instructions from being
      moved across it and has no cost. */
diff --git a/gcc/config/tilegx/tilegx.c b/gcc/config/tilegx/tilegx.c
index be3e13e..510685e 100644
--- a/gcc/config/tilegx/tilegx.c
+++ b/gcc/config/tilegx/tilegx.c
@@ -4429,7 +4429,8 @@ get_jump_target (rtx branch)
 
 /* Implement TARGET_SCHED_ADJUST_COST.  */
 static int
-tilegx_sched_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+tilegx_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn,
+			  int cost)
 {
   /* If we have a true dependence, INSN is a call, and DEP_INSN
      defines a register that is needed by the call (argument or stack
diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c
index 520b485..761059f 100644
--- a/gcc/config/tilepro/tilepro.c
+++ b/gcc/config/tilepro/tilepro.c
@@ -3955,7 +3955,8 @@ get_jump_target (rtx branch)
 
 /* Implement TARGET_SCHED_ADJUST_COST.  */
 static int
-tilepro_sched_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
+tilepro_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn,
+			   int cost)
 {
   /* If we have a true dependence, INSN is a call, and DEP_INSN
      defines a register that is needed by the call (argument or stack
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index ed33928..84e1b95 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -6530,7 +6530,7 @@ it to vary depending on what the instructions are, you must use
 @samp{TARGET_SCHED_VARIABLE_ISSUE}.
 @end deftypefn
 
-@deftypefn {Target Hook} int TARGET_SCHED_VARIABLE_ISSUE (FILE *@var{file}, int @var{verbose}, rtx @var{insn}, int @var{more})
+@deftypefn {Target Hook} int TARGET_SCHED_VARIABLE_ISSUE (FILE *@var{file}, int @var{verbose}, rtx_insn *@var{insn}, int @var{more})
 This hook is executed by the scheduler after it has scheduled an insn
 from the ready list.  It should return the number of insns which can
 still be issued in the current cycle.  The default is
@@ -6544,7 +6544,7 @@ debug output to.  @var{verbose} is the verbose level provided by
 was scheduled.
 @end deftypefn
 
-@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_COST (rtx @var{insn}, rtx @var{link}, rtx @var{dep_insn}, int @var{cost})
+@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_COST (rtx_insn *@var{insn}, rtx @var{link}, rtx_insn *@var{dep_insn}, int @var{cost})
 This function corrects the value of @var{cost} based on the
 relationship between @var{insn} and @var{dep_insn} through the
 dependence @var{link}.  It should return the new value.  The default
@@ -6559,7 +6559,7 @@ acceptable, you could use the hook to modify them too.  See also
 @pxref{Processor pipeline description}.
 @end deftypefn
 
-@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_PRIORITY (rtx @var{insn}, int @var{priority})
+@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_PRIORITY (rtx_insn *@var{insn}, int @var{priority})
 This hook adjusts the integer scheduling priority @var{priority} of
 @var{insn}.  It should return the new priority.  Increase the priority to
 execute @var{insn} earlier, reduce the priority to execute @var{insn}
@@ -6599,7 +6599,7 @@ cycle.  These other insns can then be taken into account properly.
 This hook is used to check whether target platform supports macro fusion.
 @end deftypefn
 
-@deftypefn {Target Hook} bool TARGET_SCHED_MACRO_FUSION_PAIR_P (rtx @var{condgen}, rtx @var{condjmp})
+@deftypefn {Target Hook} bool TARGET_SCHED_MACRO_FUSION_PAIR_P (rtx_insn *@var{condgen}, rtx_insn *@var{condjmp})
 This hook is used to check whether two insns could be macro fused for
 target microarchitecture. If this hook returns true for the given insn pair
 (@var{condgen} and @var{condjmp}), scheduler will put them into a sched
@@ -6662,7 +6662,7 @@ when the new simulated processor cycle starts.
 The hook can be used to initialize data used by the previous hook.
 @end deftypefn
 
-@deftypefn {Target Hook} rtx TARGET_SCHED_DFA_POST_CYCLE_INSN (void)
+@deftypefn {Target Hook} {rtx_insn *} TARGET_SCHED_DFA_POST_CYCLE_INSN (void)
 The hook is analogous to @samp{TARGET_SCHED_DFA_PRE_CYCLE_INSN} but used
 to changed the state as if the insn were scheduled when the new
 simulated processor cycle finishes.
@@ -6716,7 +6716,7 @@ schedules to choose the best one.
 The default is no multipass scheduling.
 @end deftypefn
 
-@deftypefn {Target Hook} int TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD (rtx @var{insn}, int @var{ready_index})
+@deftypefn {Target Hook} int TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD (rtx_insn *@var{insn}, int @var{ready_index})
 
 This hook controls what insns from the ready insn queue will be
 considered for the multipass insn scheduling.  If the hook returns
@@ -6737,7 +6737,7 @@ This hook prepares the target backend for a new round of multipass
 scheduling.
 @end deftypefn
 
-@deftypefn {Target Hook} void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_ISSUE (void *@var{data}, signed char *@var{ready_try}, int @var{n_ready}, rtx @var{insn}, const void *@var{prev_data})
+@deftypefn {Target Hook} void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_ISSUE (void *@var{data}, signed char *@var{ready_try}, int @var{n_ready}, rtx_insn *@var{insn}, const void *@var{prev_data})
 This hook is called when multipass scheduling evaluates instruction INSN.
 @end deftypefn
 
@@ -6759,7 +6759,7 @@ This hook initializes target-specific data used in multipass scheduling.
 This hook finalizes target-specific data used in multipass scheduling.
 @end deftypefn
 
-@deftypefn {Target Hook} int TARGET_SCHED_DFA_NEW_CYCLE (FILE *@var{dump}, int @var{verbose}, rtx @var{insn}, int @var{last_clock}, int @var{clock}, int *@var{sort_p})
+@deftypefn {Target Hook} int TARGET_SCHED_DFA_NEW_CYCLE (FILE *@var{dump}, int @var{verbose}, rtx_insn *@var{insn}, int @var{last_clock}, int @var{clock}, int *@var{sort_p})
 This hook is called by the insn scheduler before issuing @var{insn}
 on cycle @var{clock}.  If the hook returns nonzero,
 @var{insn} is not issued on this processor cycle.  Instead,
@@ -6821,7 +6821,7 @@ Deallocate internal data in target scheduling context pointed to by @var{tc}.
 Deallocate a store for target scheduling context pointed to by @var{tc}.
 @end deftypefn
 
-@deftypefn {Target Hook} int TARGET_SCHED_SPECULATE_INSN (rtx @var{insn}, unsigned int @var{dep_status}, rtx *@var{new_pat})
+@deftypefn {Target Hook} int TARGET_SCHED_SPECULATE_INSN (rtx_insn *@var{insn}, unsigned int @var{dep_status}, rtx *@var{new_pat})
 This hook is called by the insn scheduler when @var{insn} has only
 speculative dependencies and therefore can be scheduled speculatively.
 The hook is used to check if the pattern of @var{insn} has a speculative
@@ -6838,7 +6838,7 @@ for @var{insn}.  It should return @code{true}, if the corresponding check
 instruction should branch to recovery code, or @code{false} otherwise.
 @end deftypefn
 
-@deftypefn {Target Hook} rtx TARGET_SCHED_GEN_SPEC_CHECK (rtx @var{insn}, rtx @var{label}, unsigned int @var{ds})
+@deftypefn {Target Hook} rtx TARGET_SCHED_GEN_SPEC_CHECK (rtx_insn *@var{insn}, rtx_insn *@var{label}, unsigned int @var{ds})
 This hook is called by the insn scheduler to generate a pattern for recovery
 check instruction.  If @var{mutate_p} is zero, then @var{insn} is a
 speculative instruction for which the check should be generated.
@@ -6865,12 +6865,12 @@ bound will be used in case this hook is not implemented: the total number
 of instructions divided by the issue rate.
 @end deftypefn
 
-@deftypefn {Target Hook} bool TARGET_SCHED_DISPATCH (rtx @var{insn}, int @var{x})
+@deftypefn {Target Hook} bool TARGET_SCHED_DISPATCH (rtx_insn *@var{insn}, int @var{x})
 This hook is called by Haifa Scheduler.  It returns true if dispatch scheduling
 is supported in hardware and the condition specified in the parameter is true.
 @end deftypefn
 
-@deftypefn {Target Hook} void TARGET_SCHED_DISPATCH_DO (rtx @var{insn}, int @var{x})
+@deftypefn {Target Hook} void TARGET_SCHED_DISPATCH_DO (rtx_insn *@var{insn}, int @var{x})
 This hook is called by Haifa Scheduler.  It performs the operation specified
 in its second parameter.
 @end deftypefn
@@ -8650,7 +8650,7 @@ writing conditional output routines in those patterns.
 If this macro is not defined, it is equivalent to a null statement.
 @end defmac
 
-@deftypefn {Target Hook} void TARGET_ASM_FINAL_POSTSCAN_INSN (FILE *@var{file}, rtx @var{insn}, rtx *@var{opvec}, int @var{noperands})
+@deftypefn {Target Hook} void TARGET_ASM_FINAL_POSTSCAN_INSN (FILE *@var{file}, rtx_insn *@var{insn}, rtx *@var{opvec}, int @var{noperands})
 If defined, this target hook is a function which is executed just after the
 output of assembler code for @var{insn}, to change the mode of the assembler
 if necessary.
@@ -8894,7 +8894,7 @@ The default is that no label is emitted.
 If the target implements @code{TARGET_ASM_UNWIND_EMIT}, this hook may be used to emit a directive to install a personality hook into the unwind info.  This hook should not be used if dwarf2 unwind info is used.
 @end deftypefn
 
-@deftypefn {Target Hook} void TARGET_ASM_UNWIND_EMIT (FILE *@var{stream}, rtx @var{insn})
+@deftypefn {Target Hook} void TARGET_ASM_UNWIND_EMIT (FILE *@var{stream}, rtx_insn *@var{insn})
 This target hook emits assembly directives required to unwind the
 given instruction.  This is only used when @code{TARGET_EXCEPT_UNWIND_INFO}
 returns @code{UI_TARGET}.
@@ -9741,11 +9741,11 @@ switch is needed / supplied.
 Generate one or more insns to set @var{entity} to @var{mode}. @var{hard_reg_live} is the set of hard registers live at the point where the insn(s) are to be inserted. Sets of a lower numbered entity will be emitted before sets of a higher numbered entity to a mode of the same or lower priority.
 @end deftypefn
 
-@deftypefn {Target Hook} int TARGET_MODE_NEEDED (int @var{entity}, rtx @var{insn})
+@deftypefn {Target Hook} int TARGET_MODE_NEEDED (int @var{entity}, rtx_insn *@var{insn})
 @var{entity} is an integer specifying a mode-switched entity. If @code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro to return an integer value not larger than the corresponding element in @code{NUM_MODES_FOR_MODE_SWITCHING}, to denote the mode that @var{entity} must be switched into prior to the execution of @var{insn}.
 @end deftypefn
 
-@deftypefn {Target Hook} int TARGET_MODE_AFTER (int @var{entity}, int @var{mode}, rtx @var{insn})
+@deftypefn {Target Hook} int TARGET_MODE_AFTER (int @var{entity}, int @var{mode}, rtx_insn *@var{insn})
 @var{entity} is an integer specifying a mode-switched entity.  If this macro is defined, it is evaluated for every @var{insn} during mode switching.  It determines the mode that an insn results in (if different from the incoming mode).
 @end deftypefn
 
@@ -10994,7 +10994,7 @@ implementation returns true.  You can use @code{can_use_doloop_if_innermost}
 if the loop must be the innermost, and if there are no other restrictions.
 @end deftypefn
 
-@deftypefn {Target Hook} {const char *} TARGET_INVALID_WITHIN_DOLOOP (const_rtx @var{insn})
+@deftypefn {Target Hook} {const char *} TARGET_INVALID_WITHIN_DOLOOP (const rtx_insn *@var{insn})
 
 Take an instruction in @var{insn} and return NULL if it is valid within a
 low-overhead loop, otherwise return a string explaining why doloop
@@ -11007,7 +11007,7 @@ By default, the RTL loop optimizer does not use a present doloop pattern for
 loops containing function calls or branch on table instructions.
 @end deftypefn
 
-@deftypefn {Target Hook} bool TARGET_LEGITIMATE_COMBINED_INSN (rtx @var{insn})
+@deftypefn {Target Hook} bool TARGET_LEGITIMATE_COMBINED_INSN (rtx_insn *@var{insn})
 Take an instruction in @var{insn} and return @code{false} if the instruction is not appropriate as a combination of two or more instructions.  The default is to accept all instructions.
 @end deftypefn
 
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 574c9d2..72308da 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -5560,7 +5560,7 @@ choose_ready (struct ready_list *ready, bool first_cycle_insn_p,
   if (lookahead <= 0 || SCHED_GROUP_P (ready_element (ready, 0))
       || DEBUG_INSN_P (ready_element (ready, 0)))
     {
-      if (targetm.sched.dispatch (NULL_RTX, IS_DISPATCH_ON))
+      if (targetm.sched.dispatch (NULL, IS_DISPATCH_ON))
 	*insn_ptr = ready_remove_first_dispatch (ready);
       else
 	*insn_ptr = ready_remove_first (ready);
@@ -6306,7 +6306,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
           if (TODO_SPEC (insn) & SPECULATIVE)
             generate_recovery_code (insn);
 
-	  if (targetm.sched.dispatch (NULL_RTX, IS_DISPATCH_ON))
+	  if (targetm.sched.dispatch (NULL, IS_DISPATCH_ON))
 	    targetm.sched.dispatch_do (insn, ADD_TO_DISPATCH_WINDOW);
 
 	  /* Update counters, etc in the scheduler's front end.  */
@@ -6669,8 +6669,8 @@ sched_init (void)
   flag_schedule_speculative_load = 0;
 #endif
 
-  if (targetm.sched.dispatch (NULL_RTX, IS_DISPATCH_ON))
-    targetm.sched.dispatch_do (NULL_RTX, DISPATCH_INIT);
+  if (targetm.sched.dispatch (NULL, IS_DISPATCH_ON))
+    targetm.sched.dispatch_do (NULL, DISPATCH_INIT);
 
   if (live_range_shrinkage_p)
     sched_pressure = SCHED_PRESSURE_WEIGHTED;
@@ -8085,7 +8085,7 @@ haifa_change_pattern (rtx_insn *insn, rtx new_pat)
    current instruction pattern,
    1 - need to change pattern for *NEW_PAT to be speculative.  */
 int
-sched_speculate_insn (rtx insn, ds_t request, rtx *new_pat)
+sched_speculate_insn (rtx_insn *insn, ds_t request, rtx *new_pat)
 {
   gcc_assert (current_sched_info->flags & DO_SPECULATION
               && (request & SPECULATIVE)
@@ -8638,7 +8638,7 @@ ready_remove_first_dispatch (struct ready_list *ready)
 	}
     }
 
-  if (targetm.sched.dispatch (NULL_RTX, DISPATCH_VIOLATION))
+  if (targetm.sched.dispatch (NULL, DISPATCH_VIOLATION))
     return ready_remove_first (ready);
 
   for (i = 1; i < ready->n_ready; i++)
diff --git a/gcc/hooks.c b/gcc/hooks.c
index 5c06562..3f11354 100644
--- a/gcc/hooks.c
+++ b/gcc/hooks.c
@@ -302,7 +302,7 @@ hook_bool_tree_bool_false (tree a ATTRIBUTE_UNUSED, bool b ATTRIBUTE_UNUSED)
 }
 
 bool
-hook_bool_rtx_true (rtx a ATTRIBUTE_UNUSED)
+hook_bool_rtx_insn_true (rtx_insn *insn ATTRIBUTE_UNUSED)
 {
   return true;
 }
@@ -411,9 +411,9 @@ hook_tree_tree_tree_tree_null (tree t0 ATTRIBUTE_UNUSED,
   return NULL;
 }
 
-/* Generic hook that takes a rtx and returns a NULL string.  */
+/* Generic hook that takes an rtx_insn *and returns a NULL string.  */
 const char *
-hook_constcharptr_const_rtx_null (const_rtx r ATTRIBUTE_UNUSED)
+hook_constcharptr_const_rtx_insn_null (const rtx_insn *insn ATTRIBUTE_UNUSED)
 {
   return NULL;
 }
@@ -447,18 +447,20 @@ hook_tree_const_tree_null (const_tree t ATTRIBUTE_UNUSED)
   return NULL;
 }
 
-/* Generic hook that takes a rtx and an int and returns a bool.  */
+/* Generic hook that takes a rtx_insn * and an int and returns a bool.  */
 
 bool
-hook_bool_rtx_int_false (rtx insn ATTRIBUTE_UNUSED, int mode ATTRIBUTE_UNUSED)
+hook_bool_rtx_insn_int_false (rtx_insn *insn ATTRIBUTE_UNUSED,
+			      int mode ATTRIBUTE_UNUSED)
 {
   return false;
 }
 
-/* Generic hook that takes a rtx and an int and returns void.  */
+/* Generic hook that takes a rtx_insn * and an int and returns void.  */
 
 void
-hook_void_rtx_int (rtx insn ATTRIBUTE_UNUSED, int mode ATTRIBUTE_UNUSED)
+hook_void_rtx_insn_int (rtx_insn *insn ATTRIBUTE_UNUSED,
+			int mode ATTRIBUTE_UNUSED)
 {
 }
 
diff --git a/gcc/hooks.h b/gcc/hooks.h
index ba42b6c..27ad09d 100644
--- a/gcc/hooks.h
+++ b/gcc/hooks.h
@@ -52,9 +52,9 @@ extern bool hook_bool_const_tree_hwi_hwi_const_tree_true (const_tree,
 							  HOST_WIDE_INT,
 							  HOST_WIDE_INT,
 							  const_tree);
-extern bool hook_bool_rtx_true (rtx);
+extern bool hook_bool_rtx_insn_true (rtx_insn *);
 extern bool hook_bool_rtx_false (rtx);
-extern bool hook_bool_rtx_int_false (rtx, int);
+extern bool hook_bool_rtx_insn_int_false (rtx_insn *, int);
 extern bool hook_bool_uintp_uintp_false (unsigned int *, unsigned int *);
 extern bool hook_bool_rtx_int_int_int_intp_bool_false (rtx, int, int, int,
 						       int *, bool);
@@ -67,7 +67,7 @@ extern bool hook_bool_wint_wint_uint_bool_true (const widest_int &,
 
 extern void hook_void_void (void);
 extern void hook_void_constcharptr (const char *);
-extern void hook_void_rtx_int (rtx, int);
+extern void hook_void_rtx_insn_int (rtx_insn *, int);
 extern void hook_void_FILEptr_constcharptr (FILE *, const char *);
 extern bool hook_bool_FILEptr_rtx_false (FILE *, rtx);
 extern void hook_void_tree (tree);
@@ -104,7 +104,7 @@ extern rtx hook_rtx_tree_int_null (tree, int);
 
 extern const char *hook_constcharptr_void_null (void);
 extern const char *hook_constcharptr_const_tree_null (const_tree);
-extern const char *hook_constcharptr_const_rtx_null (const_rtx);
+extern const char *hook_constcharptr_const_rtx_insn_null (const rtx_insn *);
 extern const char *hook_constcharptr_const_tree_const_tree_null (const_tree, const_tree);
 extern const char *hook_constcharptr_int_const_tree_null (int, const_tree);
 extern const char *hook_constcharptr_int_const_tree_const_tree_null (int, const_tree, const_tree);
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index 51008a4..4045086 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -2830,11 +2830,11 @@ sched_analyze_2 (struct deps_desc *deps, rtx x, rtx_insn *insn)
    them apart.  */
 
 static void
-try_group_insn (rtx insn)
+try_group_insn (rtx_insn *insn)
 {
   unsigned int condreg1, condreg2;
   rtx cc_reg_1;
-  rtx prev;
+  rtx_insn *prev;
 
   if (!any_condjump_p (insn))
     return;
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index 2b0eb92..0332751 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -1364,7 +1364,7 @@ extern int try_ready (rtx_insn *);
 extern void sched_extend_ready_list (int);
 extern void sched_finish_ready_list (void);
 extern void sched_change_pattern (rtx, rtx);
-extern int sched_speculate_insn (rtx, ds_t, rtx *);
+extern int sched_speculate_insn (rtx_insn *, ds_t, rtx *);
 extern void unlink_bb_notes (basic_block, basic_block);
 extern void add_block (basic_block, basic_block);
 extern rtx_note *bb_note (basic_block);
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index fdaad36..2898ddd 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -1812,7 +1812,7 @@ create_speculation_check (expr_t c_expr, ds_t check_ds, insn_t orig_insn)
   rtx_insn *insn_rtx;
   insn_t insn;
   basic_block recovery_block;
-  rtx label;
+  rtx_insn *label;
 
   /* Create a recovery block if target is going to emit branchy check, or if
      ORIG_INSN was speculative already.  */
@@ -1825,7 +1825,7 @@ create_speculation_check (expr_t c_expr, ds_t check_ds, insn_t orig_insn)
   else
     {
       recovery_block = NULL;
-      label = NULL_RTX;
+      label = NULL;
     }
 
   /* Get pattern of the check.  */
diff --git a/gcc/target.def b/gcc/target.def
index 594d2d3..7b2a302 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -194,7 +194,7 @@ DEFHOOK
  "This target hook emits assembly directives required to unwind the\n\
 given instruction.  This is only used when @code{TARGET_EXCEPT_UNWIND_INFO}\n\
 returns @code{UI_TARGET}.",
- void, (FILE *stream, rtx insn),
+ void, (FILE *stream, rtx_insn *insn),
  NULL)
 
 DEFHOOKPOD
@@ -810,7 +810,7 @@ elements of the vector which contain meaningful data for this insn.\n\
 The contents of this vector are what was used to convert the insn\n\
 template into assembler code, so you can change the assembler mode\n\
 by checking the contents of the vector.",
- void, (FILE *file, rtx insn, rtx *opvec, int noperands),
+ void, (FILE *file, rtx_insn *insn, rtx *opvec, int noperands),
  NULL)
 
 /* Emit the trampoline template.  This hook may be NULL.  */
@@ -924,7 +924,7 @@ output-dependence is maximum of one and the difference of latency\n\
 times of the first and the second insns.  If these values are not\n\
 acceptable, you could use the hook to modify them too.  See also\n\
 @pxref{Processor pipeline description}.",
- int, (rtx insn, rtx link, rtx dep_insn, int cost), NULL)
+ int, (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost), NULL)
 
 /* Adjust the priority of an insn as you see fit.  Returns the new priority.  */
 DEFHOOK
@@ -934,7 +934,7 @@ DEFHOOK
 execute @var{insn} earlier, reduce the priority to execute @var{insn}\n\
 later.  Do not define this hook if you do not need to adjust the\n\
 scheduling priorities of insns.",
- int, (rtx insn, int priority), NULL)
+ int, (rtx_insn *insn, int priority), NULL)
 
 /* Function which returns the maximum number of insns that can be
    scheduled in the same machine cycle.  This must be constant
@@ -967,7 +967,7 @@ than others, so that fewer insns can follow them in the same cycle.\n\
 debug output to.  @var{verbose} is the verbose level provided by\n\
 @option{-fsched-verbose-@var{n}}.  @var{insn} is the instruction that\n\
 was scheduled.",
- int, (FILE *file, int verbose, rtx insn, int more), NULL)
+ int, (FILE *file, int verbose, rtx_insn *insn, int more), NULL)
 
 /* Initialize machine-dependent scheduling code.  */
 DEFHOOK
@@ -1052,7 +1052,7 @@ DEFHOOK
 target microarchitecture. If this hook returns true for the given insn pair\n\
 (@var{condgen} and @var{condjmp}), scheduler will put them into a sched\n\
 group, and they will not be scheduled apart.",
- bool, (rtx condgen, rtx condjmp), NULL)
+ bool, (rtx_insn *condgen, rtx_insn *condjmp), NULL)
 
 /* The following member value is a pointer to a function called
    after evaluation forward dependencies of insns in chain given
@@ -1105,7 +1105,7 @@ DEFHOOK
  "The hook is analogous to @samp{TARGET_SCHED_DFA_PRE_CYCLE_INSN} but used\n\
 to changed the state as if the insn were scheduled when the new\n\
 simulated processor cycle finishes.",
- rtx, (void), NULL)
+ rtx_insn *, (void), NULL)
 
 /* The values of the following two members are pointers to
    functions used to simplify the automaton descriptions.
@@ -1184,7 +1184,7 @@ instruction at position 0 in the ready list.  @var{ready_index} is passed\n\
 to allow backends make correct judgements.\n\
 \n\
 The default is that any ready insns can be chosen to be issued.",
- int, (rtx insn, int ready_index), NULL)
+ int, (rtx_insn *insn, int ready_index), NULL)
 
 /* This hook prepares the target for a new round of multipass
    scheduling.
@@ -1215,7 +1215,7 @@ scheduling.",
 DEFHOOK
 (first_cycle_multipass_issue,
  "This hook is called when multipass scheduling evaluates instruction INSN.",
- void, (void *data, signed char *ready_try, int n_ready, rtx insn,
+ void, (void *data, signed char *ready_try, int n_ready, rtx_insn *insn,
 	const void *prev_data), NULL)
 
 /* This hook is called when multipass scheduling backtracks from evaluation of
@@ -1290,7 +1290,7 @@ verbosity level to use for debugging output.\n\
 @var{last_clock} and @var{clock} are, respectively, the\n\
 processor cycle on which the previous insn has been issued,\n\
 and the current processor cycle.",
- int, (FILE *dump, int verbose, rtx insn, int last_clock,
+ int, (FILE *dump, int verbose, rtx_insn *insn, int last_clock,
        int clock, int *sort_p),
  NULL)
 
@@ -1330,7 +1330,9 @@ DEFHOOK_UNDOC
  "Given the current cost, @var{cost}, of an insn, @var{insn}, calculate and\
  return a new cost based on its relationship to @var{dep_insn} through the\
  dependence of weakness @var{dw}.  The default is to make no adjustment.",
- int, (rtx insn, int dep_type1, rtx dep_insn, int cost, unsigned int dw), NULL)
+ int, (rtx_insn *insn, int dep_type1, rtx_insn *dep_insn, int cost,
+       unsigned int dw),
+ NULL)
 
 /* The following member value is a pointer to a function called
    by the insn scheduler. This hook is called to notify the backend
@@ -1396,7 +1398,7 @@ pattern.  The hook should return 1, if the instruction has a speculative form,\n
 or @minus{}1, if it doesn't.  @var{request} describes the type of requested\n\
 speculation.  If the return value equals 1 then @var{new_pat} is assigned\n\
 the generated speculative pattern.",
- int, (rtx insn, unsigned int dep_status, rtx *new_pat), NULL)
+ int, (rtx_insn *insn, unsigned int dep_status, rtx *new_pat), NULL)
 
 /* The following member value is a pointer to a function called
    by the insn scheduler.  It should return true if the check instruction
@@ -1425,7 +1427,7 @@ be emitted, or a null pointer, when requested check doesn't branch to\n\
 recovery code (a simple check).  If @var{mutate_p} is nonzero, then\n\
 a pattern for a branchy check corresponding to a simple check denoted by\n\
 @var{insn} should be generated.  In this case @var{label} can't be null.",
- rtx, (rtx insn, rtx label, unsigned int ds), NULL)
+ rtx, (rtx_insn *insn, rtx_insn *label, unsigned int ds), NULL)
 
 /* The following member value is a pointer to a function that provides
    information about the speculation capabilities of the target.
@@ -1441,12 +1443,12 @@ The structure describes speculation types that can be used in the scheduler.",
 DEFHOOK_UNDOC
 (get_insn_spec_ds,
  "Return speculation types of instruction @var{insn}.",
- unsigned int, (rtx insn), NULL)
+ unsigned int, (rtx_insn *insn), NULL)
 
 DEFHOOK_UNDOC
 (get_insn_checked_ds,
  "Return speculation types that are checked for instruction @var{insn}",
- unsigned int, (rtx insn), NULL)
+ unsigned int, (rtx_insn *insn), NULL)
 
 DEFHOOK_UNDOC
 (skip_rtx_p,
@@ -1475,8 +1477,8 @@ DEFHOOK
 (dispatch_do,
 "This hook is called by Haifa Scheduler.  It performs the operation specified\n\
 in its second parameter.",
-void, (rtx insn, int x),
-hook_void_rtx_int)
+void, (rtx_insn *insn, int x),
+hook_void_rtx_insn_int)
 
 /* The following member value is a a function that returns true is
    dispatch schedling is supported in hardware and condition passed
@@ -1485,8 +1487,8 @@ DEFHOOK
 (dispatch,
 "This hook is called by Haifa Scheduler.  It returns true if dispatch scheduling\n\
 is supported in hardware and the condition specified in the parameter is true.",
-bool, (rtx insn, int x),
-hook_bool_rtx_int_false)
+bool, (rtx_insn *insn, int x),
+hook_bool_rtx_insn_int_false)
 
 DEFHOOKPOD
 (exposed_pipeline,
@@ -2363,7 +2365,7 @@ of TLS symbols for various targets.",
 DEFHOOK_UNDOC
 (cannot_copy_insn_p,
  "True if the insn @var{x} cannot be duplicated.",
- bool, (rtx), NULL)
+ bool, (rtx_insn *), NULL)
 
 /* True if X is considered to be commutative.  */
 DEFHOOK
@@ -3549,7 +3551,7 @@ instruction that clobbers these this function should return a string indicating\
 the reason why the doloop could not be applied.\n\
 By default, the RTL loop optimizer does not use a present doloop pattern for\n\
 loops containing function calls or branch on table instructions.",
- const char *, (const_rtx insn),
+ const char *, (const rtx_insn *insn),
  default_invalid_within_doloop)
 
 /* Returns true for a legitimate combined insn.  */
@@ -3558,8 +3560,8 @@ DEFHOOK
 "Take an instruction in @var{insn} and return @code{false} if the instruction\
  is not appropriate as a combination of two or more instructions.  The\
  default is to accept all instructions.",
- bool, (rtx insn),
- hook_bool_rtx_true)
+ bool, (rtx_insn *insn),
+ hook_bool_rtx_insn_true)
 
 DEFHOOK
 (valid_dllimport_attribute_p,
@@ -5372,12 +5374,12 @@ DEFHOOK
 DEFHOOK
 (needed,
  "@var{entity} is an integer specifying a mode-switched entity. If @code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro to return an integer value not larger than the corresponding element in @code{NUM_MODES_FOR_MODE_SWITCHING}, to denote the mode that @var{entity} must be switched into prior to the execution of @var{insn}.",
- int, (int entity, rtx insn), NULL)
+ int, (int entity, rtx_insn *insn), NULL)
 
 DEFHOOK
 (after,
  "@var{entity} is an integer specifying a mode-switched entity.  If this macro is defined, it is evaluated for every @var{insn} during mode switching.  It determines the mode that an insn results in (if different from the incoming mode).",
- int, (int entity, int mode, rtx insn), NULL)
+ int, (int entity, int mode, rtx_insn *insn), NULL)
 
 DEFHOOK
 (entry,
diff --git a/gcc/targhooks.c b/gcc/targhooks.c
index 3df93d3..8640959 100644
--- a/gcc/targhooks.c
+++ b/gcc/targhooks.c
@@ -485,7 +485,7 @@ default_has_ifunc_p (void)
    these cases.  */
 
 const char *
-default_invalid_within_doloop (const_rtx insn)
+default_invalid_within_doloop (const rtx_insn *insn)
 {
   if (CALL_P (insn))
     return "Function call in loop.";
diff --git a/gcc/targhooks.h b/gcc/targhooks.h
index 4be33f8..bbc9a82 100644
--- a/gcc/targhooks.h
+++ b/gcc/targhooks.h
@@ -75,7 +75,7 @@ extern bool default_fixed_point_supported_p (void);
 
 extern bool default_has_ifunc_p (void);
 
-extern const char * default_invalid_within_doloop (const_rtx);
+extern const char * default_invalid_within_doloop (const rtx_insn *);
 
 extern tree default_builtin_vectorized_function (tree, tree, tree);
 
-- 
1.8.5.3

Re: [PATCH 194/236] Use rtx_insn for various target.def hooks

[Jeff Law]

On 08/06/14 11:22, David Malcolm wrote:
> This patch updates params of 22 of the target hooks to pass an rtx_insn *
> rather than an rtx, as appropriate.
>
> Known to compile on:
> alpha
> arc
> arm
> bfin
> c6x
> epiphany
> ia64
> m32c
> m32r
> m68k
> mep
> microblaze
> mips
> pa
> pdp11
> picochip
> rs6000
> s390
> sh
> sparc
> spu
> tilegx
> tilepro
> x86_64
>
> gcc/
> 	* target.def (unwind_emit): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(final_postscan_insn): Likewise.
> 	(adjust_cost): Likewise.
> 	(adjust_priority): Likewise.
> 	(variable_issue): Likewise.
> 	(macro_fusion_pair_p): Likewise.
> 	(dfa_post_cycle_insn): Likewise.
> 	(first_cycle_multipass_dfa_lookahead_guard): Likewise.
> 	(first_cycle_multipass_issue): Likewise.
> 	(dfa_new_cycle): Likewise.
> 	(adjust_cost_2): Likewise for params "insn" and "dep_insn".
> 	(speculate_insn): Likewise for param "insn".
> 	(gen_spec_check): Likewise for params "insn" and "label".
> 	(get_insn_spec_ds): Likewise for param "insn".
> 	(get_insn_checked_ds): Likewise.
> 	(dispatch_do): Likewise.
> 	(dispatch): Likewise.
> 	(cannot_copy_insn_p): Likewise.
> 	(invalid_within_doloop): Likewise.
> 	(legitimate_combined_insn): Likewise.
> 	(needed): Likewise.
> 	(after): Likewise.
>
> 	* doc/tm.texi: Automatically updated to reflect changes to
> 	target.def.
>
> 	* haifa-sched.c (choose_ready): Convert NULL_RTX to NULL when
> 	working with insn.
> 	(schedule_block): Likewise.
> 	(sched_init): Likewise.
> 	(sched_speculate_insn): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(ready_remove_first_dispatch): Convert NULL_RTX to NULL when
> 	working with insn.
> 	* hooks.c (hook_bool_rtx_true): Rename to...
> 	hook_bool_rtx_insn_true): ...this, and strengthen first param from
> 	rtx to rtx_insn *.
> 	(hook_constcharptr_const_rtx_null): Rename to...
> 	(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
> 	first param from const_rtx to const rtx_insn *.
> 	(hook_bool_rtx_int_false): Rename to...
> 	(hook_bool_rtx_insn_int_false): ...this, and strengthen first
> 	param from rtx to rtx_insn *.
> 	(hook_void_rtx_int): Rename to...
> 	(hook_void_rtx_insn_int): ...this, and strengthen first param from
> 	rtx to rtx_insn *.
>
> 	* hooks.h (hook_bool_rtx_true): Rename to...
> 	(hook_bool_rtx_insn_true): ...this, and strengthen first param from
> 	rtx to rtx_insn *.
> 	(hook_bool_rtx_int_false): Rename to...
> 	(hook_bool_rtx_insn_int_false): ...this, and strengthen first
> 	param from rtx to rtx_insn *.
> 	(hook_void_rtx_int): Rename to...
> 	(hook_void_rtx_insn_int): ...this, and strengthen first param from
> 	rtx to rtx_insn *.
> 	(hook_constcharptr_const_rtx_null): Rename to...
> 	(hook_constcharptr_const_rtx_insn_null): ...this, and strengthen
> 	first param from const_rtx to const rtx_insn *.
>
> 	* sched-deps.c (try_group_insn): Strengthen param "insn" and local
> 	"prev" from rtx to rtx_insn *.
>
> 	* sched-int.h (sched_speculate_insn): Strengthen first param from
> 	rtx to rtx_insn *.
>
> 	* sel-sched.c (create_speculation_check): Likewise for local "label".
> 	* targhooks.c (default_invalid_within_doloop): Strengthen param
> 	"insn" from const_rtx to const rtx_insn *.
> 	* targhooks.h (default_invalid_within_doloop): Strengthen param
> 	from const_rtx to const rtx_insn *.
>
> 	* config/alpha/alpha.c (alpha_cannot_copy_insn_p): Likewise.
> 	(alpha_adjust_cost): Likewise for params "insn", "dep_insn".
>
> 	* config/arc/arc.c (arc_sched_adjust_priority): Likewise for param "insn".
> 	(arc_invalid_within_doloop): Likewise, with const.
>
> 	* config/arm/arm.c (arm_adjust_cost): Likewise for params "insn", "dep".
> 	(arm_cannot_copy_insn_p): Likewise for param "insn".
> 	(arm_unwind_emit): Likewise.
>
> 	* config/bfin/bfin.c (bfin_adjust_cost): Likewise for params "insn",
> 	"dep_insn".
>
> 	* config/c6x/c6x.c (c6x_dfa_new_cycle): Likewise for param "insn".
> 	(c6x_variable_issue): Likewise.  Removed now-redundant checked
> 	cast.
> 	(c6x_adjust_cost): Likewise for params "insn", "dep_insn".
>
> 	* config/epiphany/epiphany-protos.h (epiphany_mode_needed):
> 	Likewise for param "insn".
> 	(epiphany_mode_after): Likewise.
> 	* config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise for
> 	params "insn", "dep_insn".
> 	(epiphany_mode_needed): Likewise for param "insn".
> 	(epiphany_mode_after): Likewise.
>
> 	* config/i386/i386-protos.h (i386_pe_seh_unwind_emit): Likewise.
> 	* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
> 	(ix86_avx_u128_mode_needed): Likewise.
> 	(ix86_i387_mode_needed): Likewise.
> 	(ix86_mode_needed): Likewise.
> 	(ix86_avx_u128_mode_after): Likewise.
> 	(ix86_mode_after): Likewise.
> 	(ix86_adjust_cost): Likewise for params "insn", "dep_insn".
> 	(ix86_macro_fusion_pair_p): Likewise for params "condgen", "condjmp".
> 	(ix86_adjust_priority): Likewise for param "insn".
> 	(core2i7_first_cycle_multipass_issue): Likewise for param "insn".
> 	(do_dispatch): Likewise.
> 	(has_dispatch): Likewise.
> 	* config/i386/winnt.c (i386_pe_seh_unwind_emit): Likewise.
>
> 	* config/ia64/ia64.c (TARGET_INVALID_WITHIN_DOLOOP): Update to
> 	reflect renaming of default hook implementation from
> 	hook_constcharptr_const_rtx_null to
> 	hook_constcharptr_const_rtx_insn_null.
> 	(ia64_adjust_cost_2): Strengthen params "insn", "dep_insn" from
> 	rtx to rtx_insn *.
> 	(ia64_variable_issue): Likewise for param "insn".
> 	(ia64_first_cycle_multipass_dfa_lookahead_guard): Likewise.
> 	(ia64_dfa_new_cycle): Likewise.
> 	(ia64_get_insn_spec_ds): Likewise.
> 	(ia64_get_insn_checked_ds): Likewise.
> 	(ia64_speculate_insn): Likewise.
> 	(ia64_gen_spec_check): Likewise for params "insn", "label".
> 	(ia64_asm_unwind_emit): Likewise for param "insn".
>
> 	* config/m32r/m32r.c (m32r_adjust_priority): Likewise.
>
> 	* config/m68k/m68k.c (m68k_sched_adjust_cost): Likewise for params
> 	"insn", "def_insn".
> 	(m68k_sched_variable_issue): Likewise for param "insn".
>
> 	* config/mep/mep.c (mep_adjust_cost): Likewise for params "insn",
> 	"def_insn".
>
> 	* config/microblaze/microblaze.c (microblaze_adjust_cost):
> 	Likewise for params "insn", "dep".
>
> 	* config/mips/mips.c (mips_adjust_cost): Likewise.
> 	(mips_variable_issue): Likewise for param "insn".
> 	(mips_final_postscan_insn): Likewise.
>
> 	* config/mn10300/mn10300.c (mn10300_adjust_sched_cost): Likewise
> 	for params "insn", "dep".  Add checked casts when extracting first
> 	insn from PARALLEL.
>
> 	* config/pa/pa.c (pa_adjust_cost): Likewise for params "insn",
> 	"dep_insn".
> 	(pa_adjust_priority): Likewise for param "insn".
>
> 	* config/picochip/picochip.c (picochip_sched_adjust_cost):
> 	Likewise for params "insn", "dep_insn".
>
> 	* config/rs6000/rs6000.c (rs6000_variable_issue_1): Likewise for
> 	param "insn".
> 	(rs6000_variable_issue): Likewise.
> 	(rs6000_adjust_cost): Likewise for params "insn", "dep_insn".
> 	(rs6000_debug_adjust_cost): Likewise.
> 	(rs6000_adjust_priority): Likewise for param "insn".
> 	(rs6000_use_sched_lookahead_guard): Likewise.
> 	(get_next_active_insn): Likewise for return type and both params.
> 	(redefine_groups): Likewise for params "prev_head_insn", "tail"
> 	and locals "insn", "next_insn".
> 	(pad_groups): Likewise.
>
> 	* config/s390/s390.c (s390_adjust_priority): Likewise for param
> 	"insn".
> 	(s390_cannot_copy_insn_p): Likewise.
> 	(s390_sched_variable_issue): Likewise for third param, eliminating
> 	checked cast.
> 	(TARGET_INVALID_WITHIN_DOLOOP): Update to reflect renaming of
> 	default hook implementation from hook_constcharptr_const_rtx_null
> 	to hook_constcharptr_const_rtx_insn_null.
>
> 	* config/sh/sh.c (sh_cannot_copy_insn_p): Strengthen param "insn"
> 	from rtx to rtx_insn *.
> 	(sh_adjust_cost): Likewise for params "insn", "dep_insn".
> 	(sh_variable_issue): Likewise for param "insn".
> 	(sh_dfa_new_cycle): Likewise.
> 	(sh_mode_needed): Likewise.
> 	(sh_mode_after): Likewise.
>
> 	* config/sparc/sparc.c (supersparc_adjust_cost): Likewise for
> 	params "insn", "dep_insn".
> 	(hypersparc_adjust_cost): Likewise.
> 	(sparc_adjust_cost): Likewise.
>
> 	* config/spu/spu.c (spu_sched_variable_issue): Likewise for third
> 	param, eliminated checked cast.
> 	(spu_sched_adjust_cost): Likewise for first and third params.
>
> 	* config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Strengthen
> 	params "insn" and "dep_insn" from rtx to rtx_insn *.
>
> 	* config/tilepro/tilepro.c (tilepro_sched_adjust_cost): Likewise.
OK.

I'll note that later patches introduce scaffolding around PATTERN and 
other accessors.  That's fine, but I wonder if that's what you intended?

In patch #199, you introduce gen_rtx_INSN_LIST, it's needs a comment 
(unless you're going to remove it later).

#195-203 are OK.

jeff

[PATCH 222/236] Use rtx_insn in more places in dwarf2cfi.c

[David Malcolm]

gcc/
	* dwarf2cfi.c (dw_trace_info): Strengthen field "head" from rtx to
	rtx_insn *.
	(get_trace_info): Likewise for param "insn".
	(save_point_p): Likewise.
	(maybe_record_trace_start): Likewise for both params.
	(maybe_record_trace_start_abnormal): Likewise.
	(create_trace_edges): Likewise for sole param and for three of the
	locals named "lab".  In the two places where "lab" is an
	rtx_expr_list *, update uses of method "element" to the "insn"
	method.
	(scan_trace): Strengthen local "prev", "insn", "control" from rtx
	to rtx_insn *, and update a call to pat->element to pat->insn.
---
 gcc/dwarf2cfi.c | 29 +++++++++++++++--------------
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index 8d69285..ca1c2e3 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -100,7 +100,7 @@ typedef struct GTY(()) reg_saved_in_data_struct {
 typedef struct
 {
   /* The insn that begins the trace.  */
-  rtx head;
+  rtx_insn *head;
 
   /* The row state at the beginning and end of the trace.  */
   dw_cfi_row *beg_row, *end_row;
@@ -303,7 +303,7 @@ expand_builtin_init_dwarf_reg_sizes (tree address)
 
 \f
 static dw_trace_info *
-get_trace_info (rtx insn)
+get_trace_info (rtx_insn *insn)
 {
   dw_trace_info dummy;
   dummy.head = insn;
@@ -311,7 +311,7 @@ get_trace_info (rtx insn)
 }
 
 static bool
-save_point_p (rtx insn)
+save_point_p (rtx_insn *insn)
 {
   /* Labels, except those that are really jump tables.  */
   if (LABEL_P (insn))
@@ -2197,7 +2197,7 @@ add_cfis_to_fde (void)
    trace from CUR_TRACE and CUR_ROW.  */
 
 static void
-maybe_record_trace_start (rtx start, rtx origin)
+maybe_record_trace_start (rtx_insn *start, rtx_insn *origin)
 {
   dw_trace_info *ti;
   HOST_WIDE_INT args_size;
@@ -2248,7 +2248,7 @@ maybe_record_trace_start (rtx start, rtx origin)
    and non-local goto edges.  */
 
 static void
-maybe_record_trace_start_abnormal (rtx start, rtx origin)
+maybe_record_trace_start_abnormal (rtx_insn *start, rtx_insn *origin)
 {
   HOST_WIDE_INT save_args_size, delta;
   dw_cfa_location save_cfa;
@@ -2284,7 +2284,7 @@ maybe_record_trace_start_abnormal (rtx start, rtx origin)
 /* ??? Sadly, this is in large part a duplicate of make_edges.  */
 
 static void
-create_trace_edges (rtx insn)
+create_trace_edges (rtx_insn *insn)
 {
   rtx tmp;
   int i, n;
@@ -2303,14 +2303,14 @@ create_trace_edges (rtx insn)
 	  n = GET_NUM_ELEM (vec);
 	  for (i = 0; i < n; ++i)
 	    {
-	      rtx lab = XEXP (RTVEC_ELT (vec, i), 0);
+	      rtx_insn *lab = as_a <rtx_insn *> (XEXP (RTVEC_ELT (vec, i), 0));
 	      maybe_record_trace_start (lab, insn);
 	    }
 	}
       else if (computed_jump_p (insn))
 	{
 	  for (rtx_expr_list *lab = forced_labels; lab; lab = lab->next ())
-	    maybe_record_trace_start (lab->element (), insn);
+	    maybe_record_trace_start (lab->insn (), insn);
 	}
       else if (returnjump_p (insn))
 	;
@@ -2319,13 +2319,14 @@ create_trace_edges (rtx insn)
 	  n = ASM_OPERANDS_LABEL_LENGTH (tmp);
 	  for (i = 0; i < n; ++i)
 	    {
-	      rtx lab = XEXP (ASM_OPERANDS_LABEL (tmp, i), 0);
+	      rtx_insn *lab =
+		as_a <rtx_insn *> (XEXP (ASM_OPERANDS_LABEL (tmp, i), 0));
 	      maybe_record_trace_start (lab, insn);
 	    }
 	}
       else
 	{
-	  rtx lab = JUMP_LABEL (insn);
+	  rtx_insn *lab = JUMP_LABEL_AS_INSN (insn);
 	  gcc_assert (lab != NULL);
 	  maybe_record_trace_start (lab, insn);
 	}
@@ -2341,7 +2342,7 @@ create_trace_edges (rtx insn)
 	for (rtx_expr_list *lab = nonlocal_goto_handler_labels;
 	     lab;
 	     lab = lab->next ())
-	  maybe_record_trace_start_abnormal (lab->element (), insn);
+	  maybe_record_trace_start_abnormal (lab->insn (), insn);
     }
   else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
     {
@@ -2376,7 +2377,7 @@ scan_insn_after (rtx insn)
 static void
 scan_trace (dw_trace_info *trace)
 {
-  rtx prev, insn = trace->head;
+  rtx_insn *prev, *insn = trace->head;
   dw_cfa_location this_cfa;
 
   if (dump_file)
@@ -2397,7 +2398,7 @@ scan_trace (dw_trace_info *trace)
        insn;
        prev = insn, insn = NEXT_INSN (insn))
     {
-      rtx control;
+      rtx_insn *control;
 
       /* Do everything that happens "before" the insn.  */
       add_cfi_insn = prev;
@@ -2427,7 +2428,7 @@ scan_trace (dw_trace_info *trace)
 	  rtx elt;
 	  int i, n = pat->len ();
 
-	  control = pat->element (0);
+	  control = pat->insn (0);
 	  if (can_throw_internal (control))
 	    notice_eh_throw (control);
 	  dwarf2out_flush_queued_reg_saves ();
-- 
1.8.5.3

Re: [PATCH 222/236] Use rtx_insn in more places in dwarf2cfi.c

[Richard Henderson]

On 08/06/2014 10:23 AM, David Malcolm wrote:
>        else if (computed_jump_p (insn))
>  	{
>  	  for (rtx_expr_list *lab = forced_labels; lab; lab = lab->next ())
> -	    maybe_record_trace_start (lab->element (), insn);
> +	    maybe_record_trace_start (lab->insn (), insn);
>  	}

I guess this is where #221 comes in.  Are there any other uses?


r~

Re: [PATCH 222/236] Use rtx_insn in more places in dwarf2cfi.c

[David Malcolm]

On Tue, 2014-08-19 at 13:56 -0700, Richard Henderson wrote:
> On 08/06/2014 10:23 AM, David Malcolm wrote:
> >        else if (computed_jump_p (insn))
> >  	{
> >  	  for (rtx_expr_list *lab = forced_labels; lab; lab = lab->next ())
> > -	    maybe_record_trace_start (lab->element (), insn);
> > +	    maybe_record_trace_start (lab->insn (), insn);
> >  	}
> 
> I guess this is where #221 comes in.  Are there any other uses?

Some quick testing suggests that this is the only place, hence the fix
would seem to be to make forced_labels be an INSN_LIST rather than an
EXPR_LIST, and drop the insn method from rtx_expr_list.  I'll work on an
updated version of #222 that does this.

Thanks
Dave

[PATCH 205/236] function.c: Use rtx_sequence

[David Malcolm]

gcc/
	* function.c (contains): Introduce local "seq" for PATTERN (insn),
	with a checked cast, in the region for where we know it's a
	SEQUENCE.  Use methods of rtx_sequence.
---
 gcc/function.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/gcc/function.c b/gcc/function.c
index 771ced9..5561dc5 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -5305,9 +5305,10 @@ contains (const_rtx insn, htab_t hash)
 
   if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
     {
+      rtx_sequence *seq = as_a <rtx_sequence *> (PATTERN (insn));
       int i;
-      for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
-	if (htab_find (hash, XVECEXP (PATTERN (insn), 0, i)))
+      for (i = seq->len () - 1; i >= 0; i--)
+	if (htab_find (hash, seq->element (i)))
 	  return true;
       return false;
     }
-- 
1.8.5.3

Re: [PATCH 205/236] function.c: Use rtx_sequence

[Jeff Law]

On 08/06/14 11:23, David Malcolm wrote:
> gcc/
> 	* function.c (contains): Introduce local "seq" for PATTERN (insn),
> 	with a checked cast, in the region for where we know it's a
> 	SEQUENCE.  Use methods of rtx_sequence.
OK.  As is #206.

Jeff

[PATCH 213/236] rtl_data.x_nonlocal_goto_handler_labels becomes an rtx_expr_list

[David Malcolm]

gcc/
	* function.h (struct rtl_data): Strengthen field
	x_nonlocal_goto_handler_labels from rtx to rtx_expr_list *.
	* rtl.h (remove_node_from_expr_list): Strengthen second param from
	rtx * to rtx_expr_list **.

	* cfgbuild.c (make_edges): In loop over
	nonlocal_goto_handler_labels, strengthen local "x" from rtx to
	rtx_expr_list *, and use methods of the latter class to clarify
	the code.
	* cfgrtl.c (cfg_layout_initialize): Strengthen local "x" from rtx to
	rtx_expr_list *, and use methods of the latter class to clarify
	the code.
	* dwarf2cfi.c (create_trace_edges): Likewise for local "lab".
	* reload1.c (set_initial_label_offsets): Likewise for local "x".
	* rtlanal.c (remove_node_from_expr_list): Strengthen param "listp"
	from rtx * to rtx_expr_list **.  Strengthen local "temp" from rtx
	to rtx_expr_list *.  Use methods of the latter class to clarify
	the code.
---
 gcc/cfgbuild.c  |  6 ++++--
 gcc/cfgrtl.c    |  6 +++---
 gcc/dwarf2cfi.c |  6 ++++--
 gcc/function.h  |  2 +-
 gcc/reload1.c   |  6 +++---
 gcc/rtl.h       |  2 +-
 gcc/rtlanal.c   | 12 ++++++------
 7 files changed, 22 insertions(+), 18 deletions(-)

diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index 05adac0..082f070 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -337,8 +337,10 @@ make_edges (basic_block min, basic_block max, int update_p)
 		     taken, then only calls to those functions or to other
 		     nested functions that use them could possibly do
 		     nonlocal gotos.  */
-		  for (rtx x = nonlocal_goto_handler_labels; x; x = XEXP (x, 1))
-		    make_label_edge (edge_cache, bb, XEXP (x, 0),
+		  for (rtx_expr_list *x = nonlocal_goto_handler_labels;
+		       x;
+		       x = x->next ())
+		    make_label_edge (edge_cache, bb, x->element (),
 				     EDGE_ABNORMAL | EDGE_ABNORMAL_CALL);
 		}
 
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 0b385a1..59d633d 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -4219,7 +4219,7 @@ cfg_layout_duplicate_bb (basic_block bb)
 void
 cfg_layout_initialize (unsigned int flags)
 {
-  rtx x;
+  rtx_expr_list *x;
   basic_block bb;
 
   /* Once bb partitioning is complete, cfg layout mode should not be
@@ -4238,9 +4238,9 @@ cfg_layout_initialize (unsigned int flags)
   record_effective_endpoints ();
 
   /* Make sure that the targets of non local gotos are marked.  */
-  for (x = nonlocal_goto_handler_labels; x; x = XEXP (x, 1))
+  for (x = nonlocal_goto_handler_labels; x; x = x->next ())
     {
-      bb = BLOCK_FOR_INSN (XEXP (x, 0));
+      bb = BLOCK_FOR_INSN (x->element ());
       bb->flags |= BB_NON_LOCAL_GOTO_TARGET;
     }
 
diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index b5ea683..8d69285 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -2338,8 +2338,10 @@ create_trace_edges (rtx insn)
 
       /* Process non-local goto edges.  */
       if (can_nonlocal_goto (insn))
-	for (rtx lab = nonlocal_goto_handler_labels; lab; lab = XEXP (lab, 1))
-	  maybe_record_trace_start_abnormal (XEXP (lab, 0), insn);
+	for (rtx_expr_list *lab = nonlocal_goto_handler_labels;
+	     lab;
+	     lab = lab->next ())
+	  maybe_record_trace_start_abnormal (lab->element (), insn);
     }
   else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
     {
diff --git a/gcc/function.h b/gcc/function.h
index ba7597c..a176e0a 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -266,7 +266,7 @@ struct GTY(()) rtl_data {
 
   /* List (chain of EXPR_LIST) of labels heading the current handlers for
      nonlocal gotos.  */
-  rtx x_nonlocal_goto_handler_labels;
+  rtx_expr_list *x_nonlocal_goto_handler_labels;
 
   /* Label that will go on function epilogue.
      Jumping to this label serves as a "return" instruction
diff --git a/gcc/reload1.c b/gcc/reload1.c
index c669043..44d424f 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -3928,9 +3928,9 @@ set_initial_label_offsets (void)
     if (x->element ())
       set_label_offsets (x->element (), NULL, 1);
 
-  for (rtx x = nonlocal_goto_handler_labels; x; x = XEXP (x, 1))
-    if (XEXP (x, 0))
-      set_label_offsets (XEXP (x, 0), NULL, 1);
+  for (rtx_expr_list *x = nonlocal_goto_handler_labels; x; x = x->next ())
+    if (x->element ())
+      set_label_offsets (x->element (), NULL, 1);
 
   for_each_eh_label (set_initial_eh_label_offset);
 }
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 6fe89ec..afdc466 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2804,7 +2804,7 @@ extern unsigned hash_rtx_cb (const_rtx, enum machine_mode, int *, int *,
 extern rtx regno_use_in (unsigned int, rtx);
 extern int auto_inc_p (const_rtx);
 extern int in_expr_list_p (const_rtx, const_rtx);
-extern void remove_node_from_expr_list (const_rtx, rtx *);
+extern void remove_node_from_expr_list (const_rtx, rtx_expr_list **);
 extern int loc_mentioned_in_p (rtx *, const_rtx);
 extern rtx_insn *find_first_parameter_load (rtx, rtx);
 extern bool keep_with_call_p (const_rtx);
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index bbec8fe..46a5fc1 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -2134,26 +2134,26 @@ in_expr_list_p (const_rtx listp, const_rtx node)
    A simple equality test is used to determine if NODE matches.  */
 
 void
-remove_node_from_expr_list (const_rtx node, rtx *listp)
+remove_node_from_expr_list (const_rtx node, rtx_expr_list **listp)
 {
-  rtx temp = *listp;
+  rtx_expr_list *temp = *listp;
   rtx prev = NULL_RTX;
 
   while (temp)
     {
-      if (node == XEXP (temp, 0))
+      if (node == temp->element ())
 	{
 	  /* Splice the node out of the list.  */
 	  if (prev)
-	    XEXP (prev, 1) = XEXP (temp, 1);
+	    XEXP (prev, 1) = temp->next ();
 	  else
-	    *listp = XEXP (temp, 1);
+	    *listp = temp->next ();
 
 	  return;
 	}
 
       prev = temp;
-      temp = XEXP (temp, 1);
+      temp = temp->next ();
     }
 }
 \f
-- 
1.8.5.3

[PATCH 185/236] Use rtx_insn in more places in fwprop.c

[David Malcolm]

gcc/
	* fwprop.c (local_ref_killed_between_p): Strengthen params "from",
	"to" and local "insn" from rtx to rtx_insn *.
---
 gcc/fwprop.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/fwprop.c b/gcc/fwprop.c
index 9a1f085..c3258d9 100644
--- a/gcc/fwprop.c
+++ b/gcc/fwprop.c
@@ -694,9 +694,9 @@ propagate_rtx (rtx x, enum machine_mode mode, rtx old_rtx, rtx new_rtx,
    between FROM to (but not including) TO.  */
 
 static bool
-local_ref_killed_between_p (df_ref ref, rtx from, rtx to)
+local_ref_killed_between_p (df_ref ref, rtx_insn *from, rtx_insn *to)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = from; insn != to; insn = NEXT_INSN (insn))
     {
-- 
1.8.5.3

[PATCH 220/236] Strengthen return_label and naked_return_label to rtx_code_label *

[David Malcolm]

gcc/
	* function.h (struct rtl_data): Strengthen fields "x_return_label"
	and "x_naked_return_label" from rtx to rtx_code_label *.
---
 gcc/function.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/function.h b/gcc/function.h
index 1f8da7a..c2e0366 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -271,12 +271,12 @@ struct GTY(()) rtl_data {
   /* Label that will go on function epilogue.
      Jumping to this label serves as a "return" instruction
      on machines which require execution of the epilogue on all returns.  */
-  rtx x_return_label;
+  rtx_code_label *x_return_label;
 
   /* Label that will go on the end of function epilogue.
      Jumping to this label serves as a "naked return" instruction
      on machines which require execution of the epilogue on all returns.  */
-  rtx x_naked_return_label;
+  rtx_code_label *x_naked_return_label;
 
   /* List (chain of EXPR_LISTs) of all stack slots in this function.
      Made for the sake of unshare_all_rtl.  */
-- 
1.8.5.3

Re: [PATCH 220/236] Strengthen return_label and naked_return_label to rtx_code_label *

[Richard Henderson]

On 08/06/2014 10:23 AM, David Malcolm wrote:
> gcc/
> 	* function.h (struct rtl_data): Strengthen fields "x_return_label"
> 	and "x_naked_return_label" from rtx to rtx_code_label *.
> ---
>  gcc/function.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

#207 - #220 are all OK.


r~

[PATCH 233/236] dfa_clear_single_insn_cache takes an rtx_insn

[David Malcolm]

The callsite using dfa_clear_single_insn_cache in haifa-sched.c is now
passing in an rtx_insn *.

gcc/
	* genattr.c (main): When writing out insn-attr.h, strengthen param
	of dfa_clear_single_insn_cache from rtx to rtx_insn *.
	* genautomata.c (output_dfa_clean_insn_cache_func): Likewise when
	writing out the definition of dfa_clear_single_insn_cache to the
	generated insn-automata.c
---
 gcc/genattr.c     | 2 +-
 gcc/genautomata.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/genattr.c b/gcc/genattr.c
index 44c9863..5845dbb 100644
--- a/gcc/genattr.c
+++ b/gcc/genattr.c
@@ -321,7 +321,7 @@ main (int argc, char **argv)
       printf ("   define_insn_reservation will be changed after\n");
       printf ("   last call of dfa_start.  */\n");
       printf ("extern void dfa_clean_insn_cache (void);\n\n");
-      printf ("extern void dfa_clear_single_insn_cache (rtx);\n\n");
+      printf ("extern void dfa_clear_single_insn_cache (rtx_insn *);\n\n");
       printf ("/* Initiate and finish work with DFA.  They should be\n");
       printf ("   called as the first and the last interface\n");
       printf ("   functions.  */\n");
diff --git a/gcc/genautomata.c b/gcc/genautomata.c
index 3017e20..bcee27d 100644
--- a/gcc/genautomata.c
+++ b/gcc/genautomata.c
@@ -8731,7 +8731,7 @@ output_dfa_clean_insn_cache_func (void)
 	   DFA_INSN_CODES_VARIABLE_NAME, I_VARIABLE_NAME);
 
   fprintf (output_file,
-           "void\n%s (rtx %s)\n{\n  int %s;\n\n",
+           "void\n%s (rtx_insn *%s)\n{\n  int %s;\n\n",
            DFA_CLEAR_SINGLE_INSN_CACHE_FUNC_NAME, INSN_PARAMETER_NAME,
 	   I_VARIABLE_NAME);
   fprintf (output_file,
-- 
1.8.5.3

[PATCH 229/236] NEXT_INSN and PREV_INSN take a const rtx_insn

[David Malcolm]

This patch updates NEXT_INSN and PREV_INSN to work on rtx_insn *, rather
than plain rtx - plus miscellaneous fixes needed to get there.

gcc/
	* rtl.h (RTX_PREV): Added checked casts to uses of PREV_INSN and
	NEXT_INSN.
	(PREV_INSN): Strengthen param from const_rtx to const rtx_insn *.
	(NEXT_INSN): Likewise.
	(JUMP_LABEL_AS_INSN): Add a "const" modifier to param.
	(reg_used_between_p): Strengthen params 2 and 3 from const_rtx to
	const rtx_insn *.
	(no_labels_between_p): Likewise for both params.

	* config/aarch64/aarch64.c (aarch64_output_casesi): Add a checked
	cast when using NEXT_INSN on operands[2].
	* config/alpha/alpha.c (alpha_set_memflags): Strengthen local
	"insn" from rtx to rtx_insn *, adding a checked cast.
	(alpha_handle_trap_shadows): Strengthen locals "i", "n" from rtx to
	rtx_insn *.
	* config/arc/arc-protos.h (arc_ccfsm_record_condition): Likewise
	for third param.
	(arc_text_label): Likewise for param "insn".
	* config/arc/arc.c (arc_expand_epilogue): Likewise for local
	"insn".
	(arc_ccfsm_record_condition): Likewise for param "jump".
	(arc_text_label): Likewise for local "label".
	* config/arc/arc.md (doloop_begin_i): Likewise for local "scan".
	Introduce a local "seq" via a dyn_cast to rtx_sequence *, and use
	a method for typesafety.  Add a checked cast.
	* config/arc/constraints.md (Clb): Add a checked cast when getting
	the CODE_LABEL from a LABEL_REF.
	* config/arm/arm.c (require_pic_register): Strengthen locals
	"seq", "insn" from rtx to rtx_insn *.
	(create_fix_barrier): Likewise for locals "selected", "next".
	(thumb1_reorg): Likewise for locals "prev", "insn".
	(arm_expand_prologue): Likewise for local "last".
	(thumb1_output_casesi): Add a checked cast when using NEXT_INSN on
	operands[0].
	(thumb2_output_casesi): Likewise for operands[2].
	* config/avr/avr-log.c (avr_log_vadump): Within 'L' case,
	strengthen local "insn" from rtx to rtx_insn *.
	* config/bfin/bfin.c (find_next_insn_start): Likewise for return
	type and param "insn".
	(find_prev_insn_start): Likewise.
	(hwloop_optimize): Likewise for locals "insn", "last_insn",
	"prev".
	(gen_one_bundle): Likewise for loal "t".
	(find_load): Likewise for param "insn".
	(workaround_speculation): Likewise for locals "insn", "next",
	"target", "next_tgt".
	* config/c6x/c6x.c (assign_reservations): Likewise for both params
	and for locals "insn", "within", "last".
	(count_unit_reqs): Likewise for params "head", "tail" and local
	"insn".
	(try_rename_operands): Likewise for params "head", "tail".
	(reshuffle_units): Likewise for locals "head", "tail", "insn".
	(struct c6x_sched_context): Likewise for fields
	"last_scheduled_insn", "last_scheduled_iter0".
	(init_sched_state): Replace NULL_RTX with NULL.
	(reorg_split_calls): Strengthen local "new_cycle_first" from rtx
	to rtx_insn *.
	(undo_split_delayed_nonbranch): Likewise for param and for local
	"prev".
	(conditionalize_after_sched): Likewise for local "insn".
	(bb_earliest_end_cycle): Likewise.
	(filter_insns_above): Likewise for locals "insn", "next".
	(hwloop_optimize): Remove redundant checked cast.
	(hwloop_fail): Strengthen local "t" from rtx to rtx_insn *.
	* config/cris/cris.c (cris_initial_frame_pointer_offset): Replace
	NULL_RTX with NULL.
	(cris_simple_epilogue): Likewise.
	(cris_expand_prologue): Likewise.
	(cris_expand_epilogue): Likewise.
	* config/frv/frv.c (frv_function_contains_far_jump): Strengthen
	local "insn" from rtx to rtx_insn *.
	(frv_ifcvt_modify_tests): Likewise for locals "last_insn", "insn".
	(struct frv_packet_group): Likewise for the elements within array
	fields "insns", "sorted", and for field "nop".
	(frv_packet): Likewise for the elements within array field
	"insns".
	(frv_add_insn_to_packet): Likewise for param "insn".
	(frv_insert_nop_in_packet): Likewise for param "insn" and local
	"last".
	(frv_for_each_packet): Likewise for locals "insn", "next_insn".
	(frv_sort_insn_group_1): Likewise for local "insn".
	(frv_optimize_membar_local): Likewise.
	(frv_align_label): Likewise for locals "x", "last", "barrier",
	"label".
	* config/ia64/ia64.c (last_scheduled_insn): Likewise for this
	local.
	(ia64_sched_init): Likewise for local "insn".
	(scheduled_good_insn): Likewise for param "last".
	(struct _ia64_sched_context): Likewise for field
	"last_scheduled_insn".
	(ia64_init_sched_context): Replace NULL_RTX with NULL.
	(struct bundle_state): Likewise for field "insn".
	(issue_nops_and_insn): Likewise for param "insn".
	(get_next_important_insn): Likewise for return type and both
	params.
	(ia64_add_bundle_selector_before): Likewise for param "insn".
	(bundling): Likewise for params "prev_head_insn", "tail" and
	locals "insn", "next_insn", "b".  Eliminate top-level local rtx
	"nop" in favor of new locals rtx "nop_pat" and rtx_insn *nop;
	* config/iq2000/iq2000-protos.h (iq2000_fill_delay_slot):
	Strengthen final param from rtx to rtx_insn *.
	(iq2000_move_1word): Likewise for second param.
	* config/iq2000/iq2000.c (iq2000_fill_delay_slot): Likewise for
	param "cur_insn" and local "next_insn".
	(iq2000_move_1word): Likewise for param "insn".
	* config/iq2000/iq2000.md (insn before ADDR_DIFF_VEC): Add checked
	casts when using NEXT_INSN on operands[1].
	* config/m32c/m32c.c (m32c_function_needs_enter): Strengthen local
	"insn" from rtx to rtx_insn *.
	* config/m68k/m68k.c (m68k_jump_table_ref_p): Split out uses of
	"x", introducing local rtx_insn * "insn" for when working with the
	CODE_LABEL of the LABEL_REF.
	(m68k_sched_md_init_global): Strengthen local "insn" from rtx to
	rtx_insn *.
	* config/mcore/mcore-protos.h (mcore_is_dead): Likewise for first
	param.
	* config/mcore/mcore.c (emit_new_cond_insn): Likewise for return
	type.
	(conditionalize_block): Likewise for return type and param.
	(mcore_is_dead): Likewise for param "first" and local "insn".
	(emit_new_cond_insn): Likewise for return type.
	(conditionalize_block): Likewise for return type, param, and
	locals "insn", "blk_1_br", "end_blk_2_insn", "start_blk_3_lab",
	"newinsn".
	(conditionalize_optimization): Likewise for local "insn".
	* config/mep/mep.c (mep_jmp_return_reorg): Add checked cast when
	using NEXT_INSN.
	* config/microblaze/microblaze.md: Add checked casts when using
	NEXT_INSN.
	* config/mips/mips.c (mips_expand_prologue): Eliminate top-level
	rtx "insn" in favor of various more tightly-scoped rtx "insn" and
	and rtx_insn * "insn".
	* config/mips/mips.md (casesi_internal_mips16_<mode>): Add a
	checked cast when using NEXT_INSN on operands[2].
	* config/mn10300/mn10300.c (mn10300_insert_setlb_lcc): Strengthen
	local "insn" from rtx to rtx_insn *.
	* config/nds32/nds32.c (nds32_fp_as_gp_check_available): Likewise.
	(nds32_output_casesi_pc_relative): Add a checked cast when using
	NEXT_INSN on operands[1].
	* config/pa/pa-protos.h (pa_following_call): Strengthen param from
	rtx to rtx_insn *.
	(pa_output_cbranch): Likewise for final param.
	(pa_output_lbranch): Likewise for second param.
	(pa_output_bb): Likewise for third param.
	(pa_output_bvb): Likewise.
	(pa_output_dbra): Likewise for second param.
	(pa_output_movb): Likewise.
	(pa_output_parallel_movb): Likewise.
	(pa_output_parallel_addb): Likewise.
	(pa_output_millicode_call): Likewise for first param.
	(pa_output_mul_insn): Likewise for second param.
	(pa_output_div_insn): Likewise for third param.
	(pa_output_mod_insn): Likewise for second param.
	(pa_jump_in_call_delay): Likewise for param.
	* config/pa/pa.c (pa_output_mul_insn): Likewise for param "insn".
	(pa_output_div_insn): Likewise.
	(pa_output_mod_insn): Likewise.
	(pa_output_cbranch): Likewise.
	(pa_output_lbranch): Likewise.
	(pa_output_bb): Likewise.
	(pa_output_bvb): Likewise.
	(pa_output_dbra): Likewise.
	(pa_output_movb): Likewise.
	(pa_output_millicode_call): Likewise; use method of rtx_sequence *
	to simplify and for typesafety.
	(pa_output_call): Use method of rtx_sequence *.
	(forward_branch_p): Strengthen param "insn" from rtx to rtx_insn *.
	(pa_jump_in_call_delay): Likewise.
	(pa_output_parallel_movb): Likewise.
	(pa_output_parallel_addb): Likewise.
	(pa_following_call): Likewise.
	(pa_reorg): Likewise for local "insn".
	(pa_combine_instructions): Likewise for locals "anchor",
	"floater".
	(pa_can_combine_p): Likewise for params "anchor", "floater" and
	locals "start", "end".
	* config/picochip/picochip.c (picochip_reset_vliw): Likewise for
	param "insn" and local "local_insn".
	(picochip_final_prescan_insn): Likewise for local "local_insn".
	* config/rs6000/rs6000.c (compute_save_world_info): Likewise for
	local "insn".
	(uses_TOC): Likewise.
	* config/s390/s390.c (get_some_local_dynamic_name): Likewise.
	(s390_mainpool_finish): Eliminate top-level local rtx "insn",
	splitting out to more tightly-scoped locals, 3 as rtx and one as
	rtx_insn *.
	(s390_optimize_nonescaping_tx): Strengthen local "tmp" from rtx
	to rtx_insn *.
	(s390_emit_prologue): Introduce a local "insn" to be an rtx_insn *
	where needed.
	* config/sh/sh-protos.h (barrier_align): Strenghten param from rtx
	to rtx_insn *.
	(fixup_addr_diff_vecs): Likewise.
	(reg_unused_after): Likewise for param 2.
	(sh_can_redirect_branch): Likewise for both params.
	(check_use_sfunc_addr): Likewise for param 1.
	* config/sh/sh.c (fixup_mova): Likewise for local "worker".
	(find_barrier): Likewise for local "last_got".
	(gen_block_redirect): Likewise for return type, param "jump" and
	locals "prev", "scan", "next", "insn".
	(struct far_branch): Likewise for fields "near_label",
	"insert_place", "far_label".
	(gen_far_branch): Likewise for local "jump".
	(fixup_addr_diff_vecs): Likewise for param "first" and locals
	"insn", "prev".
	(barrier_align): Likewise for param and for locals "prev", "x".
	Introduce local rtx_sequence * "prev_seq" and use insn method for
	typesafety and clarity.
	(sh_reorg): Strengthen local "scan" from rtx to rtx_insn *.
	(get_dest_uid): Likewise for local "dest".
	(split_branches): Likewise for locals "next", "beyond", "label",
	"block", "far_label".  Add checked casts when assigning to
	bp->far_label and "far_label".
	(reg_unused_after): Strengthen param "scan" from rtx to rtx_insn *.
	(sequence_insn_p): Likewise.
	(mark_constant_pool_use): Likewise for locals "insn", "lab".  Add a
	more loop-scoped rtx "insn" when walking LABEL_REFS.
	(sh_can_redirect_branch): Strengthen both params from rtx to
	rtx_insn *.
	(check_use_sfunc_addr): Likewise for param "insn".  Introduce a
	new local rtx_sequence * "seq" via a dyn_cast, and use a method
	for clarity and typesafety.
	* config/sh/sh.md (define_expand "epilogue"): Strengthen local
	"insn" from rtx to rtx_insn *.
	(define_insn "casesi_worker_1"): Add a checked cast to rtx_insn *
	when using NEXT_INSN on the CODE_LABEL in operands[2].
	(define_insn "casesi_worker_2"): Likewise.
	(define_insn "casesi_shift_media"): Likewise.
	(define_insn "casesi_load_media"): Likewise for the CODE_LABEL in
	operands[3].
	* config/sh/sh_optimize_sett_clrt.cc (struct ccreg_value):
	Strengthen field "insn" from rtx to rtx_insn *.
	(sh_optimize_sett_clrt::execute): Likewise for locals "next_i", "i".
	(sh_optimize_sett_clrt::find_last_ccreg_values): Likewise for
	param "start_insn" and local "start_insn".
	* config/sh/sh_treg_combine.cc (struct set_of_reg): Likewise for
	field "insn".
	(find_set_of_reg_bb): Likewise for param "insn".
	(trace_reg_uses_1): Likewise for param "start_insn" and local "i".
	(trace_reg_uses): Likewise for param "start_insn".
	(sh_treg_combine::cbranch_trace): Likewise for field
	"cbranch_insn".
	(sh_treg_combine::cbranch_trace::cbranch_trace): Likewise for
	param "insn".
	(sh_treg_combine::record_set_of_reg): Likewise for param
	"start_insn" and local "i".
	(sh_treg_combine::can_remove_cstore): Likewise for local
	"prev_insn".
	(sh_treg_combine::try_optimize_cbranch): Likewise for param
	"insn".
	(sh_treg_combine::execute): Likewise for local "i".
	* config/sparc/sparc-protos.h (empty_delay_slot): Likewise for
	param.
	(sparc_check_64): Likewise for second param.
	* config/sparc/sparc.c (sparc_do_work_around_errata): Likewise for
	locals "insn", "next".  Introduce local rtx_sequence * "seq" via a
	dyn_cast, using its insn method for typesafety and clarity.
	(empty_delay_slot): Strengthen param "insn" from rtx to
	rtx_insn *.
	(set_extends): Likewise.
	(sparc_check_64): Likewise.
	* config/spu/spu.md (define_expand "smulsi3_highpart"): Likewise
	for local "insn".
	(define_expand "umulsi3_highpart"): Likewise.
	* config/stormy16/stormy16.c (xstormy16_split_cbranch): Likewise
	for locals "seq", "last_insn".
	(combine_bnp): Likewise for param "insn".
	(xstormy16_reorg): Likewise for local "insn".
	* config/v850/v850.c (substitute_ep_register): Likewise for params
	"first_insn", "last_insn" and local "insn".
	(v850_reorg): Likewise for fields "first_insn", "last_insn" within
	elements of "regs" array, and local "insn".
	* final.c (final_sequence): Strengthen this global from rtx to
	rtx_sequence *.
	(shorten_branches): Strenthen locals "rel_lab", "prev" from rtx to
	rtx_insn *.
	(final_scan_insn): Update assignment to "final_sequence" to be
	from "seq", the cast version of "body", for type-safety.
	* function.c (assign_parm_setup_reg): Strengthen locals "insn",
	"insns" from rtx to rtx_insn *.
	(thread_prologue_and_epilogue_insns): Likewise for local "seq".
	* genattr.c (main): When writing out generated insn-attr.h,
	strengthen params 1 and 3 of eligible_for_delay,
	eligible_for_annul_true, eligible_for_annul_false from rtx to
	rtx_insn *.
	* genattrtab.c (write_eligible_delay): Likewise when writing out
	generated insn-attrtab.c; also local "insn" the generated
	functions.
	* hw-doloop.c (discover_loops): Strengthen local "insn" from rtx
	to rtx_insn *.
	* hw-doloop.h (struct GTY hwloop_info_d): Strengthen field
	"start_label" from rtx to rtx_insn *.
	* ira.c (decrease_live_ranges_number): Likewise for local "p".
	(ira_update_equiv_info_by_shuffle_insn): Likewise for param
	"insns" and local "insn".
	(validate_equiv_mem): Likewise for param "start" and local "insn".
	(memref_used_between_p): Likewise for params "start", "end" and
	local "insn".
	* ira.h (ira_update_equiv_info_by_shuffle_insn): Likewise for
	final param.
	* loop-doloop.c (doloop_optimize): Within region guarded by
	INSN_P (doloop_pat), introduce a new local rtx_insn *
	"doloop_insn" via a checked cast, and use it for typesafety,
	eventually writing the value back into doloop_pat.
	* output.h (final_sequence): Strengthen this global from rtx to
	rtx_sequence *.
	* recog.c (peep2_attempt): Rename param "insn" to "uncast_insn",
	reintroducing "insn" as an rtx_insn * via a checked cast.
	Strengthen param "attempt" and local "new_insn"from rtx to
	rtx_insn *.
	(peephole2_optimize): Strengthen locals "insn", "attempt" from rtx
	to rtx_insn *.
	* reload1.c (reload_as_needed): Eliminate top-level locals "x" and
	"p" in favor of more tightly-scoped replacements, sometimes rtx
	and sometimes rtx_insn *, as appropriate.
	(delete_output_reload): Eliminate top-level rtx "i1", splitting
	into two loop-scoped locals, one an rtx, the other an rtx_insn *.
	* reorg.c (delete_scheduled_jump): Add checked cast.  Strengthen
	local "trial" from rtx to rtx_insn *.
	(redirect_with_delay_slots_safe_p): Strengthen param "jump" from
	rtx to rtx_insn *.  Strenghten local "pat" from rtx to
	rtx_sequence * and use methods for clarity and typesafety.
	(redirect_with_delay_list_safe_p): Strengthen param "jump" from
	rtx to rtx_insn *.  Strenghten local "li" from rtx to
	rtx_insn_list * and use its methods for clarity and typesafety.
	(steal_delay_list_from_target): Strengthen param "insn" from rtx
	to rtx_insn *.
	(steal_delay_list_from_fallthrough): Likewise.
	(try_merge_delay_insns): Likewise for param "thread" and locals
	"trial", "next_trial", "delay_insn".
	(redundant_insn): Likewise for param "target" and local "trial".
	(own_thread_p): Likewise for param "thread" and locals
	"active_insn", "insn".
	(get_label_before): Likewise for param "insn".
	(fill_simple_delay_slots): Likewise for local "new_label"; use
	JUMP_LABEL_AS_INSN as necessary when calling own_thread_p.
	(label_before_next_insn): Strengthen return type and local "insn"
	from rtx to rtx_insn *.
	(relax_delay_slots): Likewise for locals "other", "tmp".
	(make_return_insns): Likewise for param "first" and locals "insn",
	"jump_insn", "prev".  Move declaration of "pat" to its assignment
	and strengthen from rtx to rtx_sequence *.  Use its methods for
	clarity and typesafety.
	* rtlanal.c (no_labels_between_p): Strengthen params from
	const_rtx to const rtx_insn *.  Strengthen local "p" from rtx to
	rtx_insn *.
	(reg_used_between_p): Strengthen params "from_insn", "to_insn"
	from const_rtx to const rtx_insn *.
	(reg_set_between_p): Rename param "from_insn" to
	"uncast_from_insn", and reintroduce "from_insn" as a
	const rtx_insn * via a checked cast.
	(modified_between_p): Likewise for param "start" as "uncast_start".
	(tablejump_p): Add a cast when invoking NEXT_INSN on "label".
	* sel-sched-ir.c (get_seqno_by_preds): Strengthen param and locals
	"tmp", head" from rtx to rtx_insn *.
	(recompute_rev_top_order): Likewise for local "insn".
	* sel-sched-ir.h (get_seqno_by_preds): Likewise for param.
	* store-motion.c (build_store_vectors): Likewise for local "insn".
	Strengthen local "st" from rtx to rtx_insn_list * and use methods
	for clarity and typesafety.
	* tree-ssa-loop-ivopts.c (seq_cost): Strengthen param "seq" from
	rtx to rtx_insn *.
	(computation_cost): Likewise for local "seq".
	(get_address_cost): Likewise.

/
	* rtx-classes-status.txt (TODO): NEXT_INSN/PREV_INSN are done.
---
 gcc/config/aarch64/aarch64.c           |   2 +-
 gcc/config/alpha/alpha.c               |   6 +-
 gcc/config/arc/arc-protos.h            |   6 +-
 gcc/config/arc/arc.c                   |   6 +-
 gcc/config/arc/arc.md                  |   8 +--
 gcc/config/arc/constraints.md          |   2 +-
 gcc/config/arm/arm.c                   |  14 ++--
 gcc/config/avr/avr-log.c               |   2 +-
 gcc/config/bfin/bfin.c                 |  26 ++++----
 gcc/config/c6x/c6x.c                   |  42 ++++++------
 gcc/config/cris/cris.c                 |   8 +--
 gcc/config/frv/frv.c                   |  33 +++++-----
 gcc/config/ia64/ia64.c                 |  51 +++++++--------
 gcc/config/iq2000/iq2000-protos.h      |   4 +-
 gcc/config/iq2000/iq2000.c             |   6 +-
 gcc/config/iq2000/iq2000.md            |   4 +-
 gcc/config/m32c/m32c.c                 |   2 +-
 gcc/config/m68k/m68k.c                 |  12 ++--
 gcc/config/mcore/mcore-protos.h        |   2 +-
 gcc/config/mcore/mcore.c               |  28 ++++----
 gcc/config/mep/mep.c                   |   2 +-
 gcc/config/microblaze/microblaze.md    |   4 +-
 gcc/config/mips/mips.c                 |  22 +++----
 gcc/config/mips/mips.md                |   2 +-
 gcc/config/mn10300/mn10300.c           |   2 +-
 gcc/config/nds32/nds32.c               |   4 +-
 gcc/config/pa/pa-protos.h              |  28 ++++----
 gcc/config/pa/pa.c                     |  54 ++++++++--------
 gcc/config/picochip/picochip.c         |   6 +-
 gcc/config/rs6000/rs6000.c             |   4 +-
 gcc/config/s390/s390.c                 |  15 ++---
 gcc/config/sh/sh-protos.h              |  10 +--
 gcc/config/sh/sh.c                     | 102 +++++++++++++++--------------
 gcc/config/sh/sh.md                    |  11 ++--
 gcc/config/sh/sh_optimize_sett_clrt.cc |  12 ++--
 gcc/config/sh/sh_treg_combine.cc       |  35 +++++-----
 gcc/config/sparc/sparc-protos.h        |   4 +-
 gcc/config/sparc/sparc.c               |  15 +++--
 gcc/config/spu/spu.md                  |   4 +-
 gcc/config/stormy16/stormy16.c         |   6 +-
 gcc/config/v850/v850.c                 |  28 ++++----
 gcc/final.c                            |   9 +--
 gcc/function.c                         |  10 +--
 gcc/genattr.c                          |   6 +-
 gcc/genattrtab.c                       |   6 +-
 gcc/hw-doloop.c                        |   5 +-
 gcc/hw-doloop.h                        |   2 +-
 gcc/ira.c                              |  16 +++--
 gcc/ira.h                              |   2 +-
 gcc/loop-doloop.c                      |  10 +--
 gcc/output.h                           |   2 +-
 gcc/recog.c                            |  14 ++--
 gcc/reload1.c                          |  22 +++----
 gcc/reorg.c                            | 114 +++++++++++++++++----------------
 gcc/rtl.h                              |  16 ++---
 gcc/rtlanal.c                          |  17 +++--
 gcc/sel-sched-ir.c                     |   6 +-
 gcc/sel-sched-ir.h                     |   2 +-
 gcc/store-motion.c                     |  11 ++--
 gcc/tree-ssa-loop-ivopts.c             |   8 ++-
 rtx-classes-status.txt                 |   4 --
 61 files changed, 474 insertions(+), 442 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 4c821f5..ae3d475 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -4461,7 +4461,7 @@ aarch64_output_casesi (rtx *operands)
 {
   char buf[100];
   char label[100];
-  rtx diff_vec = PATTERN (NEXT_INSN (operands[2]));
+  rtx diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[2])));
   int index;
   static const char *const patterns[4][2] =
   {
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index bcab091..f8fddb2 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -1573,7 +1573,7 @@ alpha_set_memflags_1 (rtx *xp, void *data)
 void
 alpha_set_memflags (rtx seq, rtx ref)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (!MEM_P (ref))
     return;
@@ -1586,7 +1586,7 @@ alpha_set_memflags (rtx seq, rtx ref)
       && !MEM_READONLY_P (ref))
     return;
 
-  for (insn = seq; insn; insn = NEXT_INSN (insn))
+  for (insn = as_a <rtx_insn *> (seq); insn; insn = NEXT_INSN (insn))
     if (INSN_P (insn))
       for_each_rtx (&PATTERN (insn), alpha_set_memflags_1, (void *) ref);
     else
@@ -8630,7 +8630,7 @@ alpha_handle_trap_shadows (void)
 {
   struct shadow_summary shadow;
   int trap_pending, exception_nesting;
-  rtx i, n;
+  rtx_insn *i, *n;
 
   trap_pending = 0;
   exception_nesting = 0;
diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h
index 8953845..64e1d25 100644
--- a/gcc/config/arc/arc-protos.h
+++ b/gcc/config/arc/arc-protos.h
@@ -88,7 +88,8 @@ extern rtx gen_mlo (void);
 extern rtx gen_mhi (void);
 extern bool arc_branch_size_unknown_p (void);
 struct arc_ccfsm;
-extern void arc_ccfsm_record_condition (rtx, bool, rtx, struct arc_ccfsm *);
+extern void arc_ccfsm_record_condition (rtx, bool, rtx_insn *,
+					struct arc_ccfsm *);
 extern void arc_expand_prologue (void);
 extern void arc_expand_epilogue (int);
 extern void arc_init_expanders (void);
@@ -108,7 +109,8 @@ extern bool arc_scheduling_not_expected (void);
 extern bool arc_sets_cc_p (rtx insn);
 extern int arc_label_align (rtx label);
 extern bool arc_need_delay (rtx_insn *insn);
-extern bool arc_text_label (rtx);
+extern bool arc_text_label (rtx_insn *insn);
+
 extern int arc_decl_pretend_args (tree decl);
 extern bool arc_short_comparison_p (rtx, int);
 extern bool arc_epilogue_uses (int regno);
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 1c97322..97c3916 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -2465,7 +2465,7 @@ arc_expand_epilogue (int sibcall_p)
  epilogue_done:
   if (!TARGET_EPILOGUE_CFI)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
 	RTX_FRAME_RELATED_P (insn) = 0;
@@ -3736,7 +3736,7 @@ arc_ccfsm_at_label (const char *prefix, int num, struct arc_ccfsm *state)
    the ccfsm state accordingly.
    REVERSE says branch will branch when the condition is false.  */
 void
-arc_ccfsm_record_condition (rtx cond, bool reverse, rtx jump,
+arc_ccfsm_record_condition (rtx cond, bool reverse, rtx_insn *jump,
 			    struct arc_ccfsm *state)
 {
   rtx_insn *seq_insn = NEXT_INSN (PREV_INSN (jump));
@@ -9178,7 +9178,7 @@ arc_label_align (rtx label)
 /* Return true if LABEL is in executable code.  */
 
 bool
-arc_text_label (rtx label)
+arc_text_label (rtx_insn *label)
 {
   rtx_insn *next;
 
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index 2f93d7c..7abc38b 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -4771,7 +4771,7 @@
    (use (match_operand 4 "const_int_operand" "C_0,X,X"))]
   ""
 {
-  rtx scan;
+  rtx_insn *scan;
   int len, size = 0;
   int n_insns = 0;
   rtx loop_start = operands[4];
@@ -4812,8 +4812,8 @@
     {
       if (!INSN_P (scan))
 	continue;
-      if (GET_CODE (PATTERN (scan)) == SEQUENCE)
-	scan = XVECEXP (PATTERN (scan), 0, 0);
+      if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (scan)))
+	scan = seq->insn (0);
       if (JUMP_P (scan))
 	{
 	  if (recog_memoized (scan) != CODE_FOR_doloop_end_i)
@@ -4821,7 +4821,7 @@
 	      n_insns += 2;
 	      if (simplejump_p (scan))
 		{
-		  scan = XEXP (SET_SRC (PATTERN (scan)), 0);
+		  scan = as_a <rtx_insn *> (XEXP (SET_SRC (PATTERN (scan)), 0));
 		  continue;
 		}
 	      if (JUMP_LABEL (scan)
diff --git a/gcc/config/arc/constraints.md b/gcc/config/arc/constraints.md
index d01e156..5952a1c 100644
--- a/gcc/config/arc/constraints.md
+++ b/gcc/config/arc/constraints.md
@@ -308,7 +308,7 @@
 (define_constraint "Clb"
   "label"
   (and (match_code "label_ref")
-       (match_test "arc_text_label (XEXP (op, 0))")))
+       (match_test "arc_text_label (as_a <rtx_insn *> (XEXP (op, 0)))")))
 
 (define_constraint "Cal"
   "constant for arithmetic/logical operations"
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 4d0932a..dcd37a6 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -6307,7 +6307,7 @@ require_pic_register (void)
 	}
       else
 	{
-	  rtx seq, insn;
+	  rtx_insn *seq, *insn;
 
 	  if (!cfun->machine->pic_reg)
 	    cfun->machine->pic_reg = gen_reg_rtx (Pmode);
@@ -16583,7 +16583,7 @@ create_fix_barrier (Mfix *fix, HOST_WIDE_INT max_address)
   rtx_barrier *barrier;
   rtx_insn *from = fix->insn;
   /* The instruction after which we will insert the jump.  */
-  rtx selected = NULL;
+  rtx_insn *selected = NULL;
   int selected_cost;
   /* The address at which the jump instruction will be placed.  */
   HOST_WIDE_INT selected_address;
@@ -16653,7 +16653,7 @@ create_fix_barrier (Mfix *fix, HOST_WIDE_INT max_address)
      CALL_ARG_LOCATION note.  */
   if (CALL_P (selected))
     {
-      rtx next = NEXT_INSN (selected);
+      rtx_insn *next = NEXT_INSN (selected);
       if (next && NOTE_P (next)
 	  && NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
 	  selected = next;
@@ -16932,7 +16932,7 @@ thumb1_reorg (void)
     {
       rtx dest, src;
       rtx pat, op0, set = NULL;
-      rtx prev, insn = BB_END (bb);
+      rtx_insn *prev, *insn = BB_END (bb);
       bool insn_clobbered = false;
 
       while (insn != BB_HEAD (bb) && !NONDEBUG_INSN_P (insn))
@@ -21181,7 +21181,7 @@ arm_expand_prologue (void)
     {
       /* This add can produce multiple insns for a large constant, so we
 	 need to get tricky.  */
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
 
       amount = GEN_INT (offsets->saved_args + saved_regs
 			- offsets->outgoing_args);
@@ -29531,7 +29531,7 @@ arm_output_iwmmxt_tinsr (rtx *operands)
 const char *
 thumb1_output_casesi (rtx *operands)
 {
-  rtx diff_vec = PATTERN (NEXT_INSN (operands[0]));
+  rtx diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[0])));
 
   gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
 
@@ -29554,7 +29554,7 @@ thumb1_output_casesi (rtx *operands)
 const char *
 thumb2_output_casesi (rtx *operands)
 {
-  rtx diff_vec = PATTERN (NEXT_INSN (operands[2]));
+  rtx diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[2])));
 
   gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
 
diff --git a/gcc/config/avr/avr-log.c b/gcc/config/avr/avr-log.c
index 8e27cec..7d478a7 100644
--- a/gcc/config/avr/avr-log.c
+++ b/gcc/config/avr/avr-log.c
@@ -209,7 +209,7 @@ avr_log_vadump (FILE *file, const char *fmt, va_list ap)
 
             case 'L':
               {
-                rtx insn = va_arg (ap, rtx);
+                rtx_insn *insn = as_a_nullable <rtx_insn *> (va_arg (ap, rtx));
 
                 while (insn)
                   {
diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index 0a08faf..c2bc3e5 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -3347,8 +3347,8 @@ bfin_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 /* This function acts like NEXT_INSN, but is aware of three-insn bundles and
    skips all subsequent parallel instructions if INSN is the start of such
    a group.  */
-static rtx
-find_next_insn_start (rtx insn)
+static rtx_insn *
+find_next_insn_start (rtx_insn *insn)
 {
   if (GET_MODE (insn) == SImode)
     {
@@ -3361,8 +3361,8 @@ find_next_insn_start (rtx insn)
 /* This function acts like PREV_INSN, but is aware of three-insn bundles and
    skips all subsequent parallel instructions if INSN is the start of such
    a group.  */
-static rtx
-find_prev_insn_start (rtx insn)
+static rtx_insn *
+find_prev_insn_start (rtx_insn *insn)
 {
   insn = PREV_INSN (insn);
   gcc_assert (GET_MODE (insn) != SImode);
@@ -3438,7 +3438,7 @@ static bool
 hwloop_optimize (hwloop_info loop)
 {
   basic_block bb;
-  rtx insn, last_insn;
+  rtx_insn *insn, *last_insn;
   rtx loop_init, start_label, end_label;
   rtx iter_reg, scratchreg, scratch_init, scratch_init_insn;
   rtx lc_reg, lt_reg, lb_reg;
@@ -3613,7 +3613,7 @@ hwloop_optimize (hwloop_info loop)
 	}
       else
 	{
-	  last_insn = NULL_RTX;
+	  last_insn = NULL;
 	  break;
 	}
     }
@@ -3656,7 +3656,7 @@ hwloop_optimize (hwloop_info loop)
       last_insn = emit_insn_after (gen_forced_nop (), last_insn);
     }
 
-  loop->last_insn = as_a_nullable <rtx_insn *> (last_insn);
+  loop->last_insn = last_insn;
 
   /* The loop is good for replacement.  */
   start_label = loop->start_label;
@@ -3771,7 +3771,7 @@ hwloop_optimize (hwloop_info loop)
 
   if (loop->incoming_src)
     {
-      rtx prev = BB_END (loop->incoming_src);
+      rtx_insn *prev = BB_END (loop->incoming_src);
       if (vec_safe_length (loop->incoming) > 1
 	  || !(loop->incoming->last ()->flags & EDGE_FALLTHRU))
 	{
@@ -3908,7 +3908,7 @@ gen_one_bundle (rtx_insn *slot[3])
   /* Verify that we really can do the multi-issue.  */
   if (slot[0])
     {
-      rtx t = NEXT_INSN (slot[0]);
+      rtx_insn *t = NEXT_INSN (slot[0]);
       while (t != slot[1])
 	{
 	  if (! NOTE_P (t) || NOTE_KIND (t) != NOTE_INSN_DELETED)
@@ -4229,7 +4229,7 @@ trapping_loads_p (rtx insn, int np_reg, bool after_np_branch)
    a three-insn bundle, see if one of them is a load and return that if so.
    Return NULL_RTX if the insn does not contain loads.  */
 static rtx
-find_load (rtx insn)
+find_load (rtx_insn *insn)
 {
   if (!NONDEBUG_INSN_P (insn))
     return NULL_RTX;
@@ -4284,7 +4284,7 @@ note_np_check_stores (rtx x, const_rtx pat ATTRIBUTE_UNUSED,
 static void
 workaround_speculation (void)
 {
-  rtx insn, next;
+  rtx_insn *insn, *next;
   rtx last_condjump = NULL_RTX;
   int cycles_since_jump = INT_MAX;
   int delay_added = 0;
@@ -4448,9 +4448,9 @@ workaround_speculation (void)
 	  && (INSN_CODE (insn) == CODE_FOR_cbranch_predicted_taken
 	      || cbranch_predicted_taken_p (insn)))
 	{
-	  rtx target = JUMP_LABEL (insn);
+	  rtx_insn *target = JUMP_LABEL_AS_INSN (insn);
 	  rtx label = target;
-	  rtx next_tgt;
+	  rtx_insn *next_tgt;
 
 	  cycles_since_jump = 0;
 	  for (; target && cycles_since_jump < 3; target = next_tgt)
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index c7e0ad8..03df073 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -3044,13 +3044,13 @@ get_insn_side (rtx insn, enum attr_units units)
 /* After scheduling, walk the insns between HEAD and END and assign unit
    reservations.  */
 static void
-assign_reservations (rtx head, rtx end)
+assign_reservations (rtx_insn *head, rtx_insn *end)
 {
-  rtx insn;
+  rtx_insn *insn;
   for (insn = head; insn != NEXT_INSN (end); insn = NEXT_INSN (insn))
     {
       unsigned int sched_mask, reserved;
-      rtx within, last;
+      rtx_insn *within, *last;
       int pass;
       int rsrv[2];
       int rsrv_count[2][4];
@@ -3060,7 +3060,7 @@ assign_reservations (rtx head, rtx end)
 	continue;
 
       reserved = 0;
-      last = NULL_RTX;
+      last = NULL;
       /* Find the last insn in the packet.  It has a state recorded for it,
 	 which we can use to determine the units we should be using.  */
       for (within = insn;
@@ -3271,9 +3271,9 @@ get_unit_reqs (rtx insn, int *req1, int *side1, int *req2, int *side2)
 /* Walk the insns between and including HEAD and TAIL, and mark the
    resource requirements in the unit_reqs table.  */
 static void
-count_unit_reqs (unit_req_table reqs, rtx head, rtx tail)
+count_unit_reqs (unit_req_table reqs, rtx_insn *head, rtx_insn *tail)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   memset (reqs, 0, sizeof (unit_req_table));
 
@@ -3416,7 +3416,8 @@ get_unit_operand_masks (rtx insn, unsigned int *pmask1, unsigned int *pmask2)
    We recompute this information locally after our transformation, and keep
    it only if we managed to improve the balance.  */
 static void
-try_rename_operands (rtx head, rtx tail, unit_req_table reqs, rtx insn,
+try_rename_operands (rtx_insn *head, rtx_insn *tail, unit_req_table reqs,
+		     rtx insn,
 		     insn_rr_info *info, unsigned int op_mask, int orig_side)
 {
   enum reg_class super_class = orig_side == 0 ? B_REGS : A_REGS;
@@ -3519,9 +3520,9 @@ try_rename_operands (rtx head, rtx tail, unit_req_table reqs, rtx insn,
 static void
 reshuffle_units (basic_block loop)
 {
-  rtx head = BB_HEAD (loop);
-  rtx tail = BB_END (loop);
-  rtx insn;
+  rtx_insn *head = BB_HEAD (loop);
+  rtx_insn *tail = BB_END (loop);
+  rtx_insn *insn;
   unit_req_table reqs;
   edge e;
   edge_iterator ei;
@@ -3612,7 +3613,7 @@ typedef struct c6x_sched_context
   int delays_finished_at;
 
   /* The following variable value is the last issued insn.  */
-  rtx last_scheduled_insn;
+  rtx_insn *last_scheduled_insn;
   /* The last issued insn that isn't a shadow of another.  */
   rtx_insn *last_scheduled_iter0;
 
@@ -3843,7 +3844,7 @@ predicate_insn (rtx insn, rtx cond, bool doit)
 static void
 init_sched_state (c6x_sched_context_t sc)
 {
-  sc->last_scheduled_insn = NULL_RTX;
+  sc->last_scheduled_insn = NULL;
   sc->last_scheduled_iter0 = NULL;
   sc->issued_this_cycle = 0;
   memset (sc->jump_cycles, 0, sizeof sc->jump_cycles);
@@ -4953,7 +4954,7 @@ reorg_split_calls (rtx *call_labels)
 			= INSN_INFO_ENTRY (INSN_UID (last_same_clock)).unit_mask;
 		      if (GET_MODE (insn) == TImode)
 			{
-			  rtx new_cycle_first = NEXT_INSN (insn);
+			  rtx_insn *new_cycle_first = NEXT_INSN (insn);
 			  while (!NONDEBUG_INSN_P (new_cycle_first)
 				 || GET_CODE (PATTERN (new_cycle_first)) == USE
 				 || GET_CODE (PATTERN (new_cycle_first)) == CLOBBER)
@@ -5331,11 +5332,12 @@ split_delayed_nonbranch (rtx_insn *insn)
 /* Examine if INSN is the result of splitting a load into a real load and a
    shadow, and if so, undo the transformation.  */
 static void
-undo_split_delayed_nonbranch (rtx insn)
+undo_split_delayed_nonbranch (rtx_insn *insn)
 {
   int icode = recog_memoized (insn);
   enum attr_type type;
-  rtx prev_pat, insn_pat, prev;
+  rtx prev_pat, insn_pat;
+  rtx_insn *prev;
 
   if (icode < 0)
     return;
@@ -5387,7 +5389,7 @@ static void
 conditionalize_after_sched (void)
 {
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
   FOR_EACH_BB_FN (bb, cfun)
     FOR_BB_INSNS (bb, insn)
       {
@@ -5431,7 +5433,7 @@ static int
 bb_earliest_end_cycle (basic_block bb, rtx ignore)
 {
   int earliest = 0;
-  rtx insn;
+  rtx_insn *insn;
 
   FOR_BB_INSNS (bb, insn)
     {
@@ -5457,7 +5459,7 @@ bb_earliest_end_cycle (basic_block bb, rtx ignore)
 static void
 filter_insns_above (basic_block bb, int max_uid)
 {
-  rtx insn, next;
+  rtx_insn *insn, *next;
   bool prev_ti = false;
   int prev_cycle = -1;
 
@@ -5728,7 +5730,7 @@ hwloop_optimize (hwloop_info loop)
      require.  */
   prev = NULL;
   n_execute_packets = 0;
-  for (insn = as_a <rtx_insn *> (loop->start_label);
+  for (insn = loop->start_label;
        insn != loop->loop_end;
        insn = NEXT_INSN (insn))
     {
@@ -5868,7 +5870,7 @@ hwloop_fail (hwloop_info loop)
     emit_insn_before (insn, loop->loop_end);
   else
     {
-      rtx t = loop->start_label;
+      rtx_insn *t = loop->start_label;
       while (!NOTE_P (t) || NOTE_KIND (t) != NOTE_INSN_BASIC_BLOCK)
 	t = NEXT_INSN (t);
       emit_insn_after (insn, t);
diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c
index 56adf45..164cc29 100644
--- a/gcc/config/cris/cris.c
+++ b/gcc/config/cris/cris.c
@@ -1279,7 +1279,7 @@ cris_initial_frame_pointer_offset (void)
       push_topmost_sequence ();
       got_really_used
 	= reg_used_between_p (pic_offset_table_rtx, get_insns (),
-			      NULL_RTX);
+			      NULL);
       pop_topmost_sequence ();
     }
 
@@ -1968,7 +1968,7 @@ cris_simple_epilogue (void)
     {
       push_topmost_sequence ();
       got_really_used
-	= reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL_RTX);
+	= reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL);
       pop_topmost_sequence ();
     }
 
@@ -3034,7 +3034,7 @@ cris_expand_prologue (void)
 	 it's still used.  */
       push_topmost_sequence ();
       got_really_used
-	= reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL_RTX);
+	= reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL);
       pop_topmost_sequence ();
     }
 
@@ -3317,7 +3317,7 @@ cris_expand_epilogue (void)
 	 it's still used.  */
       push_topmost_sequence ();
       got_really_used
-	= reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL_RTX);
+	= reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL);
       pop_topmost_sequence ();
     }
 
diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c
index a9823c9..ed99f93 100644
--- a/gcc/config/frv/frv.c
+++ b/gcc/config/frv/frv.c
@@ -336,8 +336,8 @@ static void frv_start_packet 			(void);
 static void frv_start_packet_block 		(void);
 static void frv_finish_packet 			(void (*) (void));
 static bool frv_pack_insn_p 			(rtx);
-static void frv_add_insn_to_packet		(rtx);
-static void frv_insert_nop_in_packet		(rtx);
+static void frv_add_insn_to_packet		(rtx_insn *);
+static void frv_insert_nop_in_packet		(rtx_insn *);
 static bool frv_for_each_packet 		(void (*) (void));
 static bool frv_sort_insn_group_1		(enum frv_insn_group,
 						 unsigned int, unsigned int,
@@ -1409,7 +1409,7 @@ static int frv_insn_packing_flag;
 static int
 frv_function_contains_far_jump (void)
 {
-  rtx insn = get_insns ();
+  rtx_insn *insn = get_insns ();
   while (insn != NULL
 	 && !(JUMP_P (insn)
 	      && get_attr_far_jump (insn) == FAR_JUMP_YES))
@@ -5386,8 +5386,8 @@ frv_ifcvt_modify_tests (ce_if_block *ce_info, rtx *p_true, rtx *p_false)
   /* Scan all of the blocks for registers that must not be allocated.  */
   for (j = 0; j < num_bb; j++)
     {
-      rtx last_insn = BB_END (bb[j]);
-      rtx insn = BB_HEAD (bb[j]);
+      rtx_insn *last_insn = BB_END (bb[j]);
+      rtx_insn *insn = BB_HEAD (bb[j]);
       unsigned int regno;
 
       if (dump_file)
@@ -7119,15 +7119,15 @@ struct frv_packet_group {
 
   /* A list of the instructions that belong to this group, in the order
      they appear in the rtl stream.  */
-  rtx insns[ARRAY_SIZE (frv_unit_codes)];
+  rtx_insn *insns[ARRAY_SIZE (frv_unit_codes)];
 
   /* The contents of INSNS after they have been sorted into the correct
      assembly-language order.  Element X issues to unit X.  The list may
      contain extra nops.  */
-  rtx sorted[ARRAY_SIZE (frv_unit_codes)];
+  rtx_insn *sorted[ARRAY_SIZE (frv_unit_codes)];
 
   /* The member of frv_nops[] to use in sorted[].  */
-  rtx nop;
+  rtx_insn *nop;
 };
 
 /* The current state of the packing pass, implemented by frv_pack_insns.  */
@@ -7158,7 +7158,7 @@ static struct {
   struct frv_packet_group groups[NUM_GROUPS];
 
   /* The instructions that make up the current packet.  */
-  rtx insns[ARRAY_SIZE (frv_unit_codes)];
+  rtx_insn *insns[ARRAY_SIZE (frv_unit_codes)];
   unsigned int num_insns;
 } frv_packet;
 
@@ -7406,7 +7406,7 @@ frv_pack_insn_p (rtx insn)
 /* Add instruction INSN to the current packet.  */
 
 static void
-frv_add_insn_to_packet (rtx insn)
+frv_add_insn_to_packet (rtx_insn *insn)
 {
   struct frv_packet_group *packet_group;
 
@@ -7423,10 +7423,10 @@ frv_add_insn_to_packet (rtx insn)
    add to the end.  */
 
 static void
-frv_insert_nop_in_packet (rtx insn)
+frv_insert_nop_in_packet (rtx_insn *insn)
 {
   struct frv_packet_group *packet_group;
-  rtx last;
+  rtx_insn *last;
 
   packet_group = &frv_packet.groups[frv_unit_groups[frv_insn_unit (insn)]];
   last = frv_packet.insns[frv_packet.num_insns - 1];
@@ -7451,7 +7451,7 @@ frv_insert_nop_in_packet (rtx insn)
 static bool
 frv_for_each_packet (void (*handle_packet) (void))
 {
-  rtx insn, next_insn;
+  rtx_insn *insn, *next_insn;
 
   frv_packet.issue_rate = frv_issue_rate ();
 
@@ -7549,7 +7549,7 @@ frv_sort_insn_group_1 (enum frv_insn_group group,
   unsigned int i;
   state_t test_state;
   size_t dfa_size;
-  rtx insn;
+  rtx_insn *insn;
 
   /* Early success if we've filled all the slots.  */
   if (lower_slot == upper_slot)
@@ -7888,7 +7888,8 @@ frv_optimize_membar_local (basic_block bb, struct frv_io *next_io,
 			   rtx *last_membar)
 {
   HARD_REG_SET used_regs;
-  rtx next_membar, set, insn;
+  rtx next_membar, set;
+  rtx_insn *insn;
   bool next_is_end_p;
 
   /* NEXT_IO is the next I/O operation to be performed after the current
@@ -8092,7 +8093,7 @@ static void
 frv_align_label (void)
 {
   unsigned int alignment, target, nop;
-  rtx x, last, barrier, label;
+  rtx_insn *x, *last, *barrier, *label;
 
   /* Walk forward to the start of the next packet.  Set ALIGNMENT to the
      maximum alignment of that packet, LABEL to the last label between
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index ae62b49..8dc0b91 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -275,14 +275,15 @@ static void initiate_bundle_state_table (void);
 static void finish_bundle_state_table (void);
 static int try_issue_nops (struct bundle_state *, int);
 static int try_issue_insn (struct bundle_state *, rtx);
-static void issue_nops_and_insn (struct bundle_state *, int, rtx, int, int);
+static void issue_nops_and_insn (struct bundle_state *, int, rtx_insn *,
+				 int, int);
 static int get_max_pos (state_t);
 static int get_template (state_t, int);
 
-static rtx get_next_important_insn (rtx, rtx);
+static rtx_insn *get_next_important_insn (rtx_insn *, rtx_insn *);
 static bool important_for_bundling_p (rtx);
 static bool unknown_for_bundling_p (rtx);
-static void bundling (FILE *, int, rtx, rtx);
+static void bundling (FILE *, int, rtx_insn *, rtx_insn *);
 
 static void ia64_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
 				  HOST_WIDE_INT, tree);
@@ -7087,7 +7088,7 @@ static rtx_insn *dfa_stop_insn;
 
 /* The following variable value is the last issued insn.  */
 
-static rtx last_scheduled_insn;
+static rtx_insn *last_scheduled_insn;
 
 /* The following variable value is pointer to a DFA state used as
    temporary variable.  */
@@ -7294,7 +7295,7 @@ ia64_sched_init (FILE *dump ATTRIBUTE_UNUSED,
 		 int max_ready ATTRIBUTE_UNUSED)
 {
 #ifdef ENABLE_CHECKING
-  rtx insn;
+  rtx_insn *insn;
 
   if (!sel_sched_p () && reload_completed)
     for (insn = NEXT_INSN (current_sched_info->prev_head);
@@ -7302,7 +7303,7 @@ ia64_sched_init (FILE *dump ATTRIBUTE_UNUSED,
 	 insn = NEXT_INSN (insn))
       gcc_assert (!SCHED_GROUP_P (insn));
 #endif
-  last_scheduled_insn = NULL_RTX;
+  last_scheduled_insn = NULL;
   init_insn_group_barriers ();
 
   current_cycle = 0;
@@ -7567,7 +7568,7 @@ static rtx_insn *dfa_pre_cycle_insn;
 /* Returns 1 when a meaningful insn was scheduled between the last group
    barrier and LAST.  */
 static int
-scheduled_good_insn (rtx last)
+scheduled_good_insn (rtx_insn *last)
 {
   if (last && recog_memoized (last) >= 0)
     return 1;
@@ -7669,7 +7670,7 @@ ia64_h_i_d_extended (void)
 struct _ia64_sched_context
 {
   state_t prev_cycle_state;
-  rtx last_scheduled_insn;
+  rtx_insn *last_scheduled_insn;
   struct reg_write_state rws_sum[NUM_REGS];
   struct reg_write_state rws_insn[NUM_REGS];
   int first_instruction;
@@ -7697,7 +7698,7 @@ ia64_init_sched_context (void *_sc, bool clean_p)
   if (clean_p)
     {
       state_reset (sc->prev_cycle_state);
-      sc->last_scheduled_insn = NULL_RTX;
+      sc->last_scheduled_insn = NULL;
       memset (sc->rws_sum, 0, sizeof (rws_sum));
       memset (sc->rws_insn, 0, sizeof (rws_insn));
       sc->first_instruction = 1;
@@ -8458,7 +8459,7 @@ struct bundle_state
   /* Unique bundle state number to identify them in the debugging
      output  */
   int unique_num;
-  rtx insn;     /* corresponding insn, NULL for the 1st and the last state  */
+  rtx_insn *insn; /* corresponding insn, NULL for the 1st and the last state  */
   /* number nops before and after the insn  */
   short before_nops_num, after_nops_num;
   int insn_num; /* insn number (0 - for initial state, 1 - for the 1st
@@ -8699,7 +8700,8 @@ try_issue_insn (struct bundle_state *curr_state, rtx insn)
 
 static void
 issue_nops_and_insn (struct bundle_state *originator, int before_nops_num,
-		     rtx insn, int try_bundle_end_p, int only_bundle_end_p)
+		     rtx_insn *insn, int try_bundle_end_p,
+		     int only_bundle_end_p)
 {
   struct bundle_state *curr_state;
 
@@ -8913,13 +8915,13 @@ important_for_bundling_p (rtx insn)
 /* The following function returns an insn important for insn bundling
    followed by INSN and before TAIL.  */
 
-static rtx
-get_next_important_insn (rtx insn, rtx tail)
+static rtx_insn *
+get_next_important_insn (rtx_insn *insn, rtx_insn *tail)
 {
   for (; insn && insn != tail; insn = NEXT_INSN (insn))
     if (important_for_bundling_p (insn))
       return insn;
-  return NULL_RTX;
+  return NULL;
 }
 
 /* True when INSN is unknown, but important, for bundling.  */
@@ -8936,7 +8938,7 @@ unknown_for_bundling_p (rtx insn)
 /* Add a bundle selector TEMPLATE0 before INSN.  */
 
 static void
-ia64_add_bundle_selector_before (int template0, rtx insn)
+ia64_add_bundle_selector_before (int template0, rtx_insn *insn)
 {
   rtx b = gen_bundle_selector (GEN_INT (template0));
 
@@ -9016,15 +9018,14 @@ ia64_add_bundle_selector_before (int template0, rtx insn)
    EBB.  */
 
 static void
-bundling (FILE *dump, int verbose, rtx prev_head_insn, rtx tail)
+bundling (FILE *dump, int verbose, rtx_insn *prev_head_insn, rtx_insn *tail)
 {
   struct bundle_state *curr_state, *next_state, *best_state;
-  rtx insn, next_insn;
+  rtx_insn *insn, *next_insn;
   int insn_num;
   int i, bundle_end_p, only_bundle_end_p, asm_p;
   int pos = 0, max_pos, template0, template1;
-  rtx b;
-  rtx nop;
+  rtx_insn *b;
   enum attr_type type;
 
   insn_num = 0;
@@ -9236,8 +9237,8 @@ bundling (FILE *dump, int verbose, rtx prev_head_insn, rtx tail)
 	/* Emit nops after the current insn.  */
 	for (i = 0; i < curr_state->after_nops_num; i++)
 	  {
-	    nop = gen_nop ();
-	    emit_insn_after (nop, insn);
+	    rtx nop_pat = gen_nop ();
+	    rtx_insn *nop = emit_insn_after (nop_pat, insn);
 	    pos--;
 	    gcc_assert (pos >= 0);
 	    if (pos % 3 == 0)
@@ -9280,9 +9281,9 @@ bundling (FILE *dump, int verbose, rtx prev_head_insn, rtx tail)
       /* Emit nops after the current insn.  */
       for (i = 0; i < curr_state->before_nops_num; i++)
 	{
-	  nop = gen_nop ();
-	  ia64_emit_insn_before (nop, insn);
-	  nop = PREV_INSN (insn);
+	  rtx nop_pat = gen_nop ();
+	  ia64_emit_insn_before (nop_pat, insn);
+	  rtx_insn *nop = PREV_INSN (insn);
 	  insn = nop;
 	  pos--;
 	  gcc_assert (pos >= 0);
@@ -9316,7 +9317,7 @@ bundling (FILE *dump, int verbose, rtx prev_head_insn, rtx tail)
 	  start_bundle = true;
 	else
 	  {
-	    rtx next_insn;
+	    rtx_insn *next_insn;
 
 	    for (next_insn = NEXT_INSN (insn);
 		 next_insn && next_insn != tail;
diff --git a/gcc/config/iq2000/iq2000-protos.h b/gcc/config/iq2000/iq2000-protos.h
index 17adef6..6732234 100644
--- a/gcc/config/iq2000/iq2000-protos.h
+++ b/gcc/config/iq2000/iq2000-protos.h
@@ -22,8 +22,8 @@
 
 extern int              iq2000_check_split (rtx, enum machine_mode);
 extern int              iq2000_reg_mode_ok_for_base_p (rtx, enum machine_mode, int);
-extern const char *     iq2000_fill_delay_slot (const char *, enum delay_type, rtx *, rtx);
-extern const char *     iq2000_move_1word (rtx *, rtx, int);
+extern const char *     iq2000_fill_delay_slot (const char *, enum delay_type, rtx *, rtx_insn *);
+extern const char *     iq2000_move_1word (rtx *, rtx_insn *, int);
 extern HOST_WIDE_INT    iq2000_debugger_offset (rtx, HOST_WIDE_INT);
 extern void             final_prescan_insn (rtx_insn *, rtx *, int);
 extern HOST_WIDE_INT    compute_frame_size (HOST_WIDE_INT);
diff --git a/gcc/config/iq2000/iq2000.c b/gcc/config/iq2000/iq2000.c
index 9e7fecd..3473646 100644
--- a/gcc/config/iq2000/iq2000.c
+++ b/gcc/config/iq2000/iq2000.c
@@ -368,11 +368,11 @@ iq2000_legitimate_address_p (enum machine_mode mode, rtx xinsn, bool strict)
 
 const char *
 iq2000_fill_delay_slot (const char *ret, enum delay_type type, rtx operands[],
-			rtx cur_insn)
+			rtx_insn *cur_insn)
 {
   rtx set_reg;
   enum machine_mode mode;
-  rtx next_insn = cur_insn ? NEXT_INSN (cur_insn) : NULL_RTX;
+  rtx_insn *next_insn = cur_insn ? NEXT_INSN (cur_insn) : NULL;
   int num_nops;
 
   if (type == DELAY_LOAD || type == DELAY_FCMP)
@@ -551,7 +551,7 @@ abort_with_insn (rtx insn, const char * reason)
 /* Return the appropriate instructions to move one operand to another.  */
 
 const char *
-iq2000_move_1word (rtx operands[], rtx insn, int unsignedp)
+iq2000_move_1word (rtx operands[], rtx_insn *insn, int unsignedp)
 {
   const char *ret = 0;
   rtx op0 = operands[0];
diff --git a/gcc/config/iq2000/iq2000.md b/gcc/config/iq2000/iq2000.md
index 96ba555..4eb2eb1 100644
--- a/gcc/config/iq2000/iq2000.md
+++ b/gcc/config/iq2000/iq2000.md
@@ -1398,8 +1398,8 @@
 	(plus:SI (match_operand:SI 0 "register_operand" "d")
 		 (label_ref:SI (match_operand 1 "" ""))))
    (use (label_ref:SI (match_dup 1)))]
-  "!(Pmode == DImode) && NEXT_INSN (operands[1]) != 0
-   && GET_CODE (PATTERN (NEXT_INSN (operands[1]))) == ADDR_DIFF_VEC"
+  "!(Pmode == DImode) && NEXT_INSN (as_a <rtx_insn *> (operands[1])) != 0
+   && GET_CODE (PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[1])))) == ADDR_DIFF_VEC"
   "*
 {
   return \"j\\t%0\";
diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c
index 925db24..e907089 100644
--- a/gcc/config/m32c/m32c.c
+++ b/gcc/config/m32c/m32c.c
@@ -4072,7 +4072,7 @@ m32c_leaf_function_p (void)
 static bool
 m32c_function_needs_enter (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   struct sequence_stack *seq;
   rtx sp = gen_rtx_REG (Pmode, SP_REGNO);
   rtx fb = gen_rtx_REG (Pmode, FB_REGNO);
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index 6e76a17..ff6a916 100644
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -1932,12 +1932,12 @@ m68k_jump_table_ref_p (rtx x)
   if (GET_CODE (x) != LABEL_REF)
     return false;
 
-  x = XEXP (x, 0);
-  if (!NEXT_INSN (x) && !PREV_INSN (x))
+  rtx_insn *insn = as_a <rtx_insn *> (XEXP (x, 0));
+  if (!NEXT_INSN (insn) && !PREV_INSN (insn))
     return true;
 
-  x = next_nonnote_insn (x);
-  return x && JUMP_TABLE_DATA_P (x);
+  insn = next_nonnote_insn (insn);
+  return insn && JUMP_TABLE_DATA_P (insn);
 }
 
 /* Return true if X is a legitimate address for values of mode MODE.
@@ -6125,12 +6125,12 @@ m68k_sched_md_init_global (FILE *sched_dump ATTRIBUTE_UNUSED,
   /* Check that all instructions have DFA reservations and
      that all instructions can be issued from a clean state.  */
   {
-    rtx insn;
+    rtx_insn *insn;
     state_t state;
 
     state = alloca (state_size ());
 
-    for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
+    for (insn = get_insns (); insn != NULL; insn = NEXT_INSN (insn))
       {
  	if (INSN_P (insn) && recog_memoized (insn) >= 0)
 	  {
diff --git a/gcc/config/mcore/mcore-protos.h b/gcc/config/mcore/mcore-protos.h
index c22ffce..833668d 100644
--- a/gcc/config/mcore/mcore-protos.h
+++ b/gcc/config/mcore/mcore-protos.h
@@ -48,7 +48,7 @@ extern const char * mcore_output_bclri         		(rtx, int);
 extern const char * mcore_output_bseti         		(rtx, int);
 extern const char * mcore_output_cmov          		(rtx *, int, const char *);
 extern char *       mcore_output_call          		(rtx *, int);
-extern int          mcore_is_dead                	(rtx, rtx);
+extern int          mcore_is_dead                	(rtx_insn *, rtx);
 extern int          mcore_expand_insv            	(rtx *);
 extern bool         mcore_expand_block_move      	(rtx *);
 extern const char * mcore_output_andn          		(rtx, rtx *);
diff --git a/gcc/config/mcore/mcore.c b/gcc/config/mcore/mcore.c
index b2ac47e..bcee9b1 100644
--- a/gcc/config/mcore/mcore.c
+++ b/gcc/config/mcore/mcore.c
@@ -101,8 +101,8 @@ static const char *     output_inline_const     (enum machine_mode, rtx *);
 static void       layout_mcore_frame            (struct mcore_frame *);
 static void       mcore_setup_incoming_varargs	(cumulative_args_t, enum machine_mode, tree, int *, int);
 static cond_type  is_cond_candidate             (rtx);
-static rtx        emit_new_cond_insn            (rtx, int);
-static rtx        conditionalize_block          (rtx);
+static rtx_insn  *emit_new_cond_insn            (rtx, int);
+static rtx_insn  *conditionalize_block          (rtx_insn *);
 static void       conditionalize_optimization   (void);
 static void       mcore_reorg                   (void);
 static rtx        handle_structs_in_regs        (enum machine_mode, const_tree, int);
@@ -902,9 +902,9 @@ try_constant_tricks (HOST_WIDE_INT value, HOST_WIDE_INT * x, HOST_WIDE_INT * y)
    can ignore subregs by extracting the actual register.  BRC  */
 
 int
-mcore_is_dead (rtx first, rtx reg)
+mcore_is_dead (rtx_insn *first, rtx reg)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   /* For mcore, subregs can't live independently of their parent regs.  */
   if (GET_CODE (reg) == SUBREG)
@@ -2320,7 +2320,7 @@ is_cond_candidate (rtx insn)
 /* Emit a conditional version of insn and replace the old insn with the
    new one.  Return the new insn if emitted.  */
 
-static rtx
+static rtx_insn *
 emit_new_cond_insn (rtx insn, int cond)
 {
   rtx c_insn = 0;
@@ -2405,7 +2405,7 @@ emit_new_cond_insn (rtx insn, int cond)
 
   delete_insn (insn);
   
-  return c_insn;
+  return as_a <rtx_insn *> (c_insn);
 }
 
 /* Attempt to change a basic block into a series of conditional insns.  This
@@ -2437,14 +2437,14 @@ emit_new_cond_insn (rtx insn, int cond)
    we can delete the L2 label if NUSES==1 and re-apply the optimization
    starting at the last instruction of block 2.  This may allow an entire
    if-then-else statement to be conditionalized.  BRC  */
-static rtx
-conditionalize_block (rtx first)
+static rtx_insn *
+conditionalize_block (rtx_insn *first)
 {
-  rtx insn;
+  rtx_insn *insn;
   rtx br_pat;
-  rtx end_blk_1_br = 0;
-  rtx end_blk_2_insn = 0;
-  rtx start_blk_3_lab = 0;
+  rtx_insn *end_blk_1_br = 0;
+  rtx_insn *end_blk_2_insn = 0;
+  rtx_insn *start_blk_3_lab = 0;
   int cond;
   int br_lab_num;
   int blk_size = 0;
@@ -2533,7 +2533,7 @@ conditionalize_block (rtx first)
   for (insn = NEXT_INSN (end_blk_1_br); insn != start_blk_3_lab; 
        insn = NEXT_INSN (insn))
     {
-      rtx newinsn;
+      rtx_insn *newinsn;
 
       if (INSN_DELETED_P (insn))
 	continue;
@@ -2581,7 +2581,7 @@ conditionalize_block (rtx first)
 static void
 conditionalize_optimization (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = get_insns (); insn; insn = conditionalize_block (insn))
     continue;
diff --git a/gcc/config/mep/mep.c b/gcc/config/mep/mep.c
index da03a54..d23a5e4 100644
--- a/gcc/config/mep/mep.c
+++ b/gcc/config/mep/mep.c
@@ -5653,7 +5653,7 @@ mep_jmp_return_reorg (rtx_insn *insns)
 	     && (NOTE_P (ret)
 		 || LABEL_P (ret)
 		 || GET_CODE (PATTERN (ret)) == USE))
-	ret = NEXT_INSN (ret);
+	ret = NEXT_INSN (as_a <rtx_insn *> (ret));
 
       if (ret)
 	{
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
index 7945d96..2f95bd2 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -1830,8 +1830,8 @@
 	(plus:SI (match_operand:SI 0 "register_operand" "d")
 		 (label_ref:SI (match_operand 1 "" ""))))
   (use (label_ref:SI (match_dup 1)))]
- "NEXT_INSN (operands[1]) != 0
-  && GET_CODE (PATTERN (NEXT_INSN (operands[1]))) == ADDR_DIFF_VEC
+ "NEXT_INSN (as_a <rtx_insn *> (operands[1])) != 0
+  && GET_CODE (PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[1])))) == ADDR_DIFF_VEC
   && flag_pic"
   {
     output_asm_insn ("addk\t%0,%0,r20",operands);
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 446d044..08b2c03 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -11117,7 +11117,6 @@ mips_expand_prologue (void)
   const struct mips_frame_info *frame;
   HOST_WIDE_INT size;
   unsigned int nargs;
-  rtx insn;
 
   if (cfun->machine->global_pointer != INVALID_REGNUM)
     {
@@ -11171,8 +11170,8 @@ mips_expand_prologue (void)
 
 	  /* Build the save instruction.  */
 	  mask = frame->mask;
-	  insn = mips16e_build_save_restore (false, &mask, &offset,
-					     nargs, step1);
+	  rtx insn = mips16e_build_save_restore (false, &mask, &offset,
+						 nargs, step1);
 	  RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
 	  mips_frame_barrier ();
  	  size -= step1;
@@ -11212,8 +11211,8 @@ mips_expand_prologue (void)
 		}
 
 	      /* Allocate the first part of the frame.  */
-	      insn = gen_add3_insn (stack_pointer_rtx, stack_pointer_rtx,
-				    GEN_INT (-step1));
+	      rtx insn = gen_add3_insn (stack_pointer_rtx, stack_pointer_rtx,
+					GEN_INT (-step1));
 	      RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
 	      mips_frame_barrier ();
 	      size -= step1;
@@ -11273,9 +11272,9 @@ mips_expand_prologue (void)
 	    }
 	  else
 	    {
-	      insn = gen_add3_insn (stack_pointer_rtx,
-				    stack_pointer_rtx,
-				    GEN_INT (-step1));
+	      rtx insn = gen_add3_insn (stack_pointer_rtx,
+					stack_pointer_rtx,
+					GEN_INT (-step1));
 	      RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
 	      mips_frame_barrier ();
 	      size -= step1;
@@ -11329,13 +11328,13 @@ mips_expand_prologue (void)
       offset = frame->hard_frame_pointer_offset;
       if (offset == 0)
 	{
-	  insn = mips_emit_move (hard_frame_pointer_rtx, stack_pointer_rtx);
+	  rtx insn = mips_emit_move (hard_frame_pointer_rtx, stack_pointer_rtx);
 	  RTX_FRAME_RELATED_P (insn) = 1;
 	}
       else if (SMALL_OPERAND (offset))
 	{
-	  insn = gen_add3_insn (hard_frame_pointer_rtx,
-				stack_pointer_rtx, GEN_INT (offset));
+	  rtx insn = gen_add3_insn (hard_frame_pointer_rtx,
+				    stack_pointer_rtx, GEN_INT (offset));
 	  RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
 	}
       else
@@ -11376,6 +11375,7 @@ mips_expand_prologue (void)
   /* We need to search back to the last use of K0 or K1.  */
   if (cfun->machine->interrupt_handler_p)
     {
+      rtx_insn *insn;
       for (insn = get_last_insn (); insn != NULL_RTX; insn = PREV_INSN (insn))
 	if (INSN_P (insn)
 	    && for_each_rtx (&PATTERN (insn), mips_kernel_reg_p, NULL))
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index f914ab6..935cf96 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -6088,7 +6088,7 @@
    (clobber (reg:SI MIPS16_T_REGNUM))]
   "TARGET_MIPS16_SHORT_JUMP_TABLES"
 {
-  rtx diff_vec = PATTERN (NEXT_INSN (operands[2]));
+  rtx diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[2])));
 
   gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
   
diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c
index acc5cc9..b64b445 100644
--- a/gcc/config/mn10300/mn10300.c
+++ b/gcc/config/mn10300/mn10300.c
@@ -3215,7 +3215,7 @@ mn10300_insert_setlb_lcc (rtx label, rtx branch)
 static bool
 mn10300_block_contains_call (basic_block block)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   FOR_BB_INSNS (block, insn)
     if (CALL_P (insn))
diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c
index 47e5ae4..5e28c2c 100644
--- a/gcc/config/nds32/nds32.c
+++ b/gcc/config/nds32/nds32.c
@@ -4584,7 +4584,7 @@ nds32_fp_as_gp_check_available (void)
       int symbol_count  = 0;
 
       int threshold;
-      rtx insn;
+      rtx_insn *insn;
 
       /* We check if there already requires prologue.
          Note that $gp will be saved in prologue for PIC code generation.
@@ -4680,7 +4680,7 @@ nds32_output_casesi_pc_relative (rtx *operands)
   enum machine_mode mode;
   rtx diff_vec;
 
-  diff_vec = PATTERN (NEXT_INSN (operands[1]));
+  diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[1])));
 
   gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
 
diff --git a/gcc/config/pa/pa-protos.h b/gcc/config/pa/pa-protos.h
index 800d69b..8b4e30c 100644
--- a/gcc/config/pa/pa-protos.h
+++ b/gcc/config/pa/pa-protos.h
@@ -22,7 +22,7 @@ along with GCC; see the file COPYING3.  If not see
 extern rtx pa_eh_return_handler_rtx (void);
 
 /* Used in insn-*.c.  */
-extern int pa_following_call (rtx);
+extern int pa_following_call (rtx_insn *);
 
 /* Define functions in pa.c and used in insn-output.c.  */
 
@@ -34,20 +34,20 @@ extern const char *pa_output_move_double (rtx *);
 extern const char *pa_output_fp_move_double (rtx *);
 extern const char *pa_output_block_move (rtx *, int);
 extern const char *pa_output_block_clear (rtx *, int);
-extern const char *pa_output_cbranch (rtx *, int, rtx);
-extern const char *pa_output_lbranch (rtx, rtx, int);
-extern const char *pa_output_bb (rtx *, int, rtx, int);
-extern const char *pa_output_bvb (rtx *, int, rtx, int);
-extern const char *pa_output_dbra (rtx *, rtx, int);
-extern const char *pa_output_movb (rtx *, rtx, int, int);
-extern const char *pa_output_parallel_movb (rtx *, rtx);
-extern const char *pa_output_parallel_addb (rtx *, rtx);
+extern const char *pa_output_cbranch (rtx *, int, rtx_insn *);
+extern const char *pa_output_lbranch (rtx, rtx_insn *, int);
+extern const char *pa_output_bb (rtx *, int, rtx_insn *, int);
+extern const char *pa_output_bvb (rtx *, int, rtx_insn *, int);
+extern const char *pa_output_dbra (rtx *, rtx_insn *, int);
+extern const char *pa_output_movb (rtx *, rtx_insn *, int, int);
+extern const char *pa_output_parallel_movb (rtx *, rtx_insn *);
+extern const char *pa_output_parallel_addb (rtx *, rtx_insn *);
 extern const char *pa_output_call (rtx_insn *, rtx, int);
 extern const char *pa_output_indirect_call (rtx_insn *, rtx);
-extern const char *pa_output_millicode_call (rtx, rtx);
-extern const char *pa_output_mul_insn (int, rtx);
-extern const char *pa_output_div_insn (rtx *, int, rtx);
-extern const char *pa_output_mod_insn (int, rtx);
+extern const char *pa_output_millicode_call (rtx_insn *, rtx);
+extern const char *pa_output_mul_insn (int, rtx_insn *);
+extern const char *pa_output_div_insn (rtx *, int, rtx_insn *);
+extern const char *pa_output_mod_insn (int, rtx_insn *);
 extern const char *pa_singlemove_string (rtx *);
 extern void pa_output_arg_descriptor (rtx);
 extern void pa_output_global_address (FILE *, rtx, int);
@@ -62,7 +62,7 @@ extern void pa_emit_bcond_fp (rtx[]);
 extern int pa_emit_move_sequence (rtx *, enum machine_mode, rtx);
 extern int pa_emit_hpdiv_const (rtx *, int);
 extern int pa_is_function_label_plus_const (rtx);
-extern int pa_jump_in_call_delay (rtx);
+extern int pa_jump_in_call_delay (rtx_insn *);
 extern int pa_fpstore_bypass_p (rtx, rtx);
 extern int pa_attr_length_millicode_call (rtx_insn *);
 extern int pa_attr_length_call (rtx_insn *, int);
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index a66524d..9579db0 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -98,8 +98,8 @@ static bool hppa_rtx_costs (rtx, int, int, int, int *, bool);
 static inline rtx force_mode (enum machine_mode, rtx);
 static void pa_reorg (void);
 static void pa_combine_instructions (void);
-static int pa_can_combine_p (rtx, rtx, rtx, int, rtx, rtx, rtx);
-static bool forward_branch_p (rtx);
+static int pa_can_combine_p (rtx, rtx_insn *, rtx_insn *, int, rtx, rtx, rtx);
+static bool forward_branch_p (rtx_insn *);
 static void compute_zdepwi_operands (unsigned HOST_WIDE_INT, unsigned *);
 static void compute_zdepdi_operands (unsigned HOST_WIDE_INT, unsigned *);
 static int compute_movmem_length (rtx);
@@ -5709,7 +5709,7 @@ import_milli (enum millicodes code)
    the proper registers.  */
 
 const char *
-pa_output_mul_insn (int unsignedp ATTRIBUTE_UNUSED, rtx insn)
+pa_output_mul_insn (int unsignedp ATTRIBUTE_UNUSED, rtx_insn *insn)
 {
   import_milli (mulI);
   return pa_output_millicode_call (insn, gen_rtx_SYMBOL_REF (Pmode, "$$mulI"));
@@ -5757,7 +5757,7 @@ pa_emit_hpdiv_const (rtx *operands, int unsignedp)
 }
 
 const char *
-pa_output_div_insn (rtx *operands, int unsignedp, rtx insn)
+pa_output_div_insn (rtx *operands, int unsignedp, rtx_insn *insn)
 {
   int divisor;
 
@@ -5811,7 +5811,7 @@ pa_output_div_insn (rtx *operands, int unsignedp, rtx insn)
 /* Output a $$rem millicode to do mod.  */
 
 const char *
-pa_output_mod_insn (int unsignedp, rtx insn)
+pa_output_mod_insn (int unsignedp, rtx_insn *insn)
 {
   if (unsignedp)
     {
@@ -6427,7 +6427,7 @@ use_skip_p (rtx insn)
    parameters.  */
 
 const char *
-pa_output_cbranch (rtx *operands, int negated, rtx insn)
+pa_output_cbranch (rtx *operands, int negated, rtx_insn *insn)
 {
   static char buf[100];
   bool useskip;
@@ -6638,7 +6638,7 @@ pa_output_cbranch (rtx *operands, int negated, rtx insn)
    bytes for the portable runtime, non-PIC and PIC cases, respectively.  */
 
 const char *
-pa_output_lbranch (rtx dest, rtx insn, int xdelay)
+pa_output_lbranch (rtx dest, rtx_insn *insn, int xdelay)
 {
   rtx xoperands[2];
  
@@ -6753,7 +6753,7 @@ pa_output_lbranch (rtx dest, rtx insn, int xdelay)
    above.  it returns the appropriate output template to emit the branch.  */
 
 const char *
-pa_output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which)
+pa_output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx_insn *insn, int which)
 {
   static char buf[100];
   bool useskip;
@@ -6938,7 +6938,7 @@ pa_output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which)
    branch.  */
 
 const char *
-pa_output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn,
+pa_output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx_insn *insn,
 	       int which)
 {
   static char buf[100];
@@ -7121,7 +7121,7 @@ pa_output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn,
    Note it may perform some output operations on its own before
    returning the final output string.  */
 const char *
-pa_output_dbra (rtx *operands, rtx insn, int which_alternative)
+pa_output_dbra (rtx *operands, rtx_insn *insn, int which_alternative)
 {
   int length = get_attr_length (insn);
 
@@ -7270,7 +7270,7 @@ pa_output_dbra (rtx *operands, rtx insn, int which_alternative)
    Note it may perform some output operations on its own before
    returning the final output string.  */
 const char *
-pa_output_movb (rtx *operands, rtx insn, int which_alternative,
+pa_output_movb (rtx *operands, rtx_insn *insn, int which_alternative,
 	     int reverse_comparison)
 {
   int length = get_attr_length (insn);
@@ -7549,7 +7549,7 @@ pa_attr_length_millicode_call (rtx_insn *insn)
    CALL_DEST is the routine we are calling.  */
 
 const char *
-pa_output_millicode_call (rtx insn, rtx call_dest)
+pa_output_millicode_call (rtx_insn *insn, rtx call_dest)
 {
   int attr_length = get_attr_length (insn);
   int seq_length = dbr_sequence_length ();
@@ -7667,7 +7667,7 @@ pa_output_millicode_call (rtx insn, rtx call_dest)
      sequence insn's address.  */
   if (INSN_ADDRESSES_SET_P ())
     {
-      seq_insn = NEXT_INSN (PREV_INSN (XVECEXP (final_sequence, 0, 0)));
+      seq_insn = NEXT_INSN (PREV_INSN (final_sequence->insn (0)));
       distance = (INSN_ADDRESSES (INSN_UID (JUMP_LABEL (NEXT_INSN (insn))))
 		  - INSN_ADDRESSES (INSN_UID (seq_insn)) - 8);
 
@@ -8054,7 +8054,7 @@ pa_output_call (rtx_insn *insn, rtx call_dest, int sibcall)
          sequence insn's address.  This would break the regular call/return@
          relationship assumed by the table based eh unwinder, so only do that
          if the call is not possibly throwing.  */
-      rtx seq_insn = NEXT_INSN (PREV_INSN (XVECEXP (final_sequence, 0, 0)));
+      rtx seq_insn = NEXT_INSN (PREV_INSN (final_sequence->insn (0)));
       int distance = (INSN_ADDRESSES (INSN_UID (JUMP_LABEL (NEXT_INSN (insn))))
 		      - INSN_ADDRESSES (INSN_UID (seq_insn)) - 8);
 
@@ -8798,7 +8798,7 @@ pa_shadd_constant_p (int val)
 /* Return TRUE if INSN branches forward.  */
 
 static bool
-forward_branch_p (rtx insn)
+forward_branch_p (rtx_insn *insn)
 {
   rtx lab = JUMP_LABEL (insn);
 
@@ -8821,7 +8821,7 @@ forward_branch_p (rtx insn)
 
 /* Return 1 if INSN is in the delay slot of a call instruction.  */
 int
-pa_jump_in_call_delay (rtx insn)
+pa_jump_in_call_delay (rtx_insn *insn)
 {
 
   if (! JUMP_P (insn))
@@ -8844,7 +8844,7 @@ pa_jump_in_call_delay (rtx insn)
 /* Output an unconditional move and branch insn.  */
 
 const char *
-pa_output_parallel_movb (rtx *operands, rtx insn)
+pa_output_parallel_movb (rtx *operands, rtx_insn *insn)
 {
   int length = get_attr_length (insn);
 
@@ -8884,7 +8884,7 @@ pa_output_parallel_movb (rtx *operands, rtx insn)
 /* Output an unconditional add and branch insn.  */
 
 const char *
-pa_output_parallel_addb (rtx *operands, rtx insn)
+pa_output_parallel_addb (rtx *operands, rtx_insn *insn)
 {
   int length = get_attr_length (insn);
 
@@ -8919,7 +8919,7 @@ pa_output_parallel_addb (rtx *operands, rtx insn)
    the delay slot of the call.  */
 
 int
-pa_following_call (rtx insn)
+pa_following_call (rtx_insn *insn)
 {
   if (! TARGET_JUMP_IN_DELAY)
     return 0;
@@ -8954,7 +8954,7 @@ pa_following_call (rtx insn)
 static void
 pa_reorg (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   remove_useless_addtr_insns (1);
 
@@ -9026,7 +9026,8 @@ pa_reorg (void)
 static void
 pa_combine_instructions (void)
 {
-  rtx anchor, new_rtx;
+  rtx_insn *anchor;
+  rtx new_rtx;
 
   /* This can get expensive since the basic algorithm is on the
      order of O(n^2) (or worse).  Only do it for -O2 or higher
@@ -9060,7 +9061,7 @@ pa_combine_instructions (void)
 	  || (anchor_attr == PA_COMBINE_TYPE_UNCOND_BRANCH
 	      && ! forward_branch_p (anchor)))
 	{
-	  rtx floater;
+	  rtx_insn *floater;
 
 	  for (floater = PREV_INSN (anchor);
 	       floater;
@@ -9075,7 +9076,7 @@ pa_combine_instructions (void)
 	      /* Anything except a regular INSN will stop our search.  */
 	      if (! NONJUMP_INSN_P (floater))
 		{
-		  floater = NULL_RTX;
+		  floater = NULL;
 		  break;
 		}
 
@@ -9135,7 +9136,7 @@ pa_combine_instructions (void)
 		  /* Anything except a regular INSN will stop our search.  */
 		  if (! NONJUMP_INSN_P (floater))
 		    {
-		      floater = NULL_RTX;
+		      floater = NULL;
 		      break;
 		    }
 
@@ -9208,11 +9209,12 @@ pa_combine_instructions (void)
 }
 
 static int
-pa_can_combine_p (rtx new_rtx, rtx anchor, rtx floater, int reversed, rtx dest,
+pa_can_combine_p (rtx new_rtx, rtx_insn *anchor, rtx_insn *floater,
+		  int reversed, rtx dest,
 		  rtx src1, rtx src2)
 {
   int insn_code_number;
-  rtx start, end;
+  rtx_insn *start, *end;
 
   /* Create a PARALLEL with the patterns of ANCHOR and
      FLOATER, try to recognize it, then test constraints
diff --git a/gcc/config/picochip/picochip.c b/gcc/config/picochip/picochip.c
index e58907c..3131d28 100644
--- a/gcc/config/picochip/picochip.c
+++ b/gcc/config/picochip/picochip.c
@@ -3434,9 +3434,9 @@ picochip_get_vliw_alu_id (void)
 
 /* Reset any information about the current VLIW packing status. */
 static void
-picochip_reset_vliw (rtx insn)
+picochip_reset_vliw (rtx_insn *insn)
 {
-  rtx local_insn = insn;
+  rtx_insn *local_insn = insn;
 
   /* Nothing to do if VLIW scheduling isn't being used. */
   if (picochip_schedule_type != DFA_TYPE_SPEED)
@@ -3876,7 +3876,7 @@ void
 picochip_final_prescan_insn (rtx_insn *insn, rtx * opvec ATTRIBUTE_UNUSED,
 			     int num_operands ATTRIBUTE_UNUSED)
 {
-  rtx local_insn;
+  rtx_insn *local_insn;
 
   picochip_current_prescan_insn = insn;
 
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 8cec569..b0f7c11 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -20600,7 +20600,7 @@ compute_save_world_info (rs6000_stack_t *info_ptr)
      are none.  (This check is expensive, but seldom executed.) */
   if (WORLD_SAVE_P (info_ptr))
     {
-      rtx insn;
+      rtx_insn *insn;
       for (insn = get_last_insn_anywhere (); insn; insn = PREV_INSN (insn))
 	if (CALL_P (insn) && SIBLING_CALL_P (insn))
 	  {
@@ -21793,7 +21793,7 @@ get_TOC_alias_set (void)
 static int
 uses_TOC (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     if (INSN_P (insn))
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 13d6a94..027a399 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -5226,7 +5226,7 @@ get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
 static const char *
 get_some_local_dynamic_name (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (cfun->machine->some_ld_name)
     return cfun->machine->some_ld_name;
@@ -6739,7 +6739,6 @@ static void
 s390_mainpool_finish (struct constant_pool *pool)
 {
   rtx base_reg = cfun->machine->base_reg;
-  rtx insn;
 
   /* If the pool is empty, we're done.  */
   if (pool->size == 0)
@@ -6760,7 +6759,7 @@ s390_mainpool_finish (struct constant_pool *pool)
      located in the .rodata section, so we emit it after the function.  */
   if (TARGET_CPU_ZARCH)
     {
-      insn = gen_main_base_64 (base_reg, pool->label);
+      rtx insn = gen_main_base_64 (base_reg, pool->label);
       insn = emit_insn_after (insn, pool->pool_insn);
       INSN_ADDRESSES_NEW (insn, -1);
       remove_insn (pool->pool_insn);
@@ -6778,7 +6777,7 @@ s390_mainpool_finish (struct constant_pool *pool)
   else if (INSN_ADDRESSES (INSN_UID (pool->emit_pool_after))
 	   + pool->size + 8 /* alignment slop */ < 4096)
     {
-      insn = gen_main_base_31_small (base_reg, pool->label);
+      rtx insn = gen_main_base_31_small (base_reg, pool->label);
       insn = emit_insn_after (insn, pool->pool_insn);
       INSN_ADDRESSES_NEW (insn, -1);
       remove_insn (pool->pool_insn);
@@ -6803,7 +6802,7 @@ s390_mainpool_finish (struct constant_pool *pool)
     {
       rtx pool_end = gen_label_rtx ();
 
-      insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
+      rtx insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
       insn = emit_jump_insn_after (insn, pool->pool_insn);
       JUMP_LABEL (insn) = pool_end;
       INSN_ADDRESSES_NEW (insn, -1);
@@ -6824,7 +6823,7 @@ s390_mainpool_finish (struct constant_pool *pool)
 
   /* Replace all literal pool references.  */
 
-  for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
+  for (rtx_insn *insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
       if (INSN_P (insn))
 	replace_ltrel_base (&PATTERN (insn));
@@ -8002,7 +8001,7 @@ s390_optimize_nonescaping_tx (void)
 
 	  if (XINT (SET_SRC (pat), 1) == UNSPECV_TBEGIN)
 	    {
-	      rtx tmp;
+	      rtx_insn *tmp;
 
 	      tbegin_insn = insn;
 
@@ -8956,7 +8955,7 @@ s390_emit_prologue (void)
     {
       rtx_insn *insns = s390_load_got ();
 
-      for (insn = insns; insn; insn = NEXT_INSN (insn))
+      for (rtx_insn *insn = insns; insn; insn = NEXT_INSN (insn))
 	annotate_constant_pool_refs (&PATTERN (insn));
 
       emit_insn (insns);
diff --git a/gcc/config/sh/sh-protos.h b/gcc/config/sh/sh-protos.h
index 27717c5..1d34651 100644
--- a/gcc/config/sh/sh-protos.h
+++ b/gcc/config/sh/sh-protos.h
@@ -103,7 +103,7 @@ extern const char *output_movepcrel (rtx, rtx[], enum machine_mode);
 extern const char *output_far_jump (rtx_insn *, rtx);
 
 extern rtx sfunc_uses_reg (rtx);
-extern int barrier_align (rtx);
+extern int barrier_align (rtx_insn *);
 extern int sh_loop_align (rtx);
 extern bool fp_zero_operand (rtx);
 extern bool fp_one_operand (rtx);
@@ -144,18 +144,18 @@ extern int shl_sext_length (rtx);
 extern bool gen_shl_sext (rtx, rtx, rtx, rtx);
 extern rtx gen_datalabel_ref (rtx);
 extern int regs_used (rtx, int);
-extern void fixup_addr_diff_vecs (rtx);
+extern void fixup_addr_diff_vecs (rtx_insn *);
 extern int get_dest_uid (rtx, int);
 extern void final_prescan_insn (rtx_insn *, rtx *, int);
 extern enum tls_model tls_symbolic_operand (rtx, enum machine_mode);
 extern bool system_reg_operand (rtx, enum machine_mode);
-extern bool reg_unused_after (rtx, rtx);
+extern bool reg_unused_after (rtx, rtx_insn *);
 extern void expand_sf_unop (rtx (*)(rtx, rtx, rtx), rtx *);
 extern void expand_sf_binop (rtx (*)(rtx, rtx, rtx, rtx), rtx *);
 extern void expand_df_unop (rtx (*)(rtx, rtx, rtx), rtx *);
 extern void expand_df_binop (rtx (*)(rtx, rtx, rtx, rtx), rtx *);
 extern int sh_insn_length_adjustment (rtx_insn *);
-extern bool sh_can_redirect_branch (rtx, rtx);
+extern bool sh_can_redirect_branch (rtx_insn *, rtx_insn *);
 extern void sh_expand_unop_v2sf (enum rtx_code, rtx, rtx);
 extern void sh_expand_binop_v2sf (enum rtx_code, rtx, rtx, rtx);
 extern bool sh_expand_t_scc (rtx *);
@@ -207,7 +207,7 @@ extern bool sh_cannot_change_mode_class
 	      (enum machine_mode, enum machine_mode, enum reg_class);
 extern bool sh_small_register_classes_for_mode_p (enum machine_mode);
 extern void sh_mark_label (rtx, int);
-extern bool check_use_sfunc_addr (rtx, rtx);
+extern bool check_use_sfunc_addr (rtx_insn *, rtx);
 
 #ifdef HARD_CONST
 extern void fpscr_set_from_mem (int, HARD_REG_SET);
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index 056eb32..f7f6e70 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -191,7 +191,7 @@ static bool broken_move (rtx_insn *);
 static bool mova_p (rtx_insn *);
 static rtx_insn *find_barrier (int, rtx_insn *, rtx_insn *);
 static bool noncall_uses_reg (rtx, rtx, rtx *);
-static rtx gen_block_redirect (rtx, int, int);
+static rtx_insn *gen_block_redirect (rtx_insn *, int, int);
 static void sh_reorg (void);
 static void sh_option_override (void);
 static void output_stack_adjust (int, rtx, int, HARD_REG_SET *, bool);
@@ -324,7 +324,7 @@ static void sh_conditional_register_usage (void);
 static bool sh_legitimate_constant_p (enum machine_mode, rtx);
 static int mov_insn_size (enum machine_mode, bool);
 static int mov_insn_alignment_mask (enum machine_mode, bool);
-static bool sequence_insn_p (rtx);
+static bool sequence_insn_p (rtx_insn *);
 static void sh_canonicalize_comparison (int *, rtx *, rtx *, bool);
 static void sh_canonicalize_comparison (enum rtx_code&, rtx&, rtx&,
 					enum machine_mode, bool);
@@ -4934,7 +4934,7 @@ fixup_mova (rtx_insn *mova)
     }
   else
     {
-      rtx worker = mova;
+      rtx_insn *worker = mova;
       rtx lab = gen_label_rtx ();
       rtx wpat, wpat0, wpat1, wsrc, target, base, diff;
 
@@ -5034,7 +5034,7 @@ find_barrier (int num_mova, rtx_insn *mova, rtx_insn *from)
   int si_limit;
   int hi_limit;
   rtx_insn *orig = from;
-  rtx last_got = NULL_RTX;
+  rtx_insn *last_got = NULL;
   rtx_insn *last_symoff = NULL;
 
   /* For HImode: range is 510, add 4 because pc counts from address of
@@ -5132,9 +5132,9 @@ find_barrier (int num_mova, rtx_insn *mova, rtx_insn *from)
 	     instructions.  (plus add r0,r12).
 	     Remember if we see one without the other.  */
 	  if (GET_CODE (src) == UNSPEC && PIC_ADDR_P (XVECEXP (src, 0, 0)))
-	    last_got = last_got ? NULL_RTX : from;
+	    last_got = last_got ? NULL : from;
 	  else if (PIC_ADDR_P (src))
-	    last_got = last_got ? NULL_RTX : from;
+	    last_got = last_got ? NULL : from;
 
 	  /* We must explicitly check the mode, because sometimes the
 	     front end will generate code to load unsigned constants into
@@ -5555,11 +5555,11 @@ regs_used (rtx x, int is_dest)
    pass 1.  Pass 2 if a definite blocking insn is needed.
    -1 is used internally to avoid deep recursion.
    If a blocking instruction is made or recognized, return it.  */
-static rtx
-gen_block_redirect (rtx jump, int addr, int need_block)
+static rtx_insn *
+gen_block_redirect (rtx_insn *jump, int addr, int need_block)
 {
   int dead = 0;
-  rtx prev = prev_nonnote_insn (jump);
+  rtx_insn *prev = prev_nonnote_insn (jump);
   rtx dest;
 
   /* First, check if we already have an instruction that satisfies our need.  */
@@ -5592,7 +5592,7 @@ gen_block_redirect (rtx jump, int addr, int need_block)
       && (INSN_ADDRESSES (INSN_UID (dest)) - addr + (unsigned) 4092
 	  > 4092 + 4098))
     {
-      rtx scan;
+      rtx_insn *scan;
       /* Don't look for the stack pointer as a scratch register,
 	 it would cause trouble if an interrupt occurred.  */
       unsigned attempt = 0x7fff, used;
@@ -5620,7 +5620,7 @@ gen_block_redirect (rtx jump, int addr, int need_block)
 	      break;
 	    }
 	}
-      for (used = dead = 0, scan = JUMP_LABEL (jump);
+      for (used = dead = 0, scan = JUMP_LABEL_AS_INSN (jump);
 	   (scan = NEXT_INSN (scan)); )
 	{
 	  enum rtx_code code;
@@ -5642,7 +5642,7 @@ gen_block_redirect (rtx jump, int addr, int need_block)
 	      if (code == JUMP_INSN)
 		{
 		  if (jump_left-- && simplejump_p (scan))
-		    scan = JUMP_LABEL (scan);
+		    scan = JUMP_LABEL_AS_INSN (scan);
 		  else
 		    break;
 		}
@@ -5659,7 +5659,7 @@ gen_block_redirect (rtx jump, int addr, int need_block)
 
   else if (optimize && need_block >= 0)
     {
-      rtx next = next_active_insn (next_active_insn (dest));
+      rtx_insn *next = next_active_insn (next_active_insn (dest));
       if (next && JUMP_P (next)
 	  && GET_CODE (PATTERN (next)) == SET
 	  && recog_memoized (next) == CODE_FOR_jump_compact)
@@ -5683,9 +5683,9 @@ gen_block_redirect (rtx jump, int addr, int need_block)
 	 it should try to schedule instructions from the target of the
 	 branch; simplejump_p fails for indirect jumps even if they have
 	 a JUMP_LABEL.  */
-      rtx insn = emit_insn_before (gen_indirect_jump_scratch
-				   (reg, GEN_INT (unspec_bbr_uid++)),
-				   jump);
+      rtx_insn *insn = emit_insn_before (gen_indirect_jump_scratch
+					 (reg, GEN_INT (unspec_bbr_uid++)),
+					 jump);
       /* ??? We would like this to have the scope of the jump, but that
 	 scope will change when a delay slot insn of an inner scope is added.
 	 Hence, after delay slot scheduling, we'll have to expect
@@ -5711,12 +5711,12 @@ struct far_branch
 {
   /* A label (to be placed) in front of the jump
      that jumps to our ultimate destination.  */
-  rtx near_label;
+  rtx_insn *near_label;
   /* Where we are going to insert it if we cannot move the jump any farther,
      or the jump itself if we have picked up an existing jump.  */
-  rtx insert_place;
+  rtx_insn *insert_place;
   /* The ultimate destination.  */
-  rtx far_label;
+  rtx_insn *far_label;
   struct far_branch *prev;
   /* If the branch has already been created, its address;
      else the address of its first prospective user.  */
@@ -5729,7 +5729,7 @@ static void
 gen_far_branch (struct far_branch *bp)
 {
   rtx insn = bp->insert_place;
-  rtx jump;
+  rtx_insn *jump;
   rtx label = gen_label_rtx ();
   int ok;
 
@@ -5779,13 +5779,14 @@ gen_far_branch (struct far_branch *bp)
 
 /* Fix up ADDR_DIFF_VECs.  */
 void
-fixup_addr_diff_vecs (rtx first)
+fixup_addr_diff_vecs (rtx_insn *first)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = first; insn; insn = NEXT_INSN (insn))
     {
-      rtx vec_lab, pat, prev, prevpat, x, braf_label;
+      rtx vec_lab, pat, prevpat, x, braf_label;
+      rtx_insn *prev;
 
       if (! JUMP_TABLE_DATA_P (insn)
 	  || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
@@ -5794,7 +5795,7 @@ fixup_addr_diff_vecs (rtx first)
       vec_lab = XEXP (XEXP (pat, 0), 0);
 
       /* Search the matching casesi_jump_2.  */
-      for (prev = vec_lab; ; prev = PREV_INSN (prev))
+      for (prev = as_a <rtx_insn *> (vec_lab); ; prev = PREV_INSN (prev))
 	{
 	  if (!JUMP_P (prev))
 	    continue;
@@ -5827,7 +5828,7 @@ fixup_addr_diff_vecs (rtx first)
 /* BARRIER_OR_LABEL is either a BARRIER or a CODE_LABEL immediately following
    a barrier.  Return the base 2 logarithm of the desired alignment.  */
 int
-barrier_align (rtx barrier_or_label)
+barrier_align (rtx_insn *barrier_or_label)
 {
   rtx next, pat;
 
@@ -5892,7 +5893,7 @@ barrier_align (rtx barrier_or_label)
 
       /* Skip to the insn before the JUMP_INSN before the barrier under
 	 investigation.  */
-      rtx prev = prev_real_insn (prev_active_insn (barrier_or_label));
+      rtx_insn *prev = prev_real_insn (prev_active_insn (barrier_or_label));
 
       for (slot = 2, credit = (1 << (CACHE_LOG - 2)) + 2;
 	   credit >= 0 && prev && NONJUMP_INSN_P (prev);
@@ -5902,9 +5903,9 @@ barrier_align (rtx barrier_or_label)
 	  if (GET_CODE (PATTERN (prev)) == USE
 	      || GET_CODE (PATTERN (prev)) == CLOBBER)
 	    continue;
-	  if (GET_CODE (PATTERN (prev)) == SEQUENCE)
+	  if (rtx_sequence *prev_seq = dyn_cast <rtx_sequence *> (PATTERN (prev)))
 	    {
-	      prev = XVECEXP (PATTERN (prev), 0, 1);
+	      prev = prev_seq->insn (1);
 	      if (INSN_UID (prev) == INSN_UID (next))
 		{
 	  	  /* Delay slot was filled with insn at jump target.  */
@@ -5920,7 +5921,7 @@ barrier_align (rtx barrier_or_label)
 	}
       if (prev && jump_to_label_p (prev))
 	{
-	  rtx x;
+	  rtx_insn *x;
 	  if (jump_to_next
 	      || next_real_insn (JUMP_LABEL (prev)) == next
 	      /* If relax_delay_slots() decides NEXT was redundant
@@ -6240,7 +6241,7 @@ sh_reorg (void)
 		   || (prev_nonnote_insn (insn)
 		       == XEXP (MOVA_LABELREF (mova), 0))))
 	{
-	  rtx scan;
+	  rtx_insn *scan;
 	  int total;
 
 	  num_mova--;
@@ -6441,7 +6442,7 @@ sh_reorg (void)
 int
 get_dest_uid (rtx label, int max_uid)
 {
-  rtx dest = next_real_insn (label);
+  rtx_insn *dest = next_real_insn (label);
   int dest_uid;
   if (! dest)
     /* This can happen for an undefined label.  */
@@ -6494,14 +6495,14 @@ split_branches (rtx_insn *first)
 	enum attr_type type = get_attr_type (insn);
 	if (type == TYPE_CBRANCH)
 	  {
-	    rtx next, beyond;
+	    rtx_insn *next, *beyond;
 
 	    if (get_attr_length (insn) > 4)
 	      {
 		rtx src = SET_SRC (PATTERN (insn));
 		rtx olabel = XEXP (XEXP (src, 1), 0);
 		int addr = INSN_ADDRESSES (INSN_UID (insn));
-		rtx label = 0;
+		rtx_insn *label = 0;
 		int dest_uid = get_dest_uid (olabel, max_uid);
 		struct far_branch *bp = uid_branch[dest_uid];
 
@@ -6522,8 +6523,9 @@ split_branches (rtx_insn *first)
 		    uid_branch[dest_uid] = bp;
 		    bp->prev = far_branch_list;
 		    far_branch_list = bp;
-		    bp->far_label
-		      = XEXP (XEXP (SET_SRC (PATTERN (insn)), 1), 0);
+		    bp->far_label = as_a <rtx_insn *> (
+				      XEXP (XEXP (SET_SRC (PATTERN (insn)), 1),
+					    0));
 		    LABEL_NUSES (bp->far_label)++;
 		  }
 		else
@@ -6531,7 +6533,7 @@ split_branches (rtx_insn *first)
 		    label = bp->near_label;
 		    if (! label && bp->address - addr >= CONDJUMP_MIN)
 		      {
-			rtx block = bp->insert_place;
+			rtx_insn *block = bp->insert_place;
 
 			if (GET_CODE (PATTERN (block)) == RETURN)
 			  block = PREV_INSN (block);
@@ -6604,13 +6606,14 @@ split_branches (rtx_insn *first)
 	else if (type == TYPE_JUMP || type == TYPE_RETURN)
 	  {
 	    int addr = INSN_ADDRESSES (INSN_UID (insn));
-	    rtx far_label = 0;
+	    rtx_insn *far_label = 0;
 	    int dest_uid = 0;
 	    struct far_branch *bp;
 
 	    if (type == TYPE_JUMP)
 	      {
-		far_label = XEXP (SET_SRC (PATTERN (insn)), 0);
+		far_label = as_a <rtx_insn *> (
+			      XEXP (SET_SRC (PATTERN (insn)), 0));
 		dest_uid = get_dest_uid (far_label, max_uid);
 		if (! dest_uid)
 		  {
@@ -9900,7 +9903,7 @@ branch_dest (rtx branch)
    We assume REG is a reload reg, and therefore does
    not live past labels.  It may live past calls or jumps though.  */
 bool
-reg_unused_after (rtx reg, rtx insn)
+reg_unused_after (rtx reg, rtx_insn *insn)
 {
   enum rtx_code code;
   rtx set;
@@ -10140,7 +10143,7 @@ fpscr_set_from_mem (int mode, HARD_REG_SET regs_live)
 #endif
 
 static bool
-sequence_insn_p (rtx insn)
+sequence_insn_p (rtx_insn *insn)
 {
   rtx_insn *prev, *next;
 
@@ -10635,7 +10638,8 @@ sh_delegitimize_address (rtx orig_x)
 static rtx
 mark_constant_pool_use (rtx x)
 {
-  rtx insn, lab, pattern;
+  rtx_insn *insn, *lab;
+  rtx pattern;
 
   if (x == NULL_RTX)
     return x;
@@ -10652,8 +10656,8 @@ mark_constant_pool_use (rtx x)
 
   /* Get the first label in the list of labels for the same constant
      and delete another labels in the list.  */
-  lab = x;
-  for (insn = PREV_INSN (x); insn; insn = PREV_INSN (insn))
+  lab = as_a <rtx_insn *> (x);
+  for (insn = PREV_INSN (lab); insn; insn = PREV_INSN (insn))
     {
       if (!LABEL_P (insn)
 	  || LABEL_REFS (insn) != NEXT_INSN (insn))
@@ -10661,11 +10665,11 @@ mark_constant_pool_use (rtx x)
       lab = insn;
     }
 
-  for (insn = LABEL_REFS (lab); insn; insn = LABEL_REFS (insn))
+  for (rtx insn = LABEL_REFS (lab); insn; insn = LABEL_REFS (insn))
     INSN_DELETED_P (insn) = 1;
 
   /* Mark constants in a window.  */
-  for (insn = NEXT_INSN (x); insn; insn = NEXT_INSN (insn))
+  for (insn = NEXT_INSN (as_a <rtx_insn *> (x)); insn; insn = NEXT_INSN (insn))
     {
       if (!NONJUMP_INSN_P (insn))
 	continue;
@@ -10699,7 +10703,7 @@ mark_constant_pool_use (rtx x)
    of an unconditional jump BRANCH2.  We only want to do this if the
    resulting branch will have a short displacement.  */
 bool
-sh_can_redirect_branch (rtx branch1, rtx branch2)
+sh_can_redirect_branch (rtx_insn *branch1, rtx_insn *branch2)
 {
   if (flag_expensive_optimizations && simplejump_p (branch2))
     {
@@ -12669,7 +12673,7 @@ extract_sfunc_addr (rtx insn)
    INSN is the use_sfunc_addr instruction, and REG is the register it
    guards.  */
 bool
-check_use_sfunc_addr (rtx insn, rtx reg)
+check_use_sfunc_addr (rtx_insn *insn, rtx reg)
 {
   /* Search for the sfunc.  It should really come right after INSN.  */
   while ((insn = NEXT_INSN (insn)))
@@ -12679,8 +12683,8 @@ check_use_sfunc_addr (rtx insn, rtx reg)
       if (! INSN_P (insn))
 	continue;
 
-      if (GET_CODE (PATTERN (insn)) == SEQUENCE)
-	insn = XVECEXP (PATTERN (insn), 0, 0);
+      if (rtx_sequence *seq = dyn_cast<rtx_sequence *> (PATTERN (insn)))
+	insn = seq->insn (0);
       if (GET_CODE (PATTERN (insn)) != PARALLEL
 	  || get_attr_type (insn) != TYPE_SFUNC)
 	continue;
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index d998af9..4f86308 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -9959,7 +9959,8 @@ label:
   sh_expand_epilogue (true);
   if (TARGET_SHCOMPACT)
     {
-      rtx insn, set;
+      rtx_insn *insn;
+      rtx set;
 
       /* If epilogue clobbers r0, preserve it in macl.  */
       for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
@@ -10841,7 +10842,7 @@ label:
    (clobber (match_scratch:SI 3 "=X,1"))]
   "TARGET_SH1"
 {
-  rtx diff_vec = PATTERN (NEXT_INSN (operands[2]));
+  rtx diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[2])));
 
   gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
 
@@ -10875,7 +10876,7 @@ label:
    (clobber (match_operand:SI 4 "" "=X,1"))]
   "TARGET_SH2 && reload_completed && flag_pic"
 {
-  rtx diff_vec = PATTERN (NEXT_INSN (operands[2]));
+  rtx diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[2])));
   gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
 
   switch (GET_MODE (diff_vec))
@@ -10913,7 +10914,7 @@ label:
 		    UNSPEC_CASESI)))]
   "TARGET_SHMEDIA"
 {
-  rtx diff_vec = PATTERN (NEXT_INSN (operands[2]));
+  rtx diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[2])));
 
   gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
 
@@ -10940,7 +10941,7 @@ label:
 		      (label_ref:DI (match_operand 3 "" ""))] UNSPEC_CASESI)))]
   "TARGET_SHMEDIA"
 {
-  rtx diff_vec = PATTERN (NEXT_INSN (operands[3]));
+  rtx diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[3])));
 
   gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
 
diff --git a/gcc/config/sh/sh_optimize_sett_clrt.cc b/gcc/config/sh/sh_optimize_sett_clrt.cc
index 84ad299..10eb15a 100644
--- a/gcc/config/sh/sh_optimize_sett_clrt.cc
+++ b/gcc/config/sh/sh_optimize_sett_clrt.cc
@@ -88,9 +88,9 @@ private:
   struct ccreg_value
   {
     // The insn at which the ccreg value was determined.
-    // Might be NULL_RTX if e.g. an unknown value is recorded for an
+    // Might be NULL if e.g. an unknown value is recorded for an
     // empty basic block.
-    rtx insn;
+    rtx_insn *insn;
 
     // The basic block where the insn was discovered.
     basic_block bb;
@@ -111,7 +111,7 @@ private:
   // Given a start insn and its basic block, recursively determine all
   // possible ccreg values in all basic block paths that can lead to the
   // start insn.
-  void find_last_ccreg_values (rtx start_insn, basic_block bb,
+  void find_last_ccreg_values (rtx_insn *start_insn, basic_block bb,
 			       std::vector<ccreg_value>& values_out,
 			       std::vector<basic_block>& prev_visited_bb) const;
 
@@ -206,7 +206,7 @@ sh_optimize_sett_clrt::execute (function* fun)
   // be optimized.
   basic_block bb;
   FOR_EACH_BB_REVERSE_FN (bb, fun)
-    for (rtx next_i, i = NEXT_INSN (BB_HEAD (bb));
+    for (rtx_insn *next_i, *i = NEXT_INSN (BB_HEAD (bb));
 	 i != NULL_RTX && i != BB_END (bb); i = next_i)
       {
 	next_i = NEXT_INSN (i);
@@ -310,7 +310,7 @@ sh_optimize_sett_clrt
 
 void
 sh_optimize_sett_clrt
-::find_last_ccreg_values (rtx start_insn, basic_block bb,
+::find_last_ccreg_values (rtx_insn *start_insn, basic_block bb,
 			  std::vector<ccreg_value>& values_out,
 			  std::vector<basic_block>& prev_visited_bb) const
 {
@@ -323,7 +323,7 @@ sh_optimize_sett_clrt
     log_msg ("(prev visited [bb %d])", prev_visited_bb.back ()->index);
   log_msg ("\n");
 
-  for (rtx i = start_insn; i != NULL_RTX && i != PREV_INSN (BB_HEAD (bb));
+  for (rtx_insn *i = start_insn; i != NULL && i != PREV_INSN (BB_HEAD (bb));
        i = PREV_INSN (i))
     {
       if (!INSN_P (i))
diff --git a/gcc/config/sh/sh_treg_combine.cc b/gcc/config/sh/sh_treg_combine.cc
index ebc80a5..757a047 100644
--- a/gcc/config/sh/sh_treg_combine.cc
+++ b/gcc/config/sh/sh_treg_combine.cc
@@ -250,8 +250,8 @@ In order to handle cases such as above the RTL pass does the following:
 
 struct set_of_reg
 {
-  // The insn where the search stopped or NULL_RTX.
-  rtx insn;
+  // The insn where the search stopped or NULL.
+  rtx_insn *insn;
 
   // The set rtx of the specified reg if found, NULL_RTX otherwise.
   // Notice that the set rtx can also be in a parallel.
@@ -281,14 +281,14 @@ struct set_of_reg
 // Given a reg rtx and a start insn find the insn (in the same basic block)
 // that sets the reg.
 static set_of_reg
-find_set_of_reg_bb (rtx reg, rtx insn)
+find_set_of_reg_bb (rtx reg, rtx_insn *insn)
 {
   set_of_reg result = { insn, NULL_RTX };
 
-  if (!REG_P (reg) || insn == NULL_RTX)
+  if (!REG_P (reg) || insn == NULL)
     return result;
 
-  for (result.insn = insn; result.insn != NULL_RTX;
+  for (result.insn = insn; result.insn != NULL;
        result.insn = prev_nonnote_insn_bb (result.insn))
     {
       if (BARRIER_P (result.insn))
@@ -338,7 +338,7 @@ is_adjacent_bb (basic_block a, basic_block b)
 
 // Internal function of trace_reg_uses.
 static void
-trace_reg_uses_1 (rtx reg, rtx start_insn, basic_block bb, int& count,
+trace_reg_uses_1 (rtx reg, rtx_insn *start_insn, basic_block bb, int& count,
 		  std::vector<basic_block>& visited_bb, rtx abort_at_insn)
 {
   if (bb == NULL)
@@ -360,7 +360,7 @@ trace_reg_uses_1 (rtx reg, rtx start_insn, basic_block bb, int& count,
   if (end_insn == NULL_RTX)
     log_return_void ("[bb %d] end_insn is null\n", bb->index);
 
-  for (rtx i = NEXT_INSN (start_insn); i != end_insn; i = NEXT_INSN (i))
+  for (rtx_insn *i = NEXT_INSN (start_insn); i != end_insn; i = NEXT_INSN (i))
     {
       if (INSN_P (i))
 	{
@@ -396,7 +396,7 @@ trace_reg_uses_1 (rtx reg, rtx start_insn, basic_block bb, int& count,
 // that insn.  If the insn 'abort_at_insn' uses the specified reg, it is also
 // counted.
 static int
-trace_reg_uses (rtx reg, rtx start_insn, rtx abort_at_insn)
+trace_reg_uses (rtx reg, rtx_insn *start_insn, rtx abort_at_insn)
 {
   log_msg ("\ntrace_reg_uses\nreg = ");
   log_rtx (reg);
@@ -463,7 +463,7 @@ private:
   // A ccreg trace for a conditional branch.
   struct cbranch_trace
   {
-    rtx cbranch_insn;
+    rtx_insn *cbranch_insn;
     branch_condition_type_t cbranch_type;
 
     // The comparison against zero right before the conditional branch.
@@ -473,7 +473,7 @@ private:
     // the BB of the cbranch itself and might be empty.
     std::list<bb_entry> bb_entries;
 
-    cbranch_trace (rtx insn)
+    cbranch_trace (rtx_insn *insn)
     : cbranch_insn (insn),
       cbranch_type (unknown_branch_condition),
       setcc ()
@@ -537,7 +537,8 @@ private:
     set_not_found,
     other_set_found
   };
-  record_return_t record_set_of_reg (rtx reg, rtx start_insn, bb_entry& e);
+  record_return_t record_set_of_reg (rtx reg, rtx_insn *start_insn,
+                                     bb_entry& e);
 
   // Tells whether the cbranch insn of the specified bb_entry can be removed
   // safely without triggering any side effects.
@@ -584,7 +585,7 @@ private:
 
   // Given a branch insn, try to optimize its branch condition.
   // If any insns are modified or added they are added to 'm_touched_insns'.
-  void try_optimize_cbranch (rtx i);
+  void try_optimize_cbranch (rtx_insn *i);
 };
 
 
@@ -671,7 +672,7 @@ sh_treg_combine::is_inverted_ccreg (const_rtx x) const
 }
 
 sh_treg_combine::record_return_t
-sh_treg_combine::record_set_of_reg (rtx reg, rtx start_insn,
+sh_treg_combine::record_set_of_reg (rtx reg, rtx_insn *start_insn,
 				    bb_entry& new_entry)
 {
   log_msg ("\n[bb %d]\n", new_entry.bb->index);
@@ -681,7 +682,7 @@ sh_treg_combine::record_set_of_reg (rtx reg, rtx start_insn,
 
   new_entry.cstore_type = cstore_unknown;
 
-  for (rtx i = start_insn; i != NULL_RTX; )
+  for (rtx_insn *i = start_insn; i != NULL; )
     {
       new_entry.cstore = find_set_of_reg_bb (reg, i);
 
@@ -792,7 +793,7 @@ sh_treg_combine::can_remove_cstore (const bb_entry& e,
   // must not be a usage of the copied regs between the reg-reg copies.
   // Otherwise we assume that the result of the cstore is used in some
   // other way.
-  rtx prev_insn = e.cstore.insn;
+  rtx_insn *prev_insn = e.cstore.insn;
   for (std::vector<set_of_reg>::const_reverse_iterator i =
 	   e.cstore_reg_reg_copies.rbegin ();
        i != e.cstore_reg_reg_copies.rend (); ++i)
@@ -1263,7 +1264,7 @@ sh_treg_combine::try_eliminate_cstores (cbranch_trace& trace,
 }
 
 void
-sh_treg_combine::try_optimize_cbranch (rtx insn)
+sh_treg_combine::try_optimize_cbranch (rtx_insn *insn)
 {
   cbranch_trace trace (insn);
 
@@ -1469,7 +1470,7 @@ sh_treg_combine::execute (function *fun)
   basic_block bb;
   FOR_EACH_BB_FN (bb, fun)
     {
-      rtx i = BB_END (bb);
+      rtx_insn *i = BB_END (bb);
       if (any_condjump_p (i) && onlyjump_p (i))
 	try_optimize_cbranch (i);
     }
diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index c6b9802..aab9376 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -83,7 +83,7 @@ extern void emit_conditional_branch_insn (rtx []);
 extern int registers_ok_for_ldd_peep (rtx, rtx);
 extern int mems_ok_for_ldd_peep (rtx, rtx, rtx);
 extern rtx widen_mem_for_ldd_peep (rtx, rtx, enum machine_mode);
-extern int empty_delay_slot (rtx);
+extern int empty_delay_slot (rtx_insn *);
 extern int emit_cbcond_nop (rtx);
 extern int eligible_for_call_delay (rtx);
 extern int eligible_for_return_delay (rtx);
@@ -99,7 +99,7 @@ extern int memory_ok_for_ldd (rtx);
 extern int v9_regcmp_p (enum rtx_code);
 /* Function used for V8+ code generation.  Returns 1 if the high
    32 bits of REG are 0 before INSN.  */   
-extern int sparc_check_64 (rtx, rtx);
+extern int sparc_check_64 (rtx, rtx_insn *);
 extern rtx gen_df_reg (rtx, int);
 extern void sparc_expand_compare_and_swap (rtx op[]);
 extern void sparc_expand_vector_init (rtx, rtx);
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 368d458..0710b08 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -550,7 +550,7 @@ static bool sparc_legitimate_constant_p (enum machine_mode, rtx);
 static rtx sparc_builtin_saveregs (void);
 static int epilogue_renumber (rtx *, int);
 static bool sparc_assemble_integer (rtx, unsigned int, int);
-static int set_extends (rtx);
+static int set_extends (rtx_insn *);
 static void sparc_asm_function_prologue (FILE *, HOST_WIDE_INT);
 static void sparc_asm_function_epilogue (FILE *, HOST_WIDE_INT);
 #ifdef TARGET_SOLARIS
@@ -875,7 +875,7 @@ mem_ref (rtx x)
 static unsigned int
 sparc_do_work_around_errata (void)
 {
-  rtx insn, next;
+  rtx_insn *insn, *next;
 
   /* Force all instructions to be split into their final form.  */
   split_all_insns_noflow ();
@@ -887,8 +887,9 @@ sparc_do_work_around_errata (void)
       rtx set;
 
       /* Look into the instruction in a delay slot.  */
-      if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
-	insn = XVECEXP (PATTERN (insn), 0, 1);
+      if (NONJUMP_INSN_P (insn))
+	if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
+	  insn = seq->insn (1);
 
       /* Look for a single-word load into an odd-numbered FP register.  */
       if (sparc_fix_at697f
@@ -3426,7 +3427,7 @@ emit_tfmode_cvt (enum rtx_code code, rtx *operands)
    nop into its delay slot.  */
 
 int
-empty_delay_slot (rtx insn)
+empty_delay_slot (rtx_insn *insn)
 {
   rtx seq;
 
@@ -9614,7 +9615,7 @@ sparc_issue_rate (void)
 }
 
 static int
-set_extends (rtx insn)
+set_extends (rtx_insn *insn)
 {
   register rtx pat = PATTERN (insn);
 
@@ -9780,7 +9781,7 @@ sparc_output_deferred_case_vectors (void)
    unknown.  Return 1 if the high bits are zero, -1 if the register is
    sign extended.  */
 int
-sparc_check_64 (rtx x, rtx insn)
+sparc_check_64 (rtx x, rtx_insn *insn)
 {
   /* If a register is set only once it is safe to ignore insns this
      code does not know how to handle.  The loop will either recognize
diff --git a/gcc/config/spu/spu.md b/gcc/config/spu/spu.md
index 3ac4bfc..e955478 100644
--- a/gcc/config/spu/spu.md
+++ b/gcc/config/spu/spu.md
@@ -1733,7 +1733,7 @@
     rtx t0_hi = gen_rtx_SUBREG (HImode, t0, 2);
     rtx t1_hi = gen_rtx_SUBREG (HImode, t1, 2);
 
-    rtx insn = emit_insn (gen_lshrsi3 (t0, operands[1], GEN_INT (16)));
+    rtx_insn *insn = emit_insn (gen_lshrsi3 (t0, operands[1], GEN_INT (16)));
     emit_insn (gen_lshrsi3 (t1, operands[2], GEN_INT (16)));
     emit_insn (gen_umulhisi3 (t2, op1_hi, op2_hi));
     emit_insn (gen_mpyh_si (t3, operands[1], operands[2]));
@@ -1794,7 +1794,7 @@
     rtx op2_hi = gen_rtx_SUBREG (HImode, operands[2], 2);
     rtx t0_hi = gen_rtx_SUBREG (HImode, t0, 2);
 
-    rtx insn = emit_insn (gen_rotlsi3 (t0, operands[2], GEN_INT (16)));
+    rtx_insn *insn = emit_insn (gen_rotlsi3 (t0, operands[2], GEN_INT (16)));
     emit_insn (gen_umulhisi3 (t1, op1_hi, op2_hi));
     emit_insn (gen_umulhisi3 (t2, op1_hi, t0_hi));
     emit_insn (gen_mpyhhu_si (t3, operands[1], t0));
diff --git a/gcc/config/stormy16/stormy16.c b/gcc/config/stormy16/stormy16.c
index 6a64fcc..c1b3054 100644
--- a/gcc/config/stormy16/stormy16.c
+++ b/gcc/config/stormy16/stormy16.c
@@ -263,7 +263,7 @@ xstormy16_split_cbranch (enum machine_mode mode, rtx label, rtx comparison,
 {
   rtx op0 = XEXP (comparison, 0);
   rtx op1 = XEXP (comparison, 1);
-  rtx seq, last_insn;
+  rtx_insn *seq, *last_insn;
   rtx compare;
 
   start_sequence ();
@@ -2389,7 +2389,7 @@ xstormy16_expand_builtin (tree exp, rtx target,
    patterns.  */
 
 static void
-combine_bnp (rtx insn)
+combine_bnp (rtx_insn *insn)
 {
   int insn_code, regno, need_extend;
   unsigned int mask;
@@ -2606,7 +2606,7 @@ combine_bnp (rtx insn)
 static void
 xstormy16_reorg (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c
index 1f8780f..70d3eab 100644
--- a/gcc/config/v850/v850.c
+++ b/gcc/config/v850/v850.c
@@ -1113,15 +1113,15 @@ ep_memory_operand (rtx op, enum machine_mode mode, int unsigned_load)
    taking care to save and preserve the ep.  */
 
 static void
-substitute_ep_register (rtx first_insn,
-                        rtx last_insn,
+substitute_ep_register (rtx_insn *first_insn,
+                        rtx_insn *last_insn,
                         int uses,
                         int regno,
                         rtx * p_r1,
                         rtx * p_ep)
 {
   rtx reg = gen_rtx_REG (Pmode, regno);
-  rtx insn;
+  rtx_insn *insn;
 
   if (!*p_r1)
     {
@@ -1226,8 +1226,8 @@ v850_reorg (void)
   struct
   {
     int uses;
-    rtx first_insn;
-    rtx last_insn;
+    rtx_insn *first_insn;
+    rtx_insn *last_insn;
   }
   regs[FIRST_PSEUDO_REGISTER];
 
@@ -1235,7 +1235,7 @@ v850_reorg (void)
   int use_ep = FALSE;
   rtx r1 = NULL_RTX;
   rtx ep = NULL_RTX;
-  rtx insn;
+  rtx_insn *insn;
   rtx pattern;
 
   /* If not ep mode, just return now.  */
@@ -1245,8 +1245,8 @@ v850_reorg (void)
   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
     {
       regs[i].uses = 0;
-      regs[i].first_insn = NULL_RTX;
-      regs[i].last_insn = NULL_RTX;
+      regs[i].first_insn = NULL;
+      regs[i].last_insn = NULL;
     }
 
   for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
@@ -1279,8 +1279,8 @@ v850_reorg (void)
 	  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
 	    {
 	      regs[i].uses = 0;
-	      regs[i].first_insn = NULL_RTX;
-	      regs[i].last_insn = NULL_RTX;
+	      regs[i].first_insn = NULL;
+	      regs[i].last_insn = NULL;
 	    }
 	  break;
 
@@ -1412,8 +1412,8 @@ v850_reorg (void)
 			  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
 			    {
 			      regs[i].uses = 0;
-			      regs[i].first_insn = NULL_RTX;
-			      regs[i].last_insn = NULL_RTX;
+			      regs[i].first_insn = NULL;
+			      regs[i].last_insn = NULL;
 			    }
 			}
 		    }
@@ -1421,8 +1421,8 @@ v850_reorg (void)
 		  for (i = regno; i < endregno; i++)
 		    {
 		      regs[i].uses = 0;
-		      regs[i].first_insn = NULL_RTX;
-		      regs[i].last_insn = NULL_RTX;
+		      regs[i].first_insn = NULL;
+		      regs[i].last_insn = NULL;
 		    }
 		}
 	    }
diff --git a/gcc/final.c b/gcc/final.c
index ddadc41..abba621 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -188,7 +188,7 @@ static int app_on;
 /* If we are outputting an insn sequence, this contains the sequence rtx.
    Zero otherwise.  */
 
-rtx final_sequence;
+rtx_sequence *final_sequence;
 
 #ifdef ASSEMBLER_DIALECT
 
@@ -1278,13 +1278,14 @@ shorten_branches (rtx_insn *first)
 	    {
 	      rtx body = PATTERN (insn);
 	      int old_length = insn_lengths[uid];
-	      rtx rel_lab = XEXP (XEXP (body, 0), 0);
+	      rtx_insn *rel_lab =
+		as_a_nullable <rtx_insn *> (XEXP (XEXP (body, 0), 0));
 	      rtx min_lab = XEXP (XEXP (body, 2), 0);
 	      rtx max_lab = XEXP (XEXP (body, 3), 0);
 	      int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
 	      int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
 	      int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
-	      rtx prev;
+	      rtx_insn *prev;
 	      int rel_align = 0;
 	      addr_diff_vec_flags flags;
 	      enum machine_mode vec_mode;
@@ -2618,7 +2619,7 @@ final_scan_insn (rtx uncast_insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 	    /* A delayed-branch sequence */
 	    int i;
 
-	    final_sequence = body;
+	    final_sequence = seq;
 
 	    /* The first insn in this SEQUENCE might be a JUMP_INSN that will
 	       force the restoration of a comparison that was previously
diff --git a/gcc/function.c b/gcc/function.c
index 2462ea2..782d5be 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -3008,7 +3008,8 @@ assign_parm_setup_reg (struct assign_parm_data_all *all, tree parm,
 	  && insn_operand_matches (icode, 1, op1))
 	{
 	  enum rtx_code code = unsignedp ? ZERO_EXTEND : SIGN_EXTEND;
-	  rtx insn, insns, t = op1;
+	  rtx_insn *insn, *insns;
+	  rtx t = op1;
 	  HARD_REG_SET hardregs;
 
 	  start_sequence ();
@@ -3027,8 +3028,9 @@ assign_parm_setup_reg (struct assign_parm_data_all *all, tree parm,
 	    }
 	  else
 	    t = op1;
-	  insn = gen_extend_insn (op0, t, promoted_nominal_mode,
-				  data->passed_mode, unsignedp);
+	  insn = as_a <rtx_insn *> (
+		   gen_extend_insn (op0, t, promoted_nominal_mode,
+				    data->passed_mode, unsignedp));
 	  emit_insn (insn);
 	  insns = get_insns ();
 
@@ -5631,7 +5633,7 @@ thread_prologue_and_epilogue_insns (void)
   if (HAVE_prologue)
     {
       start_sequence ();
-      rtx_insn *seq = as_a <rtx_insn *> (gen_prologue ());
+      rtx_insn *seq = as_a_nullable <rtx_insn *> (gen_prologue ());
       emit_insn (seq);
 
       /* Insert an explicit USE for the frame pointer
diff --git a/gcc/genattr.c b/gcc/genattr.c
index d2d12e0..44c9863 100644
--- a/gcc/genattr.c
+++ b/gcc/genattr.c
@@ -177,7 +177,7 @@ main (int argc, char **argv)
 	  if (! have_delay)
 	    {
 	      printf ("extern int num_delay_slots (rtx);\n");
-	      printf ("extern int eligible_for_delay (rtx, int, rtx, int);\n\n");
+	      printf ("extern int eligible_for_delay (rtx_insn *, int, rtx_insn *, int);\n\n");
 	      printf ("extern int const_num_delay_slots (rtx);\n\n");
 	      have_delay = 1;
 	    }
@@ -187,14 +187,14 @@ main (int argc, char **argv)
 	      if (XVECEXP (desc, 1, i + 1) && ! have_annul_true)
 		{
 		  printf ("#define ANNUL_IFTRUE_SLOTS\n");
-		  printf ("extern int eligible_for_annul_true (rtx, int, rtx, int);\n");
+		  printf ("extern int eligible_for_annul_true (rtx_insn *, int, rtx_insn *, int);\n");
 		  have_annul_true = 1;
 		}
 
 	      if (XVECEXP (desc, 1, i + 2) && ! have_annul_false)
 		{
 		  printf ("#define ANNUL_IFFALSE_SLOTS\n");
-		  printf ("extern int eligible_for_annul_false (rtx, int, rtx, int);\n");
+		  printf ("extern int eligible_for_annul_false (rtx_insn *, int, rtx_insn *, int);\n");
 		  have_annul_false = 1;
 		}
 	    }
diff --git a/gcc/genattrtab.c b/gcc/genattrtab.c
index 68d05d07..5b15b14 100644
--- a/gcc/genattrtab.c
+++ b/gcc/genattrtab.c
@@ -4456,11 +4456,11 @@ write_eligible_delay (FILE *outf, const char *kind)
   /* Write function prelude.  */
 
   fprintf (outf, "int\n");
-  fprintf (outf, "eligible_for_%s (rtx delay_insn ATTRIBUTE_UNUSED, int slot, \n"
-		 "		   rtx candidate_insn, int flags ATTRIBUTE_UNUSED)\n",
+  fprintf (outf, "eligible_for_%s (rtx_insn *delay_insn ATTRIBUTE_UNUSED, int slot, \n"
+		 "		   rtx_insn *candidate_insn, int flags ATTRIBUTE_UNUSED)\n",
 	   kind);
   fprintf (outf, "{\n");
-  fprintf (outf, "  rtx insn;\n");
+  fprintf (outf, "  rtx_insn *insn;\n");
   fprintf (outf, "\n");
   fprintf (outf, "  gcc_assert (slot < %d);\n", max_slots);
   fprintf (outf, "\n");
diff --git a/gcc/hw-doloop.c b/gcc/hw-doloop.c
index 3b506ed..e191131 100644
--- a/gcc/hw-doloop.c
+++ b/gcc/hw-doloop.c
@@ -360,7 +360,8 @@ discover_loops (bitmap_obstack *loop_stack, struct hw_doloop_hooks *hooks)
   FOR_EACH_BB_FN (bb, cfun)
     {
       rtx_insn *tail = BB_END (bb);
-      rtx insn, reg;
+      rtx_insn *insn;
+      rtx reg;
 
       while (tail && NOTE_P (tail) && tail != BB_HEAD (bb))
 	tail = PREV_INSN (tail);
@@ -378,7 +379,7 @@ discover_loops (bitmap_obstack *loop_stack, struct hw_doloop_hooks *hooks)
 
       /* There's a degenerate case we can handle - an empty loop consisting
 	 of only a back branch.  Handle that by deleting the branch.  */
-      insn = JUMP_LABEL (tail);
+      insn = JUMP_LABEL_AS_INSN (tail);
       while (insn && !NONDEBUG_INSN_P (insn))
 	insn = NEXT_INSN (insn);
       if (insn == tail)
diff --git a/gcc/hw-doloop.h b/gcc/hw-doloop.h
index a98f213..48072cf 100644
--- a/gcc/hw-doloop.h
+++ b/gcc/hw-doloop.h
@@ -75,7 +75,7 @@ struct GTY (()) hwloop_info_d
   rtx iter_reg;
 
   /* The new label placed at the beginning of the loop. */
-  rtx start_label;
+  rtx_insn *start_label;
 
   /* The new label placed at the end of the loop. */
   rtx end_label;
diff --git a/gcc/ira.c b/gcc/ira.c
index 7edf8ec..8f8d571 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -2098,7 +2098,8 @@ decrease_live_ranges_number (void)
 {
   basic_block bb;
   rtx_insn *insn;
-  rtx set, src, dest, dest_death, p, q, note;
+  rtx set, src, dest, dest_death, q, note;
+  rtx_insn *p;
   int sregno, dregno;
 
   if (! flag_expensive_optimizations)
@@ -2683,9 +2684,10 @@ setup_reg_equiv_init (void)
    to update equiv info for register shuffles on the region borders
    and for caller save/restore insns.  */
 void
-ira_update_equiv_info_by_shuffle_insn (int to_regno, int from_regno, rtx insns)
+ira_update_equiv_info_by_shuffle_insn (int to_regno, int from_regno, rtx_insn *insns)
 {
-  rtx insn, x, note;
+  rtx_insn *insn;
+  rtx x, note;
 
   if (! ira_reg_equiv[from_regno].defined_p
       && (! ira_reg_equiv[to_regno].defined_p
@@ -3034,9 +3036,9 @@ validate_equiv_mem_from_store (rtx dest, const_rtx set ATTRIBUTE_UNUSED,
 
    Return 1 if MEMREF remains valid.  */
 static int
-validate_equiv_mem (rtx start, rtx reg, rtx memref)
+validate_equiv_mem (rtx_insn *start, rtx reg, rtx memref)
 {
-  rtx insn;
+  rtx_insn *insn;
   rtx note;
 
   equiv_mem = memref;
@@ -3310,9 +3312,9 @@ memref_referenced_p (rtx memref, rtx x)
 /* TRUE if some insn in the range (START, END] references a memory location
    that would be affected by a store to MEMREF.  */
 static int
-memref_used_between_p (rtx memref, rtx start, rtx end)
+memref_used_between_p (rtx memref, rtx_insn *start, rtx_insn *end)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
        insn = NEXT_INSN (insn))
diff --git a/gcc/ira.h b/gcc/ira.h
index 2f7dfce..138b763 100644
--- a/gcc/ira.h
+++ b/gcc/ira.h
@@ -183,7 +183,7 @@ extern rtx ira_eliminate_regs (rtx, enum machine_mode);
 extern void ira_set_pseudo_classes (bool, FILE *);
 extern void ira_implicitly_set_insn_hard_regs (HARD_REG_SET *);
 extern void ira_expand_reg_equiv (void);
-extern void ira_update_equiv_info_by_shuffle_insn (int, int, rtx);
+extern void ira_update_equiv_info_by_shuffle_insn (int, int, rtx_insn *);
 
 extern void ira_sort_regnos_for_alter_reg (int *, int, unsigned int *);
 extern void ira_mark_allocation_change (int);
diff --git a/gcc/loop-doloop.c b/gcc/loop-doloop.c
index 42e7f70..f7cee7b 100644
--- a/gcc/loop-doloop.c
+++ b/gcc/loop-doloop.c
@@ -713,10 +713,12 @@ doloop_optimize (struct loop *loop)
   doloop_pat = doloop_seq;
   if (INSN_P (doloop_pat))
     {
-      while (NEXT_INSN (doloop_pat) != NULL_RTX)
-	doloop_pat = NEXT_INSN (doloop_pat);
-      if (!JUMP_P (doloop_pat))
-	doloop_pat = NULL_RTX;
+      rtx_insn *doloop_insn = as_a <rtx_insn *> (doloop_pat);
+      while (NEXT_INSN (doloop_insn) != NULL_RTX)
+	doloop_insn = NEXT_INSN (doloop_insn);
+      if (!JUMP_P (doloop_insn))
+	doloop_insn = NULL;
+      doloop_pat = doloop_insn;
     }
 
   if (! doloop_pat
diff --git a/gcc/output.h b/gcc/output.h
index 0ee2be7..2c5c06a 100644
--- a/gcc/output.h
+++ b/gcc/output.h
@@ -296,7 +296,7 @@ extern void output_quoted_string (FILE *, const char *);
    insn output code.
 
    This variable is defined  in final.c.  */
-extern rtx final_sequence;
+extern rtx_sequence *final_sequence;
 
 /* The line number of the beginning of the current function.  Various
    md code needs this so that it can output relative linenumbers.  */
diff --git a/gcc/recog.c b/gcc/recog.c
index 605ed4f..334bce1 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -3347,12 +3347,14 @@ peep2_reinit_state (regset live)
    if the replacement is rejected.  */
 
 static rtx
-peep2_attempt (basic_block bb, rtx insn, int match_len, rtx attempt)
+peep2_attempt (basic_block bb, rtx uncast_insn, int match_len, rtx_insn *attempt)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
   int i;
   rtx_insn *last, *before_try, *x;
   rtx eh_note, as_note;
-  rtx old_insn, new_insn;
+  rtx old_insn;
+  rtx_insn *new_insn;
   bool was_call = false;
 
   /* If we are splitting an RTX_FRAME_RELATED_P insn, do not allow it to
@@ -3656,7 +3658,7 @@ peep2_fill_buffer (basic_block bb, rtx insn, regset live)
 static void
 peephole2_optimize (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   bitmap live;
   int i;
   basic_block bb;
@@ -3689,7 +3691,8 @@ peephole2_optimize (void)
       insn = BB_HEAD (bb);
       for (;;)
 	{
-	  rtx attempt, head;
+	  rtx_insn *attempt;
+	  rtx head;
 	  int match_len;
 
 	  if (!past_end && !NONDEBUG_INSN_P (insn))
@@ -3716,7 +3719,8 @@ peephole2_optimize (void)
 
 	  /* Match the peephole.  */
 	  head = peep2_insn_data[peep2_current].insn;
-	  attempt = peephole2_insns (PATTERN (head), head, &match_len);
+	  attempt = as_a_nullable <rtx_insn *> (
+		      peephole2_insns (PATTERN (head), head, &match_len));
 	  if (attempt != NULL)
 	    {
 	      rtx last = peep2_attempt (bb, head, match_len, attempt);
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 44d424f..ff9d047c 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -4586,7 +4586,6 @@ reload_as_needed (int live_known)
 #if defined (AUTO_INC_DEC)
   int i;
 #endif
-  rtx x;
   rtx_note *marker;
 
   memset (spill_reg_rtx, 0, sizeof spill_reg_rtx);
@@ -4675,7 +4674,6 @@ reload_as_needed (int live_known)
 	  if (n_reloads > 0)
 	    {
 	      rtx_insn *next = NEXT_INSN (insn);
-	      rtx p;
 
 	      /* ??? PREV can get deleted by reload inheritance.
 		 Work around this by emitting a marker note.  */
@@ -4706,7 +4704,7 @@ reload_as_needed (int live_known)
 		fixup_eh_region_note (insn, prev, next);
 
 	      /* Adjust the location of REG_ARGS_SIZE.  */
-	      p = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
+	      rtx p = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
 	      if (p)
 		{
 		  remove_note (insn, p);
@@ -4718,7 +4716,9 @@ reload_as_needed (int live_known)
 		 we have generated are valid.  If not, give an error
 		 and delete them.  */
 	      if (asm_noperands (PATTERN (insn)) >= 0)
-		for (p = NEXT_INSN (prev); p != next; p = NEXT_INSN (p))
+		for (rtx_insn *p = NEXT_INSN (prev);
+		     p != next;
+		     p = NEXT_INSN (p))
 		  if (p != insn && INSN_P (p)
 		      && GET_CODE (PATTERN (p)) != USE
 		      && (recog_memoized (p) < 0
@@ -4745,7 +4745,7 @@ reload_as_needed (int live_known)
 
 	  /* There may have been CLOBBER insns placed after INSN.  So scan
 	     between INSN and NEXT and use them to forget old reloads.  */
-	  for (x = NEXT_INSN (insn); x != old_next; x = NEXT_INSN (x))
+	  for (rtx_insn *x = NEXT_INSN (insn); x != old_next; x = NEXT_INSN (x))
 	    if (NONJUMP_INSN_P (x) && GET_CODE (PATTERN (x)) == CLOBBER)
 	      note_stores (PATTERN (x), forget_old_reloads_1, NULL);
 
@@ -4777,7 +4777,7 @@ reload_as_needed (int live_known)
 		      rtx reload_reg = rld[i].reg_rtx;
 		      enum machine_mode mode = GET_MODE (reload_reg);
 		      int n = 0;
-		      rtx p;
+		      rtx_insn *p;
 
 		      for (p = PREV_INSN (old_next); p != prev; p = PREV_INSN (p))
 			{
@@ -4859,7 +4859,8 @@ reload_as_needed (int live_known)
 			  if (TEST_HARD_REG_BIT (reg_reloaded_valid,
 						 in_hard_regno))
 			    {
-			      for (x = old_prev ? NEXT_INSN (old_prev) : insn;
+			      for (rtx_insn *x = (old_prev ?
+						  NEXT_INSN (old_prev) : insn);
 				   x != old_next;
 				   x = NEXT_INSN (x))
 				if (x == reg_reloaded_insn[in_hard_regno])
@@ -4887,7 +4888,7 @@ reload_as_needed (int live_known)
 	  /* If a pseudo that got a hard register is auto-incremented,
 	     we must purge records of copying it into pseudos without
 	     hard registers.  */
-	  for (x = REG_NOTES (insn); x; x = XEXP (x, 1))
+	  for (rtx x = REG_NOTES (insn); x; x = XEXP (x, 1))
 	    if (REG_NOTE_KIND (x) == REG_INC)
 	      {
 		/* See if this pseudo reg was reloaded in this insn.
@@ -8853,7 +8854,6 @@ delete_output_reload (rtx_insn *insn, int j, int last_reload_reg,
   int k;
   int n_occurrences;
   int n_inherited = 0;
-  rtx i1;
   rtx substed;
   unsigned regno;
   int nregs;
@@ -8900,7 +8900,7 @@ delete_output_reload (rtx_insn *insn, int j, int last_reload_reg,
     n_occurrences += count_occurrences (PATTERN (insn),
 					eliminate_regs (substed, VOIDmode,
 							NULL_RTX), 0);
-  for (i1 = reg_equiv_alt_mem_list (REGNO (reg)); i1; i1 = XEXP (i1, 1))
+  for (rtx i1 = reg_equiv_alt_mem_list (REGNO (reg)); i1; i1 = XEXP (i1, 1))
     {
       gcc_assert (!rtx_equal_p (XEXP (i1, 0), substed));
       n_occurrences += count_occurrences (PATTERN (insn), XEXP (i1, 0), 0);
@@ -8919,7 +8919,7 @@ delete_output_reload (rtx_insn *insn, int j, int last_reload_reg,
      and we're within the same basic block, then the value can only
      pass through the reload reg and end up here.
      Otherwise, give up--return.  */
-  for (i1 = NEXT_INSN (output_reload_insn);
+  for (rtx_insn *i1 = NEXT_INSN (output_reload_insn);
        i1 != insn; i1 = NEXT_INSN (i1))
     {
       if (NOTE_INSN_BASIC_BLOCK_P (i1))
diff --git a/gcc/reorg.c b/gcc/reorg.c
index b22f9ee..6f43e40 100644
--- a/gcc/reorg.c
+++ b/gcc/reorg.c
@@ -219,10 +219,10 @@ static int get_jump_flags (rtx, rtx);
 static int mostly_true_jump (rtx);
 static rtx get_branch_condition (rtx, rtx);
 static int condition_dominates_p (rtx, rtx);
-static int redirect_with_delay_slots_safe_p (rtx, rtx, rtx);
-static int redirect_with_delay_list_safe_p (rtx, rtx, rtx);
+static int redirect_with_delay_slots_safe_p (rtx_insn *, rtx, rtx);
+static int redirect_with_delay_list_safe_p (rtx_insn *, rtx, rtx_insn_list *);
 static int check_annul_list_true_false (int, rtx);
-static rtx_insn_list *steal_delay_list_from_target (rtx, rtx,
+static rtx_insn_list *steal_delay_list_from_target (rtx_insn *, rtx,
 						    rtx_sequence *,
 						    rtx_insn_list *,
 						    struct resources *,
@@ -230,16 +230,16 @@ static rtx_insn_list *steal_delay_list_from_target (rtx, rtx,
 						    struct resources *,
 						    int, int *, int *,
 						    rtx_insn **);
-static rtx_insn_list *steal_delay_list_from_fallthrough (rtx, rtx,
+static rtx_insn_list *steal_delay_list_from_fallthrough (rtx_insn *, rtx,
 							 rtx_sequence *,
 							 rtx_insn_list *,
 							 struct resources *,
 							 struct resources *,
 							 struct resources *,
 							 int, int *, int *);
-static void try_merge_delay_insns (rtx, rtx);
-static rtx redundant_insn (rtx, rtx, rtx);
-static int own_thread_p (rtx, rtx, int);
+static void try_merge_delay_insns (rtx, rtx_insn *);
+static rtx redundant_insn (rtx, rtx_insn *, rtx);
+static int own_thread_p (rtx_insn *, rtx, int);
 static void update_block (rtx, rtx);
 static int reorg_redirect_jump (rtx, rtx);
 static void update_reg_dead_notes (rtx, rtx);
@@ -252,7 +252,7 @@ static rtx_insn_list *fill_slots_from_thread (rtx_insn *, rtx,
 					      int *, rtx_insn_list *);
 static void fill_eager_delay_slots (void);
 static void relax_delay_slots (rtx_insn *);
-static void make_return_insns (rtx);
+static void make_return_insns (rtx_insn *);
 \f
 /* A wrapper around next_active_insn which takes care to return ret_rtx
    unchanged.  */
@@ -686,14 +686,14 @@ delete_scheduled_jump (rtx insn)
 	{
 	  if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
 	      && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
-	    delete_from_delay_slot (XEXP (note, 0));
+	    delete_from_delay_slot (as_a <rtx_insn *> (XEXP (note, 0)));
 	}
       else
 	{
 	  /* The insn setting CC0 is our previous insn, but it may be in
 	     a delay slot.  It will be the last insn in the delay slot, if
 	     it is.  */
-	  rtx trial = previous_insn (insn);
+	  rtx_insn *trial = previous_insn (insn);
 	  if (NOTE_P (trial))
 	    trial = prev_nonnote_insn (trial);
 	  if (sets_cc0_p (PATTERN (trial)) != 1
@@ -978,63 +978,62 @@ condition_dominates_p (rtx condition, rtx insn)
    any insns already in the delay slot of JUMP.  */
 
 static int
-redirect_with_delay_slots_safe_p (rtx jump, rtx newlabel, rtx seq)
+redirect_with_delay_slots_safe_p (rtx_insn *jump, rtx newlabel, rtx seq)
 {
   int flags, i;
-  rtx pat = PATTERN (seq);
+  rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (seq));
 
   /* Make sure all the delay slots of this jump would still
      be valid after threading the jump.  If they are still
      valid, then return nonzero.  */
 
   flags = get_jump_flags (jump, newlabel);
-  for (i = 1; i < XVECLEN (pat, 0); i++)
+  for (i = 1; i < pat->len (); i++)
     if (! (
 #ifdef ANNUL_IFFALSE_SLOTS
 	   (INSN_ANNULLED_BRANCH_P (jump)
-	    && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
-	   ? eligible_for_annul_false (jump, i - 1,
-				       XVECEXP (pat, 0, i), flags) :
+	    && INSN_FROM_TARGET_P (pat->insn (i)))
+	   ? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) :
 #endif
 #ifdef ANNUL_IFTRUE_SLOTS
 	   (INSN_ANNULLED_BRANCH_P (jump)
 	    && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
-	   ? eligible_for_annul_true (jump, i - 1,
-				      XVECEXP (pat, 0, i), flags) :
+	   ? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) :
 #endif
-	   eligible_for_delay (jump, i - 1, XVECEXP (pat, 0, i), flags)))
+	   eligible_for_delay (jump, i - 1, pat->insn (i), flags)))
       break;
 
-  return (i == XVECLEN (pat, 0));
+  return (i == pat->len ());
 }
 
 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
    any insns we wish to place in the delay slot of JUMP.  */
 
 static int
-redirect_with_delay_list_safe_p (rtx jump, rtx newlabel, rtx delay_list)
+redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel,
+				 rtx_insn_list *delay_list)
 {
   int flags, i;
-  rtx li;
+  rtx_insn_list *li;
 
   /* Make sure all the insns in DELAY_LIST would still be
      valid after threading the jump.  If they are still
      valid, then return nonzero.  */
 
   flags = get_jump_flags (jump, newlabel);
-  for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++)
+  for (li = delay_list, i = 0; li; li = li->next (), i++)
     if (! (
 #ifdef ANNUL_IFFALSE_SLOTS
 	   (INSN_ANNULLED_BRANCH_P (jump)
-	    && INSN_FROM_TARGET_P (XEXP (li, 0)))
-	   ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) :
+	    && INSN_FROM_TARGET_P (li->insn ()))
+	   ? eligible_for_annul_false (jump, i, li->insn (), flags) :
 #endif
 #ifdef ANNUL_IFTRUE_SLOTS
 	   (INSN_ANNULLED_BRANCH_P (jump)
 	    && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
-	   ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) :
+	   ? eligible_for_annul_true (jump, i, li->insn (), flags) :
 #endif
-	   eligible_for_delay (jump, i, XEXP (li, 0), flags)))
+	   eligible_for_delay (jump, i, li->insn (), flags)))
       break;
 
   return (li == NULL);
@@ -1085,7 +1084,7 @@ check_annul_list_true_false (int annul_true_p, rtx delay_list)
    execution should continue.  */
 
 static rtx_insn_list *
-steal_delay_list_from_target (rtx insn, rtx condition, rtx_sequence *seq,
+steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq,
 			      rtx_insn_list *delay_list, struct resources *sets,
 			      struct resources *needed,
 			      struct resources *other_needed,
@@ -1226,7 +1225,8 @@ steal_delay_list_from_target (rtx insn, rtx condition, rtx_sequence *seq,
    for INSN since unconditional branches are much easier to fill.  */
 
 static rtx_insn_list *
-steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx_sequence *seq,
+steal_delay_list_from_fallthrough (rtx_insn *insn, rtx condition,
+				   rtx_sequence *seq,
 				   rtx_insn_list *delay_list,
 				   struct resources *sets,
 				   struct resources *needed,
@@ -1307,10 +1307,10 @@ steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx_sequence *seq,
    we delete the merged insn.  */
 
 static void
-try_merge_delay_insns (rtx insn, rtx thread)
+try_merge_delay_insns (rtx insn, rtx_insn *thread)
 {
-  rtx trial, next_trial;
-  rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
+  rtx_insn *trial, *next_trial;
+  rtx_insn *delay_insn = as_a <rtx_insn *> (XVECEXP (PATTERN (insn), 0, 0));
   int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
   int slot_number = 1;
   int num_slots = XVECLEN (PATTERN (insn), 0);
@@ -1499,11 +1499,12 @@ try_merge_delay_insns (rtx insn, rtx thread)
    gain in rare cases.  */
 
 static rtx
-redundant_insn (rtx insn, rtx target, rtx delay_list)
+redundant_insn (rtx insn, rtx_insn *target, rtx delay_list)
 {
   rtx target_main = target;
   rtx ipat = PATTERN (insn);
-  rtx trial, pat;
+  rtx_insn *trial;
+  rtx pat;
   struct resources needed, set;
   int i;
   unsigned insns_to_search;
@@ -1714,10 +1715,10 @@ redundant_insn (rtx insn, rtx target, rtx delay_list)
    finding an active insn, we do not own this thread.  */
 
 static int
-own_thread_p (rtx thread, rtx label, int allow_fallthrough)
+own_thread_p (rtx_insn *thread, rtx label, int allow_fallthrough)
 {
-  rtx active_insn;
-  rtx insn;
+  rtx_insn *active_insn;
+  rtx_insn *insn;
 
   /* We don't own the function end.  */
   if (thread == 0 || ANY_RETURN_P (thread))
@@ -1884,7 +1885,7 @@ static vec <rtx> sibling_labels;
    the new label.  */
 
 static rtx_insn *
-get_label_before (rtx insn, rtx sibling)
+get_label_before (rtx_insn *insn, rtx sibling)
 {
   rtx_insn *label;
 
@@ -2247,7 +2248,7 @@ fill_simple_delay_slots (int non_jumps_p)
 	    {
 	      /* See comment in relax_delay_slots about necessity of using
 		 next_real_insn here.  */
-	      rtx new_label = next_real_insn (next_trial);
+	      rtx_insn *new_label = next_real_insn (next_trial);
 
 	      if (new_label != 0)
 		new_label = get_label_before (new_label, JUMP_LABEL (trial));
@@ -2274,8 +2275,8 @@ fill_simple_delay_slots (int non_jumps_p)
 	  = fill_slots_from_thread (insn, const_true_rtx,
 				    next_active_insn (JUMP_LABEL (insn)),
 				    NULL, 1, 1,
-				    own_thread_p (JUMP_LABEL (insn),
-						  JUMP_LABEL (insn), 0),
+				    own_thread_p (JUMP_LABEL_AS_INSN (insn),
+						  JUMP_LABEL_AS_INSN (insn), 0),
 				    slots_to_fill, &slots_filled,
 				    delay_list);
 
@@ -3127,15 +3128,15 @@ delete_jump (rtx insn)
     delete_computation (insn);
 }
 
-static rtx
+static rtx_insn *
 label_before_next_insn (rtx x, rtx scan_limit)
 {
-  rtx insn = next_active_insn (x);
+  rtx_insn *insn = next_active_insn (x);
   while (insn)
     {
       insn = PREV_INSN (insn);
       if (insn == scan_limit || insn == NULL_RTX)
-	return NULL_RTX;
+	return NULL;
       if (LABEL_P (insn))
 	break;
     }
@@ -3157,7 +3158,7 @@ relax_delay_slots (rtx_insn *first)
   /* Look at every JUMP_INSN and see if we can improve it.  */
   for (insn = first; insn; insn = next)
     {
-      rtx other;
+      rtx_insn *other;
       bool crossing;
 
       next = next_active_insn (insn);
@@ -3346,7 +3347,7 @@ relax_delay_slots (rtx_insn *first)
 	{
 	  /* Figure out where to emit the special USE insn so we don't
 	     later incorrectly compute register live/death info.  */
-	  rtx tmp = next_active_insn (trial);
+	  rtx_insn *tmp = next_active_insn (trial);
 	  if (tmp == 0)
 	    tmp = find_end_label (simple_return_rtx);
 
@@ -3520,9 +3521,10 @@ relax_delay_slots (rtx_insn *first)
    RETURN as well.  */
 
 static void
-make_return_insns (rtx first)
+make_return_insns (rtx_insn *first)
 {
-  rtx insn, jump_insn, pat;
+  rtx_insn *insn;
+  rtx_insn *jump_insn;
   rtx real_return_label = function_return_label;
   rtx real_simple_return_label = function_simple_return_label;
   int slots, i;
@@ -3577,8 +3579,8 @@ make_return_insns (rtx first)
       else
 	continue;
 
-      pat = PATTERN (insn);
-      jump_insn = XVECEXP (pat, 0, 0);
+      rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (insn));
+      jump_insn = pat->insn (0);
 
       /* If we can't make the jump into a RETURN, try to redirect it to the best
 	 RETURN and go on to the next insn.  */
@@ -3603,18 +3605,18 @@ make_return_insns (rtx first)
 	    if (! (
 #ifdef ANNUL_IFFALSE_SLOTS
 		   (INSN_ANNULLED_BRANCH_P (jump_insn)
-		    && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
+		    && INSN_FROM_TARGET_P (pat->insn (i)))
 		   ? eligible_for_annul_false (jump_insn, i - 1,
-					       XVECEXP (pat, 0, i), flags) :
+					       pat->insn (i), flags) :
 #endif
 #ifdef ANNUL_IFTRUE_SLOTS
 		   (INSN_ANNULLED_BRANCH_P (jump_insn)
-		    && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
+		    && ! INSN_FROM_TARGET_P (pat->insn (i)))
 		   ? eligible_for_annul_true (jump_insn, i - 1,
-					      XVECEXP (pat, 0, i), flags) :
+					      pat->insn (i), flags) :
 #endif
 		   eligible_for_delay (jump_insn, i - 1,
-				       XVECEXP (pat, 0, i), flags)))
+				       pat->insn (i), flags)))
 	      break;
 	}
       else
@@ -3629,7 +3631,7 @@ make_return_insns (rtx first)
 	 insns for its delay slots, if it needs some.  */
       if (ANY_RETURN_P (PATTERN (jump_insn)))
 	{
-	  rtx prev = PREV_INSN (insn);
+	  rtx_insn *prev = PREV_INSN (insn);
 
 	  delete_related_insns (insn);
 	  for (i = 1; i < XVECLEN (pat, 0); i++)
diff --git a/gcc/rtl.h b/gcc/rtl.h
index c38eb58..f6167d8 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -650,9 +650,9 @@ class GTY(()) rtx_note : public rtx_insn
                       || JUMP_TABLE_DATA_P (X)		\
                       || BARRIER_P (X)        		\
                       || LABEL_P (X))    		\
-                     && PREV_INSN (X) != NULL           \
-                     && NEXT_INSN (PREV_INSN (X)) == X  \
-                     ? PREV_INSN (X) : NULL)
+		     && PREV_INSN (as_a <rtx_insn *> (X)) != NULL	\
+                     && NEXT_INSN (PREV_INSN (as_a <rtx_insn *> (X))) == X \
+                     ? PREV_INSN (as_a <rtx_insn *> (X)) : NULL)
 
 /* Define macros to access the `code' field of the rtx.  */
 
@@ -1349,7 +1349,7 @@ inline int& INSN_UID (rtx insn)
    and an lvalue form:
      SET_NEXT_INSN/SET_PREV_INSN.  */
 
-inline rtx_insn *PREV_INSN (const_rtx insn)
+inline rtx_insn *PREV_INSN (const rtx_insn *insn)
 {
   rtx prev = XEXP (insn, 0);
   return as_a_nullable <rtx_insn *> (prev);
@@ -1360,7 +1360,7 @@ inline rtx& SET_PREV_INSN (rtx_insn *insn)
   return XEXP (insn, 0);
 }
 
-inline rtx_insn *NEXT_INSN (const_rtx insn)
+inline rtx_insn *NEXT_INSN (const rtx_insn *insn)
 {
   rtx next = XEXP (insn, 1);
   return as_a_nullable <rtx_insn *> (next);
@@ -1690,7 +1690,7 @@ enum label_kind
    be set to simple_return_rtx, a SIMPLE_RETURN.  */
 #define JUMP_LABEL(INSN)   XCEXP (INSN, 7, JUMP_INSN)
 
-inline rtx_insn *JUMP_LABEL_AS_INSN (rtx_insn *insn)
+inline rtx_insn *JUMP_LABEL_AS_INSN (const rtx_insn *insn)
 {
   return as_a_nullable <rtx_insn *> (JUMP_LABEL (insn));
 }
@@ -2733,12 +2733,12 @@ extern bool unsigned_reg_p (rtx);
 extern int reg_mentioned_p (const_rtx, const_rtx);
 extern int count_occurrences (const_rtx, const_rtx, int);
 extern int reg_referenced_p (const_rtx, const_rtx);
-extern int reg_used_between_p (const_rtx, const_rtx, const_rtx);
+extern int reg_used_between_p (const_rtx, const rtx_insn *, const rtx_insn *);
 extern int reg_set_between_p (const_rtx, const_rtx, const_rtx);
 extern int commutative_operand_precedence (rtx);
 extern bool swap_commutative_operands_p (rtx, rtx);
 extern int modified_between_p (const_rtx, const_rtx, const_rtx);
-extern int no_labels_between_p (const_rtx, const_rtx);
+extern int no_labels_between_p (const rtx_insn *, const rtx_insn *);
 extern int modified_in_p (const_rtx, const_rtx);
 extern int reg_set_p (const_rtx, const_rtx);
 extern rtx single_set_2 (const_rtx, const_rtx);
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 5b1e600..d434030 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -745,9 +745,9 @@ reg_mentioned_p (const_rtx reg, const_rtx in)
    no CODE_LABEL insn.  */
 
 int
-no_labels_between_p (const_rtx beg, const_rtx end)
+no_labels_between_p (const rtx_insn *beg, const rtx_insn *end)
 {
-  rtx p;
+  rtx_insn *p;
   if (beg == end)
     return 0;
   for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
@@ -760,7 +760,8 @@ no_labels_between_p (const_rtx beg, const_rtx end)
    FROM_INSN and TO_INSN (exclusive of those two).  */
 
 int
-reg_used_between_p (const_rtx reg, const_rtx from_insn, const_rtx to_insn)
+reg_used_between_p (const_rtx reg, const rtx_insn *from_insn,
+		    const rtx_insn *to_insn)
 {
   rtx_insn *insn;
 
@@ -856,8 +857,10 @@ reg_referenced_p (const_rtx x, const_rtx body)
    FROM_INSN and TO_INSN (exclusive of those two).  */
 
 int
-reg_set_between_p (const_rtx reg, const_rtx from_insn, const_rtx to_insn)
+reg_set_between_p (const_rtx reg, const_rtx uncast_from_insn, const_rtx to_insn)
 {
+  const rtx_insn *from_insn =
+    as_a_nullable <const rtx_insn *> (uncast_from_insn);
   const rtx_insn *insn;
 
   if (from_insn == to_insn)
@@ -894,8 +897,10 @@ reg_set_p (const_rtx reg, const_rtx insn)
    X contains a MEM; this routine does use memory aliasing.  */
 
 int
-modified_between_p (const_rtx x, const_rtx start, const_rtx end)
+modified_between_p (const_rtx x, const_rtx uncast_start, const_rtx end)
 {
+  const rtx_insn *start =
+    as_a_nullable <const rtx_insn *> (uncast_start);
   const enum rtx_code code = GET_CODE (x);
   const char *fmt;
   int i, j;
@@ -2741,7 +2746,7 @@ tablejump_p (const rtx_insn *insn, rtx *labelp, rtx_jump_table_data **tablep)
 
   label = JUMP_LABEL (insn);
   if (label != NULL_RTX && !ANY_RETURN_P (label)
-      && (table = NEXT_INSN (label)) != NULL_RTX
+      && (table = NEXT_INSN (as_a <rtx_insn *> (label))) != NULL_RTX
       && JUMP_TABLE_DATA_P (table))
     {
       if (labelp)
diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index c47ce14..c93d9fe 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -4088,10 +4088,10 @@ get_seqno_for_a_jump (insn_t insn, int old_seqno)
 /*  Find the proper seqno for inserting at INSN.  Returns -1 if no predecessors
     with positive seqno exist.  */
 int
-get_seqno_by_preds (rtx insn)
+get_seqno_by_preds (rtx_insn *insn)
 {
   basic_block bb = BLOCK_FOR_INSN (insn);
-  rtx tmp = insn, head = BB_HEAD (bb);
+  rtx_insn *tmp = insn, *head = BB_HEAD (bb);
   insn_t *preds;
   int n, i, seqno;
 
@@ -4955,7 +4955,7 @@ recompute_rev_top_order (void)
 void
 clear_outdated_rtx_info (basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   FOR_BB_INSNS (bb, insn)
     if (INSN_P (insn))
diff --git a/gcc/sel-sched-ir.h b/gcc/sel-sched-ir.h
index 9f1fb6b..9ac9e5b 100644
--- a/gcc/sel-sched-ir.h
+++ b/gcc/sel-sched-ir.h
@@ -1628,7 +1628,7 @@ extern struct succs_info * compute_succs_info (insn_t, short);
 extern void free_succs_info (struct succs_info *);
 extern bool sel_insn_has_single_succ_p (insn_t, int);
 extern bool sel_num_cfg_preds_gt_1 (insn_t);
-extern int get_seqno_by_preds (rtx);
+extern int get_seqno_by_preds (rtx_insn *);
 
 extern bool bb_ends_ebb_p (basic_block);
 extern bool in_same_ebb_p (insn_t, insn_t);
diff --git a/gcc/store-motion.c b/gcc/store-motion.c
index 1dcc0ad..eb50089 100644
--- a/gcc/store-motion.c
+++ b/gcc/store-motion.c
@@ -1017,7 +1017,8 @@ build_store_vectors (void)
 {
   basic_block bb;
   int *regs_set_in_block;
-  rtx insn, st;
+  rtx_insn *insn;
+  rtx_insn_list *st;
   struct st_expr * ptr;
   unsigned int max_gcse_regno = max_reg_num ();
 
@@ -1033,9 +1034,9 @@ build_store_vectors (void)
 
   for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
     {
-      for (st = ptr->avail_stores; st != NULL; st = XEXP (st, 1))
+      for (st = ptr->avail_stores; st != NULL; st = st->next ())
 	{
-	  insn = XEXP (st, 0);
+	  insn = st->insn ();
 	  bb = BLOCK_FOR_INSN (insn);
 
 	  /* If we've already seen an available expression in this block,
@@ -1053,9 +1054,9 @@ build_store_vectors (void)
 	  bitmap_set_bit (st_avloc[bb->index], ptr->index);
 	}
 
-      for (st = ptr->antic_stores; st != NULL; st = XEXP (st, 1))
+      for (st = ptr->antic_stores; st != NULL; st = st->next ())
 	{
-	  insn = XEXP (st, 0);
+	  insn = st->insn ();
 	  bb = BLOCK_FOR_INSN (insn);
 	  bitmap_set_bit (st_antloc[bb->index], ptr->index);
 	}
diff --git a/gcc/tree-ssa-loop-ivopts.c b/gcc/tree-ssa-loop-ivopts.c
index b24463d..83ab24e 100644
--- a/gcc/tree-ssa-loop-ivopts.c
+++ b/gcc/tree-ssa-loop-ivopts.c
@@ -2839,7 +2839,7 @@ get_use_iv_cost (struct ivopts_data *data, struct iv_use *use,
 /* Returns estimate on cost of computing SEQ.  */
 
 static unsigned
-seq_cost (rtx seq, bool speed)
+seq_cost (rtx_insn *seq, bool speed)
 {
   unsigned cost = 0;
   rtx set;
@@ -2950,7 +2950,8 @@ prepare_decl_rtl (tree *expr_p, int *ws, void *data)
 static unsigned
 computation_cost (tree expr, bool speed)
 {
-  rtx seq, rslt;
+  rtx_insn *seq;
+  rtx rslt;
   tree type = TREE_TYPE (expr);
   unsigned cost;
   /* Avoid using hard regs in ways which may be unsupported.  */
@@ -3280,7 +3281,8 @@ get_address_cost (bool symbol_present, bool var_present,
       HOST_WIDE_INT rat, off = 0;
       int old_cse_not_expected, width;
       unsigned sym_p, var_p, off_p, rat_p, add_c;
-      rtx seq, addr, base;
+      rtx_insn *seq;
+      rtx addr, base;
       rtx reg0, reg1;
 
       data = (address_cost_data) xcalloc (1, sizeof (*data));
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index abd5c7f..020deba 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -7,7 +7,3 @@ Phase 3: per-file commits within "config" subdirs: DONE
 Phase 4: removal of "scaffolding":                 DONE
 Phase 5: additional rtx_def subclasses:            DONE
 Phase 6: use extra rtx_def subclasses:             IN PROGRESS
-
-TODO: "Scaffolding" to be removed
-=================================
-* SET_NEXT_INSN, SET_PREV_INSN
-- 
1.8.5.3

Re: [PATCH 229/236] NEXT_INSN and PREV_INSN take a const rtx_insn

[Richard Henderson]

On 08/06/2014 10:23 AM, David Malcolm wrote:
> This patch updates NEXT_INSN and PREV_INSN to work on rtx_insn *, rather
> than plain rtx - plus miscellaneous fixes needed to get there.

Ug.  Bigger than I'd have liked, but still ok.


r~

[PATCH 224/236] insn_current_reference_address takes an rtx_insn

[David Malcolm]

gcc/
	* output.h (insn_current_reference_address): Strengthen param
	from rtx to rtx_insn *.
	* final.c (insn_current_reference_address): Likewise.
---
 gcc/final.c  | 2 +-
 gcc/output.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/final.c b/gcc/final.c
index b53367d..ddadc41 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -635,7 +635,7 @@ align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
    to exclude the branch size.  */
 
 int
-insn_current_reference_address (rtx branch)
+insn_current_reference_address (rtx_insn *branch)
 {
   rtx dest, seq;
   int seq_uid;
diff --git a/gcc/output.h b/gcc/output.h
index a3a5d78..0ee2be7 100644
--- a/gcc/output.h
+++ b/gcc/output.h
@@ -90,7 +90,7 @@ extern void output_asm_insn (const char *, rtx *);
 /* Compute a worst-case reference address of a branch so that it
    can be safely used in the presence of aligned labels.
    Defined in final.c.  */
-extern int insn_current_reference_address (rtx);
+extern int insn_current_reference_address (rtx_insn *);
 
 /* Find the alignment associated with a CODE_LABEL.
    Defined in final.c.  */
-- 
1.8.5.3

Re: [PATCH 224/236] insn_current_reference_address takes an rtx_insn

[Richard Henderson]

On 08/06/2014 10:23 AM, David Malcolm wrote:
> gcc/
> 	* output.h (insn_current_reference_address): Strengthen param
> 	from rtx to rtx_insn *.
> 	* final.c (insn_current_reference_address): Likewise.

#223 and #224 are ok.


r~

[PATCH 227/236] find_first_parameter_load params and return type

[David Malcolm]

gcc/
	* rtl.h (find_first_parameter_load): Strengthen return type and
	both params from rtx to rtx_insn *.
	* rtlanal.c (find_first_parameter_load): Strengthen return type,
	both params and locals "before", "first_set" from rtx to
	rtx_insn *.  Remove now-redundant cast.
	* except.c (sjlj_mark_call_sites): Use NULL rather than NULL_RTX.
---
 gcc/except.c  | 2 +-
 gcc/rtl.h     | 2 +-
 gcc/rtlanal.c | 7 ++++---
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/gcc/except.c b/gcc/except.c
index d44c027..13df541 100644
--- a/gcc/except.c
+++ b/gcc/except.c
@@ -1164,7 +1164,7 @@ sjlj_mark_call_sites (void)
       /* Don't separate a call from it's argument loads.  */
       before = insn;
       if (CALL_P (insn))
-	before = find_first_parameter_load (insn, NULL_RTX);
+	before = find_first_parameter_load (insn, NULL);
 
       start_sequence ();
       mem = adjust_address (crtl->eh.sjlj_fc, TYPE_MODE (integer_type_node),
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 8cdb88d..8f8d7f0 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2820,7 +2820,7 @@ extern int auto_inc_p (const_rtx);
 extern int in_expr_list_p (const_rtx, const_rtx);
 extern void remove_node_from_expr_list (const_rtx, rtx_expr_list **);
 extern int loc_mentioned_in_p (rtx *, const_rtx);
-extern rtx_insn *find_first_parameter_load (rtx, rtx);
+extern rtx_insn *find_first_parameter_load (rtx_insn *, rtx_insn *);
 extern bool keep_with_call_p (const_rtx);
 extern bool label_is_jump_target_p (const_rtx, const_rtx);
 extern int insn_rtx_cost (rtx, bool);
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 6429906..df2f734 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -3639,10 +3639,11 @@ parms_set (rtx x, const_rtx pat ATTRIBUTE_UNUSED, void *data)
    to the outer function is passed down as a parameter).
    Do not skip BOUNDARY.  */
 rtx_insn *
-find_first_parameter_load (rtx call_insn, rtx boundary)
+find_first_parameter_load (rtx_insn *call_insn, rtx_insn *boundary)
 {
   struct parms_set_data parm;
-  rtx p, before, first_set;
+  rtx p;
+  rtx_insn *before, *first_set;
 
   /* Since different machines initialize their parameter registers
      in different orders, assume nothing.  Collect the set of all
@@ -3700,7 +3701,7 @@ find_first_parameter_load (rtx call_insn, rtx boundary)
 	    break;
 	}
     }
-  return as_a_nullable <rtx_insn *> (first_set);
+  return first_set;
 }
 
 /* Return true if we should avoid inserting code between INSN and preceding
-- 
1.8.5.3

[PATCH 165/236] struct haifa_sched_info: prev_head and next_tail

[David Malcolm]

gcc/
	* sched-int.h (struct haifa_sched_info): Strengthen fields
	"prev_head" and "next_tail" from rtx to rtx_insn *.
---
 gcc/sched-int.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index ae048c1..220e26d 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -607,7 +607,7 @@ struct haifa_sched_info
   bool (*insn_finishes_block_p) (rtx);
 
   /* The boundaries of the set of insns to be scheduled.  */
-  rtx prev_head, next_tail;
+  rtx_insn *prev_head, *next_tail;
 
   /* Filled in after the schedule is finished; the first and last scheduled
      insns.  */
-- 
1.8.5.3

[PATCH 225/236] Work towards NEXT_INSN/PREV_INSN requiring insns as their params

[David Malcolm]

gcc/
	* cfgexpand.c (pass_expand::execute): Strengthen local "after"
	from rtx to rtx_insn *.
	* cfgrtl.c (force_nonfallthru_and_redirect): Add local "note"
	of type rtx_insn * in scope where it's needed.
	* combine.c (combine_split_insns): Strengthen return type and local
	"ret" from rtx to rtx_insn *.
	(likely_spilled_retval_p): Likewise for locals "use" and "p".
	(try_combine): Eliminate local "m_split", splitting into new
	locals "m_split_insn" and "m_split_pat".
	(find_split_point): Strengthen local "seq" from rtx into
	rtx_insn *.
	* config/spu/spu.c (spu_machine_dependent_reorg): Likewise for
	locals "label", "branch".
	* dse.c (note_add_store_info): Likewise for fields "first",
	"current".
	(note_add_store): Likewise for local "insn".
	(emit_inc_dec_insn_before): Likewise for locals "insn",
	"new_insn", "cur".
	(find_shift_sequence): Likewise for locals "shift_seq", "insn".
	(replace_read): Likewise for locals "insns", "this_insn".
	* dwarf2cfi.c (dw_trace_info): Likewise for field "eh_head".
	(notice_eh_throw): Likewise for param "insn".
	(before_next_cfi_note): Likewise for return type, param, and local
	"prev".
	(connect_traces): Likewise for local "note".
	* emit-rtl.c (reset_all_used_flags): Likewise for local "p".
	(verify_rtl_sharing): Likewise.
	(unshare_all_rtl_in_chain): Likewise for param "insn".
	(get_first_nonnote_insn): Likewise for local "insn".
	(get_last_nonnote_insn): Likewise.  Introduce local rtx_sequence *
	"seq" and use its methods to clarify things.
	(next_insn): Strengthen return type from rtx to rtx_insn *.
	Rename param "insn" to "uncast_insn" and reintroduce "insn" as a
	local rtx_insn * using a checked cast, dropping a checked cast
	made redundant by this change.  Use a cast to and method of
	rtx_sequence to clarify the code.
	(previous_insn): Rename param "insn" to "uncast_insn" and
	reintroduce "insn" as a local rtx_insn * using a checked cast,
	dropping a checked cast made redundant by this change.  Use a cast
	to and method of rtx_sequence to clarify the code.
	(next_nonnote_insn): Rename param "insn" to "uncast_insn" and
	reintroduce "insn" as a local rtx_insn * using a checked cast,
	dropping a checked cast made redundant by this change.
	(next_nonnote_insn_bb): Likewise.
	(prev_nonnote_insn): Likewise.
	(prev_nonnote_insn_bb): Likewise.
	(next_nondebug_insn): Likewise.
	(prev_nondebug_insn): Likewise.
	(next_nonnote_nondebug_insn): Likewise.
	(prev_nonnote_nondebug_insn): Likewise.
	(next_real_insn): Likewise.
	(prev_real_insn): Likewise.
	(next_active_insn): Likewise.
	(prev_active_insn): Likewise.
	(next_cc0_user): Likewise.  Use rtx_sequence and a method for
	clarity.
	(prev_cc0_setter): Likewise.
	(try_split): Rename param "trial" to "uncast_trial" and
	reintroduce "insn" as a local rtx_insn * using a checked cast,
	dropping checked casts made redundant by this change.
	Strengthen locals "seq", "tem", "insn_last", "insn", "next" from
	rtx to rtx_insn *.
	(remove_insn): Rename param "insn" to "uncast_insn" and
	reintroduce "insn" as a local rtx_insn * using a checked cast.
	(emit_pattern_after_setloc): Likewise for param "after", as
	"uncast_after".
	(emit_pattern_after): Likewise.  Strengthen local "prev" from
	rtx to rtx_insn *.
	(emit_pattern_before_setloc): Rename param "before" to
	"uncast_before" and reintroduce "before" as a local rtx_insn *
	using a checked cast.  Strengthen locals "first", "last" from
	rtx to rtx_insn *.
	(emit_pattern_before): Likewise rename/cast param "before" to
	"uncast_before". Strengthen local "next" from rtx to rtx_insn *.
	* except.c (copy_reg_eh_region_note_forward): Strengthen param
	"first" and local "insn" from rtx to rtx_insn *.
	(copy_reg_eh_region_note_backward): Likewise for param "last"
	and local "insn".
	* expr.c (fixup_args_size_notes): Rename param "last" to
	"uncast_last" and reintroduce "last" as a local rtx_insn *
	using a checked cast.  Strengthen local "insn" from rtx to
	rtx_insn *.
	* function.c (set_insn_locations): Strengthen param "insn" from
	rtx to rtx_insn *.
	(record_insns): Likewise for param "insns" and local "tmp".
	(active_insn_between): Rename param "tail" to
	"uncast_tail" and reintroduce "tail" as a local rtx_insn *
	using a checked cast.
	(thread_prologue_and_epilogue_insns): Split out top-level local
	rtx "seq" into three different rtx_insn * locals.  Strengthen
	local "prologue_seq" from rtx to rtx_insn *.
	* gcse.c (insert_insn_end_basic_block): Strenghen local "insn"
	from rtx to rtx_insn *.
	* haifa-sched.c (initiate_bb_reg_pressure_info): Likewise.
	(priority): Likewise for locals "prev_first", "twin".
	(setup_insn_max_reg_pressure): Likewise for param "after".
	(sched_setup_bb_reg_pressure_info): Likewise.
	(no_real_insns_p): Strengthen params from const_rtx to
	const rtx_insn *.
	(schedule_block): Strengthen local "next_tail" from rtx to
	rtx_insn *.
	* ifcvt.c (find_active_insn_before): Strengthen return type and
	param "insn" from rtx to rtx_insn *.
	(find_active_insn_after): Likewise.
	(cond_exec_process_insns): Likewise for param "start" and local "insn".
	(cond_exec_process_if_block): Likewise for locals "then_start",
	"then_end", "else_start", "else_end", "insn", "start", "end", "from".
	(noce_process_if_block): Likewise for local "jump".
	(merge_if_block): Likewise for two locals named "end".
	(cond_exec_find_if_block): Likewise for local "last_insn".
	* jump.c (delete_related_insns): Rename param "insn" to
	"uncast_insn" and reintroduce "insn" as a local rtx_insn * using a
	checked cast.  Strengthen local "p" from rtx to rtx_insn *.
	* lra-constraints.c (inherit_reload_reg): Replace NULL_RTX with
	NULL.
	(split_reg): Likewise.
	* lra.c (lra_process_new_insns): Likewise.
	* modulo-sched.c (permute_partial_schedule): Strengthen param
	"last" from rtx to rtx_insn *.
	* optabs.c (add_equal_note): Likewise for param "insns" and local
	"last_insn".
	(expand_binop_directly): Add checked casts to rtx_insn * within
	NEXT_INSN (pat) uses.
	(expand_unop_direct): Likewise.
	(maybe_emit_unop_insn): Likewise.
	* recog.c (peep2_attempt): Strengthen locals "last",
	"before_try", "x" from rtx to rtx_insn *.
	* reorg.c (optimize_skip): Strengthen return type and local
	"delay_list" from rtx to rtx_insn_list *.  Strengthen param "insn"
	and locals "trial", "next_trial" from rtx to rtx_insn *.
	* resource.c (next_insn_no_annul): Strengthen return type and
	param "insn" from rtx to rtx_insn *.  Use a cast to and method of
	rtx_sequence to clarify the code.
	(mark_referenced_resources): Add a checked cast to rtx_insn *
	within PREV_INSN (x).
	(find_dead_or_set_registers): Strengthen return type, param
	"target", locals "insn", "next", "jump_insn", "this_jump_insn"
	from rtx to rtx_insn *.  Strengthen param "jump_target" from rtx *
	to rtx_insn **.
	(mark_target_live_regs): Strengthen params "insns" and "target",
	locals "insn", "jump_target", "start_insn", "stop_insn" from rtx
	to rtx_insn *.  Use cast to and method of rtx_sequence to clarify
	the code.
	* resource.h (mark_target_live_regs): Strengthen params 1 and 2
	from rtx to rtx_insn *.
	* rtl.h (copy_reg_eh_region_note_forward): Strengthen second param
	from rtx to rtx_insn *.
	(copy_reg_eh_region_note_backward): Likewise.
	(unshare_all_rtl_in_chain): Likewise for sole param.
	(dump_rtl_slim): Strengthen second and third params from const_rtx
	to const rtx_insn *.
	* sched-deps.c (sched_free_deps): Strengthen params "head" and
	"tail" and locals "insn", "next_tail" from rtx to rtx_insn *.
	* sched-ebb.c (init_ready_list): Strengthen locals "prev_head",
	"next_tail" from rtx to rtx_insn *.
	(begin_move_insn): Likewise for local "next".
	* sched-int.h (sched_free_deps): Likewise for first and second
	params.
	(no_real_insns_p): Strengthen both params from const_rtx to
	const rtx_insn *.
	(sched_setup_bb_reg_pressure_info): Strengthen second params from
	rtx to rtx_insn *.
	* sched-rgn.c (init_ready_list): Likewise for locals "prev_head",
	"next_tail".
	* sched-vis.c (dump_rtl_slim): Strengthen params "first", "last"
	and locals "insn", "tail" from const_rtx to const rtx_insn *.
	(rtl_dump_bb_for_graph): Strengthen local "insn" from rtx to
	rtx_insn *.
	(debug_rtl_slim): Strengthen params "first" and "last" from
	const_rtx to const rtx_insn *.
	* shrink-wrap.c (try_shrink_wrapping): Strengthen param
	"prologue_seq" and locals "seq", "p_insn" from rtx to rtx_insn *.
	(convert_to_simple_return): Likewise for param "returnjump".
	* shrink-wrap.h (try_shrink_wrapping): Likewise for param
	"prologue_seq".
	(convert_to_simple_return): Likewise for param "returnjump".
	* valtrack.c (propagate_for_debug): Likewise for params
	"insn", "last".
	* valtrack.h (propagate_for_debug): Likewise for second param.
---
 gcc/cfgexpand.c       |   2 +-
 gcc/cfgrtl.c          |   1 +
 gcc/combine.c         |  58 +++++++++--------
 gcc/config/spu/spu.c  |   4 +-
 gcc/dse.c             |  14 ++--
 gcc/dwarf2cfi.c       |  12 ++--
 gcc/emit-rtl.c        | 172 ++++++++++++++++++++++++++++++--------------------
 gcc/except.c          |  10 +--
 gcc/expr.c            |   5 +-
 gcc/function.c        |  27 ++++----
 gcc/gcse.c            |   4 +-
 gcc/haifa-sched.c     |  12 ++--
 gcc/ifcvt.c           |  57 +++++++++--------
 gcc/jump.c            |   5 +-
 gcc/lra-constraints.c |   6 +-
 gcc/lra.c             |   4 +-
 gcc/modulo-sched.c    |   4 +-
 gcc/optabs.c          |  21 +++---
 gcc/recog.c           |   3 +-
 gcc/reorg.c           |  14 ++--
 gcc/resource.c        |  50 +++++++--------
 gcc/resource.h        |   2 +-
 gcc/rtl.h             |   9 +--
 gcc/sched-deps.c      |   6 +-
 gcc/sched-ebb.c       |   6 +-
 gcc/sched-int.h       |   6 +-
 gcc/sched-rgn.c       |   4 +-
 gcc/sched-vis.c       |  14 ++--
 gcc/shrink-wrap.c     |   8 +--
 gcc/shrink-wrap.h     |   5 +-
 gcc/valtrack.c        |   2 +-
 gcc/valtrack.h        |   2 +-
 32 files changed, 302 insertions(+), 247 deletions(-)

diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index bdd7028..ebe2397 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -5833,7 +5833,7 @@ pass_expand::execute (function *fun)
 
   if (var_ret_seq)
     {
-      rtx after = return_label;
+      rtx_insn *after = return_label;
       rtx_insn *next = NEXT_INSN (after);
       if (next && NOTE_INSN_BASIC_BLOCK_P (next))
 	after = next;
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 59d633d..5e42a97 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -1604,6 +1604,7 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
 
   if (EDGE_COUNT (e->src->succs) >= 2 || abnormal_edge_flags || asm_goto_edge)
     {
+      rtx_insn *note;
       gcov_type count = e->count;
       int probability = e->probability;
       /* Create the new structures.  */
diff --git a/gcc/combine.c b/gcc/combine.c
index cbd158c..7665a1a 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -513,13 +513,13 @@ target_canonicalize_comparison (enum rtx_code *code, rtx *op0, rtx *op1,
    reg_stat vector is made larger if the splitter creates a new
    register.  */
 
-static rtx
+static rtx_insn *
 combine_split_insns (rtx pattern, rtx insn)
 {
-  rtx ret;
+  rtx_insn *ret;
   unsigned int nregs;
 
-  ret = split_insns (pattern, insn);
+  ret = as_a_nullable <rtx_insn *> (split_insns (pattern, insn));
   nregs = max_reg_num ();
   if (nregs > reg_stat.length ())
     reg_stat.safe_grow_cleared (nregs);
@@ -2266,8 +2266,9 @@ likely_spilled_retval_1 (rtx x, const_rtx set, void *data)
 static int
 likely_spilled_retval_p (rtx_insn *insn)
 {
-  rtx use = BB_END (this_basic_block);
-  rtx reg, p;
+  rtx_insn *use = BB_END (this_basic_block);
+  rtx reg;
+  rtx_insn *p;
   unsigned regno, nregs;
   /* We assume here that no machine mode needs more than
      32 hard registers when the value overlaps with a register
@@ -3305,13 +3306,14 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
   if (i1 && insn_code_number < 0 && GET_CODE (newpat) == SET
       && asm_noperands (newpat) < 0)
     {
-      rtx parallel, m_split, *split;
+      rtx parallel, *split;
+      rtx_insn *m_split_insn;
 
       /* See if the MD file can split NEWPAT.  If it can't, see if letting it
 	 use I2DEST as a scratch register will help.  In the latter case,
 	 convert I2DEST to the mode of the source of NEWPAT if we can.  */
 
-      m_split = combine_split_insns (newpat, i3);
+      m_split_insn = combine_split_insns (newpat, i3);
 
       /* We can only use I2DEST as a scratch reg if it doesn't overlap any
 	 inputs of NEWPAT.  */
@@ -3320,7 +3322,7 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
 	 possible to try that as a scratch reg.  This would require adding
 	 more code to make it work though.  */
 
-      if (m_split == 0 && ! reg_overlap_mentioned_p (i2dest, newpat))
+      if (m_split_insn == 0 && ! reg_overlap_mentioned_p (i2dest, newpat))
 	{
 	  enum machine_mode new_mode = GET_MODE (SET_DEST (newpat));
 
@@ -3330,11 +3332,11 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
 				       gen_rtvec (2, newpat,
 						  gen_rtx_CLOBBER (VOIDmode,
 								   i2dest)));
-	  m_split = combine_split_insns (parallel, i3);
+	  m_split_insn = combine_split_insns (parallel, i3);
 
 	  /* If that didn't work, try changing the mode of I2DEST if
 	     we can.  */
-	  if (m_split == 0
+	  if (m_split_insn == 0
 	      && new_mode != GET_MODE (i2dest)
 	      && new_mode != VOIDmode
 	      && can_change_dest_mode (i2dest, added_sets_2, new_mode))
@@ -3355,9 +3357,9 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
 			   gen_rtvec (2, newpat,
 				      gen_rtx_CLOBBER (VOIDmode,
 						       ni2dest))));
-	      m_split = combine_split_insns (parallel, i3);
+	      m_split_insn = combine_split_insns (parallel, i3);
 
-	      if (m_split == 0
+	      if (m_split_insn == 0
 		  && REGNO (i2dest) >= FIRST_PSEUDO_REGISTER)
 		{
 		  struct undo *buf;
@@ -3370,34 +3372,34 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
 		}
 	    }
 
-	  i2scratch = m_split != 0;
+	  i2scratch = m_split_insn != 0;
 	}
 
       /* If recog_for_combine has discarded clobbers, try to use them
 	 again for the split.  */
-      if (m_split == 0 && newpat_vec_with_clobbers)
+      if (m_split_insn == 0 && newpat_vec_with_clobbers)
 	{
 	  parallel = gen_rtx_PARALLEL (VOIDmode, newpat_vec_with_clobbers);
-	  m_split = combine_split_insns (parallel, i3);
+	  m_split_insn = combine_split_insns (parallel, i3);
 	}
 
-      if (m_split && NEXT_INSN (m_split) == NULL_RTX)
+      if (m_split_insn && NEXT_INSN (m_split_insn) == NULL_RTX)
 	{
-	  m_split = PATTERN (m_split);
-	  insn_code_number = recog_for_combine (&m_split, i3, &new_i3_notes);
+	  rtx m_split_pat = PATTERN (m_split_insn);
+	  insn_code_number = recog_for_combine (&m_split_pat, i3, &new_i3_notes);
 	  if (insn_code_number >= 0)
-	    newpat = m_split;
+	    newpat = m_split_pat;
 	}
-      else if (m_split && NEXT_INSN (NEXT_INSN (m_split)) == NULL_RTX
+      else if (m_split_insn && NEXT_INSN (NEXT_INSN (m_split_insn)) == NULL_RTX
 	       && (next_nonnote_nondebug_insn (i2) == i3
-		   || ! use_crosses_set_p (PATTERN (m_split), DF_INSN_LUID (i2))))
+		   || ! use_crosses_set_p (PATTERN (m_split_insn), DF_INSN_LUID (i2))))
 	{
 	  rtx i2set, i3set;
-	  rtx newi3pat = PATTERN (NEXT_INSN (m_split));
-	  newi2pat = PATTERN (m_split);
+	  rtx newi3pat = PATTERN (NEXT_INSN (m_split_insn));
+	  newi2pat = PATTERN (m_split_insn);
 
-	  i3set = single_set (NEXT_INSN (m_split));
-	  i2set = single_set (m_split);
+	  i3set = single_set (NEXT_INSN (m_split_insn));
+	  i2set = single_set (m_split_insn);
 
 	  i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
 
@@ -4506,9 +4508,9 @@ find_split_point (rtx *loc, rtx_insn *insn, bool set_src)
 					    MEM_ADDR_SPACE (x)))
 	{
 	  rtx reg = regno_reg_rtx[FIRST_PSEUDO_REGISTER];
-	  rtx seq = combine_split_insns (gen_rtx_SET (VOIDmode, reg,
-						      XEXP (x, 0)),
-					 subst_insn);
+	  rtx_insn *seq = combine_split_insns (gen_rtx_SET (VOIDmode, reg,
+							    XEXP (x, 0)),
+					       subst_insn);
 
 	  /* This should have produced two insns, each of which sets our
 	     placeholder.  If the source of the second is a valid address,
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index 811a6c8..2d77b83 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -2664,8 +2664,8 @@ spu_machine_dependent_reorg (void)
 	   label because GCC expects it at the beginning of the block. */
 	rtx unspec = SET_SRC (XVECEXP (PATTERN (insn), 0, 0));
 	rtx label_ref = XVECEXP (unspec, 0, 0);
-	rtx label = XEXP (label_ref, 0);
-	rtx branch;
+	rtx_insn *label = as_a <rtx_insn *> (XEXP (label_ref, 0));
+	rtx_insn *branch;
 	int offset = 0;
 	for (branch = NEXT_INSN (label);
 	     !JUMP_P (branch) && !CALL_P (branch);
diff --git a/gcc/dse.c b/gcc/dse.c
index a122eff..a2b4d37 100644
--- a/gcc/dse.c
+++ b/gcc/dse.c
@@ -812,7 +812,7 @@ free_store_info (insn_info_t insn_info)
 
 typedef struct
 {
-  rtx first, current;
+  rtx_insn *first, *current;
   regset fixed_regs_live;
   bool failure;
 } note_add_store_info;
@@ -823,7 +823,7 @@ typedef struct
 static void
 note_add_store (rtx loc, const_rtx expr ATTRIBUTE_UNUSED, void *data)
 {
-  rtx insn;
+  rtx_insn *insn;
   note_add_store_info *info = (note_add_store_info *) data;
   int r, n;
 
@@ -864,7 +864,7 @@ emit_inc_dec_insn_before (rtx mem ATTRIBUTE_UNUSED,
 			  rtx dest, rtx src, rtx srcoff, void *arg)
 {
   insn_info_t insn_info = (insn_info_t) arg;
-  rtx insn = insn_info->insn, new_insn, cur;
+  rtx_insn *insn = insn_info->insn, *new_insn, *cur;
   note_add_store_info info;
 
   /* We can reuse all operands without copying, because we are about
@@ -877,7 +877,7 @@ emit_inc_dec_insn_before (rtx mem ATTRIBUTE_UNUSED,
       end_sequence ();
     }
   else
-    new_insn = gen_move_insn (dest, src);
+    new_insn = as_a <rtx_insn *> (gen_move_insn (dest, src));
   info.first = new_insn;
   info.fixed_regs_live = insn_info->fixed_regs_live;
   info.failure = false;
@@ -1741,7 +1741,8 @@ find_shift_sequence (int access_size,
        GET_MODE_BITSIZE (new_mode) <= BITS_PER_WORD;
        new_mode = GET_MODE_WIDER_MODE (new_mode))
     {
-      rtx target, new_reg, shift_seq, insn, new_lhs;
+      rtx target, new_reg, new_lhs;
+      rtx_insn *shift_seq, *insn;
       int cost;
 
       /* If a constant was stored into memory, try to simplify it here,
@@ -1961,7 +1962,8 @@ replace_read (store_info_t store_info, insn_info_t store_insn,
 {
   enum machine_mode store_mode = GET_MODE (store_info->mem);
   enum machine_mode read_mode = GET_MODE (read_info->mem);
-  rtx insns, this_insn, read_reg;
+  rtx_insn *insns, *this_insn;
+  rtx read_reg;
   basic_block bb;
 
   if (!dbg_cnt (dse))
diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index ca1c2e3..28d8ff3 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -113,7 +113,7 @@ typedef struct
   HOST_WIDE_INT beg_delay_args_size, end_delay_args_size;
 
   /* The first EH insn in the trace, where beg_delay_args_size must be set.  */
-  rtx eh_head;
+  rtx_insn *eh_head;
 
   /* The following variables contain data used in interpreting frame related
      expressions.  These are not part of the "real" row state as defined by
@@ -876,7 +876,7 @@ notice_args_size (rtx insn)
    data within the trace related to EH insns and args_size.  */
 
 static void
-notice_eh_throw (rtx insn)
+notice_eh_throw (rtx_insn *insn)
 {
   HOST_WIDE_INT args_size;
 
@@ -2577,10 +2577,10 @@ create_cfi_notes (void)
 
 /* Return the insn before the first NOTE_INSN_CFI after START.  */
 
-static rtx
-before_next_cfi_note (rtx start)
+static rtx_insn *
+before_next_cfi_note (rtx_insn *start)
 {
-  rtx prev = start;
+  rtx_insn *prev = start;
   while (start)
     {
       if (NOTE_P (start) && NOTE_KIND (start) == NOTE_INSN_CFI)
@@ -2675,7 +2675,7 @@ connect_traces (void)
 
       if (dump_file && add_cfi_insn != ti->head)
 	{
-	  rtx note;
+	  rtx_insn *note;
 
 	  fprintf (dump_file, "Fixup between trace %u and %u:\n",
 		   prev_ti->id, ti->id);
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 6269b74..2fc07d6 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -2741,7 +2741,7 @@ reset_insn_used_flags (rtx insn)
 static void
 reset_all_used_flags (void)
 {
-  rtx p;
+  rtx_insn *p;
 
   for (p = get_insns (); p; p = NEXT_INSN (p))
     if (INSN_P (p))
@@ -2776,7 +2776,7 @@ verify_insn_sharing (rtx insn)
 DEBUG_FUNCTION void
 verify_rtl_sharing (void)
 {
-  rtx p;
+  rtx_insn *p;
 
   timevar_push (TV_VERIFY_RTL_SHARING);
 
@@ -2802,7 +2802,7 @@ verify_rtl_sharing (void)
    Assumes the mark bits are cleared at entry.  */
 
 void
-unshare_all_rtl_in_chain (rtx insn)
+unshare_all_rtl_in_chain (rtx_insn *insn)
 {
   for (; insn; insn = NEXT_INSN (insn))
     if (INSN_P (insn))
@@ -3130,7 +3130,7 @@ get_last_insn_anywhere (void)
 rtx
 get_first_nonnote_insn (void)
 {
-  rtx insn = get_insns ();
+  rtx_insn *insn = get_insns ();
 
   if (insn)
     {
@@ -3143,7 +3143,7 @@ get_first_nonnote_insn (void)
 	{
 	  if (NONJUMP_INSN_P (insn)
 	      && GET_CODE (PATTERN (insn)) == SEQUENCE)
-	    insn = XVECEXP (PATTERN (insn), 0, 0);
+	    insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
 	}
     }
 
@@ -3156,7 +3156,7 @@ get_first_nonnote_insn (void)
 rtx
 get_last_nonnote_insn (void)
 {
-  rtx insn = get_last_insn ();
+  rtx_insn *insn = get_last_insn ();
 
   if (insn)
     {
@@ -3167,10 +3167,9 @@ get_last_nonnote_insn (void)
 	  continue;
       else
 	{
-	  if (NONJUMP_INSN_P (insn)
-	      && GET_CODE (PATTERN (insn)) == SEQUENCE)
-	    insn = XVECEXP (PATTERN (insn), 0,
-			    XVECLEN (PATTERN (insn), 0) - 1);
+	  if (NONJUMP_INSN_P (insn))
+	    if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
+	      insn = seq->insn (seq->len () - 1);
 	}
     }
 
@@ -3202,42 +3201,45 @@ get_max_insn_count (void)
    of the sequence.  */
 
 rtx_insn *
-next_insn (rtx insn)
+next_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
   if (insn)
     {
       insn = NEXT_INSN (insn);
       if (insn && NONJUMP_INSN_P (insn)
 	  && GET_CODE (PATTERN (insn)) == SEQUENCE)
-	insn = XVECEXP (PATTERN (insn), 0, 0);
+	insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the previous insn.  If it is a SEQUENCE, return the last insn
    of the sequence.  */
 
 rtx_insn *
-previous_insn (rtx insn)
+previous_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
   if (insn)
     {
       insn = PREV_INSN (insn);
-      if (insn && NONJUMP_INSN_P (insn)
-	  && GET_CODE (PATTERN (insn)) == SEQUENCE)
-	insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
+      if (insn && NONJUMP_INSN_P (insn))
+	if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
+	  insn = seq->insn (seq->len () - 1);
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the next insn after INSN that is not a NOTE.  This routine does not
    look inside SEQUENCEs.  */
 
 rtx_insn *
-next_nonnote_insn (rtx insn)
+next_nonnote_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3245,7 +3247,7 @@ next_nonnote_insn (rtx insn)
 	break;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the next insn after INSN that is not a NOTE, but stop the
@@ -3253,8 +3255,10 @@ next_nonnote_insn (rtx insn)
    look inside SEQUENCEs.  */
 
 rtx_insn *
-next_nonnote_insn_bb (rtx insn)
+next_nonnote_insn_bb (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3264,15 +3268,17 @@ next_nonnote_insn_bb (rtx insn)
 	return NULL;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the previous insn before INSN that is not a NOTE.  This routine does
    not look inside SEQUENCEs.  */
 
 rtx_insn *
-prev_nonnote_insn (rtx insn)
+prev_nonnote_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3280,7 +3286,7 @@ prev_nonnote_insn (rtx insn)
 	break;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the previous insn before INSN that is not a NOTE, but stop
@@ -3288,8 +3294,10 @@ prev_nonnote_insn (rtx insn)
    not look inside SEQUENCEs.  */
 
 rtx_insn *
-prev_nonnote_insn_bb (rtx insn)
+prev_nonnote_insn_bb (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3299,15 +3307,17 @@ prev_nonnote_insn_bb (rtx insn)
 	return NULL;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the next insn after INSN that is not a DEBUG_INSN.  This
    routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-next_nondebug_insn (rtx insn)
+next_nondebug_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3315,15 +3325,17 @@ next_nondebug_insn (rtx insn)
 	break;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the previous insn before INSN that is not a DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-prev_nondebug_insn (rtx insn)
+prev_nondebug_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3331,15 +3343,17 @@ prev_nondebug_insn (rtx insn)
 	break;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-next_nonnote_nondebug_insn (rtx insn)
+next_nonnote_nondebug_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3347,15 +3361,17 @@ next_nonnote_nondebug_insn (rtx insn)
 	break;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-prev_nonnote_nondebug_insn (rtx insn)
+prev_nonnote_nondebug_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3363,7 +3379,7 @@ prev_nonnote_nondebug_insn (rtx insn)
 	break;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
@@ -3371,8 +3387,10 @@ prev_nonnote_nondebug_insn (rtx insn)
    SEQUENCEs.  */
 
 rtx_insn *
-next_real_insn (rtx insn)
+next_real_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3380,7 +3398,7 @@ next_real_insn (rtx insn)
 	break;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
@@ -3388,8 +3406,10 @@ next_real_insn (rtx insn)
    SEQUENCEs.  */
 
 rtx_insn *
-prev_real_insn (rtx insn)
+prev_real_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3397,7 +3417,7 @@ prev_real_insn (rtx insn)
 	break;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the last CALL_INSN in the current list, or 0 if there is none.
@@ -3432,8 +3452,10 @@ active_insn_p (const_rtx insn)
 }
 
 rtx_insn *
-next_active_insn (rtx insn)
+next_active_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3441,7 +3463,7 @@ next_active_insn (rtx insn)
 	break;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Find the last insn before INSN that really does something.  This routine
@@ -3449,8 +3471,10 @@ next_active_insn (rtx insn)
    standalone USE and CLOBBER insn.  */
 
 rtx_insn *
-prev_active_insn (rtx insn)
+prev_active_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3458,7 +3482,7 @@ prev_active_insn (rtx insn)
 	break;
     }
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 \f
 #ifdef HAVE_cc0
@@ -3472,8 +3496,10 @@ prev_active_insn (rtx insn)
    Return 0 if we can't find the insn.  */
 
 rtx_insn *
-next_cc0_user (rtx insn)
+next_cc0_user (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
 
   if (note)
@@ -3481,10 +3507,10 @@ next_cc0_user (rtx insn)
 
   insn = next_nonnote_insn (insn);
   if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
-    insn = XVECEXP (PATTERN (insn), 0, 0);
+    insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
 
   if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
-    return as_a_nullable <rtx_insn *> (insn);
+    return insn;
 
   return 0;
 }
@@ -3493,8 +3519,10 @@ next_cc0_user (rtx insn)
    note, it is the previous insn.  */
 
 rtx_insn *
-prev_cc0_setter (rtx insn)
+prev_cc0_setter (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
+
   rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
 
   if (note)
@@ -3503,7 +3531,7 @@ prev_cc0_setter (rtx insn)
   insn = prev_nonnote_insn (insn);
   gcc_assert (sets_cc0_p (PATTERN (insn)));
 
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 #endif
 
@@ -3573,27 +3601,29 @@ mark_label_nuses (rtx x)
    returns TRIAL.  If the insn to be returned can be split, it will be.  */
 
 rtx_insn *
-try_split (rtx pat, rtx trial, int last)
+try_split (rtx pat, rtx uncast_trial, int last)
 {
+  rtx_insn *trial = as_a <rtx_insn *> (uncast_trial);
   rtx_insn *before = PREV_INSN (trial);
   rtx_insn *after = NEXT_INSN (trial);
   int has_barrier = 0;
-  rtx note, seq, tem;
+  rtx note;
+  rtx_insn *seq, *tem;
   int probability;
-  rtx insn_last, insn;
+  rtx_insn *insn_last, *insn;
   int njumps = 0;
   rtx call_insn = NULL_RTX;
 
   /* We're not good at redistributing frame information.  */
   if (RTX_FRAME_RELATED_P (trial))
-    return as_a <rtx_insn *> (trial);
+    return trial;
 
   if (any_condjump_p (trial)
       && (note = find_reg_note (trial, REG_BR_PROB, 0)))
     split_branch_probability = XINT (note, 0);
   probability = split_branch_probability;
 
-  seq = split_insns (pat, trial);
+  seq = as_a_nullable <rtx_insn *> (split_insns (pat, trial));
 
   split_branch_probability = -1;
 
@@ -3606,7 +3636,7 @@ try_split (rtx pat, rtx trial, int last)
     }
 
   if (!seq)
-    return as_a <rtx_insn *> (trial);
+    return trial;
 
   /* Avoid infinite loop if any insn of the result matches
      the original pattern.  */
@@ -3615,7 +3645,7 @@ try_split (rtx pat, rtx trial, int last)
     {
       if (INSN_P (insn_last)
 	  && rtx_equal_p (PATTERN (insn_last), pat))
-	return as_a <rtx_insn *> (trial);
+	return trial;
       if (!NEXT_INSN (insn_last))
 	break;
       insn_last = NEXT_INSN (insn_last);
@@ -3655,7 +3685,8 @@ try_split (rtx pat, rtx trial, int last)
       for (insn = insn_last; insn ; insn = PREV_INSN (insn))
 	if (CALL_P (insn))
 	  {
-	    rtx next, *p;
+	    rtx_insn *next;
+	    rtx *p;
 
 	    gcc_assert (call_insn == NULL_RTX);
 	    call_insn = insn;
@@ -4089,8 +4120,9 @@ set_insn_deleted (rtx insn)
    To really delete an insn and related DF information, use delete_insn.  */
 
 void
-remove_insn (rtx insn)
+remove_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   rtx_insn *next = NEXT_INSN (insn);
   rtx_insn *prev = PREV_INSN (insn);
   basic_block bb;
@@ -4626,9 +4658,10 @@ emit_note_before (enum insn_note subtype, rtx uncast_before)
    MAKE_RAW indicates how to turn PATTERN into a real insn.  */
 
 static rtx_insn *
-emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
+emit_pattern_after_setloc (rtx pattern, rtx uncast_after, int loc,
 			   rtx_insn *(*make_raw) (rtx))
 {
+  rtx_insn *after = as_a_nullable <rtx_insn *> (uncast_after);
   rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
 
   if (pattern == NULL_RTX || !loc)
@@ -4651,10 +4684,11 @@ emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
    any DEBUG_INSNs.  */
 
 static rtx_insn *
-emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
+emit_pattern_after (rtx pattern, rtx uncast_after, bool skip_debug_insns,
 		    rtx_insn *(*make_raw) (rtx))
 {
-  rtx prev = after;
+  rtx_insn *after = as_a_nullable <rtx_insn *> (uncast_after);
+  rtx_insn *prev = after;
 
   if (skip_debug_insns)
     while (DEBUG_INSN_P (prev))
@@ -4729,16 +4763,17 @@ emit_debug_insn_after (rtx pattern, rtx after)
    CALL_INSN, etc.  */
 
 static rtx_insn *
-emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
+emit_pattern_before_setloc (rtx pattern, rtx uncast_before, int loc, bool insnp,
 			    rtx_insn *(*make_raw) (rtx))
 {
-  rtx first = PREV_INSN (before);
-  rtx last = emit_pattern_before_noloc (pattern, before,
-                                        insnp ? before : NULL_RTX,
-                                        NULL, make_raw);
+  rtx_insn *before = as_a <rtx_insn *> (uncast_before);
+  rtx_insn *first = PREV_INSN (before);
+  rtx_insn *last = emit_pattern_before_noloc (pattern, before,
+					      insnp ? before : NULL_RTX,
+					      NULL, make_raw);
 
   if (pattern == NULL_RTX || !loc)
-    return as_a_nullable <rtx_insn *> (last);
+    return last;
 
   if (!first)
     first = get_insns ();
@@ -4752,7 +4787,7 @@ emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
 	break;
       first = NEXT_INSN (first);
     }
-  return as_a_nullable <rtx_insn *> (last);
+  return last;
 }
 
 /* Insert PATTERN before BEFORE.  MAKE_RAW indicates how to turn PATTERN
@@ -4761,10 +4796,11 @@ emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
    INSN as opposed to a JUMP_INSN, CALL_INSN, etc.  */
 
 static rtx_insn *
-emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
+emit_pattern_before (rtx pattern, rtx uncast_before, bool skip_debug_insns,
 		     bool insnp, rtx_insn *(*make_raw) (rtx))
 {
-  rtx next = before;
+  rtx_insn *before = as_a_nullable <rtx_insn *> (uncast_before);
+  rtx_insn *next = before;
 
   if (skip_debug_insns)
     while (DEBUG_INSN_P (next))
diff --git a/gcc/except.c b/gcc/except.c
index e2604f2..d44c027 100644
--- a/gcc/except.c
+++ b/gcc/except.c
@@ -1753,9 +1753,10 @@ insn_could_throw_p (const_rtx insn)
    to look for a note, or the note itself.  */
 
 void
-copy_reg_eh_region_note_forward (rtx note_or_insn, rtx first, rtx last)
+copy_reg_eh_region_note_forward (rtx note_or_insn, rtx_insn *first, rtx last)
 {
-  rtx insn, note = note_or_insn;
+  rtx_insn *insn;
+  rtx note = note_or_insn;
 
   if (INSN_P (note_or_insn))
     {
@@ -1774,9 +1775,10 @@ copy_reg_eh_region_note_forward (rtx note_or_insn, rtx first, rtx last)
 /* Likewise, but iterate backward.  */
 
 void
-copy_reg_eh_region_note_backward (rtx note_or_insn, rtx last, rtx first)
+copy_reg_eh_region_note_backward (rtx note_or_insn, rtx_insn *last, rtx first)
 {
-  rtx insn, note = note_or_insn;
+  rtx_insn *insn;
+  rtx note = note_or_insn;
 
   if (INSN_P (note_or_insn))
     {
diff --git a/gcc/expr.c b/gcc/expr.c
index 0290c4e..9905d49 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -3931,11 +3931,12 @@ find_args_size_adjust (rtx insn)
 }
 
 int
-fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
+fixup_args_size_notes (rtx prev, rtx uncast_last, int end_args_size)
 {
+  rtx_insn *last = as_a_nullable <rtx_insn *> (uncast_last);
   int args_size = end_args_size;
   bool saw_unknown = false;
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = last; insn != prev; insn = PREV_INSN (insn))
     {
diff --git a/gcc/function.c b/gcc/function.c
index 5561dc5..2462ea2 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -120,7 +120,7 @@ static tree *get_block_vector (tree, int *);
 extern tree debug_find_var_in_block_tree (tree, tree);
 /* We always define `record_insns' even if it's not used so that we
    can always export `prologue_epilogue_contains'.  */
-static void record_insns (rtx, rtx, htab_t *) ATTRIBUTE_UNUSED;
+static void record_insns (rtx_insn *, rtx, htab_t *) ATTRIBUTE_UNUSED;
 static bool contains (const_rtx, htab_t);
 static void prepare_function_start (void);
 static void do_clobber_return_reg (rtx, void *);
@@ -4952,9 +4952,9 @@ do_warn_unused_parameter (tree fn)
 /* Set the location of the insn chain starting at INSN to LOC.  */
 
 static void
-set_insn_locations (rtx insn, int loc)
+set_insn_locations (rtx_insn *insn, int loc)
 {
-  while (insn != NULL_RTX)
+  while (insn != NULL)
     {
       if (INSN_P (insn))
 	INSN_LOCATION (insn) = loc;
@@ -5254,9 +5254,9 @@ get_arg_pointer_save_area (void)
    for the first time.  */
 
 static void
-record_insns (rtx insns, rtx end, htab_t *hashp)
+record_insns (rtx_insn *insns, rtx end, htab_t *hashp)
 {
-  rtx tmp;
+  rtx_insn *tmp;
   htab_t hash = *hashp;
 
   if (hash == NULL)
@@ -5394,8 +5394,9 @@ set_return_jump_label (rtx returnjump)
 #if defined (HAVE_return) || defined (HAVE_simple_return)
 /* Return true if there are any active insns between HEAD and TAIL.  */
 bool
-active_insn_between (rtx head, rtx tail)
+active_insn_between (rtx head, rtx uncast_tail)
 {
+  rtx_insn *tail = as_a_nullable <rtx_insn *> (uncast_tail);
   while (tail)
     {
       if (active_insn_p (tail))
@@ -5585,9 +5586,8 @@ thread_prologue_and_epilogue_insns (void)
   bitmap_head bb_flags;
 #endif
   rtx_insn *returnjump;
-  rtx seq ATTRIBUTE_UNUSED;
   rtx_insn *epilogue_end ATTRIBUTE_UNUSED;
-  rtx prologue_seq ATTRIBUTE_UNUSED, split_prologue_seq ATTRIBUTE_UNUSED;
+  rtx_insn *prologue_seq ATTRIBUTE_UNUSED, *split_prologue_seq ATTRIBUTE_UNUSED;
   edge e, entry_edge, orig_entry_edge, exit_fallthru_edge;
   edge_iterator ei;
 
@@ -5596,7 +5596,6 @@ thread_prologue_and_epilogue_insns (void)
   rtl_profile_for_bb (ENTRY_BLOCK_PTR_FOR_FN (cfun));
 
   inserted = false;
-  seq = NULL_RTX;
   epilogue_end = NULL;
   returnjump = NULL;
 
@@ -5607,7 +5606,7 @@ thread_prologue_and_epilogue_insns (void)
   entry_edge = single_succ_edge (ENTRY_BLOCK_PTR_FOR_FN (cfun));
   orig_entry_edge = entry_edge;
 
-  split_prologue_seq = NULL_RTX;
+  split_prologue_seq = NULL;
   if (flag_split_stack
       && (lookup_attribute ("no_split_stack", DECL_ATTRIBUTES (cfun->decl))
 	  == NULL))
@@ -5627,12 +5626,12 @@ thread_prologue_and_epilogue_insns (void)
 #endif
     }
 
-  prologue_seq = NULL_RTX;
+  prologue_seq = NULL;
 #ifdef HAVE_prologue
   if (HAVE_prologue)
     {
       start_sequence ();
-      seq = gen_prologue ();
+      rtx_insn *seq = as_a <rtx_insn *> (gen_prologue ());
       emit_insn (seq);
 
       /* Insert an explicit USE for the frame pointer
@@ -5769,7 +5768,7 @@ thread_prologue_and_epilogue_insns (void)
     {
       start_sequence ();
       epilogue_end = emit_note (NOTE_INSN_EPILOGUE_BEG);
-      seq = gen_epilogue ();
+      rtx_insn *seq = as_a <rtx_insn *> (gen_epilogue ());
       if (seq)
 	emit_jump_insn (seq);
 
@@ -5870,7 +5869,7 @@ epilogue_done:
 	  start_sequence ();
 	  emit_note (NOTE_INSN_EPILOGUE_BEG);
 	  emit_insn (ep_seq);
-	  seq = get_insns ();
+	  rtx_insn *seq = get_insns ();
 	  end_sequence ();
 
 	  /* Retain a map of the epilogue insns.  Used in life analysis to
diff --git a/gcc/gcse.c b/gcc/gcse.c
index c4fec8d..ca8fdec 100644
--- a/gcc/gcse.c
+++ b/gcc/gcse.c
@@ -2156,7 +2156,7 @@ process_insert_insn (struct expr *expr)
 static void
 insert_insn_end_basic_block (struct expr *expr, basic_block bb)
 {
-  rtx insn = BB_END (bb);
+  rtx_insn *insn = BB_END (bb);
   rtx_insn *new_insn;
   rtx reg = expr->reaching_reg;
   int regno = REGNO (reg);
@@ -2183,7 +2183,7 @@ insert_insn_end_basic_block (struct expr *expr, basic_block bb)
 	 if cc0 isn't set.  */
       rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
       if (note)
-	insn = XEXP (note, 0);
+	insn = as_a_nullable <rtx_insn *> (XEXP (note, 0));
       else
 	{
 	  rtx_insn *maybe_cc0_setter = prev_nonnote_insn (insn);
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index df4003d..7aa8b7d 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -1037,7 +1037,7 @@ static void
 initiate_bb_reg_pressure_info (basic_block bb)
 {
   unsigned int i ATTRIBUTE_UNUSED;
-  rtx insn;
+  rtx_insn *insn;
 
   if (current_nr_blocks > 1)
     FOR_BB_INSNS (bb, insn)
@@ -1604,7 +1604,7 @@ priority (rtx_insn *insn)
 	this_priority = insn_cost (insn);
       else
 	{
-	  rtx prev_first, twin;
+	  rtx_insn *prev_first, *twin;
 	  basic_block rec;
 
 	  /* For recovery check instructions we calculate priority slightly
@@ -2997,7 +2997,7 @@ update_register_pressure (rtx_insn *insn)
    meaning in sched-int.h::_haifa_insn_data) for all current BB insns
    after insn AFTER.  */
 static void
-setup_insn_max_reg_pressure (rtx after, bool update_p)
+setup_insn_max_reg_pressure (rtx_insn *after, bool update_p)
 {
   int i, p;
   bool eq_p;
@@ -3060,7 +3060,7 @@ update_reg_and_insn_max_reg_pressure (rtx_insn *insn)
    insns starting after insn AFTER.  Set up also max register pressure
    for all insns of the basic block.  */
 void
-sched_setup_bb_reg_pressure_info (basic_block bb, rtx after)
+sched_setup_bb_reg_pressure_info (basic_block bb, rtx_insn *after)
 {
   gcc_assert (sched_pressure == SCHED_PRESSURE_WEIGHTED);
   initiate_bb_reg_pressure_info (bb);
@@ -4780,7 +4780,7 @@ get_ebb_head_tail (basic_block beg, basic_block end,
 /* Return nonzero if there are no real insns in the range [ HEAD, TAIL ].  */
 
 int
-no_real_insns_p (const_rtx head, const_rtx tail)
+no_real_insns_p (const rtx_insn *head, const rtx_insn *tail)
 {
   while (head != NEXT_INSN (tail))
     {
@@ -5923,7 +5923,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
 
   /* Head/tail info for this block.  */
   rtx_insn *prev_head = current_sched_info->prev_head;
-  rtx next_tail = current_sched_info->next_tail;
+  rtx_insn *next_tail = current_sched_info->next_tail;
   rtx_insn *head = NEXT_INSN (prev_head);
   rtx_insn *tail = PREV_INSN (next_tail);
 
diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index c5f3647..6ccb980 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -88,10 +88,11 @@ static int count_bb_insns (const_basic_block);
 static bool cheap_bb_rtx_cost_p (const_basic_block, int, int);
 static rtx_insn *first_active_insn (basic_block);
 static rtx_insn *last_active_insn (basic_block, int);
-static rtx find_active_insn_before (basic_block, rtx);
-static rtx find_active_insn_after (basic_block, rtx);
+static rtx_insn *find_active_insn_before (basic_block, rtx_insn *);
+static rtx_insn *find_active_insn_after (basic_block, rtx_insn *);
 static basic_block block_fallthru (basic_block);
-static int cond_exec_process_insns (ce_if_block *, rtx, rtx, rtx, int, int);
+static int cond_exec_process_insns (ce_if_block *, rtx_insn *, rtx, rtx, int,
+				    int);
 static rtx cond_exec_get_condition (rtx);
 static rtx noce_get_condition (rtx_insn *, rtx_insn **, bool);
 static int noce_operand_ok (const_rtx);
@@ -257,11 +258,11 @@ last_active_insn (basic_block bb, int skip_use_p)
 
 /* Return the active insn before INSN inside basic block CURR_BB. */
 
-static rtx
-find_active_insn_before (basic_block curr_bb, rtx insn)
+static rtx_insn *
+find_active_insn_before (basic_block curr_bb, rtx_insn *insn)
 {
   if (!insn || insn == BB_HEAD (curr_bb))
-    return NULL_RTX;
+    return NULL;
 
   while ((insn = PREV_INSN (insn)) != NULL_RTX)
     {
@@ -270,7 +271,7 @@ find_active_insn_before (basic_block curr_bb, rtx insn)
 
       /* No other active insn all the way to the start of the basic block. */
       if (insn == BB_HEAD (curr_bb))
-        return NULL_RTX;
+        return NULL;
     }
 
   return insn;
@@ -278,11 +279,11 @@ find_active_insn_before (basic_block curr_bb, rtx insn)
 
 /* Return the active insn after INSN inside basic block CURR_BB. */
 
-static rtx
-find_active_insn_after (basic_block curr_bb, rtx insn)
+static rtx_insn *
+find_active_insn_after (basic_block curr_bb, rtx_insn *insn)
 {
   if (!insn || insn == BB_END (curr_bb))
-    return NULL_RTX;
+    return NULL;
 
   while ((insn = NEXT_INSN (insn)) != NULL_RTX)
     {
@@ -291,7 +292,7 @@ find_active_insn_after (basic_block curr_bb, rtx insn)
 
       /* No other active insn all the way to the end of the basic block. */
       if (insn == BB_END (curr_bb))
-        return NULL_RTX;
+        return NULL;
     }
 
   return insn;
@@ -313,14 +314,14 @@ block_fallthru (basic_block bb)
 
 static int
 cond_exec_process_insns (ce_if_block *ce_info ATTRIBUTE_UNUSED,
-			 /* if block information */rtx start,
+			 /* if block information */rtx_insn *start,
 			 /* first insn to look at */rtx end,
 			 /* last insn to look at */rtx test,
 			 /* conditional execution test */int prob_val,
 			 /* probability of branch taken. */int mod_ok)
 {
   int must_be_last = FALSE;
-  rtx insn;
+  rtx_insn *insn;
   rtx xtest;
   rtx pattern;
 
@@ -445,10 +446,10 @@ cond_exec_process_if_block (ce_if_block * ce_info,
   basic_block then_bb = ce_info->then_bb;	/* THEN */
   basic_block else_bb = ce_info->else_bb;	/* ELSE or NULL */
   rtx test_expr;		/* expression in IF_THEN_ELSE that is tested */
-  rtx then_start;		/* first insn in THEN block */
-  rtx then_end;			/* last insn + 1 in THEN block */
-  rtx else_start = NULL_RTX;	/* first insn in ELSE block or NULL */
-  rtx else_end = NULL_RTX;	/* last insn + 1 in ELSE block */
+  rtx_insn *then_start;		/* first insn in THEN block */
+  rtx_insn *then_end;		/* last insn + 1 in THEN block */
+  rtx_insn *else_start = NULL;	/* first insn in ELSE block or NULL */
+  rtx_insn *else_end = NULL;	/* last insn + 1 in ELSE block */
   int max;			/* max # of insns to convert.  */
   int then_mod_ok;		/* whether conditional mods are ok in THEN */
   rtx true_expr;		/* test for else block insns */
@@ -513,9 +514,9 @@ cond_exec_process_if_block (ce_if_block * ce_info,
 					 &then_first_tail, &else_first_tail,
 					 NULL);
       if (then_first_tail == BB_HEAD (then_bb))
-	then_start = then_end = NULL_RTX;
+	then_start = then_end = NULL;
       if (else_first_tail == BB_HEAD (else_bb))
-	else_start = else_end = NULL_RTX;
+	else_start = else_end = NULL;
 
       if (n_matching > 0)
 	{
@@ -541,7 +542,7 @@ cond_exec_process_if_block (ce_if_block * ce_info,
 
 	  if (n_matching > 0)
 	    {
-	      rtx insn;
+	      rtx_insn *insn;
 
 	      /* We won't pass the insns in the head sequence to
 		 cond_exec_process_insns, so we need to test them here
@@ -556,9 +557,9 @@ cond_exec_process_if_block (ce_if_block * ce_info,
 	    }
 
 	  if (then_last_head == then_end)
-	    then_start = then_end = NULL_RTX;
+	    then_start = then_end = NULL;
 	  if (else_last_head == else_end)
-	    else_start = else_end = NULL_RTX;
+	    else_start = else_end = NULL;
 
 	  if (n_matching > 0)
 	    {
@@ -620,7 +621,7 @@ cond_exec_process_if_block (ce_if_block * ce_info,
 
       do
 	{
-	  rtx start, end;
+	  rtx_insn *start, *end;
 	  rtx t, f;
 	  enum rtx_code f_code;
 
@@ -722,7 +723,7 @@ cond_exec_process_if_block (ce_if_block * ce_info,
      that the remaining one is executed first for both branches.  */
   if (then_first_tail)
     {
-      rtx from = then_first_tail;
+      rtx_insn *from = then_first_tail;
       if (!INSN_P (from))
 	from = find_active_insn_after (then_bb, from);
       delete_insn_chain (from, BB_END (then_bb), false);
@@ -2475,7 +2476,7 @@ noce_process_if_block (struct noce_if_info *if_info)
   basic_block then_bb = if_info->then_bb;	/* THEN */
   basic_block else_bb = if_info->else_bb;	/* ELSE or NULL */
   basic_block join_bb = if_info->join_bb;	/* JOIN */
-  rtx jump = if_info->jump;
+  rtx_insn *jump = if_info->jump;
   rtx cond = if_info->cond;
   rtx_insn *insn_a, *insn_b;
   rtx set_a, set_b;
@@ -3184,7 +3185,7 @@ merge_if_block (struct ce_if_block * ce_info)
       if (EDGE_COUNT (then_bb->succs) == 0
 	  && EDGE_COUNT (combo_bb->succs) > 1)
 	{
-	  rtx end = NEXT_INSN (BB_END (then_bb));
+	  rtx_insn *end = NEXT_INSN (BB_END (then_bb));
 	  while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end))
 	    end = NEXT_INSN (end);
 
@@ -3207,7 +3208,7 @@ merge_if_block (struct ce_if_block * ce_info)
       if (EDGE_COUNT (else_bb->succs) == 0
 	  && EDGE_COUNT (combo_bb->succs) > 1)
 	{
-	  rtx end = NEXT_INSN (BB_END (else_bb));
+	  rtx_insn *end = NEXT_INSN (BB_END (else_bb));
 	  while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end))
 	    end = NEXT_INSN (end);
 
@@ -3551,7 +3552,7 @@ cond_exec_find_if_block (struct ce_if_block * ce_info)
     {
       if (single_pred_p (else_bb) && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
 	{
-	  rtx last_insn = BB_END (then_bb);
+	  rtx_insn *last_insn = BB_END (then_bb);
 
 	  while (last_insn
 		 && NOTE_P (last_insn)
diff --git a/gcc/jump.c b/gcc/jump.c
index ca1f2d2..be6a8fd 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -1242,8 +1242,9 @@ mark_jump_label_asm (rtx asmop, rtx insn)
    subsequent cfg_cleanup pass to delete unreachable code if needed.  */
 
 rtx_insn *
-delete_related_insns (rtx insn)
+delete_related_insns (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   int was_code_label = (LABEL_P (insn));
   rtx note;
   rtx_insn *next = NEXT_INSN (insn), *prev = PREV_INSN (insn);
@@ -1271,7 +1272,7 @@ delete_related_insns (rtx insn)
 	  && GET_CODE (PATTERN (insn)) == SEQUENCE
 	  && CALL_P (XVECEXP (PATTERN (insn), 0, 0))))
     {
-      rtx p;
+      rtx_insn *p;
 
       for (p = next && INSN_DELETED_P (next) ? NEXT_INSN (next) : next;
 	   p && NOTE_P (p);
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 3f6e6ff..d28d777 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -4574,7 +4574,7 @@ inherit_reload_reg (bool def_p, int original_regno,
 		   "    Rejecting inheritance %d->%d "
 		   "as it results in 2 or more insns:\n",
 		   original_regno, REGNO (new_reg));
-	  dump_rtl_slim (lra_dump_file, new_insns, NULL_RTX, -1, 0);
+	  dump_rtl_slim (lra_dump_file, new_insns, NULL, -1, 0);
 	  fprintf (lra_dump_file,
 		   "	>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n");
 	}
@@ -4836,7 +4836,7 @@ split_reg (bool before_p, int original_regno, rtx_insn *insn,
 	    (lra_dump_file,
 	     "	  Rejecting split %d->%d resulting in > 2 %s save insns:\n",
 	     original_regno, REGNO (new_reg), call_save_p ? "call" : "");
-	  dump_rtl_slim (lra_dump_file, save, NULL_RTX, -1, 0);
+	  dump_rtl_slim (lra_dump_file, save, NULL, -1, 0);
 	  fprintf (lra_dump_file,
 		   "	))))))))))))))))))))))))))))))))))))))))))))))))\n");
 	}
@@ -4852,7 +4852,7 @@ split_reg (bool before_p, int original_regno, rtx_insn *insn,
 		   "	Rejecting split %d->%d "
 		   "resulting in > 2 %s restore insns:\n",
 		   original_regno, REGNO (new_reg), call_save_p ? "call" : "");
-	  dump_rtl_slim (lra_dump_file, restore, NULL_RTX, -1, 0);
+	  dump_rtl_slim (lra_dump_file, restore, NULL, -1, 0);
 	  fprintf (lra_dump_file,
 		   "	))))))))))))))))))))))))))))))))))))))))))))))))\n");
 	}
diff --git a/gcc/lra.c b/gcc/lra.c
index 627c60f..68931c7 100644
--- a/gcc/lra.c
+++ b/gcc/lra.c
@@ -1880,12 +1880,12 @@ lra_process_new_insns (rtx_insn *insn, rtx_insn *before, rtx_insn *after,
       if (before != NULL_RTX)
 	{
 	  fprintf (lra_dump_file,"    %s before:\n", title);
-	  dump_rtl_slim (lra_dump_file, before, NULL_RTX, -1, 0);
+	  dump_rtl_slim (lra_dump_file, before, NULL, -1, 0);
 	}
       if (after != NULL_RTX)
 	{
 	  fprintf (lra_dump_file, "    %s after:\n", title);
-	  dump_rtl_slim (lra_dump_file, after, NULL_RTX, -1, 0);
+	  dump_rtl_slim (lra_dump_file, after, NULL, -1, 0);
 	}
       fprintf (lra_dump_file, "\n");
     }
diff --git a/gcc/modulo-sched.c b/gcc/modulo-sched.c
index 802848d..ab78659 100644
--- a/gcc/modulo-sched.c
+++ b/gcc/modulo-sched.c
@@ -212,7 +212,7 @@ static int compute_split_row (sbitmap, int, int, int, ddg_node_ptr);
 static int sms_order_nodes (ddg_ptr, int, int *, int *);
 static void set_node_sched_params (ddg_ptr);
 static partial_schedule_ptr sms_schedule_by_order (ddg_ptr, int, int, int *);
-static void permute_partial_schedule (partial_schedule_ptr, rtx);
+static void permute_partial_schedule (partial_schedule_ptr, rtx_insn *);
 static void generate_prolog_epilog (partial_schedule_ptr, struct loop *,
                                     rtx, rtx);
 static int calculate_stage_count (partial_schedule_ptr, int);
@@ -876,7 +876,7 @@ reset_sched_times (partial_schedule_ptr ps, int amount)
    row ii-1, and position them right before LAST.  This schedules
    the insns of the loop kernel.  */
 static void
-permute_partial_schedule (partial_schedule_ptr ps, rtx last)
+permute_partial_schedule (partial_schedule_ptr ps, rtx_insn *last)
 {
   int ii = ps->ii;
   int row;
diff --git a/gcc/optabs.c b/gcc/optabs.c
index bf8e438..5386aa1 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -177,9 +177,10 @@ optab_libfunc (optab optab, enum machine_mode mode)
    try again, ensuring that TARGET is not one of the operands.  */
 
 static int
-add_equal_note (rtx insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
+add_equal_note (rtx_insn *insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
 {
-  rtx last_insn, set;
+  rtx_insn *last_insn;
+  rtx set;
   rtx note;
 
   gcc_assert (insns && INSN_P (insns) && NEXT_INSN (insns));
@@ -1502,8 +1503,9 @@ expand_binop_directly (enum machine_mode mode, optab binoptab,
       /* If PAT is composed of more than one insn, try to add an appropriate
 	 REG_EQUAL note to it.  If we can't because TEMP conflicts with an
 	 operand, call expand_binop again, this time without a target.  */
-      if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
-	  && ! add_equal_note (pat, ops[0].value, optab_to_code (binoptab),
+      if (INSN_P (pat) && NEXT_INSN (as_a <rtx_insn *> (pat)) != NULL_RTX
+	  && ! add_equal_note (as_a <rtx_insn *> (pat), ops[0].value,
+			       optab_to_code (binoptab),
 			       ops[1].value, ops[2].value))
 	{
 	  delete_insns_since (last);
@@ -3025,8 +3027,9 @@ expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
       pat = maybe_gen_insn (icode, 2, ops);
       if (pat)
 	{
-	  if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
-	      && ! add_equal_note (pat, ops[0].value, optab_to_code (unoptab),
+	  if (INSN_P (pat) && NEXT_INSN (as_a <rtx_insn *> (pat)) != NULL_RTX
+	      && ! add_equal_note (as_a <rtx_insn *> (pat), ops[0].value,
+				   optab_to_code (unoptab),
 				   ops[1].value, NULL_RTX))
 	    {
 	      delete_insns_since (last);
@@ -3826,8 +3829,10 @@ maybe_emit_unop_insn (enum insn_code icode, rtx target, rtx op0,
   if (!pat)
     return false;
 
-  if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
-    add_equal_note (pat, ops[0].value, code, ops[1].value, NULL_RTX);
+  if (INSN_P (pat) && NEXT_INSN (as_a <rtx_insn *> (pat)) != NULL_RTX
+      && code != UNKNOWN)
+    add_equal_note (as_a <rtx_insn *> (pat), ops[0].value, code, ops[1].value,
+		    NULL_RTX);
 
   emit_insn (pat);
 
diff --git a/gcc/recog.c b/gcc/recog.c
index b67bd27..605ed4f 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -3350,7 +3350,8 @@ static rtx
 peep2_attempt (basic_block bb, rtx insn, int match_len, rtx attempt)
 {
   int i;
-  rtx last, eh_note, as_note, before_try, x;
+  rtx_insn *last, *before_try, *x;
+  rtx eh_note, as_note;
   rtx old_insn, new_insn;
   bool was_call = false;
 
diff --git a/gcc/reorg.c b/gcc/reorg.c
index bd9d27d..b22f9ee 100644
--- a/gcc/reorg.c
+++ b/gcc/reorg.c
@@ -213,7 +213,7 @@ static rtx_insn *delete_from_delay_slot (rtx_insn *);
 static void delete_scheduled_jump (rtx);
 static void note_delay_statistics (int, int);
 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
-static rtx optimize_skip (rtx);
+static rtx_insn_list *optimize_skip (rtx_insn *);
 #endif
 static int get_jump_flags (rtx, rtx);
 static int mostly_true_jump (rtx);
@@ -765,12 +765,12 @@ note_delay_statistics (int slots_filled, int index)
    This should be expanded to skip over N insns, where N is the number
    of delay slots required.  */
 
-static rtx
-optimize_skip (rtx insn)
+static rtx_insn_list *
+optimize_skip (rtx_insn *insn)
 {
-  rtx trial = next_nonnote_insn (insn);
-  rtx next_trial = next_active_insn (trial);
-  rtx delay_list = 0;
+  rtx_insn *trial = next_nonnote_insn (insn);
+  rtx_insn *next_trial = next_active_insn (trial);
+  rtx_insn_list *delay_list = 0;
   int flags;
 
   flags = get_jump_flags (insn, JUMP_LABEL (insn));
@@ -803,7 +803,7 @@ optimize_skip (rtx insn)
 	    return 0;
 	}
 
-      delay_list = add_to_delay_list (trial, NULL_RTX);
+      delay_list = add_to_delay_list (trial, NULL);
       next_trial = next_active_insn (trial);
       update_block (trial, trial);
       delete_related_insns (trial);
diff --git a/gcc/resource.c b/gcc/resource.c
index dfd10f6..eb5374e 100644
--- a/gcc/resource.c
+++ b/gcc/resource.c
@@ -79,10 +79,10 @@ static HARD_REG_SET pending_dead_regs;
 \f
 static void update_live_status (rtx, const_rtx, void *);
 static int find_basic_block (rtx, int);
-static rtx next_insn_no_annul (rtx);
-static rtx find_dead_or_set_registers (rtx, struct resources*,
-				       rtx*, int, struct resources,
-				       struct resources);
+static rtx_insn *next_insn_no_annul (rtx_insn *);
+static rtx_insn *find_dead_or_set_registers (rtx_insn *, struct resources*,
+					     rtx_insn **, int, struct resources,
+					     struct resources);
 \f
 /* Utility function called from mark_target_live_regs via note_stores.
    It deadens any CLOBBERed registers and livens any SET registers.  */
@@ -163,8 +163,8 @@ find_basic_block (rtx insn, int search_limit)
 /* Similar to next_insn, but ignores insns in the delay slots of
    an annulled branch.  */
 
-static rtx
-next_insn_no_annul (rtx insn)
+static rtx_insn *
+next_insn_no_annul (rtx_insn *insn)
 {
   if (insn)
     {
@@ -187,7 +187,7 @@ next_insn_no_annul (rtx insn)
       insn = NEXT_INSN (insn);
       if (insn && NONJUMP_INSN_P (insn)
 	  && GET_CODE (PATTERN (insn)) == SEQUENCE)
-	insn = XVECEXP (PATTERN (insn), 0, 0);
+	insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
     }
 
   return insn;
@@ -308,7 +308,7 @@ mark_referenced_resources (rtx x, struct resources *res,
 	     However, we may have moved some of the parameter loading insns
 	     into the delay slot of this CALL.  If so, the USE's for them
 	     don't count and should be skipped.  */
-	  rtx_insn *insn = PREV_INSN (x);
+	  rtx_insn *insn = PREV_INSN (as_a <rtx_insn *> (x));
 	  rtx_sequence *sequence = 0;
 	  int seq_size = 0;
 	  int i;
@@ -420,19 +420,19 @@ mark_referenced_resources (rtx x, struct resources *res,
    Stop after passing a few conditional jumps, and/or a small
    number of unconditional branches.  */
 
-static rtx
-find_dead_or_set_registers (rtx target, struct resources *res,
-			    rtx *jump_target, int jump_count,
+static rtx_insn *
+find_dead_or_set_registers (rtx_insn *target, struct resources *res,
+			    rtx_insn **jump_target, int jump_count,
 			    struct resources set, struct resources needed)
 {
   HARD_REG_SET scratch;
-  rtx insn, next;
-  rtx jump_insn = 0;
+  rtx_insn *insn, *next;
+  rtx_insn *jump_insn = 0;
   int i;
 
   for (insn = target; insn; insn = next)
     {
-      rtx this_jump_insn = insn;
+      rtx_insn *this_jump_insn = insn;
 
       next = NEXT_INSN (insn);
 
@@ -480,7 +480,7 @@ find_dead_or_set_registers (rtx target, struct resources *res,
 		 of a call, so search for a JUMP_INSN in any position.  */
 	      for (i = 0; i < seq->len (); i++)
 		{
-		  this_jump_insn = seq->element (i);
+		  this_jump_insn = seq->insn (i);
 		  if (JUMP_P (this_jump_insn))
 		    break;
 		}
@@ -497,14 +497,14 @@ find_dead_or_set_registers (rtx target, struct resources *res,
 	      if (any_uncondjump_p (this_jump_insn)
 		  || ANY_RETURN_P (PATTERN (this_jump_insn)))
 		{
-		  next = JUMP_LABEL (this_jump_insn);
+		  next = JUMP_LABEL_AS_INSN (this_jump_insn);
 		  if (ANY_RETURN_P (next))
-		    next = NULL_RTX;
+		    next = NULL;
 		  if (jump_insn == 0)
 		    {
 		      jump_insn = insn;
 		      if (jump_target)
-			*jump_target = JUMP_LABEL (this_jump_insn);
+			*jump_target = JUMP_LABEL_AS_INSN (this_jump_insn);
 		    }
 		}
 	      else if (any_condjump_p (this_jump_insn))
@@ -569,7 +569,7 @@ find_dead_or_set_registers (rtx target, struct resources *res,
 		  AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
 
 		  if (!ANY_RETURN_P (JUMP_LABEL (this_jump_insn)))
-		    find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
+		    find_dead_or_set_registers (JUMP_LABEL_AS_INSN (this_jump_insn),
 						&target_res, 0, jump_count,
 						target_set, needed);
 		  find_dead_or_set_registers (next,
@@ -880,14 +880,14 @@ return_insn_p (const_rtx insn)
    init_resource_info () was invoked before we are called.  */
 
 void
-mark_target_live_regs (rtx insns, rtx target, struct resources *res)
+mark_target_live_regs (rtx_insn *insns, rtx_insn *target, struct resources *res)
 {
   int b = -1;
   unsigned int i;
   struct target_info *tinfo = NULL;
-  rtx insn;
+  rtx_insn *insn;
   rtx jump_insn = 0;
-  rtx jump_target;
+  rtx_insn *jump_target;
   HARD_REG_SET scratch;
   struct resources set, needed;
 
@@ -965,7 +965,7 @@ mark_target_live_regs (rtx insns, rtx target, struct resources *res)
   if (b != -1)
     {
       regset regs_live = DF_LR_IN (BASIC_BLOCK_FOR_FN (cfun, b));
-      rtx start_insn, stop_insn;
+      rtx_insn *start_insn, *stop_insn;
 
       /* Compute hard regs live at start of block.  */
       REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
@@ -978,7 +978,7 @@ mark_target_live_regs (rtx insns, rtx target, struct resources *res)
 
       if (NONJUMP_INSN_P (start_insn)
 	  && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
-	start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
+	start_insn = as_a <rtx_sequence *> (PATTERN (start_insn))->insn (0);
 
       if (NONJUMP_INSN_P (stop_insn)
 	  && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
@@ -1122,7 +1122,7 @@ mark_target_live_regs (rtx insns, rtx target, struct resources *res)
   if (jump_insn)
     {
       struct resources new_resources;
-      rtx stop_insn = next_active_insn (jump_insn);
+      rtx_insn *stop_insn = next_active_insn (jump_insn);
 
       if (!ANY_RETURN_P (jump_target))
 	jump_target = next_active_insn (jump_target);
diff --git a/gcc/resource.h b/gcc/resource.h
index a1a1f34..633d1ab 100644
--- a/gcc/resource.h
+++ b/gcc/resource.h
@@ -44,7 +44,7 @@ enum mark_resource_type
   MARK_SRC_DEST_CALL = 1
 };
 
-extern void mark_target_live_regs (rtx, rtx, struct resources *);
+extern void mark_target_live_regs (rtx_insn *, rtx_insn *, struct resources *);
 extern void mark_set_resources (rtx, struct resources *, int,
 				enum mark_resource_type);
 extern void mark_referenced_resources (rtx, struct resources *, bool);
diff --git a/gcc/rtl.h b/gcc/rtl.h
index d5811c2..613d06c 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2782,8 +2782,8 @@ extern bool can_throw_external (const_rtx);
 extern bool insn_could_throw_p (const_rtx);
 extern bool insn_nothrow_p (const_rtx);
 extern bool can_nonlocal_goto (const_rtx);
-extern void copy_reg_eh_region_note_forward (rtx, rtx, rtx);
-extern void copy_reg_eh_region_note_backward (rtx, rtx, rtx);
+extern void copy_reg_eh_region_note_forward (rtx, rtx_insn *, rtx);
+extern void copy_reg_eh_region_note_backward (rtx, rtx_insn *, rtx);
 extern int inequality_comparisons_p (const_rtx);
 extern rtx replace_rtx (rtx, rtx, rtx);
 extern int replace_label (rtx *, void *);
@@ -3268,7 +3268,7 @@ extern void pop_topmost_sequence (void);
 extern void set_new_first_and_last_insn (rtx_insn *, rtx_insn *);
 extern unsigned int unshare_all_rtl (void);
 extern void unshare_all_rtl_again (rtx_insn *);
-extern void unshare_all_rtl_in_chain (rtx);
+extern void unshare_all_rtl_in_chain (rtx_insn *);
 extern void verify_rtl_sharing (void);
 extern void add_insn (rtx_insn *);
 extern void add_insn_before (rtx, rtx, basic_block);
@@ -3327,7 +3327,8 @@ extern void print_inline_rtx (FILE *, const_rtx, int);
    by the scheduler anymore but for all "slim" RTL dumping.  */
 extern void dump_value_slim (FILE *, const_rtx, int);
 extern void dump_insn_slim (FILE *, const_rtx);
-extern void dump_rtl_slim (FILE *, const_rtx, const_rtx, int, int);
+extern void dump_rtl_slim (FILE *, const rtx_insn *, const rtx_insn *,
+			   int, int);
 extern void print_value (pretty_printer *, const_rtx, int);
 extern void print_pattern (pretty_printer *, const_rtx, int);
 extern void print_insn (pretty_printer *, const_rtx, int);
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index 41b9ca6..3d94427 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -3840,10 +3840,10 @@ delete_dep_nodes_in_back_deps (rtx insn, bool resolved_p)
 /* Delete (RESOLVED_P) dependencies between HEAD and TAIL together with
    deps_lists.  */
 void
-sched_free_deps (rtx head, rtx tail, bool resolved_p)
+sched_free_deps (rtx_insn *head, rtx_insn *tail, bool resolved_p)
 {
-  rtx insn;
-  rtx next_tail = NEXT_INSN (tail);
+  rtx_insn *insn;
+  rtx_insn *next_tail = NEXT_INSN (tail);
 
   /* We make two passes since some insns may be scheduled before their
      dependencies are resolved.  */
diff --git a/gcc/sched-ebb.c b/gcc/sched-ebb.c
index f502668..c3be721 100644
--- a/gcc/sched-ebb.c
+++ b/gcc/sched-ebb.c
@@ -116,8 +116,8 @@ static void
 init_ready_list (void)
 {
   int n = 0;
-  rtx prev_head = current_sched_info->prev_head;
-  rtx next_tail = current_sched_info->next_tail;
+  rtx_insn *prev_head = current_sched_info->prev_head;
+  rtx_insn *next_tail = current_sched_info->next_tail;
   rtx_insn *insn;
 
   sched_rgn_n_insns = 0;
@@ -189,7 +189,7 @@ begin_move_insn (rtx_insn *insn, rtx_insn *last)
       else
 	{
 	  /* Create an empty unreachable block after the INSN.  */
-	  rtx next = NEXT_INSN (insn);
+	  rtx_insn *next = NEXT_INSN (insn);
 	  if (next && BARRIER_P (next))
 	    next = NEXT_INSN (next);
 	  bb = create_basic_block (next, NULL_RTX, last_bb);
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index a19d776..bbf332a 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -1328,7 +1328,7 @@ extern void deps_start_bb (struct deps_desc *, rtx);
 extern enum reg_note ds_to_dt (ds_t);
 
 extern bool deps_pools_are_empty_p (void);
-extern void sched_free_deps (rtx, rtx, bool);
+extern void sched_free_deps (rtx_insn *, rtx_insn *, bool);
 extern void extend_dependency_caches (int, bool);
 
 extern void debug_ds (ds_t);
@@ -1342,14 +1342,14 @@ extern void free_global_sched_pressure_data (void);
 extern int haifa_classify_insn (const_rtx);
 extern void get_ebb_head_tail (basic_block, basic_block,
 			       rtx_insn **, rtx_insn **);
-extern int no_real_insns_p (const_rtx, const_rtx);
+extern int no_real_insns_p (const rtx_insn *, const rtx_insn *);
 
 extern int insn_cost (rtx_insn *);
 extern int dep_cost_1 (dep_t, dw_t);
 extern int dep_cost (dep_t);
 extern int set_priorities (rtx_insn *, rtx_insn *);
 
-extern void sched_setup_bb_reg_pressure_info (basic_block, rtx);
+extern void sched_setup_bb_reg_pressure_info (basic_block, rtx_insn *);
 extern bool schedule_block (basic_block *, state_t);
 
 extern int cycle_issued_insns;
diff --git a/gcc/sched-rgn.c b/gcc/sched-rgn.c
index 4f4c8d5..8a63d53 100644
--- a/gcc/sched-rgn.c
+++ b/gcc/sched-rgn.c
@@ -2107,8 +2107,8 @@ schedule_more_p (void)
 static void
 init_ready_list (void)
 {
-  rtx prev_head = current_sched_info->prev_head;
-  rtx next_tail = current_sched_info->next_tail;
+  rtx_insn *prev_head = current_sched_info->prev_head;
+  rtx_insn *next_tail = current_sched_info->next_tail;
   int bb_src;
   rtx_insn *insn;
 
diff --git a/gcc/sched-vis.c b/gcc/sched-vis.c
index ead6b4e..dcd4075 100644
--- a/gcc/sched-vis.c
+++ b/gcc/sched-vis.c
@@ -807,14 +807,14 @@ dump_insn_slim (FILE *f, const_rtx x)
    If COUNT < 0 it will stop only at LAST or NULL rtx.  */
 
 void
-dump_rtl_slim (FILE *f, const_rtx first, const_rtx last,
+dump_rtl_slim (FILE *f, const rtx_insn *first, const rtx_insn *last,
 	       int count, int flags ATTRIBUTE_UNUSED)
 {
-  const_rtx insn, tail;
+  const rtx_insn *insn, *tail;
   pretty_printer rtl_slim_pp;
   rtl_slim_pp.buffer->stream = f;
 
-  tail = last ? NEXT_INSN (last) : NULL_RTX;
+  tail = last ? NEXT_INSN (last) : NULL;
   for (insn = first;
        (insn != NULL) && (insn != tail) && (count != 0);
        insn = NEXT_INSN (insn))
@@ -833,7 +833,7 @@ dump_rtl_slim (FILE *f, const_rtx first, const_rtx last,
 void
 rtl_dump_bb_for_graph (pretty_printer *pp, basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
   bool first = true;
 
   /* TODO: inter-bb stuff.  */
@@ -873,9 +873,11 @@ debug_insn_slim (const_rtx x)
 }
 
 /* Same as above, but using dump_rtl_slim.  */
-extern void debug_rtl_slim (FILE *, const_rtx, const_rtx, int, int);
+extern void debug_rtl_slim (FILE *, const rtx_insn *, const rtx_insn *,
+			    int, int);
 DEBUG_FUNCTION void
-debug_rtl_slim (const_rtx first, const_rtx last, int count, int flags)
+debug_rtl_slim (const rtx_insn *first, const rtx_insn *last, int count,
+		int flags)
 {
   dump_rtl_slim (stderr, first, last, count, flags);
 }
diff --git a/gcc/shrink-wrap.c b/gcc/shrink-wrap.c
index 8f77ab3..0f16af3 100644
--- a/gcc/shrink-wrap.c
+++ b/gcc/shrink-wrap.c
@@ -428,13 +428,13 @@ dup_block_and_redirect (basic_block bb, basic_block copy_bb, rtx_insn *before,
 
 void
 try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
-		     bitmap_head *bb_flags, rtx prologue_seq)
+		     bitmap_head *bb_flags, rtx_insn *prologue_seq)
 {
   edge e;
   edge_iterator ei;
   bool nonempty_prologue = false;
   unsigned max_grow_size;
-  rtx seq;
+  rtx_insn *seq;
 
   for (seq = prologue_seq; seq; seq = NEXT_INSN (seq))
     if (!NOTE_P (seq) || NOTE_KIND (seq) != NOTE_INSN_PROLOGUE_END)
@@ -449,7 +449,7 @@ try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
     {
       HARD_REG_SET prologue_clobbered, prologue_used, live_on_edge;
       struct hard_reg_set_container set_up_by_prologue;
-      rtx p_insn;
+      rtx_insn *p_insn;
       vec<basic_block> vec;
       basic_block bb;
       bitmap_head bb_antic_flags;
@@ -831,7 +831,7 @@ get_unconverted_simple_return (edge exit_fallthru_edge, bitmap_head bb_flags,
 
 void
 convert_to_simple_return (edge entry_edge, edge orig_entry_edge,
-			  bitmap_head bb_flags, rtx returnjump,
+			  bitmap_head bb_flags, rtx_insn *returnjump,
 			  vec<edge> unconverted_simple_returns)
 {
   edge e;
diff --git a/gcc/shrink-wrap.h b/gcc/shrink-wrap.h
index 66bd26d..647c076 100644
--- a/gcc/shrink-wrap.h
+++ b/gcc/shrink-wrap.h
@@ -40,11 +40,12 @@ extern void dup_block_and_redirect (basic_block bb, basic_block copy_bb,
 				    rtx_insn *before,
 				    bitmap_head *need_prologue);
 extern void try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
-				 bitmap_head *bb_flags, rtx prologue_seq);
+				 bitmap_head *bb_flags, rtx_insn *prologue_seq);
 extern edge get_unconverted_simple_return (edge, bitmap_head,
 					   vec<edge> *, rtx_insn **);
 extern void convert_to_simple_return (edge entry_edge, edge orig_entry_edge,
-				      bitmap_head bb_flags, rtx returnjump,
+				      bitmap_head bb_flags,
+				      rtx_insn *returnjump,
 				      vec<edge> unconverted_simple_returns);
 #endif
 
diff --git a/gcc/valtrack.c b/gcc/valtrack.c
index efc252e..f2ddc05 100644
--- a/gcc/valtrack.c
+++ b/gcc/valtrack.c
@@ -177,7 +177,7 @@ propagate_for_debug_subst (rtx from, const_rtx old_rtx, void *data)
    of THIS_BASIC_BLOCK.  */
 
 void
-propagate_for_debug (rtx_insn *insn, rtx last, rtx dest, rtx src,
+propagate_for_debug (rtx_insn *insn, rtx_insn *last, rtx dest, rtx src,
 		     basic_block this_basic_block)
 {
   rtx_insn *next, *end = NEXT_INSN (BB_END (this_basic_block));
diff --git a/gcc/valtrack.h b/gcc/valtrack.h
index 495aeb8..ac5f988 100644
--- a/gcc/valtrack.h
+++ b/gcc/valtrack.h
@@ -149,7 +149,7 @@ extern int dead_debug_insert_temp (struct dead_debug_local *,
 				   unsigned int uregno, rtx insn,
 				   enum debug_temp_where);
 
-extern void propagate_for_debug (rtx_insn *, rtx, rtx, rtx, basic_block);
+extern void propagate_for_debug (rtx_insn *, rtx_insn *, rtx, rtx, basic_block);
 
 
 #endif /* GCC_VALTRACK_H */
-- 
1.8.5.3

Re: [PATCH 225/236] Work towards NEXT_INSN/PREV_INSN requiring insns as their params

[Richard Henderson]

On 08/06/2014 10:23 AM, David Malcolm wrote:
> diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
> index 59d633d..5e42a97 100644
> --- a/gcc/cfgrtl.c
> +++ b/gcc/cfgrtl.c
> @@ -1604,6 +1604,7 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
>  
>    if (EDGE_COUNT (e->src->succs) >= 2 || abnormal_edge_flags || asm_goto_edge)
>      {
> +      rtx_insn *note;
>        gcov_type count = e->count;
>        int probability = e->probability;
>        /* Create the new structures.  */

A new variable with no uses?


r~

Re: [PATCH 225/236] Work towards NEXT_INSN/PREV_INSN requiring insns as their params

[David Malcolm]

On Tue, 2014-08-19 at 13:57 -0700, Richard Henderson wrote:
> On 08/06/2014 10:23 AM, David Malcolm wrote:
> > diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
> > index 59d633d..5e42a97 100644
> > --- a/gcc/cfgrtl.c
> > +++ b/gcc/cfgrtl.c
> > @@ -1604,6 +1604,7 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
> >  
> >    if (EDGE_COUNT (e->src->succs) >= 2 || abnormal_edge_flags || asm_goto_edge)
> >      {
> > +      rtx_insn *note;
> >        gcov_type count = e->count;
> >        int probability = e->probability;
> >        /* Create the new structures.  */
> 
> A new variable with no uses?

This one is quite ugly: the pre-existing code has two locals named
"note", both of type rtx, with one shadowing the other.  This patch
introduces a third, within the scope where the name "note" is used for
insns.  In the other scopes the two other "note" variables are used for
find_reg_note.  In each case, the name "note" is written to before use.

So in my defense, the existing code already had shadowing of locals...
but I guess that's not much of a defense, and it would be better to
introduce a different name, and rename the uses in the appropriate
scope.

Thanks
Dave

Bootstrap failure/ ICE in rtl.h (was: Re: [PATCH 225/236] Work towardgmane.comp.gcc.patchess NEXT_INSN/PREV_INSN requiring insns as their params)

[Tobias Burnus]

I am not sure about which patch causes the problem, but with Rev. 214197 
boostrapping fails here (x86-64-gnu-linux) while an incremental build 
with a few other of your changes it worked.

Currently, it fails in Stage 1 with the Stage 1 compiler with the 
following message.

Tobias


../../../../libgcc/soft-fp/subtf3.c: In function '__subtf3':
../../../../libgcc/soft-fp/subtf3.c:51:1: internal compiler error: 
Segmentation fault
  }
  ^
0xc4856a crash_signal
         ../../gcc/toplev.c:337
0x763f08 bool is_a_helper<rtx_insn*>::test<rtx_def>(rtx_def*)
         ../../gcc/rtl.h:683
0x7646a9 bool is_a<rtx_insn*, rtx_def>(rtx_def*)
         ../../gcc/is-a.h:182
0x7e9228 rtx_insn* as_a<rtx_insn*, rtx_def>(rtx_def*)
         ../../gcc/is-a.h:192
0x7e6b5c duplicate_insn_chain(rtx_def*, rtx_def*)
         ../../gcc/cfgrtl.c:4169
0x7e6c65 cfg_layout_duplicate_bb
         ../../gcc/cfgrtl.c:4191
0x7ce90b duplicate_block(basic_block_def*, edge_def*, basic_block_def*)
         ../../gcc/cfghooks.c:1042
0x130356d copy_bb
         ../../gcc/bb-reorder.c:819
0x1304b5c connect_traces
         ../../gcc/bb-reorder.c:1294
0x1306b27 reorder_basic_blocks
         ../../gcc/bb-reorder.c:2258
0x1306d54 execute
         ../../gcc/bb-reorder.c:2352
Please submit a full bug report,

Re: Bootstrap failure/ ICE in rtl.h (was: Re: [PATCH 225/236] Work towardgmane.comp.gcc.patchess NEXT_INSN/PREV_INSN requiring insns as their params)

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 1849 bytes --]

On Wed, 2014-08-20 at 00:15 +0200, Tobias Burnus wrote:
> I am not sure about which patch causes the problem, but with Rev. 214197 
> boostrapping fails here (x86-64-gnu-linux) while an incremental build 
> with a few other of your changes it worked.
> 
> Currently, it fails in Stage 1 with the Stage 1 compiler with the 
> following message.
> 
> Tobias
> 
> 
> ../../../../libgcc/soft-fp/subtf3.c: In function '__subtf3':
> ../../../../libgcc/soft-fp/subtf3.c:51:1: internal compiler error: 
> Segmentation fault
>   }
>   ^
> 0xc4856a crash_signal
>          ../../gcc/toplev.c:337
> 0x763f08 bool is_a_helper<rtx_insn*>::test<rtx_def>(rtx_def*)
>          ../../gcc/rtl.h:683
> 0x7646a9 bool is_a<rtx_insn*, rtx_def>(rtx_def*)
>          ../../gcc/is-a.h:182
> 0x7e9228 rtx_insn* as_a<rtx_insn*, rtx_def>(rtx_def*)
>          ../../gcc/is-a.h:192
> 0x7e6b5c duplicate_insn_chain(rtx_def*, rtx_def*)
>          ../../gcc/cfgrtl.c:4169
> 0x7e6c65 cfg_layout_duplicate_bb
>          ../../gcc/cfgrtl.c:4191
> 0x7ce90b duplicate_block(basic_block_def*, edge_def*, basic_block_def*)
>          ../../gcc/cfghooks.c:1042
> 0x130356d copy_bb
>          ../../gcc/bb-reorder.c:819
> 0x1304b5c connect_traces
>          ../../gcc/bb-reorder.c:1294
> 0x1306b27 reorder_basic_blocks
>          ../../gcc/bb-reorder.c:2258
> 0x1306d54 execute
>          ../../gcc/bb-reorder.c:2352
> Please submit a full bug report,

Sorry about that.

I'm not sure why this didn't make the bootstrap of patches 30-39 fail,
but I was able to reproduce the crash you saw.

The issue was with the as_a<> that I introduced at the end of
duplicate_insn_chain in r214197 (patch #35), which requires a non-NULL
insn.  Converting it to a safe_as_a<> fixes the bootstrap.

I went ahead and committed the fix to trunk, as r214207 (patch attached
for reference).

Sorry again.
Dave

[-- Attachment #2: r214207.patch --]
[-- Type: text/x-patch, Size: 828 bytes --]

Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214206)
+++ gcc/ChangeLog	(revision 214207)
@@ -1,3 +1,9 @@
+2014-08-20  David Malcolm  <dmalcolm@redhat.com>
+
+	* cfgrtl.c (duplicate_insn_chain): Convert the checked cast on
+	"insn" from an as_a to a safe_as_a, for the case when "insn" is
+	NULL.
+
 2014-08-20  Manuel López-Ibáñez  <manu@gcc.gnu.org>
 
 	PR preprocessor/51303
Index: gcc/cfgrtl.c
===================================================================
--- gcc/cfgrtl.c	(revision 214206)
+++ gcc/cfgrtl.c	(revision 214207)
@@ -4166,7 +4166,7 @@
     }
   insn = NEXT_INSN (last);
   delete_insn (last);
-  return as_a <rtx_insn *> (insn);
+  return safe_as_a <rtx_insn *> (insn);
 }
 
 /* Create a duplicate of the basic block BB.  */

Re: [PATCH 225/236] Work towards NEXT_INSN/PREV_INSN requiring insns as their params

[Richard Henderson]

On 08/19/2014 02:35 PM, David Malcolm wrote:
> This one is quite ugly: the pre-existing code has two locals named
> "note", both of type rtx, with one shadowing the other.  This patch
> introduces a third, within the scope where the name "note" is used for
> insns.  In the other scopes the two other "note" variables are used for
> find_reg_note.  In each case, the name "note" is written to before use.
> 
> So in my defense, the existing code already had shadowing of locals...
> but I guess that's not much of a defense, and it would be better to
> introduce a different name, and rename the uses in the appropriate
> scope.

Or, if possible, narrow the scope of the other names such that there is no
shadowing.


r~

Re: [PATCH 225/236] Work towards NEXT_INSN/PREV_INSN requiring insns as their params

[Jeff Law]

On 08/19/14 15:35, David Malcolm wrote:
> On Tue, 2014-08-19 at 13:57 -0700, Richard Henderson wrote:
>> On 08/06/2014 10:23 AM, David Malcolm wrote:
>>> diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
>>> index 59d633d..5e42a97 100644
>>> --- a/gcc/cfgrtl.c
>>> +++ b/gcc/cfgrtl.c
>>> @@ -1604,6 +1604,7 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
>>>
>>>     if (EDGE_COUNT (e->src->succs) >= 2 || abnormal_edge_flags || asm_goto_edge)
>>>       {
>>> +      rtx_insn *note;
>>>         gcov_type count = e->count;
>>>         int probability = e->probability;
>>>         /* Create the new structures.  */
>>
>> A new variable with no uses?
>
> This one is quite ugly: the pre-existing code has two locals named
> "note", both of type rtx, with one shadowing the other.  This patch
> introduces a third, within the scope where the name "note" is used for
> insns.  In the other scopes the two other "note" variables are used for
> find_reg_note.  In each case, the name "note" is written to before use.
>
> So in my defense, the existing code already had shadowing of locals...
> but I guess that's not much of a defense, and it would be better to
> introduce a different name, and rename the uses in the appropriate
> scope.
If it's reasonable to do this now, then please do so.  Else make it a 
follow-up item.  I guess we should have had a list of follow-up items :-)

jeff

Re: [PATCH 225/236] Work towards NEXT_INSN/PREV_INSN requiring insns as their params

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 2130 bytes --]

On Mon, 2014-08-25 at 08:25 -0600, Jeff Law wrote:
> On 08/19/14 15:35, David Malcolm wrote:
> > On Tue, 2014-08-19 at 13:57 -0700, Richard Henderson wrote:
> >> On 08/06/2014 10:23 AM, David Malcolm wrote:
> >>> diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
> >>> index 59d633d..5e42a97 100644
> >>> --- a/gcc/cfgrtl.c
> >>> +++ b/gcc/cfgrtl.c
> >>> @@ -1604,6 +1604,7 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
> >>>
> >>>     if (EDGE_COUNT (e->src->succs) >= 2 || abnormal_edge_flags || asm_goto_edge)
> >>>       {
> >>> +      rtx_insn *note;
> >>>         gcov_type count = e->count;
> >>>         int probability = e->probability;
> >>>         /* Create the new structures.  */
> >>
> >> A new variable with no uses?
> >
> > This one is quite ugly: the pre-existing code has two locals named
> > "note", both of type rtx, with one shadowing the other.  This patch
> > introduces a third, within the scope where the name "note" is used for
> > insns.  In the other scopes the two other "note" variables are used for
> > find_reg_note.  In each case, the name "note" is written to before use.
> >
> > So in my defense, the existing code already had shadowing of locals...
> > but I guess that's not much of a defense, and it would be better to
> > introduce a different name, and rename the uses in the appropriate
> > scope.
> If it's reasonable to do this now, then please do so.  Else make it a 
> follow-up item.  I guess we should have had a list of follow-up items :-)
> 
> jeff

Attached is a revised version of #225, with the following changes:

* fix for the above: avoid introducing a new shadow name "note" within
force_nonfallthru_and_redirect by introducing a new local rtx_insn *
"new_head" and renaming "note" to it in the appropriate places.

* changed an as_a<> to a safe_as_a<> within
function.c:thread_prologue_and_epilogue_insns to fix a segfault seen
during an earlier bootstrap

Successfully bootstrapped on x86_64 (Fedora 20), on top of the rest of
the patches leading up to it (including the revised ones for #220-#221
that rth recently approved).

OK for trunk?
Dave

[-- Attachment #2: revised-225.patch --]
[-- Type: text/x-patch, Size: 73404 bytes --]

commit 57a0975899db68a31c3a8f4a554ace60e3e8fabf
Author: David Malcolm <dmalcolm@redhat.com>
Date:   Wed Jul 30 20:15:49 2014 -0400

    Work towards NEXT_INSN/PREV_INSN requiring insns as their params
    
    gcc/
    	* cfgexpand.c (pass_expand::execute): Strengthen local "after"
    	from rtx to rtx_insn *.
    	* cfgrtl.c (force_nonfallthru_and_redirect): Replace use of local
    	rtx "note" with new local rtx_insn * "new_head" when calculating
    	head insn of new basic block.
    	* combine.c (combine_split_insns): Strengthen return type and local
    	"ret" from rtx to rtx_insn *.
    	(likely_spilled_retval_p): Likewise for locals "use" and "p".
    	(try_combine): Eliminate local "m_split", splitting into new
    	locals "m_split_insn" and "m_split_pat".
    	(find_split_point): Strengthen local "seq" from rtx into
    	rtx_insn *.
    	* config/spu/spu.c (spu_machine_dependent_reorg): Likewise for
    	locals "label", "branch".
    	* dse.c (note_add_store_info): Likewise for fields "first",
    	"current".
    	(note_add_store): Likewise for local "insn".
    	(emit_inc_dec_insn_before): Likewise for locals "insn",
    	"new_insn", "cur".
    	(find_shift_sequence): Likewise for locals "shift_seq", "insn".
    	(replace_read): Likewise for locals "insns", "this_insn".
    	* dwarf2cfi.c (dw_trace_info): Likewise for field "eh_head".
    	(notice_eh_throw): Likewise for param "insn".
    	(before_next_cfi_note): Likewise for return type, param, and local
    	"prev".
    	(connect_traces): Likewise for local "note".
    	* emit-rtl.c (reset_all_used_flags): Likewise for local "p".
    	(verify_rtl_sharing): Likewise.
    	(unshare_all_rtl_in_chain): Likewise for param "insn".
    	(get_first_nonnote_insn): Likewise for local "insn".
    	(get_last_nonnote_insn): Likewise.  Introduce local rtx_sequence *
    	"seq" and use its methods to clarify things.
    	(next_insn): Strengthen return type from rtx to rtx_insn *.
    	Rename param "insn" to "uncast_insn" and reintroduce "insn" as a
    	local rtx_insn * using a checked cast, dropping a checked cast
    	made redundant by this change.  Use a cast to and method of
    	rtx_sequence to clarify the code.
    	(previous_insn): Rename param "insn" to "uncast_insn" and
    	reintroduce "insn" as a local rtx_insn * using a checked cast,
    	dropping a checked cast made redundant by this change.  Use a cast
    	to and method of rtx_sequence to clarify the code.
    	(next_nonnote_insn): Rename param "insn" to "uncast_insn" and
    	reintroduce "insn" as a local rtx_insn * using a checked cast,
    	dropping a checked cast made redundant by this change.
    	(next_nonnote_insn_bb): Likewise.
    	(prev_nonnote_insn): Likewise.
    	(prev_nonnote_insn_bb): Likewise.
    	(next_nondebug_insn): Likewise.
    	(prev_nondebug_insn): Likewise.
    	(next_nonnote_nondebug_insn): Likewise.
    	(prev_nonnote_nondebug_insn): Likewise.
    	(next_real_insn): Likewise.
    	(prev_real_insn): Likewise.
    	(next_active_insn): Likewise.
    	(prev_active_insn): Likewise.
    	(next_cc0_user): Likewise.  Use rtx_sequence and a method for
    	clarity.
    	(prev_cc0_setter): Likewise.
    	(try_split): Rename param "trial" to "uncast_trial" and
    	reintroduce "insn" as a local rtx_insn * using a checked cast,
    	dropping checked casts made redundant by this change.
    	Strengthen locals "seq", "tem", "insn_last", "insn", "next" from
    	rtx to rtx_insn *.
    	(remove_insn): Rename param "insn" to "uncast_insn" and
    	reintroduce "insn" as a local rtx_insn * using a checked cast.
    	(emit_pattern_after_setloc): Likewise for param "after", as
    	"uncast_after".
    	(emit_pattern_after): Likewise.  Strengthen local "prev" from
    	rtx to rtx_insn *.
    	(emit_pattern_before_setloc): Rename param "before" to
    	"uncast_before" and reintroduce "before" as a local rtx_insn *
    	using a checked cast.  Strengthen locals "first", "last" from
    	rtx to rtx_insn *.
    	(emit_pattern_before): Likewise rename/cast param "before" to
    	"uncast_before". Strengthen local "next" from rtx to rtx_insn *.
    	* except.c (copy_reg_eh_region_note_forward): Strengthen param
    	"first" and local "insn" from rtx to rtx_insn *.
    	(copy_reg_eh_region_note_backward): Likewise for param "last"
    	and local "insn".
    	* expr.c (fixup_args_size_notes): Rename param "last" to
    	"uncast_last" and reintroduce "last" as a local rtx_insn *
    	using a checked cast.  Strengthen local "insn" from rtx to
    	rtx_insn *.
    	* function.c (set_insn_locations): Strengthen param "insn" from
    	rtx to rtx_insn *.
    	(record_insns): Likewise for param "insns" and local "tmp".
    	(active_insn_between): Rename param "tail" to
    	"uncast_tail" and reintroduce "tail" as a local rtx_insn *
    	using a checked cast.
    	(thread_prologue_and_epilogue_insns): Split out top-level local
    	rtx "seq" into three different rtx_insn * locals.  Strengthen
    	local "prologue_seq" from rtx to rtx_insn *.
    	* gcse.c (insert_insn_end_basic_block): Strenghen local "insn"
    	from rtx to rtx_insn *.
    	* haifa-sched.c (initiate_bb_reg_pressure_info): Likewise.
    	(priority): Likewise for locals "prev_first", "twin".
    	(setup_insn_max_reg_pressure): Likewise for param "after".
    	(sched_setup_bb_reg_pressure_info): Likewise.
    	(no_real_insns_p): Strengthen params from const_rtx to
    	const rtx_insn *.
    	(schedule_block): Strengthen local "next_tail" from rtx to
    	rtx_insn *.
    	* ifcvt.c (find_active_insn_before): Strengthen return type and
    	param "insn" from rtx to rtx_insn *.
    	(find_active_insn_after): Likewise.
    	(cond_exec_process_insns): Likewise for param "start" and local "insn".
    	(cond_exec_process_if_block): Likewise for locals "then_start",
    	"then_end", "else_start", "else_end", "insn", "start", "end", "from".
    	(noce_process_if_block): Likewise for local "jump".
    	(merge_if_block): Likewise for two locals named "end".
    	(cond_exec_find_if_block): Likewise for local "last_insn".
    	* jump.c (delete_related_insns): Rename param "insn" to
    	"uncast_insn" and reintroduce "insn" as a local rtx_insn * using a
    	checked cast.  Strengthen local "p" from rtx to rtx_insn *.
    	* lra-constraints.c (inherit_reload_reg): Replace NULL_RTX with
    	NULL.
    	(split_reg): Likewise.
    	* lra.c (lra_process_new_insns): Likewise.
    	* modulo-sched.c (permute_partial_schedule): Strengthen param
    	"last" from rtx to rtx_insn *.
    	* optabs.c (add_equal_note): Likewise for param "insns" and local
    	"last_insn".
    	(expand_binop_directly): Add checked casts to rtx_insn * within
    	NEXT_INSN (pat) uses.
    	(expand_unop_direct): Likewise.
    	(maybe_emit_unop_insn): Likewise.
    	* recog.c (peep2_attempt): Strengthen locals "last",
    	"before_try", "x" from rtx to rtx_insn *.
    	* reorg.c (optimize_skip): Strengthen return type and local
    	"delay_list" from rtx to rtx_insn_list *.  Strengthen param "insn"
    	and locals "trial", "next_trial" from rtx to rtx_insn *.
    	* resource.c (next_insn_no_annul): Strengthen return type and
    	param "insn" from rtx to rtx_insn *.  Use a cast to and method of
    	rtx_sequence to clarify the code.
    	(mark_referenced_resources): Add a checked cast to rtx_insn *
    	within PREV_INSN (x).
    	(find_dead_or_set_registers): Strengthen return type, param
    	"target", locals "insn", "next", "jump_insn", "this_jump_insn"
    	from rtx to rtx_insn *.  Strengthen param "jump_target" from rtx *
    	to rtx_insn **.
    	(mark_target_live_regs): Strengthen params "insns" and "target",
    	locals "insn", "jump_target", "start_insn", "stop_insn" from rtx
    	to rtx_insn *.  Use cast to and method of rtx_sequence to clarify
    	the code.
    	* resource.h (mark_target_live_regs): Strengthen params 1 and 2
    	from rtx to rtx_insn *.
    	* rtl.h (copy_reg_eh_region_note_forward): Strengthen second param
    	from rtx to rtx_insn *.
    	(copy_reg_eh_region_note_backward): Likewise.
    	(unshare_all_rtl_in_chain): Likewise for sole param.
    	(dump_rtl_slim): Strengthen second and third params from const_rtx
    	to const rtx_insn *.
    	* sched-deps.c (sched_free_deps): Strengthen params "head" and
    	"tail" and locals "insn", "next_tail" from rtx to rtx_insn *.
    	* sched-ebb.c (init_ready_list): Strengthen locals "prev_head",
    	"next_tail" from rtx to rtx_insn *.
    	(begin_move_insn): Likewise for local "next".
    	* sched-int.h (sched_free_deps): Likewise for first and second
    	params.
    	(no_real_insns_p): Strengthen both params from const_rtx to
    	const rtx_insn *.
    	(sched_setup_bb_reg_pressure_info): Strengthen second params from
    	rtx to rtx_insn *.
    	* sched-rgn.c (init_ready_list): Likewise for locals "prev_head",
    	"next_tail".
    	* sched-vis.c (dump_rtl_slim): Strengthen params "first", "last"
    	and locals "insn", "tail" from const_rtx to const rtx_insn *.
    	(rtl_dump_bb_for_graph): Strengthen local "insn" from rtx to
    	rtx_insn *.
    	(debug_rtl_slim): Strengthen params "first" and "last" from
    	const_rtx to const rtx_insn *.
    	* shrink-wrap.c (try_shrink_wrapping): Strengthen param
    	"prologue_seq" and locals "seq", "p_insn" from rtx to rtx_insn *.
    	(convert_to_simple_return): Likewise for param "returnjump".
    	* shrink-wrap.h (try_shrink_wrapping): Likewise for param
    	"prologue_seq".
    	(convert_to_simple_return): Likewise for param "returnjump".
    	* valtrack.c (propagate_for_debug): Likewise for params
    	"insn", "last".
    	* valtrack.h (propagate_for_debug): Likewise for second param.

diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 7c749be..3496569 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -5842,7 +5842,7 @@ pass_expand::execute (function *fun)
 
   if (var_ret_seq)
     {
-      rtx after = return_label;
+      rtx_insn *after = return_label;
       rtx_insn *next = NEXT_INSN (after);
       if (next && NOTE_INSN_BASIC_BLOCK_P (next))
 	after = next;
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index d9b41e0..bc6c965 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -1603,6 +1603,7 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
 
   if (EDGE_COUNT (e->src->succs) >= 2 || abnormal_edge_flags || asm_goto_edge)
     {
+      rtx_insn *new_head;
       gcov_type count = e->count;
       int probability = e->probability;
       /* Create the new structures.  */
@@ -1612,12 +1613,12 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
 	 forward from the last instruction of the old block.  */
       rtx_jump_table_data *table;
       if (tablejump_p (BB_END (e->src), NULL, &table))
-	note = table;
+	new_head = table;
       else
-	note = BB_END (e->src);
-      note = NEXT_INSN (note);
+	new_head = BB_END (e->src);
+      new_head = NEXT_INSN (new_head);
 
-      jump_block = create_basic_block (note, NULL, e->src);
+      jump_block = create_basic_block (new_head, NULL, e->src);
       jump_block->count = count;
       jump_block->frequency = EDGE_FREQUENCY (e);
 
diff --git a/gcc/combine.c b/gcc/combine.c
index 546762b..d83cd0b 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -515,13 +515,13 @@ target_canonicalize_comparison (enum rtx_code *code, rtx *op0, rtx *op1,
    reg_stat vector is made larger if the splitter creates a new
    register.  */
 
-static rtx
+static rtx_insn *
 combine_split_insns (rtx pattern, rtx insn)
 {
-  rtx ret;
+  rtx_insn *ret;
   unsigned int nregs;
 
-  ret = split_insns (pattern, insn);
+  ret = safe_as_a <rtx_insn *> (split_insns (pattern, insn));
   nregs = max_reg_num ();
   if (nregs > reg_stat.length ())
     reg_stat.safe_grow_cleared (nregs);
@@ -2295,8 +2295,9 @@ likely_spilled_retval_1 (rtx x, const_rtx set, void *data)
 static int
 likely_spilled_retval_p (rtx_insn *insn)
 {
-  rtx use = BB_END (this_basic_block);
-  rtx reg, p;
+  rtx_insn *use = BB_END (this_basic_block);
+  rtx reg;
+  rtx_insn *p;
   unsigned regno, nregs;
   /* We assume here that no machine mode needs more than
      32 hard registers when the value overlaps with a register
@@ -3334,13 +3335,14 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
   if (i1 && insn_code_number < 0 && GET_CODE (newpat) == SET
       && asm_noperands (newpat) < 0)
     {
-      rtx parallel, m_split, *split;
+      rtx parallel, *split;
+      rtx_insn *m_split_insn;
 
       /* See if the MD file can split NEWPAT.  If it can't, see if letting it
 	 use I2DEST as a scratch register will help.  In the latter case,
 	 convert I2DEST to the mode of the source of NEWPAT if we can.  */
 
-      m_split = combine_split_insns (newpat, i3);
+      m_split_insn = combine_split_insns (newpat, i3);
 
       /* We can only use I2DEST as a scratch reg if it doesn't overlap any
 	 inputs of NEWPAT.  */
@@ -3349,7 +3351,7 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
 	 possible to try that as a scratch reg.  This would require adding
 	 more code to make it work though.  */
 
-      if (m_split == 0 && ! reg_overlap_mentioned_p (i2dest, newpat))
+      if (m_split_insn == 0 && ! reg_overlap_mentioned_p (i2dest, newpat))
 	{
 	  enum machine_mode new_mode = GET_MODE (SET_DEST (newpat));
 
@@ -3359,11 +3361,11 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
 				       gen_rtvec (2, newpat,
 						  gen_rtx_CLOBBER (VOIDmode,
 								   i2dest)));
-	  m_split = combine_split_insns (parallel, i3);
+	  m_split_insn = combine_split_insns (parallel, i3);
 
 	  /* If that didn't work, try changing the mode of I2DEST if
 	     we can.  */
-	  if (m_split == 0
+	  if (m_split_insn == 0
 	      && new_mode != GET_MODE (i2dest)
 	      && new_mode != VOIDmode
 	      && can_change_dest_mode (i2dest, added_sets_2, new_mode))
@@ -3384,9 +3386,9 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
 			   gen_rtvec (2, newpat,
 				      gen_rtx_CLOBBER (VOIDmode,
 						       ni2dest))));
-	      m_split = combine_split_insns (parallel, i3);
+	      m_split_insn = combine_split_insns (parallel, i3);
 
-	      if (m_split == 0
+	      if (m_split_insn == 0
 		  && REGNO (i2dest) >= FIRST_PSEUDO_REGISTER)
 		{
 		  struct undo *buf;
@@ -3399,34 +3401,34 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
 		}
 	    }
 
-	  i2scratch = m_split != 0;
+	  i2scratch = m_split_insn != 0;
 	}
 
       /* If recog_for_combine has discarded clobbers, try to use them
 	 again for the split.  */
-      if (m_split == 0 && newpat_vec_with_clobbers)
+      if (m_split_insn == 0 && newpat_vec_with_clobbers)
 	{
 	  parallel = gen_rtx_PARALLEL (VOIDmode, newpat_vec_with_clobbers);
-	  m_split = combine_split_insns (parallel, i3);
+	  m_split_insn = combine_split_insns (parallel, i3);
 	}
 
-      if (m_split && NEXT_INSN (m_split) == NULL_RTX)
+      if (m_split_insn && NEXT_INSN (m_split_insn) == NULL_RTX)
 	{
-	  m_split = PATTERN (m_split);
-	  insn_code_number = recog_for_combine (&m_split, i3, &new_i3_notes);
+	  rtx m_split_pat = PATTERN (m_split_insn);
+	  insn_code_number = recog_for_combine (&m_split_pat, i3, &new_i3_notes);
 	  if (insn_code_number >= 0)
-	    newpat = m_split;
+	    newpat = m_split_pat;
 	}
-      else if (m_split && NEXT_INSN (NEXT_INSN (m_split)) == NULL_RTX
+      else if (m_split_insn && NEXT_INSN (NEXT_INSN (m_split_insn)) == NULL_RTX
 	       && (next_nonnote_nondebug_insn (i2) == i3
-		   || ! use_crosses_set_p (PATTERN (m_split), DF_INSN_LUID (i2))))
+		   || ! use_crosses_set_p (PATTERN (m_split_insn), DF_INSN_LUID (i2))))
 	{
 	  rtx i2set, i3set;
-	  rtx newi3pat = PATTERN (NEXT_INSN (m_split));
-	  newi2pat = PATTERN (m_split);
+	  rtx newi3pat = PATTERN (NEXT_INSN (m_split_insn));
+	  newi2pat = PATTERN (m_split_insn);
 
-	  i3set = single_set (NEXT_INSN (m_split));
-	  i2set = single_set (m_split);
+	  i3set = single_set (NEXT_INSN (m_split_insn));
+	  i2set = single_set (m_split_insn);
 
 	  i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
 
@@ -4535,9 +4537,9 @@ find_split_point (rtx *loc, rtx_insn *insn, bool set_src)
 					    MEM_ADDR_SPACE (x)))
 	{
 	  rtx reg = regno_reg_rtx[FIRST_PSEUDO_REGISTER];
-	  rtx seq = combine_split_insns (gen_rtx_SET (VOIDmode, reg,
-						      XEXP (x, 0)),
-					 subst_insn);
+	  rtx_insn *seq = combine_split_insns (gen_rtx_SET (VOIDmode, reg,
+							    XEXP (x, 0)),
+					       subst_insn);
 
 	  /* This should have produced two insns, each of which sets our
 	     placeholder.  If the source of the second is a valid address,
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index 393bf4d..028b61f 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -2664,8 +2664,8 @@ spu_machine_dependent_reorg (void)
 	   label because GCC expects it at the beginning of the block. */
 	rtx unspec = SET_SRC (XVECEXP (PATTERN (insn), 0, 0));
 	rtx label_ref = XVECEXP (unspec, 0, 0);
-	rtx label = XEXP (label_ref, 0);
-	rtx branch;
+	rtx_insn *label = as_a <rtx_insn *> (XEXP (label_ref, 0));
+	rtx_insn *branch;
 	int offset = 0;
 	for (branch = NEXT_INSN (label);
 	     !JUMP_P (branch) && !CALL_P (branch);
diff --git a/gcc/dse.c b/gcc/dse.c
index 7b4260a..90695fd 100644
--- a/gcc/dse.c
+++ b/gcc/dse.c
@@ -811,7 +811,7 @@ free_store_info (insn_info_t insn_info)
 
 typedef struct
 {
-  rtx first, current;
+  rtx_insn *first, *current;
   regset fixed_regs_live;
   bool failure;
 } note_add_store_info;
@@ -822,7 +822,7 @@ typedef struct
 static void
 note_add_store (rtx loc, const_rtx expr ATTRIBUTE_UNUSED, void *data)
 {
-  rtx insn;
+  rtx_insn *insn;
   note_add_store_info *info = (note_add_store_info *) data;
   int r, n;
 
@@ -863,7 +863,7 @@ emit_inc_dec_insn_before (rtx mem ATTRIBUTE_UNUSED,
 			  rtx dest, rtx src, rtx srcoff, void *arg)
 {
   insn_info_t insn_info = (insn_info_t) arg;
-  rtx insn = insn_info->insn, new_insn, cur;
+  rtx_insn *insn = insn_info->insn, *new_insn, *cur;
   note_add_store_info info;
 
   /* We can reuse all operands without copying, because we are about
@@ -876,7 +876,7 @@ emit_inc_dec_insn_before (rtx mem ATTRIBUTE_UNUSED,
       end_sequence ();
     }
   else
-    new_insn = gen_move_insn (dest, src);
+    new_insn = as_a <rtx_insn *> (gen_move_insn (dest, src));
   info.first = new_insn;
   info.fixed_regs_live = insn_info->fixed_regs_live;
   info.failure = false;
@@ -1739,7 +1739,8 @@ find_shift_sequence (int access_size,
        GET_MODE_BITSIZE (new_mode) <= BITS_PER_WORD;
        new_mode = GET_MODE_WIDER_MODE (new_mode))
     {
-      rtx target, new_reg, shift_seq, insn, new_lhs;
+      rtx target, new_reg, new_lhs;
+      rtx_insn *shift_seq, *insn;
       int cost;
 
       /* If a constant was stored into memory, try to simplify it here,
@@ -1959,7 +1960,8 @@ replace_read (store_info_t store_info, insn_info_t store_insn,
 {
   enum machine_mode store_mode = GET_MODE (store_info->mem);
   enum machine_mode read_mode = GET_MODE (read_info->mem);
-  rtx insns, this_insn, read_reg;
+  rtx_insn *insns, *this_insn;
+  rtx read_reg;
   basic_block bb;
 
   if (!dbg_cnt (dse))
diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index e3fb078..f30274e 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -113,7 +113,7 @@ typedef struct
   HOST_WIDE_INT beg_delay_args_size, end_delay_args_size;
 
   /* The first EH insn in the trace, where beg_delay_args_size must be set.  */
-  rtx eh_head;
+  rtx_insn *eh_head;
 
   /* The following variables contain data used in interpreting frame related
      expressions.  These are not part of the "real" row state as defined by
@@ -876,7 +876,7 @@ notice_args_size (rtx insn)
    data within the trace related to EH insns and args_size.  */
 
 static void
-notice_eh_throw (rtx insn)
+notice_eh_throw (rtx_insn *insn)
 {
   HOST_WIDE_INT args_size;
 
@@ -2577,10 +2577,10 @@ create_cfi_notes (void)
 
 /* Return the insn before the first NOTE_INSN_CFI after START.  */
 
-static rtx
-before_next_cfi_note (rtx start)
+static rtx_insn *
+before_next_cfi_note (rtx_insn *start)
 {
-  rtx prev = start;
+  rtx_insn *prev = start;
   while (start)
     {
       if (NOTE_P (start) && NOTE_KIND (start) == NOTE_INSN_CFI)
@@ -2675,7 +2675,7 @@ connect_traces (void)
 
       if (dump_file && add_cfi_insn != ti->head)
 	{
-	  rtx note;
+	  rtx_insn *note;
 
 	  fprintf (dump_file, "Fixup between trace %u and %u:\n",
 		   prev_ti->id, ti->id);
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index b8fe850..c50e81f 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -2746,7 +2746,7 @@ reset_insn_used_flags (rtx insn)
 static void
 reset_all_used_flags (void)
 {
-  rtx p;
+  rtx_insn *p;
 
   for (p = get_insns (); p; p = NEXT_INSN (p))
     if (INSN_P (p))
@@ -2785,7 +2785,7 @@ verify_insn_sharing (rtx insn)
 DEBUG_FUNCTION void
 verify_rtl_sharing (void)
 {
-  rtx p;
+  rtx_insn *p;
 
   timevar_push (TV_VERIFY_RTL_SHARING);
 
@@ -2815,7 +2815,7 @@ verify_rtl_sharing (void)
    Assumes the mark bits are cleared at entry.  */
 
 void
-unshare_all_rtl_in_chain (rtx insn)
+unshare_all_rtl_in_chain (rtx_insn *insn)
 {
   for (; insn; insn = NEXT_INSN (insn))
     if (INSN_P (insn))
@@ -3143,7 +3143,7 @@ get_last_insn_anywhere (void)
 rtx
 get_first_nonnote_insn (void)
 {
-  rtx insn = get_insns ();
+  rtx_insn *insn = get_insns ();
 
   if (insn)
     {
@@ -3156,7 +3156,7 @@ get_first_nonnote_insn (void)
 	{
 	  if (NONJUMP_INSN_P (insn)
 	      && GET_CODE (PATTERN (insn)) == SEQUENCE)
-	    insn = XVECEXP (PATTERN (insn), 0, 0);
+	    insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
 	}
     }
 
@@ -3169,7 +3169,7 @@ get_first_nonnote_insn (void)
 rtx
 get_last_nonnote_insn (void)
 {
-  rtx insn = get_last_insn ();
+  rtx_insn *insn = get_last_insn ();
 
   if (insn)
     {
@@ -3180,10 +3180,9 @@ get_last_nonnote_insn (void)
 	  continue;
       else
 	{
-	  if (NONJUMP_INSN_P (insn)
-	      && GET_CODE (PATTERN (insn)) == SEQUENCE)
-	    insn = XVECEXP (PATTERN (insn), 0,
-			    XVECLEN (PATTERN (insn), 0) - 1);
+	  if (NONJUMP_INSN_P (insn))
+	    if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
+	      insn = seq->insn (seq->len () - 1);
 	}
     }
 
@@ -3215,42 +3214,45 @@ get_max_insn_count (void)
    of the sequence.  */
 
 rtx_insn *
-next_insn (rtx insn)
+next_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
   if (insn)
     {
       insn = NEXT_INSN (insn);
       if (insn && NONJUMP_INSN_P (insn)
 	  && GET_CODE (PATTERN (insn)) == SEQUENCE)
-	insn = XVECEXP (PATTERN (insn), 0, 0);
+	insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the previous insn.  If it is a SEQUENCE, return the last insn
    of the sequence.  */
 
 rtx_insn *
-previous_insn (rtx insn)
+previous_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
   if (insn)
     {
       insn = PREV_INSN (insn);
-      if (insn && NONJUMP_INSN_P (insn)
-	  && GET_CODE (PATTERN (insn)) == SEQUENCE)
-	insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
+      if (insn && NONJUMP_INSN_P (insn))
+	if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
+	  insn = seq->insn (seq->len () - 1);
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the next insn after INSN that is not a NOTE.  This routine does not
    look inside SEQUENCEs.  */
 
 rtx_insn *
-next_nonnote_insn (rtx insn)
+next_nonnote_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3258,7 +3260,7 @@ next_nonnote_insn (rtx insn)
 	break;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the next insn after INSN that is not a NOTE, but stop the
@@ -3266,8 +3268,10 @@ next_nonnote_insn (rtx insn)
    look inside SEQUENCEs.  */
 
 rtx_insn *
-next_nonnote_insn_bb (rtx insn)
+next_nonnote_insn_bb (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3277,15 +3281,17 @@ next_nonnote_insn_bb (rtx insn)
 	return NULL;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the previous insn before INSN that is not a NOTE.  This routine does
    not look inside SEQUENCEs.  */
 
 rtx_insn *
-prev_nonnote_insn (rtx insn)
+prev_nonnote_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3293,7 +3299,7 @@ prev_nonnote_insn (rtx insn)
 	break;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the previous insn before INSN that is not a NOTE, but stop
@@ -3301,8 +3307,10 @@ prev_nonnote_insn (rtx insn)
    not look inside SEQUENCEs.  */
 
 rtx_insn *
-prev_nonnote_insn_bb (rtx insn)
+prev_nonnote_insn_bb (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3312,15 +3320,17 @@ prev_nonnote_insn_bb (rtx insn)
 	return NULL;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the next insn after INSN that is not a DEBUG_INSN.  This
    routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-next_nondebug_insn (rtx insn)
+next_nondebug_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3328,15 +3338,17 @@ next_nondebug_insn (rtx insn)
 	break;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the previous insn before INSN that is not a DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-prev_nondebug_insn (rtx insn)
+prev_nondebug_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3344,15 +3356,17 @@ prev_nondebug_insn (rtx insn)
 	break;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-next_nonnote_nondebug_insn (rtx insn)
+next_nonnote_nondebug_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3360,15 +3374,17 @@ next_nonnote_nondebug_insn (rtx insn)
 	break;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
    This routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-prev_nonnote_nondebug_insn (rtx insn)
+prev_nonnote_nondebug_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3376,7 +3392,7 @@ prev_nonnote_nondebug_insn (rtx insn)
 	break;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
@@ -3384,8 +3400,10 @@ prev_nonnote_nondebug_insn (rtx insn)
    SEQUENCEs.  */
 
 rtx_insn *
-next_real_insn (rtx insn)
+next_real_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3393,7 +3411,7 @@ next_real_insn (rtx insn)
 	break;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
@@ -3401,8 +3419,10 @@ next_real_insn (rtx insn)
    SEQUENCEs.  */
 
 rtx_insn *
-prev_real_insn (rtx insn)
+prev_real_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3410,7 +3430,7 @@ prev_real_insn (rtx insn)
 	break;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Return the last CALL_INSN in the current list, or 0 if there is none.
@@ -3445,8 +3465,10 @@ active_insn_p (const_rtx insn)
 }
 
 rtx_insn *
-next_active_insn (rtx insn)
+next_active_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3454,7 +3476,7 @@ next_active_insn (rtx insn)
 	break;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Find the last insn before INSN that really does something.  This routine
@@ -3462,8 +3484,10 @@ next_active_insn (rtx insn)
    standalone USE and CLOBBER insn.  */
 
 rtx_insn *
-prev_active_insn (rtx insn)
+prev_active_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   while (insn)
     {
       insn = PREV_INSN (insn);
@@ -3471,7 +3495,7 @@ prev_active_insn (rtx insn)
 	break;
     }
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 \f
 #ifdef HAVE_cc0
@@ -3485,8 +3509,10 @@ prev_active_insn (rtx insn)
    Return 0 if we can't find the insn.  */
 
 rtx_insn *
-next_cc0_user (rtx insn)
+next_cc0_user (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
 
   if (note)
@@ -3494,10 +3520,10 @@ next_cc0_user (rtx insn)
 
   insn = next_nonnote_insn (insn);
   if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
-    insn = XVECEXP (PATTERN (insn), 0, 0);
+    insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
 
   if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
-    return safe_as_a <rtx_insn *> (insn);
+    return insn;
 
   return 0;
 }
@@ -3506,8 +3532,10 @@ next_cc0_user (rtx insn)
    note, it is the previous insn.  */
 
 rtx_insn *
-prev_cc0_setter (rtx insn)
+prev_cc0_setter (rtx uncast_insn)
 {
+  rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
+
   rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
 
   if (note)
@@ -3516,7 +3544,7 @@ prev_cc0_setter (rtx insn)
   insn = prev_nonnote_insn (insn);
   gcc_assert (sets_cc0_p (PATTERN (insn)));
 
-  return safe_as_a <rtx_insn *> (insn);
+  return insn;
 }
 #endif
 
@@ -3586,27 +3614,29 @@ mark_label_nuses (rtx x)
    returns TRIAL.  If the insn to be returned can be split, it will be.  */
 
 rtx_insn *
-try_split (rtx pat, rtx trial, int last)
+try_split (rtx pat, rtx uncast_trial, int last)
 {
+  rtx_insn *trial = as_a <rtx_insn *> (uncast_trial);
   rtx_insn *before = PREV_INSN (trial);
   rtx_insn *after = NEXT_INSN (trial);
   int has_barrier = 0;
-  rtx note, seq, tem;
+  rtx note;
+  rtx_insn *seq, *tem;
   int probability;
-  rtx insn_last, insn;
+  rtx_insn *insn_last, *insn;
   int njumps = 0;
   rtx call_insn = NULL_RTX;
 
   /* We're not good at redistributing frame information.  */
   if (RTX_FRAME_RELATED_P (trial))
-    return as_a <rtx_insn *> (trial);
+    return trial;
 
   if (any_condjump_p (trial)
       && (note = find_reg_note (trial, REG_BR_PROB, 0)))
     split_branch_probability = XINT (note, 0);
   probability = split_branch_probability;
 
-  seq = split_insns (pat, trial);
+  seq = safe_as_a <rtx_insn *> (split_insns (pat, trial));
 
   split_branch_probability = -1;
 
@@ -3619,7 +3649,7 @@ try_split (rtx pat, rtx trial, int last)
     }
 
   if (!seq)
-    return as_a <rtx_insn *> (trial);
+    return trial;
 
   /* Avoid infinite loop if any insn of the result matches
      the original pattern.  */
@@ -3628,7 +3658,7 @@ try_split (rtx pat, rtx trial, int last)
     {
       if (INSN_P (insn_last)
 	  && rtx_equal_p (PATTERN (insn_last), pat))
-	return as_a <rtx_insn *> (trial);
+	return trial;
       if (!NEXT_INSN (insn_last))
 	break;
       insn_last = NEXT_INSN (insn_last);
@@ -3668,7 +3698,8 @@ try_split (rtx pat, rtx trial, int last)
       for (insn = insn_last; insn ; insn = PREV_INSN (insn))
 	if (CALL_P (insn))
 	  {
-	    rtx next, *p;
+	    rtx_insn *next;
+	    rtx *p;
 
 	    gcc_assert (call_insn == NULL_RTX);
 	    call_insn = insn;
@@ -4102,8 +4133,9 @@ set_insn_deleted (rtx insn)
    To really delete an insn and related DF information, use delete_insn.  */
 
 void
-remove_insn (rtx insn)
+remove_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   rtx_insn *next = NEXT_INSN (insn);
   rtx_insn *prev = PREV_INSN (insn);
   basic_block bb;
@@ -4639,9 +4671,10 @@ emit_note_before (enum insn_note subtype, rtx uncast_before)
    MAKE_RAW indicates how to turn PATTERN into a real insn.  */
 
 static rtx_insn *
-emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
+emit_pattern_after_setloc (rtx pattern, rtx uncast_after, int loc,
 			   rtx_insn *(*make_raw) (rtx))
 {
+  rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
   rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
 
   if (pattern == NULL_RTX || !loc)
@@ -4664,10 +4697,11 @@ emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
    any DEBUG_INSNs.  */
 
 static rtx_insn *
-emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
+emit_pattern_after (rtx pattern, rtx uncast_after, bool skip_debug_insns,
 		    rtx_insn *(*make_raw) (rtx))
 {
-  rtx prev = after;
+  rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
+  rtx_insn *prev = after;
 
   if (skip_debug_insns)
     while (DEBUG_INSN_P (prev))
@@ -4742,16 +4776,17 @@ emit_debug_insn_after (rtx pattern, rtx after)
    CALL_INSN, etc.  */
 
 static rtx_insn *
-emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
+emit_pattern_before_setloc (rtx pattern, rtx uncast_before, int loc, bool insnp,
 			    rtx_insn *(*make_raw) (rtx))
 {
-  rtx first = PREV_INSN (before);
-  rtx last = emit_pattern_before_noloc (pattern, before,
-                                        insnp ? before : NULL_RTX,
-                                        NULL, make_raw);
+  rtx_insn *before = as_a <rtx_insn *> (uncast_before);
+  rtx_insn *first = PREV_INSN (before);
+  rtx_insn *last = emit_pattern_before_noloc (pattern, before,
+					      insnp ? before : NULL_RTX,
+					      NULL, make_raw);
 
   if (pattern == NULL_RTX || !loc)
-    return safe_as_a <rtx_insn *> (last);
+    return last;
 
   if (!first)
     first = get_insns ();
@@ -4765,7 +4800,7 @@ emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
 	break;
       first = NEXT_INSN (first);
     }
-  return safe_as_a <rtx_insn *> (last);
+  return last;
 }
 
 /* Insert PATTERN before BEFORE.  MAKE_RAW indicates how to turn PATTERN
@@ -4774,10 +4809,11 @@ emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
    INSN as opposed to a JUMP_INSN, CALL_INSN, etc.  */
 
 static rtx_insn *
-emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
+emit_pattern_before (rtx pattern, rtx uncast_before, bool skip_debug_insns,
 		     bool insnp, rtx_insn *(*make_raw) (rtx))
 {
-  rtx next = before;
+  rtx_insn *before = safe_as_a <rtx_insn *> (uncast_before);
+  rtx_insn *next = before;
 
   if (skip_debug_insns)
     while (DEBUG_INSN_P (next))
diff --git a/gcc/except.c b/gcc/except.c
index 99a66a0..5cdfb68 100644
--- a/gcc/except.c
+++ b/gcc/except.c
@@ -1741,9 +1741,10 @@ insn_could_throw_p (const_rtx insn)
    to look for a note, or the note itself.  */
 
 void
-copy_reg_eh_region_note_forward (rtx note_or_insn, rtx first, rtx last)
+copy_reg_eh_region_note_forward (rtx note_or_insn, rtx_insn *first, rtx last)
 {
-  rtx insn, note = note_or_insn;
+  rtx_insn *insn;
+  rtx note = note_or_insn;
 
   if (INSN_P (note_or_insn))
     {
@@ -1762,9 +1763,10 @@ copy_reg_eh_region_note_forward (rtx note_or_insn, rtx first, rtx last)
 /* Likewise, but iterate backward.  */
 
 void
-copy_reg_eh_region_note_backward (rtx note_or_insn, rtx last, rtx first)
+copy_reg_eh_region_note_backward (rtx note_or_insn, rtx_insn *last, rtx first)
 {
-  rtx insn, note = note_or_insn;
+  rtx_insn *insn;
+  rtx note = note_or_insn;
 
   if (INSN_P (note_or_insn))
     {
diff --git a/gcc/expr.c b/gcc/expr.c
index 8b7073e..49c22c5 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -3933,11 +3933,12 @@ find_args_size_adjust (rtx insn)
 }
 
 int
-fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
+fixup_args_size_notes (rtx prev, rtx uncast_last, int end_args_size)
 {
+  rtx_insn *last = safe_as_a <rtx_insn *> (uncast_last);
   int args_size = end_args_size;
   bool saw_unknown = false;
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = last; insn != prev; insn = PREV_INSN (insn))
     {
diff --git a/gcc/function.c b/gcc/function.c
index 6023d69..349525a 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -121,7 +121,7 @@ static tree *get_block_vector (tree, int *);
 extern tree debug_find_var_in_block_tree (tree, tree);
 /* We always define `record_insns' even if it's not used so that we
    can always export `prologue_epilogue_contains'.  */
-static void record_insns (rtx, rtx, htab_t *) ATTRIBUTE_UNUSED;
+static void record_insns (rtx_insn *, rtx, htab_t *) ATTRIBUTE_UNUSED;
 static bool contains (const_rtx, htab_t);
 static void prepare_function_start (void);
 static void do_clobber_return_reg (rtx, void *);
@@ -4982,9 +4982,9 @@ do_warn_unused_parameter (tree fn)
 /* Set the location of the insn chain starting at INSN to LOC.  */
 
 static void
-set_insn_locations (rtx insn, int loc)
+set_insn_locations (rtx_insn *insn, int loc)
 {
-  while (insn != NULL_RTX)
+  while (insn != NULL)
     {
       if (INSN_P (insn))
 	INSN_LOCATION (insn) = loc;
@@ -5284,9 +5284,9 @@ get_arg_pointer_save_area (void)
    for the first time.  */
 
 static void
-record_insns (rtx insns, rtx end, htab_t *hashp)
+record_insns (rtx_insn *insns, rtx end, htab_t *hashp)
 {
-  rtx tmp;
+  rtx_insn *tmp;
   htab_t hash = *hashp;
 
   if (hash == NULL)
@@ -5424,8 +5424,9 @@ set_return_jump_label (rtx returnjump)
 #if defined (HAVE_return) || defined (HAVE_simple_return)
 /* Return true if there are any active insns between HEAD and TAIL.  */
 bool
-active_insn_between (rtx head, rtx tail)
+active_insn_between (rtx head, rtx uncast_tail)
 {
+  rtx_insn *tail = safe_as_a <rtx_insn *> (uncast_tail);
   while (tail)
     {
       if (active_insn_p (tail))
@@ -5615,9 +5616,8 @@ thread_prologue_and_epilogue_insns (void)
   bitmap_head bb_flags;
 #endif
   rtx_insn *returnjump;
-  rtx seq ATTRIBUTE_UNUSED;
   rtx_insn *epilogue_end ATTRIBUTE_UNUSED;
-  rtx prologue_seq ATTRIBUTE_UNUSED, split_prologue_seq ATTRIBUTE_UNUSED;
+  rtx_insn *prologue_seq ATTRIBUTE_UNUSED, *split_prologue_seq ATTRIBUTE_UNUSED;
   edge e, entry_edge, orig_entry_edge, exit_fallthru_edge;
   edge_iterator ei;
 
@@ -5626,7 +5626,6 @@ thread_prologue_and_epilogue_insns (void)
   rtl_profile_for_bb (ENTRY_BLOCK_PTR_FOR_FN (cfun));
 
   inserted = false;
-  seq = NULL_RTX;
   epilogue_end = NULL;
   returnjump = NULL;
 
@@ -5637,7 +5636,7 @@ thread_prologue_and_epilogue_insns (void)
   entry_edge = single_succ_edge (ENTRY_BLOCK_PTR_FOR_FN (cfun));
   orig_entry_edge = entry_edge;
 
-  split_prologue_seq = NULL_RTX;
+  split_prologue_seq = NULL;
   if (flag_split_stack
       && (lookup_attribute ("no_split_stack", DECL_ATTRIBUTES (cfun->decl))
 	  == NULL))
@@ -5657,12 +5656,12 @@ thread_prologue_and_epilogue_insns (void)
 #endif
     }
 
-  prologue_seq = NULL_RTX;
+  prologue_seq = NULL;
 #ifdef HAVE_prologue
   if (HAVE_prologue)
     {
       start_sequence ();
-      seq = gen_prologue ();
+      rtx_insn *seq = safe_as_a <rtx_insn *> (gen_prologue ());
       emit_insn (seq);
 
       /* Insert an explicit USE for the frame pointer
@@ -5799,7 +5798,7 @@ thread_prologue_and_epilogue_insns (void)
     {
       start_sequence ();
       epilogue_end = emit_note (NOTE_INSN_EPILOGUE_BEG);
-      seq = gen_epilogue ();
+      rtx_insn *seq = as_a <rtx_insn *> (gen_epilogue ());
       if (seq)
 	emit_jump_insn (seq);
 
@@ -5900,7 +5899,7 @@ epilogue_done:
 	  start_sequence ();
 	  emit_note (NOTE_INSN_EPILOGUE_BEG);
 	  emit_insn (ep_seq);
-	  seq = get_insns ();
+	  rtx_insn *seq = get_insns ();
 	  end_sequence ();
 
 	  /* Retain a map of the epilogue insns.  Used in life analysis to
diff --git a/gcc/gcse.c b/gcc/gcse.c
index cd0829f..4a8fe50 100644
--- a/gcc/gcse.c
+++ b/gcc/gcse.c
@@ -2161,7 +2161,7 @@ process_insert_insn (struct expr *expr)
 static void
 insert_insn_end_basic_block (struct expr *expr, basic_block bb)
 {
-  rtx insn = BB_END (bb);
+  rtx_insn *insn = BB_END (bb);
   rtx_insn *new_insn;
   rtx reg = expr->reaching_reg;
   int regno = REGNO (reg);
@@ -2188,7 +2188,7 @@ insert_insn_end_basic_block (struct expr *expr, basic_block bb)
 	 if cc0 isn't set.  */
       rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
       if (note)
-	insn = XEXP (note, 0);
+	insn = safe_as_a <rtx_insn *> (XEXP (note, 0));
       else
 	{
 	  rtx_insn *maybe_cc0_setter = prev_nonnote_insn (insn);
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 576ef56..1ebfcdb 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -1037,7 +1037,7 @@ static void
 initiate_bb_reg_pressure_info (basic_block bb)
 {
   unsigned int i ATTRIBUTE_UNUSED;
-  rtx insn;
+  rtx_insn *insn;
 
   if (current_nr_blocks > 1)
     FOR_BB_INSNS (bb, insn)
@@ -1604,7 +1604,7 @@ priority (rtx_insn *insn)
 	this_priority = insn_cost (insn);
       else
 	{
-	  rtx prev_first, twin;
+	  rtx_insn *prev_first, *twin;
 	  basic_block rec;
 
 	  /* For recovery check instructions we calculate priority slightly
@@ -3049,7 +3049,7 @@ update_register_pressure (rtx_insn *insn)
    meaning in sched-int.h::_haifa_insn_data) for all current BB insns
    after insn AFTER.  */
 static void
-setup_insn_max_reg_pressure (rtx after, bool update_p)
+setup_insn_max_reg_pressure (rtx_insn *after, bool update_p)
 {
   int i, p;
   bool eq_p;
@@ -3112,7 +3112,7 @@ update_reg_and_insn_max_reg_pressure (rtx_insn *insn)
    insns starting after insn AFTER.  Set up also max register pressure
    for all insns of the basic block.  */
 void
-sched_setup_bb_reg_pressure_info (basic_block bb, rtx after)
+sched_setup_bb_reg_pressure_info (basic_block bb, rtx_insn *after)
 {
   gcc_assert (sched_pressure == SCHED_PRESSURE_WEIGHTED);
   initiate_bb_reg_pressure_info (bb);
@@ -4832,7 +4832,7 @@ get_ebb_head_tail (basic_block beg, basic_block end,
 /* Return nonzero if there are no real insns in the range [ HEAD, TAIL ].  */
 
 int
-no_real_insns_p (const_rtx head, const_rtx tail)
+no_real_insns_p (const rtx_insn *head, const rtx_insn *tail)
 {
   while (head != NEXT_INSN (tail))
     {
@@ -5975,7 +5975,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
 
   /* Head/tail info for this block.  */
   rtx_insn *prev_head = current_sched_info->prev_head;
-  rtx next_tail = current_sched_info->next_tail;
+  rtx_insn *next_tail = current_sched_info->next_tail;
   rtx_insn *head = NEXT_INSN (prev_head);
   rtx_insn *tail = PREV_INSN (next_tail);
 
diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index 94b96f3..9116204 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -87,10 +87,11 @@ static int count_bb_insns (const_basic_block);
 static bool cheap_bb_rtx_cost_p (const_basic_block, int, int);
 static rtx_insn *first_active_insn (basic_block);
 static rtx_insn *last_active_insn (basic_block, int);
-static rtx find_active_insn_before (basic_block, rtx);
-static rtx find_active_insn_after (basic_block, rtx);
+static rtx_insn *find_active_insn_before (basic_block, rtx_insn *);
+static rtx_insn *find_active_insn_after (basic_block, rtx_insn *);
 static basic_block block_fallthru (basic_block);
-static int cond_exec_process_insns (ce_if_block *, rtx, rtx, rtx, int, int);
+static int cond_exec_process_insns (ce_if_block *, rtx_insn *, rtx, rtx, int,
+				    int);
 static rtx cond_exec_get_condition (rtx);
 static rtx noce_get_condition (rtx_insn *, rtx_insn **, bool);
 static int noce_operand_ok (const_rtx);
@@ -256,11 +257,11 @@ last_active_insn (basic_block bb, int skip_use_p)
 
 /* Return the active insn before INSN inside basic block CURR_BB. */
 
-static rtx
-find_active_insn_before (basic_block curr_bb, rtx insn)
+static rtx_insn *
+find_active_insn_before (basic_block curr_bb, rtx_insn *insn)
 {
   if (!insn || insn == BB_HEAD (curr_bb))
-    return NULL_RTX;
+    return NULL;
 
   while ((insn = PREV_INSN (insn)) != NULL_RTX)
     {
@@ -269,7 +270,7 @@ find_active_insn_before (basic_block curr_bb, rtx insn)
 
       /* No other active insn all the way to the start of the basic block. */
       if (insn == BB_HEAD (curr_bb))
-        return NULL_RTX;
+        return NULL;
     }
 
   return insn;
@@ -277,11 +278,11 @@ find_active_insn_before (basic_block curr_bb, rtx insn)
 
 /* Return the active insn after INSN inside basic block CURR_BB. */
 
-static rtx
-find_active_insn_after (basic_block curr_bb, rtx insn)
+static rtx_insn *
+find_active_insn_after (basic_block curr_bb, rtx_insn *insn)
 {
   if (!insn || insn == BB_END (curr_bb))
-    return NULL_RTX;
+    return NULL;
 
   while ((insn = NEXT_INSN (insn)) != NULL_RTX)
     {
@@ -290,7 +291,7 @@ find_active_insn_after (basic_block curr_bb, rtx insn)
 
       /* No other active insn all the way to the end of the basic block. */
       if (insn == BB_END (curr_bb))
-        return NULL_RTX;
+        return NULL;
     }
 
   return insn;
@@ -334,14 +335,14 @@ rtx_interchangeable_p (const_rtx a, const_rtx b)
 
 static int
 cond_exec_process_insns (ce_if_block *ce_info ATTRIBUTE_UNUSED,
-			 /* if block information */rtx start,
+			 /* if block information */rtx_insn *start,
 			 /* first insn to look at */rtx end,
 			 /* last insn to look at */rtx test,
 			 /* conditional execution test */int prob_val,
 			 /* probability of branch taken. */int mod_ok)
 {
   int must_be_last = FALSE;
-  rtx insn;
+  rtx_insn *insn;
   rtx xtest;
   rtx pattern;
 
@@ -466,10 +467,10 @@ cond_exec_process_if_block (ce_if_block * ce_info,
   basic_block then_bb = ce_info->then_bb;	/* THEN */
   basic_block else_bb = ce_info->else_bb;	/* ELSE or NULL */
   rtx test_expr;		/* expression in IF_THEN_ELSE that is tested */
-  rtx then_start;		/* first insn in THEN block */
-  rtx then_end;			/* last insn + 1 in THEN block */
-  rtx else_start = NULL_RTX;	/* first insn in ELSE block or NULL */
-  rtx else_end = NULL_RTX;	/* last insn + 1 in ELSE block */
+  rtx_insn *then_start;		/* first insn in THEN block */
+  rtx_insn *then_end;		/* last insn + 1 in THEN block */
+  rtx_insn *else_start = NULL;	/* first insn in ELSE block or NULL */
+  rtx_insn *else_end = NULL;	/* last insn + 1 in ELSE block */
   int max;			/* max # of insns to convert.  */
   int then_mod_ok;		/* whether conditional mods are ok in THEN */
   rtx true_expr;		/* test for else block insns */
@@ -534,9 +535,9 @@ cond_exec_process_if_block (ce_if_block * ce_info,
 					 &then_first_tail, &else_first_tail,
 					 NULL);
       if (then_first_tail == BB_HEAD (then_bb))
-	then_start = then_end = NULL_RTX;
+	then_start = then_end = NULL;
       if (else_first_tail == BB_HEAD (else_bb))
-	else_start = else_end = NULL_RTX;
+	else_start = else_end = NULL;
 
       if (n_matching > 0)
 	{
@@ -562,7 +563,7 @@ cond_exec_process_if_block (ce_if_block * ce_info,
 
 	  if (n_matching > 0)
 	    {
-	      rtx insn;
+	      rtx_insn *insn;
 
 	      /* We won't pass the insns in the head sequence to
 		 cond_exec_process_insns, so we need to test them here
@@ -577,9 +578,9 @@ cond_exec_process_if_block (ce_if_block * ce_info,
 	    }
 
 	  if (then_last_head == then_end)
-	    then_start = then_end = NULL_RTX;
+	    then_start = then_end = NULL;
 	  if (else_last_head == else_end)
-	    else_start = else_end = NULL_RTX;
+	    else_start = else_end = NULL;
 
 	  if (n_matching > 0)
 	    {
@@ -641,7 +642,7 @@ cond_exec_process_if_block (ce_if_block * ce_info,
 
       do
 	{
-	  rtx start, end;
+	  rtx_insn *start, *end;
 	  rtx t, f;
 	  enum rtx_code f_code;
 
@@ -743,7 +744,7 @@ cond_exec_process_if_block (ce_if_block * ce_info,
      that the remaining one is executed first for both branches.  */
   if (then_first_tail)
     {
-      rtx from = then_first_tail;
+      rtx_insn *from = then_first_tail;
       if (!INSN_P (from))
 	from = find_active_insn_after (then_bb, from);
       delete_insn_chain (from, BB_END (then_bb), false);
@@ -2499,7 +2500,7 @@ noce_process_if_block (struct noce_if_info *if_info)
   basic_block then_bb = if_info->then_bb;	/* THEN */
   basic_block else_bb = if_info->else_bb;	/* ELSE or NULL */
   basic_block join_bb = if_info->join_bb;	/* JOIN */
-  rtx jump = if_info->jump;
+  rtx_insn *jump = if_info->jump;
   rtx cond = if_info->cond;
   rtx_insn *insn_a, *insn_b;
   rtx set_a, set_b;
@@ -3201,7 +3202,7 @@ merge_if_block (struct ce_if_block * ce_info)
       if (EDGE_COUNT (then_bb->succs) == 0
 	  && EDGE_COUNT (combo_bb->succs) > 1)
 	{
-	  rtx end = NEXT_INSN (BB_END (then_bb));
+	  rtx_insn *end = NEXT_INSN (BB_END (then_bb));
 	  while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end))
 	    end = NEXT_INSN (end);
 
@@ -3224,7 +3225,7 @@ merge_if_block (struct ce_if_block * ce_info)
       if (EDGE_COUNT (else_bb->succs) == 0
 	  && EDGE_COUNT (combo_bb->succs) > 1)
 	{
-	  rtx end = NEXT_INSN (BB_END (else_bb));
+	  rtx_insn *end = NEXT_INSN (BB_END (else_bb));
 	  while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end))
 	    end = NEXT_INSN (end);
 
@@ -3568,7 +3569,7 @@ cond_exec_find_if_block (struct ce_if_block * ce_info)
     {
       if (single_pred_p (else_bb) && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
 	{
-	  rtx last_insn = BB_END (then_bb);
+	  rtx_insn *last_insn = BB_END (then_bb);
 
 	  while (last_insn
 		 && NOTE_P (last_insn)
diff --git a/gcc/jump.c b/gcc/jump.c
index 3529ed6..c414c75 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -1252,8 +1252,9 @@ mark_jump_label_asm (rtx asmop, rtx insn)
    subsequent cfg_cleanup pass to delete unreachable code if needed.  */
 
 rtx_insn *
-delete_related_insns (rtx insn)
+delete_related_insns (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   int was_code_label = (LABEL_P (insn));
   rtx note;
   rtx_insn *next = NEXT_INSN (insn), *prev = PREV_INSN (insn);
@@ -1281,7 +1282,7 @@ delete_related_insns (rtx insn)
 	  && GET_CODE (PATTERN (insn)) == SEQUENCE
 	  && CALL_P (XVECEXP (PATTERN (insn), 0, 0))))
     {
-      rtx p;
+      rtx_insn *p;
 
       for (p = next && INSN_DELETED_P (next) ? NEXT_INSN (next) : next;
 	   p && NOTE_P (p);
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 9152ffe..b038527 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -4544,7 +4544,7 @@ inherit_reload_reg (bool def_p, int original_regno,
 		   "    Rejecting inheritance %d->%d "
 		   "as it results in 2 or more insns:\n",
 		   original_regno, REGNO (new_reg));
-	  dump_rtl_slim (lra_dump_file, new_insns, NULL_RTX, -1, 0);
+	  dump_rtl_slim (lra_dump_file, new_insns, NULL, -1, 0);
 	  fprintf (lra_dump_file,
 		   "	>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n");
 	}
@@ -4809,7 +4809,7 @@ split_reg (bool before_p, int original_regno, rtx_insn *insn,
 	    (lra_dump_file,
 	     "	  Rejecting split %d->%d resulting in > 2 %s save insns:\n",
 	     original_regno, REGNO (new_reg), call_save_p ? "call" : "");
-	  dump_rtl_slim (lra_dump_file, save, NULL_RTX, -1, 0);
+	  dump_rtl_slim (lra_dump_file, save, NULL, -1, 0);
 	  fprintf (lra_dump_file,
 		   "	))))))))))))))))))))))))))))))))))))))))))))))))\n");
 	}
@@ -4825,7 +4825,7 @@ split_reg (bool before_p, int original_regno, rtx_insn *insn,
 		   "	Rejecting split %d->%d "
 		   "resulting in > 2 %s restore insns:\n",
 		   original_regno, REGNO (new_reg), call_save_p ? "call" : "");
-	  dump_rtl_slim (lra_dump_file, restore, NULL_RTX, -1, 0);
+	  dump_rtl_slim (lra_dump_file, restore, NULL, -1, 0);
 	  fprintf (lra_dump_file,
 		   "	))))))))))))))))))))))))))))))))))))))))))))))))\n");
 	}
diff --git a/gcc/lra.c b/gcc/lra.c
index f16705e..911bcb0 100644
--- a/gcc/lra.c
+++ b/gcc/lra.c
@@ -1737,12 +1737,12 @@ lra_process_new_insns (rtx_insn *insn, rtx_insn *before, rtx_insn *after,
       if (before != NULL_RTX)
 	{
 	  fprintf (lra_dump_file,"    %s before:\n", title);
-	  dump_rtl_slim (lra_dump_file, before, NULL_RTX, -1, 0);
+	  dump_rtl_slim (lra_dump_file, before, NULL, -1, 0);
 	}
       if (after != NULL_RTX)
 	{
 	  fprintf (lra_dump_file, "    %s after:\n", title);
-	  dump_rtl_slim (lra_dump_file, after, NULL_RTX, -1, 0);
+	  dump_rtl_slim (lra_dump_file, after, NULL, -1, 0);
 	}
       fprintf (lra_dump_file, "\n");
     }
diff --git a/gcc/modulo-sched.c b/gcc/modulo-sched.c
index 3b62eaf..5ad484d 100644
--- a/gcc/modulo-sched.c
+++ b/gcc/modulo-sched.c
@@ -212,7 +212,7 @@ static int compute_split_row (sbitmap, int, int, int, ddg_node_ptr);
 static int sms_order_nodes (ddg_ptr, int, int *, int *);
 static void set_node_sched_params (ddg_ptr);
 static partial_schedule_ptr sms_schedule_by_order (ddg_ptr, int, int, int *);
-static void permute_partial_schedule (partial_schedule_ptr, rtx);
+static void permute_partial_schedule (partial_schedule_ptr, rtx_insn *);
 static void generate_prolog_epilog (partial_schedule_ptr, struct loop *,
                                     rtx, rtx);
 static int calculate_stage_count (partial_schedule_ptr, int);
@@ -876,7 +876,7 @@ reset_sched_times (partial_schedule_ptr ps, int amount)
    row ii-1, and position them right before LAST.  This schedules
    the insns of the loop kernel.  */
 static void
-permute_partial_schedule (partial_schedule_ptr ps, rtx last)
+permute_partial_schedule (partial_schedule_ptr ps, rtx_insn *last)
 {
   int ii = ps->ii;
   int row;
diff --git a/gcc/optabs.c b/gcc/optabs.c
index ef8941b..ddc20d7 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -177,9 +177,10 @@ optab_libfunc (optab optab, enum machine_mode mode)
    try again, ensuring that TARGET is not one of the operands.  */
 
 static int
-add_equal_note (rtx insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
+add_equal_note (rtx_insn *insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
 {
-  rtx last_insn, set;
+  rtx_insn *last_insn;
+  rtx set;
   rtx note;
 
   gcc_assert (insns && INSN_P (insns) && NEXT_INSN (insns));
@@ -1505,8 +1506,9 @@ expand_binop_directly (enum machine_mode mode, optab binoptab,
       /* If PAT is composed of more than one insn, try to add an appropriate
 	 REG_EQUAL note to it.  If we can't because TEMP conflicts with an
 	 operand, call expand_binop again, this time without a target.  */
-      if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
-	  && ! add_equal_note (pat, ops[0].value, optab_to_code (binoptab),
+      if (INSN_P (pat) && NEXT_INSN (as_a <rtx_insn *> (pat)) != NULL_RTX
+	  && ! add_equal_note (as_a <rtx_insn *> (pat), ops[0].value,
+			       optab_to_code (binoptab),
 			       ops[1].value, ops[2].value))
 	{
 	  delete_insns_since (last);
@@ -3028,8 +3030,9 @@ expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
       pat = maybe_gen_insn (icode, 2, ops);
       if (pat)
 	{
-	  if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
-	      && ! add_equal_note (pat, ops[0].value, optab_to_code (unoptab),
+	  if (INSN_P (pat) && NEXT_INSN (as_a <rtx_insn *> (pat)) != NULL_RTX
+	      && ! add_equal_note (as_a <rtx_insn *> (pat), ops[0].value,
+				   optab_to_code (unoptab),
 				   ops[1].value, NULL_RTX))
 	    {
 	      delete_insns_since (last);
@@ -3829,8 +3832,10 @@ maybe_emit_unop_insn (enum insn_code icode, rtx target, rtx op0,
   if (!pat)
     return false;
 
-  if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
-    add_equal_note (pat, ops[0].value, code, ops[1].value, NULL_RTX);
+  if (INSN_P (pat) && NEXT_INSN (as_a <rtx_insn *> (pat)) != NULL_RTX
+      && code != UNKNOWN)
+    add_equal_note (as_a <rtx_insn *> (pat), ops[0].value, code, ops[1].value,
+		    NULL_RTX);
 
   emit_insn (pat);
 
diff --git a/gcc/recog.c b/gcc/recog.c
index 32c573a..4dcb14e 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -3164,7 +3164,8 @@ static rtx
 peep2_attempt (basic_block bb, rtx insn, int match_len, rtx attempt)
 {
   int i;
-  rtx last, eh_note, as_note, before_try, x;
+  rtx_insn *last, *before_try, *x;
+  rtx eh_note, as_note;
   rtx old_insn, new_insn;
   bool was_call = false;
 
diff --git a/gcc/reorg.c b/gcc/reorg.c
index 74e2e92..b26ca8f 100644
--- a/gcc/reorg.c
+++ b/gcc/reorg.c
@@ -213,7 +213,7 @@ static rtx_insn *delete_from_delay_slot (rtx_insn *);
 static void delete_scheduled_jump (rtx);
 static void note_delay_statistics (int, int);
 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
-static rtx optimize_skip (rtx);
+static rtx_insn_list *optimize_skip (rtx_insn *);
 #endif
 static int get_jump_flags (rtx, rtx);
 static int mostly_true_jump (rtx);
@@ -765,12 +765,12 @@ note_delay_statistics (int slots_filled, int index)
    This should be expanded to skip over N insns, where N is the number
    of delay slots required.  */
 
-static rtx
-optimize_skip (rtx insn)
+static rtx_insn_list *
+optimize_skip (rtx_insn *insn)
 {
-  rtx trial = next_nonnote_insn (insn);
-  rtx next_trial = next_active_insn (trial);
-  rtx delay_list = 0;
+  rtx_insn *trial = next_nonnote_insn (insn);
+  rtx_insn *next_trial = next_active_insn (trial);
+  rtx_insn_list *delay_list = 0;
   int flags;
 
   flags = get_jump_flags (insn, JUMP_LABEL (insn));
@@ -803,7 +803,7 @@ optimize_skip (rtx insn)
 	    return 0;
 	}
 
-      delay_list = add_to_delay_list (trial, NULL_RTX);
+      delay_list = add_to_delay_list (trial, NULL);
       next_trial = next_active_insn (trial);
       update_block (trial, trial);
       delete_related_insns (trial);
diff --git a/gcc/resource.c b/gcc/resource.c
index dfd10f6..eb5374e 100644
--- a/gcc/resource.c
+++ b/gcc/resource.c
@@ -79,10 +79,10 @@ static HARD_REG_SET pending_dead_regs;
 \f
 static void update_live_status (rtx, const_rtx, void *);
 static int find_basic_block (rtx, int);
-static rtx next_insn_no_annul (rtx);
-static rtx find_dead_or_set_registers (rtx, struct resources*,
-				       rtx*, int, struct resources,
-				       struct resources);
+static rtx_insn *next_insn_no_annul (rtx_insn *);
+static rtx_insn *find_dead_or_set_registers (rtx_insn *, struct resources*,
+					     rtx_insn **, int, struct resources,
+					     struct resources);
 \f
 /* Utility function called from mark_target_live_regs via note_stores.
    It deadens any CLOBBERed registers and livens any SET registers.  */
@@ -163,8 +163,8 @@ find_basic_block (rtx insn, int search_limit)
 /* Similar to next_insn, but ignores insns in the delay slots of
    an annulled branch.  */
 
-static rtx
-next_insn_no_annul (rtx insn)
+static rtx_insn *
+next_insn_no_annul (rtx_insn *insn)
 {
   if (insn)
     {
@@ -187,7 +187,7 @@ next_insn_no_annul (rtx insn)
       insn = NEXT_INSN (insn);
       if (insn && NONJUMP_INSN_P (insn)
 	  && GET_CODE (PATTERN (insn)) == SEQUENCE)
-	insn = XVECEXP (PATTERN (insn), 0, 0);
+	insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
     }
 
   return insn;
@@ -308,7 +308,7 @@ mark_referenced_resources (rtx x, struct resources *res,
 	     However, we may have moved some of the parameter loading insns
 	     into the delay slot of this CALL.  If so, the USE's for them
 	     don't count and should be skipped.  */
-	  rtx_insn *insn = PREV_INSN (x);
+	  rtx_insn *insn = PREV_INSN (as_a <rtx_insn *> (x));
 	  rtx_sequence *sequence = 0;
 	  int seq_size = 0;
 	  int i;
@@ -420,19 +420,19 @@ mark_referenced_resources (rtx x, struct resources *res,
    Stop after passing a few conditional jumps, and/or a small
    number of unconditional branches.  */
 
-static rtx
-find_dead_or_set_registers (rtx target, struct resources *res,
-			    rtx *jump_target, int jump_count,
+static rtx_insn *
+find_dead_or_set_registers (rtx_insn *target, struct resources *res,
+			    rtx_insn **jump_target, int jump_count,
 			    struct resources set, struct resources needed)
 {
   HARD_REG_SET scratch;
-  rtx insn, next;
-  rtx jump_insn = 0;
+  rtx_insn *insn, *next;
+  rtx_insn *jump_insn = 0;
   int i;
 
   for (insn = target; insn; insn = next)
     {
-      rtx this_jump_insn = insn;
+      rtx_insn *this_jump_insn = insn;
 
       next = NEXT_INSN (insn);
 
@@ -480,7 +480,7 @@ find_dead_or_set_registers (rtx target, struct resources *res,
 		 of a call, so search for a JUMP_INSN in any position.  */
 	      for (i = 0; i < seq->len (); i++)
 		{
-		  this_jump_insn = seq->element (i);
+		  this_jump_insn = seq->insn (i);
 		  if (JUMP_P (this_jump_insn))
 		    break;
 		}
@@ -497,14 +497,14 @@ find_dead_or_set_registers (rtx target, struct resources *res,
 	      if (any_uncondjump_p (this_jump_insn)
 		  || ANY_RETURN_P (PATTERN (this_jump_insn)))
 		{
-		  next = JUMP_LABEL (this_jump_insn);
+		  next = JUMP_LABEL_AS_INSN (this_jump_insn);
 		  if (ANY_RETURN_P (next))
-		    next = NULL_RTX;
+		    next = NULL;
 		  if (jump_insn == 0)
 		    {
 		      jump_insn = insn;
 		      if (jump_target)
-			*jump_target = JUMP_LABEL (this_jump_insn);
+			*jump_target = JUMP_LABEL_AS_INSN (this_jump_insn);
 		    }
 		}
 	      else if (any_condjump_p (this_jump_insn))
@@ -569,7 +569,7 @@ find_dead_or_set_registers (rtx target, struct resources *res,
 		  AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
 
 		  if (!ANY_RETURN_P (JUMP_LABEL (this_jump_insn)))
-		    find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
+		    find_dead_or_set_registers (JUMP_LABEL_AS_INSN (this_jump_insn),
 						&target_res, 0, jump_count,
 						target_set, needed);
 		  find_dead_or_set_registers (next,
@@ -880,14 +880,14 @@ return_insn_p (const_rtx insn)
    init_resource_info () was invoked before we are called.  */
 
 void
-mark_target_live_regs (rtx insns, rtx target, struct resources *res)
+mark_target_live_regs (rtx_insn *insns, rtx_insn *target, struct resources *res)
 {
   int b = -1;
   unsigned int i;
   struct target_info *tinfo = NULL;
-  rtx insn;
+  rtx_insn *insn;
   rtx jump_insn = 0;
-  rtx jump_target;
+  rtx_insn *jump_target;
   HARD_REG_SET scratch;
   struct resources set, needed;
 
@@ -965,7 +965,7 @@ mark_target_live_regs (rtx insns, rtx target, struct resources *res)
   if (b != -1)
     {
       regset regs_live = DF_LR_IN (BASIC_BLOCK_FOR_FN (cfun, b));
-      rtx start_insn, stop_insn;
+      rtx_insn *start_insn, *stop_insn;
 
       /* Compute hard regs live at start of block.  */
       REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
@@ -978,7 +978,7 @@ mark_target_live_regs (rtx insns, rtx target, struct resources *res)
 
       if (NONJUMP_INSN_P (start_insn)
 	  && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
-	start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
+	start_insn = as_a <rtx_sequence *> (PATTERN (start_insn))->insn (0);
 
       if (NONJUMP_INSN_P (stop_insn)
 	  && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
@@ -1122,7 +1122,7 @@ mark_target_live_regs (rtx insns, rtx target, struct resources *res)
   if (jump_insn)
     {
       struct resources new_resources;
-      rtx stop_insn = next_active_insn (jump_insn);
+      rtx_insn *stop_insn = next_active_insn (jump_insn);
 
       if (!ANY_RETURN_P (jump_target))
 	jump_target = next_active_insn (jump_target);
diff --git a/gcc/resource.h b/gcc/resource.h
index a1a1f34..633d1ab 100644
--- a/gcc/resource.h
+++ b/gcc/resource.h
@@ -44,7 +44,7 @@ enum mark_resource_type
   MARK_SRC_DEST_CALL = 1
 };
 
-extern void mark_target_live_regs (rtx, rtx, struct resources *);
+extern void mark_target_live_regs (rtx_insn *, rtx_insn *, struct resources *);
 extern void mark_set_resources (rtx, struct resources *, int,
 				enum mark_resource_type);
 extern void mark_referenced_resources (rtx, struct resources *, bool);
diff --git a/gcc/rtl.h b/gcc/rtl.h
index f34a3bd..4e1410a 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2800,8 +2800,8 @@ extern bool can_throw_external (const_rtx);
 extern bool insn_could_throw_p (const_rtx);
 extern bool insn_nothrow_p (const_rtx);
 extern bool can_nonlocal_goto (const_rtx);
-extern void copy_reg_eh_region_note_forward (rtx, rtx, rtx);
-extern void copy_reg_eh_region_note_backward (rtx, rtx, rtx);
+extern void copy_reg_eh_region_note_forward (rtx, rtx_insn *, rtx);
+extern void copy_reg_eh_region_note_backward (rtx, rtx_insn *, rtx);
 extern int inequality_comparisons_p (const_rtx);
 extern rtx replace_rtx (rtx, rtx, rtx);
 extern int replace_label (rtx *, void *);
@@ -3291,7 +3291,7 @@ extern void pop_topmost_sequence (void);
 extern void set_new_first_and_last_insn (rtx_insn *, rtx_insn *);
 extern unsigned int unshare_all_rtl (void);
 extern void unshare_all_rtl_again (rtx_insn *);
-extern void unshare_all_rtl_in_chain (rtx);
+extern void unshare_all_rtl_in_chain (rtx_insn *);
 extern void verify_rtl_sharing (void);
 extern void add_insn (rtx_insn *);
 extern void add_insn_before (rtx, rtx, basic_block);
@@ -3350,7 +3350,8 @@ extern void print_inline_rtx (FILE *, const_rtx, int);
    by the scheduler anymore but for all "slim" RTL dumping.  */
 extern void dump_value_slim (FILE *, const_rtx, int);
 extern void dump_insn_slim (FILE *, const_rtx);
-extern void dump_rtl_slim (FILE *, const_rtx, const_rtx, int, int);
+extern void dump_rtl_slim (FILE *, const rtx_insn *, const rtx_insn *,
+			   int, int);
 extern void print_value (pretty_printer *, const_rtx, int);
 extern void print_pattern (pretty_printer *, const_rtx, int);
 extern void print_insn (pretty_printer *, const_rtx, int);
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index cbc1814..e922a96 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -3848,10 +3848,10 @@ delete_dep_nodes_in_back_deps (rtx insn, bool resolved_p)
 /* Delete (RESOLVED_P) dependencies between HEAD and TAIL together with
    deps_lists.  */
 void
-sched_free_deps (rtx head, rtx tail, bool resolved_p)
+sched_free_deps (rtx_insn *head, rtx_insn *tail, bool resolved_p)
 {
-  rtx insn;
-  rtx next_tail = NEXT_INSN (tail);
+  rtx_insn *insn;
+  rtx_insn *next_tail = NEXT_INSN (tail);
 
   /* We make two passes since some insns may be scheduled before their
      dependencies are resolved.  */
diff --git a/gcc/sched-ebb.c b/gcc/sched-ebb.c
index f502668..c3be721 100644
--- a/gcc/sched-ebb.c
+++ b/gcc/sched-ebb.c
@@ -116,8 +116,8 @@ static void
 init_ready_list (void)
 {
   int n = 0;
-  rtx prev_head = current_sched_info->prev_head;
-  rtx next_tail = current_sched_info->next_tail;
+  rtx_insn *prev_head = current_sched_info->prev_head;
+  rtx_insn *next_tail = current_sched_info->next_tail;
   rtx_insn *insn;
 
   sched_rgn_n_insns = 0;
@@ -189,7 +189,7 @@ begin_move_insn (rtx_insn *insn, rtx_insn *last)
       else
 	{
 	  /* Create an empty unreachable block after the INSN.  */
-	  rtx next = NEXT_INSN (insn);
+	  rtx_insn *next = NEXT_INSN (insn);
 	  if (next && BARRIER_P (next))
 	    next = NEXT_INSN (next);
 	  bb = create_basic_block (next, NULL_RTX, last_bb);
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index a19d776..bbf332a 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -1328,7 +1328,7 @@ extern void deps_start_bb (struct deps_desc *, rtx);
 extern enum reg_note ds_to_dt (ds_t);
 
 extern bool deps_pools_are_empty_p (void);
-extern void sched_free_deps (rtx, rtx, bool);
+extern void sched_free_deps (rtx_insn *, rtx_insn *, bool);
 extern void extend_dependency_caches (int, bool);
 
 extern void debug_ds (ds_t);
@@ -1342,14 +1342,14 @@ extern void free_global_sched_pressure_data (void);
 extern int haifa_classify_insn (const_rtx);
 extern void get_ebb_head_tail (basic_block, basic_block,
 			       rtx_insn **, rtx_insn **);
-extern int no_real_insns_p (const_rtx, const_rtx);
+extern int no_real_insns_p (const rtx_insn *, const rtx_insn *);
 
 extern int insn_cost (rtx_insn *);
 extern int dep_cost_1 (dep_t, dw_t);
 extern int dep_cost (dep_t);
 extern int set_priorities (rtx_insn *, rtx_insn *);
 
-extern void sched_setup_bb_reg_pressure_info (basic_block, rtx);
+extern void sched_setup_bb_reg_pressure_info (basic_block, rtx_insn *);
 extern bool schedule_block (basic_block *, state_t);
 
 extern int cycle_issued_insns;
diff --git a/gcc/sched-rgn.c b/gcc/sched-rgn.c
index 93bebc9..509a224 100644
--- a/gcc/sched-rgn.c
+++ b/gcc/sched-rgn.c
@@ -2107,8 +2107,8 @@ schedule_more_p (void)
 static void
 init_ready_list (void)
 {
-  rtx prev_head = current_sched_info->prev_head;
-  rtx next_tail = current_sched_info->next_tail;
+  rtx_insn *prev_head = current_sched_info->prev_head;
+  rtx_insn *next_tail = current_sched_info->next_tail;
   int bb_src;
   rtx_insn *insn;
 
diff --git a/gcc/sched-vis.c b/gcc/sched-vis.c
index bcce40d..1dca799 100644
--- a/gcc/sched-vis.c
+++ b/gcc/sched-vis.c
@@ -816,14 +816,14 @@ dump_insn_slim (FILE *f, const_rtx x)
    If COUNT < 0 it will stop only at LAST or NULL rtx.  */
 
 void
-dump_rtl_slim (FILE *f, const_rtx first, const_rtx last,
+dump_rtl_slim (FILE *f, const rtx_insn *first, const rtx_insn *last,
 	       int count, int flags ATTRIBUTE_UNUSED)
 {
-  const_rtx insn, tail;
+  const rtx_insn *insn, *tail;
   pretty_printer rtl_slim_pp;
   rtl_slim_pp.buffer->stream = f;
 
-  tail = last ? NEXT_INSN (last) : NULL_RTX;
+  tail = last ? NEXT_INSN (last) : NULL;
   for (insn = first;
        (insn != NULL) && (insn != tail) && (count != 0);
        insn = NEXT_INSN (insn))
@@ -842,7 +842,7 @@ dump_rtl_slim (FILE *f, const_rtx first, const_rtx last,
 void
 rtl_dump_bb_for_graph (pretty_printer *pp, basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
   bool first = true;
 
   /* TODO: inter-bb stuff.  */
@@ -882,9 +882,11 @@ debug_insn_slim (const_rtx x)
 }
 
 /* Same as above, but using dump_rtl_slim.  */
-extern void debug_rtl_slim (FILE *, const_rtx, const_rtx, int, int);
+extern void debug_rtl_slim (FILE *, const rtx_insn *, const rtx_insn *,
+			    int, int);
 DEBUG_FUNCTION void
-debug_rtl_slim (const_rtx first, const_rtx last, int count, int flags)
+debug_rtl_slim (const rtx_insn *first, const rtx_insn *last, int count,
+		int flags)
 {
   dump_rtl_slim (stderr, first, last, count, flags);
 }
diff --git a/gcc/shrink-wrap.c b/gcc/shrink-wrap.c
index 2710d98..fd24135 100644
--- a/gcc/shrink-wrap.c
+++ b/gcc/shrink-wrap.c
@@ -428,13 +428,13 @@ dup_block_and_redirect (basic_block bb, basic_block copy_bb, rtx_insn *before,
 
 void
 try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
-		     bitmap_head *bb_flags, rtx prologue_seq)
+		     bitmap_head *bb_flags, rtx_insn *prologue_seq)
 {
   edge e;
   edge_iterator ei;
   bool nonempty_prologue = false;
   unsigned max_grow_size;
-  rtx seq;
+  rtx_insn *seq;
 
   for (seq = prologue_seq; seq; seq = NEXT_INSN (seq))
     if (!NOTE_P (seq) || NOTE_KIND (seq) != NOTE_INSN_PROLOGUE_END)
@@ -449,7 +449,7 @@ try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
     {
       HARD_REG_SET prologue_clobbered, prologue_used, live_on_edge;
       struct hard_reg_set_container set_up_by_prologue;
-      rtx p_insn;
+      rtx_insn *p_insn;
       vec<basic_block> vec;
       basic_block bb;
       bitmap_head bb_antic_flags;
@@ -831,7 +831,7 @@ get_unconverted_simple_return (edge exit_fallthru_edge, bitmap_head bb_flags,
 
 void
 convert_to_simple_return (edge entry_edge, edge orig_entry_edge,
-			  bitmap_head bb_flags, rtx returnjump,
+			  bitmap_head bb_flags, rtx_insn *returnjump,
 			  vec<edge> unconverted_simple_returns)
 {
   edge e;
diff --git a/gcc/shrink-wrap.h b/gcc/shrink-wrap.h
index 66bd26d..647c076 100644
--- a/gcc/shrink-wrap.h
+++ b/gcc/shrink-wrap.h
@@ -40,11 +40,12 @@ extern void dup_block_and_redirect (basic_block bb, basic_block copy_bb,
 				    rtx_insn *before,
 				    bitmap_head *need_prologue);
 extern void try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
-				 bitmap_head *bb_flags, rtx prologue_seq);
+				 bitmap_head *bb_flags, rtx_insn *prologue_seq);
 extern edge get_unconverted_simple_return (edge, bitmap_head,
 					   vec<edge> *, rtx_insn **);
 extern void convert_to_simple_return (edge entry_edge, edge orig_entry_edge,
-				      bitmap_head bb_flags, rtx returnjump,
+				      bitmap_head bb_flags,
+				      rtx_insn *returnjump,
 				      vec<edge> unconverted_simple_returns);
 #endif
 
diff --git a/gcc/valtrack.c b/gcc/valtrack.c
index aef38a5..66d0d8a 100644
--- a/gcc/valtrack.c
+++ b/gcc/valtrack.c
@@ -177,7 +177,7 @@ propagate_for_debug_subst (rtx from, const_rtx old_rtx, void *data)
    of THIS_BASIC_BLOCK.  */
 
 void
-propagate_for_debug (rtx_insn *insn, rtx last, rtx dest, rtx src,
+propagate_for_debug (rtx_insn *insn, rtx_insn *last, rtx dest, rtx src,
 		     basic_block this_basic_block)
 {
   rtx_insn *next, *end = NEXT_INSN (BB_END (this_basic_block));
diff --git a/gcc/valtrack.h b/gcc/valtrack.h
index 60dcad5..d8b8bb8 100644
--- a/gcc/valtrack.h
+++ b/gcc/valtrack.h
@@ -149,7 +149,7 @@ extern int dead_debug_insert_temp (struct dead_debug_local *,
 				   unsigned int uregno, rtx insn,
 				   enum debug_temp_where);
 
-extern void propagate_for_debug (rtx_insn *, rtx, rtx, rtx, basic_block);
+extern void propagate_for_debug (rtx_insn *, rtx_insn *, rtx, rtx, basic_block);
 
 
 #endif /* GCC_VALTRACK_H */

Re: [PATCH 225/236] Work towards NEXT_INSN/PREV_INSN requiring insns as their params

[Richard Henderson]

On 08/26/2014 10:15 AM, David Malcolm wrote:
> Attached is a revised version of #225, with the following changes:
> 
> * fix for the above: avoid introducing a new shadow name "note" within
> force_nonfallthru_and_redirect by introducing a new local rtx_insn *
> "new_head" and renaming "note" to it in the appropriate places.
> 
> * changed an as_a<> to a safe_as_a<> within
> function.c:thread_prologue_and_epilogue_insns to fix a segfault seen
> during an earlier bootstrap
> 
> Successfully bootstrapped on x86_64 (Fedora 20), on top of the rest of
> the patches leading up to it (including the revised ones for #220-#221
> that rth recently approved).

Ok.


r~

Re: [PATCH 225/236] Work towards NEXT_INSN/PREV_INSN requiring insns as their params

[H.J. Lu]

On Tue, Aug 26, 2014 at 10:15 AM, David Malcolm <dmalcolm@redhat.com> wrote:
> On Mon, 2014-08-25 at 08:25 -0600, Jeff Law wrote:
>> On 08/19/14 15:35, David Malcolm wrote:
>> > On Tue, 2014-08-19 at 13:57 -0700, Richard Henderson wrote:
>> >> On 08/06/2014 10:23 AM, David Malcolm wrote:
>> >>> diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
>> >>> index 59d633d..5e42a97 100644
>> >>> --- a/gcc/cfgrtl.c
>> >>> +++ b/gcc/cfgrtl.c
>> >>> @@ -1604,6 +1604,7 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
>> >>>
>> >>>     if (EDGE_COUNT (e->src->succs) >= 2 || abnormal_edge_flags || asm_goto_edge)
>> >>>       {
>> >>> +      rtx_insn *note;
>> >>>         gcov_type count = e->count;
>> >>>         int probability = e->probability;
>> >>>         /* Create the new structures.  */
>> >>
>> >> A new variable with no uses?
>> >
>> > This one is quite ugly: the pre-existing code has two locals named
>> > "note", both of type rtx, with one shadowing the other.  This patch
>> > introduces a third, within the scope where the name "note" is used for
>> > insns.  In the other scopes the two other "note" variables are used for
>> > find_reg_note.  In each case, the name "note" is written to before use.
>> >
>> > So in my defense, the existing code already had shadowing of locals...
>> > but I guess that's not much of a defense, and it would be better to
>> > introduce a different name, and rename the uses in the appropriate
>> > scope.
>> If it's reasonable to do this now, then please do so.  Else make it a
>> follow-up item.  I guess we should have had a list of follow-up items :-)
>>
>> jeff
>
> Attached is a revised version of #225, with the following changes:
>
> * fix for the above: avoid introducing a new shadow name "note" within
> force_nonfallthru_and_redirect by introducing a new local rtx_insn *
> "new_head" and renaming "note" to it in the appropriate places.
>
> * changed an as_a<> to a safe_as_a<> within
> function.c:thread_prologue_and_epilogue_insns to fix a segfault seen
> during an earlier bootstrap
>
> Successfully bootstrapped on x86_64 (Fedora 20), on top of the rest of
> the patches leading up to it (including the revised ones for #220-#221
> that rth recently approved).
>
> OK for trunk?
> Dave

One of your changes caused:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62300

-- 
H.J.

Re: [PATCH 225/236] Work towards NEXT_INSN/PREV_INSN requiring insns as their params

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 2587 bytes --]

On Thu, 2014-08-28 at 17:08 -0700, H.J. Lu wrote:
> On Tue, Aug 26, 2014 at 10:15 AM, David Malcolm <dmalcolm@redhat.com> wrote:
> > On Mon, 2014-08-25 at 08:25 -0600, Jeff Law wrote:
> >> On 08/19/14 15:35, David Malcolm wrote:
> >> > On Tue, 2014-08-19 at 13:57 -0700, Richard Henderson wrote:
> >> >> On 08/06/2014 10:23 AM, David Malcolm wrote:
> >> >>> diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
> >> >>> index 59d633d..5e42a97 100644
> >> >>> --- a/gcc/cfgrtl.c
> >> >>> +++ b/gcc/cfgrtl.c
> >> >>> @@ -1604,6 +1604,7 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
> >> >>>
> >> >>>     if (EDGE_COUNT (e->src->succs) >= 2 || abnormal_edge_flags || asm_goto_edge)
> >> >>>       {
> >> >>> +      rtx_insn *note;
> >> >>>         gcov_type count = e->count;
> >> >>>         int probability = e->probability;
> >> >>>         /* Create the new structures.  */
> >> >>
> >> >> A new variable with no uses?
> >> >
> >> > This one is quite ugly: the pre-existing code has two locals named
> >> > "note", both of type rtx, with one shadowing the other.  This patch
> >> > introduces a third, within the scope where the name "note" is used for
> >> > insns.  In the other scopes the two other "note" variables are used for
> >> > find_reg_note.  In each case, the name "note" is written to before use.
> >> >
> >> > So in my defense, the existing code already had shadowing of locals...
> >> > but I guess that's not much of a defense, and it would be better to
> >> > introduce a different name, and rename the uses in the appropriate
> >> > scope.
> >> If it's reasonable to do this now, then please do so.  Else make it a
> >> follow-up item.  I guess we should have had a list of follow-up items :-)
> >>
> >> jeff
> >
> > Attached is a revised version of #225, with the following changes:
> >
> > * fix for the above: avoid introducing a new shadow name "note" within
> > force_nonfallthru_and_redirect by introducing a new local rtx_insn *
> > "new_head" and renaming "note" to it in the appropriate places.
> >
> > * changed an as_a<> to a safe_as_a<> within
> > function.c:thread_prologue_and_epilogue_insns to fix a segfault seen
> > during an earlier bootstrap
> >
> > Successfully bootstrapped on x86_64 (Fedora 20), on top of the rest of
> > the patches leading up to it (including the revised ones for #220-#221
> > that rth recently approved).
> >
> > OK for trunk?
> > Dave
> 
> One of your changes caused:
> 
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62300

Sorry about this; candidate patch attached; attempted bootstrap in
progress.

[-- Attachment #2: fix-for-PR62300.patch --]
[-- Type: text/x-patch, Size: 1131 bytes --]

Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214708)
+++ gcc/ChangeLog	(working copy)
@@ -1,5 +1,12 @@
 2014-08-28  David Malcolm  <dmalcolm@redhat.com>
 
+	PR bootstrap/62300
+	* function.c (assign_parm_setup_reg): Remove erroneous checked
+	cast to rtx_insn * on result of gen_extend_insn in favor of
+	introducing a new local rtx "pat".
+
+2014-08-28  David Malcolm  <dmalcolm@redhat.com>
+
 	* rtl.h (previous_insn): Strengthen param from rtx to rtx_insn *.
 	(next_insn): Likewise.
 	* emit-rtl.c (next_insn): Likewise.
Index: gcc/function.c
===================================================================
--- gcc/function.c	(revision 214704)
+++ gcc/function.c	(working copy)
@@ -3039,10 +3039,9 @@
 	    }
 	  else
 	    t = op1;
-	  insn = as_a <rtx_insn *> (
-		   gen_extend_insn (op0, t, promoted_nominal_mode,
-				    data->passed_mode, unsignedp));
-	  emit_insn (insn);
+	  rtx pat = gen_extend_insn (op0, t, promoted_nominal_mode,
+				     data->passed_mode, unsignedp);
+	  emit_insn (pat);
 	  insns = get_insns ();
 
 	  moved = true;

Re: [PATCH 225/236] Work towards NEXT_INSN/PREV_INSN requiring insns as their params

[Richard Henderson]

On 08/28/2014 05:47 PM, David Malcolm wrote:
> -	  insn = as_a <rtx_insn *> (
> -		   gen_extend_insn (op0, t, promoted_nominal_mode,
> -				    data->passed_mode, unsignedp));
> -	  emit_insn (insn);
> +	  rtx pat = gen_extend_insn (op0, t, promoted_nominal_mode,
> +				     data->passed_mode, unsignedp);
> +	  emit_insn (pat);

Certainly ok.


r~

[PATCH 156/236] PHASE 4: Removal of scaffolding

[David Malcolm]

/
	* rtx-classes-status.txt: Update.
---
 rtx-classes-status.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index b22cb1e..90d6efd 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -3,8 +3,8 @@ exists to be modified by marker commits.
 
 Phase 1: initial "scaffolding" commits:            DONE
 Phase 2: per-file commits in main source dir:      DONE
-Phase 3: per-file commits within "config" subdirs: IN PROGRESS
-Phase 4: removal of "scaffolding":                 TODO
+Phase 3: per-file commits within "config" subdirs: DONE
+Phase 4: removal of "scaffolding":                 IN PROGRESS
 Phase 5: additional rtx_def subclasses:            TODO
 Phase 6: use extra rtx_def subclasses:             TODO
 
-- 
1.8.5.3

Re: [PATCH 156/236] PHASE 4: Removal of scaffolding

[Jeff Law]

On 08/06/14 11:22, David Malcolm wrote:
> /
> 	* rtx-classes-status.txt: Update.
> ---
>   rtx-classes-status.txt | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
> index b22cb1e..90d6efd 100644
> --- a/rtx-classes-status.txt
> +++ b/rtx-classes-status.txt
> @@ -3,8 +3,8 @@ exists to be modified by marker commits.
>
>   Phase 1: initial "scaffolding" commits:            DONE
>   Phase 2: per-file commits in main source dir:      DONE
> -Phase 3: per-file commits within "config" subdirs: IN PROGRESS
> -Phase 4: removal of "scaffolding":                 TODO
> +Phase 3: per-file commits within "config" subdirs: DONE
> +Phase 4: removal of "scaffolding":                 IN PROGRESS
>   Phase 5: additional rtx_def subclasses:            TODO
>   Phase 6: use extra rtx_def subclasses:             TODO
OK.

As are patches #157-#168

Patch #160's ChangeLog is  bit goofy in that it's unclear (to the reader 
without context) what the "Likewise" refers to for the function.c 
changes.  I'll assume you'll fix that up appropriately.

Jeff

Re: [PATCH 156/236] PHASE 4: Removal of scaffolding

[David Malcolm]

On Thu, 2014-08-14 at 23:30 -0600, Jeff Law wrote:
> On 08/06/14 11:22, David Malcolm wrote:
> > /
> > 	* rtx-classes-status.txt: Update.
> > ---
> >   rtx-classes-status.txt | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
> > index b22cb1e..90d6efd 100644
> > --- a/rtx-classes-status.txt
> > +++ b/rtx-classes-status.txt
> > @@ -3,8 +3,8 @@ exists to be modified by marker commits.
> >
> >   Phase 1: initial "scaffolding" commits:            DONE
> >   Phase 2: per-file commits in main source dir:      DONE
> > -Phase 3: per-file commits within "config" subdirs: IN PROGRESS
> > -Phase 4: removal of "scaffolding":                 TODO
> > +Phase 3: per-file commits within "config" subdirs: DONE
> > +Phase 4: removal of "scaffolding":                 IN PROGRESS
> >   Phase 5: additional rtx_def subclasses:            TODO
> >   Phase 6: use extra rtx_def subclasses:             TODO
> OK.
> 
> As are patches #157-#168
> 
> Patch #160's ChangeLog is  bit goofy in that it's unclear (to the reader 
> without context) what the "Likewise" refers to for the function.c 
> changes.  I'll assume you'll fix that up appropriately.

Oops, yes; I think I either merged or reordered the hunks in the
ChangeLog, and a "Likewise" ended up *before* the thing it was referring
to.  Will fixup.

[PATCH 209/236] sched-vis.c: Use rtx_sequence

[David Malcolm]

gcc/
	* sched-vis.c (print_pattern): Within SEQUENCE case, introduce a
	local "seq" via a checked cast, and use methods of rtx_sequence
	to simplify the code.
---
 gcc/sched-vis.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/gcc/sched-vis.c b/gcc/sched-vis.c
index 6f89e08..ead6b4e 100644
--- a/gcc/sched-vis.c
+++ b/gcc/sched-vis.c
@@ -578,8 +578,9 @@ print_pattern (pretty_printer *pp, const_rtx x, int verbose)
       break;
     case SEQUENCE:
       {
+	const rtx_sequence *seq = as_a <const rtx_sequence *> (x);
 	pp_string (pp, "sequence{");
-	if (INSN_P (XVECEXP (x, 0, 0)))
+	if (INSN_P (seq->element (0)))
 	  {
 	    /* Print the sequence insns indented.  */
 	    const char * save_print_rtx_head = print_rtx_head;
@@ -591,16 +592,16 @@ print_pattern (pretty_printer *pp, const_rtx x, int verbose)
 		      sizeof (indented_print_rtx_head),
 		      "%s     ", print_rtx_head);
 	    print_rtx_head = indented_print_rtx_head;
-	    for (int i = 0; i < XVECLEN (x, 0); i++)
-	      print_insn_with_notes (pp, XVECEXP (x, 0, i));
+	    for (int i = 0; i < seq->len (); i++)
+	      print_insn_with_notes (pp, seq->insn (i));
 	    pp_printf (pp, "%s      ", save_print_rtx_head);
 	    print_rtx_head = save_print_rtx_head;
 	  }
 	else
 	  {
-	    for (int i = 0; i < XVECLEN (x, 0); i++)
+	    for (int i = 0; i < seq->len (); i++)
 	      {
-		print_pattern (pp, XVECEXP (x, 0, i), verbose);
+		print_pattern (pp, seq->element (i), verbose);
 		pp_semicolon (pp);
 	      }
 	  }
-- 
1.8.5.3

[PATCH 215/236] Use rtx_expr_list in various places

[David Malcolm]

gcc/
	* rtl.h (free_EXPR_LIST_list): Strengthen param from rtx * to
	rtx_expr_list **.
	(alloc_EXPR_LIST): Strengthen return type from rtx to
	rtx_expr_list *.
	(remove_free_EXPR_LIST_node): Likewise for param.
	* reload.h (struct reg_equivs_t): Strengthen field "alt_mem_list"
	from rtx to rtx_expr_list *.
	* sched-int.h (struct deps_desc): Strengthen fields
	"pending_read_mems" and "pending_write_mems" from rtx to
	rtx_expr_list *.

	* dwarf2out.c (decl_piece_varloc_ptr): Strengthen return type from
	rtx to rtx_expr_list *.
	* lists.c (alloc_INSN_LIST): Likewise, also for local "r".
	(free_EXPR_LIST_list): Strengthen param "listp" from rtx * to
	rtx_expr_list **.
	(remove_free_EXPR_LIST_node): Likewise.  Strengthen local "node"
	from rtx to rtx_expr_list *.
	* loop-iv.c (simplify_using_initial_values): Strengthen local
	"cond_list" from rtx to rtx_expr_list *, and locals "pnode",
	"pnote_next" from rtx * to rtx_expr_list **.
	* sched-deps.c (remove_from_both_dependence_lists):  Strengthen
	param "exprp" from rtx * to rtx_expr_list **.
	(add_insn_mem_dependence): Strengthen local "mem_list" from
	rtx * to rtx_expr_list **.  Strengthen local "mem_node" from rtx
	to rtx_expr_list *.
	* sched-rgn.c (concat_insn_mem_list): Strengthen param "copy_mems"
	and local "new_mems" from rtx to rtx_expr_list *.  Strengthen
	param "old_mems_p" from rtx * to rtx_expr_list **.
	* var-tracking.c (struct adjust_mem_data): Strengthen field
	"side_effects" from rtx to rtx_expr_list *.
	(adjust_insn): Replace NULL_RTX with NULL when assigning to
	rtx_expr_list *.
	(prepare_call_arguments): Likewise.
---
 gcc/dwarf2out.c    |  2 +-
 gcc/lists.c        | 16 ++++++++--------
 gcc/loop-iv.c      | 13 +++++++------
 gcc/reload.h       |  2 +-
 gcc/rtl.h          |  6 +++---
 gcc/sched-deps.c   |  8 ++++----
 gcc/sched-int.h    |  4 ++--
 gcc/sched-rgn.c    | 15 ++++++++-------
 gcc/var-tracking.c |  6 +++---
 9 files changed, 37 insertions(+), 35 deletions(-)

diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
index 92f5c83..618b646 100644
--- a/gcc/dwarf2out.c
+++ b/gcc/dwarf2out.c
@@ -5019,7 +5019,7 @@ decl_piece_varloc_ptr (rtx piece)
 /* Create an EXPR_LIST for location note LOC_NOTE covering BITSIZE bits.
    Next is the chain of following piece nodes.  */
 
-static rtx
+static rtx_expr_list *
 decl_piece_node (rtx loc_note, HOST_WIDE_INT bitsize, rtx next)
 {
   if (bitsize <= (int) MAX_MACHINE_MODE)
diff --git a/gcc/lists.c b/gcc/lists.c
index 5e07880..78556be 100644
--- a/gcc/lists.c
+++ b/gcc/lists.c
@@ -125,14 +125,14 @@ alloc_INSN_LIST (rtx val, rtx next)
 /* This call is used in place of a gen_rtx_EXPR_LIST. If there is a cached
    node available, we'll use it, otherwise a call to gen_rtx_EXPR_LIST
    is made.  */
-rtx
+rtx_expr_list *
 alloc_EXPR_LIST (int kind, rtx val, rtx next)
 {
-  rtx r;
+  rtx_expr_list *r;
 
   if (unused_expr_list)
     {
-      r = unused_expr_list;
+      r = as_a <rtx_expr_list *> (unused_expr_list);
       unused_expr_list = XEXP (r, 1);
       XEXP (r, 0) = val;
       XEXP (r, 1) = next;
@@ -146,11 +146,11 @@ alloc_EXPR_LIST (int kind, rtx val, rtx next)
 
 /* This function will free up an entire list of EXPR_LIST nodes.  */
 void
-free_EXPR_LIST_list (rtx *listp)
+free_EXPR_LIST_list (rtx_expr_list **listp)
 {
   if (*listp == 0)
     return;
-  free_list (listp, &unused_expr_list);
+  free_list ((rtx *)listp, &unused_expr_list);
 }
 
 /* This function will free up an entire list of INSN_LIST nodes.  */
@@ -233,12 +233,12 @@ remove_free_INSN_LIST_node (rtx_insn_list **listp)
 
 /* Remove and free the first node in the EXPR_LIST pointed to by LISTP.  */
 rtx
-remove_free_EXPR_LIST_node (rtx *listp)
+remove_free_EXPR_LIST_node (rtx_expr_list **listp)
 {
-  rtx node = *listp;
+  rtx_expr_list *node = *listp;
   rtx elem = XEXP (node, 0);
 
-  remove_list_node (listp);
+  remove_list_node ((rtx *)listp);
   free_EXPR_LIST_node (node);
 
   return elem;
diff --git a/gcc/loop-iv.c b/gcc/loop-iv.c
index 74e38e1..30dafd8 100644
--- a/gcc/loop-iv.c
+++ b/gcc/loop-iv.c
@@ -1872,7 +1872,8 @@ static void
 simplify_using_initial_values (struct loop *loop, enum rtx_code op, rtx *expr)
 {
   bool expression_valid;
-  rtx head, tail, cond_list, last_valid_expr;
+  rtx head, tail, last_valid_expr;
+  rtx_expr_list *cond_list;
   rtx_insn *insn;
   rtx neutral, aggr;
   regset altered, this_altered;
@@ -1950,7 +1951,7 @@ simplify_using_initial_values (struct loop *loop, enum rtx_code op, rtx *expr)
 
   expression_valid = true;
   last_valid_expr = *expr;
-  cond_list = NULL_RTX;
+  cond_list = NULL;
   while (1)
     {
       insn = BB_END (e->src);
@@ -2002,7 +2003,7 @@ simplify_using_initial_values (struct loop *loop, enum rtx_code op, rtx *expr)
 
 	  if (suitable_set_for_replacement (insn, &dest, &src))
 	    {
-	      rtx *pnote, *pnote_next;
+	      rtx_expr_list **pnote, **pnote_next;
 
 	      replace_in_expr (expr, dest, src);
 	      if (CONSTANT_P (*expr))
@@ -2013,7 +2014,7 @@ simplify_using_initial_values (struct loop *loop, enum rtx_code op, rtx *expr)
 		  rtx note = *pnote;
 		  rtx old_cond = XEXP (note, 0);
 
-		  pnote_next = &XEXP (note, 1);
+		  pnote_next = (rtx_expr_list **)&XEXP (note, 1);
 		  replace_in_expr (&XEXP (note, 0), dest, src);
 
 		  /* We can no longer use a condition that has been simplified
@@ -2033,7 +2034,7 @@ simplify_using_initial_values (struct loop *loop, enum rtx_code op, rtx *expr)
 	    }
 	  else
 	    {
-	      rtx *pnote, *pnote_next;
+	      rtx_expr_list **pnote, **pnote_next;
 
 	      /* If we did not use this insn to make a replacement, any overlap
 		 between stores in this insn and our expression will cause the
@@ -2047,7 +2048,7 @@ simplify_using_initial_values (struct loop *loop, enum rtx_code op, rtx *expr)
 		  rtx note = *pnote;
 		  rtx old_cond = XEXP (note, 0);
 
-		  pnote_next = &XEXP (note, 1);
+		  pnote_next = (rtx_expr_list **)&XEXP (note, 1);
 		  if (for_each_rtx (&old_cond, altered_reg_used, this_altered))
 		    {
 		      *pnote = *pnote_next;
diff --git a/gcc/reload.h b/gcc/reload.h
index ea9081f..80ceae2 100644
--- a/gcc/reload.h
+++ b/gcc/reload.h
@@ -233,7 +233,7 @@ struct reg_equivs_t
 
   /* An EXPR_LIST of REG_EQUIVs containing MEMs with
      alternate representations of the location of pseudo reg N.  */
-  rtx alt_mem_list;
+  rtx_expr_list *alt_mem_list;
 
   /* The list of insns that initialized reg N from its equivalent
      constant or memory slot.  */
diff --git a/gcc/rtl.h b/gcc/rtl.h
index afdc466..1f1caaf 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2838,18 +2838,18 @@ extern void subreg_get_info (unsigned int, enum machine_mode,
 
 /* lists.c */
 
-extern void free_EXPR_LIST_list (rtx *);
+extern void free_EXPR_LIST_list (rtx_expr_list **);
 extern void free_INSN_LIST_list (rtx_insn_list **);
 extern void free_EXPR_LIST_node (rtx);
 extern void free_INSN_LIST_node (rtx);
 extern rtx_insn_list *alloc_INSN_LIST (rtx, rtx);
 extern rtx_insn_list *copy_INSN_LIST (rtx_insn_list *);
 extern rtx_insn_list *concat_INSN_LIST (rtx_insn_list *, rtx_insn_list *);
-extern rtx alloc_EXPR_LIST (int, rtx, rtx);
+extern rtx_expr_list *alloc_EXPR_LIST (int, rtx, rtx);
 extern void remove_free_INSN_LIST_elem (rtx_insn *, rtx_insn_list **);
 extern rtx remove_list_elem (rtx, rtx *);
 extern rtx_insn *remove_free_INSN_LIST_node (rtx_insn_list **);
-extern rtx remove_free_EXPR_LIST_node (rtx *);
+extern rtx remove_free_EXPR_LIST_node (rtx_expr_list **);
 
 
 /* reginfo.c */
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index 7d4f6d3..41b9ca6 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -1622,7 +1622,7 @@ remove_from_dependence_list (rtx insn, rtx_insn_list **listp)
 static int
 remove_from_both_dependence_lists (rtx insn,
 				   rtx_insn_list **listp,
-				   rtx *exprp)
+				   rtx_expr_list **exprp)
 {
   int removed = 0;
 
@@ -1637,7 +1637,7 @@ remove_from_both_dependence_lists (rtx insn,
         }
 
       listp = (rtx_insn_list **)&XEXP (*listp, 1);
-      exprp = &XEXP (*exprp, 1);
+      exprp = (rtx_expr_list **)&XEXP (*exprp, 1);
     }
 
   return removed;
@@ -1719,8 +1719,8 @@ add_insn_mem_dependence (struct deps_desc *deps, bool read_p,
 {
   rtx_insn_list **insn_list;
   rtx_insn_list *insn_node;
-  rtx *mem_list;
-  rtx mem_node;
+  rtx_expr_list **mem_list;
+  rtx_expr_list *mem_node;
 
   gcc_assert (!deps->readonly);
   if (read_p)
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index f8e5e74..a19d776 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -474,13 +474,13 @@ struct deps_desc
   rtx_insn_list *pending_read_insns;
 
   /* An EXPR_LIST containing all MEM rtx's which are pending reads.  */
-  rtx pending_read_mems;
+  rtx_expr_list *pending_read_mems;
 
   /* An INSN_LIST containing all insns with pending write operations.  */
   rtx_insn_list *pending_write_insns;
 
   /* An EXPR_LIST containing all MEM rtx's which are pending writes.  */
-  rtx pending_write_mems;
+  rtx_expr_list *pending_write_mems;
 
   /* An INSN_LIST containing all jump insns.  */
   rtx_insn_list *pending_jump_insns;
diff --git a/gcc/sched-rgn.c b/gcc/sched-rgn.c
index f843c03..4f4c8d5 100644
--- a/gcc/sched-rgn.c
+++ b/gcc/sched-rgn.c
@@ -240,8 +240,8 @@ static void add_branch_dependences (rtx_insn *, rtx_insn *);
 static void compute_block_dependences (int);
 
 static void schedule_region (int);
-static void concat_insn_mem_list (rtx_insn_list *, rtx,
-				  rtx_insn_list **, rtx *);
+static void concat_insn_mem_list (rtx_insn_list *, rtx_expr_list *,
+				  rtx_insn_list **, rtx_expr_list **);
 static void propagate_deps (int, struct deps_desc *);
 static void free_pending_lists (void);
 
@@ -2585,19 +2585,20 @@ add_branch_dependences (rtx_insn *head, rtx_insn *tail)
 static struct deps_desc *bb_deps;
 
 static void
-concat_insn_mem_list (rtx_insn_list *copy_insns, rtx copy_mems,
+concat_insn_mem_list (rtx_insn_list *copy_insns,
+		      rtx_expr_list *copy_mems,
 		      rtx_insn_list **old_insns_p,
-		      rtx *old_mems_p)
+		      rtx_expr_list **old_mems_p)
 {
   rtx_insn_list *new_insns = *old_insns_p;
-  rtx new_mems = *old_mems_p;
+  rtx_expr_list *new_mems = *old_mems_p;
 
   while (copy_insns)
     {
       new_insns = alloc_INSN_LIST (copy_insns->insn (), new_insns);
-      new_mems = alloc_EXPR_LIST (VOIDmode, XEXP (copy_mems, 0), new_mems);
+      new_mems = alloc_EXPR_LIST (VOIDmode, copy_mems->element (), new_mems);
       copy_insns = copy_insns->next ();
-      copy_mems = XEXP (copy_mems, 1);
+      copy_mems = copy_mems->next ();
     }
 
   *old_insns_p = new_insns;
diff --git a/gcc/var-tracking.c b/gcc/var-tracking.c
index 8f04110..764df05 100644
--- a/gcc/var-tracking.c
+++ b/gcc/var-tracking.c
@@ -948,7 +948,7 @@ struct adjust_mem_data
   bool store;
   enum machine_mode mem_mode;
   HOST_WIDE_INT stack_adjust;
-  rtx side_effects;
+  rtx_expr_list *side_effects;
 };
 
 /* Helper for adjust_mems.  Return 1 if *loc is unsuitable for
@@ -1231,7 +1231,7 @@ adjust_insn (basic_block bb, rtx_insn *insn)
 
   amd.mem_mode = VOIDmode;
   amd.stack_adjust = -VTI (bb)->out.stack_adjust;
-  amd.side_effects = NULL_RTX;
+  amd.side_effects = NULL;
 
   amd.store = true;
   note_stores (PATTERN (insn), adjust_mem_stores, &amd);
@@ -6277,7 +6277,7 @@ prepare_call_arguments (basic_block bb, rtx_insn *insn)
 		struct adjust_mem_data amd;
 		amd.mem_mode = VOIDmode;
 		amd.stack_adjust = -VTI (bb)->out.stack_adjust;
-		amd.side_effects = NULL_RTX;
+		amd.side_effects = NULL;
 		amd.store = true;
 		mem = simplify_replace_fn_rtx (mem, NULL_RTX, adjust_mems,
 					       &amd);
-- 
1.8.5.3

[PATCH 102/236] ree.c: Use rtx_insn

[David Malcolm]

gcc/
	* ree.c (struct ext_cand): Strengthen field "insn" from rtx to
	rtx_insn *.
	(combine_set_extension): Likewise for param "curr_insn".
	(transform_ifelse): Likewise for param "def_insn".
	(get_defs): Likewise for param "def_insn".  Strengthen param "dest"
	from vec<rtx> * to vec<rtx_insn *> *.
	(is_cond_copy_insn): Likewise for param "insn".
	(struct ext_state): Strengthen the four vec fields from vec<rtx>
	to vec<rtx_insn *>.
	(make_defs_and_copies_lists): Strengthen param "extend_insn" and
	local "def_insn" from rtx to rtx_insn *.
	(get_sub_rtx): Likewise for param "def_insn".
	(merge_def_and_ext): Likewise.
	(combine_reaching_defs): Likewise.
	(add_removable_extension): Likewise for param "insn".
	(find_removable_extensions): Likewise for local "insn".
	(find_and_remove_re): Likewise for locals "curr_insn" and
	"def_insn".  Strengthen locals "reinsn_del_list" and
	"reinsn_del_list" from auto_vec<rtx> to auto_vec<rtx_insn *>.
---
 gcc/ree.c | 45 +++++++++++++++++++++++----------------------
 1 file changed, 23 insertions(+), 22 deletions(-)

diff --git a/gcc/ree.c b/gcc/ree.c
index 77f1384..6ca6345 100644
--- a/gcc/ree.c
+++ b/gcc/ree.c
@@ -255,7 +255,7 @@ typedef struct ext_cand
   enum machine_mode mode;
 
   /* The instruction where it lives.  */
-  rtx insn;
+  rtx_insn *insn;
 } ext_cand;
 
 
@@ -279,7 +279,7 @@ static int max_insn_uid;
    assign it to the register.  */
 
 static bool
-combine_set_extension (ext_cand *cand, rtx curr_insn, rtx *orig_set)
+combine_set_extension (ext_cand *cand, rtx_insn *curr_insn, rtx *orig_set)
 {
   rtx orig_src = SET_SRC (*orig_set);
   rtx new_set;
@@ -383,7 +383,7 @@ combine_set_extension (ext_cand *cand, rtx curr_insn, rtx *orig_set)
    DEF_INSN is the if_then_else insn.  */
 
 static bool
-transform_ifelse (ext_cand *cand, rtx def_insn)
+transform_ifelse (ext_cand *cand, rtx_insn *def_insn)
 {
   rtx set_insn = PATTERN (def_insn);
   rtx srcreg, dstreg, srcreg2;
@@ -429,7 +429,7 @@ transform_ifelse (ext_cand *cand, rtx def_insn)
    of the definitions onto DEST.  */
 
 static struct df_link *
-get_defs (rtx insn, rtx reg, vec<rtx> *dest)
+get_defs (rtx_insn *insn, rtx reg, vec<rtx_insn *> *dest)
 {
   df_ref reg_info, *uses;
   struct df_link *ref_chain, *ref_link;
@@ -470,7 +470,7 @@ get_defs (rtx insn, rtx reg, vec<rtx> *dest)
    and store x1 and x2 in REG_1 and REG_2.  */
 
 static bool
-is_cond_copy_insn (rtx insn, rtx *reg1, rtx *reg2)
+is_cond_copy_insn (rtx_insn *insn, rtx *reg1, rtx *reg2)
 {
   rtx expr = single_set (insn);
 
@@ -517,10 +517,10 @@ typedef struct ext_state
   /* In order to avoid constant alloc/free, we keep these
      4 vectors live through the entire find_and_remove_re and just
      truncate them each time.  */
-  vec<rtx> defs_list;
-  vec<rtx> copies_list;
-  vec<rtx> modified_list;
-  vec<rtx> work_list;
+  vec<rtx_insn *> defs_list;
+  vec<rtx_insn *> copies_list;
+  vec<rtx_insn *> modified_list;
+  vec<rtx_insn *> work_list;
 
   /* For instructions that have been successfully modified, this is
      the original mode from which the insn is extending and
@@ -541,7 +541,7 @@ typedef struct ext_state
    success.  */
 
 static bool
-make_defs_and_copies_lists (rtx extend_insn, const_rtx set_pat,
+make_defs_and_copies_lists (rtx_insn *extend_insn, const_rtx set_pat,
 			    ext_state *state)
 {
   rtx src_reg = XEXP (SET_SRC (set_pat), 0);
@@ -559,7 +559,7 @@ make_defs_and_copies_lists (rtx extend_insn, const_rtx set_pat,
   /* Perform transitive closure for conditional copies.  */
   while (!state->work_list.is_empty ())
     {
-      rtx def_insn = state->work_list.pop ();
+      rtx_insn *def_insn = state->work_list.pop ();
       rtx reg1, reg2;
 
       gcc_assert (INSN_UID (def_insn) < max_insn_uid);
@@ -595,7 +595,7 @@ make_defs_and_copies_lists (rtx extend_insn, const_rtx set_pat,
    return NULL.  This is similar to single_set, except that
    single_set allows multiple SETs when all but one is dead.  */
 static rtx *
-get_sub_rtx (rtx def_insn)
+get_sub_rtx (rtx_insn *def_insn)
 {
   enum rtx_code code = GET_CODE (PATTERN (def_insn));
   rtx *sub_rtx = NULL;
@@ -633,7 +633,7 @@ get_sub_rtx (rtx def_insn)
    on the SET pattern.  */
 
 static bool
-merge_def_and_ext (ext_cand *cand, rtx def_insn, ext_state *state)
+merge_def_and_ext (ext_cand *cand, rtx_insn *def_insn, ext_state *state)
 {
   enum machine_mode ext_src_mode;
   rtx *sub_rtx;
@@ -694,7 +694,7 @@ get_extended_src_reg (rtx src)
 static bool
 combine_reaching_defs (ext_cand *cand, const_rtx set_pat, ext_state *state)
 {
-  rtx def_insn;
+  rtx_insn *def_insn;
   bool merge_successful = true;
   int i;
   int defs_ix;
@@ -743,7 +743,7 @@ combine_reaching_defs (ext_cand *cand, const_rtx set_pat, ext_state *state)
 	return false;
 
       /* There's only one reaching def.  */
-      rtx def_insn = state->defs_list[0];
+      rtx_insn *def_insn = state->defs_list[0];
 
       /* The defining statement must not have been modified either.  */
       if (state->modified[INSN_UID (def_insn)].kind != EXT_MODIFIED_NONE)
@@ -876,7 +876,7 @@ combine_reaching_defs (ext_cand *cand, const_rtx set_pat, ext_state *state)
 /* Add an extension pattern that could be eliminated.  */
 
 static void
-add_removable_extension (const_rtx expr, rtx insn,
+add_removable_extension (const_rtx expr, rtx_insn *insn,
 			 vec<ext_cand> *insn_list,
 			 unsigned *def_map)
 {
@@ -949,7 +949,8 @@ find_removable_extensions (void)
 {
   vec<ext_cand> insn_list = vNULL;
   basic_block bb;
-  rtx insn, set;
+  rtx_insn *insn;
+  rtx set;
   unsigned *def_map = XCNEWVEC (unsigned, max_insn_uid);
 
   FOR_EACH_BB_FN (bb, cfun)
@@ -976,11 +977,11 @@ static void
 find_and_remove_re (void)
 {
   ext_cand *curr_cand;
-  rtx curr_insn = NULL_RTX;
+  rtx_insn *curr_insn = NULL;
   int num_re_opportunities = 0, num_realized = 0, i;
   vec<ext_cand> reinsn_list;
-  auto_vec<rtx> reinsn_del_list;
-  auto_vec<rtx> reinsn_copy_list;
+  auto_vec<rtx_insn *> reinsn_del_list;
+  auto_vec<rtx_insn *> reinsn_copy_list;
   ext_state state;
 
   /* Construct DU chain to get all reaching definitions of each
@@ -1049,8 +1050,8 @@ find_and_remove_re (void)
      from the new destination to the old destination.  */
   for (unsigned int i = 0; i < reinsn_copy_list.length (); i += 2)
     {
-      rtx curr_insn = reinsn_copy_list[i];
-      rtx def_insn = reinsn_copy_list[i + 1];
+      rtx_insn *curr_insn = reinsn_copy_list[i];
+      rtx_insn *def_insn = reinsn_copy_list[i + 1];
 
       /* Use the mode of the destination of the defining insn
 	 for the mode of the copy.  This is necessary if the
-- 
1.8.5.3

[PATCH 203/236] except.c: Use rtx_sequence

[David Malcolm]

gcc/
	* except.c (can_throw_external): Strengthen local "seq" from rtx
	to rtx_sequence *.  Use methods of rtx_sequence.
	(insn_nothrow_p): Likewise.
---
 gcc/except.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/except.c b/gcc/except.c
index 3fd286c..e2604f2 100644
--- a/gcc/except.c
+++ b/gcc/except.c
@@ -1889,11 +1889,11 @@ can_throw_external (const_rtx insn)
   if (NONJUMP_INSN_P (insn)
       && GET_CODE (PATTERN (insn)) == SEQUENCE)
     {
-      rtx seq = PATTERN (insn);
-      int i, n = XVECLEN (seq, 0);
+      rtx_sequence *seq = as_a <rtx_sequence *> (PATTERN (insn));
+      int i, n = seq->len ();
 
       for (i = 0; i < n; i++)
-	if (can_throw_external (XVECEXP (seq, 0, i)))
+	if (can_throw_external (seq->element (i)))
 	  return true;
 
       return false;
@@ -1933,11 +1933,11 @@ insn_nothrow_p (const_rtx insn)
   if (NONJUMP_INSN_P (insn)
       && GET_CODE (PATTERN (insn)) == SEQUENCE)
     {
-      rtx seq = PATTERN (insn);
-      int i, n = XVECLEN (seq, 0);
+      rtx_sequence *seq = as_a <rtx_sequence *> (PATTERN (insn));
+      int i, n = seq->len ();
 
       for (i = 0; i < n; i++)
-	if (!insn_nothrow_p (XVECEXP (seq, 0, i)))
+	if (!insn_nothrow_p (seq->element (i)))
 	  return false;
 
       return true;
-- 
1.8.5.3

[PATCH 166/236] shorten_branches takes an rtx_insn

[David Malcolm]

All in-tree users of shorten_branches now pass in an rtx_insn *, so we
can eliminate the cast from rtx.

gcc/
	* output.h (shorten_branches): Strengthen param from rtx to
	rtx_insn *.

	* final.c (shorten_branches): Likewise, renaming param back from
	"uncast_first" to "first", and dropping the checked cast from rtx
	to rtx_insn *.

	* genattr.c (gen_attr): Likewise when writing out the prototype of
	shorten_branches.
---
 gcc/final.c   | 3 +--
 gcc/genattr.c | 2 +-
 gcc/output.h  | 2 +-
 3 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/gcc/final.c b/gcc/final.c
index 22d75c3..0ef0bbb 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -899,9 +899,8 @@ make_pass_compute_alignments (gcc::context *ctxt)
    slots.  */
 
 void
-shorten_branches (rtx uncast_first)
+shorten_branches (rtx_insn *first)
 {
-  rtx_insn *first = as_a_nullable <rtx_insn *> (uncast_first);
   rtx_insn *insn;
   int max_uid;
   int i;
diff --git a/gcc/genattr.c b/gcc/genattr.c
index 44550c0..d2d12e0 100644
--- a/gcc/genattr.c
+++ b/gcc/genattr.c
@@ -65,7 +65,7 @@ gen_attr (rtx attr)
   if (! strcmp (XSTR (attr, 0), "length"))
     {
       puts ("\
-extern void shorten_branches (rtx);\n\
+extern void shorten_branches (rtx_insn *);\n\
 extern int insn_default_length (rtx);\n\
 extern int insn_min_length (rtx);\n\
 extern int insn_variable_length_p (rtx);\n\
diff --git a/gcc/output.h b/gcc/output.h
index 0b63737..05e7666 100644
--- a/gcc/output.h
+++ b/gcc/output.h
@@ -50,7 +50,7 @@ extern int get_attr_min_length (rtx);
 
 /* Make a pass over all insns and compute their actual lengths by shortening
    any branches of variable length if possible.  */
-extern void shorten_branches (rtx);
+extern void shorten_branches (rtx_insn *);
 
 /* Output assembler code for the start of a function,
    and initialize some of the variables in this file
-- 
1.8.5.3

[PATCH 157/236] struct eh_landing_pad_d: field "landing_pad" is an rtx_code_label

[David Malcolm]

gcc/
	* except.h (struct eh_landing_pad_d): Strengthen field
	"landing_pad" from rtx to rtx_code_label *.

	* except.c (sjlj_emit_dispatch_table): Likewise for param
	"dispatch_label"
	(sjlj_build_landing_pads): Likewise for local "dispatch_label".
---
 gcc/except.c | 2 +-
 gcc/except.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/except.c b/gcc/except.c
index 1a26b08..3fd286c 100644
--- a/gcc/except.c
+++ b/gcc/except.c
@@ -1292,7 +1292,7 @@ sjlj_emit_function_exit (void)
 }
 
 static void
-sjlj_emit_dispatch_table (rtx dispatch_label, int num_dispatch)
+sjlj_emit_dispatch_table (rtx_code_label *dispatch_label, int num_dispatch)
 {
   enum machine_mode unwind_word_mode = targetm.unwind_word_mode ();
   enum machine_mode filter_mode = targetm.eh_return_filter_mode ();
diff --git a/gcc/except.h b/gcc/except.h
index f09b0e9..492ed21 100644
--- a/gcc/except.h
+++ b/gcc/except.h
@@ -87,7 +87,7 @@ struct GTY(()) eh_landing_pad_d
      EXCEPTION_RECEIVER pattern will be expanded here, as well as other
      bookkeeping specific to exceptions.  There must not be normal edges
      into the block containing the landing-pad label.  */
-  rtx landing_pad;
+  rtx_code_label *landing_pad;
 
   /* The index of this landing pad within fun->eh->lp_array.  */
   int index;
-- 
1.8.5.3

[PATCH 025/236] make_insn_raw returns an rtx_insn

[David Malcolm]

Doing so means strengthening the types of the make_raw callbacks within
emit-rtl.c from rtx to rtx_insn * as used by the emit_pattern_*
internal functions.  There's more that could be done in terms of the
params to these functions, but we'll save that for later.

gcc/
	* rtl.h (make_insn_raw): Strengthen return type from rtx to
	rtx_insn *.

	* emit-rtl.c (make_insn_raw): Strengthen return type and local
	"insn" from rtx to rtx_insn *.
	(make_debug_insn_raw): Strengthen return type from rtx to
	rtx_insn *; strengthen local "insn" from rtx to rtx_debug_insn *.
	(make_jump_insn_raw):  Strengthen return type from rtx to
	rtx_insn *; strengthen local "insn" from rtx to rtx_jump_insn *.
	(make_call_insn_raw):  Strengthen return type from rtx to
	rtx_insn *; strengthen local "insn" from rtx to rtx_call_insn *.
	(emit_pattern_before_noloc): Strengthen return type of "make_raw"
	callback from rtx to rtx_insn *; likewise for local "insn" and
	"next", adding a checked cast to rtx_insn in the relevant cases of
	the switch statement.
	(emit_pattern_after_noloc): Strengthen return type of "make_raw"
	callback from rtx to rtx_insn *.
	(emit_pattern_after_setloc): Likewise.
	(emit_pattern_after): Likewise.
	(emit_pattern_before_setloc): Likewise.
	(emit_pattern_before): Likewise.
---
 gcc/emit-rtl.c | 42 +++++++++++++++++++++---------------------
 gcc/rtl.h      |  2 +-
 2 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 39e73a2..bbc7fb7 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3747,12 +3747,12 @@ try_split (rtx pat, rtx trial, int last)
 /* Make and return an INSN rtx, initializing all its slots.
    Store PATTERN in the pattern slots.  */
 
-rtx
+rtx_insn *
 make_insn_raw (rtx pattern)
 {
-  rtx insn;
+  rtx_insn *insn;
 
-  insn = rtx_alloc (INSN);
+  insn = as_a <rtx_insn *> (rtx_alloc (INSN));
 
   INSN_UID (insn) = cur_insn_uid++;
   PATTERN (insn) = pattern;
@@ -3778,12 +3778,12 @@ make_insn_raw (rtx pattern)
 
 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn.  */
 
-static rtx
+static rtx_insn *
 make_debug_insn_raw (rtx pattern)
 {
-  rtx insn;
+  rtx_debug_insn *insn;
 
-  insn = rtx_alloc (DEBUG_INSN);
+  insn = as_a <rtx_debug_insn *> (rtx_alloc (DEBUG_INSN));
   INSN_UID (insn) = cur_debug_insn_uid++;
   if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
     INSN_UID (insn) = cur_insn_uid++;
@@ -3799,12 +3799,12 @@ make_debug_insn_raw (rtx pattern)
 
 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn.  */
 
-static rtx
+static rtx_insn *
 make_jump_insn_raw (rtx pattern)
 {
-  rtx insn;
+  rtx_jump_insn *insn;
 
-  insn = rtx_alloc (JUMP_INSN);
+  insn = as_a <rtx_jump_insn *> (rtx_alloc (JUMP_INSN));
   INSN_UID (insn) = cur_insn_uid++;
 
   PATTERN (insn) = pattern;
@@ -3819,12 +3819,12 @@ make_jump_insn_raw (rtx pattern)
 
 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn.  */
 
-static rtx
+static rtx_insn *
 make_call_insn_raw (rtx pattern)
 {
-  rtx insn;
+  rtx_call_insn *insn;
 
-  insn = rtx_alloc (CALL_INSN);
+  insn = as_a <rtx_call_insn *> (rtx_alloc (CALL_INSN));
   INSN_UID (insn) = cur_insn_uid++;
 
   PATTERN (insn) = pattern;
@@ -4258,9 +4258,9 @@ reorder_insns (rtx from, rtx to, rtx after)
 
 static rtx
 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
-                           rtx (*make_raw) (rtx))
+                           rtx_insn *(*make_raw) (rtx))
 {
-  rtx insn;
+  rtx_insn *insn;
 
   gcc_assert (before);
 
@@ -4276,10 +4276,10 @@ emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
     case CODE_LABEL:
     case BARRIER:
     case NOTE:
-      insn = x;
+      insn = as_a <rtx_insn *> (x);
       while (insn)
 	{
-	  rtx next = NEXT_INSN (insn);
+	  rtx_insn *next = NEXT_INSN (insn);
 	  add_insn_before (insn, before, bb);
 	  last = insn;
 	  insn = next;
@@ -4412,7 +4412,7 @@ emit_insn_after_1 (rtx first, rtx after, basic_block bb)
 
 static rtx
 emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
-			  rtx (*make_raw)(rtx))
+			  rtx_insn *(*make_raw)(rtx))
 {
   rtx last = after;
 
@@ -4579,7 +4579,7 @@ emit_note_before (enum insn_note subtype, rtx before)
 
 static rtx
 emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
-			   rtx (*make_raw) (rtx))
+			   rtx_insn *(*make_raw) (rtx))
 {
   rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
 
@@ -4604,7 +4604,7 @@ emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
 
 static rtx
 emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
-		    rtx (*make_raw) (rtx))
+		    rtx_insn *(*make_raw) (rtx))
 {
   rtx prev = after;
 
@@ -4682,7 +4682,7 @@ emit_debug_insn_after (rtx pattern, rtx after)
 
 static rtx
 emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
-			    rtx (*make_raw) (rtx))
+			    rtx_insn *(*make_raw) (rtx))
 {
   rtx first = PREV_INSN (before);
   rtx last = emit_pattern_before_noloc (pattern, before,
@@ -4714,7 +4714,7 @@ emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
 
 static rtx
 emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
-		     bool insnp, rtx (*make_raw) (rtx))
+		     bool insnp, rtx_insn *(*make_raw) (rtx))
 {
   rtx next = before;
 
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 85b725a..51e8a45 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2400,7 +2400,7 @@ extern rtx gen_clobber (rtx);
 extern rtx emit_clobber (rtx);
 extern rtx gen_use (rtx);
 extern rtx emit_use (rtx);
-extern rtx make_insn_raw (rtx);
+extern rtx_insn *make_insn_raw (rtx);
 extern void add_function_usage_to (rtx, rtx);
 extern rtx_call_insn *last_call_insn (void);
 extern rtx_insn *previous_insn (rtx);
-- 
1.8.5.3

Re: [PATCH 025/236] make_insn_raw returns an rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> Doing so means strengthening the types of the make_raw callbacks within
> emit-rtl.c from rtx to rtx_insn * as used by the emit_pattern_*
> internal functions.  There's more that could be done in terms of the
> params to these functions, but we'll save that for later.
>
> gcc/
> 	* rtl.h (make_insn_raw): Strengthen return type from rtx to
> 	rtx_insn *.
>
> 	* emit-rtl.c (make_insn_raw): Strengthen return type and local
> 	"insn" from rtx to rtx_insn *.
> 	(make_debug_insn_raw): Strengthen return type from rtx to
> 	rtx_insn *; strengthen local "insn" from rtx to rtx_debug_insn *.
> 	(make_jump_insn_raw):  Strengthen return type from rtx to
> 	rtx_insn *; strengthen local "insn" from rtx to rtx_jump_insn *.
> 	(make_call_insn_raw):  Strengthen return type from rtx to
> 	rtx_insn *; strengthen local "insn" from rtx to rtx_call_insn *.
> 	(emit_pattern_before_noloc): Strengthen return type of "make_raw"
> 	callback from rtx to rtx_insn *; likewise for local "insn" and
> 	"next", adding a checked cast to rtx_insn in the relevant cases of
> 	the switch statement.
> 	(emit_pattern_after_noloc): Strengthen return type of "make_raw"
> 	callback from rtx to rtx_insn *.
> 	(emit_pattern_after_setloc): Likewise.
> 	(emit_pattern_after): Likewise.
> 	(emit_pattern_before_setloc): Likewise.
> 	(emit_pattern_before): Likewise.
OK.
Jeff

Re: [PATCH 025/236] make_insn_raw returns an rtx_insn

[David Malcolm]

On Tue, 2014-08-12 at 21:54 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > Doing so means strengthening the types of the make_raw callbacks within
> > emit-rtl.c from rtx to rtx_insn * as used by the emit_pattern_*
> > internal functions.  There's more that could be done in terms of the
> > params to these functions, but we'll save that for later.
> >
> > gcc/
> > 	* rtl.h (make_insn_raw): Strengthen return type from rtx to
> > 	rtx_insn *.
> >
> > 	* emit-rtl.c (make_insn_raw): Strengthen return type and local
> > 	"insn" from rtx to rtx_insn *.
> > 	(make_debug_insn_raw): Strengthen return type from rtx to
> > 	rtx_insn *; strengthen local "insn" from rtx to rtx_debug_insn *.
> > 	(make_jump_insn_raw):  Strengthen return type from rtx to
> > 	rtx_insn *; strengthen local "insn" from rtx to rtx_jump_insn *.
> > 	(make_call_insn_raw):  Strengthen return type from rtx to
> > 	rtx_insn *; strengthen local "insn" from rtx to rtx_call_insn *.
> > 	(emit_pattern_before_noloc): Strengthen return type of "make_raw"
> > 	callback from rtx to rtx_insn *; likewise for local "insn" and
> > 	"next", adding a checked cast to rtx_insn in the relevant cases of
> > 	the switch statement.
> > 	(emit_pattern_after_noloc): Strengthen return type of "make_raw"
> > 	callback from rtx to rtx_insn *.
> > 	(emit_pattern_after_setloc): Likewise.
> > 	(emit_pattern_after): Likewise.
> > 	(emit_pattern_before_setloc): Likewise.
> > 	(emit_pattern_before): Likewise.
> OK.

Thanks.  Committed to trunk as r214187.

[PATCH 086/236] jump.c: Use rtx_insn in a few places (also touches rtl.h and cfgexpand.c)

[David Malcolm]

gcc/
	* rtl.h (rebuild_jump_labels): Strengthen param "f" from rtx to
	rtx_insn *.
	(rebuild_jump_labels_chain): Likewise for param "chain".

	* cfgexpand.c (pass_expand::execute): Add checked cast to
	rtx_insn * when calling rebuild_jump_labels_chain in region where
	we know e->insns.r is non-NULL.

	* jump.c (rebuild_jump_labels_1): Strengthen param "f" from rtx to
	rtx_insn *.
	(rebuild_jump_labels): Likewise.
	(rebuild_jump_labels_chain): Likewise for param "chain".
	(cleanup_barriers): Likewise for locals "insn", "next", "prev".
	(init_label_info): Likewise for param "f".
	(maybe_propagate_label_ref): Likewise for params "jump_insn",
	"prev_nonjump_insn".
	(mark_all_labels): Likewise for param "f" and locals "insn",
	"prev_nonjump_insn".
---
 gcc/cfgexpand.c |  2 +-
 gcc/jump.c      | 24 ++++++++++++------------
 gcc/rtl.h       |  4 ++--
 3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index d2dc924..731faeb 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -5856,7 +5856,7 @@ pass_expand::execute (function *fun)
 	{
 	  if (e->insns.r)
 	    {
-	      rebuild_jump_labels_chain (e->insns.r);
+	      rebuild_jump_labels_chain (as_a <rtx_insn *> (e->insns.r));
 	      /* Put insns after parm birth, but before
 		 NOTE_INSNS_FUNCTION_BEG.  */
 	      if (e->src == ENTRY_BLOCK_PTR_FOR_FN (fun)
diff --git a/gcc/jump.c b/gcc/jump.c
index b51ca17..1aab9bb 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -62,8 +62,8 @@ along with GCC; see the file COPYING3.  If not see
    or even change what is live at any point.
    So perhaps let combiner do it.  */
 
-static void init_label_info (rtx);
-static void mark_all_labels (rtx);
+static void init_label_info (rtx_insn *);
+static void mark_all_labels (rtx_insn *);
 static void mark_jump_label_1 (rtx, rtx, bool, bool);
 static void mark_jump_label_asm (rtx, rtx);
 static void redirect_exp_1 (rtx *, rtx, rtx, rtx);
@@ -72,7 +72,7 @@ static int returnjump_p_1 (rtx *, void *);
 \f
 /* Worker for rebuild_jump_labels and rebuild_jump_labels_chain.  */
 static void
-rebuild_jump_labels_1 (rtx f, bool count_forced)
+rebuild_jump_labels_1 (rtx_insn *f, bool count_forced)
 {
   rtx insn;
 
@@ -96,7 +96,7 @@ rebuild_jump_labels_1 (rtx f, bool count_forced)
    instructions and jumping insns that have labels as operands
    (e.g. cbranchsi4).  */
 void
-rebuild_jump_labels (rtx f)
+rebuild_jump_labels (rtx_insn *f)
 {
   rebuild_jump_labels_1 (f, true);
 }
@@ -105,7 +105,7 @@ rebuild_jump_labels (rtx f)
    forced_labels.  It can be used on insn chains that aren't the 
    main function chain.  */
 void
-rebuild_jump_labels_chain (rtx chain)
+rebuild_jump_labels_chain (rtx_insn *chain)
 {
   rebuild_jump_labels_1 (chain, false);
 }
@@ -121,7 +121,7 @@ rebuild_jump_labels_chain (rtx chain)
 static unsigned int
 cleanup_barriers (void)
 {
-  rtx insn, next, prev;
+  rtx_insn *insn, *next, *prev;
   for (insn = get_insns (); insn; insn = next)
     {
       next = NEXT_INSN (insn);
@@ -181,9 +181,9 @@ make_pass_cleanup_barriers (gcc::context *ctxt)
    notes whose labels don't occur in the insn any more.  */
 
 static void
-init_label_info (rtx f)
+init_label_info (rtx_insn *f)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = f; insn; insn = NEXT_INSN (insn))
     {
@@ -219,7 +219,7 @@ init_label_info (rtx f)
    load into a jump_insn that uses it.  */
 
 static void
-maybe_propagate_label_ref (rtx jump_insn, rtx prev_nonjump_insn)
+maybe_propagate_label_ref (rtx_insn *jump_insn, rtx_insn *prev_nonjump_insn)
 {
   rtx label_note, pc, pc_src;
 
@@ -267,9 +267,9 @@ maybe_propagate_label_ref (rtx jump_insn, rtx prev_nonjump_insn)
    Combine consecutive labels, and count uses of labels.  */
 
 static void
-mark_all_labels (rtx f)
+mark_all_labels (rtx_insn *f)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (current_ir_type () == IR_RTL_CFGLAYOUT)
     {
@@ -299,7 +299,7 @@ mark_all_labels (rtx f)
     }
   else
     {
-      rtx prev_nonjump_insn = NULL;
+      rtx_insn *prev_nonjump_insn = NULL;
       for (insn = f; insn; insn = NEXT_INSN (insn))
 	{
 	  if (INSN_DELETED_P (insn))
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 9c097b6..992d4af 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3029,8 +3029,8 @@ extern unsigned int reg_or_subregno (const_rtx);
 extern int redirect_jump_1 (rtx, rtx);
 extern void redirect_jump_2 (rtx, rtx, rtx, int, int);
 extern int redirect_jump (rtx, rtx, int);
-extern void rebuild_jump_labels (rtx);
-extern void rebuild_jump_labels_chain (rtx);
+extern void rebuild_jump_labels (rtx_insn *);
+extern void rebuild_jump_labels_chain (rtx_insn *);
 extern rtx reversed_comparison (const_rtx, enum machine_mode);
 extern enum rtx_code reversed_comparison_code (const_rtx, const_rtx);
 extern enum rtx_code reversed_comparison_code_parts (enum rtx_code, const_rtx,
-- 
1.8.5.3

[PATCH 017/236] Add subclasses for the various kinds of instruction

[David Malcolm]

gcc/
	* coretypes.h (class rtx_real_insn): Add forward declaration.
	(class rtx_debug_insn): Likewise.
	(class rtx_nonjump_insn): Likewise.
	(class rtx_jump_insn): Likewise.
	(class rtx_call_insn): Likewise.
	(class rtx_jump_table_data): Likewise.
	(class rtx_barrier): Likewise.
	(class rtx_code_label): Likewise.
	(class rtx_note): Likewise.

	* rtl.h (class rtx_real_insn): New, a subclass of rtx_insn, adding
	the invariant INSN_P (X).
	(class rtx_debug_insn): New, a subclass of rtx_real_insn, adding
	the invariant DEBUG_INSN_P (X).
	(class rtx_nonjump_insn): New, a subclass of rtx_real_insn, adding
	the invariant NONJUMP_INSN_P (X).
	(class rtx_jump_insn): New, a subclass of rtx_real_insn, adding
	the invariant JUMP_P (X).
	(class rtx_call_insn): New, a subclass of rtx_real_insn, adding
	the invariant CALL_P (X).
	(class rtx_jump_table): New, a subclass of rtx_insn, adding the
	invariant JUMP_TABLE_DATA_P (X).
	(class rtx_barrier): New, a subclass of rtx_insn, adding the
	invariant BARRIER_P (X).
	(class rtx_code_label): New, a subclass of rtx_real_insn, adding
	the invariant LABEL_P (X).
	(class rtx_note): New, a subclass of rtx_real_insn, adding
	the invariant NOTE_P(X).
	(is_a_helper <rtx_real_insn *>::test): New.
	(is_a_helper <rtx_debug_insn *>::test): New.
	(is_a_helper <rtx_nonjump_insn *>::test): New.
	(is_a_helper <rtx_jump_insn *>::test): New.
	(is_a_helper <rtx_call_insn *>::test): New.
	(is_a_helper <rtx_jump_table_data *>::test): New functions,
	overloaded for both rtx and rtx_insn *.
	(is_a_helper <rtx_barrier *>::test): New.
	(is_a_helper <rtx_code_label *>::test): New functions, overloaded
	for both rtx and rtx_insn *.
	(is_a_helper <rtx_note *>::test): New.
---
 gcc/coretypes.h |  11 +++-
 gcc/rtl.h       | 200 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 210 insertions(+), 1 deletion(-)

diff --git a/gcc/coretypes.h b/gcc/coretypes.h
index f22b980..17dc0e6 100644
--- a/gcc/coretypes.h
+++ b/gcc/coretypes.h
@@ -57,10 +57,19 @@ typedef struct rtx_def *rtx;
 typedef const struct rtx_def *const_rtx;
 
 /* Subclasses of rtx_def, using indentation to show the class
-   hierarchy.
+   hierarchy, along with the relevant invariant.
    Where possible, keep this list in the same order as in rtl.def.  */
 class rtx_def;
   class rtx_insn;
+    class rtx_real_insn;         /* INSN_P (X) */
+      class rtx_debug_insn;      /* DEBUG_INSN_P (X) */
+      class rtx_nonjump_insn;    /* NONJUMP_INSN_P (X) */
+      class rtx_jump_insn;       /* JUMP_P (X) */
+      class rtx_call_insn;       /* CALL_P (X) */
+    class rtx_jump_table_data;   /* JUMP_TABLE_DATA_P (X) */
+    class rtx_barrier;           /* BARRIER_P (X) */
+    class rtx_code_label;        /* LABEL_P (X) */
+    class rtx_note;              /* NOTE_P (X) */
 
 struct rtvec_def;
 typedef struct rtvec_def *rtvec;
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 5936829..31df60f 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -421,6 +421,110 @@ class GTY(()) rtx_insn : public rtx_def
   */
 };
 
+class GTY(()) rtx_real_insn : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       INSN_P (X)
+     i.e. that we have a "real" insn, one of:
+       (NONJUMP_INSN_P (X) || DEBUG_INSN_P (X) || JUMP_P (X) || CALL_P (X))
+  */
+};
+
+/* Subclasses of rtx_real_insn.  */
+
+class GTY(()) rtx_debug_insn : public rtx_real_insn
+{
+  /* No extra fields, but adds the invariant:
+       DEBUG_INSN_P (X) aka (GET_CODE (X) == DEBUG_INSN)
+     i.e. an annotation for tracking variable assignments.
+
+     This is an instance of:
+       DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeiie", RTX_INSN)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_nonjump_insn : public rtx_real_insn
+{
+  /* No extra fields, but adds the invariant:
+       NONJUMP_INSN_P (X) aka (GET_CODE (X) == INSN)
+     i.e an instruction that cannot jump.
+
+     This is an instance of:
+       DEF_RTL_EXPR(INSN, "insn", "uuBeiie", RTX_INSN)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_jump_insn : public rtx_real_insn
+{
+  /* No extra fields, but adds the invariant:
+       JUMP_P (X) aka (GET_CODE (X) == JUMP_INSN)
+     i.e. an instruction that can possibly jump.
+
+     This is an instance of:
+       DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeiie0", RTX_INSN)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_call_insn : public rtx_real_insn
+{
+  /* No extra fields, but adds the invariant:
+       CALL_P (X) aka (GET_CODE (X) == CALL_INSN)
+     i.e. an instruction that can possibly call a subroutine
+     but which will not change which instruction comes next
+     in the current function.
+
+     This is an instance of:
+       DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeiiee", RTX_INSN)
+     from rtl.def.  */
+};
+
+/* Subclasses of rtx_insn not derived from rtx_real_insn.  */
+
+class GTY(()) rtx_jump_table_data : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       JUMP_TABLE_DATA_P (X) aka (GET_CODE (INSN) == JUMP_TABLE_DATA)
+     i.e. a data for a jump table, considered an instruction for
+     historical reasons.
+
+     This is an instance of:
+       DEF_RTL_EXPR(JUMP_TABLE_DATA, "jump_table_data", "uuBe0000", RTX_INSN)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_barrier : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       BARRIER_P (X) aka (GET_CODE (X) == BARRIER)
+     i.e. a marker that indicates that control will not flow through.
+
+     This is an instance of:
+       DEF_RTL_EXPR(BARRIER, "barrier", "uu00000", RTX_EXTRA)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_code_label : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       LABEL_P (X) aka (GET_CODE (X) == CODE_LABEL)
+     i.e. a label in the assembler.
+
+     This is an instance of:
+       DEF_RTL_EXPR(CODE_LABEL, "code_label", "uuB00is", RTX_EXTRA)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_note : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       NOTE_P(X) aka (GET_CODE (X) == NOTE)
+     i.e. a note about the corresponding source code.
+
+     This is an instance of:
+       DEF_RTL_EXPR(NOTE, "note", "uuB0ni", RTX_EXTRA)
+     from rtl.def.  */
+};
+
 /* The size in bytes of an rtx header (code, mode and flags).  */
 #define RTX_HDR_SIZE offsetof (struct rtx_def, u)
 
@@ -606,6 +710,102 @@ is_a_helper <const rtx_insn *>::test (const_rtx rt)
 	  || LABEL_P (rt));
 }
 
+template <>
+template <>
+inline bool
+is_a_helper <rtx_real_insn *>::test (rtx rt)
+{
+  return INSN_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_debug_insn *>::test (rtx rt)
+{
+  return DEBUG_INSN_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_nonjump_insn *>::test (rtx rt)
+{
+  return NONJUMP_INSN_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_jump_insn *>::test (rtx rt)
+{
+  return JUMP_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_call_insn *>::test (rtx rt)
+{
+  return CALL_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_jump_table_data *>::test (rtx rt)
+{
+  return JUMP_TABLE_DATA_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_jump_table_data *>::test (rtx_insn *insn)
+{
+  return JUMP_TABLE_DATA_P (insn);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_barrier *>::test (rtx rt)
+{
+  return BARRIER_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_code_label *>::test (rtx rt)
+{
+  return LABEL_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_code_label *>::test (rtx_insn *insn)
+{
+  return LABEL_P (insn);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_note *>::test (rtx rt)
+{
+  return NOTE_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_note *>::test (rtx_insn *insn)
+{
+  return NOTE_P (insn);
+}
+
 /* Predicate yielding nonzero iff X is a return or simple_return.  */
 #define ANY_RETURN_P(X) \
   (GET_CODE (X) == RETURN || GET_CODE (X) == SIMPLE_RETURN)
-- 
1.8.5.3

Re: [PATCH 017/236] Add subclasses for the various kinds of instruction

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> gcc/
> 	* coretypes.h (class rtx_real_insn): Add forward declaration.
> 	(class rtx_debug_insn): Likewise.
> 	(class rtx_nonjump_insn): Likewise.
> 	(class rtx_jump_insn): Likewise.
> 	(class rtx_call_insn): Likewise.
> 	(class rtx_jump_table_data): Likewise.
> 	(class rtx_barrier): Likewise.
> 	(class rtx_code_label): Likewise.
> 	(class rtx_note): Likewise.
>
> 	* rtl.h (class rtx_real_insn): New, a subclass of rtx_insn, adding
> 	the invariant INSN_P (X).
> 	(class rtx_debug_insn): New, a subclass of rtx_real_insn, adding
> 	the invariant DEBUG_INSN_P (X).
> 	(class rtx_nonjump_insn): New, a subclass of rtx_real_insn, adding
> 	the invariant NONJUMP_INSN_P (X).
> 	(class rtx_jump_insn): New, a subclass of rtx_real_insn, adding
> 	the invariant JUMP_P (X).
> 	(class rtx_call_insn): New, a subclass of rtx_real_insn, adding
> 	the invariant CALL_P (X).
> 	(class rtx_jump_table): New, a subclass of rtx_insn, adding the
> 	invariant JUMP_TABLE_DATA_P (X).
> 	(class rtx_barrier): New, a subclass of rtx_insn, adding the
> 	invariant BARRIER_P (X).
> 	(class rtx_code_label): New, a subclass of rtx_real_insn, adding
> 	the invariant LABEL_P (X).
> 	(class rtx_note): New, a subclass of rtx_real_insn, adding
> 	the invariant NOTE_P(X).
> 	(is_a_helper <rtx_real_insn *>::test): New.
> 	(is_a_helper <rtx_debug_insn *>::test): New.
> 	(is_a_helper <rtx_nonjump_insn *>::test): New.
> 	(is_a_helper <rtx_jump_insn *>::test): New.
> 	(is_a_helper <rtx_call_insn *>::test): New.
> 	(is_a_helper <rtx_jump_table_data *>::test): New functions,
> 	overloaded for both rtx and rtx_insn *.
> 	(is_a_helper <rtx_barrier *>::test): New.
> 	(is_a_helper <rtx_code_label *>::test): New functions, overloaded
> 	for both rtx and rtx_insn *.
> 	(is_a_helper <rtx_note *>::test): New.
Sounds like the direction we're going right now is to drop rtx_real_insn 
and squish one level of inheritance out.  OK with the obvious changes 
around that.  I probably won't call out any rtx_real_insn stuff for 
future patches as I'll assume you will take care of that as you do your 
bootstrap builds prior to installation.

Jeff

Re: [PATCH 017/236] Add subclasses for the various kinds of instruction

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 2651 bytes --]

On Tue, 2014-08-12 at 21:07 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > gcc/
> > 	* coretypes.h (class rtx_real_insn): Add forward declaration.
> > 	(class rtx_debug_insn): Likewise.
> > 	(class rtx_nonjump_insn): Likewise.
> > 	(class rtx_jump_insn): Likewise.
> > 	(class rtx_call_insn): Likewise.
> > 	(class rtx_jump_table_data): Likewise.
> > 	(class rtx_barrier): Likewise.
> > 	(class rtx_code_label): Likewise.
> > 	(class rtx_note): Likewise.
> >
> > 	* rtl.h (class rtx_real_insn): New, a subclass of rtx_insn, adding
> > 	the invariant INSN_P (X).
> > 	(class rtx_debug_insn): New, a subclass of rtx_real_insn, adding
> > 	the invariant DEBUG_INSN_P (X).
> > 	(class rtx_nonjump_insn): New, a subclass of rtx_real_insn, adding
> > 	the invariant NONJUMP_INSN_P (X).
> > 	(class rtx_jump_insn): New, a subclass of rtx_real_insn, adding
> > 	the invariant JUMP_P (X).
> > 	(class rtx_call_insn): New, a subclass of rtx_real_insn, adding
> > 	the invariant CALL_P (X).
> > 	(class rtx_jump_table): New, a subclass of rtx_insn, adding the
> > 	invariant JUMP_TABLE_DATA_P (X).
> > 	(class rtx_barrier): New, a subclass of rtx_insn, adding the
> > 	invariant BARRIER_P (X).
> > 	(class rtx_code_label): New, a subclass of rtx_real_insn, adding
> > 	the invariant LABEL_P (X).
> > 	(class rtx_note): New, a subclass of rtx_real_insn, adding
> > 	the invariant NOTE_P(X).
> > 	(is_a_helper <rtx_real_insn *>::test): New.
> > 	(is_a_helper <rtx_debug_insn *>::test): New.
> > 	(is_a_helper <rtx_nonjump_insn *>::test): New.
> > 	(is_a_helper <rtx_jump_insn *>::test): New.
> > 	(is_a_helper <rtx_call_insn *>::test): New.
> > 	(is_a_helper <rtx_jump_table_data *>::test): New functions,
> > 	overloaded for both rtx and rtx_insn *.
> > 	(is_a_helper <rtx_barrier *>::test): New.
> > 	(is_a_helper <rtx_code_label *>::test): New functions, overloaded
> > 	for both rtx and rtx_insn *.
> > 	(is_a_helper <rtx_note *>::test): New.
> Sounds like the direction we're going right now is to drop rtx_real_insn 
> and squish one level of inheritance out.  OK with the obvious changes 
> around that.  I probably won't call out any rtx_real_insn stuff for 
> future patches as I'll assume you will take care of that as you do your 
> bootstrap builds prior to installation.

Thanks.  Removed class rtx_real_insn, and committed to trunk as r214172,
having verified bootstrap&regrtest on x86_64-unknown-linux-gnu (Fedora
20) albeit in combination with patches 9-29 [1], and verified that it
builds standalone with 9 targets.

Am attaching what I committed.

Dave

[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html



[-- Attachment #2: r214172.patch --]
[-- Type: text/x-patch, Size: 7510 bytes --]

Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214171)
+++ gcc/ChangeLog	(revision 214172)
@@ -1,3 +1,41 @@
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	* coretypes.h (class rtx_debug_insn): Add forward declaration.
+	(class rtx_nonjump_insn): Likewise.
+	(class rtx_jump_insn): Likewise.
+	(class rtx_call_insn): Likewise.
+	(class rtx_jump_table_data): Likewise.
+	(class rtx_barrier): Likewise.
+	(class rtx_code_label): Likewise.
+	(class rtx_note): Likewise.
+
+	* rtl.h (class rtx_debug_insn): New, a subclass of rtx_insn,
+	adding the invariant DEBUG_INSN_P (X).
+	(class rtx_nonjump_insn): New, a subclass of rtx_insn, adding
+	the invariant NONJUMP_INSN_P (X).
+	(class rtx_jump_insn): New, a subclass of rtx_insn, adding
+	the invariant JUMP_P (X).
+	(class rtx_call_insn): New, a subclass of rtx_insn, adding
+	the invariant CALL_P (X).
+	(class rtx_jump_table): New, a subclass of rtx_insn, adding the
+	invariant JUMP_TABLE_DATA_P (X).
+	(class rtx_barrier): New, a subclass of rtx_insn, adding the
+	invariant BARRIER_P (X).
+	(class rtx_code_label): New, a subclass of rtx_insn, adding
+	the invariant LABEL_P (X).
+	(class rtx_note): New, a subclass of rtx_insn, adding
+	the invariant NOTE_P(X).
+	(is_a_helper <rtx_debug_insn *>::test): New.
+	(is_a_helper <rtx_nonjump_insn *>::test): New.
+	(is_a_helper <rtx_jump_insn *>::test): New.
+	(is_a_helper <rtx_call_insn *>::test): New.
+	(is_a_helper <rtx_jump_table_data *>::test): New functions,
+	overloaded for both rtx and rtx_insn *.
+	(is_a_helper <rtx_barrier *>::test): New.
+	(is_a_helper <rtx_code_label *>::test): New functions, overloaded
+	for both rtx and rtx_insn *.
+	(is_a_helper <rtx_note *>::test): New.
+
 2014-08-19  Marek Polacek  <polacek@redhat.com>
 
 	* config/alpha/alpha.h (CLZ_DEFINED_VALUE_AT_ZERO,
Index: gcc/coretypes.h
===================================================================
--- gcc/coretypes.h	(revision 214171)
+++ gcc/coretypes.h	(revision 214172)
@@ -57,10 +57,18 @@
 typedef const struct rtx_def *const_rtx;
 
 /* Subclasses of rtx_def, using indentation to show the class
-   hierarchy.
+   hierarchy, along with the relevant invariant.
    Where possible, keep this list in the same order as in rtl.def.  */
 class rtx_def;
   class rtx_insn;
+    class rtx_debug_insn;      /* DEBUG_INSN_P (X) */
+    class rtx_nonjump_insn;    /* NONJUMP_INSN_P (X) */
+    class rtx_jump_insn;       /* JUMP_P (X) */
+    class rtx_call_insn;       /* CALL_P (X) */
+    class rtx_jump_table_data; /* JUMP_TABLE_DATA_P (X) */
+    class rtx_barrier;         /* BARRIER_P (X) */
+    class rtx_code_label;      /* LABEL_P (X) */
+    class rtx_note;            /* NOTE_P (X) */
 
 struct rtvec_def;
 typedef struct rtvec_def *rtvec;
Index: gcc/rtl.h
===================================================================
--- gcc/rtl.h	(revision 214171)
+++ gcc/rtl.h	(revision 214172)
@@ -421,6 +421,99 @@
   */
 };
 
+/* Subclasses of rtx_insn.  */
+
+class GTY(()) rtx_debug_insn : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       DEBUG_INSN_P (X) aka (GET_CODE (X) == DEBUG_INSN)
+     i.e. an annotation for tracking variable assignments.
+
+     This is an instance of:
+       DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeiie", RTX_INSN)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_nonjump_insn : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       NONJUMP_INSN_P (X) aka (GET_CODE (X) == INSN)
+     i.e an instruction that cannot jump.
+
+     This is an instance of:
+       DEF_RTL_EXPR(INSN, "insn", "uuBeiie", RTX_INSN)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_jump_insn : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       JUMP_P (X) aka (GET_CODE (X) == JUMP_INSN)
+     i.e. an instruction that can possibly jump.
+
+     This is an instance of:
+       DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeiie0", RTX_INSN)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_call_insn : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       CALL_P (X) aka (GET_CODE (X) == CALL_INSN)
+     i.e. an instruction that can possibly call a subroutine
+     but which will not change which instruction comes next
+     in the current function.
+
+     This is an instance of:
+       DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeiiee", RTX_INSN)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_jump_table_data : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       JUMP_TABLE_DATA_P (X) aka (GET_CODE (INSN) == JUMP_TABLE_DATA)
+     i.e. a data for a jump table, considered an instruction for
+     historical reasons.
+
+     This is an instance of:
+       DEF_RTL_EXPR(JUMP_TABLE_DATA, "jump_table_data", "uuBe0000", RTX_INSN)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_barrier : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       BARRIER_P (X) aka (GET_CODE (X) == BARRIER)
+     i.e. a marker that indicates that control will not flow through.
+
+     This is an instance of:
+       DEF_RTL_EXPR(BARRIER, "barrier", "uu00000", RTX_EXTRA)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_code_label : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       LABEL_P (X) aka (GET_CODE (X) == CODE_LABEL)
+     i.e. a label in the assembler.
+
+     This is an instance of:
+       DEF_RTL_EXPR(CODE_LABEL, "code_label", "uuB00is", RTX_EXTRA)
+     from rtl.def.  */
+};
+
+class GTY(()) rtx_note : public rtx_insn
+{
+  /* No extra fields, but adds the invariant:
+       NOTE_P(X) aka (GET_CODE (X) == NOTE)
+     i.e. a note about the corresponding source code.
+
+     This is an instance of:
+       DEF_RTL_EXPR(NOTE, "note", "uuB0ni", RTX_EXTRA)
+     from rtl.def.  */
+};
+
 /* The size in bytes of an rtx header (code, mode and flags).  */
 #define RTX_HDR_SIZE offsetof (struct rtx_def, u)
 
@@ -606,6 +699,94 @@
 	  || LABEL_P (rt));
 }
 
+template <>
+template <>
+inline bool
+is_a_helper <rtx_debug_insn *>::test (rtx rt)
+{
+  return DEBUG_INSN_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_nonjump_insn *>::test (rtx rt)
+{
+  return NONJUMP_INSN_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_jump_insn *>::test (rtx rt)
+{
+  return JUMP_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_call_insn *>::test (rtx rt)
+{
+  return CALL_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_jump_table_data *>::test (rtx rt)
+{
+  return JUMP_TABLE_DATA_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_jump_table_data *>::test (rtx_insn *insn)
+{
+  return JUMP_TABLE_DATA_P (insn);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_barrier *>::test (rtx rt)
+{
+  return BARRIER_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_code_label *>::test (rtx rt)
+{
+  return LABEL_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_code_label *>::test (rtx_insn *insn)
+{
+  return LABEL_P (insn);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_note *>::test (rtx rt)
+{
+  return NOTE_P (rt);
+}
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_note *>::test (rtx_insn *insn)
+{
+  return NOTE_P (insn);
+}
+
 /* Predicate yielding nonzero iff X is a return or simple_return.  */
 #define ANY_RETURN_P(X) \
   (GET_CODE (X) == RETURN || GET_CODE (X) == SIMPLE_RETURN)

[PATCH 134/236] config/i386/i386.c: Use rtx_code_label

[David Malcolm]

gcc/
	* config/i386/i386.c (setup_incoming_varargs_64): Strengthen local
	"label" from rtx to rtx_code_label *.
	(ix86_expand_prologue): Likewise.
	(ix86_expand_split_stack_prologue): Likewise for locals "label",
	"varargs_label".
	(ix86_split_idivmod): Likewise for locals "end_label" and
	"qimode_label".
	(ix86_expand_branch): Likewise for local "label2".
	(ix86_expand_aligntest): Likewise for return type and local "label".
	(expand_set_or_movmem_via_loop): Likewise for locals "out_label" and
	"top_label".
	(expand_movmem_epilogue): Likewise for the various locals named
	"label".
	(expand_setmem_epilogue): Likewise.
	(expand_small_movmem_or_setmem): Likewise for local "label".
	(expand_set_or_movmem_prologue_epilogue_by_misaligned_moves):
	Strengthen param "done_label" from rtx * to rtx_code_label **.
	Strengthen locals "loop_label" and "label" from rtx to
	rtx_code_label *.
	(expand_set_or_movmem_prologue_epilogue_by_misaligned_moves):
	Likewise for locals "loop_label", "label".
	(ix86_expand_set_or_movmem): Likewise for locals "label",
	"jump_around_label", "hot_label".
	(ix86_expand_strlensi_unroll_1): Likewise for locals
	"align_2_label", align_3_label", "align_4_label", "end_0_label",
	"end_2_label".
	(x86_emit_floatuns): Likewise for locals "neglab", "donelab".
	(void ix86_emit_i387_log1p): Likewise for locals "label1",
	"label2", "jump_label".
	(ix86_expand_sse_compare_and_jump): Likewise for return type and
	local "label".
	(ix86_expand_lfloorceil): Likewise for local "label".
	(ix86_expand_rint): Likewise.
	(ix86_expand_floorceildf_32): Likewise.
	(ix86_expand_floorceil): Likewise.
	(ix86_expand_rounddf_32): Likewise.
	(ix86_expand_trunc): Likewise.
	(ix86_expand_truncdf_32): Likewise.
	(ix86_expand_round): Likewise.
---
 gcc/config/i386/i386.c | 110 ++++++++++++++++++++++++++++---------------------
 1 file changed, 63 insertions(+), 47 deletions(-)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ea79519..540bc76 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -8239,7 +8239,8 @@ setup_incoming_varargs_64 (CUMULATIVE_ARGS *cum)
   if (ix86_varargs_fpr_size)
     {
       enum machine_mode smode;
-      rtx label, test;
+      rtx_code_label *label;
+      rtx test;
 
       /* Now emit code to save SSE registers.  The AX parameter contains number
 	 of SSE parameter registers used to call this function, though all we
@@ -11188,7 +11189,8 @@ ix86_expand_prologue (void)
 	{
 	  if (ix86_cmodel == CM_LARGE_PIC)
 	    {
-	      rtx label, tmp_reg;
+	      rtx_code_label *label;
+	      rtx tmp_reg;
 
 	      gcc_assert (Pmode == DImode);
 	      label = gen_label_rtx ();
@@ -11879,9 +11881,10 @@ ix86_expand_split_stack_prologue (void)
   struct ix86_frame frame;
   HOST_WIDE_INT allocate;
   unsigned HOST_WIDE_INT args_size;
-  rtx label, limit, current, jump_insn, allocate_rtx, call_insn, call_fusage;
+  rtx_code_label *label;
+  rtx limit, current, jump_insn, allocate_rtx, call_insn, call_fusage;
   rtx scratch_reg = NULL_RTX;
-  rtx varargs_label = NULL_RTX;
+  rtx_code_label *varargs_label = NULL;
   rtx fn;
 
   gcc_assert (flag_split_stack && reload_completed);
@@ -11997,7 +12000,8 @@ ix86_expand_split_stack_prologue (void)
 
 	  if (ix86_cmodel == CM_LARGE_PIC)
 	    {
-	      rtx label, x;
+	      rtx_code_label *label;
+	      rtx x;
 
 	      label = gen_label_rtx ();
 	      emit_label (label);
@@ -17644,7 +17648,7 @@ void
 ix86_split_idivmod (enum machine_mode mode, rtx operands[],
 		    bool signed_p)
 {
-  rtx end_label, qimode_label;
+  rtx_code_label *end_label, *qimode_label;
   rtx insn, div, mod;
   rtx scratch, tmp0, tmp1, tmp2;
   rtx (*gen_divmod4_1) (rtx, rtx, rtx, rtx);
@@ -19906,7 +19910,8 @@ ix86_expand_branch (enum rtx_code code, rtx op0, rtx op1, rtx label)
     case TImode:
       /* Expand DImode branch into multiple compare+branch.  */
       {
-	rtx lo[2], hi[2], label2;
+	rtx lo[2], hi[2];
+	rtx_code_label *label2;
 	enum rtx_code code1, code2, code3;
 	enum machine_mode submode;
 
@@ -22715,10 +22720,10 @@ predict_jump (int prob)
 
 /* Helper function for the string operations below.  Dest VARIABLE whether
    it is aligned to VALUE bytes.  If true, jump to the label.  */
-static rtx
+static rtx_code_label *
 ix86_expand_aligntest (rtx variable, int value, bool epilogue)
 {
-  rtx label = gen_label_rtx ();
+  rtx_code_label *label = gen_label_rtx ();
   rtx tmpcount = gen_reg_rtx (GET_MODE (variable));
   if (GET_MODE (variable) == DImode)
     emit_insn (gen_anddi3 (tmpcount, variable, GEN_INT (value)));
@@ -22813,7 +22818,8 @@ expand_set_or_movmem_via_loop (rtx destmem, rtx srcmem,
 			       rtx count, enum machine_mode mode, int unroll,
 			       int expected_size, bool issetmem)
 {
-  rtx out_label, top_label, iter, tmp;
+  rtx_code_label *out_label, *top_label;
+  rtx iter, tmp;
   enum machine_mode iter_mode = counter_mode (count);
   int piece_size_n = GET_MODE_SIZE (mode) * unroll;
   rtx piece_size = GEN_INT (piece_size_n);
@@ -23130,7 +23136,7 @@ expand_movmem_epilogue (rtx destmem, rtx srcmem,
     {
       if (max_size > 4)
 	{
-	  rtx label = ix86_expand_aligntest (count, 4, true);
+	  rtx_code_label *label = ix86_expand_aligntest (count, 4, true);
 	  src = change_address (srcmem, SImode, srcptr);
 	  dest = change_address (destmem, SImode, destptr);
 	  emit_insn (gen_strmov (destptr, dest, srcptr, src));
@@ -23139,7 +23145,7 @@ expand_movmem_epilogue (rtx destmem, rtx srcmem,
 	}
       if (max_size > 2)
 	{
-	  rtx label = ix86_expand_aligntest (count, 2, true);
+	  rtx_code_label *label = ix86_expand_aligntest (count, 2, true);
 	  src = change_address (srcmem, HImode, srcptr);
 	  dest = change_address (destmem, HImode, destptr);
 	  emit_insn (gen_strmov (destptr, dest, srcptr, src));
@@ -23148,7 +23154,7 @@ expand_movmem_epilogue (rtx destmem, rtx srcmem,
 	}
       if (max_size > 1)
 	{
-	  rtx label = ix86_expand_aligntest (count, 1, true);
+	  rtx_code_label *label = ix86_expand_aligntest (count, 1, true);
 	  src = change_address (srcmem, QImode, srcptr);
 	  dest = change_address (destmem, QImode, destptr);
 	  emit_insn (gen_strmov (destptr, dest, srcptr, src));
@@ -23163,7 +23169,7 @@ expand_movmem_epilogue (rtx destmem, rtx srcmem,
 
       if (max_size > 4)
 	{
-	  rtx label = ix86_expand_aligntest (count, 4, true);
+	  rtx_code_label *label = ix86_expand_aligntest (count, 4, true);
 	  src = change_address (srcmem, SImode, srcptr);
 	  dest = change_address (destmem, SImode, destptr);
 	  emit_move_insn (dest, src);
@@ -23176,7 +23182,7 @@ expand_movmem_epilogue (rtx destmem, rtx srcmem,
 	}
       if (max_size > 2)
 	{
-	  rtx label = ix86_expand_aligntest (count, 2, true);
+	  rtx_code_label *label = ix86_expand_aligntest (count, 2, true);
 	  tmp = gen_rtx_PLUS (Pmode, srcptr, offset);
 	  src = change_address (srcmem, HImode, tmp);
 	  tmp = gen_rtx_PLUS (Pmode, destptr, offset);
@@ -23191,7 +23197,7 @@ expand_movmem_epilogue (rtx destmem, rtx srcmem,
 	}
       if (max_size > 1)
 	{
-	  rtx label = ix86_expand_aligntest (count, 1, true);
+	  rtx_code_label *label = ix86_expand_aligntest (count, 1, true);
 	  tmp = gen_rtx_PLUS (Pmode, srcptr, offset);
 	  src = change_address (srcmem, QImode, tmp);
 	  tmp = gen_rtx_PLUS (Pmode, destptr, offset);
@@ -23307,7 +23313,7 @@ expand_setmem_epilogue (rtx destmem, rtx destptr, rtx value, rtx vec_value,
     }
   if (max_size > 16)
     {
-      rtx label = ix86_expand_aligntest (count, 16, true);
+      rtx_code_label *label = ix86_expand_aligntest (count, 16, true);
       if (TARGET_64BIT)
 	{
 	  dest = change_address (destmem, DImode, destptr);
@@ -23331,7 +23337,7 @@ expand_setmem_epilogue (rtx destmem, rtx destptr, rtx value, rtx vec_value,
     }
   if (max_size > 8)
     {
-      rtx label = ix86_expand_aligntest (count, 8, true);
+      rtx_code_label *label = ix86_expand_aligntest (count, 8, true);
       if (TARGET_64BIT)
 	{
 	  dest = change_address (destmem, DImode, destptr);
@@ -23349,7 +23355,7 @@ expand_setmem_epilogue (rtx destmem, rtx destptr, rtx value, rtx vec_value,
     }
   if (max_size > 4)
     {
-      rtx label = ix86_expand_aligntest (count, 4, true);
+      rtx_code_label *label = ix86_expand_aligntest (count, 4, true);
       dest = change_address (destmem, SImode, destptr);
       emit_insn (gen_strset (destptr, dest, gen_lowpart (SImode, value)));
       emit_label (label);
@@ -23357,7 +23363,7 @@ expand_setmem_epilogue (rtx destmem, rtx destptr, rtx value, rtx vec_value,
     }
   if (max_size > 2)
     {
-      rtx label = ix86_expand_aligntest (count, 2, true);
+      rtx_code_label *label = ix86_expand_aligntest (count, 2, true);
       dest = change_address (destmem, HImode, destptr);
       emit_insn (gen_strset (destptr, dest, gen_lowpart (HImode, value)));
       emit_label (label);
@@ -23365,7 +23371,7 @@ expand_setmem_epilogue (rtx destmem, rtx destptr, rtx value, rtx vec_value,
     }
   if (max_size > 1)
     {
-      rtx label = ix86_expand_aligntest (count, 1, true);
+      rtx_code_label *label = ix86_expand_aligntest (count, 1, true);
       dest = change_address (destmem, QImode, destptr);
       emit_insn (gen_strset (destptr, dest, gen_lowpart (QImode, value)));
       emit_label (label);
@@ -23389,7 +23395,7 @@ expand_set_or_movmem_prologue (rtx destmem, rtx srcmem,
     {
       if (align <= i)
 	{
-	  rtx label = ix86_expand_aligntest (destptr, i, false);
+	  rtx_code_label *label = ix86_expand_aligntest (destptr, i, false);
 	  if (issetmem)
 	    {
 	      if (vec_value && i > GET_MODE_SIZE (GET_MODE (value)))
@@ -23418,7 +23424,7 @@ expand_small_movmem_or_setmem (rtx destmem, rtx srcmem,
 			       rtx count, int size,
 			       rtx done_label, bool issetmem)
 {
-  rtx label = ix86_expand_aligntest (count, size, false);
+  rtx_code_label *label = ix86_expand_aligntest (count, size, false);
   enum machine_mode mode = mode_for_size (size * BITS_PER_UNIT, MODE_INT, 1);
   rtx modesize;
   int n;
@@ -23543,7 +23549,7 @@ expand_set_or_movmem_prologue_epilogue_by_misaligned_moves (rtx destmem, rtx src
 							    enum machine_mode mode,
 							    rtx value, rtx vec_value,
 							    rtx *count,
-							    rtx *done_label,
+							    rtx_code_label **done_label,
 							    int size,
 							    int desired_align,
 							    int align,
@@ -23551,7 +23557,7 @@ expand_set_or_movmem_prologue_epilogue_by_misaligned_moves (rtx destmem, rtx src
 							    bool dynamic_check,
 							    bool issetmem)
 {
-  rtx loop_label = NULL, label;
+  rtx_code_label *loop_label = NULL, *label;
   int n;
   rtx modesize;
   int prolog_size = 0;
@@ -24149,9 +24155,9 @@ ix86_expand_set_or_movmem (rtx dst, rtx src, rtx count_exp, rtx val_exp,
 {
   rtx destreg;
   rtx srcreg = NULL;
-  rtx label = NULL;
+  rtx_code_label *label = NULL;
   rtx tmp;
-  rtx jump_around_label = NULL;
+  rtx_code_label *jump_around_label = NULL;
   HOST_WIDE_INT align = 1;
   unsigned HOST_WIDE_INT count = 0;
   HOST_WIDE_INT expected_size = -1;
@@ -24425,7 +24431,7 @@ ix86_expand_set_or_movmem (rtx dst, rtx src, rtx count_exp, rtx val_exp,
 	}
       else
 	{
-	  rtx hot_label = gen_label_rtx ();
+	  rtx_code_label *hot_label = gen_label_rtx ();
 	  if (jump_around_label == NULL_RTX)
 	    jump_around_label = gen_label_rtx ();
 	  emit_cmp_and_jump_insns (count_exp, GEN_INT (dynamic_check - 1),
@@ -24623,10 +24629,10 @@ ix86_expand_strlensi_unroll_1 (rtx out, rtx src, rtx align_rtx)
 {
   int align;
   rtx tmp;
-  rtx align_2_label = NULL_RTX;
-  rtx align_3_label = NULL_RTX;
-  rtx align_4_label = gen_label_rtx ();
-  rtx end_0_label = gen_label_rtx ();
+  rtx_code_label *align_2_label = NULL;
+  rtx_code_label *align_3_label = NULL;
+  rtx_code_label *align_4_label = gen_label_rtx ();
+  rtx_code_label *end_0_label = gen_label_rtx ();
   rtx mem;
   rtx tmpreg = gen_reg_rtx (SImode);
   rtx scratch = gen_reg_rtx (SImode);
@@ -24750,7 +24756,7 @@ ix86_expand_strlensi_unroll_1 (rtx out, rtx src, rtx align_rtx)
     }
   else
     {
-       rtx end_2_label = gen_label_rtx ();
+       rtx_code_label *end_2_label = gen_label_rtx ();
        /* Is zero in the first two bytes? */
 
        emit_insn (gen_testsi_ccno_1 (tmpreg, GEN_INT (0x8080)));
@@ -39477,7 +39483,8 @@ x86_maybe_negate_const_int (rtx *loc, enum machine_mode mode)
 void
 x86_emit_floatuns (rtx operands[2])
 {
-  rtx neglab, donelab, i0, i1, f0, in, out;
+  rtx_code_label *neglab, *donelab;
+  rtx i0, i1, f0, in, out;
   enum machine_mode mode, inmode;
 
   inmode = GET_MODE (operands[1]);
@@ -41264,8 +41271,8 @@ ix86_emit_fp_unordered_jump (rtx label)
 
 void ix86_emit_i387_log1p (rtx op0, rtx op1)
 {
-  rtx label1 = gen_label_rtx ();
-  rtx label2 = gen_label_rtx ();
+  rtx_code_label *label1 = gen_label_rtx ();
+  rtx_code_label *label2 = gen_label_rtx ();
 
   rtx tmp = gen_reg_rtx (XFmode);
   rtx tmp2 = gen_reg_rtx (XFmode);
@@ -41299,7 +41306,7 @@ void ix86_emit_i387_round (rtx op0, rtx op1)
   rtx e1, e2, res, tmp, tmp1, half;
   rtx scratch = gen_reg_rtx (HImode);
   rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG);
-  rtx jump_label = gen_label_rtx ();
+  rtx_code_label *jump_label = gen_label_rtx ();
   rtx insn;
   rtx (*gen_abs) (rtx, rtx);
   rtx (*gen_neg) (rtx, rtx);
@@ -41735,12 +41742,13 @@ ix86_expand_sse_fabs (rtx op0, rtx *smask)
    swapping the operands if SWAP_OPERANDS is true.  The expanded
    code is a forward jump to a newly created label in case the
    comparison is true.  The generated label rtx is returned.  */
-static rtx
+static rtx_code_label *
 ix86_expand_sse_compare_and_jump (enum rtx_code code, rtx op0, rtx op1,
                                   bool swap_operands)
 {
   enum machine_mode fpcmp_mode = ix86_fp_compare_mode (code);
-  rtx label, tmp;
+  rtx_code_label *label;
+  rtx tmp;
 
   if (swap_operands)
     {
@@ -41844,7 +41852,8 @@ ix86_expand_lfloorceil (rtx op0, rtx op1, bool do_floor)
    */
   enum machine_mode fmode = GET_MODE (op1);
   enum machine_mode imode = GET_MODE (op0);
-  rtx ireg, freg, label, tmp;
+  rtx ireg, freg, tmp;
+  rtx_code_label *label;
 
   /* reg = (long)op1 */
   ireg = gen_reg_rtx (imode);
@@ -41880,7 +41889,8 @@ ix86_expand_rint (rtx operand0, rtx operand1)
         return copysign (xa, operand1);
    */
   enum machine_mode mode = GET_MODE (operand0);
-  rtx res, xa, label, TWO52, mask;
+  rtx res, xa, TWO52, mask;
+  rtx_code_label *label;
 
   res = gen_reg_rtx (mode);
   emit_move_insn (res, operand1);
@@ -41923,7 +41933,8 @@ ix86_expand_floorceildf_32 (rtx operand0, rtx operand1, bool do_floor)
         return x2;
    */
   enum machine_mode mode = GET_MODE (operand0);
-  rtx xa, TWO52, tmp, label, one, res, mask;
+  rtx xa, TWO52, tmp, one, res, mask;
+  rtx_code_label *label;
 
   TWO52 = ix86_gen_TWO52 (mode);
 
@@ -41986,7 +41997,8 @@ ix86_expand_floorceil (rtx operand0, rtx operand1, bool do_floor)
 	return x2;
    */
   enum machine_mode mode = GET_MODE (operand0);
-  rtx xa, xi, TWO52, tmp, label, one, res, mask;
+  rtx xa, xi, TWO52, tmp, one, res, mask;
+  rtx_code_label *label;
 
   TWO52 = ix86_gen_TWO52 (mode);
 
@@ -42049,7 +42061,8 @@ ix86_expand_rounddf_32 (rtx operand0, rtx operand1)
         return x2;
    */
   enum machine_mode mode = GET_MODE (operand0);
-  rtx xa, xa2, dxa, TWO52, tmp, label, half, mhalf, one, res, mask;
+  rtx xa, xa2, dxa, TWO52, tmp, half, mhalf, one, res, mask;
+  rtx_code_label *label;
 
   TWO52 = ix86_gen_TWO52 (mode);
 
@@ -42114,7 +42127,8 @@ ix86_expand_trunc (rtx operand0, rtx operand1)
 	return x2;
    */
   enum machine_mode mode = GET_MODE (operand0);
-  rtx xa, xi, TWO52, label, res, mask;
+  rtx xa, xi, TWO52, res, mask;
+  rtx_code_label *label;
 
   TWO52 = ix86_gen_TWO52 (mode);
 
@@ -42149,7 +42163,8 @@ void
 ix86_expand_truncdf_32 (rtx operand0, rtx operand1)
 {
   enum machine_mode mode = GET_MODE (operand0);
-  rtx xa, mask, TWO52, label, one, res, smask, tmp;
+  rtx xa, mask, TWO52, one, res, smask, tmp;
+  rtx_code_label *label;
 
   /* C code for SSE variant we expand below.
         double xa = fabs (x), x2;
@@ -42214,7 +42229,8 @@ ix86_expand_round (rtx operand0, rtx operand1)
         return copysign (xa, x);
    */
   enum machine_mode mode = GET_MODE (operand0);
-  rtx res, TWO52, xa, label, xi, half, mask;
+  rtx res, TWO52, xa, xi, half, mask;
+  rtx_code_label *label;
   const struct real_format *fmt;
   REAL_VALUE_TYPE pred_half, half_minus_pred_half;
 
-- 
1.8.5.3

[PATCH 082/236] ifcvt.c: Use rtx_insn

[David Malcolm]

gcc/
	* ifcvt.c (count_bb_insns): Strengthen local "insn" from rtx to
	rtx_insn *.
	(cheap_bb_rtx_cost_p): Likewise.
	(first_active_insn): Likewise for return type and local "insn".
	(last_active_insn):  Likewise for return type and locals "insn",
	"head".
	(struct noce_if_info): Likewise for fields "jump", "insn_a",
	"insn_b".
	(end_ifcvt_sequence): Likewise for return type and locals "insn",
	"seq".
	(noce_try_move): Likewise for local "seq".
	(noce_try_store_flag): Likewise.
	(noce_try_store_flag_constants): Likewise.
	(noce_try_addcc): Likewise.
	(noce_try_store_flag_mask): Likewise.
	(noce_try_cmove): Likewise.
	(noce_try_minmax): Likewise.
	(noce_try_abs): Likewise.
	(noce_try_sign_mask): Likewise.
	(noce_try_bitop): Likewise.
	(noce_can_store_speculate_p): Likewise for local "insn".
	(noce_process_if_block): Likewise for locals "insn_a", "insn_b",
	seq".
	(check_cond_move_block): Likewise for local "insn".
	(cond_move_convert_if_block): Likewise.
	(cond_move_process_if_block): Likewise for locals "seq",
	"loc_insn".
	(noce_find_if_block): Likewise for local "jump".
	(merge_if_block): Likewise for local "last".
	(block_jumps_and_fallthru_p): Likewise for locals "insn", "end".
	(find_cond_trap): Likewise for locals "trap", "jump", "newjump".
	(block_has_only_trap): Likewise for return type and local "trap".
	(find_if_case_1): Likewise for local "jump".
	(dead_or_predicable): Likewise for locals "head", "end", "jump",
	"insn".
---
 gcc/ifcvt.c | 136 ++++++++++++++++++++++++++++++++++--------------------------
 1 file changed, 78 insertions(+), 58 deletions(-)

diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index 3c127b1..c9cca6e 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -86,8 +86,8 @@ static int cond_exec_changed_p;
 /* Forward references.  */
 static int count_bb_insns (const_basic_block);
 static bool cheap_bb_rtx_cost_p (const_basic_block, int, int);
-static rtx first_active_insn (basic_block);
-static rtx last_active_insn (basic_block, int);
+static rtx_insn *first_active_insn (basic_block);
+static rtx_insn *last_active_insn (basic_block, int);
 static rtx find_active_insn_before (basic_block, rtx);
 static rtx find_active_insn_after (basic_block, rtx);
 static basic_block block_fallthru (basic_block);
@@ -106,7 +106,7 @@ static int find_if_case_2 (basic_block, edge, edge);
 static int dead_or_predicable (basic_block, basic_block, basic_block,
 			       edge, int);
 static void noce_emit_move_insn (rtx, rtx);
-static rtx block_has_only_trap (basic_block);
+static rtx_insn *block_has_only_trap (basic_block);
 \f
 /* Count the number of non-jump active insns in BB.  */
 
@@ -114,7 +114,7 @@ static int
 count_bb_insns (const_basic_block bb)
 {
   int count = 0;
-  rtx insn = BB_HEAD (bb);
+  rtx_insn *insn = BB_HEAD (bb);
 
   while (1)
     {
@@ -141,7 +141,7 @@ static bool
 cheap_bb_rtx_cost_p (const_basic_block bb, int scale, int max_cost)
 {
   int count = 0;
-  rtx insn = BB_HEAD (bb);
+  rtx_insn *insn = BB_HEAD (bb);
   bool speed = optimize_bb_for_speed_p (bb);
 
   /* Set scale to REG_BR_PROB_BASE to void the identical scaling
@@ -204,38 +204,38 @@ cheap_bb_rtx_cost_p (const_basic_block bb, int scale, int max_cost)
 
 /* Return the first non-jump active insn in the basic block.  */
 
-static rtx
+static rtx_insn *
 first_active_insn (basic_block bb)
 {
-  rtx insn = BB_HEAD (bb);
+  rtx_insn *insn = BB_HEAD (bb);
 
   if (LABEL_P (insn))
     {
       if (insn == BB_END (bb))
-	return NULL_RTX;
+	return NULL;
       insn = NEXT_INSN (insn);
     }
 
   while (NOTE_P (insn) || DEBUG_INSN_P (insn))
     {
       if (insn == BB_END (bb))
-	return NULL_RTX;
+	return NULL;
       insn = NEXT_INSN (insn);
     }
 
   if (JUMP_P (insn))
-    return NULL_RTX;
+    return NULL;
 
   return insn;
 }
 
 /* Return the last non-jump active (non-jump) insn in the basic block.  */
 
-static rtx
+static rtx_insn *
 last_active_insn (basic_block bb, int skip_use_p)
 {
-  rtx insn = BB_END (bb);
-  rtx head = BB_HEAD (bb);
+  rtx_insn *insn = BB_END (bb);
+  rtx_insn *head = BB_HEAD (bb);
 
   while (NOTE_P (insn)
 	 || JUMP_P (insn)
@@ -245,12 +245,12 @@ last_active_insn (basic_block bb, int skip_use_p)
 	     && GET_CODE (PATTERN (insn)) == USE))
     {
       if (insn == head)
-	return NULL_RTX;
+	return NULL;
       insn = PREV_INSN (insn);
     }
 
   if (LABEL_P (insn))
-    return NULL_RTX;
+    return NULL;
 
   return insn;
 }
@@ -756,7 +756,7 @@ struct noce_if_info
   basic_block test_bb, then_bb, else_bb, join_bb;
 
   /* The jump that ends TEST_BB.  */
-  rtx jump;
+  rtx_insn *jump;
 
   /* The jump condition.  */
   rtx cond;
@@ -770,7 +770,7 @@ struct noce_if_info
      COND_EARLIEST, or NULL_RTX.  In the former case, the insn
      operands are still valid, as if INSN_B was moved down below
      the jump.  */
-  rtx insn_a, insn_b;
+  rtx_insn *insn_a, *insn_b;
 
   /* The SET_SRC of INSN_A and INSN_B.  */
   rtx a, b;
@@ -983,11 +983,11 @@ noce_emit_move_insn (rtx x, rtx y)
    that are instructions are unshared, recognizable non-jump insns.
    On failure, this function returns a NULL_RTX.  */
 
-static rtx
+static rtx_insn *
 end_ifcvt_sequence (struct noce_if_info *if_info)
 {
-  rtx insn;
-  rtx seq = get_insns ();
+  rtx_insn *insn;
+  rtx_insn *seq = get_insns ();
 
   set_used_flags (if_info->x);
   set_used_flags (if_info->cond);
@@ -1003,7 +1003,7 @@ end_ifcvt_sequence (struct noce_if_info *if_info)
   for (insn = seq; insn; insn = NEXT_INSN (insn))
     if (JUMP_P (insn)
 	|| recog_memoized (insn) == -1)
-      return NULL_RTX;
+      return NULL;
 
   return seq;
 }
@@ -1016,7 +1016,8 @@ noce_try_move (struct noce_if_info *if_info)
 {
   rtx cond = if_info->cond;
   enum rtx_code code = GET_CODE (cond);
-  rtx y, seq;
+  rtx y;
+  rtx_insn *seq;
 
   if (code != NE && code != EQ)
     return FALSE;
@@ -1063,7 +1064,8 @@ static int
 noce_try_store_flag (struct noce_if_info *if_info)
 {
   int reversep;
-  rtx target, seq;
+  rtx target;
+  rtx_insn *seq;
 
   if (CONST_INT_P (if_info->b)
       && INTVAL (if_info->b) == STORE_FLAG_VALUE
@@ -1106,7 +1108,8 @@ noce_try_store_flag (struct noce_if_info *if_info)
 static int
 noce_try_store_flag_constants (struct noce_if_info *if_info)
 {
-  rtx target, seq;
+  rtx target;
+  rtx_insn *seq;
   int reversep;
   HOST_WIDE_INT itrue, ifalse, diff, tmp;
   int normalize, can_reverse;
@@ -1236,7 +1239,8 @@ noce_try_store_flag_constants (struct noce_if_info *if_info)
 static int
 noce_try_addcc (struct noce_if_info *if_info)
 {
-  rtx target, seq;
+  rtx target;
+  rtx_insn *seq;
   int subtract, normalize;
 
   if (GET_CODE (if_info->a) == PLUS
@@ -1326,7 +1330,8 @@ noce_try_addcc (struct noce_if_info *if_info)
 static int
 noce_try_store_flag_mask (struct noce_if_info *if_info)
 {
-  rtx target, seq;
+  rtx target;
+  rtx_insn *seq;
   int reversep;
 
   reversep = 0;
@@ -1486,7 +1491,8 @@ static int
 noce_try_cmove (struct noce_if_info *if_info)
 {
   enum rtx_code code;
-  rtx target, seq;
+  rtx target;
+  rtx_insn *seq;
 
   if ((CONSTANT_P (if_info->a) || register_operand (if_info->a, VOIDmode))
       && (CONSTANT_P (if_info->b) || register_operand (if_info->b, VOIDmode)))
@@ -1876,7 +1882,8 @@ noce_get_alt_condition (struct noce_if_info *if_info, rtx target,
 static int
 noce_try_minmax (struct noce_if_info *if_info)
 {
-  rtx cond, earliest, target, seq;
+  rtx cond, earliest, target;
+  rtx_insn *seq;
   enum rtx_code code, op;
   int unsignedp;
 
@@ -1971,7 +1978,8 @@ noce_try_minmax (struct noce_if_info *if_info)
 static int
 noce_try_abs (struct noce_if_info *if_info)
 {
-  rtx cond, earliest, target, seq, a, b, c;
+  rtx cond, earliest, target, a, b, c;
+  rtx_insn *seq;
   int negate;
   bool one_cmpl = false;
 
@@ -2116,7 +2124,8 @@ noce_try_abs (struct noce_if_info *if_info)
 static int
 noce_try_sign_mask (struct noce_if_info *if_info)
 {
-  rtx cond, t, m, c, seq;
+  rtx cond, t, m, c;
+  rtx_insn *seq;
   enum machine_mode mode;
   enum rtx_code code;
   bool t_unconditional;
@@ -2194,7 +2203,8 @@ noce_try_sign_mask (struct noce_if_info *if_info)
 static int
 noce_try_bitop (struct noce_if_info *if_info)
 {
-  rtx cond, x, a, result, seq;
+  rtx cond, x, a, result;
+  rtx_insn *seq;
   enum machine_mode mode;
   enum rtx_code code;
   int bitnum;
@@ -2429,7 +2439,7 @@ noce_can_store_speculate_p (basic_block top_bb, const_rtx mem)
        dominator != NULL;
        dominator = get_immediate_dominator (CDI_POST_DOMINATORS, dominator))
     {
-      rtx insn;
+      rtx_insn *insn;
 
       FOR_BB_INSNS (dominator, insn)
 	{
@@ -2466,7 +2476,7 @@ noce_process_if_block (struct noce_if_info *if_info)
   basic_block join_bb = if_info->join_bb;	/* JOIN */
   rtx jump = if_info->jump;
   rtx cond = if_info->cond;
-  rtx insn_a, insn_b;
+  rtx_insn *insn_a, *insn_b;
   rtx set_a, set_b;
   rtx orig_x, x, a, b;
 
@@ -2533,7 +2543,10 @@ noce_process_if_block (struct noce_if_info *if_info)
 	  || reg_overlap_mentioned_p (x, cond)
 	  || reg_overlap_mentioned_p (x, a)
 	  || modified_between_p (x, insn_b, jump))
-	insn_b = set_b = NULL_RTX;
+	{
+	  insn_b = NULL;
+	  set_b = NULL_RTX;
+	}
     }
 
   /* If x has side effects then only the if-then-else form is safe to
@@ -2602,7 +2615,7 @@ noce_process_if_block (struct noce_if_info *if_info)
 	  if ((note = find_reg_note (insn_b, REG_EQUAL, NULL_RTX)) != 0)
 	    remove_note (insn_b, note);
 
-	  insn_b = NULL_RTX;
+	  insn_b = NULL;
 	}
       /* If we have "x = b; if (...) x = a;", and x has side-effects, then
 	 x must be executed twice.  */
@@ -2669,7 +2682,8 @@ noce_process_if_block (struct noce_if_info *if_info)
 
   if (!else_bb && set_b)
     {
-      insn_b = set_b = NULL_RTX;
+      insn_b = NULL;
+      set_b = NULL_RTX;
       b = orig_x;
       goto retry;
     }
@@ -2681,7 +2695,7 @@ noce_process_if_block (struct noce_if_info *if_info)
   /* If we used a temporary, fix it up now.  */
   if (orig_x != x)
     {
-      rtx seq;
+      rtx_insn *seq;
 
       start_sequence ();
       noce_emit_move_insn (orig_x, x);
@@ -2731,7 +2745,7 @@ check_cond_move_block (basic_block bb,
 		       vec<rtx> *regs,
 		       rtx cond)
 {
-  rtx insn;
+  rtx_insn *insn;
 
    /* We can only handle simple jumps at the end of the basic block.
       It is almost impossible to update the CFG otherwise.  */
@@ -2814,7 +2828,8 @@ cond_move_convert_if_block (struct noce_if_info *if_infop,
 			    bool else_block_p)
 {
   enum rtx_code code;
-  rtx insn, cond_arg0, cond_arg1;
+  rtx_insn *insn;
+  rtx cond_arg0, cond_arg1;
 
   code = GET_CODE (cond);
   cond_arg0 = XEXP (cond, 0);
@@ -2879,7 +2894,7 @@ cond_move_process_if_block (struct noce_if_info *if_info)
   basic_block join_bb = if_info->join_bb;
   rtx jump = if_info->jump;
   rtx cond = if_info->cond;
-  rtx seq, loc_insn;
+  rtx_insn *seq, *loc_insn;
   rtx reg;
   int c;
   struct pointer_map_t *then_vals;
@@ -3010,7 +3025,8 @@ noce_find_if_block (basic_block test_bb, edge then_edge, edge else_edge,
 {
   basic_block then_bb, else_bb, join_bb;
   bool then_else_reversed = false;
-  rtx jump, cond;
+  rtx_insn *jump;
+  rtx cond;
   rtx cond_earliest;
   struct noce_if_info if_info;
 
@@ -3206,7 +3222,7 @@ merge_if_block (struct ce_if_block * ce_info)
 
   if (! join_bb)
     {
-      rtx last = BB_END (combo_bb);
+      rtx_insn *last = BB_END (combo_bb);
 
       /* The outgoing edge for the current COMBO block should already
 	 be correct.  Verify this.  */
@@ -3361,8 +3377,8 @@ block_jumps_and_fallthru_p (basic_block cur_bb, basic_block target_bb)
   edge cur_edge;
   int fallthru_p = FALSE;
   int jump_p = FALSE;
-  rtx insn;
-  rtx end;
+  rtx_insn *insn;
+  rtx_insn *end;
   int n_insns = 0;
   edge_iterator ei;
 
@@ -3664,7 +3680,8 @@ find_cond_trap (basic_block test_bb, edge then_edge, edge else_edge)
   basic_block then_bb = then_edge->dest;
   basic_block else_bb = else_edge->dest;
   basic_block other_bb, trap_bb;
-  rtx trap, jump, cond, cond_earliest, seq;
+  rtx_insn *trap, *jump;
+  rtx cond, cond_earliest, seq;
   enum rtx_code code;
 
   /* Locate the block with the trap instruction.  */
@@ -3734,7 +3751,8 @@ find_cond_trap (basic_block test_bb, edge then_edge, edge else_edge)
     single_succ_edge (test_bb)->flags |= EDGE_FALLTHRU;
   else if (trap_bb == then_bb)
     {
-      rtx lab, newjump;
+      rtx lab;
+      rtx_insn *newjump;
 
       lab = JUMP_LABEL (jump);
       newjump = emit_jump_insn_after (gen_jump (lab), jump);
@@ -3757,25 +3775,25 @@ find_cond_trap (basic_block test_bb, edge then_edge, edge else_edge)
 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
    return it.  */
 
-static rtx
+static rtx_insn *
 block_has_only_trap (basic_block bb)
 {
-  rtx trap;
+  rtx_insn *trap;
 
   /* We're not the exit block.  */
   if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
-    return NULL_RTX;
+    return NULL;
 
   /* The block must have no successors.  */
   if (EDGE_COUNT (bb->succs) > 0)
-    return NULL_RTX;
+    return NULL;
 
   /* The only instruction in the THEN block must be the trap.  */
   trap = first_active_insn (bb);
   if (! (trap == BB_END (bb)
 	 && GET_CODE (PATTERN (trap)) == TRAP_IF
          && TRAP_CONDITION (PATTERN (trap)) == const_true_rtx))
-    return NULL_RTX;
+    return NULL;
 
   return trap;
 }
@@ -3923,7 +3941,7 @@ find_if_case_1 (basic_block test_bb, edge then_edge, edge else_edge)
 
   if (else_bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
     {
-      rtx jump = BB_END (else_edge->src);
+      rtx_insn *jump = BB_END (else_edge->src);
       gcc_assert (JUMP_P (jump));
       else_target = JUMP_LABEL (jump);
     }
@@ -4098,7 +4116,8 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
 		    basic_block other_bb, edge dest_edge, int reversep)
 {
   basic_block new_dest = dest_edge->dest;
-  rtx head, end, jump, earliest = NULL_RTX, old_dest;
+  rtx_insn *head, *end, *jump;
+  rtx earliest = NULL_RTX, old_dest;
   bitmap merge_set = NULL;
   /* Number of pending changes.  */
   int n_validated_changes = 0;
@@ -4128,7 +4147,7 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
     {
       if (head == end)
 	{
-	  head = end = NULL_RTX;
+	  head = end = NULL;
 	  goto no_body;
 	}
       head = NEXT_INSN (head);
@@ -4140,7 +4159,7 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
     {
       if (head == end)
 	{
-	  head = end = NULL_RTX;
+	  head = end = NULL;
 	  goto no_body;
 	}
       end = PREV_INSN (end);
@@ -4152,7 +4171,7 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
      can lead to one of the paths of the branch having wrong unwind info.  */
   if (epilogue_completed)
     {
-      rtx insn = head;
+      rtx_insn *insn = head;
       while (1)
 	{
 	  if (INSN_P (insn) && RTX_FRAME_RELATED_P (insn))
@@ -4213,7 +4232,8 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
   /* Try the NCE path if the CE path did not result in any changes.  */
   if (n_validated_changes == 0)
     {
-      rtx cond, insn;
+      rtx cond;
+      rtx_insn *insn;
       regset live;
       bool success;
 
@@ -4356,7 +4376,7 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
   /* Move the insns out of MERGE_BB to before the branch.  */
   if (head != NULL)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       if (end == BB_END (merge_bb))
 	SET_BB_END (merge_bb) = PREV_INSN (head);
-- 
1.8.5.3

[PATCH 108/236] reload: Use rtx_insn (also touches caller-save.c and config/arc/arc)

[David Malcolm]

gcc/
	* reload.h (struct insn_chain): Strengthen field "insn" from rtx
	to rtx_insn *.
	(find_reloads): Likewise for param 1.
	(subst_reloads): Likewise for sole param.
	(find_equiv_reg): Likwise for param 2.
	(regno_clobbered_p): Likwise for param 2.
	(reload): Likewise for param 1.

	* caller-save.c (save_call_clobbered_regs): Strengthen local
	"insn" from rtx to rtx_insn *.
	(insert_one_insn): Likewise for local "insn".

	* reload.c (this_insn): Likewise for this global.
	(find_reloads): Likewise for param "insn".
	(find_reloads_toplev): Likewise.
	(find_reloads_address): Likewise.
	(subst_reg_equivs): Likewise.
	(update_auto_inc_notes): Likewise.
	(find_reloads_address_1): Likewise.
	(find_reloads_subreg_address): Likewise.
	(subst_reloads): Likewise.
	(find_equiv_reg): Likewise, also for local "p".
	(regno_clobbered_p): Likewise for param "insn".

	* reload1.c (reg_reloaded_insn): Likewise for the elements of this
	array.
	(spill_reg_store): Likewise for the elements of this array.
	(remove_init_insns): Likewise for local "equiv_insn".
	(will_delete_init_insn_p): Likewise for param "insn".
	(reload): Likewise for param ""first" and local "insn".
	(calculate_needs_all_insns): Strengthen local "insn" from rtx to
	rtx_insn *.
	(calculate_elim_costs_all_insns): Likewise.
	(delete_caller_save_insns): Likewise.
	(spill_failure): Likewise for param "insn".
	(delete_dead_insn): Likewise.
	(set_label_offsets): Likewise.
	(eliminate_regs_in_insn): Likewise, also for locals "base_insn" and
	"prev_insn".
	(elimination_costs_in_insn): Likewise for param "insn".
	(set_initial_eh_label_offset): Replace use of NULL_RTX with NULL
	when referring to an insn.
	(set_initial_label_offsets): Likewise.
	(set_offsets_for_label): Strengthen param "insn" from rtx to
	rtx_insn *.
	(init_eliminable_invariants): Likewise for param "first" and local
	"insn".
	(fixup_eh_region_note): Likewise for param "insn".
	(reload_as_needed): Likewise for locals "prev", "insn",
	"old_next", "old_prev", "next".
	(gen_reload_chain_without_interm_reg_p): Likewise for locals "insn",
	"last".
	(reload_inheritance_insn): Strengthen elements of this array from
	rtx to rtx_insn *.
	(failed_reload): Likewise for param "insn".
	(choose_reload_regs): Likewise for local "insn".  Replace use of
	NULL_RTX with NULL when referring to an insn.
	(input_reload_insns): Strengthen elements of this array from rtx
	to rtx_insn *.
	(other_input_address_reload_insns): Likewise for this global.
	(other_input_reload_insns): Likewise for this global.
	(input_address_reload_insns): Likwise for the elements of this
	array.
	(inpaddr_address_reload_insns): Likwise for the elements of this
	array.
	(output_reload_insns): Likewise for the elements of this array.
	(output_address_reload_insns): Likewise for the elements of this
	array.
	(outaddr_address_reload_insns): Likewise for the elements of this
	array.
	(operand_reload_insns): Likewise for this global.
	(other_operand_reload_insns): Likewise for this global.
	(other_output_reload_insns): Likewise for the elements of this
	array.
	(new_spill_reg_store): Likewise for the elements of this
	array.
	(emit_input_reload_insns): Likewise for locals "insn", "temp".
	Strengthen local "where" from rtx * to rtx_insn **.
	(emit_output_reload_insns): Strengthen locals "insn", "p", "next"
	from rtx to rtx_insn *.
	(do_input_reload): Likewise for local "insn".
	(do_output_reload): Likewise for local "insn".
	(emit_reload_insns): Likewise for locals "insn" and "store_insn".
	(emit_insn_if_valid_for_reload): Likewise for return type and local
	"last".  Add checked cast to rtx_insn when returning "insn" since
	this has been through emit_insn.
	(gen_reload): Strengthen return type and locals "last", "insn", "set"
	from rtx to rtx_insn *.  Add checked cast to rtx_insn when
	returning "insn" since it's been through
	emit_insn_if_valid_for_reload at this point.
	(delete_output_reload): Strengthen param "insn" and locals
	"output_reload_insn", "i2" from rtx to rtx_insn *.
	(delete_address_reloads): Likewise for params "dead_insn",
	"current_insn" and locals "prev", "next".
	(delete_address_reloads_1): Likewise for params "dead_insn",
	"current_insn" and locals "prev", "i2".
	(inc_for_reload): Likewise for locals "last", "add_insn".
	(add_auto_inc_notes): Strengthen param "insn" from rtx to
	rtx_insn *.

	* config/arc/arc-protos.h (regno_clobbered_p): Likewise for 2nd
	param of this duplicate of the prototype from reload.h
---
 gcc/caller-save.c           |   4 +-
 gcc/config/arc/arc-protos.h |   2 +-
 gcc/reload.c                |  39 +++++-----
 gcc/reload.h                |  12 +--
 gcc/reload1.c               | 185 +++++++++++++++++++++++---------------------
 5 files changed, 125 insertions(+), 117 deletions(-)

diff --git a/gcc/caller-save.c b/gcc/caller-save.c
index fd936ba..03d22a0 100644
--- a/gcc/caller-save.c
+++ b/gcc/caller-save.c
@@ -755,7 +755,7 @@ save_call_clobbered_regs (void)
 
   for (chain = reload_insn_chain; chain != 0; chain = next)
     {
-      rtx insn = chain->insn;
+      rtx_insn *insn = chain->insn;
       enum rtx_code code = GET_CODE (insn);
 
       next = chain->next;
@@ -1372,7 +1372,7 @@ add_used_regs (rtx *loc, void *data)
 static struct insn_chain *
 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
 {
-  rtx insn = chain->insn;
+  rtx_insn *insn = chain->insn;
   struct insn_chain *new_chain;
 
 #ifdef HAVE_cc0
diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h
index dd54fa8..f675972 100644
--- a/gcc/config/arc/arc-protos.h
+++ b/gcc/config/arc/arc-protos.h
@@ -113,6 +113,6 @@ extern int arc_decl_pretend_args (tree decl);
 extern bool arc_short_comparison_p (rtx, int);
 extern bool arc_epilogue_uses (int regno);
 /* insn-attrtab.c doesn't include reload.h, which declares regno_clobbered_p. */
-extern int regno_clobbered_p (unsigned int, rtx, enum machine_mode, int);
+extern int regno_clobbered_p (unsigned int, rtx_insn *, enum machine_mode, int);
 extern int arc_return_slot_offset (void);
 extern bool arc_legitimize_reload_address (rtx *, enum machine_mode, int, int);
diff --git a/gcc/reload.c b/gcc/reload.c
index 87c453c..5a02663 100644
--- a/gcc/reload.c
+++ b/gcc/reload.c
@@ -191,7 +191,7 @@ static int secondary_memlocs_elim_used = 0;
 
 /* The instruction we are doing reloads for;
    so we can test whether a register dies in it.  */
-static rtx this_insn;
+static rtx_insn *this_insn;
 
 /* Nonzero if this instruction is a user-specified asm with operands.  */
 static int this_insn_is_asm;
@@ -264,24 +264,24 @@ static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
 static struct decomposition decompose (rtx);
 static int immune_p (rtx, rtx, struct decomposition);
 static bool alternative_allows_const_pool_ref (rtx, const char *, int);
-static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
-				int *);
+static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int,
+				rtx_insn *, int *);
 static rtx make_memloc (rtx, int);
 static int maybe_memory_address_addr_space_p (enum machine_mode, rtx,
 					      addr_space_t, rtx *);
 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
-				 int, enum reload_type, int, rtx);
-static rtx subst_reg_equivs (rtx, rtx);
+				 int, enum reload_type, int, rtx_insn *);
+static rtx subst_reg_equivs (rtx, rtx_insn *);
 static rtx subst_indexed_address (rtx);
-static void update_auto_inc_notes (rtx, int, int);
+static void update_auto_inc_notes (rtx_insn *, int, int);
 static int find_reloads_address_1 (enum machine_mode, addr_space_t, rtx, int,
 				   enum rtx_code, enum rtx_code, rtx *,
-				   int, enum reload_type,int, rtx);
+				   int, enum reload_type,int, rtx_insn *);
 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
 				       enum machine_mode, int,
 				       enum reload_type, int);
 static rtx find_reloads_subreg_address (rtx, int, enum reload_type,
-					int, rtx, int *);
+					int, rtx_insn *, int *);
 static void copy_replacements_1 (rtx *, rtx *, int);
 static int find_inc_amount (rtx, rtx);
 static int refers_to_mem_for_reload_p (rtx);
@@ -2617,7 +2617,7 @@ safe_from_earlyclobber (rtx op, rtx clobber)
    commutative operands, reg_equiv_address substitution, or whatever.  */
 
 int
-find_reloads (rtx insn, int replace, int ind_levels, int live_known,
+find_reloads (rtx_insn *insn, int replace, int ind_levels, int live_known,
 	      short *reload_reg_p)
 {
   int insn_code_number;
@@ -4720,7 +4720,7 @@ alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED,
 
 static rtx
 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
-		     int ind_levels, int is_set_dest, rtx insn,
+		     int ind_levels, int is_set_dest, rtx_insn *insn,
 		     int *address_reloaded)
 {
   RTX_CODE code = GET_CODE (x);
@@ -4928,7 +4928,7 @@ maybe_memory_address_addr_space_p (enum machine_mode mode, rtx ad,
 static int
 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
 		      rtx *loc, int opnum, enum reload_type type,
-		      int ind_levels, rtx insn)
+		      int ind_levels, rtx_insn *insn)
 {
   addr_space_t as = memrefloc? MEM_ADDR_SPACE (*memrefloc)
 			     : ADDR_SPACE_GENERIC;
@@ -5330,7 +5330,7 @@ find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
    front of it for pseudos that we have to replace with stack slots.  */
 
 static rtx
-subst_reg_equivs (rtx ad, rtx insn)
+subst_reg_equivs (rtx ad, rtx_insn *insn)
 {
   RTX_CODE code = GET_CODE (ad);
   int i;
@@ -5506,7 +5506,7 @@ subst_indexed_address (rtx addr)
    RELOADNUM is the reload number.  */
 
 static void
-update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
+update_auto_inc_notes (rtx_insn *insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
 		       int reloadnum ATTRIBUTE_UNUSED)
 {
 #ifdef AUTO_INC_DEC
@@ -5554,7 +5554,7 @@ find_reloads_address_1 (enum machine_mode mode, addr_space_t as,
 			rtx x, int context,
 			enum rtx_code outer_code, enum rtx_code index_code,
 			rtx *loc, int opnum, enum reload_type type,
-			int ind_levels, rtx insn)
+			int ind_levels, rtx_insn *insn)
 {
 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, AS, OUTER, INDEX)	\
   ((CONTEXT) == 0							\
@@ -6188,7 +6188,8 @@ find_reloads_address_part (rtx x, rtx *loc, enum reg_class rclass,
 
 static rtx
 find_reloads_subreg_address (rtx x, int opnum, enum reload_type type,
-			     int ind_levels, rtx insn, int *address_reloaded)
+			     int ind_levels, rtx_insn *insn,
+			     int *address_reloaded)
 {
   enum machine_mode outer_mode = GET_MODE (x);
   enum machine_mode inner_mode = GET_MODE (SUBREG_REG (x));
@@ -6297,7 +6298,7 @@ find_reloads_subreg_address (rtx x, int opnum, enum reload_type type,
    Return the rtx that X translates into; usually X, but modified.  */
 
 void
-subst_reloads (rtx insn)
+subst_reloads (rtx_insn *insn)
 {
   int i;
 
@@ -6724,10 +6725,10 @@ refers_to_mem_for_reload_p (rtx x)
    as if it were a constant except that sp is required to be unchanging.  */
 
 rtx
-find_equiv_reg (rtx goal, rtx insn, enum reg_class rclass, int other,
+find_equiv_reg (rtx goal, rtx_insn *insn, enum reg_class rclass, int other,
 		short *reload_reg_p, int goalreg, enum machine_mode mode)
 {
-  rtx p = insn;
+  rtx_insn *p = insn;
   rtx goaltry, valtry, value, where;
   rtx pat;
   int regno = -1;
@@ -7260,7 +7261,7 @@ reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
    REG_INC.  REGNO must refer to a hard register.  */
 
 int
-regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
+regno_clobbered_p (unsigned int regno, rtx_insn *insn, enum machine_mode mode,
 		   int sets)
 {
   unsigned int nregs, endregno;
diff --git a/gcc/reload.h b/gcc/reload.h
index 65fa29c..ea9081f 100644
--- a/gcc/reload.h
+++ b/gcc/reload.h
@@ -285,7 +285,7 @@ struct insn_chain
   struct insn_chain *next_need_reload;
 
   /* The rtx of the insn.  */
-  rtx insn;
+  rtx_insn *insn;
 
   /* The basic block this insn is in.  */
   int block;
@@ -364,7 +364,7 @@ extern int safe_from_earlyclobber (rtx, rtx);
 /* Search the body of INSN for values that need reloading and record them
    with push_reload.  REPLACE nonzero means record also where the values occur
    so that subst_reloads can be used.  */
-extern int find_reloads (rtx, int, int, int, short *);
+extern int find_reloads (rtx_insn *, int, int, int, short *);
 
 /* Compute the sum of X and Y, making canonicalizations assumed in an
    address, namely: sum constant integers, surround the sum of two
@@ -374,7 +374,7 @@ extern rtx form_sum (enum machine_mode, rtx, rtx);
 
 /* Substitute into the current INSN the registers into which we have reloaded
    the things that need reloading.  */
-extern void subst_reloads (rtx);
+extern void subst_reloads (rtx_insn *);
 
 /* Make a copy of any replacements being done into X and move those copies
    to locations in Y, a copy of X.  We only look at the highest level of
@@ -393,11 +393,11 @@ extern int reg_overlap_mentioned_for_reload_p (rtx, rtx);
 
 /* Check the insns before INSN to see if there is a suitable register
    containing the same value as GOAL.  */
-extern rtx find_equiv_reg (rtx, rtx, enum reg_class, int, short *,
+extern rtx find_equiv_reg (rtx, rtx_insn *, enum reg_class, int, short *,
 			   int, enum machine_mode);
 
 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.  */
-extern int regno_clobbered_p (unsigned int, rtx, enum machine_mode, int);
+extern int regno_clobbered_p (unsigned int, rtx_insn *, enum machine_mode, int);
 
 /* Return 1 if X is an operand of an insn that is being earlyclobbered.  */
 extern int earlyclobber_operand_p (rtx);
@@ -413,7 +413,7 @@ extern int push_reload (rtx, rtx, rtx *, rtx *, enum reg_class,
 extern void init_reload (void);
 
 /* The reload pass itself.  */
-extern bool reload (rtx, int);
+extern bool reload (rtx_insn *, int);
 
 /* Mark the slots in regs_ever_live for the hard regs
    used by pseudo-reg number REGNO.  */
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 940fa67..6f9ec47 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -115,7 +115,7 @@ static int reg_reloaded_contents[FIRST_PSEUDO_REGISTER];
 /* During reload_as_needed, element N contains the insn for which
    hard register N was last used.   Its contents are significant only
    when reg_reloaded_valid is set for this register.  */
-static rtx reg_reloaded_insn[FIRST_PSEUDO_REGISTER];
+static rtx_insn *reg_reloaded_insn[FIRST_PSEUDO_REGISTER];
 
 /* Indicate if reg_reloaded_insn / reg_reloaded_contents is valid.  */
 static HARD_REG_SET reg_reloaded_valid;
@@ -140,7 +140,7 @@ static rtx spill_reg_rtx[FIRST_PSEUDO_REGISTER];
 /* In parallel with spill_regs, contains nonzero for a spill reg
    that was stored after the last time it was used.
    The precise value is the insn generated to do the store.  */
-static rtx spill_reg_store[FIRST_PSEUDO_REGISTER];
+static rtx_insn *spill_reg_store[FIRST_PSEUDO_REGISTER];
 
 /* This is the register that was stored with spill_reg_store.  This is a
    copy of reload_out / reload_out_reg when the value was stored; if
@@ -354,27 +354,27 @@ static void find_reload_regs (struct insn_chain *);
 static void select_reload_regs (void);
 static void delete_caller_save_insns (void);
 
-static void spill_failure (rtx, enum reg_class);
+static void spill_failure (rtx_insn *, enum reg_class);
 static void count_spilled_pseudo (int, int, int);
-static void delete_dead_insn (rtx);
+static void delete_dead_insn (rtx_insn *);
 static void alter_reg (int, int, bool);
-static void set_label_offsets (rtx, rtx, int);
+static void set_label_offsets (rtx, rtx_insn *, int);
 static void check_eliminable_occurrences (rtx);
 static void elimination_effects (rtx, enum machine_mode);
 static rtx eliminate_regs_1 (rtx, enum machine_mode, rtx, bool, bool);
-static int eliminate_regs_in_insn (rtx, int);
+static int eliminate_regs_in_insn (rtx_insn *, int);
 static void update_eliminable_offsets (void);
 static void mark_not_eliminable (rtx, const_rtx, void *);
 static void set_initial_elim_offsets (void);
 static bool verify_initial_elim_offsets (void);
 static void set_initial_label_offsets (void);
-static void set_offsets_for_label (rtx);
-static void init_eliminable_invariants (rtx, bool);
+static void set_offsets_for_label (rtx_insn *);
+static void init_eliminable_invariants (rtx_insn *, bool);
 static void init_elim_table (void);
 static void free_reg_equiv (void);
 static void update_eliminables (HARD_REG_SET *);
 static bool update_eliminables_and_spill (void);
-static void elimination_costs_in_insn (rtx);
+static void elimination_costs_in_insn (rtx_insn *);
 static void spill_hard_reg (unsigned int, int);
 static int finish_spills (int);
 static void scan_paradoxical_subregs (rtx);
@@ -395,7 +395,7 @@ static int free_for_value_p (int, enum machine_mode, int, enum reload_type,
 			     rtx, rtx, int, int);
 static int allocate_reload_reg (struct insn_chain *, int, int);
 static int conflicts_with_override (rtx);
-static void failed_reload (rtx, int);
+static void failed_reload (rtx_insn *, int);
 static int set_reload_reg (int, int);
 static void choose_reload_regs_init (struct insn_chain *, rtx *);
 static void choose_reload_regs (struct insn_chain *);
@@ -406,18 +406,18 @@ static void emit_output_reload_insns (struct insn_chain *, struct reload *,
 static void do_input_reload (struct insn_chain *, struct reload *, int);
 static void do_output_reload (struct insn_chain *, struct reload *, int);
 static void emit_reload_insns (struct insn_chain *);
-static void delete_output_reload (rtx, int, int, rtx);
-static void delete_address_reloads (rtx, rtx);
-static void delete_address_reloads_1 (rtx, rtx, rtx);
+static void delete_output_reload (rtx_insn *, int, int, rtx);
+static void delete_address_reloads (rtx_insn *, rtx_insn *);
+static void delete_address_reloads_1 (rtx_insn *, rtx, rtx_insn *);
 static void inc_for_reload (rtx, rtx, rtx, int);
 #ifdef AUTO_INC_DEC
-static void add_auto_inc_notes (rtx, rtx);
+static void add_auto_inc_notes (rtx_insn *, rtx);
 #endif
 static void substitute (rtx *, const_rtx, rtx);
 static bool gen_reload_chain_without_interm_reg_p (int, int);
 static int reloads_conflict (int, int);
-static rtx gen_reload (rtx, rtx, int, enum reload_type);
-static rtx emit_insn_if_valid_for_reload (rtx);
+static rtx_insn *gen_reload (rtx, rtx, int, enum reload_type);
+static rtx_insn *emit_insn_if_valid_for_reload (rtx);
 \f
 /* Initialize the reload pass.  This is called at the beginning of compilation
    and may be called again if the target is reinitialized.  */
@@ -702,7 +702,7 @@ remove_init_insns ()
 	  rtx list;
 	  for (list = reg_equiv_init (i); list; list = XEXP (list, 1))
 	    {
-	      rtx equiv_insn = XEXP (list, 0);
+	      rtx_insn *equiv_insn = as_a <rtx_insn *> (XEXP (list, 0));
 
 	      /* If we already deleted the insn or if it may trap, we can't
 		 delete it.  The latter case shouldn't happen, but can
@@ -723,7 +723,7 @@ remove_init_insns ()
 
 /* Return true if remove_init_insns will delete INSN.  */
 static bool
-will_delete_init_insn_p (rtx insn)
+will_delete_init_insn_p (rtx_insn *insn)
 {
   rtx set = single_set (insn);
   if (!set || !REG_P (SET_DEST (set)))
@@ -760,10 +760,10 @@ will_delete_init_insn_p (rtx insn)
    return value is FALSE.  */
 
 bool
-reload (rtx first, int global)
+reload (rtx_insn *first, int global)
 {
   int i, n;
-  rtx insn;
+  rtx_insn *insn;
   struct elim_table *ep;
   basic_block bb;
   bool inserted;
@@ -1488,7 +1488,7 @@ calculate_needs_all_insns (int global)
   reload_insn_firstobj = XOBNEWVAR (&reload_obstack, char, 0);
   for (chain = reload_insn_chain; chain != 0; chain = next)
     {
-      rtx insn = chain->insn;
+      rtx_insn *insn = chain->insn;
 
       next = chain->next;
 
@@ -1618,7 +1618,7 @@ calculate_elim_costs_all_insns (void)
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
       elim_bb = bb;
 
       FOR_BB_INSNS (bb, insn)
@@ -2088,7 +2088,7 @@ delete_caller_save_insns (void)
       while (c != 0 && c->is_caller_save_insn)
 	{
 	  struct insn_chain *next = c->next;
-	  rtx insn = c->insn;
+	  rtx_insn *insn = c->insn;
 
 	  if (c == reload_insn_chain)
 	    reload_insn_chain = next;
@@ -2111,7 +2111,7 @@ delete_caller_save_insns (void)
    INSN should be one of the insns which needed this particular spill reg.  */
 
 static void
-spill_failure (rtx insn, enum reg_class rclass)
+spill_failure (rtx_insn *insn, enum reg_class rclass)
 {
   if (asm_noperands (PATTERN (insn)) >= 0)
     error_for_asm (insn, "can%'t find a register in class %qs while "
@@ -2135,9 +2135,9 @@ spill_failure (rtx insn, enum reg_class rclass)
    data that is dead in INSN.  */
 
 static void
-delete_dead_insn (rtx insn)
+delete_dead_insn (rtx_insn *insn)
 {
-  rtx prev = prev_active_insn (insn);
+  rtx_insn *prev = prev_active_insn (insn);
   rtx prev_dest;
 
   /* If the previous insn sets a register that dies in our insn make
@@ -2357,7 +2357,7 @@ mark_home_live (int regno)
    current offset.  */
 
 static void
-set_label_offsets (rtx x, rtx insn, int initial_p)
+set_label_offsets (rtx x, rtx_insn *insn, int initial_p)
 {
   enum rtx_code code = GET_CODE (x);
   rtx tem;
@@ -3231,7 +3231,7 @@ check_eliminable_occurrences (rtx x)
    is returned.  Otherwise, 1 is returned.  */
 
 static int
-eliminate_regs_in_insn (rtx insn, int replace)
+eliminate_regs_in_insn (rtx_insn *insn, int replace)
 {
   int icode = recog_memoized (insn);
   rtx old_body = PATTERN (insn);
@@ -3274,12 +3274,13 @@ eliminate_regs_in_insn (rtx insn, int replace)
 		&& ep->to == HARD_FRAME_POINTER_REGNUM)
 	      {
 		rtx base = SET_SRC (old_set);
-		rtx base_insn = insn;
+		rtx_insn *base_insn = insn;
 		HOST_WIDE_INT offset = 0;
 
 		while (base != ep->to_rtx)
 		  {
-		    rtx prev_insn, prev_set;
+		    rtx_insn *prev_insn;
+		    rtx prev_set;
 
 		    if (GET_CODE (base) == PLUS
 		        && CONST_INT_P (XEXP (base, 1)))
@@ -3641,7 +3642,7 @@ eliminate_regs_in_insn (rtx insn, int replace)
    an invariant equivalence would add extra cost.  */
 
 static void
-elimination_costs_in_insn (rtx insn)
+elimination_costs_in_insn (rtx_insn *insn)
 {
   int icode = recog_memoized (insn);
   rtx old_body = PATTERN (insn);
@@ -3908,7 +3909,7 @@ set_initial_elim_offsets (void)
 static void
 set_initial_eh_label_offset (rtx label)
 {
-  set_label_offsets (label, NULL_RTX, 1);
+  set_label_offsets (label, NULL, 1);
 }
 
 /* Initialize the known label offsets.
@@ -3926,11 +3927,11 @@ set_initial_label_offsets (void)
 
   for (x = forced_labels; x; x = XEXP (x, 1))
     if (XEXP (x, 0))
-      set_label_offsets (XEXP (x, 0), NULL_RTX, 1);
+      set_label_offsets (XEXP (x, 0), NULL, 1);
 
   for (x = nonlocal_goto_handler_labels; x; x = XEXP (x, 1))
     if (XEXP (x, 0))
-      set_label_offsets (XEXP (x, 0), NULL_RTX, 1);
+      set_label_offsets (XEXP (x, 0), NULL, 1);
 
   for_each_eh_label (set_initial_eh_label_offset);
 }
@@ -3939,7 +3940,7 @@ set_initial_label_offsets (void)
    by INSN.  */
 
 static void
-set_offsets_for_label (rtx insn)
+set_offsets_for_label (rtx_insn *insn)
 {
   unsigned int i;
   int label_nr = CODE_LABEL_NUMBER (insn);
@@ -4145,10 +4146,10 @@ init_elim_table (void)
    be substituted eventually by altering the REG-rtx's.  */
 
 static void
-init_eliminable_invariants (rtx first, bool do_subregs)
+init_eliminable_invariants (rtx_insn *first, bool do_subregs)
 {
   int i;
-  rtx insn;
+  rtx_insn *insn;
 
   grow_reg_equivs ();
   if (do_subregs)
@@ -4560,7 +4561,7 @@ strip_paradoxical_subreg (rtx *op_ptr, rtx *other_ptr)
    annotate all that may trap.  */
 
 static void
-fixup_eh_region_note (rtx insn, rtx prev, rtx next)
+fixup_eh_region_note (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
 {
   rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
   if (note == NULL)
@@ -4604,11 +4605,11 @@ reload_as_needed (int live_known)
 
   for (chain = reload_insn_chain; chain; chain = chain->next)
     {
-      rtx prev = 0;
-      rtx insn = chain->insn;
-      rtx old_next = NEXT_INSN (insn);
+      rtx_insn *prev = 0;
+      rtx_insn *insn = chain->insn;
+      rtx_insn *old_next = NEXT_INSN (insn);
 #ifdef AUTO_INC_DEC
-      rtx old_prev = PREV_INSN (insn);
+      rtx_insn *old_prev = PREV_INSN (insn);
 #endif
 
       if (will_delete_init_insn_p (insn))
@@ -4674,7 +4675,7 @@ reload_as_needed (int live_known)
 
 	  if (n_reloads > 0)
 	    {
-	      rtx next = NEXT_INSN (insn);
+	      rtx_insn *next = NEXT_INSN (insn);
 	      rtx p;
 
 	      /* ??? PREV can get deleted by reload inheritance.
@@ -5690,8 +5691,9 @@ gen_reload_chain_without_interm_reg_p (int r1, int r2)
      chain reloads or do need an intermediate hard registers.  */
   bool result = true;
   int regno, n, code;
-  rtx out, in, insn;
-  rtx last = get_last_insn ();
+  rtx out, in;
+  rtx_insn *insn;
+  rtx_insn *last = get_last_insn ();
 
   /* Make r2 a component of r1.  */
   if (reg_mentioned_p (rld[r1].in, rld[r2].in))
@@ -5830,7 +5832,7 @@ static char reload_inherited[MAX_RELOADS];
 
 /* For an inherited reload, this is the insn the reload was inherited from,
    if we know it.  Otherwise, this is 0.  */
-static rtx reload_inheritance_insn[MAX_RELOADS];
+static rtx_insn *reload_inheritance_insn[MAX_RELOADS];
 
 /* If nonzero, this is a place to get the value of the reload,
    rather than using reload_in.  */
@@ -6141,7 +6143,7 @@ conflicts_with_override (rtx x)
 /* Give an error message saying we failed to find a reload for INSN,
    and clear out reload R.  */
 static void
-failed_reload (rtx insn, int r)
+failed_reload (rtx_insn *insn, int r)
 {
   if (asm_noperands (PATTERN (insn)) < 0)
     /* It's the compiler's fault.  */
@@ -6456,7 +6458,7 @@ compute_reload_subreg_offset (enum machine_mode outermode,
 static void
 choose_reload_regs (struct insn_chain *chain)
 {
-  rtx insn = chain->insn;
+  rtx_insn *insn = chain->insn;
   int i, j;
   unsigned int max_group_size = 1;
   enum reg_class group_class = NO_REGS;
@@ -6920,7 +6922,7 @@ choose_reload_regs (struct insn_chain *chain)
 		     We must clear it, since otherwise emit_reload_insns
 		     might delete the store.  */
 		  if (! TEST_HARD_REG_BIT (reg_reloaded_valid, regno))
-		    spill_reg_store[regno] = NULL_RTX;
+		    spill_reg_store[regno] = NULL;
 		  /* If any of the hard registers in EQUIV are spill
 		     registers, mark them as in use for this insn.  */
 		  for (k = 0; k < nr; k++)
@@ -7181,22 +7183,22 @@ deallocate_reload_reg (int r)
 }
 \f
 /* These arrays are filled by emit_reload_insns and its subroutines.  */
-static rtx input_reload_insns[MAX_RECOG_OPERANDS];
-static rtx other_input_address_reload_insns = 0;
-static rtx other_input_reload_insns = 0;
-static rtx input_address_reload_insns[MAX_RECOG_OPERANDS];
-static rtx inpaddr_address_reload_insns[MAX_RECOG_OPERANDS];
-static rtx output_reload_insns[MAX_RECOG_OPERANDS];
-static rtx output_address_reload_insns[MAX_RECOG_OPERANDS];
-static rtx outaddr_address_reload_insns[MAX_RECOG_OPERANDS];
-static rtx operand_reload_insns = 0;
-static rtx other_operand_reload_insns = 0;
-static rtx other_output_reload_insns[MAX_RECOG_OPERANDS];
+static rtx_insn *input_reload_insns[MAX_RECOG_OPERANDS];
+static rtx_insn *other_input_address_reload_insns = 0;
+static rtx_insn *other_input_reload_insns = 0;
+static rtx_insn *input_address_reload_insns[MAX_RECOG_OPERANDS];
+static rtx_insn *inpaddr_address_reload_insns[MAX_RECOG_OPERANDS];
+static rtx_insn *output_reload_insns[MAX_RECOG_OPERANDS];
+static rtx_insn *output_address_reload_insns[MAX_RECOG_OPERANDS];
+static rtx_insn *outaddr_address_reload_insns[MAX_RECOG_OPERANDS];
+static rtx_insn *operand_reload_insns = 0;
+static rtx_insn *other_operand_reload_insns = 0;
+static rtx_insn *other_output_reload_insns[MAX_RECOG_OPERANDS];
 
 /* Values to be put in spill_reg_store are put here first.  Instructions
    must only be placed here if the associated reload register reaches
    the end of the instruction's reload sequence.  */
-static rtx new_spill_reg_store[FIRST_PSEUDO_REGISTER];
+static rtx_insn *new_spill_reg_store[FIRST_PSEUDO_REGISTER];
 static HARD_REG_SET reg_reloaded_died;
 
 /* Check if *RELOAD_REG is suitable as an intermediate or scratch register
@@ -7255,13 +7257,13 @@ static void
 emit_input_reload_insns (struct insn_chain *chain, struct reload *rl,
 			 rtx old, int j)
 {
-  rtx insn = chain->insn;
+  rtx_insn *insn = chain->insn;
   rtx reloadreg;
   rtx oldequiv_reg = 0;
   rtx oldequiv = 0;
   int special = 0;
   enum machine_mode mode;
-  rtx *where;
+  rtx_insn **where;
 
   /* delete_output_reload is only invoked properly if old contains
      the original pseudo register.  Since this is replaced with a
@@ -7376,7 +7378,7 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl,
 	   && free_for_value_p (REGNO (reloadreg), rl->mode, rl->opnum,
 				rl->when_needed, old, rl->out, j, 0))
     {
-      rtx temp = PREV_INSN (insn);
+      rtx_insn *temp = PREV_INSN (insn);
       while (temp && (NOTE_P (temp) || DEBUG_INSN_P (temp)))
 	temp = PREV_INSN (temp);
       if (temp
@@ -7717,11 +7719,11 @@ emit_output_reload_insns (struct insn_chain *chain, struct reload *rl,
 			  int j)
 {
   rtx reloadreg;
-  rtx insn = chain->insn;
+  rtx_insn *insn = chain->insn;
   int special = 0;
   rtx old = rl->out;
   enum machine_mode mode;
-  rtx p;
+  rtx_insn *p;
   rtx rl_reg_rtx;
 
   if (rl->when_needed == RELOAD_OTHER)
@@ -7884,7 +7886,7 @@ emit_output_reload_insns (struct insn_chain *chain, struct reload *rl,
 		       that it is, setting new_spill_reg_store to
 		       that insn will allow an extra optimization.  */
 		    rtx s_reg = rld[s].reg_rtx;
-		    rtx next = NEXT_INSN (p);
+		    rtx_insn *next = NEXT_INSN (p);
 		    rld[s].out = rl->out;
 		    rld[s].out_reg = rl->out_reg;
 		    set = single_set (next);
@@ -7921,7 +7923,7 @@ emit_output_reload_insns (struct insn_chain *chain, struct reload *rl,
 static void
 do_input_reload (struct insn_chain *chain, struct reload *rl, int j)
 {
-  rtx insn = chain->insn;
+  rtx_insn *insn = chain->insn;
   rtx old = (rl->in && MEM_P (rl->in)
 	     ? rl->in_reg : rl->in);
   rtx reg_rtx = rl->reg_rtx;
@@ -8023,7 +8025,7 @@ static void
 do_output_reload (struct insn_chain *chain, struct reload *rl, int j)
 {
   rtx note, old;
-  rtx insn = chain->insn;
+  rtx_insn *insn = chain->insn;
   /* If this is an output reload that stores something that is
      not loaded in this same reload, see if we can eliminate a previous
      store.  */
@@ -8132,7 +8134,7 @@ inherit_piecemeal_p (int dest ATTRIBUTE_UNUSED,
 static void
 emit_reload_insns (struct insn_chain *chain)
 {
-  rtx insn = chain->insn;
+  rtx_insn *insn = chain->insn;
 
   int j;
 
@@ -8474,7 +8476,8 @@ emit_reload_insns (struct insn_chain *chain)
 
 	  if (!HARD_REGISTER_NUM_P (out_regno))
 	    {
-	      rtx src_reg, store_insn = NULL_RTX;
+	      rtx src_reg;
+	      rtx_insn *store_insn = NULL;
 
 	      reg_last_reload_reg[out_regno] = 0;
 
@@ -8571,10 +8574,10 @@ emit_reload_insns (struct insn_chain *chain)
 /* Go through the motions to emit INSN and test if it is strictly valid.
    Return the emitted insn if valid, else return NULL.  */
 
-static rtx
+static rtx_insn *
 emit_insn_if_valid_for_reload (rtx insn)
 {
-  rtx last = get_last_insn ();
+  rtx_insn *last = get_last_insn ();
   int code;
 
   insn = emit_insn (insn);
@@ -8587,7 +8590,7 @@ emit_insn_if_valid_for_reload (rtx insn)
 	 validity determination, i.e., the way it would after reload has
 	 completed.  */
       if (constrain_operands (1))
-	return insn;
+	return as_a <rtx_insn *> (insn);
     }
 
   delete_insns_since (last);
@@ -8600,10 +8603,10 @@ emit_insn_if_valid_for_reload (rtx insn)
 
    Returns first insn emitted.  */
 
-static rtx
+static rtx_insn *
 gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
 {
-  rtx last = get_last_insn ();
+  rtx_insn *last = get_last_insn ();
   rtx tem;
 #ifdef SECONDARY_MEMORY_NEEDED
   rtx tem1, tem2;
@@ -8668,7 +8671,8 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
 	 `extract_insn' and it is simpler to emit and then delete the insn if
 	 not valid than to dummy things up.  */
 
-      rtx op0, op1, tem, insn;
+      rtx op0, op1, tem;
+      rtx_insn *insn;
       enum insn_code code;
 
       op0 = find_replacement (&XEXP (in, 0));
@@ -8770,7 +8774,7 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
       rtx insn;
       rtx op1;
       rtx out_moded;
-      rtx set;
+      rtx_insn *set;
 
       op1 = find_replacement (&XEXP (in, 0));
       if (op1 != XEXP (in, 0))
@@ -8800,7 +8804,7 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
       if (insn)
 	{
 	  set_unique_reg_note (insn, REG_EQUIV, in);
-	  return insn;
+	  return as_a <rtx_insn *> (insn);
 	}
 
       fatal_insn ("failure trying to reload:", set);
@@ -8842,9 +8846,10 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
    NEW_RELOAD_REG is reload register that reload J is using for REG.  */
 
 static void
-delete_output_reload (rtx insn, int j, int last_reload_reg, rtx new_reload_reg)
+delete_output_reload (rtx_insn *insn, int j, int last_reload_reg,
+		      rtx new_reload_reg)
 {
-  rtx output_reload_insn = spill_reg_store[last_reload_reg];
+  rtx_insn *output_reload_insn = spill_reg_store[last_reload_reg];
   rtx reg = spill_reg_stored_to[last_reload_reg];
   int k;
   int n_occurrences;
@@ -8957,7 +8962,7 @@ delete_output_reload (rtx insn, int j, int last_reload_reg, rtx new_reload_reg)
       && REG_BASIC_BLOCK (REGNO (reg)) >= NUM_FIXED_BLOCKS
       && find_regno_note (insn, REG_DEAD, REGNO (reg)))
     {
-      rtx i2;
+      rtx_insn *i2;
 
       /* We know that it was used only between here and the beginning of
 	 the current basic block.  (We also know that the last use before
@@ -9017,10 +9022,11 @@ delete_output_reload (rtx insn, int j, int last_reload_reg, rtx new_reload_reg)
    reload registers used in DEAD_INSN that are not used till CURRENT_INSN.
    CURRENT_INSN is being reloaded, so we have to check its reloads too.  */
 static void
-delete_address_reloads (rtx dead_insn, rtx current_insn)
+delete_address_reloads (rtx_insn *dead_insn, rtx_insn *current_insn)
 {
   rtx set = single_set (dead_insn);
-  rtx set2, dst, prev, next;
+  rtx set2, dst;
+  rtx_insn *prev, *next;
   if (set)
     {
       rtx dst = SET_DEST (set);
@@ -9053,9 +9059,10 @@ delete_address_reloads (rtx dead_insn, rtx current_insn)
 
 /* Subfunction of delete_address_reloads: process registers found in X.  */
 static void
-delete_address_reloads_1 (rtx dead_insn, rtx x, rtx current_insn)
+delete_address_reloads_1 (rtx_insn *dead_insn, rtx x, rtx_insn *current_insn)
 {
-  rtx prev, set, dst, i2;
+  rtx_insn *prev, *i2;
+  rtx set, dst;
   int i, j;
   enum rtx_code code = GET_CODE (x);
 
@@ -9176,9 +9183,9 @@ inc_for_reload (rtx reloadreg, rtx in, rtx value, int inc_amount)
   /* Nonzero if increment after copying.  */
   int post = (GET_CODE (value) == POST_DEC || GET_CODE (value) == POST_INC
 	      || GET_CODE (value) == POST_MODIFY);
-  rtx last;
+  rtx_insn *last;
   rtx inc;
-  rtx add_insn;
+  rtx_insn *add_insn;
   int code;
   rtx real_in = in == value ? incloc : in;
 
@@ -9270,7 +9277,7 @@ inc_for_reload (rtx reloadreg, rtx in, rtx value, int inc_amount)
 \f
 #ifdef AUTO_INC_DEC
 static void
-add_auto_inc_notes (rtx insn, rtx x)
+add_auto_inc_notes (rtx_insn *insn, rtx x)
 {
   enum rtx_code code = GET_CODE (x);
   const char *fmt;
-- 
1.8.5.3

Re: [PATCH 108/236] reload: Use rtx_insn (also touches caller-save.c and config/arc/arc)

[Jeff Law]

On 08/06/14 11:21, David Malcolm wrote:
> gcc/
> 	* reload.h (struct insn_chain): Strengthen field "insn" from rtx
> 	to rtx_insn *.
> 	(find_reloads): Likewise for param 1.
> 	(subst_reloads): Likewise for sole param.
> 	(find_equiv_reg): Likwise for param 2.
> 	(regno_clobbered_p): Likwise for param 2.
> 	(reload): Likewise for param 1.
>
> 	* caller-save.c (save_call_clobbered_regs): Strengthen local
> 	"insn" from rtx to rtx_insn *.
> 	(insert_one_insn): Likewise for local "insn".
>
> 	* reload.c (this_insn): Likewise for this global.
> 	(find_reloads): Likewise for param "insn".
> 	(find_reloads_toplev): Likewise.
> 	(find_reloads_address): Likewise.
> 	(subst_reg_equivs): Likewise.
> 	(update_auto_inc_notes): Likewise.
> 	(find_reloads_address_1): Likewise.
> 	(find_reloads_subreg_address): Likewise.
> 	(subst_reloads): Likewise.
> 	(find_equiv_reg): Likewise, also for local "p".
> 	(regno_clobbered_p): Likewise for param "insn".
>
> 	* reload1.c (reg_reloaded_insn): Likewise for the elements of this
> 	array.
> 	(spill_reg_store): Likewise for the elements of this array.
> 	(remove_init_insns): Likewise for local "equiv_insn".
> 	(will_delete_init_insn_p): Likewise for param "insn".
> 	(reload): Likewise for param ""first" and local "insn".
> 	(calculate_needs_all_insns): Strengthen local "insn" from rtx to
> 	rtx_insn *.
> 	(calculate_elim_costs_all_insns): Likewise.
> 	(delete_caller_save_insns): Likewise.
> 	(spill_failure): Likewise for param "insn".
> 	(delete_dead_insn): Likewise.
> 	(set_label_offsets): Likewise.
> 	(eliminate_regs_in_insn): Likewise, also for locals "base_insn" and
> 	"prev_insn".
> 	(elimination_costs_in_insn): Likewise for param "insn".
> 	(set_initial_eh_label_offset): Replace use of NULL_RTX with NULL
> 	when referring to an insn.
> 	(set_initial_label_offsets): Likewise.
> 	(set_offsets_for_label): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(init_eliminable_invariants): Likewise for param "first" and local
> 	"insn".
> 	(fixup_eh_region_note): Likewise for param "insn".
> 	(reload_as_needed): Likewise for locals "prev", "insn",
> 	"old_next", "old_prev", "next".
> 	(gen_reload_chain_without_interm_reg_p): Likewise for locals "insn",
> 	"last".
> 	(reload_inheritance_insn): Strengthen elements of this array from
> 	rtx to rtx_insn *.
> 	(failed_reload): Likewise for param "insn".
> 	(choose_reload_regs): Likewise for local "insn".  Replace use of
> 	NULL_RTX with NULL when referring to an insn.
> 	(input_reload_insns): Strengthen elements of this array from rtx
> 	to rtx_insn *.
> 	(other_input_address_reload_insns): Likewise for this global.
> 	(other_input_reload_insns): Likewise for this global.
> 	(input_address_reload_insns): Likwise for the elements of this
> 	array.
> 	(inpaddr_address_reload_insns): Likwise for the elements of this
> 	array.
> 	(output_reload_insns): Likewise for the elements of this array.
> 	(output_address_reload_insns): Likewise for the elements of this
> 	array.
> 	(outaddr_address_reload_insns): Likewise for the elements of this
> 	array.
> 	(operand_reload_insns): Likewise for this global.
> 	(other_operand_reload_insns): Likewise for this global.
> 	(other_output_reload_insns): Likewise for the elements of this
> 	array.
> 	(new_spill_reg_store): Likewise for the elements of this
> 	array.
> 	(emit_input_reload_insns): Likewise for locals "insn", "temp".
> 	Strengthen local "where" from rtx * to rtx_insn **.
> 	(emit_output_reload_insns): Strengthen locals "insn", "p", "next"
> 	from rtx to rtx_insn *.
> 	(do_input_reload): Likewise for local "insn".
> 	(do_output_reload): Likewise for local "insn".
> 	(emit_reload_insns): Likewise for locals "insn" and "store_insn".
> 	(emit_insn_if_valid_for_reload): Likewise for return type and local
> 	"last".  Add checked cast to rtx_insn when returning "insn" since
> 	this has been through emit_insn.
> 	(gen_reload): Strengthen return type and locals "last", "insn", "set"
> 	from rtx to rtx_insn *.  Add checked cast to rtx_insn when
> 	returning "insn" since it's been through
> 	emit_insn_if_valid_for_reload at this point.
> 	(delete_output_reload): Strengthen param "insn" and locals
> 	"output_reload_insn", "i2" from rtx to rtx_insn *.
> 	(delete_address_reloads): Likewise for params "dead_insn",
> 	"current_insn" and locals "prev", "next".
> 	(delete_address_reloads_1): Likewise for params "dead_insn",
> 	"current_insn" and locals "prev", "i2".
> 	(inc_for_reload): Likewise for locals "last", "add_insn".
> 	(add_auto_inc_notes): Strengthen param "insn" from rtx to
> 	rtx_insn *.
>
> 	* config/arc/arc-protos.h (regno_clobbered_p): Likewise for 2nd
> 	param of this duplicate of the prototype from reload.h
OK.
jeff

[PATCH 168/236] final_start_function takes an rtx_insn

[David Malcolm]

All in-tree users of final_start_function now pass an rtx_insn * as the
first param.

gcc/
	* output.h (final_start_function): Strengthen param 1 from rtx to
	rtx_insn *.

	* final.c (final_start_function): Likewise, renaming back from
	"uncast_first" to "first", and dropping the checked cast from rtx
	to rtx_insn *.
---
 gcc/final.c  | 3 +--
 gcc/output.h | 2 +-
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/gcc/final.c b/gcc/final.c
index 6937d0d..5e53b2e 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -1729,10 +1729,9 @@ reemit_insn_block_notes (void)
      test and compare insns.  */
 
 void
-final_start_function (rtx uncast_first, FILE *file,
+final_start_function (rtx_insn *first, FILE *file,
 		      int optimize_p ATTRIBUTE_UNUSED)
 {
-  rtx_insn *first = as_a_nullable <rtx_insn *> (uncast_first);
   block_depth = 0;
 
   this_is_asm_operands = 0;
diff --git a/gcc/output.h b/gcc/output.h
index b4c8c47..a3a5d78 100644
--- a/gcc/output.h
+++ b/gcc/output.h
@@ -57,7 +57,7 @@ extern void shorten_branches (rtx_insn *);
    for the new function.  The label for the function and associated
    assembler pseudo-ops have already been output in
    `assemble_start_function'.  */
-extern void final_start_function (rtx, FILE *, int);
+extern void final_start_function (rtx_insn *, FILE *, int);
 
 /* Output assembler code for the end of a function.
    For clarity, args are same as those of `final_start_function'
-- 
1.8.5.3

[PATCH 028/236] cfgexpand.c: Use rtx_insn

[David Malcolm]

gcc/
	* cfgexpand.c (expand_used_vars): Strengthen return type from rtx
	to rtx_insn *; also for local "var_end_seq".
	(maybe_dump_rtl_for_gimple_stmt): Likewise for param "since".
	(maybe_cleanup_end_of_block): Likewise for param "last" and local
	"insn".
	(expand_gimple_cond): Likewise for locals "last2" and "last".
	(mark_transaction_restart_calls): Likewise for local "insn".
	(expand_gimple_stmt): Likewise for return type and locals "last"
	and "insn".
	(expand_gimple_tailcall): Likewise for locals "last2" and "last".
	(avoid_complex_debug_insns): Likewise for param "insn".
	(expand_debug_locations): Likewise for locals "insn", "last",
	"prev_insn" and "insn2".
	(expand_gimple_basic_block): Likewise for local "last".
	(construct_exit_block): Likewise for locals "head", "end",
	"orig_end".
	(pass_expand::execute): Likewise for locals "var_seq",
	"var_ret_seq", "next".
---
 gcc/cfgexpand.c | 44 +++++++++++++++++++++++---------------------
 1 file changed, 23 insertions(+), 21 deletions(-)

diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index df52c08..643bb19 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -1659,12 +1659,12 @@ stack_protect_return_slot_p ()
 
 /* Expand all variables used in the function.  */
 
-static rtx
+static rtx_insn *
 expand_used_vars (void)
 {
   tree var, outer_block = DECL_INITIAL (current_function_decl);
   vec<tree> maybe_local_decls = vNULL;
-  rtx var_end_seq = NULL_RTX;
+  rtx_insn *var_end_seq = NULL;
   struct pointer_map_t *ssa_name_decls;
   unsigned i;
   unsigned len;
@@ -1941,7 +1941,7 @@ expand_used_vars (void)
    generated for STMT should have been appended.  */
 
 static void
-maybe_dump_rtl_for_gimple_stmt (gimple stmt, rtx since)
+maybe_dump_rtl_for_gimple_stmt (gimple stmt, rtx_insn *since)
 {
   if (dump_file && (dump_flags & TDF_DETAILS))
     {
@@ -2002,7 +2002,7 @@ label_rtx_for_bb (basic_block bb ATTRIBUTE_UNUSED)
    last instruction before the just emitted jump sequence.  */
 
 static void
-maybe_cleanup_end_of_block (edge e, rtx last)
+maybe_cleanup_end_of_block (edge e, rtx_insn *last)
 {
   /* Special case: when jumpif decides that the condition is
      trivial it emits an unconditional jump (and the necessary
@@ -2017,7 +2017,7 @@ maybe_cleanup_end_of_block (edge e, rtx last)
      normally isn't there in a cleaned CFG), fix it here.  */
   if (BARRIER_P (get_last_insn ()))
     {
-      rtx insn;
+      rtx_insn *insn;
       remove_edge (e);
       /* Now, we have a single successor block, if we have insns to
 	 insert on the remaining edge we potentially will insert
@@ -2059,7 +2059,7 @@ expand_gimple_cond (basic_block bb, gimple stmt)
   edge new_edge;
   edge true_edge;
   edge false_edge;
-  rtx last2, last;
+  rtx_insn *last2, *last;
   enum tree_code code;
   tree op0, op1;
 
@@ -2206,7 +2206,7 @@ mark_transaction_restart_calls (gimple stmt)
     {
       struct tm_restart_node *n = (struct tm_restart_node *) *slot;
       tree list = n->label_or_list;
-      rtx insn;
+      rtx_insn *insn;
 
       for (insn = next_real_insn (get_last_insn ());
 	   !CALL_P (insn);
@@ -3335,11 +3335,11 @@ expand_gimple_stmt_1 (gimple stmt)
    sets REG_EH_REGION notes if necessary and sets the current source
    location for diagnostics.  */
 
-static rtx
+static rtx_insn *
 expand_gimple_stmt (gimple stmt)
 {
   location_t saved_location = input_location;
-  rtx last = get_last_insn ();
+  rtx_insn *last = get_last_insn ();
   int lp_nr;
 
   gcc_assert (cfun);
@@ -3362,7 +3362,7 @@ expand_gimple_stmt (gimple stmt)
   lp_nr = lookup_stmt_eh_lp (stmt);
   if (lp_nr)
     {
-      rtx insn;
+      rtx_insn *insn;
       for (insn = next_real_insn (last); insn;
 	   insn = next_real_insn (insn))
 	{
@@ -3392,7 +3392,7 @@ expand_gimple_stmt (gimple stmt)
 static basic_block
 expand_gimple_tailcall (basic_block bb, gimple stmt, bool *can_fallthru)
 {
-  rtx last2, last;
+  rtx_insn *last2, *last;
   edge e;
   edge_iterator ei;
   int probability;
@@ -4767,7 +4767,7 @@ expand_debug_source_expr (tree exp)
    deeper than that, create DEBUG_EXPRs and emit DEBUG_INSNs before INSN.  */
 
 static void
-avoid_complex_debug_insns (rtx insn, rtx *exp_p, int depth)
+avoid_complex_debug_insns (rtx_insn *insn, rtx *exp_p, int depth)
 {
   rtx exp = *exp_p;
 
@@ -4819,8 +4819,8 @@ avoid_complex_debug_insns (rtx insn, rtx *exp_p, int depth)
 static void
 expand_debug_locations (void)
 {
-  rtx insn;
-  rtx last = get_last_insn ();
+  rtx_insn *insn;
+  rtx_insn *last = get_last_insn ();
   int save_strict_alias = flag_strict_aliasing;
 
   /* New alias sets while setting up memory attributes cause
@@ -4832,7 +4832,8 @@ expand_debug_locations (void)
     if (DEBUG_INSN_P (insn))
       {
 	tree value = (tree)INSN_VAR_LOCATION_LOC (insn);
-	rtx val, prev_insn, insn2;
+	rtx val;
+	rtx_insn *prev_insn, *insn2;
 	enum machine_mode mode;
 
 	if (value == NULL_TREE)
@@ -4877,7 +4878,8 @@ expand_gimple_basic_block (basic_block bb, bool disable_tail_calls)
   gimple_stmt_iterator gsi;
   gimple_seq stmts;
   gimple stmt = NULL;
-  rtx note, last;
+  rtx note;
+  rtx_insn *last;
   edge e;
   edge_iterator ei;
   rtx *elt;
@@ -5311,14 +5313,14 @@ set_block_levels (tree block, int level)
 static void
 construct_exit_block (void)
 {
-  rtx head = get_last_insn ();
-  rtx end;
+  rtx_insn *head = get_last_insn ();
+  rtx_insn *end;
   basic_block exit_block;
   edge e, e2;
   unsigned ix;
   edge_iterator ei;
   basic_block prev_bb = EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb;
-  rtx orig_end = BB_END (prev_bb);
+  rtx_insn *orig_end = BB_END (prev_bb);
 
   rtl_profile_for_bb (EXIT_BLOCK_PTR_FOR_FN (cfun));
 
@@ -5613,7 +5615,7 @@ pass_expand::execute (function *fun)
   sbitmap blocks;
   edge_iterator ei;
   edge e;
-  rtx var_seq, var_ret_seq;
+  rtx_insn *var_seq, *var_ret_seq;
   unsigned i;
 
   timevar_push (TV_OUT_OF_SSA);
@@ -5832,7 +5834,7 @@ pass_expand::execute (function *fun)
   if (var_ret_seq)
     {
       rtx after = return_label;
-      rtx next = NEXT_INSN (after);
+      rtx_insn *next = NEXT_INSN (after);
       if (next && NOTE_INSN_BASIC_BLOCK_P (next))
 	after = next;
       emit_insn_after (var_ret_seq, after);
-- 
1.8.5.3

Re: [PATCH 028/236] cfgexpand.c: Use rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* cfgexpand.c (expand_used_vars): Strengthen return type from rtx
> 	to rtx_insn *; also for local "var_end_seq".
> 	(maybe_dump_rtl_for_gimple_stmt): Likewise for param "since".
> 	(maybe_cleanup_end_of_block): Likewise for param "last" and local
> 	"insn".
> 	(expand_gimple_cond): Likewise for locals "last2" and "last".
> 	(mark_transaction_restart_calls): Likewise for local "insn".
> 	(expand_gimple_stmt): Likewise for return type and locals "last"
> 	and "insn".
> 	(expand_gimple_tailcall): Likewise for locals "last2" and "last".
> 	(avoid_complex_debug_insns): Likewise for param "insn".
> 	(expand_debug_locations): Likewise for locals "insn", "last",
> 	"prev_insn" and "insn2".
> 	(expand_gimple_basic_block): Likewise for local "last".
> 	(construct_exit_block): Likewise for locals "head", "end",
> 	"orig_end".
> 	(pass_expand::execute): Likewise for locals "var_seq",
> 	"var_ret_seq", "next".
OK.
Jeff

Re: [PATCH 028/236] cfgexpand.c: Use rtx_insn

[David Malcolm]

On Wed, 2014-08-13 at 07:42 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* cfgexpand.c (expand_used_vars): Strengthen return type from rtx
> > 	to rtx_insn *; also for local "var_end_seq".
> > 	(maybe_dump_rtl_for_gimple_stmt): Likewise for param "since".
> > 	(maybe_cleanup_end_of_block): Likewise for param "last" and local
> > 	"insn".
> > 	(expand_gimple_cond): Likewise for locals "last2" and "last".
> > 	(mark_transaction_restart_calls): Likewise for local "insn".
> > 	(expand_gimple_stmt): Likewise for return type and locals "last"
> > 	and "insn".
> > 	(expand_gimple_tailcall): Likewise for locals "last2" and "last".
> > 	(avoid_complex_debug_insns): Likewise for param "insn".
> > 	(expand_debug_locations): Likewise for locals "insn", "last",
> > 	"prev_insn" and "insn2".
> > 	(expand_gimple_basic_block): Likewise for local "last".
> > 	(construct_exit_block): Likewise for locals "head", "end",
> > 	"orig_end".
> > 	(pass_expand::execute): Likewise for locals "var_seq",
> > 	"var_ret_seq", "next".
> OK.

Thanks.  Committed to trunk as r214190.

[PATCH 121/236] varasm.c: Use rtx_insn

[David Malcolm]

gcc/
	* varasm.c (mark_constants): Strengthen param "insn" from rtx to
	rtx_insn *.
	(mark_constant_pool): Likewise for local "insn".
---
 gcc/varasm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/varasm.c b/gcc/varasm.c
index 7755717..8c65c1c 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -3949,7 +3949,7 @@ mark_constant (rtx *current_rtx, void *data ATTRIBUTE_UNUSED)
    deferred strings that are used.  */
 
 static void
-mark_constants (rtx insn)
+mark_constants (rtx_insn *insn)
 {
   if (!INSN_P (insn))
     return;
@@ -3979,7 +3979,7 @@ mark_constants (rtx insn)
 static void
 mark_constant_pool (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (!crtl->uses_const_pool && n_deferred_constants == 0)
     return;
-- 
1.8.5.3

[PATCH 061/236] combine.c: Use rtx_insn

[David Malcolm]

gcc/
	* combine.c (i2mod): Strengthen this variable from rtx to rtx_insn *.
	(struct reg_stat_struct): Likewise for fields "last_death", "last_set".
	(subst_insn): Likewise for this variable.
	(added_links_insn): Likewise.
	(struct insn_link): Likewise for field "insn".
	(alloc_insn_link): Likewise for param "insn".
	(struct undobuf): Likewise for field "other_insn".
	(find_single_use): Likewise for param "insn" and local "next".
	(combine_validate_cost): Likewise for params "i0", "i1", "i2", "i3".
	(delete_noop_moves): Likewise for locals "insn", "next".
	(create_log_links): Likewise for locals "insn", "use_insn".
	Strengthen local "next_use" from rtx * to rtx_insn **.
	(insn_a_feeds_b): Likewise for params "a", "b".
	(combine_instructions): Likewise for param "f" and locals "insn",
	"next", "prev", "first", "last_combined_insn", "link", "link1",
	"temp".  Replace use of NULL_RTX with NULL when referring to
	insns.
	(setup_incoming_promotions): Likewise for param "first"
	(set_nonzero_bits_and_sign_copies): Likewise for local "insn".
	(can_combine_p): Likewise for params "insn", "i3", "pred",
	"pred2", "succ", "succ2" and for local "p".
	(combinable_i3pat): Likewise for param "i3".
	(cant_combine_insn_p): Likewise for param "insn".
	(likely_spilled_retval_p): Likewise.
	(adjust_for_new_dest): Likewise.
	(update_cfg_for_uncondjump): Likewise, also for local "insn".
	(try_combine): Likewise for return type and for params "i3", "i2",
	"i1", "i0", "last_combined_insn", and for locals "insn",
	"cc_use_insn", "p", "first", "last", "i2_insn", "i1_insn",
	"i0_insn".  Eliminate local "tem" in favor of new locals
	"tem_note" and "tem_insn", the latter being an rtx_insn *.  Add a
	checked cast for now to rtx_insn * on the return type of
	gen_rtx_INSN.  Replace use of NULL_RTX with NULL when referring to
	insns.
	(find_split_point): Strengthen param "insn" from rtx to
	rtx_insn *.
	(simplify_set): Likewise for local "other_insn".
	(recog_for_combine): Likewise for param "insn".
	(record_value_for_reg): Likewise.
	(record_dead_and_set_regs_1): Likewise for local
	"record_dead_insn".
	(record_dead_and_set_regs): Likewise for param "insn".
	(record_promoted_value): Likewise.
	(check_promoted_subreg): Likewise.
	(get_last_value_validate): Likewise.
	(reg_dead_at_p): Likewise.
	(move_deaths): Likewise for param "to_insn".
	(distribute_notes): Likewise for params "from_insn", "i3", "i2"
	and locals "place", "place2", "cc0_setter".  Eliminate local "tem
	in favor of new locals "tem_note" and "tem_insn", the latter being
	an rtx_insn *.
	(distribute_links): Strengthen locals "place", "insn" from rtx to
	rtx_insn *.
---
 gcc/combine.c | 398 ++++++++++++++++++++++++++++++----------------------------
 1 file changed, 204 insertions(+), 194 deletions(-)

diff --git a/gcc/combine.c b/gcc/combine.c
index dafacaf..9a922a7 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -132,7 +132,7 @@ static int total_attempts, total_merges, total_extras, total_successes;
    and can cause distribute_notes to do wrong things.  This is the
    second instruction if it has been so modified, null otherwise.  */
 
-static rtx i2mod;
+static rtx_insn *i2mod;
 
 /* When I2MOD is nonnull, this is a copy of the old right hand side.  */
 
@@ -144,10 +144,10 @@ static rtx i2mod_new_rhs;
 \f
 typedef struct reg_stat_struct {
   /* Record last point of death of (hard or pseudo) register n.  */
-  rtx				last_death;
+  rtx_insn			*last_death;
 
   /* Record last point of modification of (hard or pseudo) register n.  */
-  rtx				last_set;
+  rtx_insn			*last_set;
 
   /* The next group of fields allows the recording of the last value assigned
      to (hard or pseudo) register n.  We use this information to see if an
@@ -270,7 +270,7 @@ static int last_call_luid;
    looked at, but this may be used to examine the successors of the insn
    to judge whether a simplification is valid.  */
 
-static rtx subst_insn;
+static rtx_insn *subst_insn;
 
 /* This is the lowest LUID that `subst' is currently dealing with.
    get_last_value will not return a value if the register was set at or
@@ -290,7 +290,7 @@ static HARD_REG_SET newpat_used_regs;
    insn is the earlier than I2 or I3, combine should rescan starting at
    that location.  */
 
-static rtx added_links_insn;
+static rtx_insn *added_links_insn;
 
 /* Basic block in which we are performing combines.  */
 static basic_block this_basic_block;
@@ -310,7 +310,7 @@ static int *uid_insn_cost;
    instruction stream as struct insn_link pointers.  */
 
 struct insn_link {
-  rtx insn;
+  rtx_insn *insn;
   struct insn_link *next;
 };
 
@@ -329,7 +329,7 @@ static struct obstack insn_link_obstack;
 /* Allocate a link.  */
 
 static inline struct insn_link *
-alloc_insn_link (rtx insn, struct insn_link *next)
+alloc_insn_link (rtx_insn *insn, struct insn_link *next)
 {
   struct insn_link *l
     = (struct insn_link *) obstack_alloc (&insn_link_obstack,
@@ -384,7 +384,7 @@ struct undobuf
 {
   struct undo *undos;
   struct undo *frees;
-  rtx other_insn;
+  rtx_insn *other_insn;
 };
 
 static struct undobuf undobuf;
@@ -404,16 +404,18 @@ static rtx reg_num_sign_bit_copies_for_combine (const_rtx, enum machine_mode, co
 static void do_SUBST (rtx *, rtx);
 static void do_SUBST_INT (int *, int);
 static void init_reg_last (void);
-static void setup_incoming_promotions (rtx);
+static void setup_incoming_promotions (rtx_insn *);
 static void set_nonzero_bits_and_sign_copies (rtx, const_rtx, void *);
-static int cant_combine_insn_p (rtx);
-static int can_combine_p (rtx, rtx, rtx, rtx, rtx, rtx, rtx *, rtx *);
-static int combinable_i3pat (rtx, rtx *, rtx, rtx, rtx, int, int, rtx *);
+static int cant_combine_insn_p (rtx_insn *);
+static int can_combine_p (rtx_insn *, rtx_insn *, rtx_insn *, rtx_insn *,
+			  rtx_insn *, rtx_insn *, rtx *, rtx *);
+static int combinable_i3pat (rtx_insn *, rtx *, rtx, rtx, rtx, int, int, rtx *);
 static int contains_muldiv (rtx);
-static rtx try_combine (rtx, rtx, rtx, rtx, int *, rtx);
+static rtx_insn *try_combine (rtx_insn *, rtx_insn *, rtx_insn *, rtx_insn *,
+			      int *, rtx_insn *);
 static void undo_all (void);
 static void undo_commit (void);
-static rtx *find_split_point (rtx *, rtx, bool);
+static rtx *find_split_point (rtx *, rtx_insn *, bool);
 static rtx subst (rtx, rtx, rtx, int, int, int);
 static rtx combine_simplify_rtx (rtx, enum machine_mode, int, int);
 static rtx simplify_if_then_else (rtx);
@@ -444,27 +446,27 @@ static int merge_outer_ops (enum rtx_code *, HOST_WIDE_INT *, enum rtx_code,
 static rtx simplify_shift_const_1 (enum rtx_code, enum machine_mode, rtx, int);
 static rtx simplify_shift_const (rtx, enum rtx_code, enum machine_mode, rtx,
 				 int);
-static int recog_for_combine (rtx *, rtx, rtx *);
+static int recog_for_combine (rtx *, rtx_insn *, rtx *);
 static rtx gen_lowpart_for_combine (enum machine_mode, rtx);
 static enum rtx_code simplify_compare_const (enum rtx_code, enum machine_mode,
 					     rtx, rtx *);
 static enum rtx_code simplify_comparison (enum rtx_code, rtx *, rtx *);
 static void update_table_tick (rtx);
-static void record_value_for_reg (rtx, rtx, rtx);
-static void check_promoted_subreg (rtx, rtx);
+static void record_value_for_reg (rtx, rtx_insn *, rtx);
+static void check_promoted_subreg (rtx_insn *, rtx);
 static void record_dead_and_set_regs_1 (rtx, const_rtx, void *);
-static void record_dead_and_set_regs (rtx);
-static int get_last_value_validate (rtx *, rtx, int, int);
+static void record_dead_and_set_regs (rtx_insn *);
+static int get_last_value_validate (rtx *, rtx_insn *, int, int);
 static rtx get_last_value (const_rtx);
 static int use_crosses_set_p (const_rtx, int);
 static void reg_dead_at_p_1 (rtx, const_rtx, void *);
-static int reg_dead_at_p (rtx, rtx);
-static void move_deaths (rtx, rtx, int, rtx, rtx *);
+static int reg_dead_at_p (rtx, rtx_insn *);
+static void move_deaths (rtx, rtx, int, rtx_insn *, rtx *);
 static int reg_bitfield_target_p (rtx, rtx);
-static void distribute_notes (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
+static void distribute_notes (rtx, rtx_insn *, rtx_insn *, rtx_insn *, rtx, rtx, rtx);
 static void distribute_links (struct insn_link *);
 static void mark_used_regs_combine (rtx);
-static void record_promoted_value (rtx, rtx);
+static void record_promoted_value (rtx_insn *, rtx);
 static int unmentioned_reg_p_1 (rtx *, void *);
 static bool unmentioned_reg_p (rtx, rtx);
 static int record_truncated_value (rtx *, void *);
@@ -637,10 +639,10 @@ find_single_use_1 (rtx dest, rtx *loc)
    and last insn referencing DEST.  */
 
 static rtx *
-find_single_use (rtx dest, rtx insn, rtx *ploc)
+find_single_use (rtx dest, rtx_insn *insn, rtx_insn **ploc)
 {
   basic_block bb;
-  rtx next;
+  rtx_insn *next;
   rtx *result;
   struct insn_link *link;
 
@@ -833,8 +835,8 @@ do_SUBST_LINK (struct insn_link **into, struct insn_link *newval)
    expensive than the original sequence.  */
 
 static bool
-combine_validate_cost (rtx i0, rtx i1, rtx i2, rtx i3, rtx newpat,
-		       rtx newi2pat, rtx newotherpat)
+combine_validate_cost (rtx_insn *i0, rtx_insn *i1, rtx_insn *i2, rtx_insn *i3,
+		       rtx newpat, rtx newi2pat, rtx newotherpat)
 {
   int i0_cost, i1_cost, i2_cost, i3_cost;
   int new_i2_cost, new_i3_cost;
@@ -958,7 +960,7 @@ combine_validate_cost (rtx i0, rtx i1, rtx i2, rtx i3, rtx newpat,
 static void
 delete_noop_moves (void)
 {
-  rtx insn, next;
+  rtx_insn *insn, *next;
   basic_block bb;
 
   FOR_EACH_BB_FN (bb, cfun)
@@ -984,10 +986,11 @@ static void
 create_log_links (void)
 {
   basic_block bb;
-  rtx *next_use, insn;
+  rtx_insn **next_use;
+  rtx_insn *insn;
   df_ref *def_vec, *use_vec;
 
-  next_use = XCNEWVEC (rtx, max_reg_num ());
+  next_use = XCNEWVEC (rtx_insn *, max_reg_num ());
 
   /* Pass through each block from the end, recording the uses of each
      register and establishing log links when def is encountered.
@@ -1012,7 +1015,7 @@ create_log_links (void)
             {
 	      df_ref def = *def_vec;
               int regno = DF_REF_REGNO (def);
-              rtx use_insn;
+              rtx_insn *use_insn;
 
               if (!next_use[regno])
                 continue;
@@ -1058,7 +1061,7 @@ create_log_links (void)
 			  = alloc_insn_link (insn, LOG_LINKS (use_insn));
 		    }
                 }
-              next_use[regno] = NULL_RTX;
+              next_use[regno] = NULL;
             }
 
           for (use_vec = DF_INSN_USES (insn); *use_vec; use_vec++)
@@ -1087,7 +1090,7 @@ create_log_links (void)
    pair.  */
 
 static bool
-insn_a_feeds_b (rtx a, rtx b)
+insn_a_feeds_b (rtx_insn *a, rtx_insn *b)
 {
   struct insn_link *links;
   FOR_EACH_LOG_LINK (links, b)
@@ -1106,14 +1109,14 @@ insn_a_feeds_b (rtx a, rtx b)
    Return nonzero if the combiner has turned an indirect jump
    instruction into a direct jump.  */
 static int
-combine_instructions (rtx f, unsigned int nregs)
+combine_instructions (rtx_insn *f, unsigned int nregs)
 {
-  rtx insn, next;
+  rtx_insn *insn, *next;
 #ifdef HAVE_cc0
-  rtx prev;
+  rtx_insn *prev;
 #endif
   struct insn_link *links, *nextlinks;
-  rtx first;
+  rtx_insn *first;
   basic_block last_bb;
 
   int new_direct_jump_p = 0;
@@ -1214,7 +1217,7 @@ combine_instructions (rtx f, unsigned int nregs)
 
   FOR_EACH_BB_FN (this_basic_block, cfun)
     {
-      rtx last_combined_insn = NULL_RTX;
+      rtx_insn *last_combined_insn = NULL;
       optimize_this_for_speed_p = optimize_bb_for_speed_p (this_basic_block);
       last_call_luid = 0;
       mem_last_set = -1;
@@ -1254,8 +1257,8 @@ combine_instructions (rtx f, unsigned int nregs)
 	      /* Try this insn with each insn it links back to.  */
 
 	      FOR_EACH_LOG_LINK (links, insn)
-		if ((next = try_combine (insn, links->insn, NULL_RTX,
-					 NULL_RTX, &new_direct_jump_p,
+		if ((next = try_combine (insn, links->insn, NULL,
+					 NULL, &new_direct_jump_p,
 					 last_combined_insn)) != 0)
 		  goto retry;
 
@@ -1263,7 +1266,7 @@ combine_instructions (rtx f, unsigned int nregs)
 
 	      FOR_EACH_LOG_LINK (links, insn)
 		{
-		  rtx link = links->insn;
+		  rtx_insn *link = links->insn;
 
 		  /* If the linked insn has been replaced by a note, then there
 		     is no point in pursuing this chain any further.  */
@@ -1272,7 +1275,7 @@ combine_instructions (rtx f, unsigned int nregs)
 
 		  FOR_EACH_LOG_LINK (nextlinks, link)
 		    if ((next = try_combine (insn, link, nextlinks->insn,
-					     NULL_RTX, &new_direct_jump_p,
+					     NULL, &new_direct_jump_p,
 					     last_combined_insn)) != 0)
 		      goto retry;
 		}
@@ -1290,14 +1293,14 @@ combine_instructions (rtx f, unsigned int nregs)
 		  && NONJUMP_INSN_P (prev)
 		  && sets_cc0_p (PATTERN (prev)))
 		{
-		  if ((next = try_combine (insn, prev, NULL_RTX, NULL_RTX,
+		  if ((next = try_combine (insn, prev, NULL, NULL,
 					   &new_direct_jump_p,
 					   last_combined_insn)) != 0)
 		    goto retry;
 
 		  FOR_EACH_LOG_LINK (nextlinks, prev)
 		    if ((next = try_combine (insn, prev, nextlinks->insn,
-					     NULL_RTX, &new_direct_jump_p,
+					     NULL, &new_direct_jump_p,
 					     last_combined_insn)) != 0)
 		      goto retry;
 		}
@@ -1310,14 +1313,14 @@ combine_instructions (rtx f, unsigned int nregs)
 		  && GET_CODE (PATTERN (insn)) == SET
 		  && reg_mentioned_p (cc0_rtx, SET_SRC (PATTERN (insn))))
 		{
-		  if ((next = try_combine (insn, prev, NULL_RTX, NULL_RTX,
+		  if ((next = try_combine (insn, prev, NULL, NULL,
 					   &new_direct_jump_p,
 					   last_combined_insn)) != 0)
 		    goto retry;
 
 		  FOR_EACH_LOG_LINK (nextlinks, prev)
 		    if ((next = try_combine (insn, prev, nextlinks->insn,
-					     NULL_RTX, &new_direct_jump_p,
+					     NULL, &new_direct_jump_p,
 					     last_combined_insn)) != 0)
 		      goto retry;
 		}
@@ -1333,7 +1336,7 @@ combine_instructions (rtx f, unsigned int nregs)
 		    && NONJUMP_INSN_P (prev)
 		    && sets_cc0_p (PATTERN (prev))
 		    && (next = try_combine (insn, links->insn,
-					    prev, NULL_RTX, &new_direct_jump_p,
+					    prev, NULL, &new_direct_jump_p,
 					    last_combined_insn)) != 0)
 		  goto retry;
 #endif
@@ -1344,7 +1347,7 @@ combine_instructions (rtx f, unsigned int nregs)
 		for (nextlinks = links->next; nextlinks;
 		     nextlinks = nextlinks->next)
 		  if ((next = try_combine (insn, links->insn,
-					   nextlinks->insn, NULL_RTX,
+					   nextlinks->insn, NULL,
 					   &new_direct_jump_p,
 					   last_combined_insn)) != 0)
 		    goto retry;
@@ -1353,7 +1356,7 @@ combine_instructions (rtx f, unsigned int nregs)
 	      FOR_EACH_LOG_LINK (links, insn)
 		{
 		  struct insn_link *next1;
-		  rtx link = links->insn;
+		  rtx_insn *link = links->insn;
 
 		  /* If the linked insn has been replaced by a note, then there
 		     is no point in pursuing this chain any further.  */
@@ -1362,7 +1365,7 @@ combine_instructions (rtx f, unsigned int nregs)
 
 		  FOR_EACH_LOG_LINK (next1, link)
 		    {
-		      rtx link1 = next1->insn;
+		      rtx_insn *link1 = next1->insn;
 		      if (NOTE_P (link1))
 			continue;
 		      /* I0 -> I1 -> I2 -> I3.  */
@@ -1384,7 +1387,7 @@ combine_instructions (rtx f, unsigned int nregs)
 
 		  for (next1 = links->next; next1; next1 = next1->next)
 		    {
-		      rtx link1 = next1->insn;
+		      rtx_insn *link1 = next1->insn;
 		      if (NOTE_P (link1))
 			continue;
 		      /* I0 -> I2; I1, I2 -> I3.  */
@@ -1408,7 +1411,7 @@ combine_instructions (rtx f, unsigned int nregs)
 	      FOR_EACH_LOG_LINK (links, insn)
 		{
 		  rtx set, note;
-		  rtx temp = links->insn;
+		  rtx_insn *temp = links->insn;
 		  if ((set = single_set (temp)) != 0
 		      && (note = find_reg_equal_equiv_note (temp)) != 0
 		      && (note = XEXP (note, 0), GET_CODE (note)) != EXPR_LIST
@@ -1427,10 +1430,10 @@ combine_instructions (rtx f, unsigned int nregs)
 		      i2mod = temp;
 		      i2mod_old_rhs = copy_rtx (orig);
 		      i2mod_new_rhs = copy_rtx (note);
-		      next = try_combine (insn, i2mod, NULL_RTX, NULL_RTX,
+		      next = try_combine (insn, i2mod, NULL, NULL,
 					  &new_direct_jump_p,
 					  last_combined_insn);
-		      i2mod = NULL_RTX;
+		      i2mod = NULL;
 		      if (next)
 			goto retry;
 		      SET_SRC (set) = orig;
@@ -1496,7 +1499,7 @@ init_reg_last (void)
 /* Set up any promoted values for incoming argument registers.  */
 
 static void
-setup_incoming_promotions (rtx first)
+setup_incoming_promotions (rtx_insn *first)
 {
   tree arg;
   bool strictly_local = false;
@@ -1585,7 +1588,7 @@ setup_incoming_promotions (rtx first)
 static void
 set_nonzero_bits_and_sign_copies (rtx x, const_rtx set, void *data)
 {
-  rtx insn = (rtx) data;
+  rtx_insn *insn = (rtx_insn *) data;
   unsigned int num;
 
   if (REG_P (x)
@@ -1694,14 +1697,14 @@ set_nonzero_bits_and_sign_copies (rtx x, const_rtx set, void *data)
    will return 1.  */
 
 static int
-can_combine_p (rtx insn, rtx i3, rtx pred ATTRIBUTE_UNUSED,
-	       rtx pred2 ATTRIBUTE_UNUSED, rtx succ, rtx succ2,
+can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn *pred ATTRIBUTE_UNUSED,
+	       rtx_insn *pred2 ATTRIBUTE_UNUSED, rtx_insn *succ, rtx_insn *succ2,
 	       rtx *pdest, rtx *psrc)
 {
   int i;
   const_rtx set = 0;
   rtx src, dest;
-  rtx p;
+  rtx_insn *p;
 #ifdef AUTO_INC_DEC
   rtx link;
 #endif
@@ -2059,7 +2062,7 @@ can_combine_p (rtx insn, rtx i3, rtx pred ATTRIBUTE_UNUSED,
    Return 1 if the combination is valid, zero otherwise.  */
 
 static int
-combinable_i3pat (rtx i3, rtx *loc, rtx i2dest, rtx i1dest, rtx i0dest,
+combinable_i3pat (rtx_insn *i3, rtx *loc, rtx i2dest, rtx i1dest, rtx i0dest,
 		  int i1_not_in_src, int i0_not_in_src, rtx *pi3dest_killed)
 {
   rtx x = *loc;
@@ -2184,7 +2187,7 @@ contains_muldiv (rtx x)
    can't perform combinations.  */
 
 static int
-cant_combine_insn_p (rtx insn)
+cant_combine_insn_p (rtx_insn *insn)
 {
   rtx set;
   rtx src, dest;
@@ -2261,7 +2264,7 @@ likely_spilled_retval_1 (rtx x, const_rtx set, void *data)
    second copy insn for a complex value.  */
 
 static int
-likely_spilled_retval_p (rtx insn)
+likely_spilled_retval_p (rtx_insn *insn)
 {
   rtx use = BB_END (this_basic_block);
   rtx reg, p;
@@ -2310,7 +2313,7 @@ likely_spilled_retval_p (rtx insn)
    the results of the insn and a LOG_LINK pointing to the insn.  */
 
 static void
-adjust_for_new_dest (rtx insn)
+adjust_for_new_dest (rtx_insn *insn)
 {
   /* For notes, be conservative and simply remove them.  */
   remove_reg_equal_equiv_notes (insn);
@@ -2372,7 +2375,7 @@ reg_subword_p (rtx x, rtx reg)
    but not for a (set (pc) (label_ref FOO)).  */
 
 static void
-update_cfg_for_uncondjump (rtx insn)
+update_cfg_for_uncondjump (rtx_insn *insn)
 {
   basic_block bb = BLOCK_FOR_INSN (insn);
   gcc_assert (BB_END (bb) == insn);
@@ -2382,7 +2385,7 @@ update_cfg_for_uncondjump (rtx insn)
   delete_insn (insn);
   if (EDGE_COUNT (bb->succs) == 1)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       single_succ_edge (bb)->flags |= EDGE_FALLTHRU;
 
@@ -2423,9 +2426,9 @@ update_cfg_for_uncondjump (rtx insn)
    been I3 passed to an earlier try_combine within the same basic
    block.  */
 
-static rtx
-try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
-	     rtx last_combined_insn)
+static rtx_insn *
+try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
+	     int *new_direct_jump_p, rtx_insn *last_combined_insn)
 {
   /* New patterns for I3 and I2, respectively.  */
   rtx newpat, newi2pat = 0;
@@ -2467,7 +2470,8 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
   int changed_i3_dest = 0;
 
   int maxreg;
-  rtx temp;
+  rtx_insn *temp_insn;
+  rtx temp_expr;
   struct insn_link *link;
   rtx other_pat = 0;
   rtx new_other_notes;
@@ -2487,7 +2491,7 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 
       for (i = 0; i < 4; i++)
 	{
-	  rtx insn = i == 0 ? i0 : i == 1 ? i1 : i == 2 ? i2 : i3;
+	  rtx_insn *insn = i == 0 ? i0 : i == 1 ? i1 : i == 2 ? i2 : i3;
 	  rtx set = single_set (insn);
 	  rtx src;
 	  if (!set)
@@ -2539,11 +2543,11 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
   /* If multiple insns feed into one of I2 or I3, they can be in any
      order.  To simplify the code below, reorder them in sequence.  */
   if (i0 && DF_INSN_LUID (i0) > DF_INSN_LUID (i2))
-    temp = i2, i2 = i0, i0 = temp;
+    temp_insn = i2, i2 = i0, i0 = temp_insn;
   if (i0 && DF_INSN_LUID (i0) > DF_INSN_LUID (i1))
-    temp = i1, i1 = i0, i0 = temp;
+    temp_insn = i1, i1 = i0, i0 = temp_insn;
   if (i1 && DF_INSN_LUID (i1) > DF_INSN_LUID (i2))
-    temp = i1, i1 = i2, i2 = temp;
+    temp_insn = i1, i1 = i2, i2 = temp_insn;
 
   added_links_insn = 0;
 
@@ -2627,11 +2631,11 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
      sub-part of it to another constant, merge them by making a new
      constant.  */
   if (i1 == 0
-      && (temp = single_set (i2)) != 0
-      && CONST_SCALAR_INT_P (SET_SRC (temp))
+      && (temp_expr = single_set (i2)) != 0
+      && CONST_SCALAR_INT_P (SET_SRC (temp_expr))
       && GET_CODE (PATTERN (i3)) == SET
       && CONST_SCALAR_INT_P (SET_SRC (PATTERN (i3)))
-      && reg_subword_p (SET_DEST (PATTERN (i3)), SET_DEST (temp)))
+      && reg_subword_p (SET_DEST (PATTERN (i3)), SET_DEST (temp_expr)))
     {
       rtx dest = SET_DEST (PATTERN (i3));
       int offset = -1;
@@ -2663,7 +2667,7 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 	  if (subreg_lowpart_p (dest))
 	    ;
 	  /* Handle the case where inner is twice the size of outer.  */
-	  else if (GET_MODE_PRECISION (GET_MODE (SET_DEST (temp)))
+	  else if (GET_MODE_PRECISION (GET_MODE (SET_DEST (temp_expr)))
 		   == 2 * GET_MODE_PRECISION (GET_MODE (dest)))
 	    offset += GET_MODE_PRECISION (GET_MODE (dest));
 	  /* Otherwise give up for now.  */
@@ -2674,10 +2678,10 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
       if (offset >= 0)
 	{
 	  rtx inner = SET_SRC (PATTERN (i3));
-	  rtx outer = SET_SRC (temp);
+	  rtx outer = SET_SRC (temp_expr);
 
 	  wide_int o
-	    = wi::insert (std::make_pair (outer, GET_MODE (SET_DEST (temp))),
+	    = wi::insert (std::make_pair (outer, GET_MODE (SET_DEST (temp_expr))),
 			  std::make_pair (inner, GET_MODE (dest)),
 			  offset, width);
 
@@ -2685,14 +2689,14 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 	  subst_insn = i3;
 	  subst_low_luid = DF_INSN_LUID (i2);
 	  added_sets_2 = added_sets_1 = added_sets_0 = 0;
-	  i2dest = SET_DEST (temp);
+	  i2dest = SET_DEST (temp_expr);
 	  i2dest_killed = dead_or_set_p (i2, i2dest);
 
 	  /* Replace the source in I2 with the new constant and make the
 	     resulting insn the new pattern for I3.  Then skip to where we
 	     validate the pattern.  Everything was set up above.  */
-	  SUBST (SET_SRC (temp),
-		 immed_wide_int_const (o, GET_MODE (SET_DEST (temp))));
+	  SUBST (SET_SRC (temp_expr),
+		 immed_wide_int_const (o, GET_MODE (SET_DEST (temp_expr))));
 
 	  newpat = PATTERN (i2);
 
@@ -2739,9 +2743,10 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 	     never appear in the insn stream so giving it the same INSN_UID
 	     as I2 will not cause a problem.  */
 
-	  i1 = gen_rtx_INSN (VOIDmode, NULL_RTX, i2, BLOCK_FOR_INSN (i2),
-			     XVECEXP (PATTERN (i2), 0, 1), INSN_LOCATION (i2),
-			     -1, NULL_RTX);
+	  i1 = as_a <rtx_insn *> (
+		 gen_rtx_INSN (VOIDmode, NULL_RTX, i2, BLOCK_FOR_INSN (i2),
+			       XVECEXP (PATTERN (i2), 0, 1), INSN_LOCATION (i2),
+			       -1, NULL_RTX));
 	  INSN_UID (i1) = INSN_UID (i2);
 
 	  SUBST (PATTERN (i2), XVECEXP (PATTERN (i2), 0, 0));
@@ -2753,10 +2758,10 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 #endif
 
   /* Verify that I2 and I1 are valid for combining.  */
-  if (! can_combine_p (i2, i3, i0, i1, NULL_RTX, NULL_RTX, &i2dest, &i2src)
-      || (i1 && ! can_combine_p (i1, i3, i0, NULL_RTX, i2, NULL_RTX,
+  if (! can_combine_p (i2, i3, i0, i1, NULL, NULL, &i2dest, &i2src)
+      || (i1 && ! can_combine_p (i1, i3, i0, NULL, i2, NULL,
 				 &i1dest, &i1src))
-      || (i0 && ! can_combine_p (i0, i3, NULL_RTX, NULL_RTX, i1, i2,
+      || (i0 && ! can_combine_p (i0, i3, NULL, NULL, i1, i2,
 				 &i0dest, &i0src)))
     {
       undo_all ();
@@ -2929,7 +2934,8 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
       && rtx_equal_p (XEXP (SET_SRC (PATTERN (i3)), 0), i2dest))
     {
       rtx newpat_dest;
-      rtx *cc_use_loc = NULL, cc_use_insn = NULL_RTX;
+      rtx *cc_use_loc = NULL;
+      rtx_insn *cc_use_insn = NULL;
       rtx op0 = i2src, op1 = XEXP (SET_SRC (PATTERN (i3)), 1);
       enum machine_mode compare_mode, orig_compare_mode;
       enum rtx_code compare_code = UNKNOWN, orig_compare_code = UNKNOWN;
@@ -3082,7 +3088,7 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 	   /* Before we can do this substitution, we must redo the test done
 	      above (see detailed comments there) that ensures I1DEST isn't
 	      mentioned in any SETs in NEWPAT that are field assignments.  */
-	  || !combinable_i3pat (NULL_RTX, &newpat, i1dest, NULL_RTX, NULL_RTX,
+	  || !combinable_i3pat (NULL, &newpat, i1dest, NULL_RTX, NULL_RTX,
 				0, 0, 0))
 	{
 	  undo_all ();
@@ -3117,7 +3123,7 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 	   && ((i0_feeds_i2_n && dead_or_set_p (i2, i0dest))
 	       || (i0_feeds_i1_n && dead_or_set_p (i1, i0dest)))
 	   && !reg_overlap_mentioned_p (i0dest, newpat))
-	  || !combinable_i3pat (NULL_RTX, &newpat, i0dest, NULL_RTX, NULL_RTX,
+	  || !combinable_i3pat (NULL, &newpat, i0dest, NULL_RTX, NULL_RTX,
 				0, 0, 0))
 	{
 	  undo_all ();
@@ -3632,20 +3638,20 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 				   DF_INSN_LUID (i2))
 	   && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != ZERO_EXTRACT
 	   && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != STRICT_LOW_PART
-	   && ! (temp = SET_DEST (XVECEXP (newpat, 0, 1)),
-		 (REG_P (temp)
-		  && reg_stat[REGNO (temp)].nonzero_bits != 0
-		  && GET_MODE_PRECISION (GET_MODE (temp)) < BITS_PER_WORD
-		  && GET_MODE_PRECISION (GET_MODE (temp)) < HOST_BITS_PER_INT
-		  && (reg_stat[REGNO (temp)].nonzero_bits
+	   && ! (temp_expr = SET_DEST (XVECEXP (newpat, 0, 1)),
+		 (REG_P (temp_expr)
+		  && reg_stat[REGNO (temp_expr)].nonzero_bits != 0
+		  && GET_MODE_PRECISION (GET_MODE (temp_expr)) < BITS_PER_WORD
+		  && GET_MODE_PRECISION (GET_MODE (temp_expr)) < HOST_BITS_PER_INT
+		  && (reg_stat[REGNO (temp_expr)].nonzero_bits
 		      != GET_MODE_MASK (word_mode))))
 	   && ! (GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) == SUBREG
-		 && (temp = SUBREG_REG (SET_DEST (XVECEXP (newpat, 0, 1))),
-		     (REG_P (temp)
-		      && reg_stat[REGNO (temp)].nonzero_bits != 0
-		      && GET_MODE_PRECISION (GET_MODE (temp)) < BITS_PER_WORD
-		      && GET_MODE_PRECISION (GET_MODE (temp)) < HOST_BITS_PER_INT
-		      && (reg_stat[REGNO (temp)].nonzero_bits
+		 && (temp_expr = SUBREG_REG (SET_DEST (XVECEXP (newpat, 0, 1))),
+		     (REG_P (temp_expr)
+		      && reg_stat[REGNO (temp_expr)].nonzero_bits != 0
+		      && GET_MODE_PRECISION (GET_MODE (temp_expr)) < BITS_PER_WORD
+		      && GET_MODE_PRECISION (GET_MODE (temp_expr)) < HOST_BITS_PER_INT
+		      && (reg_stat[REGNO (temp_expr)].nonzero_bits
 			  != GET_MODE_MASK (word_mode)))))
 	   && ! reg_overlap_mentioned_p (SET_DEST (XVECEXP (newpat, 0, 1)),
 					 SET_SRC (XVECEXP (newpat, 0, 1)))
@@ -3792,7 +3798,7 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
   /* If I2 is the CC0 setter and I3 is the CC0 user then check whether
      they are adjacent to each other or not.  */
   {
-    rtx p = prev_nonnote_insn (i3);
+    rtx_insn *p = prev_nonnote_insn (i3);
     if (p && p != i2 && NONJUMP_INSN_P (p) && newi2pat
 	&& sets_cc0_p (newi2pat))
       {
@@ -3840,7 +3846,7 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 	    else
 	      {
 		rtx tempreg = gen_raw_REG (old_mode, REGNO (reg));
-		rtx first, last;
+		rtx_insn *first, *last;
 
 		if (reg == i2dest)
 		  {
@@ -3911,14 +3917,14 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 	    remove_note (undobuf.other_insn, note);
 	}
 
-      distribute_notes (new_other_notes, undobuf.other_insn,
-			undobuf.other_insn, NULL_RTX, NULL_RTX, NULL_RTX,
+      distribute_notes  (new_other_notes, undobuf.other_insn,
+			undobuf.other_insn, NULL, NULL_RTX, NULL_RTX,
 			NULL_RTX);
     }
 
   if (swap_i2i3)
     {
-      rtx insn;
+      rtx_insn *insn;
       struct insn_link *link;
       rtx ni2dest;
 
@@ -4058,13 +4064,13 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 	      && SET_DEST (XVECEXP (PATTERN (i2), 0, i)) != i2dest
 	      && ! find_reg_note (i2, REG_UNUSED,
 				  SET_DEST (XVECEXP (PATTERN (i2), 0, i))))
-	    for (temp = NEXT_INSN (i2);
-		 temp
+	    for (temp_insn = NEXT_INSN (i2);
+		 temp_insn
 		 && (this_basic_block->next_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)
-			  || BB_HEAD (this_basic_block) != temp);
-		 temp = NEXT_INSN (temp))
-	      if (temp != i3 && INSN_P (temp))
-		FOR_EACH_LOG_LINK (link, temp)
+			  || BB_HEAD (this_basic_block) != temp_insn);
+		 temp_insn = NEXT_INSN (temp_insn))
+	      if (temp_insn != i3 && INSN_P (temp_insn))
+		FOR_EACH_LOG_LINK (link, temp_insn)
 		  if (link->insn == i2)
 		    link->insn = i3;
 
@@ -4138,19 +4144,19 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
 
     /* Distribute all the LOG_LINKS and REG_NOTES from I1, I2, and I3.  */
     if (i3notes)
-      distribute_notes (i3notes, i3, i3, newi2pat ? i2 : NULL_RTX,
+      distribute_notes (i3notes, i3, i3, newi2pat ? i2 : NULL,
 			elim_i2, elim_i1, elim_i0);
     if (i2notes)
-      distribute_notes (i2notes, i2, i3, newi2pat ? i2 : NULL_RTX,
+      distribute_notes (i2notes, i2, i3, newi2pat ? i2 : NULL,
 			elim_i2, elim_i1, elim_i0);
     if (i1notes)
-      distribute_notes (i1notes, i1, i3, newi2pat ? i2 : NULL_RTX,
+      distribute_notes (i1notes, i1, i3, newi2pat ? i2 : NULL,
 			elim_i2, elim_i1, elim_i0);
     if (i0notes)
-      distribute_notes (i0notes, i0, i3, newi2pat ? i2 : NULL_RTX,
+      distribute_notes (i0notes, i0, i3, newi2pat ? i2 : NULL,
 			elim_i2, elim_i1, elim_i0);
     if (midnotes)
-      distribute_notes (midnotes, NULL_RTX, i3, newi2pat ? i2 : NULL_RTX,
+      distribute_notes (midnotes, NULL, i3, newi2pat ? i2 : NULL,
 			elim_i2, elim_i1, elim_i0);
 
     /* Distribute any notes added to I2 or I3 by recog_for_combine.  We
@@ -4158,11 +4164,11 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
        so we always pass it as i3.  */
 
     if (newi2pat && new_i2_notes)
-      distribute_notes (new_i2_notes, i2, i2, NULL_RTX, NULL_RTX, NULL_RTX,
+      distribute_notes (new_i2_notes, i2, i2, NULL, NULL_RTX, NULL_RTX,
 			NULL_RTX);
 
     if (new_i3_notes)
-      distribute_notes (new_i3_notes, i3, i3, NULL_RTX, NULL_RTX, NULL_RTX,
+      distribute_notes (new_i3_notes, i3, i3, NULL, NULL_RTX, NULL_RTX,
 			NULL_RTX);
 
     /* If I3DEST was used in I3SRC, it really died in I3.  We may need to
@@ -4176,10 +4182,10 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
       {
 	rtx new_note = alloc_reg_note (REG_DEAD, i3dest_killed, NULL_RTX);
 	if (newi2pat && reg_set_p (i3dest_killed, newi2pat))
-	  distribute_notes (new_note, NULL_RTX, i2, NULL_RTX, elim_i2,
+	  distribute_notes (new_note, NULL, i2, NULL, elim_i2,
 			    elim_i1, elim_i0);
 	else
-	  distribute_notes (new_note, NULL_RTX, i3, newi2pat ? i2 : NULL_RTX,
+	  distribute_notes (new_note, NULL, i3, newi2pat ? i2 : NULL,
 			    elim_i2, elim_i1, elim_i0);
       }
 
@@ -4187,10 +4193,10 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
       {
 	rtx new_note = alloc_reg_note (REG_DEAD, i2dest, NULL_RTX);
 	if (newi2pat && reg_set_p (i2dest, newi2pat))
-	  distribute_notes (new_note,  NULL_RTX, i2, NULL_RTX, NULL_RTX,
+	  distribute_notes (new_note,  NULL, i2, NULL, NULL_RTX,
 			    NULL_RTX, NULL_RTX);
 	else
-	  distribute_notes (new_note, NULL_RTX, i3, newi2pat ? i2 : NULL_RTX,
+	  distribute_notes (new_note, NULL, i3, newi2pat ? i2 : NULL,
 			    NULL_RTX, NULL_RTX, NULL_RTX);
       }
 
@@ -4198,10 +4204,10 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
       {
 	rtx new_note = alloc_reg_note (REG_DEAD, i1dest, NULL_RTX);
 	if (newi2pat && reg_set_p (i1dest, newi2pat))
-	  distribute_notes (new_note, NULL_RTX, i2, NULL_RTX, NULL_RTX,
+	  distribute_notes (new_note, NULL, i2, NULL, NULL_RTX,
 			    NULL_RTX, NULL_RTX);
 	else
-	  distribute_notes (new_note, NULL_RTX, i3, newi2pat ? i2 : NULL_RTX,
+	  distribute_notes (new_note, NULL, i3, newi2pat ? i2 : NULL,
 			    NULL_RTX, NULL_RTX, NULL_RTX);
       }
 
@@ -4209,10 +4215,10 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
       {
 	rtx new_note = alloc_reg_note (REG_DEAD, i0dest, NULL_RTX);
 	if (newi2pat && reg_set_p (i0dest, newi2pat))
-	  distribute_notes (new_note, NULL_RTX, i2, NULL_RTX, NULL_RTX,
+	  distribute_notes (new_note, NULL, i2, NULL, NULL_RTX,
 			    NULL_RTX, NULL_RTX);
 	else
-	  distribute_notes (new_note, NULL_RTX, i3, newi2pat ? i2 : NULL_RTX,
+	  distribute_notes (new_note, NULL, i3, newi2pat ? i2 : NULL,
 			    NULL_RTX, NULL_RTX, NULL_RTX);
       }
 
@@ -4224,7 +4230,8 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
     if (REG_P (i2dest))
       {
 	struct insn_link *link;
-	rtx i2_insn = 0, i2_val = 0, set;
+	rtx_insn *i2_insn = 0;
+	rtx i2_val = 0, set;
 
 	/* The insn that used to set this register doesn't exist, and
 	   this life of the register may not exist either.  See if one of
@@ -4251,7 +4258,8 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
     if (i1 && REG_P (i1dest))
       {
 	struct insn_link *link;
-	rtx i1_insn = 0, i1_val = 0, set;
+	rtx_insn *i1_insn = 0;
+	rtx i1_val = 0, set;
 
 	FOR_EACH_LOG_LINK (link, i3)
 	  if ((set = single_set (link->insn)) != 0
@@ -4267,7 +4275,8 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx i0, int *new_direct_jump_p,
     if (i0 && REG_P (i0dest))
       {
 	struct insn_link *link;
-	rtx i0_insn = 0, i0_val = 0, set;
+	rtx_insn *i0_insn = 0;
+	rtx i0_val = 0, set;
 
 	FOR_EACH_LOG_LINK (link, i3)
 	  if ((set = single_set (link->insn)) != 0
@@ -4447,7 +4456,7 @@ undo_commit (void)
    two insns.  */
 
 static rtx *
-find_split_point (rtx *loc, rtx insn, bool set_src)
+find_split_point (rtx *loc, rtx_insn *insn, bool set_src)
 {
   rtx x = *loc;
   enum rtx_code code = GET_CODE (x);
@@ -4657,7 +4666,7 @@ find_split_point (rtx *loc, rtx insn, bool set_src)
 	      && REG_P (XEXP (SET_SRC (x), 0))
 	      && (pos = exact_log2 (UINTVAL (XEXP (SET_SRC (x), 1)))) >= 7
 	      && REG_P (SET_DEST (x))
-	      && (split = find_single_use (SET_DEST (x), insn, (rtx*) 0)) != 0
+	      && (split = find_single_use (SET_DEST (x), insn, NULL)) != 0
 	      && (GET_CODE (*split) == EQ || GET_CODE (*split) == NE)
 	      && XEXP (*split, 0) == SET_DEST (x)
 	      && XEXP (*split, 1) == const0_rtx)
@@ -6235,7 +6244,7 @@ simplify_set (rtx x)
   rtx dest = SET_DEST (x);
   enum machine_mode mode
     = GET_MODE (src) != VOIDmode ? GET_MODE (src) : GET_MODE (dest);
-  rtx other_insn;
+  rtx_insn *other_insn;
   rtx *cc_use;
 
   /* (set (pc) (return)) gets written as (return).  */
@@ -10551,7 +10560,7 @@ simplify_shift_const (rtx x, enum rtx_code code, enum machine_mode result_mode,
    or -1.  */
 
 static int
-recog_for_combine (rtx *pnewpat, rtx insn, rtx *pnotes)
+recog_for_combine (rtx *pnewpat, rtx_insn *insn, rtx *pnotes)
 {
   rtx pat = *pnewpat;
   rtx pat_without_clobbers;
@@ -12171,7 +12180,7 @@ update_table_tick (rtx x)
    register.  */
 
 static void
-record_value_for_reg (rtx reg, rtx insn, rtx value)
+record_value_for_reg (rtx reg, rtx_insn *insn, rtx value)
 {
   unsigned int regno = REGNO (reg);
   unsigned int endregno = END_REGNO (reg);
@@ -12289,7 +12298,7 @@ record_value_for_reg (rtx reg, rtx insn, rtx value)
 static void
 record_dead_and_set_regs_1 (rtx dest, const_rtx setter, void *data)
 {
-  rtx record_dead_insn = (rtx) data;
+  rtx_insn *record_dead_insn = (rtx_insn *) data;
 
   if (GET_CODE (dest) == SUBREG)
     dest = SUBREG_REG (dest);
@@ -12297,7 +12306,7 @@ record_dead_and_set_regs_1 (rtx dest, const_rtx setter, void *data)
   if (!record_dead_insn)
     {
       if (REG_P (dest))
-	record_value_for_reg (dest, NULL_RTX, NULL_RTX);
+	record_value_for_reg (dest, NULL, NULL_RTX);
       return;
     }
 
@@ -12336,7 +12345,7 @@ record_dead_and_set_regs_1 (rtx dest, const_rtx setter, void *data)
    most recent subroutine call).  */
 
 static void
-record_dead_and_set_regs (rtx insn)
+record_dead_and_set_regs (rtx_insn *insn)
 {
   rtx link;
   unsigned int i;
@@ -12401,7 +12410,7 @@ record_dead_and_set_regs (rtx insn)
    missed because of that.  */
 
 static void
-record_promoted_value (rtx insn, rtx subreg)
+record_promoted_value (rtx_insn *insn, rtx subreg)
 {
   struct insn_link *links;
   rtx set;
@@ -12523,7 +12532,7 @@ record_truncated_values (rtx *x, void *data ATTRIBUTE_UNUSED)
    note what it implies to the registers used in it.  */
 
 static void
-check_promoted_subreg (rtx insn, rtx x)
+check_promoted_subreg (rtx_insn *insn, rtx x)
 {
   if (GET_CODE (x) == SUBREG
       && SUBREG_PROMOTED_VAR_P (x)
@@ -12560,7 +12569,7 @@ check_promoted_subreg (rtx insn, rtx x)
    was produced from.  */
 
 static int
-get_last_value_validate (rtx *loc, rtx insn, int tick, int replace)
+get_last_value_validate (rtx *loc, rtx_insn *insn, int tick, int replace)
 {
   rtx x = *loc;
   const char *fmt = GET_RTX_FORMAT (GET_CODE (x));
@@ -12808,7 +12817,7 @@ reg_dead_at_p_1 (rtx dest, const_rtx x, void *data ATTRIBUTE_UNUSED)
    must be assumed to be always live.  */
 
 static int
-reg_dead_at_p (rtx reg, rtx insn)
+reg_dead_at_p (rtx reg, rtx_insn *insn)
 {
   basic_block block;
   unsigned int i;
@@ -12980,7 +12989,7 @@ remove_death (unsigned int regno, rtx insn)
    notes will then be distributed as needed.  */
 
 static void
-move_deaths (rtx x, rtx maybe_kill_insn, int from_luid, rtx to_insn,
+move_deaths (rtx x, rtx maybe_kill_insn, int from_luid, rtx_insn *to_insn,
 	     rtx *pnotes)
 {
   const char *fmt;
@@ -13181,15 +13190,16 @@ reg_bitfield_target_p (rtx x, rtx body)
    on the type of note.  */
 
 static void
-distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2, rtx elim_i2,
-		  rtx elim_i1, rtx elim_i0)
+distribute_notes (rtx notes, rtx_insn *from_insn, rtx_insn *i3, rtx_insn *i2,
+		  rtx elim_i2, rtx elim_i1, rtx elim_i0)
 {
   rtx note, next_note;
-  rtx tem;
+  rtx tem_note;
+  rtx_insn *tem_insn;
 
   for (note = notes; note; note = next_note)
     {
-      rtx place = 0, place2 = 0;
+      rtx_insn *place = 0, *place2 = 0;
 
       next_note = XEXP (note, 1);
       switch (REG_NOTE_KIND (note))
@@ -13360,16 +13370,16 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2, rtx elim_i2,
 	     a REG_EQUAL note.  */
 	  /* ??? Ignore the without-reg_equal-note problem for now.  */
 	  if (reg_mentioned_p (XEXP (note, 0), PATTERN (i3))
-	      || ((tem = find_reg_note (i3, REG_EQUAL, NULL_RTX))
-		  && GET_CODE (XEXP (tem, 0)) == LABEL_REF
-		  && XEXP (XEXP (tem, 0), 0) == XEXP (note, 0)))
+	      || ((tem_note = find_reg_note (i3, REG_EQUAL, NULL_RTX))
+		  && GET_CODE (XEXP (tem_note, 0)) == LABEL_REF
+		  && XEXP (XEXP (tem_note, 0), 0) == XEXP (note, 0)))
 	    place = i3;
 
 	  if (i2
 	      && (reg_mentioned_p (XEXP (note, 0), PATTERN (i2))
-		  || ((tem = find_reg_note (i2, REG_EQUAL, NULL_RTX))
-		      && GET_CODE (XEXP (tem, 0)) == LABEL_REF
-		      && XEXP (XEXP (tem, 0), 0) == XEXP (note, 0))))
+		  || ((tem_note = find_reg_note (i2, REG_EQUAL, NULL_RTX))
+		      && GET_CODE (XEXP (tem_note, 0)) == LABEL_REF
+		      && XEXP (XEXP (tem_note, 0), 0) == XEXP (note, 0))))
 	    {
 	      if (place)
 		place2 = i2;
@@ -13441,7 +13451,7 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2, rtx elim_i2,
 	  if (from_insn
 	      && from_insn == i2mod
 	      && !reg_overlap_mentioned_p (XEXP (note, 0), i2mod_new_rhs))
-	    tem = from_insn;
+	    tem_insn = from_insn;
 	  else
 	    {
 	      if (from_insn
@@ -13460,34 +13470,34 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2, rtx elim_i2,
 		       || rtx_equal_p (XEXP (note, 0), elim_i1)
 		       || rtx_equal_p (XEXP (note, 0), elim_i0))
 		break;
-	      tem = i3;
+	      tem_insn = i3;
 	    }
 
 	  if (place == 0)
 	    {
 	      basic_block bb = this_basic_block;
 
-	      for (tem = PREV_INSN (tem); place == 0; tem = PREV_INSN (tem))
+	      for (tem_insn = PREV_INSN (tem_insn); place == 0; tem_insn = PREV_INSN (tem_insn))
 		{
-		  if (!NONDEBUG_INSN_P (tem))
+		  if (!NONDEBUG_INSN_P (tem_insn))
 		    {
-		      if (tem == BB_HEAD (bb))
+		      if (tem_insn == BB_HEAD (bb))
 			break;
 		      continue;
 		    }
 
-		  /* If the register is being set at TEM, see if that is all
-		     TEM is doing.  If so, delete TEM.  Otherwise, make this
+		  /* If the register is being set at TEM_INSN, see if that is all
+		     TEM_INSN is doing.  If so, delete TEM_INSN.  Otherwise, make this
 		     into a REG_UNUSED note instead. Don't delete sets to
 		     global register vars.  */
 		  if ((REGNO (XEXP (note, 0)) >= FIRST_PSEUDO_REGISTER
 		       || !global_regs[REGNO (XEXP (note, 0))])
-		      && reg_set_p (XEXP (note, 0), PATTERN (tem)))
+		      && reg_set_p (XEXP (note, 0), PATTERN (tem_insn)))
 		    {
-		      rtx set = single_set (tem);
+		      rtx set = single_set (tem_insn);
 		      rtx inner_dest = 0;
 #ifdef HAVE_cc0
-		      rtx cc0_setter = NULL_RTX;
+		      rtx_insn *cc0_setter = NULL;
 #endif
 
 		      if (set != 0)
@@ -13510,27 +13520,27 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2, rtx elim_i2,
 			  && rtx_equal_p (XEXP (note, 0), inner_dest)
 #ifdef HAVE_cc0
 			  && (! reg_mentioned_p (cc0_rtx, SET_SRC (set))
-			      || ((cc0_setter = prev_cc0_setter (tem)) != NULL
+			      || ((cc0_setter = prev_cc0_setter (tem_insn)) != NULL
 				  && sets_cc0_p (PATTERN (cc0_setter)) > 0))
 #endif
 			  )
 			{
-			  /* Move the notes and links of TEM elsewhere.
+			  /* Move the notes and links of TEM_INSN elsewhere.
 			     This might delete other dead insns recursively.
 			     First set the pattern to something that won't use
 			     any register.  */
-			  rtx old_notes = REG_NOTES (tem);
+			  rtx old_notes = REG_NOTES (tem_insn);
 
-			  PATTERN (tem) = pc_rtx;
-			  REG_NOTES (tem) = NULL;
+			  PATTERN (tem_insn) = pc_rtx;
+			  REG_NOTES (tem_insn) = NULL;
 
-			  distribute_notes (old_notes, tem, tem, NULL_RTX,
+			  distribute_notes (old_notes, tem_insn, tem_insn, NULL,
 					    NULL_RTX, NULL_RTX, NULL_RTX);
-			  distribute_links (LOG_LINKS (tem));
+			  distribute_links (LOG_LINKS (tem_insn));
 
-			  SET_INSN_DELETED (tem);
-			  if (tem == i2)
-			    i2 = NULL_RTX;
+			  SET_INSN_DELETED (tem_insn);
+			  if (tem_insn == i2)
+			    i2 = NULL;
 
 #ifdef HAVE_cc0
 			  /* Delete the setter too.  */
@@ -13541,13 +13551,13 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2, rtx elim_i2,
 			      REG_NOTES (cc0_setter) = NULL;
 
 			      distribute_notes (old_notes, cc0_setter,
-						cc0_setter, NULL_RTX,
+						cc0_setter, NULL,
 						NULL_RTX, NULL_RTX, NULL_RTX);
 			      distribute_links (LOG_LINKS (cc0_setter));
 
 			      SET_INSN_DELETED (cc0_setter);
 			      if (cc0_setter == i2)
-				i2 = NULL_RTX;
+				i2 = NULL;
 			    }
 #endif
 			}
@@ -13561,17 +13571,17 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2, rtx elim_i2,
 			      match the algorithm used in lifetime analysis
 			      and can cause the consistency check in the
 			      scheduler to fail.  */
-			  if (! find_regno_note (tem, REG_UNUSED,
+			  if (! find_regno_note (tem_insn, REG_UNUSED,
 						 REGNO (XEXP (note, 0))))
-			    place = tem;
+			    place = tem_insn;
 			  break;
 			}
 		    }
-		  else if (reg_referenced_p (XEXP (note, 0), PATTERN (tem))
-			   || (CALL_P (tem)
-			       && find_reg_fusage (tem, USE, XEXP (note, 0))))
+		  else if (reg_referenced_p (XEXP (note, 0), PATTERN (tem_insn))
+			   || (CALL_P (tem_insn)
+			       && find_reg_fusage (tem_insn, USE, XEXP (note, 0))))
 		    {
-		      place = tem;
+		      place = tem_insn;
 
 		      /* If we are doing a 3->2 combination, and we have a
 			 register which formerly died in i3 and was not used
@@ -13591,7 +13601,7 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2, rtx elim_i2,
 		      break;
 		    }
 
-		  if (tem == BB_HEAD (bb))
+		  if (tem_insn == BB_HEAD (bb))
 		    break;
 		}
 
@@ -13665,26 +13675,26 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2, rtx elim_i2,
 							     NULL_RTX);
 
 			      distribute_notes (new_note, place, place,
-						NULL_RTX, NULL_RTX, NULL_RTX,
+						NULL, NULL_RTX, NULL_RTX,
 						NULL_RTX);
 			    }
 			  else if (! refers_to_regno_p (i, i + 1,
 							PATTERN (place), 0)
 				   && ! find_regno_fusage (place, USE, i))
-			    for (tem = PREV_INSN (place); ;
-				 tem = PREV_INSN (tem))
+			    for (tem_insn = PREV_INSN (place); ;
+				 tem_insn = PREV_INSN (tem_insn))
 			      {
-				if (!NONDEBUG_INSN_P (tem))
+				if (!NONDEBUG_INSN_P (tem_insn))
 				  {
-				    if (tem == BB_HEAD (bb))
+				    if (tem_insn == BB_HEAD (bb))
 			 	      break;
 				    continue;
 				  }
-				if (dead_or_set_p (tem, piece)
+				if (dead_or_set_p (tem_insn, piece)
 				    || reg_bitfield_target_p (piece,
-							      PATTERN (tem)))
+							      PATTERN (tem_insn)))
 				  {
-				    add_reg_note (tem, REG_UNUSED, piece);
+				    add_reg_note (tem_insn, REG_UNUSED, piece);
 				    break;
 				  }
 			      }
@@ -13724,8 +13734,8 @@ distribute_links (struct insn_link *links)
 
   for (link = links; link; link = next_link)
     {
-      rtx place = 0;
-      rtx insn;
+      rtx_insn *place = 0;
+      rtx_insn *insn;
       rtx set, reg;
 
       next_link = link->next;
-- 
1.8.5.3

Re: [PATCH 061/236] combine.c: Use rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* combine.c (i2mod): Strengthen this variable from rtx to rtx_insn *.
> 	(struct reg_stat_struct): Likewise for fields "last_death", "last_set".
> 	(subst_insn): Likewise for this variable.
> 	(added_links_insn): Likewise.
> 	(struct insn_link): Likewise for field "insn".
> 	(alloc_insn_link): Likewise for param "insn".
> 	(struct undobuf): Likewise for field "other_insn".
> 	(find_single_use): Likewise for param "insn" and local "next".
> 	(combine_validate_cost): Likewise for params "i0", "i1", "i2", "i3".
> 	(delete_noop_moves): Likewise for locals "insn", "next".
> 	(create_log_links): Likewise for locals "insn", "use_insn".
> 	Strengthen local "next_use" from rtx * to rtx_insn **.
> 	(insn_a_feeds_b): Likewise for params "a", "b".
> 	(combine_instructions): Likewise for param "f" and locals "insn",
> 	"next", "prev", "first", "last_combined_insn", "link", "link1",
> 	"temp".  Replace use of NULL_RTX with NULL when referring to
> 	insns.
> 	(setup_incoming_promotions): Likewise for param "first"
> 	(set_nonzero_bits_and_sign_copies): Likewise for local "insn".
> 	(can_combine_p): Likewise for params "insn", "i3", "pred",
> 	"pred2", "succ", "succ2" and for local "p".
> 	(combinable_i3pat): Likewise for param "i3".
> 	(cant_combine_insn_p): Likewise for param "insn".
> 	(likely_spilled_retval_p): Likewise.
> 	(adjust_for_new_dest): Likewise.
> 	(update_cfg_for_uncondjump): Likewise, also for local "insn".
> 	(try_combine): Likewise for return type and for params "i3", "i2",
> 	"i1", "i0", "last_combined_insn", and for locals "insn",
> 	"cc_use_insn", "p", "first", "last", "i2_insn", "i1_insn",
> 	"i0_insn".  Eliminate local "tem" in favor of new locals
> 	"tem_note" and "tem_insn", the latter being an rtx_insn *.  Add a
> 	checked cast for now to rtx_insn * on the return type of
> 	gen_rtx_INSN.  Replace use of NULL_RTX with NULL when referring to
> 	insns.
> 	(find_split_point): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(simplify_set): Likewise for local "other_insn".
> 	(recog_for_combine): Likewise for param "insn".
> 	(record_value_for_reg): Likewise.
> 	(record_dead_and_set_regs_1): Likewise for local
> 	"record_dead_insn".
> 	(record_dead_and_set_regs): Likewise for param "insn".
> 	(record_promoted_value): Likewise.
> 	(check_promoted_subreg): Likewise.
> 	(get_last_value_validate): Likewise.
> 	(reg_dead_at_p): Likewise.
> 	(move_deaths): Likewise for param "to_insn".
> 	(distribute_notes): Likewise for params "from_insn", "i3", "i2"
> 	and locals "place", "place2", "cc0_setter".  Eliminate local "tem
> 	in favor of new locals "tem_note" and "tem_insn", the latter being
> 	an rtx_insn *.
> 	(distribute_links): Strengthen locals "place", "insn" from rtx to
> 	rtx_insn *.
> ---
OK.

As are patches #62-

Just to be clear, these are largely mechanical changes.  Changes to 
signatures, variables and the like I'm just scanning without deep 
inspection.   Changes in code get more attention, but they're usually 
NULL_RTX->NULL or checked casts.  The checked casts I'm holding my nose 
in the hope that many are going away.   I think after this kit does in, 
a scan of the remaining checked casts would be advisable :-)

jeff

Re: [PATCH 061/236] combine.c: Use rtx_insn

[Jeff Law]

On 08/13/14 12:39, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
>> gcc/
>>     * combine.c (i2mod): Strengthen this variable from rtx to rtx_insn *.
>>     (struct reg_stat_struct): Likewise for fields "last_death",
>> "last_set".
>>     (subst_insn): Likewise for this variable.
>>     (added_links_insn): Likewise.
>>     (struct insn_link): Likewise for field "insn".
>>     (alloc_insn_link): Likewise for param "insn".
>>     (struct undobuf): Likewise for field "other_insn".
>>     (find_single_use): Likewise for param "insn" and local "next".
>>     (combine_validate_cost): Likewise for params "i0", "i1", "i2", "i3".
>>     (delete_noop_moves): Likewise for locals "insn", "next".
>>     (create_log_links): Likewise for locals "insn", "use_insn".
>>     Strengthen local "next_use" from rtx * to rtx_insn **.
>>     (insn_a_feeds_b): Likewise for params "a", "b".
>>     (combine_instructions): Likewise for param "f" and locals "insn",
>>     "next", "prev", "first", "last_combined_insn", "link", "link1",
>>     "temp".  Replace use of NULL_RTX with NULL when referring to
>>     insns.
>>     (setup_incoming_promotions): Likewise for param "first"
>>     (set_nonzero_bits_and_sign_copies): Likewise for local "insn".
>>     (can_combine_p): Likewise for params "insn", "i3", "pred",
>>     "pred2", "succ", "succ2" and for local "p".
>>     (combinable_i3pat): Likewise for param "i3".
>>     (cant_combine_insn_p): Likewise for param "insn".
>>     (likely_spilled_retval_p): Likewise.
>>     (adjust_for_new_dest): Likewise.
>>     (update_cfg_for_uncondjump): Likewise, also for local "insn".
>>     (try_combine): Likewise for return type and for params "i3", "i2",
>>     "i1", "i0", "last_combined_insn", and for locals "insn",
>>     "cc_use_insn", "p", "first", "last", "i2_insn", "i1_insn",
>>     "i0_insn".  Eliminate local "tem" in favor of new locals
>>     "tem_note" and "tem_insn", the latter being an rtx_insn *.  Add a
>>     checked cast for now to rtx_insn * on the return type of
>>     gen_rtx_INSN.  Replace use of NULL_RTX with NULL when referring to
>>     insns.
>>     (find_split_point): Strengthen param "insn" from rtx to
>>     rtx_insn *.
>>     (simplify_set): Likewise for local "other_insn".
>>     (recog_for_combine): Likewise for param "insn".
>>     (record_value_for_reg): Likewise.
>>     (record_dead_and_set_regs_1): Likewise for local
>>     "record_dead_insn".
>>     (record_dead_and_set_regs): Likewise for param "insn".
>>     (record_promoted_value): Likewise.
>>     (check_promoted_subreg): Likewise.
>>     (get_last_value_validate): Likewise.
>>     (reg_dead_at_p): Likewise.
>>     (move_deaths): Likewise for param "to_insn".
>>     (distribute_notes): Likewise for params "from_insn", "i3", "i2"
>>     and locals "place", "place2", "cc0_setter".  Eliminate local "tem
>>     in favor of new locals "tem_note" and "tem_insn", the latter being
>>     an rtx_insn *.
>>     (distribute_links): Strengthen locals "place", "insn" from rtx to
>>     rtx_insn *.
>> ---
> OK.
>
> As are patches #62-
This should have been #62-#74.

Jeff

[PATCH 193/236] cselib (also touches sched-deps.c)

[David Malcolm]

gcc/
	* cselib.h (struct elt_loc_list): Strengthen field "setting_insn"
	from rtx to rtx_insn *.
	(cselib_lookup_from_insn): Likewise for final param.
	(cselib_subst_to_values_from_insn): Likewise.
	(cselib_add_permanent_equiv): Likewise.

	* cselib.c (cselib_current_insn): Likewise for this variable.
	(cselib_subst_to_values_from_insn): Likewise for param "insn".
	(cselib_lookup_from_insn): Likewise.
	(cselib_add_permanent_equiv): Likewise for param "insn" and local
	"save_cselib_current_insn".
	(cselib_process_insn): Replace use of NULL_RTX with NULL.

	* sched-deps.c (add_insn_mem_dependence): Strengthen param "insn"
	from rtx to rtx_insn *.
---
 gcc/cselib.c     | 16 ++++++++--------
 gcc/cselib.h     |  8 ++++----
 gcc/sched-deps.c |  2 +-
 3 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/gcc/cselib.c b/gcc/cselib.c
index f500d8a..54b6a41 100644
--- a/gcc/cselib.c
+++ b/gcc/cselib.c
@@ -152,7 +152,7 @@ static hash_table <cselib_hasher> cselib_preserved_hash_table;
 
 /* This is a global so we don't have to pass this through every function.
    It is used in new_elt_loc_list to set SETTING_INSN.  */
-static rtx cselib_current_insn;
+static rtx_insn *cselib_current_insn;
 
 /* The unique id that the next create value will take.  */
 static unsigned int next_uid;
@@ -1947,7 +1947,7 @@ cselib_subst_to_values (rtx x, enum machine_mode memmode)
 /* Wrapper for cselib_subst_to_values, that indicates X is in INSN.  */
 
 rtx
-cselib_subst_to_values_from_insn (rtx x, enum machine_mode memmode, rtx insn)
+cselib_subst_to_values_from_insn (rtx x, enum machine_mode memmode, rtx_insn *insn)
 {
   rtx ret;
   gcc_assert (!cselib_current_insn);
@@ -2088,7 +2088,7 @@ cselib_lookup_1 (rtx x, enum machine_mode mode,
 
 cselib_val *
 cselib_lookup_from_insn (rtx x, enum machine_mode mode,
-			 int create, enum machine_mode memmode, rtx insn)
+			 int create, enum machine_mode memmode, rtx_insn *insn)
 {
   cselib_val *ret;
 
@@ -2400,10 +2400,10 @@ cselib_record_set (rtx dest, cselib_val *src_elt, cselib_val *dest_addr_elt)
 /* Make ELT and X's VALUE equivalent to each other at INSN.  */
 
 void
-cselib_add_permanent_equiv (cselib_val *elt, rtx x, rtx insn)
+cselib_add_permanent_equiv (cselib_val *elt, rtx x, rtx_insn *insn)
 {
   cselib_val *nelt;
-  rtx save_cselib_current_insn = cselib_current_insn;
+  rtx_insn *save_cselib_current_insn = cselib_current_insn;
 
   gcc_checking_assert (elt);
   gcc_checking_assert (PRESERVED_VALUE_P (elt->val_rtx));
@@ -2640,13 +2640,13 @@ cselib_process_insn (rtx_insn *insn)
       && !cselib_preserve_constants)
     {
       cselib_reset_table (next_uid);
-      cselib_current_insn = NULL_RTX;
+      cselib_current_insn = NULL;
       return;
     }
 
   if (! INSN_P (insn))
     {
-      cselib_current_insn = NULL_RTX;
+      cselib_current_insn = NULL;
       return;
     }
 
@@ -2696,7 +2696,7 @@ cselib_process_insn (rtx_insn *insn)
       && fp_setter_insn (insn))
     cselib_invalidate_rtx (stack_pointer_rtx);
 
-  cselib_current_insn = NULL_RTX;
+  cselib_current_insn = NULL;
 
   if (n_useless_values > MAX_USELESS_VALUES
       /* remove_useless_values is linear in the hash table size.  Avoid
diff --git a/gcc/cselib.h b/gcc/cselib.h
index 67ce6da..ecf53e1 100644
--- a/gcc/cselib.h
+++ b/gcc/cselib.h
@@ -46,7 +46,7 @@ struct elt_loc_list {
   /* An rtl expression that holds the value.  */
   rtx loc;
   /* The insn that made the equivalence.  */
-  rtx setting_insn;
+  rtx_insn *setting_insn;
 };
 
 /* Describe a single set that is part of an insn.  */
@@ -71,7 +71,7 @@ extern void (*cselib_record_sets_hook) (rtx_insn *insn, struct cselib_set *sets,
 extern cselib_val *cselib_lookup (rtx, enum machine_mode,
 				  int, enum machine_mode);
 extern cselib_val *cselib_lookup_from_insn (rtx, enum machine_mode,
-					    int, enum machine_mode, rtx);
+					    int, enum machine_mode, rtx_insn *);
 extern void cselib_init (int);
 extern void cselib_clear_table (void);
 extern void cselib_finish (void);
@@ -87,7 +87,7 @@ extern rtx cselib_expand_value_rtx_cb (rtx, bitmap, int,
 extern bool cselib_dummy_expand_value_rtx_cb (rtx, bitmap, int,
 					      cselib_expand_callback, void *);
 extern rtx cselib_subst_to_values (rtx, enum machine_mode);
-extern rtx cselib_subst_to_values_from_insn (rtx, enum machine_mode, rtx);
+extern rtx cselib_subst_to_values_from_insn (rtx, enum machine_mode, rtx_insn *);
 extern void cselib_invalidate_rtx (rtx);
 
 extern void cselib_reset_table (unsigned int);
@@ -96,7 +96,7 @@ extern void cselib_preserve_value (cselib_val *);
 extern bool cselib_preserved_value_p (cselib_val *);
 extern void cselib_preserve_only_values (void);
 extern void cselib_preserve_cfa_base_value (cselib_val *, unsigned int);
-extern void cselib_add_permanent_equiv (cselib_val *, rtx, rtx);
+extern void cselib_add_permanent_equiv (cselib_val *, rtx, rtx_insn *);
 extern bool cselib_have_permanent_equivalences (void);
 extern void cselib_set_value_sp_based (cselib_val *);
 extern bool cselib_sp_based_value_p (cselib_val *);
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index 0ebca10..51008a4 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -1710,7 +1710,7 @@ chain_to_prev_insn (rtx_insn *insn)
 
 static void
 add_insn_mem_dependence (struct deps_desc *deps, bool read_p,
-			 rtx insn, rtx mem)
+			 rtx_insn *insn, rtx mem)
 {
   rtx *insn_list;
   rtx *mem_list;
-- 
1.8.5.3

[PATCH 112/236] sched-ebb.c: Use rtx_insn (requires touching sched-int.h and config/c6x/c6x.c)

[David Malcolm]

On c6x, this patch relies on hwloop_info "loop_end" already being an
rtx_insn *, so that schedule_ebb is always called with rtx_insn *.  The
hunk to change "loop_end" is within the "hw-loop" patch, which occurs
alphabetically before sched-ebb, so that's OK given an alphabetical
ordering of the patches in this phase of the kit.

gcc/
	* sched-int.h (schedule_ebb): Strengthen params "head", "tail"
	from rtx to rtx_insn *.

	* sched-ebb.c (earliest_block_with_similiar_load): Strengthen
	locals "insn1", "insn2" from rtx to rtx_insn *.
	(add_deps_for_risky_insns): Likewise for params "head", "tail" and
	locals "insn", "prev", "last_jump", "next_tail".
	(schedule_ebb): Likewise for params "head", "tail".
	(schedule_ebbs): Likewise for locals "tail", "head".

	* config/c6x/c6x.c (hwloop_optimize): For now, add a checked cast
	to rtx_insn on "last_insn" in one of the invocations of
	schedule_ebb.
---
 gcc/config/c6x/c6x.c |  4 +++-
 gcc/sched-ebb.c      | 20 ++++++++++----------
 gcc/sched-int.h      |  2 +-
 3 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index 6588d76..ba628d0 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -5668,7 +5668,9 @@ hwloop_optimize (hwloop_info loop)
       schedule_ebbs_init ();
       set_modulo_params (sp_ii, max_parallel, n_real_insns,
 			 sploop_max_uid_iter0);
-      tmp_bb = schedule_ebb (BB_HEAD (bb), last_insn, true);
+      tmp_bb = schedule_ebb (BB_HEAD (bb),
+			     as_a_nullable <rtx_insn *> (last_insn),
+			     true);
       schedule_ebbs_finish ();
 
       if (tmp_bb)
diff --git a/gcc/sched-ebb.c b/gcc/sched-ebb.c
index ce17214..100bf5b 100644
--- a/gcc/sched-ebb.c
+++ b/gcc/sched-ebb.c
@@ -61,7 +61,7 @@ static const char *ebb_print_insn (const_rtx, int);
 static int rank (rtx, rtx);
 static int ebb_contributes_to_priority (rtx, rtx);
 static basic_block earliest_block_with_similiar_load (basic_block, rtx);
-static void add_deps_for_risky_insns (rtx, rtx);
+static void add_deps_for_risky_insns (rtx_insn *, rtx_insn *);
 static void debug_ebb_dependencies (rtx, rtx);
 
 static void ebb_add_remove_insn (rtx, int);
@@ -338,7 +338,7 @@ earliest_block_with_similiar_load (basic_block last_block, rtx load_insn)
 
   FOR_EACH_DEP (load_insn, SD_LIST_BACK, back_sd_it, back_dep)
     {
-      rtx insn1 = DEP_PRO (back_dep);
+      rtx_insn *insn1 = DEP_PRO (back_dep);
 
       if (DEP_TYPE (back_dep) == REG_DEP_TRUE)
 	/* Found a DEF-USE dependence (insn1, load_insn).  */
@@ -348,7 +348,7 @@ earliest_block_with_similiar_load (basic_block last_block, rtx load_insn)
 
 	  FOR_EACH_DEP (insn1, SD_LIST_FORW, fore_sd_it, fore_dep)
 	    {
-	      rtx insn2 = DEP_CON (fore_dep);
+	      rtx_insn *insn2 = DEP_CON (fore_dep);
 	      basic_block insn2_block = BLOCK_FOR_INSN (insn2);
 
 	      if (DEP_TYPE (fore_dep) == REG_DEP_TRUE)
@@ -381,12 +381,12 @@ earliest_block_with_similiar_load (basic_block last_block, rtx load_insn)
    insns in given ebb.  */
 
 static void
-add_deps_for_risky_insns (rtx head, rtx tail)
+add_deps_for_risky_insns (rtx_insn *head, rtx_insn *tail)
 {
-  rtx insn, prev;
+  rtx_insn *insn, *prev;
   int classification;
-  rtx last_jump = NULL_RTX;
-  rtx next_tail = NEXT_INSN (tail);
+  rtx_insn *last_jump = NULL;
+  rtx_insn *next_tail = NEXT_INSN (tail);
   basic_block last_block = NULL, bb;
 
   for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
@@ -477,7 +477,7 @@ add_deps_for_risky_insns (rtx head, rtx tail)
    NULL_RTX.  */
 
 basic_block
-schedule_ebb (rtx head, rtx tail, bool modulo_scheduling)
+schedule_ebb (rtx_insn *head, rtx_insn *tail, bool modulo_scheduling)
 {
   basic_block first_bb, target_bb;
   struct deps_desc tmp_deps;
@@ -621,7 +621,7 @@ schedule_ebbs (void)
 {
   basic_block bb;
   int probability_cutoff;
-  rtx tail;
+  rtx_insn *tail;
 
   /* Taking care of this degenerate case makes the rest of
      this code simpler.  */
@@ -639,7 +639,7 @@ schedule_ebbs (void)
   /* Schedule every region in the subroutine.  */
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx head = BB_HEAD (bb);
+      rtx_insn *head = BB_HEAD (bb);
 
       if (bb->flags & BB_DISABLE_SCHEDULE)
 	continue;
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index df7795d..ae048c1 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -1377,7 +1377,7 @@ extern int number_in_ready (void);
 \f
 /* Types and functions in sched-ebb.c.  */
 
-extern basic_block schedule_ebb (rtx, rtx, bool);
+extern basic_block schedule_ebb (rtx_insn *, rtx_insn *, bool);
 extern void schedule_ebbs_init (void);
 extern void schedule_ebbs_finish (void);
 \f
-- 
1.8.5.3

[PATCH 067/236] ddg: Use rtx_insn

[David Malcolm]

gcc/
	* ddg.h (struct ddg_node): Strengthen fields "insn" and
	"first_note" from rtx to rtx_insn *.
	(get_node_of_insn): Likewise for param 2 "insn".
	(autoinc_var_is_used_p): Likewise for params "def_insn" and "use_insn".

	* ddg.c (mem_read_insn_p): Strengthen param "insn" from rtx to
	rtx_insn *.
	(mem_write_insn_p): Likewise.
	(mem_access_insn_p): Likewise.
	(autoinc_var_is_used_p): Likewise for params "def_insn" and "use_insn".
	(def_has_ccmode_p): Likewise for param "insn".
	(add_cross_iteration_register_deps): Likewise for locals
	"def_insn" and "use_insn".
	(insns_may_alias_p): Likewise for params "insn1" and "insn2".
	(build_intra_loop_deps): Likewise for local "src_insn".
	(create_ddg): Strengthen locals "insn" and "first_note" from rtx
	to rtx_insn *.
	(get_node_of_insn): Likewise for param "insn".
---
 gcc/ddg.c | 26 +++++++++++++-------------
 gcc/ddg.h |  8 ++++----
 2 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/gcc/ddg.c b/gcc/ddg.c
index d6ee0c2..1da2836 100644
--- a/gcc/ddg.c
+++ b/gcc/ddg.c
@@ -80,7 +80,7 @@ mark_mem_use_1 (rtx *x, void *data)
 
 /* Returns nonzero if INSN reads from memory.  */
 static bool
-mem_read_insn_p (rtx insn)
+mem_read_insn_p (rtx_insn *insn)
 {
   mem_ref_p = false;
   note_uses (&PATTERN (insn), mark_mem_use_1, NULL);
@@ -96,7 +96,7 @@ mark_mem_store (rtx loc, const_rtx setter ATTRIBUTE_UNUSED, void *data ATTRIBUTE
 
 /* Returns nonzero if INSN writes to memory.  */
 static bool
-mem_write_insn_p (rtx insn)
+mem_write_insn_p (rtx_insn *insn)
 {
   mem_ref_p = false;
   note_stores (PATTERN (insn), mark_mem_store, NULL);
@@ -138,7 +138,7 @@ rtx_mem_access_p (rtx x)
 
 /* Returns nonzero if INSN reads to or writes from memory.  */
 static bool
-mem_access_insn_p (rtx insn)
+mem_access_insn_p (rtx_insn *insn)
 {
   return rtx_mem_access_p (PATTERN (insn));
 }
@@ -152,7 +152,7 @@ mem_access_insn_p (rtx insn)
    by use_insn, if use_insn uses an address register auto-inc'ed by
    def_insn.  */
 bool
-autoinc_var_is_used_p (rtx def_insn, rtx use_insn)
+autoinc_var_is_used_p (rtx_insn *def_insn, rtx_insn *use_insn)
 {
   rtx note;
 
@@ -167,7 +167,7 @@ autoinc_var_is_used_p (rtx def_insn, rtx use_insn)
 /* Return true if one of the definitions in INSN has MODE_CC.  Otherwise
    return false.  */
 static bool
-def_has_ccmode_p (rtx insn)
+def_has_ccmode_p (rtx_insn *insn)
 {
   df_ref *def;
 
@@ -293,7 +293,7 @@ add_cross_iteration_register_deps (ddg_ptr g, df_ref last_def)
   int regno = DF_REF_REGNO (last_def);
   struct df_link *r_use;
   int has_use_in_bb_p = false;
-  rtx def_insn = DF_REF_INSN (last_def);
+  rtx_insn *def_insn = DF_REF_INSN (last_def);
   ddg_node_ptr last_def_node = get_node_of_insn (g, def_insn);
   ddg_node_ptr use_node;
 #ifdef ENABLE_CHECKING
@@ -313,7 +313,7 @@ add_cross_iteration_register_deps (ddg_ptr g, df_ref last_def)
   /* Create inter-loop true dependences and anti dependences.  */
   for (r_use = DF_REF_CHAIN (last_def); r_use != NULL; r_use = r_use->next)
     {
-      rtx use_insn = DF_REF_INSN (r_use->ref);
+      rtx_insn *use_insn = DF_REF_INSN (r_use->ref);
 
       if (BLOCK_FOR_INSN (use_insn) != g->bb)
 	continue;
@@ -429,7 +429,7 @@ walk_mems_1 (rtx *x, rtx *pat)
 
 /* Return 1 if two specified instructions have mem expr with conflict alias sets*/
 static int
-insns_may_alias_p (rtx insn1, rtx insn2)
+insns_may_alias_p (rtx_insn *insn1, rtx_insn *insn2)
 {
   /* For each pair of MEMs in INSN1 and INSN2 check their independence.  */
   return  for_each_rtx (&PATTERN (insn1), (rtx_function) walk_mems_1,
@@ -530,7 +530,7 @@ build_intra_loop_deps (ddg_ptr g)
 
       FOR_EACH_DEP (dest_node->insn, SD_LIST_BACK, sd_it, dep)
 	{
-	  rtx src_insn = DEP_PRO (dep);
+	  rtx_insn *src_insn = DEP_PRO (dep);
 	  ddg_node_ptr src_node;
 
 	  /* Don't add dependencies on debug insns to non-debug insns
@@ -594,7 +594,7 @@ ddg_ptr
 create_ddg (basic_block bb, int closing_branch_deps)
 {
   ddg_ptr g;
-  rtx insn, first_note;
+  rtx_insn *insn, *first_note;
   int i;
   int num_nodes = 0;
 
@@ -634,7 +634,7 @@ create_ddg (basic_block bb, int closing_branch_deps)
   g->nodes = (ddg_node_ptr) xcalloc (num_nodes, sizeof (struct ddg_node));
   g->closing_branch = NULL;
   i = 0;
-  first_note = NULL_RTX;
+  first_note = NULL;
   for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb));
        insn = NEXT_INSN (insn))
     {
@@ -664,7 +664,7 @@ create_ddg (basic_block bb, int closing_branch_deps)
       bitmap_clear (g->nodes[i].predecessors);
       g->nodes[i].first_note = (first_note ? first_note : insn);
       g->nodes[i++].insn = insn;
-      first_note = NULL_RTX;
+      first_note = NULL;
     }
 
   /* We must have found a branch in DDG.  */
@@ -957,7 +957,7 @@ add_scc_to_ddg (ddg_all_sccs_ptr g, ddg_scc_ptr scc)
 
 /* Given the instruction INSN return the node that represents it.  */
 ddg_node_ptr
-get_node_of_insn (ddg_ptr g, rtx insn)
+get_node_of_insn (ddg_ptr g, rtx_insn *insn)
 {
   int i;
 
diff --git a/gcc/ddg.h b/gcc/ddg.h
index 432903d..e372134 100644
--- a/gcc/ddg.h
+++ b/gcc/ddg.h
@@ -51,13 +51,13 @@ struct ddg_node
   int cuid;
 
   /* The insn represented by the node.  */
-  rtx insn;
+  rtx_insn *insn;
 
   /* A note preceding INSN (or INSN itself), such that all insns linked
      from FIRST_NOTE until INSN (inclusive of both) are moved together
      when reordering the insns.  This takes care of notes that should
      continue to precede INSN.  */
-  rtx first_note;
+  rtx_insn *first_note;
 
   /* Incoming and outgoing dependency edges.  */
   ddg_edge_ptr in;
@@ -173,7 +173,7 @@ void vcg_print_ddg (FILE *, ddg_ptr);
 void print_ddg_edge (FILE *, ddg_edge_ptr);
 void print_sccs (FILE *, ddg_all_sccs_ptr, ddg_ptr);
 
-ddg_node_ptr get_node_of_insn (ddg_ptr, rtx);
+ddg_node_ptr get_node_of_insn (ddg_ptr, rtx_insn *);
 
 void find_successors (sbitmap result, ddg_ptr, sbitmap);
 void find_predecessors (sbitmap result, ddg_ptr, sbitmap);
@@ -184,6 +184,6 @@ void free_ddg_all_sccs (ddg_all_sccs_ptr);
 int find_nodes_on_paths (sbitmap result, ddg_ptr, sbitmap from, sbitmap to);
 int longest_simple_path (ddg_ptr, int from, int to, sbitmap via);
 
-bool autoinc_var_is_used_p (rtx, rtx);
+bool autoinc_var_is_used_p (rtx_insn *, rtx_insn *);
 
 #endif /* GCC_DDG_H */
-- 
1.8.5.3

[PATCH 138/236] config/m68k: Use rtx_insn

[David Malcolm]

gcc/
	* config/m68k/m68k-protos.h (output_btst): Strengthen param 4 from
	rtx to rtx_insn *.
	(strict_low_part_peephole_ok): Likewise for param 2 "first_insn".
	(m68k_final_prescan_insn): Likewise for first param.

	* config/m68k/m68k.c (m68k_emit_movem): Likewise for return type.
	(m68k_set_frame_related): Likewise for param "insn".
	(output_btst): Likewise for param "insn".
	(m68k_final_prescan_insn): Likewise.
	(m68k_move_to_reg): Likewise for local "insn".
	(m68k_call_tls_get_addr): Likewise for local "insns".
	(m68k_call_m68k_read_tp): Likewise.
	(strict_low_part_peephole_ok): Likewise for param "first_insn".
	(m68k_output_mi_thunk): Likewise for local "insn".
---
 gcc/config/m68k/m68k-protos.h |  7 ++++---
 gcc/config/m68k/m68k.c        | 21 +++++++++++----------
 2 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/gcc/config/m68k/m68k-protos.h b/gcc/config/m68k/m68k-protos.h
index 512821f..26e8e45 100644
--- a/gcc/config/m68k/m68k-protos.h
+++ b/gcc/config/m68k/m68k-protos.h
@@ -34,7 +34,7 @@ extern const char *output_move_strictqi (rtx *);
 extern const char *output_move_double (rtx *);
 extern const char *output_move_const_single (rtx *);
 extern const char *output_move_const_double (rtx *);
-extern const char *output_btst (rtx *, rtx, rtx, rtx, int);
+extern const char *output_btst (rtx *, rtx, rtx, rtx_insn *, int);
 extern const char *output_scc_di (rtx, rtx, rtx, rtx);
 extern const char *output_addsi3 (rtx *);
 extern const char *output_andsi3 (rtx *);
@@ -44,7 +44,8 @@ extern const char *output_call (rtx);
 extern const char *output_sibcall (rtx);
 extern void output_dbcc_and_branch (rtx *);
 extern int floating_exact_log2 (rtx);
-extern bool strict_low_part_peephole_ok (enum machine_mode mode, rtx first_insn, rtx target);
+extern bool strict_low_part_peephole_ok (enum machine_mode mode,
+					 rtx_insn *first_insn, rtx target);
 
 /* Functions from m68k.c used in macros.  */
 extern int standard_68881_constant_p (rtx);
@@ -66,7 +67,7 @@ extern rtx m68k_function_value (const_tree, const_tree);
 extern int emit_move_sequence (rtx *, enum machine_mode, rtx);
 extern bool m68k_movem_pattern_p (rtx, rtx, HOST_WIDE_INT, bool);
 extern const char *m68k_output_movem (rtx *, rtx, HOST_WIDE_INT, bool);
-extern void m68k_final_prescan_insn (rtx, rtx *, int);
+extern void m68k_final_prescan_insn (rtx_insn *, rtx *, int);
 extern bool m68k_epilogue_uses (int);
 
 /* Functions from m68k.c used in constraints.md.  */
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index 7f7d668..4cd2149 100644
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -910,7 +910,7 @@ m68k_save_reg (unsigned int regno, bool interrupt_handler)
    whether or not this is pre-decrement (if STORE_P) or post-increment
    (if !STORE_P) operation.  */
 
-static rtx
+static rtx_insn *
 m68k_emit_movem (rtx base, HOST_WIDE_INT offset,
 		 unsigned int count, unsigned int regno,
 		 unsigned int mask, bool store_p, bool adjust_stack_p)
@@ -950,7 +950,7 @@ m68k_emit_movem (rtx base, HOST_WIDE_INT offset,
 /* Make INSN a frame-related instruction.  */
 
 static void
-m68k_set_frame_related (rtx insn)
+m68k_set_frame_related (rtx_insn *insn)
 {
   rtx body;
   int i;
@@ -1741,7 +1741,7 @@ output_scc_di (rtx op, rtx operand1, rtx operand2, rtx dest)
 }
 
 const char *
-output_btst (rtx *operands, rtx countop, rtx dataop, rtx insn, int signpos)
+output_btst (rtx *operands, rtx countop, rtx dataop, rtx_insn *insn, int signpos)
 {
   operands[0] = countop;
   operands[1] = dataop;
@@ -2319,7 +2319,7 @@ m68k_final_prescan_insn_1 (rtx *x_ptr, void *data ATTRIBUTE_UNUSED)
 /* Prescan insn before outputing assembler for it.  */
 
 void
-m68k_final_prescan_insn (rtx insn ATTRIBUTE_UNUSED,
+m68k_final_prescan_insn (rtx_insn *insn ATTRIBUTE_UNUSED,
 			 rtx *operands, int n_operands)
 {
   int i;
@@ -2357,7 +2357,7 @@ m68k_final_prescan_insn (rtx insn ATTRIBUTE_UNUSED,
 static rtx
 m68k_move_to_reg (rtx x, rtx orig, rtx reg)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (reg == NULL_RTX)
     {
@@ -2494,7 +2494,7 @@ static rtx
 m68k_call_tls_get_addr (rtx x, rtx eqv, enum m68k_reloc reloc)
 {
   rtx a0;
-  rtx insns;
+  rtx_insn *insns;
   rtx dest;
 
   /* Emit the call sequence.  */
@@ -2554,7 +2554,7 @@ m68k_call_m68k_read_tp (void)
 {
   rtx a0;
   rtx eqv;
-  rtx insns;
+  rtx_insn *insns;
   rtx dest;
 
   start_sequence ();
@@ -4798,10 +4798,10 @@ print_operand_address (FILE *file, rtx addr)
    clear insn.  */
 
 bool
-strict_low_part_peephole_ok (enum machine_mode mode, rtx first_insn,
+strict_low_part_peephole_ok (enum machine_mode mode, rtx_insn *first_insn,
                              rtx target)
 {
-  rtx p = first_insn;
+  rtx_insn *p = first_insn;
 
   while ((p = PREV_INSN (p)))
     {
@@ -5041,7 +5041,8 @@ m68k_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
 		      HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
 		      tree function)
 {
-  rtx this_slot, offset, addr, mem, insn, tmp;
+  rtx this_slot, offset, addr, mem, tmp;
+  rtx_insn *insn;
 
   /* Avoid clobbering the struct value reg by using the
      static chain reg as a temporary.  */
-- 
1.8.5.3

[PATCH 005/236] Introduce as_a_nullable

[David Malcolm]

In many circumstances, is_a_helper <T>::test assumes that the pointer is
non-NULL, but sometimes you have a pointer of type T that can be NULL.

Earlier versions of this patch kit made numerous uses of the ternary
operator to handle nullable pointers e.g.:

  return insn ? as_a <rtx_insn *> (insn) : NULL;

but this was ugly.  Instead, introduce an as_a_nullable<T> variant that
adds a check for NULL, so the above can be written simply as:

  return as_a_nullable <rtx_insn *> (insn);

gcc/
	* is-a.h (template<T, U> as_a_nullable <U *p>) New function.
---
 gcc/is-a.h | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/gcc/is-a.h b/gcc/is-a.h
index a14e344..f50e62c 100644
--- a/gcc/is-a.h
+++ b/gcc/is-a.h
@@ -46,6 +46,14 @@ TYPE as_a <TYPE> (pointer)
 
       do_something_with (as_a <cgraph_node *> *ptr);
 
+TYPE as_a_nullable <TYPE> (pointer)
+
+    Like as_a <TYPE> (pointer), but where pointer could be NULL.  This
+    adds a check against NULL where the regular is_a_helper hook for TYPE
+    assumes non-NULL.
+
+      do_something_with (as_a_nullable <cgraph_node *> *ptr);
+
 TYPE dyn_cast <TYPE> (pointer)
 
     Converts pointer to TYPE if and only if "is_a <TYPE> pointer".  Otherwise,
@@ -185,6 +193,22 @@ as_a (U *p)
   return is_a_helper <T>::cast (p);
 }
 
+/* Similar to as_a<>, but where the pointer can be NULL, even if
+   is_a_helper<T> doesn't check for NULL.  */
+
+template <typename T, typename U>
+inline T
+as_a_nullable (U *p)
+{
+  if (p)
+    {
+      gcc_checking_assert (is_a <T> (p));
+      return is_a_helper <T>::cast (p);
+    }
+  else
+    return NULL;
+}
+
 /* A generic checked conversion from a base type U to a derived type T.  See
    the discussion above for when to use this function.  */
 
-- 
1.8.5.3

Re: [PATCH 005/236] Introduce as_a_nullable

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> In many circumstances, is_a_helper <T>::test assumes that the pointer is
> non-NULL, but sometimes you have a pointer of type T that can be NULL.
>
> Earlier versions of this patch kit made numerous uses of the ternary
> operator to handle nullable pointers e.g.:
>
>    return insn ? as_a <rtx_insn *> (insn) : NULL;
>
> but this was ugly.  Instead, introduce an as_a_nullable<T> variant that
> adds a check for NULL, so the above can be written simply as:
>
>    return as_a_nullable <rtx_insn *> (insn);
>
> gcc/
> 	* is-a.h (template<T, U> as_a_nullable <U *p>) New function.
Presumably the cases where we wanted to use as_a on a NULL pointer were 
places were we can legitimately have a NULL pointer?

I guess since they'll be using as_a_nullable, they're effectively 
documented as potentially being NULL and we can go back and look at them 
at a future date.

OK.

jeff

Re: [PATCH 005/236] Introduce as_a_nullable

[Martin Jambor]

Hi,

On Wed, Aug 06, 2014 at 01:19:44PM -0400, David Malcolm wrote:
> In many circumstances, is_a_helper <T>::test assumes that the pointer is
> non-NULL, but sometimes you have a pointer of type T that can be NULL.
> 
> Earlier versions of this patch kit made numerous uses of the ternary
> operator to handle nullable pointers e.g.:
> 
>   return insn ? as_a <rtx_insn *> (insn) : NULL;
> 
> but this was ugly.  Instead, introduce an as_a_nullable<T> variant that
> adds a check for NULL, so the above can be written simply as:
> 
>   return as_a_nullable <rtx_insn *> (insn);

A tiny bikeshedding, disregard it if you don't like it: however, the
"nullable" part of the name suggests the pointer can be NULLed in the
process.  I think that variants of functions that survive NULL
arguments are traditionally called "safe" in gcc, so what about
"safe_as" (or safely_as)?

Martin


> 
> gcc/
> 	* is-a.h (template<T, U> as_a_nullable <U *p>) New function.
> ---
>  gcc/is-a.h | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/gcc/is-a.h b/gcc/is-a.h
> index a14e344..f50e62c 100644
> --- a/gcc/is-a.h
> +++ b/gcc/is-a.h
> @@ -46,6 +46,14 @@ TYPE as_a <TYPE> (pointer)
>  
>        do_something_with (as_a <cgraph_node *> *ptr);
>  
> +TYPE as_a_nullable <TYPE> (pointer)
> +
> +    Like as_a <TYPE> (pointer), but where pointer could be NULL.  This
> +    adds a check against NULL where the regular is_a_helper hook for TYPE
> +    assumes non-NULL.
> +
> +      do_something_with (as_a_nullable <cgraph_node *> *ptr);
> +
>  TYPE dyn_cast <TYPE> (pointer)
>  
>      Converts pointer to TYPE if and only if "is_a <TYPE> pointer".  Otherwise,
> @@ -185,6 +193,22 @@ as_a (U *p)
>    return is_a_helper <T>::cast (p);
>  }
>  
> +/* Similar to as_a<>, but where the pointer can be NULL, even if
> +   is_a_helper<T> doesn't check for NULL.  */
> +
> +template <typename T, typename U>
> +inline T
> +as_a_nullable (U *p)
> +{
> +  if (p)
> +    {
> +      gcc_checking_assert (is_a <T> (p));
> +      return is_a_helper <T>::cast (p);
> +    }
> +  else
> +    return NULL;
> +}
> +
>  /* A generic checked conversion from a base type U to a derived type T.  See
>     the discussion above for when to use this function.  */
>  
> -- 
> 1.8.5.3
> 

Re: [PATCH 005/236] Introduce as_a_nullable

[Richard Biener]

On Wed, Aug 13, 2014 at 12:01 PM, Martin Jambor <mjambor@suse.cz> wrote:
> Hi,
>
> On Wed, Aug 06, 2014 at 01:19:44PM -0400, David Malcolm wrote:
>> In many circumstances, is_a_helper <T>::test assumes that the pointer is
>> non-NULL, but sometimes you have a pointer of type T that can be NULL.
>>
>> Earlier versions of this patch kit made numerous uses of the ternary
>> operator to handle nullable pointers e.g.:
>>
>>   return insn ? as_a <rtx_insn *> (insn) : NULL;
>>
>> but this was ugly.  Instead, introduce an as_a_nullable<T> variant that
>> adds a check for NULL, so the above can be written simply as:
>>
>>   return as_a_nullable <rtx_insn *> (insn);
>
> A tiny bikeshedding, disregard it if you don't like it: however, the
> "nullable" part of the name suggests the pointer can be NULLed in the
> process.  I think that variants of functions that survive NULL
> arguments are traditionally called "safe" in gcc, so what about
> "safe_as" (or safely_as)?

Ok, I resisted at first starting the bike-shedding but I agree on
the badness of "nullable" (what does that mean anyway?).
as_a_safe or safe_as_a both work for me.

Richard.

>
> Martin
>
>
>>
>> gcc/
>>       * is-a.h (template<T, U> as_a_nullable <U *p>) New function.
>> ---
>>  gcc/is-a.h | 24 ++++++++++++++++++++++++
>>  1 file changed, 24 insertions(+)
>>
>> diff --git a/gcc/is-a.h b/gcc/is-a.h
>> index a14e344..f50e62c 100644
>> --- a/gcc/is-a.h
>> +++ b/gcc/is-a.h
>> @@ -46,6 +46,14 @@ TYPE as_a <TYPE> (pointer)
>>
>>        do_something_with (as_a <cgraph_node *> *ptr);
>>
>> +TYPE as_a_nullable <TYPE> (pointer)
>> +
>> +    Like as_a <TYPE> (pointer), but where pointer could be NULL.  This
>> +    adds a check against NULL where the regular is_a_helper hook for TYPE
>> +    assumes non-NULL.
>> +
>> +      do_something_with (as_a_nullable <cgraph_node *> *ptr);
>> +
>>  TYPE dyn_cast <TYPE> (pointer)
>>
>>      Converts pointer to TYPE if and only if "is_a <TYPE> pointer".  Otherwise,
>> @@ -185,6 +193,22 @@ as_a (U *p)
>>    return is_a_helper <T>::cast (p);
>>  }
>>
>> +/* Similar to as_a<>, but where the pointer can be NULL, even if
>> +   is_a_helper<T> doesn't check for NULL.  */
>> +
>> +template <typename T, typename U>
>> +inline T
>> +as_a_nullable (U *p)
>> +{
>> +  if (p)
>> +    {
>> +      gcc_checking_assert (is_a <T> (p));
>> +      return is_a_helper <T>::cast (p);
>> +    }
>> +  else
>> +    return NULL;
>> +}
>> +
>>  /* A generic checked conversion from a base type U to a derived type T.  See
>>     the discussion above for when to use this function.  */
>>
>> --
>> 1.8.5.3
>>

Re: [PATCH 005/236] Introduce as_a_nullable

[Jeff Law]

On 08/13/14 04:07, Richard Biener wrote:
> On Wed, Aug 13, 2014 at 12:01 PM, Martin Jambor <mjambor@suse.cz> wrote:
>> Hi,
>>
>> On Wed, Aug 06, 2014 at 01:19:44PM -0400, David Malcolm wrote:
>>> In many circumstances, is_a_helper <T>::test assumes that the pointer is
>>> non-NULL, but sometimes you have a pointer of type T that can be NULL.
>>>
>>> Earlier versions of this patch kit made numerous uses of the ternary
>>> operator to handle nullable pointers e.g.:
>>>
>>>    return insn ? as_a <rtx_insn *> (insn) : NULL;
>>>
>>> but this was ugly.  Instead, introduce an as_a_nullable<T> variant that
>>> adds a check for NULL, so the above can be written simply as:
>>>
>>>    return as_a_nullable <rtx_insn *> (insn);
>>
>> A tiny bikeshedding, disregard it if you don't like it: however, the
>> "nullable" part of the name suggests the pointer can be NULLed in the
>> process.  I think that variants of functions that survive NULL
>> arguments are traditionally called "safe" in gcc, so what about
>> "safe_as" (or safely_as)?
>
> Ok, I resisted at first starting the bike-shedding but I agree on
> the badness of "nullable" (what does that mean anyway?).
> as_a_safe or safe_as_a both work for me.
Then let's go with that.

David, pick one of those and adjust accordingly.  Hopefully the cases 
where you have to adjust aren't too many.

Adjusting any patch already approved with the name change is pre-approved.


jeff

Re: [PATCH 005/236] Introduce as_a_nullable

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 1664 bytes --]

On Wed, 2014-08-13 at 07:48 -0600, Jeff Law wrote:
> On 08/13/14 04:07, Richard Biener wrote:
> > On Wed, Aug 13, 2014 at 12:01 PM, Martin Jambor <mjambor@suse.cz> wrote:
> >> Hi,
> >>
> >> On Wed, Aug 06, 2014 at 01:19:44PM -0400, David Malcolm wrote:
> >>> In many circumstances, is_a_helper <T>::test assumes that the pointer is
> >>> non-NULL, but sometimes you have a pointer of type T that can be NULL.
> >>>
> >>> Earlier versions of this patch kit made numerous uses of the ternary
> >>> operator to handle nullable pointers e.g.:
> >>>
> >>>    return insn ? as_a <rtx_insn *> (insn) : NULL;
> >>>
> >>> but this was ugly.  Instead, introduce an as_a_nullable<T> variant that
> >>> adds a check for NULL, so the above can be written simply as:
> >>>
> >>>    return as_a_nullable <rtx_insn *> (insn);
> >>
> >> A tiny bikeshedding, disregard it if you don't like it: however, the
> >> "nullable" part of the name suggests the pointer can be NULLed in the
> >> process.  I think that variants of functions that survive NULL
> >> arguments are traditionally called "safe" in gcc, so what about
> >> "safe_as" (or safely_as)?
> >
> > Ok, I resisted at first starting the bike-shedding but I agree on
> > the badness of "nullable" (what does that mean anyway?).
> > as_a_safe or safe_as_a both work for me.
> Then let's go with that.
> 
> David, pick one of those and adjust accordingly.  Hopefully the cases 
> where you have to adjust aren't too many.
> 
> Adjusting any patch already approved with the name change is pre-approved.

Thanks.  I went with "safe_as_a<>" and (after bootstrapping&regrtesting)
committed the attached to trunk, as r214117.

Dave

[-- Attachment #2: r214117.patch --]
[-- Type: text/x-patch, Size: 1547 bytes --]

Index: gcc/is-a.h
===================================================================
--- gcc/is-a.h	(revision 214116)
+++ gcc/is-a.h	(revision 214117)
@@ -46,6 +46,14 @@
 
       do_something_with (as_a <cgraph_node *> *ptr);
 
+TYPE safe_as_a <TYPE> (pointer)
+
+    Like as_a <TYPE> (pointer), but where pointer could be NULL.  This
+    adds a check against NULL where the regular is_a_helper hook for TYPE
+    assumes non-NULL.
+
+      do_something_with (safe_as_a <cgraph_node *> *ptr);
+
 TYPE dyn_cast <TYPE> (pointer)
 
     Converts pointer to TYPE if and only if "is_a <TYPE> pointer".  Otherwise,
@@ -185,6 +193,22 @@
   return is_a_helper <T>::cast (p);
 }
 
+/* Similar to as_a<>, but where the pointer can be NULL, even if
+   is_a_helper<T> doesn't check for NULL.  */
+
+template <typename T, typename U>
+inline T
+safe_as_a (U *p)
+{
+  if (p)
+    {
+      gcc_checking_assert (is_a <T> (p));
+      return is_a_helper <T>::cast (p);
+    }
+  else
+    return NULL;
+}
+
 /* A generic checked conversion from a base type U to a derived type T.  See
    the discussion above for when to use this function.  */
 
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214116)
+++ gcc/ChangeLog	(revision 214117)
@@ -1,3 +1,7 @@
+2014-08-18  David Malcolm  <dmalcolm@redhat.com>
+
+	* is-a.h (template<T, U> safe_as_a <U *p>) New function.
+
 2014-08-18  Jan Hubicka  <hubicka@ucw.cz>
 
 	* ipa-visibility.c (update_visibility_by_resolution_info): Do no turn UNDEF

Re: [PATCH 005/236] Introduce as_a_nullable

[David Malcolm]

On Wed, 2014-08-13 at 12:07 +0200, Richard Biener wrote:
> On Wed, Aug 13, 2014 at 12:01 PM, Martin Jambor <mjambor@suse.cz> wrote:
> > Hi,
> >
> > On Wed, Aug 06, 2014 at 01:19:44PM -0400, David Malcolm wrote:
> >> In many circumstances, is_a_helper <T>::test assumes that the pointer is
> >> non-NULL, but sometimes you have a pointer of type T that can be NULL.
> >>
> >> Earlier versions of this patch kit made numerous uses of the ternary
> >> operator to handle nullable pointers e.g.:
> >>
> >>   return insn ? as_a <rtx_insn *> (insn) : NULL;
> >>
> >> but this was ugly.  Instead, introduce an as_a_nullable<T> variant that
> >> adds a check for NULL, so the above can be written simply as:
> >>
> >>   return as_a_nullable <rtx_insn *> (insn);
> >
> > A tiny bikeshedding, disregard it if you don't like it: however, the
> > "nullable" part of the name suggests the pointer can be NULLed in the
> > process.  I think that variants of functions that survive NULL
> > arguments are traditionally called "safe" in gcc, so what about
> > "safe_as" (or safely_as)?
> 
> Ok, I resisted at first starting the bike-shedding but I agree on
> the badness of "nullable" (what does that mean anyway?).
> as_a_safe or safe_as_a both work for me.

I think I took the terminology from:
  http://en.wikipedia.org/wiki/Nullable_type

meaning "something that can be NULL".

"safe" as a prefix seems to be the pattern in the rest of the code, so I
guess I'll use "safe_as_a".

Thanks
Dave


> Richard.
> 
> >
> > Martin
> >
> >
> >>
> >> gcc/
> >>       * is-a.h (template<T, U> as_a_nullable <U *p>) New function.
> >> ---
> >>  gcc/is-a.h | 24 ++++++++++++++++++++++++
> >>  1 file changed, 24 insertions(+)
> >>
> >> diff --git a/gcc/is-a.h b/gcc/is-a.h
> >> index a14e344..f50e62c 100644
> >> --- a/gcc/is-a.h
> >> +++ b/gcc/is-a.h
> >> @@ -46,6 +46,14 @@ TYPE as_a <TYPE> (pointer)
> >>
> >>        do_something_with (as_a <cgraph_node *> *ptr);
> >>
> >> +TYPE as_a_nullable <TYPE> (pointer)
> >> +
> >> +    Like as_a <TYPE> (pointer), but where pointer could be NULL.  This
> >> +    adds a check against NULL where the regular is_a_helper hook for TYPE
> >> +    assumes non-NULL.
> >> +
> >> +      do_something_with (as_a_nullable <cgraph_node *> *ptr);
> >> +
> >>  TYPE dyn_cast <TYPE> (pointer)
> >>
> >>      Converts pointer to TYPE if and only if "is_a <TYPE> pointer".  Otherwise,
> >> @@ -185,6 +193,22 @@ as_a (U *p)
> >>    return is_a_helper <T>::cast (p);
> >>  }
> >>
> >> +/* Similar to as_a<>, but where the pointer can be NULL, even if
> >> +   is_a_helper<T> doesn't check for NULL.  */
> >> +
> >> +template <typename T, typename U>
> >> +inline T
> >> +as_a_nullable (U *p)
> >> +{
> >> +  if (p)
> >> +    {
> >> +      gcc_checking_assert (is_a <T> (p));
> >> +      return is_a_helper <T>::cast (p);
> >> +    }
> >> +  else
> >> +    return NULL;
> >> +}
> >> +
> >>  /* A generic checked conversion from a base type U to a derived type T.  See
> >>     the discussion above for when to use this function.  */
> >>
> >> --
> >> 1.8.5.3
> >>

[PATCH 187/236] duplicate_insn_chain accepts rtx_insn

[David Malcolm]

gcc/
	* rtl.h (duplicate_insn_chain): Strengthen both params from rtx to rtx_insn *.
	* cfgrtl.c (duplicate_insn_chain): Strengthen params "from", "to"
	and locals "insn", "next", "copy" from rtx to rtx_insn *.  Remove
	now-redundant checked cast.
---
 gcc/cfgrtl.c | 6 +++---
 gcc/rtl.h    | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index ee55788..de31e8f 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -4085,9 +4085,9 @@ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
 }
 
 rtx_insn *
-duplicate_insn_chain (rtx from, rtx to)
+duplicate_insn_chain (rtx_insn *from, rtx_insn *to)
 {
-  rtx insn, next, copy;
+  rtx_insn *insn, *next, *copy;
   rtx_note *last;
 
   /* Avoid updating of boundaries of previous basic block.  The
@@ -4170,7 +4170,7 @@ duplicate_insn_chain (rtx from, rtx to)
     }
   insn = NEXT_INSN (last);
   delete_insn (last);
-  return as_a_nullable <rtx_insn *> (insn);
+  return insn;
 }
 
 /* Create a duplicate of the basic block BB.  */
diff --git a/gcc/rtl.h b/gcc/rtl.h
index cda76cd..4505b07 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3173,7 +3173,7 @@ extern int fixup_args_size_notes (rtx, rtx, int);
 
 /* In cfgrtl.c */
 extern void print_rtl_with_bb (FILE *, const_rtx, int);
-extern rtx_insn *duplicate_insn_chain (rtx, rtx);
+extern rtx_insn *duplicate_insn_chain (rtx_insn *, rtx_insn *);
 
 /* In expmed.c */
 extern void init_expmed (void);
-- 
1.8.5.3

[PATCH 026/236] bb_note returns a rtx_note *

[David Malcolm]

gcc/
	* basic-block.h (bb_note): Strengthen return type from rtx to rtx_note *.
	* sched-int.h (bb_note): Likewise.
	* cfgrtl.c (bb_note): Likewise.  Add a checked cast to rtx_note *.
---
 gcc/basic-block.h | 2 +-
 gcc/cfgrtl.c      | 4 ++--
 gcc/sched-int.h   | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 82dbfe9..87094c6 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -798,7 +798,7 @@ extern basic_block * single_pred_before_succ_order (void);
 
 /* In cfgrtl.c  */
 extern rtx block_label (basic_block);
-extern rtx bb_note (basic_block);
+extern rtx_note *bb_note (basic_block);
 extern bool purge_all_dead_edges (void);
 extern bool purge_dead_edges (basic_block);
 extern bool fixup_abnormal_edges (void);
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 168a44a..ac3bc87 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -662,7 +662,7 @@ could_fall_through (basic_block src, basic_block target)
 }
 \f
 /* Return the NOTE_INSN_BASIC_BLOCK of BB.  */
-rtx
+rtx_note *
 bb_note (basic_block bb)
 {
   rtx note;
@@ -672,7 +672,7 @@ bb_note (basic_block bb)
     note = NEXT_INSN (note);
 
   gcc_assert (NOTE_INSN_BASIC_BLOCK_P (note));
-  return note;
+  return as_a <rtx_note *> (note);
 }
 
 /* Return the INSN immediately following the NOTE_INSN_BASIC_BLOCK
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index 3680889..7f236a1 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -1368,7 +1368,7 @@ extern void sched_change_pattern (rtx, rtx);
 extern int sched_speculate_insn (rtx, ds_t, rtx *);
 extern void unlink_bb_notes (basic_block, basic_block);
 extern void add_block (basic_block, basic_block);
-extern rtx bb_note (basic_block);
+extern rtx_note *bb_note (basic_block);
 extern void concat_note_lists (rtx, rtx *);
 extern rtx sched_emit_insn (rtx);
 extern rtx get_ready_element (int);
-- 
1.8.5.3

Re: [PATCH 026/236] bb_note returns a rtx_note *

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* basic-block.h (bb_note): Strengthen return type from rtx to rtx_note *.
> 	* sched-int.h (bb_note): Likewise.
> 	* cfgrtl.c (bb_note): Likewise.  Add a checked cast to rtx_note *.
OK.
Jeff

Re: [PATCH 026/236] bb_note returns a rtx_note *

[David Malcolm]

On Tue, 2014-08-12 at 21:55 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* basic-block.h (bb_note): Strengthen return type from rtx to rtx_note *.
> > 	* sched-int.h (bb_note): Likewise.
> > 	* cfgrtl.c (bb_note): Likewise.  Add a checked cast to rtx_note *.
> OK.

Thanks; committed to trunk as r214188.

[PATCH 149/236] config/sh: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* config/sh/sh-protos.h (output_ieee_ccmpeq): Strengthen param 1
	from rtx to rtx_insn *.
	(output_branchy_insn): Likewise for param 3.
	(output_far_jump): Likewise for param 1.
	(final_prescan_insn): Likewise.
	(sh_insn_length_adjustment): Likewise for sole param.

	* config/sh/sh.c (expand_cbranchsi4): Likewise for local "jump".
	(expand_cbranchdi4): Strengthen local "skip_label" from rtx to
	rtx_code_label *.
	(sh_emit_compare_and_set): Likewise for local "lab".
	(output_far_jump): Strengthen param "insn" and local "prev" from
	rtx to rtx_insn *.
	(output_branchy_insn): Likewise for param "insn" and local
	"next_insn".
	(output_ieee_ccmpeq): Likewise for param "insn".
	(struct label_ref_list_d): Strengthen field "label" from rtx to
	rtx_code_label *.
	(pool_node): Likewise.
	(pool_window_label): Likewise for this global.
	(add_constant): Likewise for return type and locals "lab", "new_rtx".
	(dump_table): Strengthen params "start", "barrier" and local
	"scan" from rtx to rtx_insn *.
	(broken_move): Likewise for param "insn".
	(untangle_mova): Likewise for params "first_mova" and "new_mova".
	Strengthen param "first_mova" from rtx * to rtx_insn **.
	(mova_p): Likewise for param "insn".
	(fixup_mova): Likewise for param "mova".
	(find_barrier): Likewise for return type, params "mova" and
	"from", and locals "barrier_before_mova", "found_barrier",
	"good_barrier", "orig", "last_symoff", "next".  Strengthen local
	"label" from rtx to rtx_code_label *.
	(sh_loop_align): Strengthen locals "first", "insn", "mova" from
	rtx to rtx_insn *.
	(sh_reorg): Likewise for locals "link", "scan", "barrier".
	(split_branches): Likewise for param "first" and local "insn".
	(final_prescan_insn): Likewise for param "insn".
	(sequence_insn_p): Likewise for locals "prev", "next".
	(sh_insn_length_adjustment): Likewise for param "insn".
	(sh_can_redirect_branch): Likewise for local "insn".
	(find_r0_life_regions): Likewise for locals "end", "insn".
	(sh_output_mi_thunk): Likewise for local "insns".
---
 gcc/config/sh/sh-protos.h | 11 +++---
 gcc/config/sh/sh.c        | 98 ++++++++++++++++++++++++-----------------------
 2 files changed, 56 insertions(+), 53 deletions(-)

diff --git a/gcc/config/sh/sh-protos.h b/gcc/config/sh/sh-protos.h
index cec324c..27717c5 100644
--- a/gcc/config/sh/sh-protos.h
+++ b/gcc/config/sh/sh-protos.h
@@ -95,11 +95,12 @@ extern rtx sh_fsca_int2sf (void);
 /* Declare functions defined in sh.c and used in templates.  */
 
 extern const char *output_branch (int, rtx, rtx *);
-extern const char *output_ieee_ccmpeq (rtx, rtx *);
-extern const char *output_branchy_insn (enum rtx_code, const char *, rtx, rtx *);
+extern const char *output_ieee_ccmpeq (rtx_insn *, rtx *);
+extern const char *output_branchy_insn (enum rtx_code, const char *,
+					rtx_insn *, rtx *);
 extern const char *output_movedouble (rtx, rtx[], enum machine_mode);
 extern const char *output_movepcrel (rtx, rtx[], enum machine_mode);
-extern const char *output_far_jump (rtx, rtx);
+extern const char *output_far_jump (rtx_insn *, rtx);
 
 extern rtx sfunc_uses_reg (rtx);
 extern int barrier_align (rtx);
@@ -145,7 +146,7 @@ extern rtx gen_datalabel_ref (rtx);
 extern int regs_used (rtx, int);
 extern void fixup_addr_diff_vecs (rtx);
 extern int get_dest_uid (rtx, int);
-extern void final_prescan_insn (rtx, rtx *, int);
+extern void final_prescan_insn (rtx_insn *, rtx *, int);
 extern enum tls_model tls_symbolic_operand (rtx, enum machine_mode);
 extern bool system_reg_operand (rtx, enum machine_mode);
 extern bool reg_unused_after (rtx, rtx);
@@ -153,7 +154,7 @@ extern void expand_sf_unop (rtx (*)(rtx, rtx, rtx), rtx *);
 extern void expand_sf_binop (rtx (*)(rtx, rtx, rtx, rtx), rtx *);
 extern void expand_df_unop (rtx (*)(rtx, rtx, rtx), rtx *);
 extern void expand_df_binop (rtx (*)(rtx, rtx, rtx, rtx), rtx *);
-extern int sh_insn_length_adjustment (rtx);
+extern int sh_insn_length_adjustment (rtx_insn *);
 extern bool sh_can_redirect_branch (rtx, rtx);
 extern void sh_expand_unop_v2sf (enum rtx_code, rtx, rtx);
 extern void sh_expand_binop_v2sf (enum rtx_code, rtx, rtx, rtx);
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index a1374e0..59f66ca 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -182,14 +182,14 @@ int assembler_dialect;
 
 static bool shmedia_space_reserved_for_target_registers;
 
-static void split_branches (rtx);
+static void split_branches (rtx_insn *);
 static int branch_dest (rtx);
 static void print_slot (rtx);
-static rtx add_constant (rtx, enum machine_mode, rtx);
-static void dump_table (rtx, rtx);
-static bool broken_move (rtx);
-static bool mova_p (rtx);
-static rtx find_barrier (int, rtx, rtx);
+static rtx_code_label *add_constant (rtx, enum machine_mode, rtx);
+static void dump_table (rtx_insn *, rtx_insn *);
+static bool broken_move (rtx_insn *);
+static bool mova_p (rtx_insn *);
+static rtx_insn *find_barrier (int, rtx_insn *, rtx_insn *);
 static bool noncall_uses_reg (rtx, rtx, rtx *);
 static rtx gen_block_redirect (rtx, int, int);
 static void sh_reorg (void);
@@ -2024,7 +2024,7 @@ expand_cbranchsi4 (rtx *operands, enum rtx_code comparison, int probability)
   emit_insn (gen_rtx_SET (VOIDmode, get_t_reg_rtx (),
 			  gen_rtx_fmt_ee (comparison, SImode,
 					  operands[1], operands[2])));
-  rtx jump = emit_jump_insn (branch_expander (operands[3]));
+  rtx_insn *jump = emit_jump_insn (branch_expander (operands[3]));
   if (probability >= 0)
     add_int_reg_note (jump, REG_BR_PROB, probability);
 }
@@ -2050,7 +2050,7 @@ bool
 expand_cbranchdi4 (rtx *operands, enum rtx_code comparison)
 {
   enum rtx_code msw_taken, msw_skip, lsw_taken;
-  rtx skip_label = NULL_RTX;
+  rtx_code_label *skip_label = NULL;
   rtx op1h, op1l, op2h, op2l;
   int num_branches;
   int prob, rev_prob;
@@ -2488,7 +2488,7 @@ sh_emit_compare_and_set (rtx *operands, enum machine_mode mode)
   enum rtx_code code = GET_CODE (operands[1]);
   rtx op0 = operands[2];
   rtx op1 = operands[3];
-  rtx lab = NULL_RTX;
+  rtx_code_label *lab = NULL;
   bool invert = false;
   rtx tem;
 
@@ -2642,14 +2642,14 @@ print_slot (rtx insn)
 }
 
 const char *
-output_far_jump (rtx insn, rtx op)
+output_far_jump (rtx_insn *insn, rtx op)
 {
   struct { rtx lab, reg, op; } this_jmp;
   rtx braf_base_lab = NULL_RTX;
   const char *jump;
   int far;
   int offset = branch_dest (insn) - INSN_ADDRESSES (INSN_UID (insn));
-  rtx prev;
+  rtx_insn *prev;
 
   this_jmp.lab = gen_label_rtx ();
 
@@ -2839,9 +2839,9 @@ output_branch (int logic, rtx insn, rtx *operands)
    follow jmp and bt, if the address is in range.  */
 const char *
 output_branchy_insn (enum rtx_code code, const char *templ,
-		     rtx insn, rtx *operands)
+		     rtx_insn *insn, rtx *operands)
 {
-  rtx next_insn = NEXT_INSN (insn);
+  rtx_insn *next_insn = NEXT_INSN (insn);
 
   if (next_insn && JUMP_P (next_insn) && condjump_p (next_insn))
     {
@@ -2879,7 +2879,7 @@ output_branchy_insn (enum rtx_code code, const char *templ,
 }
 
 const char *
-output_ieee_ccmpeq (rtx insn, rtx *operands)
+output_ieee_ccmpeq (rtx_insn *insn, rtx *operands)
 {
   return output_branchy_insn (NE,      "bt	%l9" "\n"
 				  "	fcmp/eq	%1,%0",
@@ -4505,7 +4505,7 @@ static alloc_pool label_ref_list_pool;
 
 typedef struct label_ref_list_d
 {
-  rtx label;
+  rtx_code_label *label;
   struct label_ref_list_d *next;
 } *label_ref_list_t;
 
@@ -4565,7 +4565,7 @@ typedef struct label_ref_list_d
 typedef struct
 {
   rtx value;			/* Value in table.  */
-  rtx label;			/* Label of value.  */
+  rtx_code_label *label;	/* Label of value.  */
   label_ref_list_t wend;	/* End of window.  */
   enum machine_mode mode;	/* Mode of value.  */
 
@@ -4581,7 +4581,7 @@ typedef struct
 #define MAX_POOL_SIZE 372
 static pool_node pool_vector[MAX_POOL_SIZE];
 static int pool_size;
-static rtx pool_window_label;
+static rtx_code_label *pool_window_label;
 static int pool_window_last;
 
 static int max_labelno_before_reorg;
@@ -4597,11 +4597,11 @@ static int max_labelno_before_reorg;
    necessary.  */
 
 /* Add a constant to the pool and return its label.  */
-static rtx
+static rtx_code_label *
 add_constant (rtx x, enum machine_mode mode, rtx last_value)
 {
   int i;
-  rtx lab, new_rtx;
+  rtx_code_label *lab, *new_rtx;
   label_ref_list_t ref, newref;
 
   /* First see if we've already got it.  */
@@ -4676,9 +4676,9 @@ add_constant (rtx x, enum machine_mode mode, rtx last_value)
    these insns at a 4-byte  aligned position.  BARRIER is the barrier
    after which we are to place the table.  */
 static void
-dump_table (rtx start, rtx barrier)
+dump_table (rtx_insn *start, rtx_insn *barrier)
 {
-  rtx scan = barrier;
+  rtx_insn *scan = barrier;
   int i;
   bool need_align = true;
   rtx lab;
@@ -4853,7 +4853,7 @@ dump_table (rtx start, rtx barrier)
   scan = emit_insn_after (gen_consttable_end (), scan);
   scan = emit_barrier_after (scan);
   pool_size = 0;
-  pool_window_label = NULL_RTX;
+  pool_window_label = NULL;
   pool_window_last = 0;
 }
 
@@ -4865,7 +4865,7 @@ dump_table (rtx start, rtx barrier)
    CONST_DOUBLE input value is CONST_OK_FOR_I08.  For a SFmode move, we don't
    need to fix it if the input value is CONST_OK_FOR_I08.  */
 static bool
-broken_move (rtx insn)
+broken_move (rtx_insn *insn)
 {
   if (NONJUMP_INSN_P (insn))
     {
@@ -4912,7 +4912,7 @@ broken_move (rtx insn)
 
 /* Return true if the specified insn is a mova insn.  */
 static bool
-mova_p (rtx insn)
+mova_p (rtx_insn *insn)
 {
   return (NONJUMP_INSN_P (insn)
 	  && GET_CODE (PATTERN (insn)) == SET
@@ -4924,7 +4924,7 @@ mova_p (rtx insn)
 
 /* Fix up a mova from a switch that went out of range.  */
 static void
-fixup_mova (rtx mova)
+fixup_mova (rtx_insn *mova)
 {
   PUT_MODE (XEXP (MOVA_LABELREF (mova), 0), QImode);
   if (! flag_pic)
@@ -4968,7 +4968,7 @@ fixup_mova (rtx mova)
    return 0 if *first_mova was replaced, 1 if new_mova was replaced,
    2 if new_mova has been assigned to *first_mova, -1 otherwise..  */
 static int
-untangle_mova (int *num_mova, rtx *first_mova, rtx new_mova)
+untangle_mova (int *num_mova, rtx_insn **first_mova, rtx_insn *new_mova)
 {
   int n_addr = 0; /* Initialization to shut up spurious warning.  */
   int f_target, n_target = 0; /* Likewise.  */
@@ -5017,8 +5017,8 @@ untangle_mova (int *num_mova, rtx *first_mova, rtx new_mova)
 /* Find the last barrier from insn FROM which is close enough to hold the
    constant pool.  If we can't find one, then create one near the end of
    the range.  */
-static rtx
-find_barrier (int num_mova, rtx mova, rtx from)
+static rtx_insn *
+find_barrier (int num_mova, rtx_insn *mova, rtx_insn *from)
 {
   int count_si = 0;
   int count_hi = 0;
@@ -5028,14 +5028,14 @@ find_barrier (int num_mova, rtx mova, rtx from)
   int hi_align = 2;
   int si_align = 2;
   int leading_mova = num_mova;
-  rtx barrier_before_mova = NULL_RTX;
-  rtx found_barrier = NULL_RTX;
-  rtx good_barrier = NULL_RTX;
+  rtx_insn *barrier_before_mova = NULL;
+  rtx_insn *found_barrier = NULL;
+  rtx_insn *good_barrier = NULL;
   int si_limit;
   int hi_limit;
-  rtx orig = from;
+  rtx_insn *orig = from;
   rtx last_got = NULL_RTX;
-  rtx last_symoff = NULL_RTX;
+  rtx_insn *last_symoff = NULL;
 
   /* For HImode: range is 510, add 4 because pc counts from address of
      second instruction after this one, subtract 2 for the jump instruction
@@ -5095,7 +5095,7 @@ find_barrier (int num_mova, rtx mova, rtx from)
 
       if (BARRIER_P (from))
 	{
-	  rtx next;
+	  rtx_insn *next;
 
 	  found_barrier = from;
 
@@ -5290,7 +5290,7 @@ find_barrier (int num_mova, rtx mova, rtx from)
     {
       /* We didn't find a barrier in time to dump our stuff,
 	 so we'll make one.  */
-      rtx label = gen_label_rtx ();
+      rtx_code_label *label = gen_label_rtx ();
 
       /* Don't emit a constant table in the middle of insns for
 	 casesi_worker_2.  This is a bit overkill but is enough
@@ -5338,7 +5338,7 @@ find_barrier (int num_mova, rtx mova, rtx from)
 	 CALL_ARG_LOCATION note.  */
       if (CALL_P (from))
 	{
-	  rtx next = NEXT_INSN (from);
+	  rtx_insn *next = NEXT_INSN (from);
 	  if (next && NOTE_P (next)
 	      && NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
 	    from = next;
@@ -5979,7 +5979,7 @@ sh_loop_align (rtx label)
 static void
 sh_reorg (void)
 {
-  rtx first, insn, mova = NULL_RTX;
+  rtx_insn *first, *insn, *mova = NULL;
   int num_mova;
   rtx r0_rtx = gen_rtx_REG (Pmode, 0);
   rtx r0_inc_rtx = gen_rtx_POST_INC (Pmode, r0_rtx);
@@ -6025,7 +6025,8 @@ sh_reorg (void)
 
       for (insn = first; insn; insn = NEXT_INSN (insn))
 	{
-	  rtx pattern, reg, link, set, scan, dies, label;
+	  rtx pattern, reg, set, dies, label;
+	  rtx_insn *link, *scan;
 	  int rescan = 0, foundinsn = 0;
 
 	  if (CALL_P (insn))
@@ -6265,10 +6266,10 @@ sh_reorg (void)
 	  || (NONJUMP_INSN_P (insn)
 	      && recog_memoized (insn) == CODE_FOR_casesi_worker_2))
 	{
-	  rtx scan;
+	  rtx_insn *scan;
 	  /* Scan ahead looking for a barrier to stick the constant table
 	     behind.  */
-	  rtx barrier = find_barrier (num_mova, mova, insn);
+	  rtx_insn *barrier = find_barrier (num_mova, mova, insn);
 	  rtx last_float_move = NULL_RTX, last_float = 0, *last_float_addr = NULL;
 	  int need_aligned_label = 0;
 
@@ -6466,9 +6467,9 @@ get_dest_uid (rtx label, int max_uid)
    newly created instructions into account.  It also allows us to
    find branches with common targets more easily.  */
 static void
-split_branches (rtx first)
+split_branches (rtx_insn *first)
 {
-  rtx insn;
+  rtx_insn *insn;
   struct far_branch **uid_branch, *far_branch_list = 0;
   int max_uid = get_max_uid ();
   int ok;
@@ -6687,7 +6688,7 @@ split_branches (rtx first)
    variable length.  This is because the second pass of shorten_branches
    does not bother to update them.  */
 void
-final_prescan_insn (rtx insn, rtx *opvec ATTRIBUTE_UNUSED,
+final_prescan_insn (rtx_insn *insn, rtx *opvec ATTRIBUTE_UNUSED,
 		    int noperands ATTRIBUTE_UNUSED)
 {
   if (TARGET_DUMPISIZE)
@@ -10141,7 +10142,7 @@ fpscr_set_from_mem (int mode, HARD_REG_SET regs_live)
 static bool
 sequence_insn_p (rtx insn)
 {
-  rtx prev, next;
+  rtx_insn *prev, *next;
 
   prev = PREV_INSN (insn);
   if (prev == NULL)
@@ -10155,7 +10156,7 @@ sequence_insn_p (rtx insn)
 }
 
 int
-sh_insn_length_adjustment (rtx insn)
+sh_insn_length_adjustment (rtx_insn *insn)
 {
   /* Instructions with unfilled delay slots take up an extra two bytes for
      the nop in the delay slot.  */
@@ -10703,7 +10704,7 @@ sh_can_redirect_branch (rtx branch1, rtx branch2)
   if (flag_expensive_optimizations && simplejump_p (branch2))
     {
       rtx dest = XEXP (SET_SRC (single_set (branch2)), 0);
-      rtx insn;
+      rtx_insn *insn;
       int distance;
 
       for (distance = 0, insn = NEXT_INSN (branch1);
@@ -11135,7 +11136,7 @@ ready_reorder (rtx *ready, int nready)
 static int
 find_r0_life_regions (basic_block b)
 {
-  rtx end, insn;
+  rtx_insn *end, *insn;
   rtx pset;
   rtx r0_reg;
   int live;
@@ -12334,7 +12335,8 @@ sh_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
 {
   CUMULATIVE_ARGS cum;
   int structure_value_byref = 0;
-  rtx this_rtx, this_value, sibcall, insns, funexp;
+  rtx this_rtx, this_value, sibcall, funexp;
+  rtx_insn *insns;
   tree funtype = TREE_TYPE (function);
   int simple_add = CONST_OK_FOR_ADD (delta);
   int did_load = 0;
-- 
1.8.5.3

Re: [PATCH 149/236] config/sh: Use rtx_insn and rtx_code_label

[Oleg Endo]

On Wed, 2014-08-06 at 13:22 -0400, David Malcolm wrote:
> gcc/
> 	* config/sh/sh-protos.h (output_ieee_ccmpeq): Strengthen param 1
> 	from rtx to rtx_insn *.
> 	(output_branchy_insn): Likewise for param 3.
> 	(output_far_jump): Likewise for param 1.
> 	(final_prescan_insn): Likewise.
> 	(sh_insn_length_adjustment): Likewise for sole param.
> 
> 	* config/sh/sh.c (expand_cbranchsi4): Likewise for local "jump".
> 	(expand_cbranchdi4): Strengthen local "skip_label" from rtx to
> 	rtx_code_label *.
>         [dot dot dot]

The SH parts (also in the other patches) are fine by me.  If they break
something we can fix it afterwards.

Cheers,
Oleg

[PATCH 127/236] config/arc: Use rtx_insn

[David Malcolm]

gcc/
	* config/arc/arc-protos.h (arc_final_prescan_insn): Strengthen
	first param from rtx to rtx_insn *.
	(arc_verify_short): Likewise.
	(arc_short_long): Likewise.
	(arc_need_delay): Likewise.

	* config/arc/arc.c (struct arc_ccfsm): Likewise for field
	"target_insn".
	(arc_ccfsm_advance): Likewise for param "insn" and locals
	"start_insn", "this_insn".
	(arc_ccfsm_record_condition): Likewise for local "seq_insn".
	(arc_ccfsm_post_advance): Likewise for param "insn".
	(arc_next_active_insn): Likewise for return type and param "insn".
	Convert NULL_RTX to NULL as appropriate.  Add a checked cast.
	(arc_verify_short): Strengthen param "insn" from rtx to rtx_insn *.
	(output_short_suffix): Likewise for local "insn".
	(arc_final_prescan_insn): Likewise for param "insn".  Remove
	now-redundant checked cast.
	(arc_reorg): Strengthen locals "insn", "top_label", "lp", "prev",
	"lp_simple", "next", "mov", "scan", "link_insn" from rtx to
	rtx_insn *.  Add a checked cast.  Introduce local "lc_set_insn"
	for use where lc_set became an insn.
	(arc_adjust_insn_length): Strengthen locals "prev", "succ" from
	rtx to rtx_insn *.
	(arc_get_insn_variants): Likewise for local "prev".
	(arc_ifcvt): Likewise for locals "insn", "seq", "prev", "pprev",
	"next".
	(arc_predicate_delay_insns): Likewise for local "insn".
	(arc_pad_return): Likewise for local "prev".  For now, add a
	checked cast when extracting the insn from "final_sequence".
	(arc_short_long): Likewise for param "insn".
	(arc_need_delay): Likewise for param "insn" and local "next".
	(arc_label_align): Likewise for locals "prev", "next".
---
 gcc/config/arc/arc-protos.h |  8 ++--
 gcc/config/arc/arc.c        | 97 ++++++++++++++++++++++++---------------------
 2 files changed, 55 insertions(+), 50 deletions(-)

diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h
index f675972..8953845 100644
--- a/gcc/config/arc/arc-protos.h
+++ b/gcc/config/arc/arc-protos.h
@@ -31,7 +31,7 @@ extern bool compact_sda_memory_operand (rtx op,enum machine_mode  mode);
 extern bool arc_double_limm_p (rtx);
 extern void arc_print_operand (FILE *, rtx, int);
 extern void arc_print_operand_address (FILE *, rtx);
-extern void arc_final_prescan_insn (rtx, rtx *, int);
+extern void arc_final_prescan_insn (rtx_insn *, rtx *, int);
 extern void arc_set_default_type_attributes(tree type);
 extern const char *arc_output_libcall (const char *);
 extern bool prepare_extend_operands (rtx *operands, enum rtx_code code,
@@ -100,14 +100,14 @@ extern void split_addsi (rtx *);
 extern void split_subsi (rtx *);
 extern void arc_pad_return (void);
 extern rtx arc_split_move (rtx *);
-extern int arc_verify_short (rtx insn, int unalign, int);
-extern const char *arc_short_long (rtx insn, const char *, const char *);
+extern int arc_verify_short (rtx_insn *insn, int unalign, int);
+extern const char *arc_short_long (rtx_insn *insn, const char *, const char *);
 extern rtx arc_regno_use_in (unsigned int, rtx);
 extern int arc_attr_type (rtx);
 extern bool arc_scheduling_not_expected (void);
 extern bool arc_sets_cc_p (rtx insn);
 extern int arc_label_align (rtx label);
-extern bool arc_need_delay (rtx insn);
+extern bool arc_need_delay (rtx_insn *insn);
 extern bool arc_text_label (rtx);
 extern int arc_decl_pretend_args (tree decl);
 extern bool arc_short_comparison_p (rtx, int);
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index c502d10..46d17c3 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -116,7 +116,7 @@ struct GTY (()) arc_ccfsm
   int state;
   int cc;
   rtx cond;
-  rtx target_insn;
+  rtx_insn *target_insn;
   int target_label;
 };
 
@@ -3405,7 +3405,7 @@ unspec_prof_htab_eq (const void *x, const void *y)
    before letting final output INSN.  */
 
 static void
-arc_ccfsm_advance (rtx insn, struct arc_ccfsm *state)
+arc_ccfsm_advance (rtx_insn *insn, struct arc_ccfsm *state)
 {
   /* BODY will hold the body of INSN.  */
   register rtx body;
@@ -3419,7 +3419,7 @@ arc_ccfsm_advance (rtx insn, struct arc_ccfsm *state)
 
   /* START_INSN will hold the insn from where we start looking.  This is the
      first insn after the following code_label if REVERSE is true.  */
-  rtx start_insn = insn;
+  rtx_insn *start_insn = insn;
 
   /* Type of the jump_insn. Brcc insns don't affect ccfsm changes,
      since they don't rely on a cmp preceding the.  */
@@ -3517,7 +3517,8 @@ arc_ccfsm_advance (rtx insn, struct arc_ccfsm *state)
       int then_not_else = TRUE;
       /* Nonzero if next insn must be the target label.  */
       int next_must_be_target_label_p;
-      rtx this_insn = start_insn, label = 0;
+      rtx_insn *this_insn = start_insn;
+      rtx label = 0;
 
       /* Register the insn jumped to.  */
       if (reverse)
@@ -3726,7 +3727,7 @@ arc_ccfsm_at_label (const char *prefix, int num, struct arc_ccfsm *state)
       && !strcmp (prefix, "L"))
     {
       state->state = 0;
-      state->target_insn = NULL_RTX;
+      state->target_insn = NULL;
     }
 }
 
@@ -3738,7 +3739,7 @@ void
 arc_ccfsm_record_condition (rtx cond, bool reverse, rtx jump,
 			    struct arc_ccfsm *state)
 {
-  rtx seq_insn = NEXT_INSN (PREV_INSN (jump));
+  rtx_insn *seq_insn = NEXT_INSN (PREV_INSN (jump));
   if (!state)
     state = &arc_ccfsm_current;
 
@@ -3770,7 +3771,7 @@ arc_ccfsm_record_condition (rtx cond, bool reverse, rtx jump,
 /* Update *STATE as we would when we emit INSN.  */
 
 static void
-arc_ccfsm_post_advance (rtx insn, struct arc_ccfsm *state)
+arc_ccfsm_post_advance (rtx_insn *insn, struct arc_ccfsm *state)
 {
   enum attr_type type;
 
@@ -3828,8 +3829,8 @@ arc_ccfsm_cond_exec_p (void)
 /* Like next_active_insn, but return NULL if we find an ADDR_(DIFF_)VEC,
    and look inside SEQUENCEs.  */
 
-static rtx
-arc_next_active_insn (rtx insn, struct arc_ccfsm *statep)
+static rtx_insn *
+arc_next_active_insn (rtx_insn *insn, struct arc_ccfsm *statep)
 {
   rtx pat;
 
@@ -3839,7 +3840,7 @@ arc_next_active_insn (rtx insn, struct arc_ccfsm *statep)
 	arc_ccfsm_post_advance (insn, statep);
       insn = NEXT_INSN (insn);
       if (!insn || BARRIER_P (insn))
-	return NULL_RTX;
+	return NULL;
       if (statep)
 	arc_ccfsm_advance (insn, statep);
     }
@@ -3854,9 +3855,9 @@ arc_next_active_insn (rtx insn, struct arc_ccfsm *statep)
       gcc_assert (INSN_P (insn));
       pat = PATTERN (insn);
       if (GET_CODE (pat) == ADDR_VEC || GET_CODE (pat) == ADDR_DIFF_VEC)
-	return NULL_RTX;
+	return NULL;
       if (GET_CODE (pat) == SEQUENCE)
-	return XVECEXP (pat, 0, 0);
+	return as_a <rtx_insn *> (XVECEXP (pat, 0, 0));
     }
   return insn;
 }
@@ -3886,7 +3887,7 @@ arc_next_active_insn (rtx insn, struct arc_ccfsm *statep)
    If CHECK_ATTR is greater than 0, check the iscompact attribute first.  */
 
 int
-arc_verify_short (rtx insn, int, int check_attr)
+arc_verify_short (rtx_insn *insn, int, int check_attr)
 {
   enum attr_iscompact iscompact;
   struct machine_function *machine;
@@ -3912,7 +3913,7 @@ arc_verify_short (rtx insn, int, int check_attr)
 static void
 output_short_suffix (FILE *file)
 {
-  rtx insn = current_output_insn;
+  rtx_insn *insn = current_output_insn;
 
   if (arc_verify_short (insn, cfun->machine->unalign, 1))
     {
@@ -3926,7 +3927,7 @@ output_short_suffix (FILE *file)
 /* Implement FINAL_PRESCAN_INSN.  */
 
 void
-arc_final_prescan_insn (rtx insn, rtx *opvec ATTRIBUTE_UNUSED,
+arc_final_prescan_insn (rtx_insn *insn, rtx *opvec ATTRIBUTE_UNUSED,
 			int noperands ATTRIBUTE_UNUSED)
 {
   if (TARGET_DUMPISIZE)
@@ -3944,7 +3945,7 @@ arc_final_prescan_insn (rtx insn, rtx *opvec ATTRIBUTE_UNUSED,
       current_output_insn =
 	emit_insn_before (gen_nop (), NEXT_INSN (PREV_INSN (insn)));
       final_scan_insn (current_output_insn, asm_out_file, optimize, 1, NULL);
-      current_output_insn = as_a <rtx_insn *> (insn);
+      current_output_insn = insn;
     }
   /* Restore extraction data which might have been clobbered by arc_hazard.  */
   extract_constrain_insn_cached (insn);
@@ -5734,7 +5735,8 @@ static int arc_reorg_in_progress = 0;
 static void
 arc_reorg (void)
 {
-  rtx insn, pattern;
+  rtx_insn *insn;
+  rtx pattern;
   rtx pc_target;
   long offset;
   int changed;
@@ -5746,7 +5748,7 @@ arc_reorg (void)
   if (crtl->profile)
     {
       section *save_text_section;
-      rtx insn;
+      rtx_insn *insn;
       int size = get_max_uid () >> 4;
       htab_t htab = htab_create (size, unspec_prof_hash, unspec_prof_htab_eq,
 				 NULL);
@@ -5767,12 +5769,12 @@ arc_reorg (void)
       if (GET_CODE (insn) == JUMP_INSN
 	  && recog_memoized (insn) == CODE_FOR_doloop_end_i)
 	{
-	  rtx top_label
-	    = XEXP (XEXP (SET_SRC (XVECEXP (PATTERN (insn), 0, 0)), 1), 0);
+	  rtx_insn *top_label
+	    = as_a <rtx_insn *> (XEXP (XEXP (SET_SRC (XVECEXP (PATTERN (insn), 0, 0)), 1), 0));
 	  rtx num = GEN_INT (CODE_LABEL_NUMBER (top_label));
-	  rtx lp, prev = prev_nonnote_insn (top_label);
-	  rtx lp_simple = NULL_RTX;
-	  rtx next = NULL_RTX;
+	  rtx_insn *lp, *prev = prev_nonnote_insn (top_label);
+	  rtx_insn *lp_simple = NULL;
+	  rtx_insn *next = NULL;
 	  rtx op0 = XEXP (XVECEXP (PATTERN (insn), 0, 1), 0);
 	  HOST_WIDE_INT loop_end_id
 	    = -INTVAL (XEXP (XVECEXP (PATTERN (insn), 0, 4), 0));
@@ -5786,7 +5788,7 @@ arc_reorg (void)
 	  if (!lp || !NONJUMP_INSN_P (lp)
 	      || dead_or_set_regno_p (lp, LP_COUNT))
 	    {
-	      for (prev = next = insn, lp = NULL_RTX ; prev || next;)
+	      for (prev = next = insn, lp = NULL ; prev || next;)
 		{
 		  if (prev)
 		    {
@@ -5815,7 +5817,7 @@ arc_reorg (void)
 		      next = next_nonnote_insn (next);
 		    }
 		}
-	      prev = NULL_RTX;
+	      prev = NULL;
 	    }
 	  else
 	    lp_simple = lp;
@@ -5851,7 +5853,8 @@ arc_reorg (void)
 		 move exists.  */
 	      if (true_regnum (begin_cnt) != LP_COUNT)
 		{
-		  rtx mov, set, note;
+		  rtx_insn *mov;
+		  rtx set, note;
 
 		  for (mov = prev_nonnote_insn (lp); mov;
 		       mov = prev_nonnote_insn (mov))
@@ -5903,16 +5906,16 @@ arc_reorg (void)
 				   XEXP (XVECEXP (PATTERN (lp), 0, 3), 0),
 				   const0_rtx);
 
-		  lc_set = emit_insn_before (lc_set, insn);
+		  rtx_insn *lc_set_insn = emit_insn_before (lc_set, insn);
 		  delete_insn (lp);
 		  delete_insn (insn);
-		  insn = lc_set;
+		  insn = lc_set_insn;
 		}
 	      /* If the loop is non-empty with zero length, we can't make it
 		 a zero-overhead loop.  That can happen for empty asms.  */
 	      else
 		{
-		  rtx scan;
+		  rtx_insn *scan;
 
 		  for (scan = top_label;
 		       (scan && scan != insn
@@ -6065,7 +6068,8 @@ arc_reorg (void)
 	  label = XEXP (pc_target, 1);
 
 	    {
-	      rtx pat, scan, link_insn = NULL;
+	      rtx pat;
+	      rtx_insn *scan, *link_insn = NULL;
 
 	      for (scan = PREV_INSN (insn);
 		   scan && GET_CODE (scan) != CODE_LABEL;
@@ -7805,7 +7809,7 @@ arc_adjust_insn_length (rtx insn, int len, bool)
      loop.  */
   if (recog_memoized (insn) == CODE_FOR_doloop_end_i)
     {
-      rtx prev = prev_nonnote_insn (insn);
+      rtx_insn *prev = prev_nonnote_insn (insn);
 
       return ((LABEL_P (prev)
 	       || (TARGET_ARC600
@@ -7835,7 +7839,7 @@ arc_adjust_insn_length (rtx insn, int len, bool)
     }
   if (TARGET_ARC600)
     {
-      rtx succ = next_real_insn (insn);
+      rtx_insn *succ = next_real_insn (insn);
 
       /* One the ARC600, a write to an extension register must be separated
 	 from a read.  */
@@ -7954,7 +7958,7 @@ arc_get_insn_variants (rtx insn, int len, bool, bool target_p,
   /* If the previous instruction is an sfunc call, this insn is always
      a target, even though the middle-end is unaware of this.  */
   bool force_target = false;
-  rtx prev = prev_active_insn (insn);
+  rtx_insn *prev = prev_active_insn (insn);
   if (prev && arc_next_active_insn (prev, 0) == insn
       && ((NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
 	  ? CALL_ATTR (XVECEXP (PATTERN (prev), 0, 0), NON_SIBCALL)
@@ -8229,7 +8233,7 @@ arc_ifcvt (void)
   basic_block merge_bb = 0;
 
   memset (statep, 0, sizeof *statep);
-  for (rtx insn = get_insns (); insn; insn = next_insn (insn))
+  for (rtx_insn *insn = get_insns (); insn; insn = next_insn (insn))
     {
       arc_ccfsm_advance (insn, statep);
 
@@ -8248,7 +8252,7 @@ arc_ifcvt (void)
 	      = BLOCK_FOR_INSN (NEXT_INSN (NEXT_INSN (PREV_INSN (insn))));
 	    arc_ccfsm_post_advance (insn, statep);
 	    gcc_assert (!IN_RANGE (statep->state, 1, 2));
-	    rtx seq = NEXT_INSN (PREV_INSN (insn));
+	    rtx_insn *seq = NEXT_INSN (PREV_INSN (insn));
 	    if (seq != insn)
 	      {
 		rtx slot = XVECEXP (PATTERN (seq), 0, 1);
@@ -8303,7 +8307,8 @@ arc_ifcvt (void)
 
 	  /* Conditionalized insn.  */
 
-	  rtx prev, pprev, *patp, pat, cond;
+	  rtx_insn *prev, *pprev;
+	  rtx *patp, pat, cond;
 	  bool annulled; annulled = false;
 
 	  /* If this is a delay slot insn in a non-annulled branch,
@@ -8348,7 +8353,7 @@ arc_ifcvt (void)
 	    gcc_unreachable ();
 	  if (JUMP_P (insn))
 	    {
-	      rtx next = next_nonnote_insn (insn);
+	      rtx_insn *next = next_nonnote_insn (insn);
 	      if (GET_CODE (next) == BARRIER)
 		delete_insn (next);
 	      if (statep->state == 3)
@@ -8369,7 +8374,7 @@ arc_ifcvt (void)
 static unsigned
 arc_predicate_delay_insns (void)
 {
-  for (rtx insn = get_insns (); insn; insn = NEXT_INSN (insn))
+  for (rtx_insn *insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
       rtx pat, jump, dlay, src, cond, *patp;
       int reverse;
@@ -8653,7 +8658,7 @@ void
 arc_pad_return (void)
 {
   rtx_insn *insn = current_output_insn;
-  rtx prev = prev_active_insn (insn);
+  rtx_insn *prev = prev_active_insn (insn);
   int want_long;
 
   if (!prev)
@@ -8694,7 +8699,7 @@ arc_pad_return (void)
 	      || !reg_set_p (gen_rtx_REG (CCmode, CC_REG),
 			     XVECEXP (final_sequence, 0, 1))))
 	{
-	  prev = XVECEXP (final_sequence, 0, 1);
+	  prev = as_a <rtx_insn *> (XVECEXP (final_sequence, 0, 1));
 	  gcc_assert (!prev_real_insn (insn)
 		      || !arc_hazard (prev_real_insn (insn), prev));
 	  cfun->machine->force_short_suffix = !want_long;
@@ -9031,7 +9036,7 @@ arc_split_move (rtx *operands)
    and l_tmpl (for long INSNs).  */
 
 const char *
-arc_short_long (rtx insn, const char *s_tmpl, const char *l_tmpl)
+arc_short_long (rtx_insn *insn, const char *s_tmpl, const char *l_tmpl)
 {
   int is_short = arc_verify_short (insn, cfun->machine->unalign, -1);
 
@@ -9100,9 +9105,9 @@ arc_sets_cc_p (rtx insn)
    to fill.  */
 
 bool
-arc_need_delay (rtx insn)
+arc_need_delay (rtx_insn *insn)
 {
-  rtx next;
+  rtx_insn *next;
 
   if (!flag_delayed_branch)
     return false;
@@ -9152,7 +9157,7 @@ arc_label_align (rtx label)
 
   if (loop_align > align_labels_log)
     {
-      rtx prev = prev_nonnote_insn (label);
+      rtx_insn *prev = prev_nonnote_insn (label);
 
       if (prev && NONJUMP_INSN_P (prev)
 	  && GET_CODE (PATTERN (prev)) == PARALLEL
@@ -9163,7 +9168,7 @@ arc_label_align (rtx label)
      ADDR_DIFF_VEC.  */
   if (align_labels_log < 1)
     {
-      rtx next = next_nonnote_nondebug_insn (label);
+      rtx_insn *next = next_nonnote_nondebug_insn (label);
       if (INSN_P (next) && recog_memoized (next) >= 0)
 	return 1;
     }
@@ -9175,7 +9180,7 @@ arc_label_align (rtx label)
 bool
 arc_text_label (rtx label)
 {
-  rtx next;
+  rtx_insn *next;
 
   /* ??? We use deleted labels like they were still there, see
      gcc.c-torture/compile/20000326-2.c .  */
-- 
1.8.5.3

[PATCH 155/236] config/xtensa: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* config/xtensa/xtensa-protos.h (xtensa_emit_loop_end): Strengthen
	first param from rtx to rtx_insn *.
	* config/xtensa/xtensa.c (struct machine_function): Likewise for
	field "set_frame_ptr_insn".
	(xtensa_expand_compare_and_swap): Strengthen locals "csloop" and
	"csend" from rtx to rtx_code_label *.
	(xtensa_expand_atomic): Likewise for local "csloop".
	(xtensa_emit_loop_end): Strengthen param "insn" from rtx to
	rtx_insn *.
	(xtensa_call_tls_desc): Likewise for return type and locals
	"call_insn", "insns".
	(xtensa_legitimize_tls_address): Likewise for local "insns".
	(xtensa_expand_prologue): Likewise for locals "insn", "first".
---
 gcc/config/xtensa/xtensa-protos.h |  2 +-
 gcc/config/xtensa/xtensa.c        | 23 +++++++++++++----------
 2 files changed, 14 insertions(+), 11 deletions(-)

diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h
index 5f09026..e684af8 100644
--- a/gcc/config/xtensa/xtensa-protos.h
+++ b/gcc/config/xtensa/xtensa-protos.h
@@ -47,7 +47,7 @@ extern rtx xtensa_copy_incoming_a7 (rtx);
 extern void xtensa_expand_nonlocal_goto (rtx *);
 extern void xtensa_expand_compare_and_swap (rtx, rtx, rtx, rtx);
 extern void xtensa_expand_atomic (enum rtx_code, rtx, rtx, rtx, bool);
-extern void xtensa_emit_loop_end (rtx, rtx *);
+extern void xtensa_emit_loop_end (rtx_insn *, rtx *);
 extern char *xtensa_emit_branch (bool, bool, rtx *);
 extern char *xtensa_emit_bit_branch (bool, bool, rtx *);
 extern char *xtensa_emit_movcc (bool, bool, bool, rtx *);
diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 6b6693f..93fd895 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -99,7 +99,7 @@ struct GTY(()) machine_function
   bool need_a7_copy;
   bool vararg_a7;
   rtx vararg_a7_copy;
-  rtx set_frame_ptr_insn;
+  rtx_insn *set_frame_ptr_insn;
 };
 
 /* Vector, indexed by hard register number, which contains 1 for a
@@ -1463,8 +1463,8 @@ xtensa_expand_compare_and_swap (rtx target, rtx mem, rtx cmp, rtx new_rtx)
   rtx tmp, cmpv, newv, val;
   rtx oldval = gen_reg_rtx (SImode);
   rtx res = gen_reg_rtx (SImode);
-  rtx csloop = gen_label_rtx ();
-  rtx csend = gen_label_rtx ();
+  rtx_code_label *csloop = gen_label_rtx ();
+  rtx_code_label *csend = gen_label_rtx ();
 
   init_alignment_context (&ac, mem);
 
@@ -1524,7 +1524,7 @@ xtensa_expand_atomic (enum rtx_code code, rtx target, rtx mem, rtx val,
 {
   enum machine_mode mode = GET_MODE (mem);
   struct alignment_context ac;
-  rtx csloop = gen_label_rtx ();
+  rtx_code_label *csloop = gen_label_rtx ();
   rtx cmp, tmp;
   rtx old = gen_reg_rtx (SImode);
   rtx new_rtx = gen_reg_rtx (SImode);
@@ -1642,7 +1642,7 @@ xtensa_setup_frame_addresses (void)
    when the branch is taken.  */
 
 void
-xtensa_emit_loop_end (rtx insn, rtx *operands)
+xtensa_emit_loop_end (rtx_insn *insn, rtx *operands)
 {
   char done = 0;
 
@@ -1862,10 +1862,11 @@ xtensa_tls_module_base (void)
 }
 
 
-static rtx
+static rtx_insn *
 xtensa_call_tls_desc (rtx sym, rtx *retp)
 {
-  rtx fn, arg, a10, call_insn, insns;
+  rtx fn, arg, a10;
+  rtx_insn *call_insn, *insns;
 
   start_sequence ();
   fn = gen_reg_rtx (Pmode);
@@ -1889,7 +1890,8 @@ static rtx
 xtensa_legitimize_tls_address (rtx x)
 {
   unsigned int model = SYMBOL_REF_TLS_MODEL (x);
-  rtx dest, tp, ret, modbase, base, addend, insns;
+  rtx dest, tp, ret, modbase, base, addend;
+  rtx_insn *insns;
 
   dest = gen_reg_rtx (Pmode);
   switch (model)
@@ -2648,7 +2650,8 @@ xtensa_expand_prologue (void)
 {
   HOST_WIDE_INT total_size;
   rtx size_rtx;
-  rtx insn, note_rtx;
+  rtx_insn *insn;
+  rtx note_rtx;
 
   total_size = compute_frame_size (get_frame_size ());
   size_rtx = GEN_INT (total_size);
@@ -2669,7 +2672,7 @@ xtensa_expand_prologue (void)
     {
       if (cfun->machine->set_frame_ptr_insn)
 	{
-	  rtx first;
+	  rtx_insn *first;
 
 	  push_topmost_sequence ();
 	  first = get_insns ();
-- 
1.8.5.3

[PATCH 181/236] Strengthen fields in struct sequence_stack and struct emit_status

[David Malcolm]

gcc/
	* function.h (struct sequence_stack): Strengthen fields "first"
	and "last" from rtx to rtx_insn *.
	(struct emit_status): Likewise for fields "x_first_insn" and
	"x_last_insn".

	* emit-rtl.h (get_insns): Remove now-redundant checked cast.
	(set_first_insn): Add checked cast.
	(get_last_insn): Remove now-redundant checked cast.
	(set_last_insn): Add checked cast.

	* config/m32c/m32c.c (m32c_leaf_function_p): Strengthen locals
	"saved_first" and "saved_last" from rtx to rtx_insn *.
---
 gcc/config/m32c/m32c.c |  2 +-
 gcc/emit-rtl.h         | 10 ++++------
 gcc/function.h         |  8 ++++----
 3 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c
index 75f67f7..925db24 100644
--- a/gcc/config/m32c/m32c.c
+++ b/gcc/config/m32c/m32c.c
@@ -4045,7 +4045,7 @@ m32c_encode_section_info (tree decl, rtx rtl, int first)
 static int
 m32c_leaf_function_p (void)
 {
-  rtx saved_first, saved_last;
+  rtx_insn *saved_first, *saved_last;
   struct sequence_stack *seq;
   int rv;
 
diff --git a/gcc/emit-rtl.h b/gcc/emit-rtl.h
index 30425c2..a7ecf1f 100644
--- a/gcc/emit-rtl.h
+++ b/gcc/emit-rtl.h
@@ -77,8 +77,7 @@ extern bool need_atomic_barrier_p (enum memmodel, bool);
 static inline rtx_insn *
 get_insns (void)
 {
-  rtx insn = crtl->emit.x_first_insn;
-  return as_a_nullable <rtx_insn *> (insn);
+  return crtl->emit.x_first_insn;
 }
 
 /* Specify a new insn as the first in the chain.  */
@@ -87,7 +86,7 @@ static inline void
 set_first_insn (rtx insn)
 {
   gcc_checking_assert (!insn || !PREV_INSN (insn));
-  crtl->emit.x_first_insn = insn;
+  crtl->emit.x_first_insn = as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return the last insn emitted in current sequence or current function.  */
@@ -95,8 +94,7 @@ set_first_insn (rtx insn)
 static inline rtx_insn *
 get_last_insn (void)
 {
-  rtx insn = crtl->emit.x_last_insn;
-  return as_a_nullable <rtx_insn *> (insn);
+  return crtl->emit.x_last_insn;
 }
 
 /* Specify a new insn as the last in the chain.  */
@@ -105,7 +103,7 @@ static inline void
 set_last_insn (rtx insn)
 {
   gcc_checking_assert (!insn || !NEXT_INSN (insn));
-  crtl->emit.x_last_insn = insn;
+  crtl->emit.x_last_insn = as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Return a number larger than any instruction's uid in this function.  */
diff --git a/gcc/function.h b/gcc/function.h
index 14d1b2c..28a20f3 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -34,8 +34,8 @@ along with GCC; see the file COPYING3.  If not see
 
 struct GTY(()) sequence_stack {
   /* First and last insns in the chain of the saved sequence.  */
-  rtx first;
-  rtx last;
+  rtx_insn *first;
+  rtx_insn *last;
   struct sequence_stack *next;
 };
 \f
@@ -52,8 +52,8 @@ struct GTY(()) emit_status {
 
      start_sequence saves both of these on `sequence_stack' and then starts
      a new, nested sequence of insns.  */
-  rtx x_first_insn;
-  rtx x_last_insn;
+  rtx_insn *x_first_insn;
+  rtx_insn *x_last_insn;
 
   /* Stack of pending (incomplete) sequences saved by `start_sequence'.
      Each element describes one pending sequence.
-- 
1.8.5.3

[PATCH 096/236] optabs.c: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* optabs.c (expand_doubleword_shift): Strengthen local "insn" from
	rtx to rtx_insn *.
	(expand_binop): Likewise for locals "entry_last", "last", "insns"
	(expand_twoval_unop): Likewise for locals entry_last", "last".
	(expand_twoval_binop): Likewise.
	(expand_twoval_binop_libfunc): Likewise for local "insns".
	(widen_leading): Likewise for local "last".
	(expand_doubleword_clz): Likewise for local "seq".  Strengthen
	locals "hi0_label", "after_label" from rtx to rtx_code_label *.
	(widen_bswap): Strengthen local "last" from rtx to rtx_insn *.
	(expand_parity): Likewise for locals "last" and "seq".
	(expand_ffs): Likewise for local "seq".  Strengthen local
	"nonzero_label" from rtx to rtx_code_label *.
	(expand_absneg_bit): Strengthen local "insns" from rtx to
	rtx_insn *.
	(expand_unop_direct): Likewise for local "last".
	(expand_unop): Likewise for locals "last", "insns".
	(expand_abs_nojump): Likewise for local "last".
	(expand_abs): Strengthen local "op1" from rtx to rtx_code_label *.
	(expand_one_cmpl_abs_nojump): Strengthen local "last" from rtx to
	rtx_insn *.
	(expand_copysign_absneg): Strengthen local "label" from rtx to
	rtx_code_label *.
	(expand_copysign_bit): Strengthen local "insns" from rtx to
	rtx_insn *.
	(struct no_conflict_data): Likewise for fields "first", "insn".
	(emit_libcall_block_1): Likewise for param "insns" and locals
	"next", "last", "insn".
	(emit_libcall_block): For now, add a checked cast to rtx_insn *
	on "insns" when invoking emit_libcall_block_1.  Ultimately we
	want to strengthen insns itself.
	(prepare_cmp_insn): Strengthen local "last" from rtx to
	rtx_insn *.
	(emit_cmp_and_jump_insn_1): Likewise for local "insn".
	(prepare_float_lib_cmp): Likewise for local "insns".
	(emit_conditional_move): Likewise for local "last".
	(emit_conditional_add): Likewise.
	(have_sub2_insn): Likewise for local "seq".
	(expand_float): Likewise for local "insns".  Strengthen locals
	"label", "neglabel" from rtx to rtx_code_label *.
	(expand_fix): Likewise for locals "last", "insn", "insns" (to
	rtx_insn *) and locals "lab1", "lab2" (to rtx_code_label *).
	(expand_fixed_convert): Likewise for local "insns" (to
	rtx_insn *).
	(expand_sfix_optab): Likewise for local "last".
	(expand_compare_and_swap_loop): Strengthen local "label" from rtx
	to rtx_code_label *.
	(maybe_emit_sync_lock_test_and_set): Strengthen local "last_insn"
	from rtx to rtx_insn *.
	(expand_atomic_fetch_op): Likewise for local "insn".
	(maybe_legitimize_operand_same_code): Likewise for local "last".
	(maybe_legitimize_operands): Likewise.
---
 gcc/optabs.c | 134 ++++++++++++++++++++++++++++++++++-------------------------
 1 file changed, 77 insertions(+), 57 deletions(-)

diff --git a/gcc/optabs.c b/gcc/optabs.c
index 24fc015..f098616 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -59,7 +59,7 @@ struct target_libfuncs *this_target_libfuncs = &default_target_libfuncs;
 static void prepare_float_lib_cmp (rtx, rtx, enum rtx_code, rtx *,
 				   enum machine_mode *);
 static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int);
-static void emit_libcall_block_1 (rtx, rtx, rtx, rtx, bool);
+static void emit_libcall_block_1 (rtx_insn *, rtx, rtx, rtx, bool);
 
 /* Debug facility for use in GDB.  */
 void debug_optab_libfuncs (void);
@@ -1102,7 +1102,7 @@ expand_doubleword_shift (enum machine_mode op1_mode, optab binoptab,
 #ifdef HAVE_conditional_move
   /* Try using conditional moves to generate straight-line code.  */
   {
-    rtx start = get_last_insn ();
+    rtx_insn *start = get_last_insn ();
     if (expand_doubleword_shift_condmove (op1_mode, binoptab,
 					  cmp_code, cmp1, cmp2,
 					  outof_input, into_input,
@@ -1540,8 +1540,8 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
   enum machine_mode wider_mode;
   rtx libfunc;
   rtx temp;
-  rtx entry_last = get_last_insn ();
-  rtx last;
+  rtx_insn *entry_last = get_last_insn ();
+  rtx_insn *last;
 
   mclass = GET_MODE_CLASS (mode);
 
@@ -1737,7 +1737,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
       && optab_handler (binoptab, word_mode) != CODE_FOR_nothing)
     {
       int i;
-      rtx insns;
+      rtx_insn *insns;
 
       /* If TARGET is the same as one of the operands, the REG_EQUAL note
 	 won't be accurate, so use a new target.  */
@@ -1806,7 +1806,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
 	  || (shift_mask == BITS_PER_WORD - 1
 	      && double_shift_mask == BITS_PER_WORD * 2 - 1))
 	{
-	  rtx insns;
+	  rtx_insn *insns;
 	  rtx into_target, outof_target;
 	  rtx into_input, outof_input;
 	  int left_shift, outof_word;
@@ -1858,7 +1858,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
       && optab_handler (ashl_optab, word_mode) != CODE_FOR_nothing
       && optab_handler (lshr_optab, word_mode) != CODE_FOR_nothing)
     {
-      rtx insns;
+      rtx_insn *insns;
       rtx into_target, outof_target;
       rtx into_input, outof_input;
       rtx inter;
@@ -2143,7 +2143,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
   if (libfunc
       && (methods == OPTAB_LIB || methods == OPTAB_LIB_WIDEN))
     {
-      rtx insns;
+      rtx_insn *insns;
       rtx op1x = op1;
       enum machine_mode op1_mode = mode;
       rtx value;
@@ -2331,8 +2331,8 @@ expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1,
   enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
   enum mode_class mclass;
   enum machine_mode wider_mode;
-  rtx entry_last = get_last_insn ();
-  rtx last;
+  rtx_insn *entry_last = get_last_insn ();
+  rtx_insn *last;
 
   mclass = GET_MODE_CLASS (mode);
 
@@ -2405,8 +2405,8 @@ expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1,
   enum machine_mode mode = GET_MODE (targ0 ? targ0 : targ1);
   enum mode_class mclass;
   enum machine_mode wider_mode;
-  rtx entry_last = get_last_insn ();
-  rtx last;
+  rtx_insn *entry_last = get_last_insn ();
+  rtx_insn *last;
 
   mclass = GET_MODE_CLASS (mode);
 
@@ -2487,7 +2487,7 @@ expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
   enum machine_mode mode;
   enum machine_mode libval_mode;
   rtx libval;
-  rtx insns;
+  rtx_insn *insns;
   rtx libfunc;
 
   /* Exactly one of TARG0 or TARG1 should be non-NULL.  */
@@ -2553,7 +2553,8 @@ widen_leading (enum machine_mode mode, rtx op0, rtx target, optab unoptab)
 	{
 	  if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
 	    {
-	      rtx xop0, temp, last;
+	      rtx xop0, temp;
+	      rtx_insn *last;
 
 	      last = get_last_insn ();
 
@@ -2588,9 +2589,10 @@ expand_doubleword_clz (enum machine_mode mode, rtx op0, rtx target)
   rtx xop0 = force_reg (mode, op0);
   rtx subhi = gen_highpart (word_mode, xop0);
   rtx sublo = gen_lowpart (word_mode, xop0);
-  rtx hi0_label = gen_label_rtx ();
-  rtx after_label = gen_label_rtx ();
-  rtx seq, temp, result;
+  rtx_code_label *hi0_label = gen_label_rtx ();
+  rtx_code_label *after_label = gen_label_rtx ();
+  rtx_insn *seq;
+  rtx temp, result;
 
   /* If we were not given a target, use a word_mode register, not a
      'mode' register.  The result will fit, and nobody is expecting
@@ -2659,7 +2661,8 @@ widen_bswap (enum machine_mode mode, rtx op0, rtx target)
 {
   enum mode_class mclass = GET_MODE_CLASS (mode);
   enum machine_mode wider_mode;
-  rtx x, last;
+  rtx x;
+  rtx_insn *last;
 
   if (!CLASS_HAS_WIDER_MODES_P (mclass))
     return NULL_RTX;
@@ -2733,7 +2736,8 @@ expand_parity (enum machine_mode mode, rtx op0, rtx target)
 	{
 	  if (optab_handler (popcount_optab, wider_mode) != CODE_FOR_nothing)
 	    {
-	      rtx xop0, temp, last;
+	      rtx xop0, temp;
+	      rtx_insn *last;
 
 	      last = get_last_insn ();
 
@@ -2770,7 +2774,8 @@ expand_parity (enum machine_mode mode, rtx op0, rtx target)
 static rtx
 expand_ctz (enum machine_mode mode, rtx op0, rtx target)
 {
-  rtx seq, temp;
+  rtx_insn *seq;
+  rtx temp;
 
   if (optab_handler (clz_optab, mode) == CODE_FOR_nothing)
     return 0;
@@ -2814,7 +2819,8 @@ expand_ffs (enum machine_mode mode, rtx op0, rtx target)
 {
   HOST_WIDE_INT val = 0;
   bool defined_at_zero = false;
-  rtx temp, seq;
+  rtx temp;
+  rtx_insn *seq;
 
   if (optab_handler (ctz_optab, mode) != CODE_FOR_nothing)
     {
@@ -2856,7 +2862,7 @@ expand_ffs (enum machine_mode mode, rtx op0, rtx target)
 	 the operation sets condition codes that can be recycled for this.
 	 (This is true on i386, for instance.)  */
 
-      rtx nonzero_label = gen_label_rtx ();
+      rtx_code_label *nonzero_label = gen_label_rtx ();
       emit_cmp_and_jump_insns (op0, CONST0_RTX (mode), NE, 0,
 			       mode, true, nonzero_label);
 
@@ -2913,7 +2919,8 @@ expand_absneg_bit (enum rtx_code code, enum machine_mode mode,
   const struct real_format *fmt;
   int bitpos, word, nwords, i;
   enum machine_mode imode;
-  rtx temp, insns;
+  rtx temp;
+  rtx_insn *insns;
 
   /* The format has to have a simple sign bit.  */
   fmt = REAL_MODE_FORMAT (mode);
@@ -3010,7 +3017,7 @@ expand_unop_direct (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
     {
       struct expand_operand ops[2];
       enum insn_code icode = optab_handler (unoptab, mode);
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
       rtx pat;
 
       create_output_operand (&ops[0], target, mode);
@@ -3095,7 +3102,8 @@ expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
 	 be always more efficient than the other fallback methods.  */
       if (mode == HImode)
 	{
-	  rtx last, temp1, temp2;
+	  rtx_insn *last;
+	  rtx temp1, temp2;
 
 	  if (optab_handler (rotl_optab, mode) != CODE_FOR_nothing)
 	    {
@@ -3153,7 +3161,7 @@ expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
 	if (optab_handler (unoptab, wider_mode) != CODE_FOR_nothing)
 	  {
 	    rtx xop0 = op0;
-	    rtx last = get_last_insn ();
+	    rtx_insn *last = get_last_insn ();
 
 	    /* For certain operations, we need not actually extend
 	       the narrow operand, as long as we will truncate the
@@ -3192,7 +3200,7 @@ expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
       && optab_handler (unoptab, word_mode) != CODE_FOR_nothing)
     {
       int i;
-      rtx insns;
+      rtx_insn *insns;
 
       if (target == 0 || target == op0 || !valid_multiword_target_p (target))
 	target = gen_reg_rtx (mode);
@@ -3270,7 +3278,7 @@ expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
   libfunc = optab_libfunc (unoptab, mode);
   if (libfunc)
     {
-      rtx insns;
+      rtx_insn *insns;
       rtx value;
       rtx eq_value;
       enum machine_mode outmode = mode;
@@ -3317,7 +3325,7 @@ expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
 	      || optab_libfunc (unoptab, wider_mode))
 	    {
 	      rtx xop0 = op0;
-	      rtx last = get_last_insn ();
+	      rtx_insn *last = get_last_insn ();
 
 	      /* For certain operations, we need not actually extend
 		 the narrow operand, as long as we will truncate the
@@ -3427,7 +3435,7 @@ expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target,
   if (optab_handler (smax_optab, mode) != CODE_FOR_nothing
       && !HONOR_SIGNED_ZEROS (mode))
     {
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
 
       temp = expand_unop (mode, result_unsignedp ? neg_optab : negv_optab,
 			  op0, NULL_RTX, 0);
@@ -3470,7 +3478,8 @@ rtx
 expand_abs (enum machine_mode mode, rtx op0, rtx target,
 	    int result_unsignedp, int safe)
 {
-  rtx temp, op1;
+  rtx temp;
+  rtx_code_label *op1;
 
   if (GET_MODE_CLASS (mode) != MODE_INT
       || ! flag_trapv)
@@ -3531,7 +3540,7 @@ expand_one_cmpl_abs_nojump (enum machine_mode mode, rtx op0, rtx target)
   /* If we have a MAX insn, we can do this as MAX (x, ~x).  */
   if (optab_handler (smax_optab, mode) != CODE_FOR_nothing)
     {
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
 
       temp = expand_unop (mode, one_cmpl_optab, op0, NULL_RTX, 0);
       if (temp != 0)
@@ -3576,7 +3585,8 @@ expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
 {
   enum machine_mode imode;
   enum insn_code icode;
-  rtx sign, label;
+  rtx sign;
+  rtx_code_label *label;
 
   if (target == op1)
     target = NULL_RTX;
@@ -3659,7 +3669,8 @@ expand_copysign_bit (enum machine_mode mode, rtx op0, rtx op1, rtx target,
 {
   enum machine_mode imode;
   int word, nwords, i;
-  rtx temp, insns;
+  rtx temp;
+  rtx_insn *insns;
 
   if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD)
     {
@@ -3839,7 +3850,8 @@ emit_unop_insn (enum insn_code icode, rtx target, rtx op0, enum rtx_code code)
 \f
 struct no_conflict_data
 {
-  rtx target, first, insn;
+  rtx target;
+  rtx_insn *first, *insn;
   bool must_stay;
 };
 
@@ -3891,11 +3903,11 @@ no_conflict_move_test (rtx dest, const_rtx set, void *p0)
    note with an operand of EQUIV.  */
 
 static void
-emit_libcall_block_1 (rtx insns, rtx target, rtx result, rtx equiv,
+emit_libcall_block_1 (rtx_insn *insns, rtx target, rtx result, rtx equiv,
 		      bool equiv_may_trap)
 {
   rtx final_dest = target;
-  rtx next, last, insn;
+  rtx_insn *next, *last, *insn;
 
   /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
      into a MEM later.  Protect the libcall block from this change.  */
@@ -3991,7 +4003,8 @@ emit_libcall_block_1 (rtx insns, rtx target, rtx result, rtx equiv,
 void
 emit_libcall_block (rtx insns, rtx target, rtx result, rtx equiv)
 {
-  emit_libcall_block_1 (insns, target, result, equiv, false);
+  emit_libcall_block_1 (as_a_nullable <rtx_insn *> (insns),
+			target, result, equiv, false);
 }
 \f
 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
@@ -4182,7 +4195,7 @@ prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
       if (icode != CODE_FOR_nothing
 	  && insn_operand_matches (icode, 0, test))
 	{
-	  rtx last = get_last_insn ();
+	  rtx_insn *last = get_last_insn ();
 	  rtx op0 = prepare_operand (icode, x, 1, mode, cmp_mode, unsignedp);
 	  rtx op1 = prepare_operand (icode, y, 2, mode, cmp_mode, unsignedp);
 	  if (op0 && op1
@@ -4294,7 +4307,7 @@ emit_cmp_and_jump_insn_1 (rtx test, enum machine_mode mode, rtx label, int prob)
   enum machine_mode optab_mode;
   enum mode_class mclass;
   enum insn_code icode;
-  rtx insn;
+  rtx_insn *insn;
 
   mclass = GET_MODE_CLASS (mode);
   optab_mode = (mclass == MODE_CC) ? CCmode : mode;
@@ -4375,7 +4388,8 @@ prepare_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison,
   enum machine_mode orig_mode = GET_MODE (x);
   enum machine_mode mode, cmp_mode;
   rtx true_rtx, false_rtx;
-  rtx value, target, insns, equiv;
+  rtx value, target, equiv;
+  rtx_insn *insns;
   rtx libfunc = 0;
   bool reversed_p = false;
   cmp_mode = targetm.libgcc_cmp_return_mode ();
@@ -4529,7 +4543,8 @@ emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
 		       enum machine_mode cmode, rtx op2, rtx op3,
 		       enum machine_mode mode, int unsignedp)
 {
-  rtx tem, comparison, last;
+  rtx tem, comparison;
+  rtx_insn *last;
   enum insn_code icode;
   enum rtx_code reversed;
 
@@ -4650,7 +4665,8 @@ emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
 		      enum machine_mode cmode, rtx op2, rtx op3,
 		      enum machine_mode mode, int unsignedp)
 {
-  rtx tem, comparison, last;
+  rtx tem, comparison;
+  rtx_insn *last;
   enum insn_code icode;
 
   /* If one operand is constant, make it the second one.  Only do this
@@ -4868,7 +4884,7 @@ have_sub2_insn (rtx x, rtx y)
 rtx
 gen_move_insn (rtx x, rtx y)
 {
-  rtx seq;
+  rtx_insn *seq;
 
   start_sequence ();
   emit_move_insn_1 (x, y);
@@ -5074,7 +5090,7 @@ expand_float (rtx to, rtx from, int unsignedp)
      then unconditionally adjust the result.  */
   if (unsignedp && can_do_signed)
     {
-      rtx label = gen_label_rtx ();
+      rtx_code_label *label = gen_label_rtx ();
       rtx temp;
       REAL_VALUE_TYPE offset;
 
@@ -5098,7 +5114,7 @@ expand_float (rtx to, rtx from, int unsignedp)
 	      < GET_MODE_PRECISION (GET_MODE (from)))
 	    {
 	      rtx temp1;
-	      rtx neglabel = gen_label_rtx ();
+	      rtx_code_label *neglabel = gen_label_rtx ();
 
 	      /* Don't use TARGET if it isn't a register, is a hard register,
 		 or is the wrong mode.  */
@@ -5177,7 +5193,7 @@ expand_float (rtx to, rtx from, int unsignedp)
   /* No hardware instruction available; call a library routine.  */
     {
       rtx libfunc;
-      rtx insns;
+      rtx_insn *insns;
       rtx value;
       convert_optab tab = unsignedp ? ufloat_optab : sfloat_optab;
 
@@ -5243,7 +5259,7 @@ expand_fix (rtx to, rtx from, int unsignedp)
 
 	if (icode != CODE_FOR_nothing)
 	  {
-	    rtx last = get_last_insn ();
+	    rtx_insn *last = get_last_insn ();
 	    if (fmode != GET_MODE (from))
 	      from = convert_to_mode (fmode, from, 0);
 
@@ -5301,7 +5317,9 @@ expand_fix (rtx to, rtx from, int unsignedp)
 	{
 	  int bitsize;
 	  REAL_VALUE_TYPE offset;
-	  rtx limit, lab1, lab2, insn;
+	  rtx limit;
+	  rtx_code_label *lab1, *lab2;
+	  rtx_insn *insn;
 
 	  bitsize = GET_MODE_PRECISION (GET_MODE (to));
 	  real_2expN (&offset, bitsize - 1, fmode);
@@ -5365,7 +5383,7 @@ expand_fix (rtx to, rtx from, int unsignedp)
     }
   else
     {
-      rtx insns;
+      rtx_insn *insns;
       rtx value;
       rtx libfunc;
 
@@ -5407,7 +5425,8 @@ expand_fixed_convert (rtx to, rtx from, int uintp, int satp)
   convert_optab tab;
   enum rtx_code this_code;
   enum insn_code code;
-  rtx insns, value;
+  rtx_insn *insns;
+  rtx value;
   rtx libfunc;
 
   if (to_mode == from_mode)
@@ -5470,7 +5489,7 @@ expand_sfix_optab (rtx to, rtx from, convert_optab tab)
 	icode = convert_optab_handler (tab, imode, fmode);
 	if (icode != CODE_FOR_nothing)
 	  {
-	    rtx last = get_last_insn ();
+	    rtx_insn *last = get_last_insn ();
 	    if (fmode != GET_MODE (from))
 	      from = convert_to_mode (fmode, from, 0);
 
@@ -7082,7 +7101,8 @@ static bool
 expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
 {
   enum machine_mode mode = GET_MODE (mem);
-  rtx label, cmp_reg, success, oldval;
+  rtx_code_label *label;
+  rtx cmp_reg, success, oldval;
 
   /* The loop we want to generate looks like
 
@@ -7162,7 +7182,7 @@ maybe_emit_sync_lock_test_and_set (rtx target, rtx mem, rtx val,
 {
   enum machine_mode mode = GET_MODE (mem);
   enum insn_code icode;
-  rtx last_insn = get_last_insn ();
+  rtx_insn *last_insn = get_last_insn ();
 
   icode = optab_handler (sync_lock_test_and_set_optab, mode);
 
@@ -8073,7 +8093,7 @@ expand_atomic_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code,
   /* If nothing else has succeeded, default to a compare and swap loop.  */
   if (can_compare_and_swap_p (mode, true))
     {
-      rtx insn;
+      rtx_insn *insn;
       rtx t0 = gen_reg_rtx (mode), t1;
 
       start_sequence ();
@@ -8166,7 +8186,7 @@ maybe_legitimize_operand_same_code (enum insn_code icode, unsigned int opno,
       if (!(REG_P (addr) && REGNO (addr) > LAST_VIRTUAL_REGISTER)
 	  && !side_effects_p (addr))
 	{
-	  rtx last;
+	  rtx_insn *last;
 	  enum machine_mode mode;
 
 	  last = get_last_insn ();
@@ -8280,7 +8300,7 @@ bool
 maybe_legitimize_operands (enum insn_code icode, unsigned int opno,
 			   unsigned int nops, struct expand_operand *ops)
 {
-  rtx last;
+  rtx_insn *last;
   unsigned int i;
 
   last = get_last_insn ();
-- 
1.8.5.3

[PATCH 103/236] reg-stack.c: Use rtx_insn

[David Malcolm]

gcc/
	* reg-stack.c (next_flags_user): Strengthen return type and param
	"insn" from rtx to rtx_insn *.
	(straighten_stack): Likewise for param "insn".
	(check_asm_stack_operands): Likewise.
	(remove_regno_note): Likewise.
	(emit_pop_insn): Likewise for return type, param "insn", local
	"pop_insn".
	(emit_swap_insn):  Strengthen param "insn" and locals "i1", "tmp",
	"limit" from rtx to rtx_insn *.
	(swap_to_top): Likewise for param "insn".
	(move_for_stack_reg): Likewise.
	(move_nan_for_stack_reg): Likewise.
	(swap_rtx_condition): Likewise.
	(compare_for_stack_reg): Likewise.
	(subst_all_stack_regs_in_debug_insn): Likewise.
	(subst_stack_regs_pat): Likewise, and local "insn2".
	(subst_asm_stack_regs): Strengthen param "insn" from rtx to
	rtx_insn *.
	(subst_stack_regs): Likewise.
	(change_stack): Likewise.
	(convert_regs_1): Likewise for locals "insn", "next".
---
 gcc/reg-stack.c | 86 +++++++++++++++++++++++++++++----------------------------
 1 file changed, 44 insertions(+), 42 deletions(-)

diff --git a/gcc/reg-stack.c b/gcc/reg-stack.c
index 94de021..4293911 100644
--- a/gcc/reg-stack.c
+++ b/gcc/reg-stack.c
@@ -247,25 +247,25 @@ static int stack_regs_mentioned_p (const_rtx pat);
 static void pop_stack (stack_ptr, int);
 static rtx *get_true_reg (rtx *);
 
-static int check_asm_stack_operands (rtx);
+static int check_asm_stack_operands (rtx_insn *);
 static void get_asm_operands_in_out (rtx, int *, int *);
 static rtx stack_result (tree);
 static void replace_reg (rtx *, int);
-static void remove_regno_note (rtx, enum reg_note, unsigned int);
+static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int);
 static int get_hard_regnum (stack_ptr, rtx);
-static rtx emit_pop_insn (rtx, stack_ptr, rtx, enum emit_where);
-static void swap_to_top (rtx, stack_ptr, rtx, rtx);
-static bool move_for_stack_reg (rtx, stack_ptr, rtx);
-static bool move_nan_for_stack_reg (rtx, stack_ptr, rtx);
+static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where);
+static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx);
+static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx);
+static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx);
 static int swap_rtx_condition_1 (rtx);
-static int swap_rtx_condition (rtx);
-static void compare_for_stack_reg (rtx, stack_ptr, rtx);
-static bool subst_stack_regs_pat (rtx, stack_ptr, rtx);
-static void subst_asm_stack_regs (rtx, stack_ptr);
-static bool subst_stack_regs (rtx, stack_ptr);
-static void change_stack (rtx, stack_ptr, stack_ptr, enum emit_where);
+static int swap_rtx_condition (rtx_insn *);
+static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx);
+static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx);
+static void subst_asm_stack_regs (rtx_insn *, stack_ptr);
+static bool subst_stack_regs (rtx_insn *, stack_ptr);
+static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where);
 static void print_stack (FILE *, stack_ptr);
-static rtx next_flags_user (rtx);
+static rtx_insn *next_flags_user (rtx_insn *);
 \f
 /* Return nonzero if any stack register is mentioned somewhere within PAT.  */
 
@@ -330,8 +330,8 @@ stack_regs_mentioned (const_rtx insn)
 \f
 static rtx ix86_flags_rtx;
 
-static rtx
-next_flags_user (rtx insn)
+static rtx_insn *
+next_flags_user (rtx_insn *insn)
 {
   /* Search forward looking for the first use of this value.
      Stop at block boundaries.  */
@@ -344,15 +344,15 @@ next_flags_user (rtx insn)
 	return insn;
 
       if (CALL_P (insn))
-	return NULL_RTX;
+	return NULL;
     }
-  return NULL_RTX;
+  return NULL;
 }
 \f
 /* Reorganize the stack into ascending numbers, before this insn.  */
 
 static void
-straighten_stack (rtx insn, stack_ptr regstack)
+straighten_stack (rtx_insn *insn, stack_ptr regstack)
 {
   struct stack_def temp_stack;
   int top;
@@ -453,7 +453,7 @@ static bool any_malformed_asm;
    numbers below refer to that explanation.  */
 
 static int
-check_asm_stack_operands (rtx insn)
+check_asm_stack_operands (rtx_insn *insn)
 {
   int i;
   int n_clobbers;
@@ -696,7 +696,7 @@ replace_reg (rtx *reg, int regno)
    number REGNO from INSN.  Remove only one such note.  */
 
 static void
-remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
+remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno)
 {
   rtx *note_link, this_rtx;
 
@@ -739,10 +739,11 @@ get_hard_regnum (stack_ptr regstack, rtx reg)
    and source is the top of stack.  A death note for the top of stack
    cases the movdf pattern to pop.  */
 
-static rtx
-emit_pop_insn (rtx insn, stack_ptr regstack, rtx reg, enum emit_where where)
+static rtx_insn *
+emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, enum emit_where where)
 {
-  rtx pop_insn, pop_rtx;
+  rtx_insn *pop_insn;
+  rtx pop_rtx;
   int hard_regno;
 
   /* For complex types take care to pop both halves.  These may survive in
@@ -752,7 +753,7 @@ emit_pop_insn (rtx insn, stack_ptr regstack, rtx reg, enum emit_where where)
       rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
       rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
 
-      pop_insn = NULL_RTX;
+      pop_insn = NULL;
       if (get_hard_regnum (regstack, reg1) >= 0)
 	pop_insn = emit_pop_insn (insn, regstack, reg1, where);
       if (get_hard_regnum (regstack, reg2) >= 0)
@@ -791,12 +792,12 @@ emit_pop_insn (rtx insn, stack_ptr regstack, rtx reg, enum emit_where where)
    If REG is already at the top of the stack, no insn is emitted.  */
 
 static void
-emit_swap_insn (rtx insn, stack_ptr regstack, rtx reg)
+emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg)
 {
   int hard_regno;
   rtx swap_rtx;
   int tmp, other_reg;		/* swap regno temps */
-  rtx i1;			/* the stack-reg insn prior to INSN */
+  rtx_insn *i1;			/* the stack-reg insn prior to INSN */
   rtx i1set = NULL_RTX;		/* the SET rtx within I1 */
 
   hard_regno = get_hard_regnum (regstack, reg);
@@ -826,8 +827,8 @@ emit_swap_insn (rtx insn, stack_ptr regstack, rtx reg)
   i1 = NULL;
   if (current_block && insn != BB_HEAD (current_block))
     {
-      rtx tmp = PREV_INSN (insn);
-      rtx limit = PREV_INSN (BB_HEAD (current_block));
+      rtx_insn *tmp = PREV_INSN (insn);
+      rtx_insn *limit = PREV_INSN (BB_HEAD (current_block));
       while (tmp != limit)
 	{
 	  if (LABEL_P (tmp)
@@ -898,7 +899,7 @@ emit_swap_insn (rtx insn, stack_ptr regstack, rtx reg)
    is emitted.  */
 
 static void
-swap_to_top (rtx insn, stack_ptr regstack, rtx src1, rtx src2)
+swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2)
 {
   struct stack_def temp_stack;
   int regno, j, k, temp;
@@ -939,7 +940,7 @@ swap_to_top (rtx insn, stack_ptr regstack, rtx src1, rtx src2)
    was deleted in the process.  */
 
 static bool
-move_for_stack_reg (rtx insn, stack_ptr regstack, rtx pat)
+move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat)
 {
   rtx *psrc =  get_true_reg (&SET_SRC (pat));
   rtx *pdest = get_true_reg (&SET_DEST (pat));
@@ -1090,7 +1091,7 @@ move_for_stack_reg (rtx insn, stack_ptr regstack, rtx pat)
    a NaN into DEST, then invokes move_for_stack_reg.  */
 
 static bool
-move_nan_for_stack_reg (rtx insn, stack_ptr regstack, rtx dest)
+move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest)
 {
   rtx pat;
 
@@ -1138,7 +1139,7 @@ swap_rtx_condition_1 (rtx pat)
 }
 
 static int
-swap_rtx_condition (rtx insn)
+swap_rtx_condition (rtx_insn *insn)
 {
   rtx pat = PATTERN (insn);
 
@@ -1229,7 +1230,7 @@ swap_rtx_condition (rtx insn)
    set up.  */
 
 static void
-compare_for_stack_reg (rtx insn, stack_ptr regstack, rtx pat_src)
+compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat_src)
 {
   rtx *src1, *src2;
   rtx src1_note, src2_note;
@@ -1338,7 +1339,7 @@ subst_stack_regs_in_debug_insn (rtx *loc, void *data)
    the REGs in it, reset the debug insn.  */
 
 static void
-subst_all_stack_regs_in_debug_insn (rtx insn, struct stack_def *regstack)
+subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack)
 {
   int ret = for_each_rtx (&INSN_VAR_LOCATION_LOC (insn),
 			  subst_stack_regs_in_debug_insn,
@@ -1355,7 +1356,7 @@ subst_all_stack_regs_in_debug_insn (rtx insn, struct stack_def *regstack)
    was deleted in the process.  */
 
 static bool
-subst_stack_regs_pat (rtx insn, stack_ptr regstack, rtx pat)
+subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat)
 {
   rtx *dest, *src;
   bool control_flow_insn_deleted = false;
@@ -1432,7 +1433,7 @@ subst_stack_regs_pat (rtx insn, stack_ptr regstack, rtx pat)
 			if (get_hard_regnum (regstack, u) == -1)
 			  {
 			    rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
-			    rtx insn2 = emit_insn_before (pat2, insn);
+			    rtx_insn *insn2 = emit_insn_before (pat2, insn);
 			    control_flow_insn_deleted
 			      |= move_nan_for_stack_reg (insn2, regstack, u);
 			  }
@@ -1568,14 +1569,14 @@ subst_stack_regs_pat (rtx insn, stack_ptr regstack, rtx pat)
 		if (src1_hard_regnum == -1)
 		  {
 		    rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1);
-		    rtx insn2 = emit_insn_before (pat2, insn);
+		    rtx_insn *insn2 = emit_insn_before (pat2, insn);
 		    control_flow_insn_deleted
 		      |= move_nan_for_stack_reg (insn2, regstack, *src1);
 		  }
 		if (src2_hard_regnum == -1)
 		  {
 		    rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2);
-		    rtx insn2 = emit_insn_before (pat2, insn);
+		    rtx_insn *insn2 = emit_insn_before (pat2, insn);
 		    control_flow_insn_deleted
 		      |= move_nan_for_stack_reg (insn2, regstack, *src2);
 		  }
@@ -2003,7 +2004,7 @@ subst_stack_regs_pat (rtx insn, stack_ptr regstack, rtx pat)
    requirements, since record_asm_stack_regs removes any problem asm.  */
 
 static void
-subst_asm_stack_regs (rtx insn, stack_ptr regstack)
+subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack)
 {
   rtx body = PATTERN (insn);
   int alt;
@@ -2288,7 +2289,7 @@ subst_asm_stack_regs (rtx insn, stack_ptr regstack)
    a control flow insn was deleted in the process.  */
 
 static bool
-subst_stack_regs (rtx insn, stack_ptr regstack)
+subst_stack_regs (rtx_insn *insn, stack_ptr regstack)
 {
   rtx *note_link, note;
   bool control_flow_insn_deleted = false;
@@ -2400,7 +2401,8 @@ subst_stack_regs (rtx insn, stack_ptr regstack)
    is no longer needed once this has executed.  */
 
 static void
-change_stack (rtx insn, stack_ptr old, stack_ptr new_stack, enum emit_where where)
+change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack,
+	      enum emit_where where)
 {
   int reg;
   int update_end = 0;
@@ -2899,7 +2901,7 @@ convert_regs_1 (basic_block block)
   struct stack_def regstack;
   block_info bi = BLOCK_INFO (block);
   int reg;
-  rtx insn, next;
+  rtx_insn *insn, *next;
   bool control_flow_insn_deleted = false;
   bool cfg_altered = false;
   int debug_insns_with_starting_stack = 0;
-- 
1.8.5.3

[PATCH 231/236] Make insn_addresses_new require an rtx_insn

[David Malcolm]

This affects the INSN_ADDRESSES_NEW macro, which is defined in terms of
insn_addresses_new.

gcc/
	* insn-addr.h (insn_addresses_new): Strengthen param "insn" from
	rtx to rtx_insn *.
	* config/s390/s390.c (s390_split_branches): Eliminate top-level
	local rtx "tmp", in favor of new local rtx "mem" and rtx_insn *
	"set_insn".
	(s390_mainpool_finish): In three places, split out a local rtx
	"insn" into a local rtx - "set" or "pat" - and a rtx_insn *
	"insn".  Strengthen local "pool_end" from rtx to rtx_code_label *
	 and split another local rtx "insn" out into rtx "pat" and
	rtx_insn * "insn".
	* config/sh/sh.c (output_branchy_insn): Rather than working
	directly on operands[9], introduce local rtx_code_label *
	variables named "lab" in two places, working on them, and then
	assigning them to operands[9], so that the intervening operations
	are known by the type system to be on insns.
---
 gcc/config/s390/s390.c | 30 +++++++++++++++---------------
 gcc/config/sh/sh.c     | 14 ++++++++------
 gcc/insn-addr.h        |  2 +-
 3 files changed, 24 insertions(+), 22 deletions(-)

diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 027a399..b75652d 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -6030,7 +6030,7 @@ s390_split_branches (void)
   rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
   int new_literal = 0, ret;
   rtx_insn *insn;
-  rtx pat, tmp, target;
+  rtx pat, target;
   rtx *label;
 
   /* We need correct insn addresses.  */
@@ -6076,10 +6076,10 @@ s390_split_branches (void)
       if (!flag_pic)
 	{
 	  new_literal = 1;
-	  tmp = force_const_mem (Pmode, *label);
-	  tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
-	  INSN_ADDRESSES_NEW (tmp, -1);
-	  annotate_constant_pool_refs (&PATTERN (tmp));
+	  rtx mem = force_const_mem (Pmode, *label);
+	  rtx_insn *set_insn = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, mem), insn);
+	  INSN_ADDRESSES_NEW (set_insn, -1);
+	  annotate_constant_pool_refs (&PATTERN (set_insn));
 
 	  target = temp_reg;
 	}
@@ -6090,9 +6090,9 @@ s390_split_branches (void)
 				   UNSPEC_LTREL_OFFSET);
 	  target = gen_rtx_CONST (Pmode, target);
 	  target = force_const_mem (Pmode, target);
-	  tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
-	  INSN_ADDRESSES_NEW (tmp, -1);
-	  annotate_constant_pool_refs (&PATTERN (tmp));
+	  rtx_insn *set_insn = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
+	  INSN_ADDRESSES_NEW (set_insn, -1);
+	  annotate_constant_pool_refs (&PATTERN (set_insn));
 
           target = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XEXP (target, 0),
 							cfun->machine->base_reg),
@@ -6759,8 +6759,8 @@ s390_mainpool_finish (struct constant_pool *pool)
      located in the .rodata section, so we emit it after the function.  */
   if (TARGET_CPU_ZARCH)
     {
-      rtx insn = gen_main_base_64 (base_reg, pool->label);
-      insn = emit_insn_after (insn, pool->pool_insn);
+      rtx set = gen_main_base_64 (base_reg, pool->label);
+      rtx_insn *insn = emit_insn_after (set, pool->pool_insn);
       INSN_ADDRESSES_NEW (insn, -1);
       remove_insn (pool->pool_insn);
 
@@ -6777,8 +6777,8 @@ s390_mainpool_finish (struct constant_pool *pool)
   else if (INSN_ADDRESSES (INSN_UID (pool->emit_pool_after))
 	   + pool->size + 8 /* alignment slop */ < 4096)
     {
-      rtx insn = gen_main_base_31_small (base_reg, pool->label);
-      insn = emit_insn_after (insn, pool->pool_insn);
+      rtx set = gen_main_base_31_small (base_reg, pool->label);
+      rtx_insn *insn = emit_insn_after (set, pool->pool_insn);
       INSN_ADDRESSES_NEW (insn, -1);
       remove_insn (pool->pool_insn);
 
@@ -6800,10 +6800,10 @@ s390_mainpool_finish (struct constant_pool *pool)
      over it, setting up the pool register at the same time.  */
   else
     {
-      rtx pool_end = gen_label_rtx ();
+      rtx_code_label *pool_end = gen_label_rtx ();
 
-      rtx insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
-      insn = emit_jump_insn_after (insn, pool->pool_insn);
+      rtx pat = gen_main_base_31_large (base_reg, pool->label, pool_end);
+      rtx_insn *insn = emit_jump_insn_after (pat, pool->pool_insn);
       JUMP_LABEL (insn) = pool_end;
       INSN_ADDRESSES_NEW (insn, -1);
       remove_insn (pool->pool_insn);
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index f7f6e70..56c319a 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -2849,11 +2849,12 @@ output_branchy_insn (enum rtx_code code, const char *templ,
       if (GET_CODE (src) == IF_THEN_ELSE && GET_CODE (XEXP (src, 0)) != code)
 	{
 	  /* Following branch not taken */
-	  operands[9] = gen_label_rtx ();
-	  emit_label_after (operands[9], next_insn);
-	  INSN_ADDRESSES_NEW (operands[9],
+	  rtx_code_label *lab = gen_label_rtx ();
+	  emit_label_after (lab, next_insn);
+	  INSN_ADDRESSES_NEW (lab,
 			      INSN_ADDRESSES (INSN_UID (next_insn))
 			      + get_attr_length (next_insn));
+	  operands[9] = lab;
 	  return templ;
 	}
       else
@@ -2870,11 +2871,12 @@ output_branchy_insn (enum rtx_code code, const char *templ,
 	    }
 	}
     }
-  operands[9] = gen_label_rtx ();
-  emit_label_after (operands[9], insn);
-  INSN_ADDRESSES_NEW (operands[9],
+  rtx_code_label *lab = gen_label_rtx ();
+  emit_label_after (lab, insn);
+  INSN_ADDRESSES_NEW (lab,
 		      INSN_ADDRESSES (INSN_UID (insn))
 		      + get_attr_length (insn));
+  operands[9] = lab;
   return templ;
 }
 
diff --git a/gcc/insn-addr.h b/gcc/insn-addr.h
index aec09fd..e255ac4 100644
--- a/gcc/insn-addr.h
+++ b/gcc/insn-addr.h
@@ -38,7 +38,7 @@ extern int insn_current_address;
 #define INSN_ADDRESSES_SIZE() (insn_addresses_.length ())
 
 static inline void
-insn_addresses_new (rtx insn, int insn_addr)
+insn_addresses_new (rtx_insn *insn, int insn_addr)
 {
   unsigned insn_uid = INSN_UID ((insn));
 
-- 
1.8.5.3

[PATCH 218/236] Use rtx subclasses in more places in reorg.c

[David Malcolm]

Simplify and clarify reorg.c in various ways by using rtx subclasses.

For example, make it explicit within the type system that delay lists are
INSN_LIST chains.

gcc/
	* reorg.c (skip_consecutive_labels): Strengthen return type, param
	and local "insn" from rtx to rtx_insn *.
	(unfilled_slots_base): Strengthen type from rtx * to rtx_insn **.
	(unfilled_slots_next): Likewise.
	(function_return_label): Strengthen from rtx to rtx_code_label *.
	(function_simple_return_label): Likewise.
	(first_active_target_insn): Strengthen return type and param from
	rtx to rtx_insn *.
	(find_end_label): Strengthen return type from rtx to
	rtx_code_label *; strengthen locals as appropriate.
	(emit_delay_sequence): Strengthen return type, param "insn" and
	local "seq_insn" from rtx to rtx_insn *.  Strengthen param "list"
	and local "li" from rtx to rtx_insn_list *, using methods of
	rtx_insn_list for clarity and typesafety.
	(add_to_delay_list): Strengthen return type and param "insn" from
	rtx to rtx_insn *.  Strengthen param "delay_list" from rtx to
	rtx_insn_list * and use methods of rtx_insn_list.
	(delete_from_delay_slot): Strengthen return type, param "insn",
	locals "trial", "seq_insn", "prev" from rtx to rtx_insn *.
	Strengthen local "seq" from rtx to rtx_sequence *, and local
	"delay_list" from rtx to rtx_insn_list *, using methods of
	rtx_sequence for clarity and type-safety.
	(steal_delay_list_from_target): Strengthen return type, param
	"delay_list" and local "new_delay_list" from rtx to
	rtx_insn_list *.  Strengthen param "seq" from rtx to
	rtx_sequence *.  Strengthen param "pnew_thread" from rtx * to
	rtx_insn **.
	Split out local "temp" into multiple more-tightly scoped locals:
	sometimes an rtx_insn_list *, and once a rtx_insn *.  Use methods
	of rtx_insn_list and rtx_sequence for clarity and typesafety.
	Strengthen locals named "trial" from rtx to rtx_insn *.
	(steal_delay_list_from_fallthrough): Strengthen return type and
	param "delay_list" from rtx to rtx_insn_list *.  Strengthen param
	"seq" from rtx to rtx_sequence *.  Use methods of rtx_sequence.
	Strengthen local "trial" from rtx to rtx_insn *.
	(try_merge_delay_insns): Strength local "merged_insns" from rtx
	to rtx_insn_list * and use its methods.  Strengthen local "pat"
	from rtx to rtx_sequence * and use its methods.  Strengthen locals
	"dtrial" and "new_rtx" from rtx to rtx_insn *.
	(get_label_before): Strengthen return type and local "label" from
	rtx to rtx_insn *.
	(fill_simple_delay_slots): Likewise for locals "insn", "trial",
	"next_trial", "next", prev".  Strengthen local "delay_list" from
	rtx to rtx_insn_list *  Strengthen local "tmp" from rtx * to
	rtx_insn **.
	(follow_jumps): Strengthen return type, param "label" and locals
	"insn", "next", "value", "this_label" from rtx to rtx_insn *.
	(fill_slots_from_thread): Strengthen return type, param
	"delay_list" from rtx to rtx_insn_list *.  Strengthen params
	"insn", "thread", "opposite_thread" and locals "new_thread",
	"trial", "temp", "ninsn" from rtx to rtx_insn *.  Introduce local
	"sequence" from a checked cast to rtx_sequence so that we can call
	steal_delay_list_from_target and steal_delay_list_from_fallthrough
	with an rtx_sequence *.
	(fill_eager_delay_slots): Strengthen locals "insn", "target_label",
	"insn_at_target", "fallthrough_insn" from rtx to rtx_insn *.
	Strengthen local "delay_list" from rtx to rtx_insn_list *.
	(relax_delay_slots): Strengthen param "first" and locals "insn",
	"next", "trial", "delay_insn", "target_label" from rtx to
	rtx_insn *.  Strengthen local "pat" from rtx to rtx_sequence *.
	Introduce a local "trial_seq" for PATTERN (trial) of type
	rtx_sequence *, in both cases using methods of rtx_sequence.
	(dbr_schedule): Strengthen param "first" and locals "insn",
	"next", "epilogue_insn" from rtx to rtx_insn *.
---
 gcc/reorg.c | 289 +++++++++++++++++++++++++++++++-----------------------------
 1 file changed, 151 insertions(+), 138 deletions(-)

diff --git a/gcc/reorg.c b/gcc/reorg.c
index 3894863..bd9d27d 100644
--- a/gcc/reorg.c
+++ b/gcc/reorg.c
@@ -142,10 +142,10 @@ along with GCC; see the file COPYING3.  If not see
 /* Return the last label to mark the same position as LABEL.  Return LABEL
    itself if it is null or any return rtx.  */
 
-static rtx
-skip_consecutive_labels (rtx label)
+static rtx_insn *
+skip_consecutive_labels (rtx_insn *label)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (label && ANY_RETURN_P (label))
     return label;
@@ -184,16 +184,16 @@ static rtx *unfilled_firstobj;
    should be recomputed at each use.  */
 
 #define unfilled_slots_base	\
-  ((rtx *) obstack_base (&unfilled_slots_obstack))
+  ((rtx_insn **) obstack_base (&unfilled_slots_obstack))
 
 #define unfilled_slots_next	\
-  ((rtx *) obstack_next_free (&unfilled_slots_obstack))
+  ((rtx_insn **) obstack_next_free (&unfilled_slots_obstack))
 
 /* Points to the label before the end of the function, or before a
    return insn.  */
-static rtx function_return_label;
+static rtx_code_label *function_return_label;
 /* Likewise for a simple_return.  */
-static rtx function_simple_return_label;
+static rtx_code_label *function_simple_return_label;
 
 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
    not always monotonically increase.  */
@@ -206,10 +206,10 @@ static int stop_search_p (rtx, int);
 static int resource_conflicts_p (struct resources *, struct resources *);
 static int insn_references_resource_p (rtx, struct resources *, bool);
 static int insn_sets_resource_p (rtx, struct resources *, bool);
-static rtx find_end_label (rtx);
-static rtx emit_delay_sequence (rtx, rtx, int);
-static rtx add_to_delay_list (rtx, rtx);
-static rtx delete_from_delay_slot (rtx);
+static rtx_code_label *find_end_label (rtx);
+static rtx_insn *emit_delay_sequence (rtx_insn *, rtx_insn_list *, int);
+static rtx_insn_list *add_to_delay_list (rtx_insn *, rtx_insn_list *);
+static rtx_insn *delete_from_delay_slot (rtx_insn *);
 static void delete_scheduled_jump (rtx);
 static void note_delay_statistics (int, int);
 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
@@ -222,16 +222,21 @@ static int condition_dominates_p (rtx, rtx);
 static int redirect_with_delay_slots_safe_p (rtx, rtx, rtx);
 static int redirect_with_delay_list_safe_p (rtx, rtx, rtx);
 static int check_annul_list_true_false (int, rtx);
-static rtx steal_delay_list_from_target (rtx, rtx, rtx, rtx,
-					 struct resources *,
-					 struct resources *,
-					 struct resources *,
-					 int, int *, int *, rtx *);
-static rtx steal_delay_list_from_fallthrough (rtx, rtx, rtx, rtx,
-					      struct resources *,
-					      struct resources *,
-					      struct resources *,
-					      int, int *, int *);
+static rtx_insn_list *steal_delay_list_from_target (rtx, rtx,
+						    rtx_sequence *,
+						    rtx_insn_list *,
+						    struct resources *,
+						    struct resources *,
+						    struct resources *,
+						    int, int *, int *,
+						    rtx_insn **);
+static rtx_insn_list *steal_delay_list_from_fallthrough (rtx, rtx,
+							 rtx_sequence *,
+							 rtx_insn_list *,
+							 struct resources *,
+							 struct resources *,
+							 struct resources *,
+							 int, int *, int *);
 static void try_merge_delay_insns (rtx, rtx);
 static rtx redundant_insn (rtx, rtx, rtx);
 static int own_thread_p (rtx, rtx, int);
@@ -241,18 +246,19 @@ static void update_reg_dead_notes (rtx, rtx);
 static void fix_reg_dead_note (rtx, rtx);
 static void update_reg_unused_notes (rtx, rtx);
 static void fill_simple_delay_slots (int);
-static rtx fill_slots_from_thread (rtx, rtx, rtx, rtx,
-				   int, int, int, int,
-				   int *, rtx);
+static rtx_insn_list *fill_slots_from_thread (rtx_insn *, rtx,
+					      rtx_insn *, rtx_insn *,
+					      int, int, int, int,
+					      int *, rtx_insn_list *);
 static void fill_eager_delay_slots (void);
-static void relax_delay_slots (rtx);
+static void relax_delay_slots (rtx_insn *);
 static void make_return_insns (rtx);
 \f
 /* A wrapper around next_active_insn which takes care to return ret_rtx
    unchanged.  */
 
-static rtx
-first_active_target_insn (rtx insn)
+static rtx_insn *
+first_active_target_insn (rtx_insn *insn)
 {
   if (ANY_RETURN_P (insn))
     return insn;
@@ -382,11 +388,11 @@ insn_sets_resource_p (rtx insn, struct resources *res,
    KIND is either simple_return_rtx or ret_rtx, indicating which type of
    return we're looking for.  */
 
-static rtx
+static rtx_code_label *
 find_end_label (rtx kind)
 {
-  rtx insn;
-  rtx *plabel;
+  rtx_insn *insn;
+  rtx_code_label **plabel;
 
   if (kind == ret_rtx)
     plabel = &function_return_label;
@@ -418,8 +424,8 @@ find_end_label (rtx kind)
       && JUMP_P (PREV_INSN (insn))
       && PATTERN (PREV_INSN (insn)) == kind)
     {
-      rtx temp = PREV_INSN (PREV_INSN (insn));
-      rtx label = gen_label_rtx ();
+      rtx_insn *temp = PREV_INSN (PREV_INSN (insn));
+      rtx_code_label *label = gen_label_rtx ();
       LABEL_NUSES (label) = 0;
 
       /* Put the label before any USE insns that may precede the RETURN
@@ -432,10 +438,10 @@ find_end_label (rtx kind)
     }
 
   else if (LABEL_P (insn))
-    *plabel = insn;
+    *plabel = as_a <rtx_code_label *> (insn);
   else
     {
-      rtx label = gen_label_rtx ();
+      rtx_code_label *label = gen_label_rtx ();
       LABEL_NUSES (label) = 0;
       /* If the basic block reorder pass moves the return insn to
 	 some other place try to locate it again and put our
@@ -465,7 +471,7 @@ find_end_label (rtx kind)
 	       emit the label just before it.  Since we already have
 	       an epilogue and cannot emit a new RETURN, we cannot
 	       emit the label at all.  */
-	    return NULL_RTX;
+	    return NULL;
 #endif /* HAVE_epilogue */
 
 	  /* Otherwise, make a new label and emit a RETURN and BARRIER,
@@ -497,15 +503,15 @@ find_end_label (rtx kind)
 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
    the pattern of INSN with the SEQUENCE.
 
-   Returns the SEQUENCE that replaces INSN.  */
+   Returns the insn containing the SEQUENCE that replaces INSN.  */
 
-static rtx
-emit_delay_sequence (rtx insn, rtx list, int length)
+static rtx_insn *
+emit_delay_sequence (rtx_insn *insn, rtx_insn_list *list, int length)
 {
   /* Allocate the rtvec to hold the insns and the SEQUENCE.  */
   rtvec seqv = rtvec_alloc (length + 1);
   rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
-  rtx seq_insn = make_insn_raw (seq);
+  rtx_insn *seq_insn = make_insn_raw (seq);
 
   /* If DELAY_INSN has a location, use it for SEQ_INSN.  If DELAY_INSN does
      not have a location, but one of the delayed insns does, we pick up a
@@ -522,9 +528,9 @@ emit_delay_sequence (rtx insn, rtx list, int length)
   int i = 1;
   start_sequence ();
   XVECEXP (seq, 0, 0) = emit_insn (insn);
-  for (rtx li = list; li; li = XEXP (li, 1), i++)
+  for (rtx_insn_list *li = list; li; li = li->next (), i++)
     {
-      rtx tem = XEXP (li, 0);
+      rtx_insn *tem = li->insn ();
       rtx note, next;
 
       /* Show that this copy of the insn isn't deleted.  */
@@ -576,8 +582,8 @@ emit_delay_sequence (rtx insn, rtx list, int length)
 /* Add INSN to DELAY_LIST and return the head of the new list.  The list must
    be in the order in which the insns are to be executed.  */
 
-static rtx
-add_to_delay_list (rtx insn, rtx delay_list)
+static rtx_insn_list *
+add_to_delay_list (rtx_insn *insn, rtx_insn_list *delay_list)
 {
   /* If we have an empty list, just make a new list element.  If
      INSN has its block number recorded, clear it since we may
@@ -591,7 +597,7 @@ add_to_delay_list (rtx insn, rtx delay_list)
 
   /* Otherwise this must be an INSN_LIST.  Add INSN to the end of the
      list.  */
-  XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
+  XEXP (delay_list, 1) = add_to_delay_list (insn, delay_list->next ());
 
   return delay_list;
 }
@@ -599,11 +605,12 @@ add_to_delay_list (rtx insn, rtx delay_list)
 /* Delete INSN from the delay slot of the insn that it is in, which may
    produce an insn with no delay slots.  Return the new insn.  */
 
-static rtx
-delete_from_delay_slot (rtx insn)
+static rtx_insn *
+delete_from_delay_slot (rtx_insn *insn)
 {
-  rtx trial, seq_insn, seq, prev;
-  rtx delay_list = 0;
+  rtx_insn *trial, *seq_insn, *prev;
+  rtx_sequence *seq;
+  rtx_insn_list *delay_list = 0;
   int i;
   int had_barrier = 0;
 
@@ -617,22 +624,22 @@ delete_from_delay_slot (rtx insn)
     ;
 
   seq_insn = PREV_INSN (NEXT_INSN (trial));
-  seq = PATTERN (seq_insn);
+  seq = as_a <rtx_sequence *> (PATTERN (seq_insn));
 
   if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
     had_barrier = 1;
 
   /* Create a delay list consisting of all the insns other than the one
      we are deleting (unless we were the only one).  */
-  if (XVECLEN (seq, 0) > 2)
-    for (i = 1; i < XVECLEN (seq, 0); i++)
-      if (XVECEXP (seq, 0, i) != insn)
-	delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
+  if (seq->len () > 2)
+    for (i = 1; i < seq->len (); i++)
+      if (seq->insn (i) != insn)
+	delay_list = add_to_delay_list (seq->insn (i), delay_list);
 
   /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
      list, and rebuild the delay list if non-empty.  */
   prev = PREV_INSN (seq_insn);
-  trial = XVECEXP (seq, 0, 0);
+  trial = seq->insn (0);
   delete_related_insns (seq_insn);
   add_insn_after (trial, prev, NULL);
 
@@ -1077,18 +1084,17 @@ check_annul_list_true_false (int annul_true_p, rtx delay_list)
    PNEW_THREAD points to a location that is to receive the place at which
    execution should continue.  */
 
-static rtx
-steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
-			      rtx delay_list, struct resources *sets,
+static rtx_insn_list *
+steal_delay_list_from_target (rtx insn, rtx condition, rtx_sequence *seq,
+			      rtx_insn_list *delay_list, struct resources *sets,
 			      struct resources *needed,
 			      struct resources *other_needed,
 			      int slots_to_fill, int *pslots_filled,
-			      int *pannul_p, rtx *pnew_thread)
+			      int *pannul_p, rtx_insn **pnew_thread)
 {
-  rtx temp;
   int slots_remaining = slots_to_fill - *pslots_filled;
   int total_slots_filled = *pslots_filled;
-  rtx new_delay_list = 0;
+  rtx_insn_list *new_delay_list = 0;
   int must_annul = *pannul_p;
   int used_annul = 0;
   int i;
@@ -1112,32 +1118,32 @@ steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
      will effect the direction of the jump in the sequence.  */
 
   CLEAR_RESOURCE (&cc_set);
-  for (temp = delay_list; temp; temp = XEXP (temp, 1))
+  for (rtx_insn_list *temp = delay_list; temp; temp = temp->next ())
     {
-      rtx trial = XEXP (temp, 0);
+      rtx_insn *trial = temp->insn ();
 
       mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
-      if (insn_references_resource_p (XVECEXP (seq , 0, 0), &cc_set, false))
+      if (insn_references_resource_p (seq->insn (0), &cc_set, false))
 	return delay_list;
     }
 
   if (XVECLEN (seq, 0) - 1 > slots_remaining
-      || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0))
-      || ! single_set (XVECEXP (seq, 0, 0)))
+      || ! condition_dominates_p (condition, seq->insn (0))
+      || ! single_set (seq->insn (0)))
     return delay_list;
 
 #ifdef MD_CAN_REDIRECT_BRANCH
   /* On some targets, branches with delay slots can have a limited
      displacement.  Give the back end a chance to tell us we can't do
      this.  */
-  if (! MD_CAN_REDIRECT_BRANCH (insn, XVECEXP (seq, 0, 0)))
+  if (! MD_CAN_REDIRECT_BRANCH (insn, seq->insn (0)))
     return delay_list;
 #endif
 
   redundant = XALLOCAVEC (bool, XVECLEN (seq, 0));
-  for (i = 1; i < XVECLEN (seq, 0); i++)
+  for (i = 1; i < seq->len (); i++)
     {
-      rtx trial = XVECEXP (seq, 0, i);
+      rtx_insn *trial = seq->insn (i);
       int flags;
 
       if (insn_references_resource_p (trial, sets, false)
@@ -1150,7 +1156,7 @@ steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
 #endif
 	  /* If TRIAL is from the fallthrough code of an annulled branch insn
 	     in SEQ, we cannot use it.  */
-	  || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
+	  || (INSN_ANNULLED_BRANCH_P (seq->insn (0))
 	      && ! INSN_FROM_TARGET_P (trial)))
 	return delay_list;
 
@@ -1162,7 +1168,7 @@ steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
 
       /* We will end up re-vectoring this branch, so compute flags
 	 based on jumping to the new label.  */
-      flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
+      flags = get_jump_flags (insn, JUMP_LABEL (seq->insn (0)));
 
       if (! must_annul
 	  && ((condition == const_true_rtx
@@ -1178,7 +1184,7 @@ steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
 	{
 	  if (must_annul)
 	    used_annul = 1;
-	  temp = copy_delay_slot_insn (trial);
+	  rtx_insn *temp = copy_delay_slot_insn (trial);
 	  INSN_FROM_TARGET_P (temp) = 1;
 	  new_delay_list = add_to_delay_list (temp, new_delay_list);
 	  total_slots_filled++;
@@ -1197,7 +1203,7 @@ steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
       update_block (XVECEXP (seq, 0, i), insn);
 
   /* Show the place to which we will be branching.  */
-  *pnew_thread = first_active_target_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
+  *pnew_thread = first_active_target_insn (JUMP_LABEL_AS_INSN (seq->insn (0)));
 
   /* Add any new insns to the delay list and update the count of the
      number of slots filled.  */
@@ -1208,8 +1214,8 @@ steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
   if (delay_list == 0)
     return new_delay_list;
 
-  for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
-    delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
+  for (rtx_insn_list *temp = new_delay_list; temp; temp = temp->next ())
+    delay_list = add_to_delay_list (temp->insn (), delay_list);
 
   return delay_list;
 }
@@ -1219,9 +1225,10 @@ steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
    of SEQ is an unconditional branch.  In that case we steal its delay slot
    for INSN since unconditional branches are much easier to fill.  */
 
-static rtx
-steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx seq,
-				   rtx delay_list, struct resources *sets,
+static rtx_insn_list *
+steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx_sequence *seq,
+				   rtx_insn_list *delay_list,
+				   struct resources *sets,
 				   struct resources *needed,
 				   struct resources *other_needed,
 				   int slots_to_fill, int *pslots_filled,
@@ -1237,12 +1244,12 @@ steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx seq,
   /* We can't do anything if SEQ's delay insn isn't an
      unconditional branch.  */
 
-  if (! simplejump_or_return_p (XVECEXP (seq, 0, 0)))
+  if (! simplejump_or_return_p (seq->insn (0)))
     return delay_list;
 
-  for (i = 1; i < XVECLEN (seq, 0); i++)
+  for (i = 1; i < seq->len (); i++)
     {
-      rtx trial = XVECEXP (seq, 0, i);
+      rtx_insn *trial = seq->insn (i);
 
       /* If TRIAL sets CC0, stealing it will move it too far from the use
 	 of CC0.  */
@@ -1309,7 +1316,7 @@ try_merge_delay_insns (rtx insn, rtx thread)
   int num_slots = XVECLEN (PATTERN (insn), 0);
   rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
   struct resources set, needed;
-  rtx merged_insns = 0;
+  rtx_insn_list *merged_insns = 0;
   int i;
   int flags;
 
@@ -1391,16 +1398,16 @@ try_merge_delay_insns (rtx insn, rtx thread)
       && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
            && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
     {
-      rtx pat = PATTERN (trial);
+      rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (trial));
       rtx filled_insn = XVECEXP (pat, 0, 0);
 
       /* Account for resources set/needed by the filled insn.  */
       mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
       mark_referenced_resources (filled_insn, &needed, true);
 
-      for (i = 1; i < XVECLEN (pat, 0); i++)
+      for (i = 1; i < pat->len (); i++)
 	{
-	  rtx dtrial = XVECEXP (pat, 0, i);
+	  rtx_insn *dtrial = pat->insn (i);
 
 	  if (! insn_references_resource_p (dtrial, &set, true)
 	      && ! insn_sets_resource_p (dtrial, &set, true)
@@ -1413,7 +1420,7 @@ try_merge_delay_insns (rtx insn, rtx thread)
 	    {
 	      if (! annul_p)
 		{
-		  rtx new_rtx;
+		  rtx_insn *new_rtx;
 
 		  update_block (dtrial, thread);
 		  new_rtx = delete_from_delay_slot (dtrial);
@@ -1447,14 +1454,14 @@ try_merge_delay_insns (rtx insn, rtx thread)
      target.  */
   if (slot_number == num_slots && annul_p)
     {
-      for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
+      for (; merged_insns; merged_insns = merged_insns->next ())
 	{
 	  if (GET_MODE (merged_insns) == SImode)
 	    {
-	      rtx new_rtx;
+	      rtx_insn *new_rtx;
 
 	      update_block (XEXP (merged_insns, 0), thread);
-	      new_rtx = delete_from_delay_slot (XEXP (merged_insns, 0));
+	      new_rtx = delete_from_delay_slot (merged_insns->insn ());
 	      if (INSN_DELETED_P (thread))
 		thread = new_rtx;
 	    }
@@ -1876,10 +1883,10 @@ static vec <rtx> sibling_labels;
    typically the former target of the jump that will be redirected to
    the new label.  */
 
-static rtx
+static rtx_insn *
 get_label_before (rtx insn, rtx sibling)
 {
-  rtx label;
+  rtx_insn *label;
 
   /* Find an existing label at this point
      or make a new one if there is none.  */
@@ -1918,12 +1925,13 @@ get_label_before (rtx insn, rtx sibling)
 static void
 fill_simple_delay_slots (int non_jumps_p)
 {
-  rtx insn, pat, trial, next_trial;
+  rtx_insn *insn, *trial, *next_trial;
+  rtx pat;
   int i;
   int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
   struct resources needed, set;
   int slots_to_fill, slots_filled;
-  rtx delay_list;
+  rtx_insn_list *delay_list;
 
   for (i = 0; i < num_unfilled_slots; i++)
     {
@@ -1993,7 +2001,7 @@ fill_simple_delay_slots (int non_jumps_p)
 	  && no_labels_between_p (insn, trial)
 	  && ! can_throw_internal (trial))
 	{
-	  rtx *tmp;
+	  rtx_insn **tmp;
 	  slots_filled++;
 	  delay_list = add_to_delay_list (trial, delay_list);
 
@@ -2012,8 +2020,8 @@ fill_simple_delay_slots (int non_jumps_p)
 	  if (*tmp == trial)
 	    *tmp = 0;
 	  {
-	    rtx next = NEXT_INSN (trial);
-	    rtx prev = PREV_INSN (trial);
+	    rtx_insn *next = NEXT_INSN (trial);
+	    rtx_insn *prev = PREV_INSN (trial);
 	    if (prev)
 	      SET_NEXT_INSN (prev) = next;
 	    if (next)
@@ -2292,12 +2300,12 @@ fill_simple_delay_slots (int non_jumps_p)
    If the returned label is obtained by following a crossing jump,
    set *CROSSING to true, otherwise set it to false.  */
 
-static rtx
-follow_jumps (rtx label, rtx jump, bool *crossing)
+static rtx_insn *
+follow_jumps (rtx_insn *label, rtx jump, bool *crossing)
 {
-  rtx insn;
-  rtx next;
-  rtx value = label;
+  rtx_insn *insn;
+  rtx_insn *next;
+  rtx_insn *value = label;
   int depth;
 
   *crossing = false;
@@ -2314,7 +2322,7 @@ follow_jumps (rtx label, rtx jump, bool *crossing)
 	&& BARRIER_P (next));
        depth++)
     {
-      rtx this_label = JUMP_LABEL (insn);
+      rtx_insn *this_label = JUMP_LABEL_AS_INSN (insn);
 
       /* If we have found a cycle, make the insn jump to itself.  */
       if (this_label == label)
@@ -2362,15 +2370,16 @@ follow_jumps (rtx label, rtx jump, bool *crossing)
    case, we can only take insns from the head of the thread for our delay
    slot.  We then adjust the jump to point after the insns we have taken.  */
 
-static rtx
-fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
-			rtx opposite_thread, int likely, int thread_if_true,
+static rtx_insn_list *
+fill_slots_from_thread (rtx_insn *insn, rtx condition, rtx_insn *thread,
+			rtx_insn *opposite_thread, int likely,
+			int thread_if_true,
 			int own_thread, int slots_to_fill,
-			int *pslots_filled, rtx delay_list)
+			int *pslots_filled, rtx_insn_list *delay_list)
 {
-  rtx new_thread;
+  rtx_insn *new_thread;
   struct resources opposite_needed, set, needed;
-  rtx trial;
+  rtx_insn *trial;
   int lose = 0;
   int must_annul = 0;
   int flags;
@@ -2511,7 +2520,7 @@ fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
 		   : check_annul_list_true_false (1, delay_list)
 		     && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
 		{
-		  rtx temp;
+		  rtx_insn *temp;
 
 		  must_annul = 1;
 		winner:
@@ -2664,12 +2673,13 @@ fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
       && GET_CODE (PATTERN (trial)) == SEQUENCE
       && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
     {
+      rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (trial));
       /* If this is the `true' thread, we will want to follow the jump,
 	 so we can only do this if we have taken everything up to here.  */
       if (thread_if_true && trial == new_thread)
 	{
 	  delay_list
-	    = steal_delay_list_from_target (insn, condition, PATTERN (trial),
+	    = steal_delay_list_from_target (insn, condition, sequence,
 					    delay_list, &set, &needed,
 					    &opposite_needed, slots_to_fill,
 					    pslots_filled, &must_annul,
@@ -2682,7 +2692,7 @@ fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
       else if (! thread_if_true)
 	delay_list
 	  = steal_delay_list_from_fallthrough (insn, condition,
-					       PATTERN (trial),
+					       sequence,
 					       delay_list, &set, &needed,
 					       &opposite_needed, slots_to_fill,
 					       pslots_filled, &must_annul);
@@ -2724,7 +2734,7 @@ fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
 	{
 	  rtx other = XEXP (src, 1);
 	  rtx new_arith;
-	  rtx ninsn;
+	  rtx_insn *ninsn;
 
 	  /* If this is a constant adjustment, use the same code with
 	     the negated constant.  Otherwise, reverse the sense of the
@@ -2764,7 +2774,7 @@ fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
 	  if (thread_if_true)
 	    INSN_FROM_TARGET_P (ninsn) = 1;
 
-	  delay_list = add_to_delay_list (ninsn, NULL_RTX);
+	  delay_list = add_to_delay_list (ninsn, NULL);
 	  (*pslots_filled)++;
 	}
     }
@@ -2786,7 +2796,8 @@ fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
 	  && redirect_with_delay_list_safe_p (insn,
 					      JUMP_LABEL (new_thread),
 					      delay_list))
-	new_thread = follow_jumps (JUMP_LABEL (new_thread), insn, &crossing);
+	new_thread = follow_jumps (JUMP_LABEL_AS_INSN (new_thread), insn,
+				   &crossing);
 
       if (ANY_RETURN_P (new_thread))
 	label = find_end_label (new_thread);
@@ -2819,15 +2830,15 @@ fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
 static void
 fill_eager_delay_slots (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   int i;
   int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
 
   for (i = 0; i < num_unfilled_slots; i++)
     {
       rtx condition;
-      rtx target_label, insn_at_target, fallthrough_insn;
-      rtx delay_list = 0;
+      rtx_insn *target_label, *insn_at_target, *fallthrough_insn;
+      rtx_insn_list *delay_list = 0;
       int own_target;
       int own_fallthrough;
       int prediction, slots_to_fill, slots_filled;
@@ -2855,7 +2866,7 @@ fill_eager_delay_slots (void)
 	continue;
 
       slots_filled = 0;
-      target_label = JUMP_LABEL (insn);
+      target_label = JUMP_LABEL_AS_INSN (insn);
       condition = get_branch_condition (insn, target_label);
 
       if (condition == 0)
@@ -2899,7 +2910,7 @@ fill_eager_delay_slots (void)
 		 we might have found a redundant insn which we deleted
 		 from the thread that was filled.  So we have to recompute
 		 the next insn at the target.  */
-	      target_label = JUMP_LABEL (insn);
+	      target_label = JUMP_LABEL_AS_INSN (insn);
 	      insn_at_target = first_active_target_insn (target_label);
 
 	      delay_list
@@ -3137,10 +3148,11 @@ label_before_next_insn (rtx x, rtx scan_limit)
    threading.  */
 
 static void
-relax_delay_slots (rtx first)
+relax_delay_slots (rtx_insn *first)
 {
-  rtx insn, next, pat;
-  rtx trial, delay_insn, target_label;
+  rtx_insn *insn, *next;
+  rtx_sequence *pat;
+  rtx_insn *trial, *delay_insn, *target_label;
 
   /* Look at every JUMP_INSN and see if we can improve it.  */
   for (insn = first; insn; insn = next)
@@ -3155,7 +3167,7 @@ relax_delay_slots (rtx first)
 	 group of consecutive labels.  */
       if (JUMP_P (insn)
 	  && (condjump_p (insn) || condjump_in_parallel_p (insn))
-	  && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
+	  && !ANY_RETURN_P (target_label = JUMP_LABEL_AS_INSN (insn)))
 	{
 	  target_label
 	    = skip_consecutive_labels (follow_jumps (target_label, insn,
@@ -3230,7 +3242,7 @@ relax_delay_slots (rtx first)
 	  && 0 > mostly_true_jump (other))
 	{
 	  rtx other_target = JUMP_LABEL (other);
-	  target_label = JUMP_LABEL (insn);
+	  target_label = JUMP_LABEL_AS_INSN (insn);
 
 	  if (invert_jump (other, target_label, 0))
 	    reorg_redirect_jump (insn, other_target);
@@ -3240,16 +3252,16 @@ relax_delay_slots (rtx first)
       if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
 	continue;
 
-      pat = PATTERN (insn);
-      delay_insn = XVECEXP (pat, 0, 0);
+      pat = as_a <rtx_sequence *> (PATTERN (insn));
+      delay_insn = pat->insn (0);
 
       /* See if the first insn in the delay slot is redundant with some
 	 previous insn.  Remove it from the delay slot if so; then set up
 	 to reprocess this insn.  */
-      if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))
+      if (redundant_insn (pat->insn (1), delay_insn, 0))
 	{
-	  update_block (XVECEXP (pat, 0, 1), insn);
-	  delete_from_delay_slot (XVECEXP (pat, 0, 1));
+	  update_block (pat->insn (1), insn);
+	  delete_from_delay_slot (pat->insn (1));
 	  next = prev_active_insn (next);
 	  continue;
 	}
@@ -3302,7 +3314,7 @@ relax_delay_slots (rtx first)
 	  || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn)))
 	continue;
 
-      target_label = JUMP_LABEL (delay_insn);
+      target_label = JUMP_LABEL_AS_INSN (delay_insn);
       if (target_label && ANY_RETURN_P (target_label))
 	continue;
 
@@ -3360,7 +3372,8 @@ relax_delay_slots (rtx first)
 	  && simplejump_or_return_p (XVECEXP (PATTERN (trial), 0, 0))
 	  && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
 	{
-	  target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
+	  rtx_sequence *trial_seq = as_a <rtx_sequence *> (PATTERN (trial));
+	  target_label = JUMP_LABEL_AS_INSN (trial_seq->insn (0));
 	  if (ANY_RETURN_P (target_label))
 	    target_label = find_end_label (target_label);
 	  
@@ -3368,7 +3381,7 @@ relax_delay_slots (rtx first)
 	      && redirect_with_delay_slots_safe_p (delay_insn, target_label,
 						   insn))
 	    {
-	      update_block (XVECEXP (PATTERN (trial), 0, 1), insn);
+	      update_block (trial_seq->insn (1), insn);
 	      reorg_redirect_jump (delay_insn, target_label);
 	      next = insn;
 	      continue;
@@ -3429,7 +3442,7 @@ relax_delay_slots (rtx first)
 	  && label_before_next_insn (next, insn) == target_label
 	  && simplejump_p (insn)
 	  && XVECLEN (pat, 0) == 2
-	  && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
+	  && rtx_equal_p (PATTERN (next), PATTERN (pat->insn (1))))
 	{
 	  delete_related_insns (insn);
 	  continue;
@@ -3488,10 +3501,10 @@ relax_delay_slots (rtx first)
 
       /* If we own the thread opposite the way this insn branches, see if we
 	 can merge its delay slots with following insns.  */
-      if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
+      if (INSN_FROM_TARGET_P (pat->insn (1))
 	  && own_thread_p (NEXT_INSN (insn), 0, 1))
 	try_merge_delay_insns (insn, next);
-      else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
+      else if (! INSN_FROM_TARGET_P (pat->insn (1))
 	       && own_thread_p (target_label, target_label, 0))
 	try_merge_delay_insns (insn, next_active_insn (target_label));
 
@@ -3649,9 +3662,9 @@ make_return_insns (rtx first)
 /* Try to find insns to place in delay slots.  */
 
 static void
-dbr_schedule (rtx first)
+dbr_schedule (rtx_insn *first)
 {
-  rtx insn, next, epilogue_insn = 0;
+  rtx_insn *insn, *next, *epilogue_insn = 0;
   int i;
   bool need_return_insns;
 
@@ -3701,7 +3714,7 @@ dbr_schedule (rtx first)
       if (JUMP_P (insn)
 	  && (condjump_p (insn) || condjump_in_parallel_p (insn))
 	  && !ANY_RETURN_P (JUMP_LABEL (insn))
-	  && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
+	  && ((target = skip_consecutive_labels (JUMP_LABEL_AS_INSN (insn)))
 	      != JUMP_LABEL (insn)))
 	redirect_jump (insn, target, 1);
     }
@@ -3709,7 +3722,7 @@ dbr_schedule (rtx first)
   init_resource_info (epilogue_insn);
 
   /* Show we haven't computed an end-of-function label yet.  */
-  function_return_label = function_simple_return_label = NULL_RTX;
+  function_return_label = function_simple_return_label = NULL;
 
   /* Initialize the statistics for this function.  */
   memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
-- 
1.8.5.3

[PATCH 199/236] Introduce rtx_insn_list subclass of rtx_def

[David Malcolm]

gcc/
	* coretypes.h (class rtx_insn_list): Add forward declaration.
	* rtl.h (class rtx_insn_list): New subclass of rtx_def
	(is_a_helper <rtx_insn_list *>::test): New.
	(rtx_insn_list::next): New.
	(rtx_insn_list::insn): New.
	(gen_rtx_INSN_LIST): Add prototype.
	* emit-rtl.c (gen_rtx_INSN_LIST): New.
	* gengenrtl.c (special_rtx): Add INSN_LIST.
---
 gcc/coretypes.h |  1 +
 gcc/emit-rtl.c  |  7 +++++++
 gcc/gengenrtl.c |  3 ++-
 gcc/rtl.h       | 45 +++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 55 insertions(+), 1 deletion(-)

diff --git a/gcc/coretypes.h b/gcc/coretypes.h
index 17dc0e6..574d378 100644
--- a/gcc/coretypes.h
+++ b/gcc/coretypes.h
@@ -60,6 +60,7 @@ typedef const struct rtx_def *const_rtx;
    hierarchy, along with the relevant invariant.
    Where possible, keep this list in the same order as in rtl.def.  */
 class rtx_def;
+  class rtx_insn_list;           /* GET_CODE (X) == INSN_LIST */
   class rtx_insn;
     class rtx_real_insn;         /* INSN_P (X) */
       class rtx_debug_insn;      /* DEBUG_INSN_P (X) */
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index a343895..fef4faa 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -404,6 +404,13 @@ gen_raw_REG (enum machine_mode mode, int regno)
    functions do the raw handling.  If you add to this list, modify
    special_rtx in gengenrtl.c as well.  */
 
+rtx_insn_list *
+gen_rtx_INSN_LIST (enum machine_mode mode, rtx insn, rtx insn_list)
+{
+  return as_a <rtx_insn_list *> (gen_rtx_fmt_ue (INSN_LIST, mode, insn,
+						 insn_list));
+}
+
 rtx
 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
 {
diff --git a/gcc/gengenrtl.c b/gcc/gengenrtl.c
index 550efb8..cd29341 100644
--- a/gcc/gengenrtl.c
+++ b/gcc/gengenrtl.c
@@ -123,7 +123,8 @@ special_format (const char *fmt)
 static int
 special_rtx (int idx)
 {
-  return (strcmp (defs[idx].enumname, "CONST_INT") == 0
+  return (strcmp (defs[idx].enumname, "INSN_LIST") == 0
+	  || strcmp (defs[idx].enumname, "CONST_INT") == 0
 	  || strcmp (defs[idx].enumname, "REG") == 0
 	  || strcmp (defs[idx].enumname, "SUBREG") == 0
 	  || strcmp (defs[idx].enumname, "MEM") == 0
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 9069ea7..1440897 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -402,6 +402,35 @@ struct GTY((desc("0"), tag("0"),
   } GTY ((special ("rtx_def"), desc ("GET_CODE (&%0)"))) u;
 };
 
+class GTY(()) rtx_insn_list : public rtx_def
+{
+  /* No extra fields, but adds invariant: (GET_CODE (X) == INSN_LIST).
+
+     This is an instance of:
+
+       DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA)
+
+     i.e. a node for constructing singly-linked lists of rtx_insn *, where
+     the list is "external" to the insn (as opposed to the doubly-linked
+     list embedded within rtx_insn itself).  */
+
+public:
+  /* Get next in list.  */
+  rtx_insn_list *next () const;
+
+  /* Get at the underlying instruction.  */
+  rtx_insn *insn () const;
+
+};
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_insn_list *>::test (rtx rt)
+{
+  return rt->code == INSN_LIST;
+}
+
 class GTY(()) rtx_insn : public rtx_def
 {
   /* No extra fields, but adds the invariant:
@@ -1187,6 +1216,21 @@ extern void rtl_check_failed_flag (const char *, const_rtx, const char *,
 
 #define XC2EXP(RTX, N, C1, C2)      (RTL_CHECKC2 (RTX, N, C1, C2).rt_rtx)
 \f
+
+/* Methods of rtx_insn_list.  */
+
+inline rtx_insn_list *rtx_insn_list::next () const
+{
+  rtx tmp = XEXP (this, 1);
+  return as_a_nullable <rtx_insn_list *> (tmp);
+}
+
+inline rtx_insn *rtx_insn_list::insn () const
+{
+  rtx tmp = XEXP (this, 0);
+  return as_a_nullable <rtx_insn *> (tmp);
+}
+
 /* ACCESS MACROS for particular fields of insns.  */
 
 /* Holds a unique number for each insn.
@@ -2925,6 +2969,7 @@ get_mem_attrs (const_rtx x)
    generation functions included above do the raw handling.  If you
    add to this list, modify special_rtx in gengenrtl.c as well.  */
 
+extern rtx_insn_list *gen_rtx_INSN_LIST (enum machine_mode, rtx, rtx);
 extern rtx gen_rtx_CONST_INT (enum machine_mode, HOST_WIDE_INT);
 extern rtx gen_rtx_CONST_VECTOR (enum machine_mode, rtvec);
 extern rtx gen_raw_REG (enum machine_mode, int);
-- 
1.8.5.3

Re: [PATCH 199/236] Introduce rtx_insn_list subclass of rtx_def

[Trevor Saunders]

On Wed, Aug 06, 2014 at 01:22:58PM -0400, David Malcolm wrote:
> +class GTY(()) rtx_insn_list : public rtx_def
> +{
> +  /* No extra fields, but adds invariant: (GET_CODE (X) == INSN_LIST).

some nice future work would be to see if these can stop being rtxen at
all and just have a insn and next pointer.

Trev

Re: [PATCH 199/236] Introduce rtx_insn_list subclass of rtx_def

[David Malcolm]

On Wed, 2014-08-06 at 21:29 -0400, Trevor Saunders wrote:
> On Wed, Aug 06, 2014 at 01:22:58PM -0400, David Malcolm wrote:
> > +class GTY(()) rtx_insn_list : public rtx_def
> > +{
> > +  /* No extra fields, but adds invariant: (GET_CODE (X) == INSN_LIST).
> 
> some nice future work would be to see if these can stop being rtxen at
> all and just have a insn and next pointer.

Or some other data structures; see
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00825.html
for an example I tried.  [I don't know if it's a *good* example
though :) ]

Re: [PATCH 199/236] Introduce rtx_insn_list subclass of rtx_def

[Jeff Law]

On 08/07/14 09:33, David Malcolm wrote:
> On Wed, 2014-08-06 at 21:29 -0400, Trevor Saunders wrote:
>> On Wed, Aug 06, 2014 at 01:22:58PM -0400, David Malcolm wrote:
>>> +class GTY(()) rtx_insn_list : public rtx_def
>>> +{
>>> +  /* No extra fields, but adds invariant: (GET_CODE (X) == INSN_LIST).
>>
>> some nice future work would be to see if these can stop being rtxen at
>> all and just have a insn and next pointer.
>
> Or some other data structures; see
> https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00825.html
> for an example I tried.  [I don't know if it's a *good* example
> though :) ]
I the case of forced_labels, I believe the only things we ever do are 
prepend to the list and iterate over the list performing some action on 
each item in the list.   Order on the list doesn't matter IIRC, nor do 
we ever do something like "give me element 3 in the list"  or "find this 
element in the list"

Thus from an efficiency standpoint I don't see a big win for either vec 
or EXPR_LIST over the other.  vec is probably better for iterating and 
access, but loses when we have to reallocate/copy the vector when we add 
elements to it.  Space efficiency is probably better for vec.

Where I think vec shines anyone with a basic background in standard C++ 
libraries is going to know what a vector is (or a forward_list if folks 
really didn't want to go with a vec implementation).

Old farts such as myself "just know" that EXPR_LIST is a forward list 
implemented using rtx nodes with the implied properties noted above. 
However, it's not something a "newbie" is going to just know -- thus 
they're going to have to dig a bit to come to those conclusions.

Changing to a vec or forward_list makes things clearer to someone 
casually reading the code and also carries to the reader some of those 
implied properties.  And *that* is the reason why I think changing 
EXPR_LIST and INSN_LIST to be standard containers is a good move.

The change for forced_labels looks quite reasonable to me and I'd look 
favorably upon submitting that as an RFA once the bootstrap and testing 
is done.

jeff

[PATCH 169/236] Strengthen haifa_sched_info callbacks and 3 scheduler hooks

[David Malcolm]

gcc/
	* target.def (reorder): Strengthen param "ready" of this DEFHOOK
	from rtx * to rtx_insn **.
	(reorder2): Likewise.
	(dependencies_evaluation_hook): Strengthen params "head", "tail"
	from rtx to rtx_insn *.

	* doc/tm.texi: Update mechanically for above change to target.def.

	* sched-int.h (note_list): Strengthen this variable from rtx to
	rtx_insn *.
	(remove_notes): Likewise for both params.
	(restore_other_notes): Likewise for return type and first param.
	(struct ready_list): Strengthen field "vec" from rtx * to
	rtx_insn **.
	(struct dep_replacement): Strenghten field "insn" from rtx to
	rtx_insn *.
	(struct deps_desc): Likewise for fields "last_debug_insn",
	"last_args_size".
	(struct haifa_sched_info): Likewise for callback field
	"can_schedule_ready_p"'s param, for first param of "new_ready"
	callback field, for both params of "rank" callback field, for
	first field of "print_insn" callback field (with a const), for
	both params of "contributes_to_priority" callback, for param
	of "insn_finishes_block_p" callback, for fields "prev_head",
	"next_tail", "head", "tail", for first param of "add_remove_insn"
	callback, for first param of "begin_schedule_ready" callback, for
	both params of "begin_move_insn" callback, and for second param
	of "advance_target_bb" callback.
	(add_dependence): Likewise for params 1 and 2.
	(sched_analyze): Likewise for params 2 and 3.
	(deps_analyze_insn): Likewise for param 2.
	(ready_element): Likewise for return type.
	(ready_lastpos): Strengthen return type from rtx * to rtx_insn **.
	(try_ready): Strenghten param from rtx to rtx_insn *.
	(sched_emit_insn): Likewise for return type.
	(record_delay_slot_pair): Likewise for params 1 and 2.
	(add_delay_dependencies): Likewise for param.
	(contributes_to_priority): Likewise for both params.
	(find_modifiable_mems): Likewise.

	* config/arm/arm.c (cortexa7_sched_reorder):  Strengthen param
	"ready" from rtx * to rtx_insn **.  Strengthen locals "insn",
	"first_older_only_insn" from rtx to rtx_insn *.
	(arm_sched_reorder):  Strengthen param "ready"  from rtx * to
	rtx_insn **.

	* config/c6x/c6x.c (struct c6x_sched_context): Strengthen field
	"last_scheduled_iter0" from rtx to rtx_insn *.
	(init_sched_state): Replace use of NULL_RTX with NULL for insn.
	(c6x_sched_reorder_1): Strengthen param "ready" and locals
	"e_ready", "insnp" from rtx * to rtx_insn **.  Strengthen local
	"insn" from rtx to rtx_insn *.
	(c6x_sched_reorder): Strengthen param "ready" from rtx * to
	rtx_insn **.
	(c6x_sched_reorder2): Strengthen param "ready" and locals
	"e_ready", "insnp" from rtx * to rtx_insn **. Strengthen local
	"insn" from rtx to rtx_insn *.
	(c6x_variable_issue):  Add a checked cast when assigning from insn
	to ss.last_scheduled_iter0.
	(split_delayed_branch): Strengthen param "insn" and local "i1"
	from rtx to rtx_insn *.
	(split_delayed_nonbranch): Likewise.
	(undo_split_delayed_nonbranch): Likewise for local "insn".
	(hwloop_optimize): Likewise for locals "seq", "insn", "prev",
	"entry_after", "end_packet", "head_insn", "tail_insn",
	"new_insns", "last_insn", "this_iter", "prev_stage_insn".
	Strengthen locals "orig_vec", "copies", "insn_copies" from rtx *
	to rtx_insn **.  Remove now-redundant checked cast on last_insn,
	but add a checked cast on loop->start_label.  Consolidate calls to
	avoid assigning result of gen_spkernel to "insn", now an
	rtx_insn *.

	* config/i386/i386.c (do_reorder_for_imul): Strengthen param
	"ready" from rtx * to rtx_insn **.  Strengthen local "insn" from
	rtx to rtx_insn *.
	(swap_top_of_ready_list): Strengthen param "ready" from rtx * to
	rtx_insn **.  Strengthen locals "top", "next" from rtx to
	rtx_insn *.
	(ix86_sched_reorder): Strengthen param "ready" from rtx * to
	rtx_insn **.  Strengthen local "insn" from rtx to rtx_insn *.
	(add_parameter_dependencies): Strengthen params "call", "head" and
	locals "insn", "last", "first_arg" from rtx to rtx_insn *.
	(avoid_func_arg_motion): Likewise for params "first_arg", "insn".
	(add_dependee_for_func_arg): Likewise for param "arg" and local
	"insn".
	(ix86_dependencies_evaluation_hook): Likewise for params "head",
	"tail" and locals "insn", "first_arg".

	* config/ia64/ia64.c (ia64_dependencies_evaluation_hook): Likewise
	for params "head", "tail" and locals "insn", "next", "next_tail".
	(ia64_dfa_sched_reorder): Strengthen param "ready" and locals
	"e_ready", "insnp" from rtx * to rtx_insn **. Strengthen locals
	"insn", "lowest", "highest" from rtx to rtx_insn *.
	(ia64_sched_reorder): Strengthen param "ready" from rtx * to
	rtx_insn **.
	(ia64_sched_reorder2): Likewise.

	* config/mep/mep.c (mep_find_ready_insn): Strengthen return type
	and local "insn" from rtx to rtx_insn *.  Strengthen param "ready"
	from rtx * to rtx_insn **.
	(mep_move_ready_insn): Strengthen param "ready" from rtx * to
	rtx_insn **.
	(mep_print_sched_insn): Strengthen param "insn" from rtx to
	rtx_insn *.
	(mep_sched_reorder): Strengthen param "ready" from rtx * to
	rtx_insn **.  Strengthen locals "core_insn", "cop_insn" from rtx
	to rtx_insn *.

	* config/mips/mips.c (mips_promote_ready): Strengthen param "ready"
	from rtx * to rtx_insn **.  Strengthen local "new_head" from rtx
	to rtx_insn *.
	(mips_maybe_swap_ready): Strengthen param "ready" from rtx * to
	rtx_insn **.  Strengthen local "temp" from rtx to rtx_insn *.
	(mips_macc_chains_reorder): Strengthen param "ready" from rtx * to
	rtx_insn **.
	(vr4130_reorder): Likewise.
	(mips_74k_agen_reorder): Likewise.  Strengthen local "insn" from
	rtx to rtx_insn *.
	(mips_sched_reorder_1): Strengthen param "ready" from rtx * to
	rtx_insn **.
	(mips_sched_reorder): Likewise.
	(mips_sched_reorder2): Likewise.

	* config/picochip/picochip.c (picochip_sched_reorder): Likewise.

	* config/rs6000/rs6000.c (rs6000_sched_reorder): Likewise.
	Strengthen local "tmp" from rtx to rtx_insn *.
	(rs6000_sched_reorder2): Likewise.

	* config/s390/s390.c (s390_z10_prevent_earlyload_conflicts):
	Likewise.  Update sizeof(rtx) to sizeof(rtx_insn *) in memmove.
	(s390_sched_reorder): Strengthen param "ready" from rtx * to
	rtx_insn **.  Strengthen local "tmp" from rtx to rtx_insn *.

	* config/sh/sh.c (rank_for_reorder): Strengthen locals "tmp",
	"tmp2" from rtx to rtx_insn *.
	(swap_reorder): Strengthen param "a" from rtx * to rtx_insn **.
	Strengthen local "insn" from rtx to rtx_insn *.
	(ready_reorder): Strengthen param "ready" from rtx * to
	rtx_insn **.  Update sizeof(rtx) to sizeof(rtx_insn *) in qsort.
	(sh_reorder):  Strengthen param "ready" from rtx * to rtx_insn **.
	(sh_reorder2): Likewise.

	* config/spu/spu.c (spu_sched_reorder): Likewise.  Strengthen
	local "insn" from rtx to rtx_insn *.

	* haifa-sched.c (note_list): Strengthen this variable from rtx to
	rtx_insn *.
	(scheduled_insns): Strengthen this variable from vec<rtx> to
	vec<rtx_insn *>.
	(set_modulo_params): Likewise for locals "i1", "i2".
	(record_delay_slot_pair): Likewise for params "i1", "i2".
	(add_delay_dependencies): Likewise for param "insn".
	(cond_clobbered_p): Likewise.
	(recompute_todo_spec): Likewise for local "prev".
	(last_scheduled_insn): Likewise for this variable.
	(nonscheduled_insns_begin): Likewise.
	(model_set_excess_costs): Strengthen param "insns" from rtx * to
	rtx_insn **.
	(rank_for_schedule): Strengthen locals "tmp", "tmp2" from rtx to
	rtx_insn *.
	(swap_sort): Strengthen param "a" from rtx * to rtx_insn **.
	Strengthen local "insn" from rtx to rtx_insn *.
	(queue_insn): Strengthen param "insn" from rtx to rtx_insn *.
	(ready_lastpos): Strengthen return type from rtx * to rtx_insn **.
	(ready_add): Strengthen param "insn" from rtx to rtx_insn *.
	(ready_remove_first): Likewise for return type and local "t".
	(ready_element): Likewise for return type.
	(ready_remove): Likewise for return type and local "t".
	(ready_sort): Strengthen local "first" from rtx * to rtx_insn **.
	(check_clobbered_conditions): Strengthen local "x" from rtx to
	rtx_insn *, adding a checked cast.
	(schedule_insn): Likewise for param "insn".
	(remove_notes): Likewise for params "head", "tail" and locals
	"next_tail", "insn", "next".
	(struct haifa_saved_data): Likewise for fields
	"last_scheduled_insn", "nonscheduled_insns_begin".
	(save_backtrack_point): Update for change to field "vec" of
	struct ready_list.
	(toggle_cancelled_flags): Strengthen local "first" from rtx * to
	rtx_insn **.
	(restore_last_backtrack_point): Likewise.  Strengthen local "insn"
	from rtx to rtx_insn *
	(resolve_dependencies): Strengthen param "insn" from rtx to
	rtx_insn *
	(restore_other_notes): Likewise for return type, for param "head"
	and local "note_head".
	(undo_all_replacements): Likewise for local "insn".
	(first_nonscheduled_insn): Likewise for return type and local "insn".
	(queue_to_ready): Likewise for local "insn", adding checked casts.
	(early_queue_to_ready): Likewise for local "insn".
	(debug_ready_list_1): Strengthen local "p" from rtx * to
	rtx_insn **.
	(move_insn): Strengthen param "insn" and local "note" from rtx to
	rtx_insn *
	(insn_finishes_cycle_p): Likewise for param "insn".
	(max_issue): Likewise for local "insn".
	(choose_ready): Likewise.  Strengthen param "insn_ptr" from rtx *
	to rtx_insn **.
	(commit_schedule): Strengthen param "prev_head" and local "insn"
	from rtx to rtx_insn *
	(prune_ready_list): Likewise for local "insn".
	(schedule_block): Likewise for locals "prev_head", "head", "tail",
	"skip_insn", "insn", "failed_insn", "x", adding a checked cast.
	(set_priorities): Likewise for local "prev_head".
	(try_ready): Likewise for param "next".
	(fix_tick_ready): Likewise.
	(change_queue_index): Likewise.
	(sched_extend_ready_list): Update for change to field "vec" of
	struct ready_list.
	(generate_recovery_code): Strengthen param "insn" from rtx to
	rtx_insn *.
	(begin_speculative_block): Likewise.
	(create_check_block_twin): Likewise for param "insn" and locals
	"label", "check", "twin".  Introduce local "check_pat" to avoid
	"check" being used as a plain rtx before being used as an insn.
	(fix_recovery_deps): Add a checked cast to rtx_insn * when
	extracting elements from ready_list.
	(sched_remove_insn): Strengthen param "insn" from rtx to
	rtx_insn *.
	(sched_emit_insn): Likewise for return type.
	(ready_remove_first_dispatch): Likewise for return type and local
	"insn".

	* hw-doloop.c (discover_loop): Add a checked cast to rtx_insn *.

	* modulo-sched.c (sms_print_insn): Strengthen from const_rtx to
	const rtx_insn *.

	* sched-deps.c (add_dependence): Strengthen params "con", "pro"
	from rtx to rtx_insn *.
	(add_dependence_list): Likewise for param "insn".  Add a checked
	cast.
	(add_dependence_list_and_free): Strengthen param "insn" from rtx
	to rtx_insn *.  Strengthen param "list_p" from rtx * to
	rtx_insn **.
	(chain_to_prev_insn): Strengthen param "insn" and locals
	"prec_nonnote", "i" from rtx to rtx_insn *.
	(flush_pending_lists): Likewise for param "insn".
	(cur_insn): Likewise for this variable.
	(haifa_start_insn): Add a checked cast.
	(note_dep): Strengthen param "e" from rtx to rtx_insn *.
	(sched_analyze_reg): Likewise for param "insn".
	(sched_analyze_1): Likewise.
	(sched_analyze_2): Likewise.  Add checked casts.
	(sched_analyze_insn): Likewise.  Also for local "prev".
	(deps_analyze_insn): Likewise for param "insn".
	(sched_analyze): Likewise for params "head", "tail" and local "insn".
	(add_dependence_1): Likewise for params "insn", "elem".
	(struct mem_inc_info): Likewise for fields "inc_insn", "mem_insn".
	(parse_add_or_inc): Likewise for param "insn".
	(find_inc): Likewise for local "inc_cand".
	(find_modifiable_mems): Likewise for params "head", "tail" and
	locals "insn", "next_tail".

	* sched-ebb.c (init_ready_list): Likewise for local "insn".
	(begin_schedule_ready): Likewise for param "insn".
	(begin_move_insn): Likewise for params "insn" and "last".
	(ebb_print_insn): Strengthen param "insn" from const_rtx to
	const rtx_insn *.
	(rank): Strengthen params "insn1", "insn2" from rtx to rtx_insn *.
	(ebb_contributes_to_priority): Likewise for params "next", "insn".
	(ebb_add_remove_insn): Likewise for param "insn".
	(advance_target_bb): Likewise.

	* sched-rgn.c (rgn_estimate_number_of_insns): Likewise for local
	"insn".
	(check_live): Likewise for param "insn".
	(init_ready_list): Likewise for local "insn".
	(can_schedule_ready_p): Likewise for param "insn".
	(begin_schedule_ready): Likewise.
	(new_ready): Likewise for param "next".
	(rgn_print_insn): Likewise for param "insn".
	(rgn_rank): Likewise for params "insn1", "insn2".
	(contributes_to_priority): Likewise for params "next", "insn".
	(rgn_insn_finishes_block_p): Likewise for param "insn".
	(add_branch_dependences): Likewise for params "head", "tail" and
	locals "insn", "last".
	(rgn_add_remove_insn): Likewise for param "insn".
	(advance_target_bb): Likewise.

	* sel-sched-dump.c (sel_print_insn): Strengthen param "insn" from
	const_rtx to const rtx_insn *.

	* sel-sched-dump.h (sel_print_insn): Likewise.

	* sel-sched-ir.c (advance_deps_context): Add a checked cast.
	(deps_init_id): Likewise.

	* sel-sched.c (convert_vec_av_set_to_ready): Likewise.
	(invoke_reorder_hooks): Strengthen local "arr" from rtx * to
	rtx_insn **.
---
 gcc/config/arm/arm.c           |  12 +--
 gcc/config/c6x/c6x.c           |  77 ++++++++-------
 gcc/config/i386/i386.c         |  39 ++++----
 gcc/config/ia64/ia64.c         |  34 +++----
 gcc/config/mep/mep.c           |  23 ++---
 gcc/config/mips/mips.c         |  22 ++---
 gcc/config/picochip/picochip.c |   4 +-
 gcc/config/rs6000/rs6000.c     |   9 +-
 gcc/config/s390/s390.c         |  10 +-
 gcc/config/sh/sh.c             |  24 ++---
 gcc/config/spu/spu.c           |   4 +-
 gcc/doc/tm.texi                |   6 +-
 gcc/haifa-sched.c              | 215 +++++++++++++++++++++--------------------
 gcc/hw-doloop.c                |   2 +-
 gcc/modulo-sched.c             |   2 +-
 gcc/sched-deps.c               |  84 ++++++++--------
 gcc/sched-ebb.c                |  30 +++---
 gcc/sched-int.h                |  60 ++++++------
 gcc/sched-rgn.c                |  44 ++++-----
 gcc/sel-sched-dump.c           |   2 +-
 gcc/sel-sched-dump.h           |   2 +-
 gcc/sel-sched-ir.c             |   4 +-
 gcc/sel-sched.c                |   4 +-
 gcc/target.def                 |   6 +-
 24 files changed, 365 insertions(+), 354 deletions(-)

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 646c479..36a9298 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -136,7 +136,7 @@ static void arm_output_function_prologue (FILE *, HOST_WIDE_INT);
 static int arm_comp_type_attributes (const_tree, const_tree);
 static void arm_set_default_type_attributes (tree);
 static int arm_adjust_cost (rtx, rtx, rtx, int);
-static int arm_sched_reorder (FILE *, int, rtx *, int *, int);
+static int arm_sched_reorder (FILE *, int, rtx_insn **, int *, int);
 static int optimal_immediate_sequence (enum rtx_code code,
 				       unsigned HOST_WIDE_INT val,
 				       struct four_ints *return_sequence);
@@ -11687,8 +11687,8 @@ cortexa7_younger (FILE *file, int verbose, rtx insn)
    instructions.  This heuristic may affect dual issue opportunities
    in the current cycle.  */
 static void
-cortexa7_sched_reorder (FILE *file, int verbose, rtx *ready, int *n_readyp,
-                        int clock)
+cortexa7_sched_reorder (FILE *file, int verbose, rtx_insn **ready,
+			int *n_readyp, int clock)
 {
   int i;
   int first_older_only = -1, first_younger = -1;
@@ -11705,7 +11705,7 @@ cortexa7_sched_reorder (FILE *file, int verbose, rtx *ready, int *n_readyp,
      older.  */
   for (i = *n_readyp - 1; i >= 0; i--)
     {
-      rtx insn = ready[i];
+      rtx_insn *insn = ready[i];
       if (cortexa7_older_only (insn))
         {
           first_older_only = i;
@@ -11740,7 +11740,7 @@ cortexa7_sched_reorder (FILE *file, int verbose, rtx *ready, int *n_readyp,
     fprintf (file, ";; cortexa7_sched_reorder insn %d before %d\n",
              INSN_UID(ready [first_older_only]),
              INSN_UID(ready [first_younger]));
-  rtx first_older_only_insn = ready [first_older_only];
+  rtx_insn *first_older_only_insn = ready [first_older_only];
   for (i = first_older_only; i < first_younger; i++)
     {
       ready[i] = ready[i+1];
@@ -11752,7 +11752,7 @@ cortexa7_sched_reorder (FILE *file, int verbose, rtx *ready, int *n_readyp,
 
 /* Implement TARGET_SCHED_REORDER. */
 static int
-arm_sched_reorder (FILE *file, int verbose, rtx *ready, int *n_readyp,
+arm_sched_reorder (FILE *file, int verbose, rtx_insn **ready, int *n_readyp,
                    int clock)
 {
   switch (arm_tune)
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index 38070c0..c8d7f0b 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -3614,7 +3614,7 @@ typedef struct c6x_sched_context
   /* The following variable value is the last issued insn.  */
   rtx last_scheduled_insn;
   /* The last issued insn that isn't a shadow of another.  */
-  rtx last_scheduled_iter0;
+  rtx_insn *last_scheduled_iter0;
 
   /* The following variable value is DFA state before issuing the
      first insn in the current clock cycle.  We do not use this member
@@ -3844,7 +3844,7 @@ static void
 init_sched_state (c6x_sched_context_t sc)
 {
   sc->last_scheduled_insn = NULL_RTX;
-  sc->last_scheduled_iter0 = NULL_RTX;
+  sc->last_scheduled_iter0 = NULL;
   sc->issued_this_cycle = 0;
   memset (sc->jump_cycles, 0, sizeof sc->jump_cycles);
   memset (sc->jump_cond, 0, sizeof sc->jump_cond);
@@ -4131,11 +4131,11 @@ c6x_registers_update (rtx insn)
    number of non-unsafe insns.  */
 
 static int
-c6x_sched_reorder_1 (rtx *ready, int *pn_ready, int clock_var)
+c6x_sched_reorder_1 (rtx_insn **ready, int *pn_ready, int clock_var)
 {
   int n_ready = *pn_ready;
-  rtx *e_ready = ready + n_ready;
-  rtx *insnp;
+  rtx_insn **e_ready = ready + n_ready;
+  rtx_insn **insnp;
   int first_jump;
 
   /* Keep track of conflicts due to a limit number of register accesses,
@@ -4144,7 +4144,7 @@ c6x_sched_reorder_1 (rtx *ready, int *pn_ready, int clock_var)
 
   for (insnp = ready; insnp < e_ready; insnp++)
     {
-      rtx insn = *insnp;
+      rtx_insn *insn = *insnp;
       int icode = recog_memoized (insn);
       bool is_asm = (icode < 0
 		     && (GET_CODE (PATTERN (insn)) == ASM_INPUT
@@ -4205,7 +4205,7 @@ c6x_sched_reorder_1 (rtx *ready, int *pn_ready, int clock_var)
 
       for (insnp = ready; insnp < e_ready; insnp++)
 	{
-	  rtx insn = *insnp;
+	  rtx_insn *insn = *insnp;
 	  int icode = recog_memoized (insn);
 	  bool is_asm = (icode < 0
 			 && (GET_CODE (PATTERN (insn)) == ASM_INPUT
@@ -4248,7 +4248,7 @@ c6x_sched_reorder_1 (rtx *ready, int *pn_ready, int clock_var)
 static int
 c6x_sched_reorder (FILE *dump ATTRIBUTE_UNUSED,
 		   int sched_verbose ATTRIBUTE_UNUSED,
-		   rtx *ready ATTRIBUTE_UNUSED,
+		   rtx_insn **ready ATTRIBUTE_UNUSED,
 		   int *pn_ready ATTRIBUTE_UNUSED, int clock_var)
 {
   ss.curr_sched_clock = clock_var;
@@ -4268,7 +4268,7 @@ c6x_sched_reorder (FILE *dump ATTRIBUTE_UNUSED,
 static int
 c6x_sched_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
 		    int sched_verbose ATTRIBUTE_UNUSED,
-		    rtx *ready ATTRIBUTE_UNUSED,
+		    rtx_insn **ready ATTRIBUTE_UNUSED,
 		    int *pn_ready ATTRIBUTE_UNUSED, int clock_var)
 {
   /* FIXME: the assembler rejects labels inside an execute packet.
@@ -4281,12 +4281,12 @@ c6x_sched_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
 	  && get_attr_type (ss.last_scheduled_insn) == TYPE_ATOMIC))
     {
       int n_ready = *pn_ready;
-      rtx *e_ready = ready + n_ready;
-      rtx *insnp;
+      rtx_insn **e_ready = ready + n_ready;
+      rtx_insn **insnp;
 
       for (insnp = ready; insnp < e_ready; insnp++)
 	{
-	  rtx insn = *insnp;
+	  rtx_insn *insn = *insnp;
 	  if (!shadow_p (insn))
 	    {
 	      memmove (ready + 1, ready, (insnp - ready) * sizeof (rtx));
@@ -4361,7 +4361,7 @@ c6x_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
 {
   ss.last_scheduled_insn = insn;
   if (INSN_UID (insn) < sploop_max_uid_iter0 && !JUMP_P (insn))
-    ss.last_scheduled_iter0 = insn;
+    ss.last_scheduled_iter0 = as_a <rtx_insn *> (insn);
   if (GET_CODE (PATTERN (insn)) != USE && GET_CODE (PATTERN (insn)) != CLOBBER)
     ss.issued_this_cycle++;
   if (insn_info.exists ())
@@ -5151,10 +5151,11 @@ reorg_emit_nops (rtx *call_labels)
 /* If possible, split INSN, which we know is either a jump or a call, into a real
    insn and its shadow.  */
 static void
-split_delayed_branch (rtx insn)
+split_delayed_branch (rtx_insn *insn)
 {
   int code = recog_memoized (insn);
-  rtx i1, newpat;
+  rtx_insn *i1;
+  rtx newpat;
   rtx pat = PATTERN (insn);
 
   if (GET_CODE (pat) == COND_EXEC)
@@ -5257,11 +5258,12 @@ split_delayed_branch (rtx insn)
    with the possibility.  Currently we handle loads and most mpy2 and
    mpy4 insns.  */
 static bool
-split_delayed_nonbranch (rtx insn)
+split_delayed_nonbranch (rtx_insn *insn)
 {
   int code = recog_memoized (insn);
   enum attr_type type;
-  rtx i1, newpat, src, dest;
+  rtx_insn *i1;
+  rtx newpat, src, dest;
   rtx pat = PATTERN (insn);
   rtvec rtv;
   int delay;
@@ -5369,7 +5371,7 @@ undo_split_delayed_nonbranch (rtx insn)
 static void
 split_delayed_insns (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
       if (JUMP_P (insn) || CALL_P (insn))
@@ -5511,17 +5513,17 @@ static bool
 hwloop_optimize (hwloop_info loop)
 {
   basic_block entry_bb, bb;
-  rtx seq, insn, prev, entry_after, end_packet;
-  rtx head_insn, tail_insn, new_insns, last_insn;
+  rtx_insn *seq, *insn, *prev, *entry_after, *end_packet;
+  rtx_insn *head_insn, *tail_insn, *new_insns, *last_insn;
   int loop_earliest;
   int n_execute_packets;
   edge entry_edge;
   unsigned ix;
   int max_uid_before, delayed_splits;
   int i, sp_ii, min_ii, max_ii, max_parallel, n_insns, n_real_insns, stages;
-  rtx *orig_vec;
-  rtx *copies;
-  rtx **insn_copies;
+  rtx_insn **orig_vec;
+  rtx_insn **copies;
+  rtx_insn ***insn_copies;
 
   if (!c6x_flag_modulo_sched || !c6x_flag_schedule_insns2
       || !TARGET_INSNS_64PLUS)
@@ -5586,7 +5588,7 @@ hwloop_optimize (hwloop_info loop)
       if (NONDEBUG_INSN_P (insn) && insn != loop->loop_end)
 	n_real_insns++;
     }
-  orig_vec = XNEWVEC (rtx, n_insns);
+  orig_vec = XNEWVEC (rtx_insn *, n_insns);
   n_insns = 0;
   FOR_BB_INSNS (bb, insn)
     orig_vec[n_insns++] = insn;
@@ -5604,8 +5606,8 @@ hwloop_optimize (hwloop_info loop)
      to handle.  */
   max_parallel = loop_earliest / min_ii + 1;
 
-  copies = XCNEWVEC (rtx, (max_parallel + 1) * n_real_insns);
-  insn_copies = XNEWVEC (rtx *, max_parallel + 1);
+  copies = XCNEWVEC (rtx_insn *, (max_parallel + 1) * n_real_insns);
+  insn_copies = XNEWVEC (rtx_insn **, max_parallel + 1);
   for (i = 0; i < max_parallel + 1; i++)
     insn_copies[i] = copies + i * n_real_insns;
 
@@ -5625,20 +5627,20 @@ hwloop_optimize (hwloop_info loop)
   for (i = 0; i < max_parallel; i++)
     {
       int j;
-      rtx this_iter;
+      rtx_insn *this_iter;
 
       this_iter = duplicate_insn_chain (head_insn, tail_insn);
       j = 0;
       while (this_iter)
 	{
-	  rtx prev_stage_insn = insn_copies[i][j];
+	  rtx_insn *prev_stage_insn = insn_copies[i][j];
 	  gcc_assert (INSN_CODE (this_iter) == INSN_CODE (prev_stage_insn));
 
 	  if (INSN_CODE (this_iter) >= 0
 	      && (get_attr_type (this_iter) == TYPE_LOAD_SHADOW
 		  || get_attr_type (this_iter) == TYPE_MULT_SHADOW))
 	    {
-	      rtx prev = PREV_INSN (this_iter);
+	      rtx_insn *prev = PREV_INSN (this_iter);
 	      record_delay_slot_pair (prev, this_iter,
 				      get_attr_cycles (prev) - 1, 0);
 	    }
@@ -5669,9 +5671,7 @@ hwloop_optimize (hwloop_info loop)
       schedule_ebbs_init ();
       set_modulo_params (sp_ii, max_parallel, n_real_insns,
 			 sploop_max_uid_iter0);
-      tmp_bb = schedule_ebb (BB_HEAD (bb),
-			     as_a_nullable <rtx_insn *> (last_insn),
-			     true);
+      tmp_bb = schedule_ebb (BB_HEAD (bb), last_insn, true);
       schedule_ebbs_finish ();
 
       if (tmp_bb)
@@ -5724,9 +5724,11 @@ hwloop_optimize (hwloop_info loop)
 
   /* Compute the number of execute packets the pipelined form of the loop will
      require.  */
-  prev = NULL_RTX;
+  prev = NULL;
   n_execute_packets = 0;
-  for (insn = loop->start_label; insn != loop->loop_end; insn = NEXT_INSN (insn))
+  for (insn = as_a <rtx_insn *> (loop->start_label);
+       insn != loop->loop_end;
+       insn = NEXT_INSN (insn))
     {
       if (NONDEBUG_INSN_P (insn) && GET_MODE (insn) == TImode
 	  && !shadow_p (insn))
@@ -5761,9 +5763,10 @@ hwloop_optimize (hwloop_info loop)
      spot.  */
   PUT_MODE (end_packet, VOIDmode);
 
-  insn = gen_spkernel (GEN_INT (stages - 1),
-		       const0_rtx, JUMP_LABEL (loop->loop_end));
-  insn = emit_jump_insn_before (insn, end_packet);
+  insn = emit_jump_insn_before (
+	   gen_spkernel (GEN_INT (stages - 1),
+			 const0_rtx, JUMP_LABEL (loop->loop_end)),
+	   end_packet);
   JUMP_LABEL (insn) = JUMP_LABEL (loop->loop_end);
   insn_set_clock (insn, loop_earliest);
   PUT_MODE (insn, TImode);
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 89b2d2d..a4cc259 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -25922,9 +25922,10 @@ ix86_macro_fusion_pair_p (rtx condgen, rtx condjmp)
        ready list.
    Return index of IMUL producer if it was found and -1 otherwise.  */
 static int
-do_reorder_for_imul (rtx *ready, int n_ready)
+do_reorder_for_imul (rtx_insn **ready, int n_ready)
 {
-  rtx insn, set, insn1, insn2;
+  rtx_insn *insn;
+  rtx set, insn1, insn2;
   sd_iterator_def sd_it;
   dep_t dep;
   int index = -1;
@@ -25999,10 +26000,10 @@ do_reorder_for_imul (rtx *ready, int n_ready)
    scheduled earlier. Applied for Silvermont only.
    Return true if top 2 insns must be interchanged.  */
 static bool
-swap_top_of_ready_list (rtx *ready, int n_ready)
+swap_top_of_ready_list (rtx_insn **ready, int n_ready)
 {
-  rtx top = ready[n_ready - 1];
-  rtx next = ready[n_ready - 2];
+  rtx_insn *top = ready[n_ready - 1];
+  rtx_insn *next = ready[n_ready - 2];
   rtx set;
   sd_iterator_def sd_it;
   dep_t dep;
@@ -26070,13 +26071,13 @@ swap_top_of_ready_list (rtx *ready, int n_ready)
 /* Perform possible reodering of ready list for Atom/Silvermont only.
    Return issue rate.  */
 static int
-ix86_sched_reorder (FILE *dump, int sched_verbose, rtx *ready, int *pn_ready,
-		   int clock_var)
+ix86_sched_reorder (FILE *dump, int sched_verbose, rtx_insn **ready,
+		    int *pn_ready, int clock_var)
 {
   int issue_rate = -1;
   int n_ready = *pn_ready;
   int i;
-  rtx insn;
+  rtx_insn *insn;
   int index = -1;
 
   /* Set up issue rate.  */
@@ -26156,12 +26157,12 @@ insn_is_function_arg (rtx insn, bool* is_spilled)
 /* Add output dependencies for chain of function adjacent arguments if only
    there is a move to likely spilled HW register.  Return first argument
    if at least one dependence was added or NULL otherwise.  */
-static rtx
-add_parameter_dependencies (rtx call, rtx head)
+static rtx_insn *
+add_parameter_dependencies (rtx_insn *call, rtx_insn *head)
 {
-  rtx insn;
-  rtx last = call;
-  rtx first_arg = NULL;
+  rtx_insn *insn;
+  rtx_insn *last = call;
+  rtx_insn *first_arg = NULL;
   bool is_spilled = false;
 
   head = PREV_INSN (head);
@@ -26211,7 +26212,7 @@ add_parameter_dependencies (rtx call, rtx head)
 /* Add output or anti dependency from insn to first_arg to restrict its code
    motion.  */
 static void
-avoid_func_arg_motion (rtx first_arg, rtx insn)
+avoid_func_arg_motion (rtx_insn *first_arg, rtx_insn *insn)
 {
   rtx set;
   rtx tmp;
@@ -26233,9 +26234,9 @@ avoid_func_arg_motion (rtx first_arg, rtx insn)
 /* Avoid cross block motion of function argument through adding dependency
    from the first non-jump instruction in bb.  */
 static void
-add_dependee_for_func_arg (rtx arg, basic_block bb)
+add_dependee_for_func_arg (rtx_insn *arg, basic_block bb)
 {
-  rtx insn = BB_END (bb);
+  rtx_insn *insn = BB_END (bb);
 
   while (insn)
     {
@@ -26257,10 +26258,10 @@ add_dependee_for_func_arg (rtx arg, basic_block bb)
 /* Hook for pre-reload schedule - avoid motion of function arguments
    passed in likely spilled HW registers.  */
 static void
-ix86_dependencies_evaluation_hook (rtx head, rtx tail)
+ix86_dependencies_evaluation_hook (rtx_insn *head, rtx_insn *tail)
 {
-  rtx insn;
-  rtx first_arg = NULL;
+  rtx_insn *insn;
+  rtx_insn *first_arg = NULL;
   if (reload_completed)
     return;
   while (head != tail && DEBUG_INSN_P (head))
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 1abd4ee..3ff7b10 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -166,7 +166,7 @@ static struct ia64_frame_info current_frame_info;
 static int emitted_frame_related_regs[number_of_ia64_frame_regs];
 \f
 static int ia64_first_cycle_multipass_dfa_lookahead (void);
-static void ia64_dependencies_evaluation_hook (rtx, rtx);
+static void ia64_dependencies_evaluation_hook (rtx_insn *, rtx_insn *);
 static void ia64_init_dfa_pre_cycle_insn (void);
 static rtx ia64_dfa_pre_cycle_insn (void);
 static int ia64_first_cycle_multipass_dfa_lookahead_guard (rtx, int);
@@ -255,9 +255,9 @@ static void ia64_sched_init (FILE *, int, int);
 static void ia64_sched_init_global (FILE *, int, int);
 static void ia64_sched_finish_global (FILE *, int);
 static void ia64_sched_finish (FILE *, int);
-static int ia64_dfa_sched_reorder (FILE *, int, rtx *, int *, int, int);
-static int ia64_sched_reorder (FILE *, int, rtx *, int *, int);
-static int ia64_sched_reorder2 (FILE *, int, rtx *, int *, int);
+static int ia64_dfa_sched_reorder (FILE *, int, rtx_insn **, int *, int, int);
+static int ia64_sched_reorder (FILE *, int, rtx_insn **, int *, int);
+static int ia64_sched_reorder2 (FILE *, int, rtx_insn **, int *, int);
 static int ia64_variable_issue (FILE *, int, rtx, int);
 
 static void ia64_asm_unwind_emit (FILE *, rtx);
@@ -7233,9 +7233,9 @@ ia64_emit_insn_before (rtx insn, rtx before)
    `ia64_produce_address_p' and the DFA descriptions).  */
 
 static void
-ia64_dependencies_evaluation_hook (rtx head, rtx tail)
+ia64_dependencies_evaluation_hook (rtx_insn *head, rtx_insn *tail)
 {
-  rtx insn, next, next_tail;
+  rtx_insn *insn, *next, *next_tail;
 
   /* Before reload, which_alternative is not set, which means that
      ia64_safe_itanium_class will produce wrong results for (at least)
@@ -7364,14 +7364,14 @@ record_memory_reference (rtx insn)
    Override the default sort algorithm to better slot instructions.  */
 
 static int
-ia64_dfa_sched_reorder (FILE *dump, int sched_verbose, rtx *ready,
+ia64_dfa_sched_reorder (FILE *dump, int sched_verbose, rtx_insn **ready,
 			int *pn_ready, int clock_var,
 			int reorder_type)
 {
   int n_asms;
   int n_ready = *pn_ready;
-  rtx *e_ready = ready + n_ready;
-  rtx *insnp;
+  rtx_insn **e_ready = ready + n_ready;
+  rtx_insn **insnp;
 
   if (sched_verbose)
     fprintf (dump, "// ia64_dfa_sched_reorder (type %d):\n", reorder_type);
@@ -7383,21 +7383,21 @@ ia64_dfa_sched_reorder (FILE *dump, int sched_verbose, rtx *ready,
       for (insnp = ready; insnp < e_ready; insnp++)
 	if (insnp < e_ready)
 	  {
-	    rtx insn = *insnp;
+	    rtx_insn *insn = *insnp;
 	    enum attr_type t = ia64_safe_type (insn);
 	    if (t == TYPE_UNKNOWN)
 	      {
 		if (GET_CODE (PATTERN (insn)) == ASM_INPUT
 		    || asm_noperands (PATTERN (insn)) >= 0)
 		  {
-		    rtx lowest = ready[n_asms];
+		    rtx_insn *lowest = ready[n_asms];
 		    ready[n_asms] = insn;
 		    *insnp = lowest;
 		    n_asms++;
 		  }
 		else
 		  {
-		    rtx highest = ready[n_ready - 1];
+		    rtx_insn *highest = ready[n_ready - 1];
 		    ready[n_ready - 1] = insn;
 		    *insnp = highest;
 		    return 1;
@@ -7434,7 +7434,7 @@ ia64_dfa_sched_reorder (FILE *dump, int sched_verbose, rtx *ready,
       while (insnp-- > ready + deleted)
 	while (insnp >= ready + deleted)
 	  {
-	    rtx insn = *insnp;
+	    rtx_insn *insn = *insnp;
 	    if (! safe_group_barrier_needed (insn))
 	      break;
 	    memmove (ready + 1, ready, (insnp - ready) * sizeof (rtx));
@@ -7455,7 +7455,7 @@ ia64_dfa_sched_reorder (FILE *dump, int sched_verbose, rtx *ready,
       while (insnp-- > ready + moved)
 	while (insnp >= ready + moved)
 	  {
-	    rtx insn = *insnp;
+	    rtx_insn *insn = *insnp;
 	    if (! is_load_p (insn))
 	      break;
 	    memmove (ready + 1, ready, (insnp - ready) * sizeof (rtx));
@@ -7473,8 +7473,8 @@ ia64_dfa_sched_reorder (FILE *dump, int sched_verbose, rtx *ready,
    the default sort algorithm to better slot instructions.  */
 
 static int
-ia64_sched_reorder (FILE *dump, int sched_verbose, rtx *ready, int *pn_ready,
-		    int clock_var)
+ia64_sched_reorder (FILE *dump, int sched_verbose, rtx_insn **ready,
+		    int *pn_ready, int clock_var)
 {
   return ia64_dfa_sched_reorder (dump, sched_verbose, ready,
 				 pn_ready, clock_var, 0);
@@ -7485,7 +7485,7 @@ ia64_sched_reorder (FILE *dump, int sched_verbose, rtx *ready, int *pn_ready,
 
 static int
 ia64_sched_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
-		     int sched_verbose ATTRIBUTE_UNUSED, rtx *ready,
+		     int sched_verbose ATTRIBUTE_UNUSED, rtx_insn **ready,
 		     int *pn_ready, int clock_var)
 {
   return ia64_dfa_sched_reorder (dump, sched_verbose, ready, pn_ready,
diff --git a/gcc/config/mep/mep.c b/gcc/config/mep/mep.c
index 3a58efb..a32175e 100644
--- a/gcc/config/mep/mep.c
+++ b/gcc/config/mep/mep.c
@@ -220,9 +220,9 @@ static void mep_incompatible_arg (const struct insn_operand_data *, rtx, int, tr
 static rtx mep_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
 static int mep_adjust_cost (rtx, rtx, rtx, int);
 static int mep_issue_rate (void);
-static rtx mep_find_ready_insn (rtx *, int, enum attr_slot, int);
-static void mep_move_ready_insn (rtx *, int, rtx);
-static int mep_sched_reorder (FILE *, int, rtx *, int *, int);
+static rtx_insn *mep_find_ready_insn (rtx_insn **, int, enum attr_slot, int);
+static void mep_move_ready_insn (rtx_insn **, int, rtx_insn *);
+static int mep_sched_reorder (FILE *, int, rtx_insn **, int *, int);
 static rtx_insn *mep_make_bundle (rtx, rtx_insn *);
 static void mep_bundle_insns (rtx_insn *);
 static bool mep_rtx_cost (rtx, int, int, int, int *, bool);
@@ -6540,25 +6540,26 @@ mep_vliw_function_p (tree decl)
   return lookup_attribute ("vliw", TYPE_ATTRIBUTES (TREE_TYPE (decl))) != 0;
 }
 
-static rtx
-mep_find_ready_insn (rtx *ready, int nready, enum attr_slot slot, int length)
+static rtx_insn *
+mep_find_ready_insn (rtx_insn **ready, int nready, enum attr_slot slot,
+		     int length)
 {
   int i;
 
   for (i = nready - 1; i >= 0; --i)
     {
-      rtx insn = ready[i];
+      rtx_insn *insn = ready[i];
       if (recog_memoized (insn) >= 0
 	  && get_attr_slot (insn) == slot
 	  && get_attr_length (insn) == length)
 	return insn;
     }
 
-  return NULL_RTX;
+  return NULL;
 }
 
 static void
-mep_move_ready_insn (rtx *ready, int nready, rtx insn)
+mep_move_ready_insn (rtx_insn **ready, int nready, rtx_insn *insn)
 {
   int i;
 
@@ -6575,7 +6576,7 @@ mep_move_ready_insn (rtx *ready, int nready, rtx insn)
 }
 
 static void
-mep_print_sched_insn (FILE *dump, rtx insn)
+mep_print_sched_insn (FILE *dump, rtx_insn *insn)
 {
   const char *slots = "none";
   const char *name = NULL;
@@ -6620,11 +6621,11 @@ mep_print_sched_insn (FILE *dump, rtx insn)
 
 static int
 mep_sched_reorder (FILE *dump ATTRIBUTE_UNUSED,
-		   int sched_verbose ATTRIBUTE_UNUSED, rtx *ready,
+		   int sched_verbose ATTRIBUTE_UNUSED, rtx_insn **ready,
 		   int *pnready, int clock ATTRIBUTE_UNUSED)
 {
   int nready = *pnready;
-  rtx core_insn, cop_insn;
+  rtx_insn *core_insn, *cop_insn;
   int i;
 
   if (dump && sched_verbose > 1)
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 7be20fe..fa0404b 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -13361,9 +13361,9 @@ mips_multipass_dfa_lookahead (void)
    be <= HIGHER.  */
 
 static void
-mips_promote_ready (rtx *ready, int lower, int higher)
+mips_promote_ready (rtx_insn **ready, int lower, int higher)
 {
-  rtx new_head;
+  rtx_insn *new_head;
   int i;
 
   new_head = ready[lower];
@@ -13377,12 +13377,12 @@ mips_promote_ready (rtx *ready, int lower, int higher)
    instructions if POS2 is not already less than POS1.  */
 
 static void
-mips_maybe_swap_ready (rtx *ready, int pos1, int pos2, int limit)
+mips_maybe_swap_ready (rtx_insn **ready, int pos1, int pos2, int limit)
 {
   if (pos1 < pos2
       && INSN_PRIORITY (ready[pos1]) + limit >= INSN_PRIORITY (ready[pos2]))
     {
-      rtx temp;
+      rtx_insn *temp;
 
       temp = ready[pos1];
       ready[pos1] = ready[pos2];
@@ -13411,7 +13411,7 @@ mips_macc_chains_record (rtx insn)
    clobber hi or lo.  */
 
 static void
-mips_macc_chains_reorder (rtx *ready, int nready)
+mips_macc_chains_reorder (rtx_insn **ready, int nready)
 {
   int i, j;
 
@@ -13525,7 +13525,7 @@ vr4130_swap_insns_p (rtx insn1, rtx insn2)
    vr4130_swap_insns_p says that it could be worthwhile.  */
 
 static void
-vr4130_reorder (rtx *ready, int nready)
+vr4130_reorder (rtx_insn **ready, int nready)
 {
   if (vr4130_swap_insns_p (ready[nready - 1], ready[nready - 2]))
     mips_promote_ready (ready, nready - 2, nready - 1);
@@ -13555,7 +13555,7 @@ mips_74k_agen_init (rtx insn)
    together.  Swap things around in the ready queue to make this happen.  */
 
 static void
-mips_74k_agen_reorder (rtx *ready, int nready)
+mips_74k_agen_reorder (rtx_insn **ready, int nready)
 {
   int i;
   int store_pos, load_pos;
@@ -13565,7 +13565,7 @@ mips_74k_agen_reorder (rtx *ready, int nready)
 
   for (i = nready - 1; i >= 0; i--)
     {
-      rtx insn = ready[i];
+      rtx_insn *insn = ready[i];
       if (USEFUL_INSN_P (insn))
 	switch (get_attr_type (insn))
 	  {
@@ -13625,7 +13625,7 @@ mips_sched_init (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
 
 static void
 mips_sched_reorder_1 (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
-		      rtx *ready, int *nreadyp, int cycle ATTRIBUTE_UNUSED)
+		      rtx_insn **ready, int *nreadyp, int cycle ATTRIBUTE_UNUSED)
 {
   if (!reload_completed
       && TUNE_MACC_CHAINS
@@ -13646,7 +13646,7 @@ mips_sched_reorder_1 (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
 
 static int
 mips_sched_reorder (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
-		    rtx *ready, int *nreadyp, int cycle ATTRIBUTE_UNUSED)
+		    rtx_insn **ready, int *nreadyp, int cycle ATTRIBUTE_UNUSED)
 {
   mips_sched_reorder_1 (file, verbose, ready, nreadyp, cycle);
   return mips_issue_rate ();
@@ -13656,7 +13656,7 @@ mips_sched_reorder (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
 
 static int
 mips_sched_reorder2 (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
-		     rtx *ready, int *nreadyp, int cycle ATTRIBUTE_UNUSED)
+		     rtx_insn **ready, int *nreadyp, int cycle ATTRIBUTE_UNUSED)
 {
   mips_sched_reorder_1 (file, verbose, ready, nreadyp, cycle);
   return cached_can_issue_more;
diff --git a/gcc/config/picochip/picochip.c b/gcc/config/picochip/picochip.c
index 3151ec1..6f977d2 100644
--- a/gcc/config/picochip/picochip.c
+++ b/gcc/config/picochip/picochip.c
@@ -99,7 +99,7 @@ int picochip_sched_lookahead (void);
 int picochip_sched_issue_rate (void);
 int picochip_sched_adjust_cost (rtx insn, rtx link,
 				       rtx dep_insn, int cost);
-int picochip_sched_reorder (FILE * file, int verbose, rtx * ready,
+int picochip_sched_reorder (FILE * file, int verbose, rtx_insn ** ready,
 				   int *n_readyp, int clock);
 
 void picochip_init_builtins (void);
@@ -3506,7 +3506,7 @@ picochip_reset_vliw (rtx insn)
 
 int
 picochip_sched_reorder (FILE * file, int verbose,
-			rtx * ready ATTRIBUTE_UNUSED,
+			rtx_insn ** ready ATTRIBUTE_UNUSED,
 			int *n_readyp ATTRIBUTE_UNUSED, int clock)
 {
 
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 149bc13..e7379d4 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -26989,7 +26989,7 @@ get_next_active_insn (rtx insn, rtx tail)
 
 static int
 rs6000_sched_reorder (FILE *dump ATTRIBUTE_UNUSED, int sched_verbose,
-                        rtx *ready ATTRIBUTE_UNUSED,
+                        rtx_insn **ready ATTRIBUTE_UNUSED,
                         int *pn_ready ATTRIBUTE_UNUSED,
 		        int clock_var ATTRIBUTE_UNUSED)
 {
@@ -27006,7 +27006,7 @@ rs6000_sched_reorder (FILE *dump ATTRIBUTE_UNUSED, int sched_verbose,
         && (recog_memoized (ready[n_ready - 2]) > 0))
       /* Simply swap first two insns.  */
       {
-	rtx tmp = ready[n_ready - 1];
+	rtx_insn *tmp = ready[n_ready - 1];
 	ready[n_ready - 1] = ready[n_ready - 2];
 	ready[n_ready - 2] = tmp;
       }
@@ -27021,7 +27021,7 @@ rs6000_sched_reorder (FILE *dump ATTRIBUTE_UNUSED, int sched_verbose,
 /* Like rs6000_sched_reorder, but called after issuing each insn.  */
 
 static int
-rs6000_sched_reorder2 (FILE *dump, int sched_verbose, rtx *ready,
+rs6000_sched_reorder2 (FILE *dump, int sched_verbose, rtx_insn **ready,
 		         int *pn_ready, int clock_var ATTRIBUTE_UNUSED)
 {
   if (sched_verbose)
@@ -27071,7 +27071,8 @@ rs6000_sched_reorder2 (FILE *dump, int sched_verbose, rtx *ready,
     {
       int pos;
       int i;
-      rtx tmp, load_mem, str_mem;
+      rtx_insn *tmp;
+      rtx load_mem, str_mem;
 
       if (is_store_insn (last_scheduled_insn, &str_mem))
         /* Issuing a store, swing the load_store_pendulum to the left */
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 439bdc5..ac3676e 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -11480,11 +11480,11 @@ s390_fpload_toreg (rtx insn, unsigned int regno)
    for Z10_EARLYLOAD_DISTANCE.  A problematic load instruction is
    moved to the very end of the ready list.  */
 static void
-s390_z10_prevent_earlyload_conflicts (rtx *ready, int *nready_p)
+s390_z10_prevent_earlyload_conflicts (rtx_insn **ready, int *nready_p)
 {
   unsigned int regno;
   int nready = *nready_p;
-  rtx tmp;
+  rtx_insn *tmp;
   int i;
   rtx_insn *insn;
   rtx set;
@@ -11522,7 +11522,7 @@ s390_z10_prevent_earlyload_conflicts (rtx *ready, int *nready_p)
     return;
 
   tmp = ready[i];
-  memmove (&ready[1], &ready[0], sizeof (rtx) * i);
+  memmove (&ready[1], &ready[0], sizeof (rtx_insn *) * i);
   ready[0] = tmp;
 }
 
@@ -11625,7 +11625,7 @@ s390_sched_score (rtx insn)
    conflicts in the floating point pipeline  */
 static int
 s390_sched_reorder (FILE *file, int verbose,
-		    rtx *ready, int *nreadyp, int clock ATTRIBUTE_UNUSED)
+		    rtx_insn **ready, int *nreadyp, int clock ATTRIBUTE_UNUSED)
 {
   if (s390_tune == PROCESSOR_2097_Z10)
     if (reload_completed && *nreadyp > 1)
@@ -11639,7 +11639,7 @@ s390_sched_reorder (FILE *file, int verbose,
       int last_index = *nreadyp - 1;
       int max_index = -1;
       int max_score = -1;
-      rtx tmp;
+      rtx_insn *tmp;
 
       /* Just move the insn with the highest score to the top (the
 	 end) of the list.  A full sort is not needed since a conflict
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index 59f66ca..bc83222 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -237,11 +237,11 @@ static int find_r0_life_regions (basic_block);
 static void  sh_md_init_global (FILE *, int, int);
 static void  sh_md_finish_global (FILE *, int);
 static int rank_for_reorder (const void *, const void *);
-static void swap_reorder (rtx *, int);
-static void ready_reorder (rtx *, int);
+static void swap_reorder (rtx_insn **, int);
+static void ready_reorder (rtx_insn **, int);
 static bool high_pressure (enum machine_mode);
-static int sh_reorder (FILE *, int, rtx *, int *, int);
-static int sh_reorder2 (FILE *, int, rtx *, int *, int);
+static int sh_reorder (FILE *, int, rtx_insn **, int *, int);
+static int sh_reorder2 (FILE *, int, rtx_insn **, int *, int);
 static void sh_md_init (FILE *, int, int);
 static int sh_variable_issue (FILE *, int, rtx, int);
 
@@ -11094,8 +11094,8 @@ find_regmode_weight (basic_block b, enum machine_mode mode)
 static int
 rank_for_reorder (const void *x, const void *y)
 {
-  rtx tmp = *(const rtx *) y;
-  rtx tmp2 = *(const rtx *) x;
+  rtx_insn *tmp = *(rtx_insn * const *) y;
+  rtx_insn *tmp2 = *(rtx_insn * const *) x;
 
   /* The insn in a schedule group should be issued the first.  */
   if (SCHED_GROUP_P (tmp) != SCHED_GROUP_P (tmp2))
@@ -11109,9 +11109,9 @@ rank_for_reorder (const void *x, const void *y)
 
 /* Resort the array A in which only element at index N may be out of order.  */
 static void
-swap_reorder (rtx *a, int n)
+swap_reorder (rtx_insn **a, int n)
 {
-  rtx insn = a[n - 1];
+  rtx_insn *insn = a[n - 1];
   int i = n - 2;
 
   while (i >= 0 && rank_for_reorder (a + i, &insn) >= 0)
@@ -11124,12 +11124,12 @@ swap_reorder (rtx *a, int n)
 
 /* Sort the ready list by ascending priority.  */
 static void
-ready_reorder (rtx *ready, int nready)
+ready_reorder (rtx_insn **ready, int nready)
 {
   if (nready == 2)
     swap_reorder (ready, nready);
   else if (nready > 2)
-     qsort (ready, nready, sizeof (rtx), rank_for_reorder);
+     qsort (ready, nready, sizeof (rtx_insn *), rank_for_reorder);
 }
 
 /* Count life regions of r0 for a block.  */
@@ -11293,7 +11293,7 @@ high_pressure (enum machine_mode mode)
 static int
 sh_reorder (FILE *dump ATTRIBUTE_UNUSED,
 	    int sched_verbose ATTRIBUTE_UNUSED,
-	    rtx *ready,
+	    rtx_insn **ready,
 	    int *n_readyp,
 	    int clock_var ATTRIBUTE_UNUSED)
 {
@@ -11312,7 +11312,7 @@ sh_reorder (FILE *dump ATTRIBUTE_UNUSED,
 static int
 sh_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
 	     int sched_verbose ATTRIBUTE_UNUSED,
-	     rtx *ready ATTRIBUTE_UNUSED,
+	     rtx_insn **ready ATTRIBUTE_UNUSED,
 	     int *n_readyp ATTRIBUTE_UNUSED,
 	     int clock_var ATTRIBUTE_UNUSED)
 {
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index 2f4f7c7..2d511d4 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -2861,11 +2861,11 @@ spu_sched_variable_issue (FILE *file ATTRIBUTE_UNUSED,
    TARGET_SCHED_REORDER2.  */
 static int
 spu_sched_reorder (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
-		   rtx *ready, int *nreadyp, int clock)
+		   rtx_insn **ready, int *nreadyp, int clock)
 {
   int i, nready = *nreadyp;
   int pipe_0, pipe_1, pipe_hbrp, pipe_ls, schedule_i;
-  rtx insn;
+  rtx_insn *insn;
 
   clock_var = clock;
 
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index a9613b0..ed33928 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -6567,7 +6567,7 @@ later.  Do not define this hook if you do not need to adjust the
 scheduling priorities of insns.
 @end deftypefn
 
-@deftypefn {Target Hook} int TARGET_SCHED_REORDER (FILE *@var{file}, int @var{verbose}, rtx *@var{ready}, int *@var{n_readyp}, int @var{clock})
+@deftypefn {Target Hook} int TARGET_SCHED_REORDER (FILE *@var{file}, int @var{verbose}, rtx_insn **@var{ready}, int *@var{n_readyp}, int @var{clock})
 This hook is executed by the scheduler after it has scheduled the ready
 list, to allow the machine description to reorder it (for example to
 combine two small instructions together on @samp{VLIW} machines).
@@ -6584,7 +6584,7 @@ can issue this cycle; normally this is just @code{issue_rate}.  See also
 @samp{TARGET_SCHED_REORDER2}.
 @end deftypefn
 
-@deftypefn {Target Hook} int TARGET_SCHED_REORDER2 (FILE *@var{file}, int @var{verbose}, rtx *@var{ready}, int *@var{n_readyp}, int @var{clock})
+@deftypefn {Target Hook} int TARGET_SCHED_REORDER2 (FILE *@var{file}, int @var{verbose}, rtx_insn **@var{ready}, int *@var{n_readyp}, int @var{clock})
 Like @samp{TARGET_SCHED_REORDER}, but called at a different time.  That
 function is called whenever the scheduler starts a new cycle.  This one
 is called once per iteration over a cycle, immediately after
@@ -6606,7 +6606,7 @@ target microarchitecture. If this hook returns true for the given insn pair
 group, and they will not be scheduled apart.
 @end deftypefn
 
-@deftypefn {Target Hook} void TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK (rtx @var{head}, rtx @var{tail})
+@deftypefn {Target Hook} void TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK (rtx_insn *@var{head}, rtx_insn *@var{tail})
 This hook is called after evaluation forward dependencies of insns in
 chain given by two parameter values (@var{head} and @var{tail}
 correspondingly) but before insns scheduling of the insn chain.  For
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 4e8a772..256c198 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -241,7 +241,7 @@ struct common_sched_info_def *common_sched_info;
 
 /* List of important notes we must keep around.  This is a pointer to the
    last element in the list.  */
-rtx note_list;
+rtx_insn *note_list;
 
 static struct spec_info_def spec_info_var;
 /* Description of the speculative part of the scheduling.
@@ -370,7 +370,7 @@ int cycle_issued_insns;
 
 /* This records the actual schedule.  It is built up during the main phase
    of schedule_block, and afterwards used to reorder the insns in the RTL.  */
-static vec<rtx> scheduled_insns;
+static vec<rtx_insn *> scheduled_insns;
 
 static int may_trap_exp (const_rtx, int);
 
@@ -591,7 +591,7 @@ set_modulo_params (int ii, int max_stages, int insns, int max_uid)
 struct delay_pair
 {
   struct delay_pair *next_same_i1;
-  rtx i1, i2;
+  rtx_insn *i1, *i2;
   int cycles;
   /* When doing modulo scheduling, we a delay_pair can also be used to
      show that I1 and I2 are the same insn in a different stage.  If that
@@ -726,7 +726,7 @@ discard_delay_pairs_above (int max_uid)
    scheduling.  */
 
 void
-record_delay_slot_pair (rtx i1, rtx i2, int cycles, int stages)
+record_delay_slot_pair (rtx_insn *i1, rtx_insn *i2, int cycles, int stages)
 {
   struct delay_pair *p = XNEW (struct delay_pair);
   struct delay_pair **slot;
@@ -780,7 +780,7 @@ pair_delay (struct delay_pair *p)
    and add dependencies to the real insns to limit the amount of backtracking
    needed.  */
 void
-add_delay_dependencies (rtx insn)
+add_delay_dependencies (rtx_insn *insn)
 {
   struct delay_pair *pair;
   sd_iterator_def sd_it;
@@ -828,9 +828,9 @@ add_delay_dependencies (rtx insn)
 
 static int priority (rtx);
 static int rank_for_schedule (const void *, const void *);
-static void swap_sort (rtx *, int);
-static void queue_insn (rtx, int, const char *);
-static int schedule_insn (rtx);
+static void swap_sort (rtx_insn **, int);
+static void queue_insn (rtx_insn *, int, const char *);
+static int schedule_insn (rtx_insn *);
 static void adjust_priority (rtx);
 static void advance_one_cycle (void);
 static void extend_h_i_d (void);
@@ -852,21 +852,21 @@ static void extend_h_i_d (void);
    unlink_other_notes ()).  After scheduling the block, these notes are
    inserted at the beginning of the block (in schedule_block()).  */
 
-static void ready_add (struct ready_list *, rtx, bool);
-static rtx ready_remove_first (struct ready_list *);
-static rtx ready_remove_first_dispatch (struct ready_list *ready);
+static void ready_add (struct ready_list *, rtx_insn *, bool);
+static rtx_insn *ready_remove_first (struct ready_list *);
+static rtx_insn *ready_remove_first_dispatch (struct ready_list *ready);
 
 static void queue_to_ready (struct ready_list *);
 static int early_queue_to_ready (state_t, struct ready_list *);
 
 /* The following functions are used to implement multi-pass scheduling
    on the first cycle.  */
-static rtx ready_remove (struct ready_list *, int);
+static rtx_insn *ready_remove (struct ready_list *, int);
 static void ready_remove_insn (rtx);
 
 static void fix_inter_tick (rtx, rtx);
-static int fix_tick_ready (rtx);
-static void change_queue_index (rtx, int);
+static int fix_tick_ready (rtx_insn *);
+static void change_queue_index (rtx_insn *, int);
 
 /* The following functions are used to implement scheduling of data/control
    speculative instructions.  */
@@ -874,12 +874,12 @@ static void change_queue_index (rtx, int);
 static void extend_h_i_d (void);
 static void init_h_i_d (rtx);
 static int haifa_speculate_insn (rtx, ds_t, rtx *);
-static void generate_recovery_code (rtx);
+static void generate_recovery_code (rtx_insn *);
 static void process_insn_forw_deps_be_in_spec (rtx, rtx, ds_t);
-static void begin_speculative_block (rtx);
+static void begin_speculative_block (rtx_insn *);
 static void add_to_speculative_block (rtx);
 static void init_before_recovery (basic_block *);
-static void create_check_block_twin (rtx, bool);
+static void create_check_block_twin (rtx_insn *, bool);
 static void fix_recovery_deps (basic_block);
 static bool haifa_change_pattern (rtx, rtx);
 static void dump_new_block_header (int, basic_block, rtx, rtx);
@@ -887,7 +887,7 @@ static void restore_bb_notes (basic_block);
 static void fix_jump_move (rtx);
 static void move_block_after_check (rtx);
 static void move_succs (vec<edge, va_gc> **, basic_block);
-static void sched_remove_insn (rtx);
+static void sched_remove_insn (rtx_insn *);
 static void clear_priorities (rtx, rtx_vec_t *);
 static void calc_priorities (rtx_vec_t);
 static void add_jump_dependencies (rtx, rtx);
@@ -1119,7 +1119,7 @@ print_curr_reg_pressure (void)
 /* Determine if INSN has a condition that is clobbered if a register
    in SET_REGS is modified.  */
 static bool
-cond_clobbered_p (rtx insn, HARD_REG_SET set_regs)
+cond_clobbered_p (rtx_insn *insn, HARD_REG_SET set_regs)
 {
   rtx pat = PATTERN (insn);
   gcc_assert (GET_CODE (pat) == COND_EXEC);
@@ -1271,7 +1271,7 @@ recompute_todo_spec (rtx next, bool for_backtrack)
       rtx pro, other, new_pat;
       rtx cond = NULL_RTX;
       bool success;
-      rtx prev = NULL_RTX;
+      rtx_insn *prev = NULL;
       int i;
       unsigned regno;
   
@@ -1348,7 +1348,7 @@ recompute_todo_spec (rtx next, bool for_backtrack)
 }
 \f
 /* Pointer to the last instruction scheduled.  */
-static rtx last_scheduled_insn;
+static rtx_insn *last_scheduled_insn;
 
 /* Pointer to the last nondebug instruction scheduled within the
    block, or the prev_head of the scheduling block.  Used by
@@ -1359,7 +1359,7 @@ static rtx last_nondebug_scheduled_insn;
 /* Pointer that iterates through the list of unscheduled insns if we
    have a dbg_cnt enabled.  It always points at an insn prior to the
    first unscheduled one.  */
-static rtx nonscheduled_insns_begin;
+static rtx_insn *nonscheduled_insns_begin;
 
 /* Compute cost of executing INSN.
    This is the number of cycles between instruction issue and
@@ -2471,7 +2471,7 @@ model_dump_pressure_points (struct model_pressure_group *group)
 /* Set INSN_REG_PRESSURE_EXCESS_COST_CHANGE for INSNS[0...COUNT-1].  */
 
 static void
-model_set_excess_costs (rtx *insns, int count)
+model_set_excess_costs (rtx_insn **insns, int count)
 {
   int i, cost, priority_base, priority;
   bool print_p;
@@ -2532,8 +2532,8 @@ model_set_excess_costs (rtx *insns, int count)
 static int
 rank_for_schedule (const void *x, const void *y)
 {
-  rtx tmp = *(const rtx *) y;
-  rtx tmp2 = *(const rtx *) x;
+  rtx_insn *tmp = *(rtx_insn * const *) y;
+  rtx_insn *tmp2 = *(rtx_insn * const *) x;
   int tmp_class, tmp2_class;
   int val, priority_val, info_val, diff;
 
@@ -2704,9 +2704,9 @@ rank_for_schedule (const void *x, const void *y)
 /* Resort the array A in which only element at index N may be out of order.  */
 
 HAIFA_INLINE static void
-swap_sort (rtx *a, int n)
+swap_sort (rtx_insn **a, int n)
 {
-  rtx insn = a[n - 1];
+  rtx_insn *insn = a[n - 1];
   int i = n - 2;
 
   while (i >= 0 && rank_for_schedule (a + i, &insn) >= 0)
@@ -2723,7 +2723,7 @@ swap_sort (rtx *a, int n)
    output.  */
 
 HAIFA_INLINE static void
-queue_insn (rtx insn, int n_cycles, const char *reason)
+queue_insn (rtx_insn *insn, int n_cycles, const char *reason)
 {
   int next_q = NEXT_Q_AFTER (q_ptr, n_cycles);
   rtx link = alloc_INSN_LIST (insn, insn_queue[next_q]);
@@ -2774,7 +2774,7 @@ queue_remove (rtx insn)
 /* Return a pointer to the bottom of the ready list, i.e. the insn
    with the lowest priority.  */
 
-rtx *
+rtx_insn **
 ready_lastpos (struct ready_list *ready)
 {
   gcc_assert (ready->n_ready >= 1);
@@ -2785,7 +2785,7 @@ ready_lastpos (struct ready_list *ready)
    lowest/highest priority depending on FIRST_P.  */
 
 HAIFA_INLINE static void
-ready_add (struct ready_list *ready, rtx insn, bool first_p)
+ready_add (struct ready_list *ready, rtx_insn *insn, bool first_p)
 {
   if (!first_p)
     {
@@ -2829,10 +2829,10 @@ ready_add (struct ready_list *ready, rtx insn, bool first_p)
 /* Remove the element with the highest priority from the ready list and
    return it.  */
 
-HAIFA_INLINE static rtx
+HAIFA_INLINE static rtx_insn *
 ready_remove_first (struct ready_list *ready)
 {
-  rtx t;
+  rtx_insn *t;
 
   gcc_assert (ready->n_ready);
   t = ready->vec[ready->first--];
@@ -2857,7 +2857,7 @@ ready_remove_first (struct ready_list *ready)
    insn with the highest priority is 0, and the lowest priority has
    N_READY - 1.  */
 
-rtx
+rtx_insn *
 ready_element (struct ready_list *ready, int index)
 {
   gcc_assert (ready->n_ready && index < ready->n_ready);
@@ -2869,10 +2869,10 @@ ready_element (struct ready_list *ready, int index)
    for insn with the highest priority is 0, and the lowest priority
    has N_READY - 1.  */
 
-HAIFA_INLINE static rtx
+HAIFA_INLINE static rtx_insn *
 ready_remove (struct ready_list *ready, int index)
 {
-  rtx t;
+  rtx_insn *t;
   int i;
 
   if (index == 0)
@@ -2910,7 +2910,7 @@ void
 ready_sort (struct ready_list *ready)
 {
   int i;
-  rtx *first = ready_lastpos (ready);
+  rtx_insn **first = ready_lastpos (ready);
 
   if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
     {
@@ -3085,7 +3085,7 @@ check_clobbered_conditions (rtx insn)
  restart:
   for (i = 0; i < ready.n_ready; i++)
     {
-      rtx x = ready_element (&ready, i);
+      rtx_insn *x = ready_element (&ready, i);
       if (TODO_SPEC (x) == DEP_CONTROL && cond_clobbered_p (x, t))
 	{
 	  ready_remove_insn (x);
@@ -3100,7 +3100,7 @@ check_clobbered_conditions (rtx insn)
     restart_queue:
       for (link = insn_queue[q]; link; link = XEXP (link, 1))
 	{
-	  rtx x = XEXP (link, 0);
+	  rtx_insn *x = as_a <rtx_insn *> (XEXP (link, 0));
 	  if (TODO_SPEC (x) == DEP_CONTROL && cond_clobbered_p (x, t))
 	    {
 	      queue_remove (x);
@@ -3738,7 +3738,7 @@ struct sched_block_state
    zero for insns in a schedule group).  */
 
 static int
-schedule_insn (rtx insn)
+schedule_insn (rtx_insn *insn)
 {
   sd_iterator_def sd_it;
   dep_t dep;
@@ -3980,9 +3980,9 @@ concat_note_lists (rtx from_end, rtx *to_endp)
 /* Delete notes between HEAD and TAIL and put them in the chain
    of notes ended by NOTE_LIST.  */
 void
-remove_notes (rtx head, rtx tail)
+remove_notes (rtx_insn *head, rtx_insn *tail)
 {
-  rtx next_tail, insn, next;
+  rtx_insn *next_tail, *insn, *next;
 
   note_list = 0;
   if (head == tail && !INSN_P (head))
@@ -4048,9 +4048,9 @@ struct haifa_saved_data
   struct ready_list ready;
   state_t curr_state;
 
-  rtx last_scheduled_insn;
+  rtx_insn *last_scheduled_insn;
   rtx last_nondebug_scheduled_insn;
-  rtx nonscheduled_insns_begin;
+  rtx_insn *nonscheduled_insns_begin;
   int cycle_issued_insns;
 
   /* Copies of state used in the inner loop of schedule_block.  */
@@ -4107,7 +4107,7 @@ save_backtrack_point (struct delay_pair *pair,
   save->ready.n_ready = ready.n_ready;
   save->ready.n_debug = ready.n_debug;
   save->ready.veclen = ready.veclen;
-  save->ready.vec = XNEWVEC (rtx, ready.veclen);
+  save->ready.vec = XNEWVEC (rtx_insn *, ready.veclen);
   memcpy (save->ready.vec, ready.vec, ready.veclen * sizeof (rtx));
 
   save->insn_queue = XNEWVEC (rtx, max_insn_queue_index + 1);
@@ -4171,7 +4171,7 @@ toggle_cancelled_flags (bool set)
 
   if (ready.n_ready > 0)
     {
-      rtx *first = ready_lastpos (&ready);
+      rtx_insn **first = ready_lastpos (&ready);
       for (i = 0; i < ready.n_ready; i++)
 	FOR_EACH_DEP (first[i], SD_LIST_BACK, sd_it, dep)
 	  if (!DEBUG_INSN_P (DEP_PRO (dep)))
@@ -4318,10 +4318,10 @@ restore_last_backtrack_point (struct sched_block_state *psched_block)
      of the queues.  */
   if (ready.n_ready > 0)
     {
-      rtx *first = ready_lastpos (&ready);
+      rtx_insn **first = ready_lastpos (&ready);
       for (i = 0; i < ready.n_ready; i++)
 	{
-	  rtx insn = first[i];
+	  rtx_insn *insn = first[i];
 	  QUEUE_INDEX (insn) = QUEUE_NOWHERE;
 	  INSN_TICK (insn) = INVALID_TICK;
 	}
@@ -4344,10 +4344,10 @@ restore_last_backtrack_point (struct sched_block_state *psched_block)
 
   if (ready.n_ready > 0)
     {
-      rtx *first = ready_lastpos (&ready);
+      rtx_insn **first = ready_lastpos (&ready);
       for (i = 0; i < ready.n_ready; i++)
 	{
-	  rtx insn = first[i];
+	  rtx_insn *insn = first[i];
 	  QUEUE_INDEX (insn) = QUEUE_READY;
 	  TODO_SPEC (insn) = recompute_todo_spec (insn, true);
 	  INSN_TICK (insn) = save->clock_var;
@@ -4636,7 +4636,7 @@ estimate_shadow_tick (struct delay_pair *p)
 /* If INSN has no unresolved backwards dependencies, add it to the schedule and
    recursively resolve all its forward dependencies.  */
 static void
-resolve_dependencies (rtx insn)
+resolve_dependencies (rtx_insn *insn)
 {
   sd_iterator_def sd_it;
   dep_t dep;
@@ -4791,12 +4791,12 @@ no_real_insns_p (const_rtx head, const_rtx tail)
 
 /* Restore-other-notes: NOTE_LIST is the end of a chain of notes
    previously found among the insns.  Insert them just before HEAD.  */
-rtx
-restore_other_notes (rtx head, basic_block head_bb)
+rtx_insn *
+restore_other_notes (rtx_insn *head, basic_block head_bb)
 {
   if (note_list != 0)
     {
-      rtx note_head = note_list;
+      rtx_insn *note_head = note_list;
 
       if (head)
 	head_bb = BLOCK_FOR_INSN (head);
@@ -4830,7 +4830,7 @@ restore_other_notes (rtx head, basic_block head_bb)
 static void
 undo_all_replacements (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   int i;
 
   FOR_EACH_VEC_ELT (scheduled_insns, i, insn)
@@ -4851,12 +4851,12 @@ undo_all_replacements (void)
 
 /* Return first non-scheduled insn in the current scheduling block.
    This is mostly used for debug-counter purposes.  */
-static rtx
+static rtx_insn *
 first_nonscheduled_insn (void)
 {
-  rtx insn = (nonscheduled_insns_begin != NULL_RTX
-	      ? nonscheduled_insns_begin
-	      : current_sched_info->prev_head);
+  rtx_insn *insn = (nonscheduled_insns_begin != NULL_RTX
+		    ? nonscheduled_insns_begin
+		    : current_sched_info->prev_head);
 
   do
     {
@@ -4872,7 +4872,7 @@ first_nonscheduled_insn (void)
 static void
 queue_to_ready (struct ready_list *ready)
 {
-  rtx insn;
+  rtx_insn *insn;
   rtx link;
   rtx skip_insn;
 
@@ -4889,7 +4889,7 @@ queue_to_ready (struct ready_list *ready)
      ready list.  */
   for (link = insn_queue[q_ptr]; link; link = XEXP (link, 1))
     {
-      insn = XEXP (link, 0);
+      insn = as_a <rtx_insn *> (XEXP (link, 0));
       q_size -= 1;
 
       if (sched_verbose >= 2)
@@ -4937,7 +4937,7 @@ queue_to_ready (struct ready_list *ready)
 	    {
 	      for (; link; link = XEXP (link, 1))
 		{
-		  insn = XEXP (link, 0);
+		  insn = as_a <rtx_insn *> (XEXP (link, 0));
 		  q_size -= 1;
 
 		  if (sched_verbose >= 2)
@@ -5028,7 +5028,7 @@ ok_for_early_queue_removal (rtx insn)
 static int
 early_queue_to_ready (state_t state, struct ready_list *ready)
 {
-  rtx insn;
+  rtx_insn *insn;
   rtx link;
   rtx next_link;
   rtx prev_link;
@@ -5066,7 +5066,7 @@ early_queue_to_ready (state_t state, struct ready_list *ready)
 	  while (link)
 	    {
 	      next_link = XEXP (link, 1);
-	      insn = XEXP (link, 0);
+	      insn = as_a <rtx_insn *> (XEXP (link, 0));
 	      if (insn && sched_verbose > 6)
 		print_rtl_single (sched_dump, insn);
 
@@ -5129,7 +5129,7 @@ early_queue_to_ready (state_t state, struct ready_list *ready)
 static void
 debug_ready_list_1 (struct ready_list *ready, signed char *ready_try)
 {
-  rtx *p;
+  rtx_insn **p;
   int i;
 
   if (ready->n_ready == 0)
@@ -5188,12 +5188,12 @@ reemit_notes (rtx insn)
 
 /* Move INSN.  Reemit notes if needed.  Update CFG, if needed.  */
 static void
-move_insn (rtx insn, rtx last, rtx nt)
+move_insn (rtx_insn *insn, rtx last, rtx nt)
 {
   if (PREV_INSN (insn) != last)
     {
       basic_block bb;
-      rtx note;
+      rtx_insn *note;
       int jump_p = 0;
 
       bb = BLOCK_FOR_INSN (insn);
@@ -5273,7 +5273,7 @@ move_insn (rtx insn, rtx last, rtx nt)
 
 /* Return true if scheduling INSN will finish current clock cycle.  */
 static bool
-insn_finishes_cycle_p (rtx insn)
+insn_finishes_cycle_p (rtx_insn *insn)
 {
   if (SCHED_GROUP_P (insn))
     /* After issuing INSN, rest of the sched_group will be forced to issue
@@ -5357,7 +5357,7 @@ max_issue (struct ready_list *ready, int privileged_n, state_t state,
   int n, i, all, n_ready, best, delay, tries_num;
   int more_issue;
   struct choice_entry *top;
-  rtx insn;
+  rtx_insn *insn;
 
   n_ready = ready->n_ready;
   gcc_assert (dfa_lookahead >= 1 && privileged_n >= 0
@@ -5527,7 +5527,7 @@ max_issue (struct ready_list *ready, int privileged_n, state_t state,
    1 if choose_ready () should be restarted without advancing the cycle.  */
 static int
 choose_ready (struct ready_list *ready, bool first_cycle_insn_p,
-	      rtx *insn_ptr)
+	      rtx_insn **insn_ptr)
 {
   int lookahead;
 
@@ -5536,7 +5536,7 @@ choose_ready (struct ready_list *ready, bool first_cycle_insn_p,
       if (nonscheduled_insns_begin == NULL_RTX)
 	nonscheduled_insns_begin = current_sched_info->prev_head;
 
-      rtx insn = first_nonscheduled_insn ();
+      rtx_insn *insn = first_nonscheduled_insn ();
 
       if (QUEUE_INDEX (insn) == QUEUE_READY)
 	/* INSN is in the ready_list.  */
@@ -5569,7 +5569,7 @@ choose_ready (struct ready_list *ready, bool first_cycle_insn_p,
     {
       /* Try to choose the best insn.  */
       int index = 0, i;
-      rtx insn;
+      rtx_insn *insn;
 
       insn = ready_element (ready, 0);
       if (INSN_CODE (insn) < 0)
@@ -5657,10 +5657,10 @@ choose_ready (struct ready_list *ready, bool first_cycle_insn_p,
    block.  TARGET_BB is the argument passed to schedule_block.  */
 
 static void
-commit_schedule (rtx prev_head, rtx tail, basic_block *target_bb)
+commit_schedule (rtx_insn *prev_head, rtx tail, basic_block *target_bb)
 {
   unsigned int i;
-  rtx insn;
+  rtx_insn *insn;
 
   last_scheduled_insn = prev_head;
   for (i = 0;
@@ -5716,7 +5716,7 @@ prune_ready_list (state_t temp_state, bool first_cycle_insn_p,
 
   for (i = 0; i < ready.n_ready; i++)
     {
-      rtx insn = ready_element (&ready, i);
+      rtx_insn *insn = ready_element (&ready, i);
       if (SCHED_GROUP_P (insn))
 	{
 	  sched_group_found = true;
@@ -5732,7 +5732,7 @@ prune_ready_list (state_t temp_state, bool first_cycle_insn_p,
       int n = ready.n_ready;
       for (i = 0; i < n; i++)
 	{
-	  rtx insn = ready_element (&ready, i);
+	  rtx_insn *insn = ready_element (&ready, i);
 	  int cost = 0;
 	  const char *reason = "resource conflict";
 
@@ -5919,10 +5919,10 @@ schedule_block (basic_block *target_bb, state_t init_state)
   int sort_p, advance, start_clock_var;
 
   /* Head/tail info for this block.  */
-  rtx prev_head = current_sched_info->prev_head;
+  rtx_insn *prev_head = current_sched_info->prev_head;
   rtx next_tail = current_sched_info->next_tail;
-  rtx head = NEXT_INSN (prev_head);
-  rtx tail = PREV_INSN (next_tail);
+  rtx_insn *head = NEXT_INSN (prev_head);
+  rtx_insn *tail = PREV_INSN (next_tail);
 
   if ((current_sched_info->flags & DONT_BREAK_DEPENDENCIES) == 0
       && sched_pressure != SCHED_PRESSURE_MODEL)
@@ -5969,7 +5969,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
   /* We start inserting insns after PREV_HEAD.  */
   last_scheduled_insn = prev_head;
   last_nondebug_scheduled_insn = NULL_RTX;
-  nonscheduled_insns_begin = NULL_RTX;
+  nonscheduled_insns_begin = NULL;
 
   gcc_assert ((NOTE_P (last_scheduled_insn)
 	       || DEBUG_INSN_P (last_scheduled_insn))
@@ -6019,16 +6019,16 @@ schedule_block (basic_block *target_bb, state_t init_state)
 	 activated make an exception for the insn right after
 	 nonscheduled_insns_begin.  */
       {
-	rtx skip_insn;
+	rtx_insn *skip_insn;
 
 	if (dbg_cnt (sched_insn) == false)
 	  skip_insn = first_nonscheduled_insn ();
 	else
-	  skip_insn = NULL_RTX;
+	  skip_insn = NULL;
 
 	while (i < ready.n_ready)
 	  {
-	    rtx insn;
+	    rtx_insn *insn;
 
 	    insn = ready_remove (&ready, i);
 
@@ -6129,7 +6129,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
       ls.can_issue_more = issue_rate;
       for (;;)
 	{
-	  rtx insn;
+	  rtx_insn *insn;
 	  int cost;
 	  bool asm_p;
 
@@ -6156,7 +6156,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
 	    {
 	      while (ready.n_ready && DEBUG_INSN_P (ready_element (&ready, 0)))
 		{
-		  rtx insn = ready_remove_first (&ready);
+		  rtx_insn *insn = ready_remove_first (&ready);
 		  gcc_assert (DEBUG_INSN_P (insn));
 		  (*current_sched_info->begin_schedule_ready) (insn);
 		  scheduled_insns.safe_push (insn);
@@ -6226,7 +6226,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
 	    {
 	      int res;
 
-	      insn = NULL_RTX;
+	      insn = NULL;
 	      res = choose_ready (&ready, ls.first_cycle_insn_p, &insn);
 
 	      if (res < 0)
@@ -6378,7 +6378,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
       while (must_backtrack)
 	{
 	  struct haifa_saved_data *failed;
-	  rtx failed_insn;
+	  rtx_insn *failed_insn;
 
 	  must_backtrack = false;
 	  failed = verify_shadows ();
@@ -6436,7 +6436,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
 	}
       for (i = ready.n_ready - 1; i >= 0; i--)
 	{
-	  rtx x;
+	  rtx_insn *x;
 
 	  x = ready_element (&ready, i);
 	  resolve_dependencies (x);
@@ -6446,7 +6446,7 @@ schedule_block (basic_block *target_bb, state_t init_state)
 	  rtx link;
 	  while ((link = insn_queue[i]) != NULL)
 	    {
-	      rtx x = XEXP (link, 0);
+	      rtx_insn *x = as_a <rtx_insn *> (XEXP (link, 0));
 	      insn_queue[i] = XEXP (link, 1);
 	      QUEUE_INDEX (x) = QUEUE_NOWHERE;
 	      free_INSN_LIST_node (link);
@@ -6567,7 +6567,7 @@ set_priorities (rtx head, rtx tail)
   int n_insn;
   int sched_max_insns_priority =
 	current_sched_info->sched_max_insns_priority;
-  rtx prev_head;
+  rtx_insn *prev_head;
 
   if (head == tail && ! INSN_P (head))
     gcc_unreachable ();
@@ -6963,7 +6963,7 @@ fix_inter_tick (rtx head, rtx tail)
        0 - added to the ready list,
    0 < N - queued for N cycles.  */
 int
-try_ready (rtx next)
+try_ready (rtx_insn *next)
 {
   ds_t old_ts, new_ts;
 
@@ -7095,7 +7095,7 @@ try_ready (rtx next)
 
 /* Calculate INSN_TICK of NEXT and add it to either ready or queue list.  */
 static int
-fix_tick_ready (rtx next)
+fix_tick_ready (rtx_insn *next)
 {
   int tick, delay;
 
@@ -7144,7 +7144,7 @@ fix_tick_ready (rtx next)
    or add it to the ready list (DELAY == QUEUE_READY),
    or remove it from ready and queue lists at all (DELAY == QUEUE_NOWHERE).  */
 static void
-change_queue_index (rtx next, int delay)
+change_queue_index (rtx_insn *next, int delay)
 {
   int i = QUEUE_INDEX (next);
 
@@ -7203,7 +7203,7 @@ sched_extend_ready_list (int new_sched_ready_n_insns)
     i = sched_ready_n_insns + 1;
 
   ready.veclen = new_sched_ready_n_insns + issue_rate;
-  ready.vec = XRESIZEVEC (rtx, ready.vec, ready.veclen);
+  ready.vec = XRESIZEVEC (rtx_insn *, ready.vec, ready.veclen);
 
   gcc_assert (new_sched_ready_n_insns >= sched_ready_n_insns);
 
@@ -7265,7 +7265,7 @@ haifa_luid_for_non_insn (rtx x)
 
 /* Generates recovery code for INSN.  */
 static void
-generate_recovery_code (rtx insn)
+generate_recovery_code (rtx_insn *insn)
 {
   if (TODO_SPEC (insn) & BEGIN_SPEC)
     begin_speculative_block (insn);
@@ -7340,7 +7340,7 @@ process_insn_forw_deps_be_in_spec (rtx insn, rtx twin, ds_t fs)
 
 /* Generates recovery code for BEGIN speculative INSN.  */
 static void
-begin_speculative_block (rtx insn)
+begin_speculative_block (rtx_insn *insn)
 {
   if (TODO_SPEC (insn) & BEGIN_DATA)
     nr_begin_data++;
@@ -7724,10 +7724,11 @@ sched_create_recovery_edges (basic_block first_bb, basic_block rec,
 /* This function creates recovery code for INSN.  If MUTATE_P is nonzero,
    INSN is a simple check, that should be converted to branchy one.  */
 static void
-create_check_block_twin (rtx insn, bool mutate_p)
+create_check_block_twin (rtx_insn *insn, bool mutate_p)
 {
   basic_block rec;
-  rtx label, check, twin;
+  rtx_insn *label, *check, *twin;
+  rtx check_pat;
   ds_t fs;
   sd_iterator_def sd_it;
   dep_t dep;
@@ -7757,11 +7758,11 @@ create_check_block_twin (rtx insn, bool mutate_p)
   else
     {
       rec = EXIT_BLOCK_PTR_FOR_FN (cfun);
-      label = NULL_RTX;
+      label = NULL;
     }
 
   /* Emit CHECK.  */
-  check = targetm.sched.gen_spec_check (insn, label, todo_spec);
+  check_pat = targetm.sched.gen_spec_check (insn, label, todo_spec);
 
   if (rec != EXIT_BLOCK_PTR_FOR_FN (cfun))
     {
@@ -7769,12 +7770,12 @@ create_check_block_twin (rtx insn, bool mutate_p)
 	 we emit check BEFORE insn, so insn after splitting
 	 insn will be at the beginning of second_bb, which will
 	 provide us with the correct life information.  */
-      check = emit_jump_insn_before (check, insn);
+      check = emit_jump_insn_before (check_pat, insn);
       JUMP_LABEL (check) = label;
       LABEL_NUSES (label)++;
     }
   else
-    check = emit_insn_before (check, insn);
+    check = emit_insn_before (check_pat, insn);
 
   /* Extend data structures.  */
   haifa_init_insn (check);
@@ -8048,7 +8049,7 @@ fix_recovery_deps (basic_block rec)
 
   /* Try to add instructions to the ready or queue list.  */
   for (link = ready_list; link; link = XEXP (link, 1))
-    try_ready (XEXP (link, 0));
+    try_ready (as_a <rtx_insn *> (XEXP (link, 0)));
   free_INSN_LIST_list (&ready_list);
 
   /* Fixing jump's dependences.  */
@@ -8308,7 +8309,7 @@ move_succs (vec<edge, va_gc> **succsp, basic_block to)
 /* Remove INSN from the instruction stream.
    INSN should have any dependencies.  */
 static void
-sched_remove_insn (rtx insn)
+sched_remove_insn (rtx_insn *insn)
 {
   sd_finish_insn (insn);
 
@@ -8586,10 +8587,10 @@ sched_create_empty_bb_1 (basic_block after)
 
 /* Insert PAT as an INSN into the schedule and update the necessary data
    structures to account for it. */
-rtx
+rtx_insn *
 sched_emit_insn (rtx pat)
 {
-  rtx insn = emit_insn_before (pat, first_nonscheduled_insn ());
+  rtx_insn *insn = emit_insn_before (pat, first_nonscheduled_insn ());
   haifa_init_insn (insn);
 
   if (current_sched_info->add_remove_insn)
@@ -8605,11 +8606,11 @@ sched_emit_insn (rtx pat)
 /* This function returns a candidate satisfying dispatch constraints from
    the ready list.  */
 
-static rtx
+static rtx_insn *
 ready_remove_first_dispatch (struct ready_list *ready)
 {
   int i;
-  rtx insn = ready_element (ready, 0);
+  rtx_insn *insn = ready_element (ready, 0);
 
   if (ready->n_ready == 1
       || !INSN_P (insn)
diff --git a/gcc/hw-doloop.c b/gcc/hw-doloop.c
index bb66982..3b506ed 100644
--- a/gcc/hw-doloop.c
+++ b/gcc/hw-doloop.c
@@ -242,7 +242,7 @@ discover_loop (hwloop_info loop, basic_block tail_bb, rtx_insn *tail_insn, rtx r
   loop->loop_end = tail_insn;
   loop->iter_reg = reg;
   vec_alloc (loop->incoming, 2);
-  loop->start_label = JUMP_LABEL (tail_insn);
+  loop->start_label = as_a <rtx_insn *> (JUMP_LABEL (tail_insn));
 
   if (EDGE_COUNT (tail_bb->succs) != 2)
     {
diff --git a/gcc/modulo-sched.c b/gcc/modulo-sched.c
index 911ef6b..d413e7c 100644
--- a/gcc/modulo-sched.c
+++ b/gcc/modulo-sched.c
@@ -251,7 +251,7 @@ typedef struct node_sched_params node_sched_params;
    code in order to use sched_analyze() for computing the dependencies.
    They are used when initializing the sched_info structure.  */
 static const char *
-sms_print_insn (const_rtx insn, int aligned ATTRIBUTE_UNUSED)
+sms_print_insn (const rtx_insn *insn, int aligned ATTRIBUTE_UNUSED)
 {
   static char tmp[80];
 
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index 7228356..89b8519 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -482,17 +482,17 @@ static int cache_size;
 static bool mark_as_hard;
 
 static int deps_may_trap_p (const_rtx);
-static void add_dependence_1 (rtx, rtx, enum reg_note);
-static void add_dependence_list (rtx, rtx, int, enum reg_note, bool);
-static void add_dependence_list_and_free (struct deps_desc *, rtx,
+static void add_dependence_1 (rtx_insn *, rtx_insn *, enum reg_note);
+static void add_dependence_list (rtx_insn *, rtx, int, enum reg_note, bool);
+static void add_dependence_list_and_free (struct deps_desc *, rtx_insn *,
 					  rtx *, int, enum reg_note, bool);
 static void delete_all_dependences (rtx);
-static void chain_to_prev_insn (rtx);
+static void chain_to_prev_insn (rtx_insn *);
 
-static void flush_pending_lists (struct deps_desc *, rtx, int, int);
-static void sched_analyze_1 (struct deps_desc *, rtx, rtx);
-static void sched_analyze_2 (struct deps_desc *, rtx, rtx);
-static void sched_analyze_insn (struct deps_desc *, rtx, rtx);
+static void flush_pending_lists (struct deps_desc *, rtx_insn *, int, int);
+static void sched_analyze_1 (struct deps_desc *, rtx, rtx_insn *);
+static void sched_analyze_2 (struct deps_desc *, rtx, rtx_insn *);
+static void sched_analyze_insn (struct deps_desc *, rtx, rtx_insn *);
 
 static bool sched_has_condition_p (const_rtx);
 static int conditions_mutex_p (const_rtx, const_rtx, bool, bool);
@@ -1513,7 +1513,7 @@ sd_debug_lists (rtx insn, sd_list_types_def types)
    impossible; otherwise we add additional true dependencies on the
    INSN_COND_DEPS list of the jump (which PRO must be).  */
 void
-add_dependence (rtx con, rtx pro, enum reg_note dep_type)
+add_dependence (rtx_insn *con, rtx_insn *pro, enum reg_note dep_type)
 {
   if (dep_type == REG_DEP_CONTROL
       && !(current_sched_info->flags & DO_PREDICATION))
@@ -1561,14 +1561,14 @@ add_dependence (rtx con, rtx pro, enum reg_note dep_type)
    true if DEP_NONREG should be set on newly created dependencies.  */
 
 static void
-add_dependence_list (rtx insn, rtx list, int uncond, enum reg_note dep_type,
+add_dependence_list (rtx_insn *insn, rtx list, int uncond, enum reg_note dep_type,
 		     bool hard)
 {
   mark_as_hard = hard;
   for (; list; list = XEXP (list, 1))
     {
       if (uncond || ! sched_insns_conditions_mutex_p (insn, XEXP (list, 0)))
-	add_dependence (insn, XEXP (list, 0), dep_type);
+	add_dependence (insn, as_a <rtx_insn *> (XEXP (list, 0)), dep_type);
     }
   mark_as_hard = false;
 }
@@ -1578,7 +1578,7 @@ add_dependence_list (rtx insn, rtx list, int uncond, enum reg_note dep_type,
    newly created dependencies.  */
 
 static void
-add_dependence_list_and_free (struct deps_desc *deps, rtx insn, rtx *listp,
+add_dependence_list_and_free (struct deps_desc *deps, rtx_insn *insn, rtx *listp,
                               int uncond, enum reg_note dep_type, bool hard)
 {
   add_dependence_list (insn, *listp, uncond, dep_type, hard);
@@ -1661,15 +1661,15 @@ delete_all_dependences (rtx insn)
    the previous nonnote insn.  */
 
 static void
-chain_to_prev_insn (rtx insn)
+chain_to_prev_insn (rtx_insn *insn)
 {
   sd_iterator_def sd_it;
   dep_t dep;
-  rtx prev_nonnote;
+  rtx_insn *prev_nonnote;
 
   FOR_EACH_DEP (insn, SD_LIST_BACK, sd_it, dep)
     {
-      rtx i = insn;
+      rtx_insn *i = insn;
       rtx_insn *pro = DEP_PRO (dep);
 
       do
@@ -1749,7 +1749,7 @@ add_insn_mem_dependence (struct deps_desc *deps, bool read_p,
    dependencies for a read operation, similarly with FOR_WRITE.  */
 
 static void
-flush_pending_lists (struct deps_desc *deps, rtx insn, int for_read,
+flush_pending_lists (struct deps_desc *deps, rtx_insn *insn, int for_read,
 		     int for_write)
 {
   if (for_write)
@@ -1796,7 +1796,7 @@ flush_pending_lists (struct deps_desc *deps, rtx insn, int for_read,
 }
 \f
 /* Instruction which dependencies we are analyzing.  */
-static rtx cur_insn = NULL_RTX;
+static rtx_insn *cur_insn = NULL;
 
 /* Implement hooks for haifa scheduler.  */
 
@@ -1805,7 +1805,7 @@ haifa_start_insn (rtx insn)
 {
   gcc_assert (insn && !cur_insn);
 
-  cur_insn = insn;
+  cur_insn = as_a <rtx_insn *> (insn);
 }
 
 static void
@@ -1895,7 +1895,7 @@ note_mem_dep (rtx m1, rtx m2, rtx e, ds_t ds)
 }
 
 static void
-note_dep (rtx e, ds_t ds)
+note_dep (rtx_insn *e, ds_t ds)
 {
   if (sched_deps_info->note_dep)
     sched_deps_info->note_dep (e, ds);
@@ -2298,7 +2298,7 @@ maybe_extend_reg_info_p (void)
 
 static void
 sched_analyze_reg (struct deps_desc *deps, int regno, enum machine_mode mode,
-		   enum rtx_code ref, rtx insn)
+		   enum rtx_code ref, rtx_insn *insn)
 {
   /* We could emit new pseudos in renaming.  Extend the reg structures.  */
   if (!reload_completed && sel_sched_p ()
@@ -2376,7 +2376,7 @@ sched_analyze_reg (struct deps_desc *deps, int regno, enum machine_mode mode,
    destination of X, and reads of everything mentioned.  */
 
 static void
-sched_analyze_1 (struct deps_desc *deps, rtx x, rtx insn)
+sched_analyze_1 (struct deps_desc *deps, rtx x, rtx_insn *insn)
 {
   rtx dest = XEXP (x, 0);
   enum rtx_code code = GET_CODE (x);
@@ -2548,7 +2548,7 @@ sched_analyze_1 (struct deps_desc *deps, rtx x, rtx insn)
 
 /* Analyze the uses of memory and registers in rtx X in INSN.  */
 static void
-sched_analyze_2 (struct deps_desc *deps, rtx x, rtx insn)
+sched_analyze_2 (struct deps_desc *deps, rtx x, rtx_insn *insn)
 {
   int i;
   int j;
@@ -2669,7 +2669,8 @@ sched_analyze_2 (struct deps_desc *deps, rtx x, rtx insn)
 	      }
 
 	    for (u = deps->last_pending_memory_flush; u; u = XEXP (u, 1))
-	      add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
+	      add_dependence (insn, as_a <rtx_insn *> (XEXP (u, 0)),
+			      REG_DEP_ANTI);
 
 	    for (u = deps->pending_jump_insns; u; u = XEXP (u, 1))
 	      if (deps_may_trap_p (x))
@@ -2680,10 +2681,11 @@ sched_analyze_2 (struct deps_desc *deps, rtx x, rtx insn)
 		      ds_t ds = set_dep_weak (DEP_ANTI, BEGIN_CONTROL,
 					      MAX_DEP_WEAK);
 		      
-		      note_dep (XEXP (u, 0), ds);
+		      note_dep (as_a <rtx_insn *> (XEXP (u, 0)), ds);
 		    }
 		  else
-		    add_dependence (insn, XEXP (u, 0), REG_DEP_CONTROL);
+		    add_dependence (insn, as_a <rtx_insn *> (XEXP (u, 0)),
+				    REG_DEP_CONTROL);
 		}
 	  }
 
@@ -2853,7 +2855,7 @@ try_group_insn (rtx insn)
 
 /* Analyze an INSN with pattern X to find all dependencies.  */
 static void
-sched_analyze_insn (struct deps_desc *deps, rtx x, rtx insn)
+sched_analyze_insn (struct deps_desc *deps, rtx x, rtx_insn *insn)
 {
   RTX_CODE code = GET_CODE (x);
   rtx link;
@@ -3001,7 +3003,8 @@ sched_analyze_insn (struct deps_desc *deps, rtx x, rtx insn)
 	  while (pending)
 	    {
 	      if (! sched_insns_conditions_mutex_p (insn, XEXP (pending, 0)))
-		add_dependence (insn, XEXP (pending, 0), REG_DEP_OUTPUT);
+		add_dependence (insn, as_a <rtx_insn *> (XEXP (pending, 0)),
+				REG_DEP_OUTPUT);
 	      pending = XEXP (pending, 1);
 	      pending_mem = XEXP (pending_mem, 1);
 	    }
@@ -3012,7 +3015,8 @@ sched_analyze_insn (struct deps_desc *deps, rtx x, rtx insn)
 	    {
 	      if (MEM_VOLATILE_P (XEXP (pending_mem, 0))
 		  && ! sched_insns_conditions_mutex_p (insn, XEXP (pending, 0)))
-		add_dependence (insn, XEXP (pending, 0), REG_DEP_OUTPUT);
+		add_dependence (insn, as_a <rtx_insn *> (XEXP (pending, 0)),
+				REG_DEP_OUTPUT);
 	      pending = XEXP (pending, 1);
 	      pending_mem = XEXP (pending_mem, 1);
 	    }
@@ -3043,7 +3047,7 @@ sched_analyze_insn (struct deps_desc *deps, rtx x, rtx insn)
   /* Add register dependencies for insn.  */
   if (DEBUG_INSN_P (insn))
     {
-      rtx prev = deps->last_debug_insn;
+      rtx_insn *prev = deps->last_debug_insn;
       rtx u;
 
       if (!deps->readonly)
@@ -3057,7 +3061,7 @@ sched_analyze_insn (struct deps_desc *deps, rtx x, rtx insn)
 
       if (!sel_sched_p ())
 	for (u = deps->last_pending_memory_flush; u; u = XEXP (u, 1))
-	  add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
+	  add_dependence (insn, as_a <rtx_insn *> (XEXP (u, 0)), REG_DEP_ANTI);
 
       EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses, 0, i, rsi)
 	{
@@ -3577,7 +3581,7 @@ chain_to_prev_insn_p (rtx insn)
 
 /* Analyze INSN with DEPS as a context.  */
 void
-deps_analyze_insn (struct deps_desc *deps, rtx insn)
+deps_analyze_insn (struct deps_desc *deps, rtx_insn *insn)
 {
   if (sched_deps_info->start_insn)
     sched_deps_info->start_insn (insn);
@@ -3762,9 +3766,9 @@ deps_start_bb (struct deps_desc *deps, rtx head)
 /* Analyze every insn between HEAD and TAIL inclusive, creating backward
    dependencies for each insn.  */
 void
-sched_analyze (struct deps_desc *deps, rtx head, rtx tail)
+sched_analyze (struct deps_desc *deps, rtx_insn *head, rtx_insn *tail)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (sched_deps_info->use_cselib)
     cselib_init (CSELIB_RECORD_MEMORY);
@@ -4196,7 +4200,7 @@ estimate_dep_weak (rtx mem1, rtx mem2)
    This function can handle same INSN and ELEM (INSN == ELEM).
    It is a convenience wrapper.  */
 static void
-add_dependence_1 (rtx insn, rtx elem, enum reg_note dep_type)
+add_dependence_1 (rtx_insn *insn, rtx_insn *elem, enum reg_note dep_type)
 {
   ds_t ds;
   bool internal;
@@ -4593,8 +4597,8 @@ check_dep (dep_t dep, bool relaxed_p)
    insns which depend on each other, but could possibly be interchanged.  */
 struct mem_inc_info
 {
-  rtx inc_insn;
-  rtx mem_insn;
+  rtx_insn *inc_insn;
+  rtx_insn *mem_insn;
 
   rtx *mem_loc;
   /* A register occurring in the memory address for which we wish to break
@@ -4649,7 +4653,7 @@ attempt_change (struct mem_inc_info *mii, rtx new_addr)
    a corresponding memory reference.  */
 
 static bool
-parse_add_or_inc (struct mem_inc_info *mii, rtx insn, bool before_mem)
+parse_add_or_inc (struct mem_inc_info *mii, rtx_insn *insn, bool before_mem)
 {
   rtx pat = single_set (insn);
   rtx src, cst;
@@ -4719,7 +4723,7 @@ find_inc (struct mem_inc_info *mii, bool backwards)
       dep_node_t node = DEP_LINK_NODE (*sd_it.linkp);
       rtx_insn *pro = DEP_PRO (dep);
       rtx_insn *con = DEP_CON (dep);
-      rtx inc_cand = backwards ? pro : con;
+      rtx_insn *inc_cand = backwards ? pro : con;
       if (DEP_NONREG (dep) || DEP_MULTIPLE (dep))
 	goto next;
       if (parse_add_or_inc (mii, inc_cand, backwards))
@@ -4874,9 +4878,9 @@ find_mem (struct mem_inc_info *mii, rtx *address_of_x)
    dependencies that can be broken by modifying one of the patterns.  */
 
 void
-find_modifiable_mems (rtx head, rtx tail)
+find_modifiable_mems (rtx_insn *head, rtx_insn *tail)
 {
-  rtx insn, next_tail = NEXT_INSN (tail);
+  rtx_insn *insn, *next_tail = NEXT_INSN (tail);
   int success_in_block = 0;
 
   for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
diff --git a/gcc/sched-ebb.c b/gcc/sched-ebb.c
index 100bf5b..621fddb 100644
--- a/gcc/sched-ebb.c
+++ b/gcc/sched-ebb.c
@@ -55,18 +55,18 @@ static basic_block last_bb;
 
 /* Implementations of the sched_info functions for region scheduling.  */
 static void init_ready_list (void);
-static void begin_schedule_ready (rtx);
+static void begin_schedule_ready (rtx_insn *);
 static int schedule_more_p (void);
-static const char *ebb_print_insn (const_rtx, int);
-static int rank (rtx, rtx);
-static int ebb_contributes_to_priority (rtx, rtx);
+static const char *ebb_print_insn (const rtx_insn *, int);
+static int rank (rtx_insn *, rtx_insn *);
+static int ebb_contributes_to_priority (rtx_insn *, rtx_insn *);
 static basic_block earliest_block_with_similiar_load (basic_block, rtx);
 static void add_deps_for_risky_insns (rtx_insn *, rtx_insn *);
 static void debug_ebb_dependencies (rtx, rtx);
 
-static void ebb_add_remove_insn (rtx, int);
+static void ebb_add_remove_insn (rtx_insn *, int);
 static void ebb_add_block (basic_block, basic_block);
-static basic_block advance_target_bb (basic_block, rtx);
+static basic_block advance_target_bb (basic_block, rtx_insn *);
 static void ebb_fix_recovery_cfg (int, int, int);
 
 /* Allocate memory and store the state of the frontend.  Return the allocated
@@ -118,7 +118,7 @@ init_ready_list (void)
   int n = 0;
   rtx prev_head = current_sched_info->prev_head;
   rtx next_tail = current_sched_info->next_tail;
-  rtx insn;
+  rtx_insn *insn;
 
   sched_rgn_n_insns = 0;
 
@@ -139,14 +139,14 @@ init_ready_list (void)
 
 /* INSN is being scheduled after LAST.  Update counters.  */
 static void
-begin_schedule_ready (rtx insn ATTRIBUTE_UNUSED)
+begin_schedule_ready (rtx_insn *insn ATTRIBUTE_UNUSED)
 {
   sched_rgn_n_insns++;
 }
 
 /* INSN is being moved to its place in the schedule, after LAST.  */
 static void
-begin_move_insn (rtx insn, rtx last)
+begin_move_insn (rtx_insn *insn, rtx_insn *last)
 {
   if (BLOCK_FOR_INSN (insn) == last_bb
       /* INSN is a jump in the last block, ...  */
@@ -214,7 +214,7 @@ begin_move_insn (rtx insn, rtx last)
    to be formatted so that multiple output lines will line up nicely.  */
 
 static const char *
-ebb_print_insn (const_rtx insn, int aligned ATTRIBUTE_UNUSED)
+ebb_print_insn (const rtx_insn *insn, int aligned ATTRIBUTE_UNUSED)
 {
   static char tmp[80];
 
@@ -232,7 +232,7 @@ ebb_print_insn (const_rtx insn, int aligned ATTRIBUTE_UNUSED)
    is to be preferred.  Zero if they are equally good.  */
 
 static int
-rank (rtx insn1, rtx insn2)
+rank (rtx_insn *insn1, rtx_insn *insn2)
 {
   basic_block bb1 = BLOCK_FOR_INSN (insn1);
   basic_block bb2 = BLOCK_FOR_INSN (insn2);
@@ -251,8 +251,8 @@ rank (rtx insn1, rtx insn2)
    calculations.  */
 
 static int
-ebb_contributes_to_priority (rtx next ATTRIBUTE_UNUSED,
-                             rtx insn ATTRIBUTE_UNUSED)
+ebb_contributes_to_priority (rtx_insn *next ATTRIBUTE_UNUSED,
+                             rtx_insn *insn ATTRIBUTE_UNUSED)
 {
   return 1;
 }
@@ -668,7 +668,7 @@ schedule_ebbs (void)
 
 /* INSN has been added to/removed from current ebb.  */
 static void
-ebb_add_remove_insn (rtx insn ATTRIBUTE_UNUSED, int remove_p)
+ebb_add_remove_insn (rtx_insn *insn ATTRIBUTE_UNUSED, int remove_p)
 {
   if (!remove_p)
     rgn_n_insns++;
@@ -692,7 +692,7 @@ ebb_add_block (basic_block bb, basic_block after)
 /* Return next block in ebb chain.  For parameter meaning please refer to
    sched-int.h: struct sched_info: advance_target_bb.  */
 static basic_block
-advance_target_bb (basic_block bb, rtx insn)
+advance_target_bb (basic_block bb, rtx_insn *insn)
 {
   if (insn)
     {
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index 220e26d..2e52722 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -125,10 +125,10 @@ extern int insn_luid (rtx);
 /* This list holds ripped off notes from the current block.  These notes will
    be attached to the beginning of the block when its scheduling is
    finished.  */
-extern rtx note_list;
+extern rtx_insn *note_list;
 
-extern void remove_notes (rtx, rtx);
-extern rtx restore_other_notes (rtx, basic_block);
+extern void remove_notes (rtx_insn *, rtx_insn *);
+extern rtx_insn *restore_other_notes (rtx_insn *, basic_block);
 extern void sched_insns_init (rtx);
 extern void sched_insns_finish (void);
 
@@ -163,7 +163,7 @@ extern bool sel_insn_is_speculation_check (rtx);
    N_DEBUG determines how many debug insns are on the ready list.  */
 struct ready_list
 {
-  rtx *vec;
+  rtx_insn **vec;
   int veclen;
   int first;
   int n_ready;
@@ -211,7 +211,7 @@ struct dep_replacement
   rtx *loc;
   rtx orig;
   rtx newval;
-  rtx insn;
+  rtx_insn *insn;
 };
 
 /* Information about the dependency.  */
@@ -539,10 +539,10 @@ struct deps_desc
   enum post_call_group in_post_call_group_p;
 
   /* The last debug insn we've seen.  */
-  rtx last_debug_insn;
+  rtx_insn *last_debug_insn;
 
   /* The last insn bearing REG_ARGS_SIZE that we've seen.  */
-  rtx last_args_size;
+  rtx_insn *last_args_size;
 
   /* The maximum register number for the following arrays.  Before reload
      this is max_reg_num; after reload it is FIRST_PSEUDO_REGISTER.  */
@@ -580,7 +580,7 @@ struct haifa_sched_info
   void (*init_ready_list) (void);
   /* Called after taking an insn from the ready list.  Returns nonzero if
      this insn can be scheduled, nonzero if we should silently discard it.  */
-  int (*can_schedule_ready_p) (rtx);
+  int (*can_schedule_ready_p) (rtx_insn *);
   /* Return nonzero if there are more insns that should be scheduled.  */
   int (*schedule_more_p) (void);
   /* Called after an insn has all its hard dependencies resolved.
@@ -588,30 +588,30 @@ struct haifa_sched_info
      to indicate if instruction should be moved to the ready list or the
      queue, or if it should silently discard it (until next resolved
      dependence).  */
-  ds_t (*new_ready) (rtx, ds_t);
+  ds_t (*new_ready) (rtx_insn *, ds_t);
   /* Compare priority of two insns.  Return a positive number if the second
      insn is to be preferred for scheduling, and a negative one if the first
      is to be preferred.  Zero if they are equally good.  */
-  int (*rank) (rtx, rtx);
+  int (*rank) (rtx_insn *, rtx_insn *);
   /* Return a string that contains the insn uid and optionally anything else
      necessary to identify this insn in an output.  It's valid to use a
      static buffer for this.  The ALIGNED parameter should cause the string
      to be formatted so that multiple output lines will line up nicely.  */
-  const char *(*print_insn) (const_rtx, int);
+  const char *(*print_insn) (const rtx_insn *, int);
   /* Return nonzero if an insn should be included in priority
      calculations.  */
-  int (*contributes_to_priority) (rtx, rtx);
+  int (*contributes_to_priority) (rtx_insn *, rtx_insn *);
 
   /* Return true if scheduling insn (passed as the parameter) will trigger
      finish of scheduling current block.  */
-  bool (*insn_finishes_block_p) (rtx);
+  bool (*insn_finishes_block_p) (rtx_insn *);
 
   /* The boundaries of the set of insns to be scheduled.  */
   rtx_insn *prev_head, *next_tail;
 
   /* Filled in after the schedule is finished; the first and last scheduled
      insns.  */
-  rtx head, tail;
+  rtx_insn *head, *tail;
 
   /* If nonzero, enables an additional sanity check in schedule_block.  */
   unsigned int queue_must_finish_empty:1;
@@ -623,23 +623,23 @@ struct haifa_sched_info
 
   /* Called to notify frontend that instruction is being added (second
      parameter == 0) or removed (second parameter == 1).  */
-  void (*add_remove_insn) (rtx, int);
+  void (*add_remove_insn) (rtx_insn *, int);
 
   /* Called to notify the frontend that instruction INSN is being
      scheduled.  */
-  void (*begin_schedule_ready) (rtx insn);
+  void (*begin_schedule_ready) (rtx_insn *insn);
 
   /* Called to notify the frontend that an instruction INSN is about to be
      moved to its correct place in the final schedule.  This is done for all
      insns in order of the schedule.  LAST indicates the last scheduled
      instruction.  */
-  void (*begin_move_insn) (rtx insn, rtx last);
+  void (*begin_move_insn) (rtx_insn *insn, rtx_insn *last);
 
   /* If the second parameter is not NULL, return nonnull value, if the
      basic block should be advanced.
      If the second parameter is NULL, return the next basic block in EBB.
      The first parameter is the current basic block in EBB.  */
-  basic_block (*advance_target_bb) (basic_block, rtx);
+  basic_block (*advance_target_bb) (basic_block, rtx_insn *);
 
   /* Allocate memory, store the frontend scheduler state in it, and
      return it.  */
@@ -1272,7 +1272,7 @@ struct sched_deps_info_def
   void (*note_mem_dep) (rtx mem1, rtx mem2, rtx insn2, ds_t ds);
 
   /* Note a dependence of type DS from the INSN.  */
-  void (*note_dep) (rtx insn, ds_t ds);
+  void (*note_dep) (rtx, ds_t ds);
 
   /* Nonzero if we should use cselib for better alias analysis.  This
      must be 0 if the dependency information is used after sched_analyze
@@ -1296,14 +1296,14 @@ extern struct sched_deps_info_def *sched_deps_info;
 extern rtx sched_get_reverse_condition_uncached (const_rtx);
 extern bool sched_insns_conditions_mutex_p (const_rtx, const_rtx);
 extern bool sched_insn_is_legitimate_for_speculation_p (const_rtx, ds_t);
-extern void add_dependence (rtx, rtx, enum reg_note);
-extern void sched_analyze (struct deps_desc *, rtx, rtx);
+extern void add_dependence (rtx_insn *, rtx_insn *, enum reg_note);
+extern void sched_analyze (struct deps_desc *, rtx_insn *, rtx_insn *);
 extern void init_deps (struct deps_desc *, bool);
 extern void init_deps_reg_last (struct deps_desc *);
 extern void free_deps (struct deps_desc *);
 extern void init_deps_global (void);
 extern void finish_deps_global (void);
-extern void deps_analyze_insn (struct deps_desc *, rtx);
+extern void deps_analyze_insn (struct deps_desc *, rtx_insn *);
 extern void remove_from_deps (struct deps_desc *, rtx);
 extern void init_insn_reg_pressure_info (rtx);
 
@@ -1359,10 +1359,10 @@ extern int issue_rate;
 extern int dfa_lookahead;
 
 extern void ready_sort (struct ready_list *);
-extern rtx ready_element (struct ready_list *, int);
-extern rtx *ready_lastpos (struct ready_list *);
+extern rtx_insn *ready_element (struct ready_list *, int);
+extern rtx_insn **ready_lastpos (struct ready_list *);
 
-extern int try_ready (rtx);
+extern int try_ready (rtx_insn *);
 extern void sched_extend_ready_list (int);
 extern void sched_finish_ready_list (void);
 extern void sched_change_pattern (rtx, rtx);
@@ -1371,7 +1371,7 @@ extern void unlink_bb_notes (basic_block, basic_block);
 extern void add_block (basic_block, basic_block);
 extern rtx_note *bb_note (basic_block);
 extern void concat_note_lists (rtx, rtx *);
-extern rtx sched_emit_insn (rtx);
+extern rtx_insn *sched_emit_insn (rtx);
 extern rtx get_ready_element (int);
 extern int number_in_ready (void);
 \f
@@ -1431,11 +1431,11 @@ extern int target_bb;
 extern bool sched_no_dce;
 
 extern void set_modulo_params (int, int, int, int);
-extern void record_delay_slot_pair (rtx, rtx, int, int);
+extern void record_delay_slot_pair (rtx_insn *, rtx_insn *, int, int);
 extern rtx real_insn_for_shadow (rtx);
 extern void discard_delay_pairs_above (int);
 extern void free_delay_pairs (void);
-extern void add_delay_dependencies (rtx);
+extern void add_delay_dependencies (rtx_insn *);
 extern bool sched_is_disabled_for_current_region_p (void);
 extern void sched_rgn_init (bool);
 extern void sched_rgn_finish (void);
@@ -1452,7 +1452,7 @@ extern void increase_insn_priority (rtx, int);
 extern void debug_rgn_dependencies (int);
 extern void debug_dependencies (rtx, rtx);
 extern void free_rgn_deps (void);
-extern int contributes_to_priority (rtx, rtx);
+extern int contributes_to_priority (rtx_insn *, rtx_insn *);
 extern void extend_rgns (int *, int *, sbitmap, int *);
 extern void deps_join (struct deps_desc *, struct deps_desc *);
 
@@ -1467,7 +1467,7 @@ extern void dump_region_dot_file (const char *, int);
 extern void haifa_sched_init (void);
 extern void haifa_sched_finish (void);
 
-extern void find_modifiable_mems (rtx, rtx);
+extern void find_modifiable_mems (rtx_insn *, rtx_insn *);
 
 /* sched-deps.c interface to walk, add, search, update, resolve, delete
    and debug instruction dependencies.  */
diff --git a/gcc/sched-rgn.c b/gcc/sched-rgn.c
index 68cab02..723f376 100644
--- a/gcc/sched-rgn.c
+++ b/gcc/sched-rgn.c
@@ -236,7 +236,7 @@ static int is_exception_free (rtx, int, int);
 
 static bool sets_likely_spilled (rtx);
 static void sets_likely_spilled_1 (rtx, const_rtx, void *);
-static void add_branch_dependences (rtx, rtx);
+static void add_branch_dependences (rtx_insn *, rtx_insn *);
 static void compute_block_dependences (int);
 
 static void schedule_region (int);
@@ -540,7 +540,7 @@ rgn_estimate_number_of_insns (basic_block bb)
 
   if (MAY_HAVE_DEBUG_INSNS)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       FOR_BB_INSNS (bb, insn)
 	if (DEBUG_INSN_P (insn))
@@ -1804,7 +1804,7 @@ update_live_1 (int src, rtx x)
    ready-list or before the scheduling.  */
 
 static int
-check_live (rtx insn, int src)
+check_live (rtx_insn *insn, int src)
 {
   /* Find the registers set by instruction.  */
   if (GET_CODE (PATTERN (insn)) == SET
@@ -2078,19 +2078,19 @@ static int sched_n_insns;
 
 /* Implementations of the sched_info functions for region scheduling.  */
 static void init_ready_list (void);
-static int can_schedule_ready_p (rtx);
-static void begin_schedule_ready (rtx);
-static ds_t new_ready (rtx, ds_t);
+static int can_schedule_ready_p (rtx_insn *);
+static void begin_schedule_ready (rtx_insn *);
+static ds_t new_ready (rtx_insn *, ds_t);
 static int schedule_more_p (void);
-static const char *rgn_print_insn (const_rtx, int);
-static int rgn_rank (rtx, rtx);
+static const char *rgn_print_insn (const rtx_insn *, int);
+static int rgn_rank (rtx_insn *, rtx_insn *);
 static void compute_jump_reg_dependencies (rtx, regset);
 
 /* Functions for speculative scheduling.  */
-static void rgn_add_remove_insn (rtx, int);
+static void rgn_add_remove_insn (rtx_insn *, int);
 static void rgn_add_block (basic_block, basic_block);
 static void rgn_fix_recovery_cfg (int, int, int);
-static basic_block advance_target_bb (basic_block, rtx);
+static basic_block advance_target_bb (basic_block, rtx_insn *);
 
 /* Return nonzero if there are more insns that should be scheduled.  */
 
@@ -2109,7 +2109,7 @@ init_ready_list (void)
   rtx prev_head = current_sched_info->prev_head;
   rtx next_tail = current_sched_info->next_tail;
   int bb_src;
-  rtx insn;
+  rtx_insn *insn;
 
   target_n_insns = 0;
   sched_target_n_insns = 0;
@@ -2164,7 +2164,7 @@ init_ready_list (void)
    insn can be scheduled, nonzero if we should silently discard it.  */
 
 static int
-can_schedule_ready_p (rtx insn)
+can_schedule_ready_p (rtx_insn *insn)
 {
   /* An interblock motion?  */
   if (INSN_BB (insn) != target_bb
@@ -2180,7 +2180,7 @@ can_schedule_ready_p (rtx insn)
    can_schedule_ready_p () differs from the one passed to
    begin_schedule_ready ().  */
 static void
-begin_schedule_ready (rtx insn)
+begin_schedule_ready (rtx_insn *insn)
 {
   /* An interblock motion?  */
   if (INSN_BB (insn) != target_bb)
@@ -2212,7 +2212,7 @@ begin_schedule_ready (rtx insn)
    Return nonzero if it should be moved to the ready list or the queue, or zero
    if we should silently discard it.  */
 static ds_t
-new_ready (rtx next, ds_t ts)
+new_ready (rtx_insn *next, ds_t ts)
 {
   if (INSN_BB (next) != target_bb)
     {
@@ -2265,7 +2265,7 @@ new_ready (rtx next, ds_t ts)
    to be formatted so that multiple output lines will line up nicely.  */
 
 static const char *
-rgn_print_insn (const_rtx insn, int aligned)
+rgn_print_insn (const rtx_insn *insn, int aligned)
 {
   static char tmp[80];
 
@@ -2286,7 +2286,7 @@ rgn_print_insn (const_rtx insn, int aligned)
    is to be preferred.  Zero if they are equally good.  */
 
 static int
-rgn_rank (rtx insn1, rtx insn2)
+rgn_rank (rtx_insn *insn1, rtx_insn *insn2)
 {
   /* Some comparison make sense in interblock scheduling only.  */
   if (INSN_BB (insn1) != INSN_BB (insn2))
@@ -2317,7 +2317,7 @@ rgn_rank (rtx insn1, rtx insn2)
    calculations.  */
 
 int
-contributes_to_priority (rtx next, rtx insn)
+contributes_to_priority (rtx_insn *next, rtx_insn *insn)
 {
   /* NEXT and INSN reside in one ebb.  */
   return BLOCK_TO_BB (BLOCK_NUM (next)) == BLOCK_TO_BB (BLOCK_NUM (insn));
@@ -2363,7 +2363,7 @@ static const struct sched_deps_info_def rgn_const_sel_sched_deps_info =
 /* Return true if scheduling INSN will trigger finish of scheduling
    current block.  */
 static bool
-rgn_insn_finishes_block_p (rtx insn)
+rgn_insn_finishes_block_p (rtx_insn *insn)
 {
   if (INSN_BB (insn) == target_bb
       && sched_target_n_insns + 1 == target_n_insns)
@@ -2440,9 +2440,9 @@ static sbitmap insn_referenced;
 /* Add dependences so that branches are scheduled to run last in their
    block.  */
 static void
-add_branch_dependences (rtx head, rtx tail)
+add_branch_dependences (rtx_insn *head, rtx_insn *tail)
 {
-  rtx insn, last;
+  rtx_insn *insn, *last;
 
   /* For all branches, calls, uses, clobbers, cc0 setters, and instructions
      that can throw exceptions, force them to remain in order at the end of
@@ -3425,7 +3425,7 @@ schedule_insns (void)
 
 /* INSN has been added to/removed from current region.  */
 static void
-rgn_add_remove_insn (rtx insn, int remove_p)
+rgn_add_remove_insn (rtx_insn *insn, int remove_p)
 {
   if (!remove_p)
     rgn_n_insns++;
@@ -3580,7 +3580,7 @@ rgn_fix_recovery_cfg (int bbi, int check_bbi, int check_bb_nexti)
 /* Return next block in ebb chain.  For parameter meaning please refer to
    sched-int.h: struct sched_info: advance_target_bb.  */
 static basic_block
-advance_target_bb (basic_block bb, rtx insn)
+advance_target_bb (basic_block bb, rtx_insn *insn)
 {
   if (insn)
     return 0;
diff --git a/gcc/sel-sched-dump.c b/gcc/sel-sched-dump.c
index 97dcb93..8dc82c9 100644
--- a/gcc/sel-sched-dump.c
+++ b/gcc/sel-sched-dump.c
@@ -567,7 +567,7 @@ dump_hard_reg_set (const char *prefix, HARD_REG_SET set)
 
 /* Pretty print INSN.  This is used as a hook.  */
 const char *
-sel_print_insn (const_rtx insn, int aligned ATTRIBUTE_UNUSED)
+sel_print_insn (const rtx_insn *insn, int aligned ATTRIBUTE_UNUSED)
 {
   static char buf[80];
 
diff --git a/gcc/sel-sched-dump.h b/gcc/sel-sched-dump.h
index f176354..cb93981 100644
--- a/gcc/sel-sched-dump.h
+++ b/gcc/sel-sched-dump.h
@@ -196,7 +196,7 @@ extern bool sched_dump_to_dot_p;
 
 /* Functions from sel-sched-dump.c.  */
 extern void sel_print (const char *fmt, ...) ATTRIBUTE_PRINTF_1;
-extern const char * sel_print_insn (const_rtx, int);
+extern const char * sel_print_insn (const rtx_insn *, int);
 extern void free_sel_dump_data (void);
 
 extern void block_start (void);
diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 9e9abad..5d4c12c 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -516,7 +516,7 @@ void
 advance_deps_context (deps_t dc, insn_t insn)
 {
   sched_deps_info = &advance_deps_context_sched_deps_info;
-  deps_analyze_insn (dc, insn);
+  deps_analyze_insn (dc, as_a <rtx_insn *> (insn));
 }
 \f
 
@@ -2753,7 +2753,7 @@ deps_init_id (idata_t id, insn_t insn, bool force_unique_p)
 
   sched_deps_info = &deps_init_id_sched_deps_info;
 
-  deps_analyze_insn (dc, insn);
+  deps_analyze_insn (dc, as_a <rtx_insn *> (insn));
 
   free_deps (dc);
 
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index d9ec878..fe82a78 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -4022,7 +4022,7 @@ convert_vec_av_set_to_ready (void)
       insn_t insn = VINSN_INSN_RTX (vi);
 
       ready_try[n] = 0;
-      ready.vec[n] = insn;
+      ready.vec[n] = as_a <rtx_insn *> (insn);
     }
 }
 
@@ -4161,7 +4161,7 @@ invoke_reorder_hooks (fence_t fence)
   if (issue_more && ran_hook)
     {
       int i, j, n;
-      rtx *arr = ready.vec;
+      rtx_insn **arr = ready.vec;
       expr_t *vec = vec_av_set.address ();
 
       for (i = 0, n = ready.n_ready; i < n; i++)
diff --git a/gcc/target.def b/gcc/target.def
index 5fe2e82..594d2d3 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -1027,7 +1027,7 @@ is the timer tick of the scheduler.  You may modify the ready list and\n\
 the number of ready insns.  The return value is the number of insns that\n\
 can issue this cycle; normally this is just @code{issue_rate}.  See also\n\
 @samp{TARGET_SCHED_REORDER2}.",
- int, (FILE *file, int verbose, rtx *ready, int *n_readyp, int clock), NULL)
+ int, (FILE *file, int verbose, rtx_insn **ready, int *n_readyp, int clock), NULL)
 
 DEFHOOK
 (reorder2,
@@ -1039,7 +1039,7 @@ return the number of insns to be scheduled in the same cycle.  Defining\n\
 this hook can be useful if there are frequent situations where\n\
 scheduling one insn causes other insns to become ready in the same\n\
 cycle.  These other insns can then be taken into account properly.",
- int, (FILE *file, int verbose, rtx *ready, int *n_readyp, int clock), NULL)
+ int, (FILE *file, int verbose, rtx_insn **ready, int *n_readyp, int clock), NULL)
 
 DEFHOOK
 (macro_fusion_p,
@@ -1066,7 +1066,7 @@ example, it can be used for better insn classification if it requires\n\
 analysis of dependencies.  This hook can use backward and forward\n\
 dependencies of the insn scheduler because they are already\n\
 calculated.",
- void, (rtx head, rtx tail), NULL)
+ void, (rtx_insn *head, rtx_insn *tail), NULL)
 
 /* The values of the following four members are pointers to functions
    used to simplify the automaton descriptions.  dfa_pre_cycle_insn and
-- 
1.8.5.3

Re: [PATCH 169/236] Strengthen haifa_sched_info callbacks and 3 scheduler hooks

[Jeff Law]

On 08/06/14 11:22, David Malcolm wrote:
> gcc/
> 	* target.def (reorder): Strengthen param "ready" of this DEFHOOK
> 	from rtx * to rtx_insn **.
> 	(reorder2): Likewise.
> 	(dependencies_evaluation_hook): Strengthen params "head", "tail"
> 	from rtx to rtx_insn *.
>
> 	* doc/tm.texi: Update mechanically for above change to target.def.
>
> 	* sched-int.h (note_list): Strengthen this variable from rtx to
> 	rtx_insn *.
> 	(remove_notes): Likewise for both params.
> 	(restore_other_notes): Likewise for return type and first param.
> 	(struct ready_list): Strengthen field "vec" from rtx * to
> 	rtx_insn **.
> 	(struct dep_replacement): Strenghten field "insn" from rtx to
> 	rtx_insn *.
> 	(struct deps_desc): Likewise for fields "last_debug_insn",
> 	"last_args_size".
> 	(struct haifa_sched_info): Likewise for callback field
> 	"can_schedule_ready_p"'s param, for first param of "new_ready"
> 	callback field, for both params of "rank" callback field, for
> 	first field of "print_insn" callback field (with a const), for
> 	both params of "contributes_to_priority" callback, for param
> 	of "insn_finishes_block_p" callback, for fields "prev_head",
> 	"next_tail", "head", "tail", for first param of "add_remove_insn"
> 	callback, for first param of "begin_schedule_ready" callback, for
> 	both params of "begin_move_insn" callback, and for second param
> 	of "advance_target_bb" callback.
> 	(add_dependence): Likewise for params 1 and 2.
> 	(sched_analyze): Likewise for params 2 and 3.
> 	(deps_analyze_insn): Likewise for param 2.
> 	(ready_element): Likewise for return type.
> 	(ready_lastpos): Strengthen return type from rtx * to rtx_insn **.
> 	(try_ready): Strenghten param from rtx to rtx_insn *.
> 	(sched_emit_insn): Likewise for return type.
> 	(record_delay_slot_pair): Likewise for params 1 and 2.
> 	(add_delay_dependencies): Likewise for param.
> 	(contributes_to_priority): Likewise for both params.
> 	(find_modifiable_mems): Likewise.
>
> 	* config/arm/arm.c (cortexa7_sched_reorder):  Strengthen param
> 	"ready" from rtx * to rtx_insn **.  Strengthen locals "insn",
> 	"first_older_only_insn" from rtx to rtx_insn *.
> 	(arm_sched_reorder):  Strengthen param "ready"  from rtx * to
> 	rtx_insn **.
>
> 	* config/c6x/c6x.c (struct c6x_sched_context): Strengthen field
> 	"last_scheduled_iter0" from rtx to rtx_insn *.
> 	(init_sched_state): Replace use of NULL_RTX with NULL for insn.
> 	(c6x_sched_reorder_1): Strengthen param "ready" and locals
> 	"e_ready", "insnp" from rtx * to rtx_insn **.  Strengthen local
> 	"insn" from rtx to rtx_insn *.
> 	(c6x_sched_reorder): Strengthen param "ready" from rtx * to
> 	rtx_insn **.
> 	(c6x_sched_reorder2): Strengthen param "ready" and locals
> 	"e_ready", "insnp" from rtx * to rtx_insn **. Strengthen local
> 	"insn" from rtx to rtx_insn *.
> 	(c6x_variable_issue):  Add a checked cast when assigning from insn
> 	to ss.last_scheduled_iter0.
> 	(split_delayed_branch): Strengthen param "insn" and local "i1"
> 	from rtx to rtx_insn *.
> 	(split_delayed_nonbranch): Likewise.
> 	(undo_split_delayed_nonbranch): Likewise for local "insn".
> 	(hwloop_optimize): Likewise for locals "seq", "insn", "prev",
> 	"entry_after", "end_packet", "head_insn", "tail_insn",
> 	"new_insns", "last_insn", "this_iter", "prev_stage_insn".
> 	Strengthen locals "orig_vec", "copies", "insn_copies" from rtx *
> 	to rtx_insn **.  Remove now-redundant checked cast on last_insn,
> 	but add a checked cast on loop->start_label.  Consolidate calls to
> 	avoid assigning result of gen_spkernel to "insn", now an
> 	rtx_insn *.
>
> 	* config/i386/i386.c (do_reorder_for_imul): Strengthen param
> 	"ready" from rtx * to rtx_insn **.  Strengthen local "insn" from
> 	rtx to rtx_insn *.
> 	(swap_top_of_ready_list): Strengthen param "ready" from rtx * to
> 	rtx_insn **.  Strengthen locals "top", "next" from rtx to
> 	rtx_insn *.
> 	(ix86_sched_reorder): Strengthen param "ready" from rtx * to
> 	rtx_insn **.  Strengthen local "insn" from rtx to rtx_insn *.
> 	(add_parameter_dependencies): Strengthen params "call", "head" and
> 	locals "insn", "last", "first_arg" from rtx to rtx_insn *.
> 	(avoid_func_arg_motion): Likewise for params "first_arg", "insn".
> 	(add_dependee_for_func_arg): Likewise for param "arg" and local
> 	"insn".
> 	(ix86_dependencies_evaluation_hook): Likewise for params "head",
> 	"tail" and locals "insn", "first_arg".
>
> 	* config/ia64/ia64.c (ia64_dependencies_evaluation_hook): Likewise
> 	for params "head", "tail" and locals "insn", "next", "next_tail".
> 	(ia64_dfa_sched_reorder): Strengthen param "ready" and locals
> 	"e_ready", "insnp" from rtx * to rtx_insn **. Strengthen locals
> 	"insn", "lowest", "highest" from rtx to rtx_insn *.
> 	(ia64_sched_reorder): Strengthen param "ready" from rtx * to
> 	rtx_insn **.
> 	(ia64_sched_reorder2): Likewise.
>
> 	* config/mep/mep.c (mep_find_ready_insn): Strengthen return type
> 	and local "insn" from rtx to rtx_insn *.  Strengthen param "ready"
> 	from rtx * to rtx_insn **.
> 	(mep_move_ready_insn): Strengthen param "ready" from rtx * to
> 	rtx_insn **.
> 	(mep_print_sched_insn): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(mep_sched_reorder): Strengthen param "ready" from rtx * to
> 	rtx_insn **.  Strengthen locals "core_insn", "cop_insn" from rtx
> 	to rtx_insn *.
>
> 	* config/mips/mips.c (mips_promote_ready): Strengthen param "ready"
> 	from rtx * to rtx_insn **.  Strengthen local "new_head" from rtx
> 	to rtx_insn *.
> 	(mips_maybe_swap_ready): Strengthen param "ready" from rtx * to
> 	rtx_insn **.  Strengthen local "temp" from rtx to rtx_insn *.
> 	(mips_macc_chains_reorder): Strengthen param "ready" from rtx * to
> 	rtx_insn **.
> 	(vr4130_reorder): Likewise.
> 	(mips_74k_agen_reorder): Likewise.  Strengthen local "insn" from
> 	rtx to rtx_insn *.
> 	(mips_sched_reorder_1): Strengthen param "ready" from rtx * to
> 	rtx_insn **.
> 	(mips_sched_reorder): Likewise.
> 	(mips_sched_reorder2): Likewise.
>
> 	* config/picochip/picochip.c (picochip_sched_reorder): Likewise.
>
> 	* config/rs6000/rs6000.c (rs6000_sched_reorder): Likewise.
> 	Strengthen local "tmp" from rtx to rtx_insn *.
> 	(rs6000_sched_reorder2): Likewise.
>
> 	* config/s390/s390.c (s390_z10_prevent_earlyload_conflicts):
> 	Likewise.  Update sizeof(rtx) to sizeof(rtx_insn *) in memmove.
> 	(s390_sched_reorder): Strengthen param "ready" from rtx * to
> 	rtx_insn **.  Strengthen local "tmp" from rtx to rtx_insn *.
>
> 	* config/sh/sh.c (rank_for_reorder): Strengthen locals "tmp",
> 	"tmp2" from rtx to rtx_insn *.
> 	(swap_reorder): Strengthen param "a" from rtx * to rtx_insn **.
> 	Strengthen local "insn" from rtx to rtx_insn *.
> 	(ready_reorder): Strengthen param "ready" from rtx * to
> 	rtx_insn **.  Update sizeof(rtx) to sizeof(rtx_insn *) in qsort.
> 	(sh_reorder):  Strengthen param "ready" from rtx * to rtx_insn **.
> 	(sh_reorder2): Likewise.
>
> 	* config/spu/spu.c (spu_sched_reorder): Likewise.  Strengthen
> 	local "insn" from rtx to rtx_insn *.
>
> 	* haifa-sched.c (note_list): Strengthen this variable from rtx to
> 	rtx_insn *.
> 	(scheduled_insns): Strengthen this variable from vec<rtx> to
> 	vec<rtx_insn *>.
> 	(set_modulo_params): Likewise for locals "i1", "i2".
> 	(record_delay_slot_pair): Likewise for params "i1", "i2".
> 	(add_delay_dependencies): Likewise for param "insn".
> 	(cond_clobbered_p): Likewise.
> 	(recompute_todo_spec): Likewise for local "prev".
> 	(last_scheduled_insn): Likewise for this variable.
> 	(nonscheduled_insns_begin): Likewise.
> 	(model_set_excess_costs): Strengthen param "insns" from rtx * to
> 	rtx_insn **.
> 	(rank_for_schedule): Strengthen locals "tmp", "tmp2" from rtx to
> 	rtx_insn *.
> 	(swap_sort): Strengthen param "a" from rtx * to rtx_insn **.
> 	Strengthen local "insn" from rtx to rtx_insn *.
> 	(queue_insn): Strengthen param "insn" from rtx to rtx_insn *.
> 	(ready_lastpos): Strengthen return type from rtx * to rtx_insn **.
> 	(ready_add): Strengthen param "insn" from rtx to rtx_insn *.
> 	(ready_remove_first): Likewise for return type and local "t".
> 	(ready_element): Likewise for return type.
> 	(ready_remove): Likewise for return type and local "t".
> 	(ready_sort): Strengthen local "first" from rtx * to rtx_insn **.
> 	(check_clobbered_conditions): Strengthen local "x" from rtx to
> 	rtx_insn *, adding a checked cast.
> 	(schedule_insn): Likewise for param "insn".
> 	(remove_notes): Likewise for params "head", "tail" and locals
> 	"next_tail", "insn", "next".
> 	(struct haifa_saved_data): Likewise for fields
> 	"last_scheduled_insn", "nonscheduled_insns_begin".
> 	(save_backtrack_point): Update for change to field "vec" of
> 	struct ready_list.
> 	(toggle_cancelled_flags): Strengthen local "first" from rtx * to
> 	rtx_insn **.
> 	(restore_last_backtrack_point): Likewise.  Strengthen local "insn"
> 	from rtx to rtx_insn *
> 	(resolve_dependencies): Strengthen param "insn" from rtx to
> 	rtx_insn *
> 	(restore_other_notes): Likewise for return type, for param "head"
> 	and local "note_head".
> 	(undo_all_replacements): Likewise for local "insn".
> 	(first_nonscheduled_insn): Likewise for return type and local "insn".
> 	(queue_to_ready): Likewise for local "insn", adding checked casts.
> 	(early_queue_to_ready): Likewise for local "insn".
> 	(debug_ready_list_1): Strengthen local "p" from rtx * to
> 	rtx_insn **.
> 	(move_insn): Strengthen param "insn" and local "note" from rtx to
> 	rtx_insn *
> 	(insn_finishes_cycle_p): Likewise for param "insn".
> 	(max_issue): Likewise for local "insn".
> 	(choose_ready): Likewise.  Strengthen param "insn_ptr" from rtx *
> 	to rtx_insn **.
> 	(commit_schedule): Strengthen param "prev_head" and local "insn"
> 	from rtx to rtx_insn *
> 	(prune_ready_list): Likewise for local "insn".
> 	(schedule_block): Likewise for locals "prev_head", "head", "tail",
> 	"skip_insn", "insn", "failed_insn", "x", adding a checked cast.
> 	(set_priorities): Likewise for local "prev_head".
> 	(try_ready): Likewise for param "next".
> 	(fix_tick_ready): Likewise.
> 	(change_queue_index): Likewise.
> 	(sched_extend_ready_list): Update for change to field "vec" of
> 	struct ready_list.
> 	(generate_recovery_code): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(begin_speculative_block): Likewise.
> 	(create_check_block_twin): Likewise for param "insn" and locals
> 	"label", "check", "twin".  Introduce local "check_pat" to avoid
> 	"check" being used as a plain rtx before being used as an insn.
> 	(fix_recovery_deps): Add a checked cast to rtx_insn * when
> 	extracting elements from ready_list.
> 	(sched_remove_insn): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(sched_emit_insn): Likewise for return type.
> 	(ready_remove_first_dispatch): Likewise for return type and local
> 	"insn".
>
> 	* hw-doloop.c (discover_loop): Add a checked cast to rtx_insn *.
>
> 	* modulo-sched.c (sms_print_insn): Strengthen from const_rtx to
> 	const rtx_insn *.
>
> 	* sched-deps.c (add_dependence): Strengthen params "con", "pro"
> 	from rtx to rtx_insn *.
> 	(add_dependence_list): Likewise for param "insn".  Add a checked
> 	cast.
> 	(add_dependence_list_and_free): Strengthen param "insn" from rtx
> 	to rtx_insn *.  Strengthen param "list_p" from rtx * to
> 	rtx_insn **.
> 	(chain_to_prev_insn): Strengthen param "insn" and locals
> 	"prec_nonnote", "i" from rtx to rtx_insn *.
> 	(flush_pending_lists): Likewise for param "insn".
> 	(cur_insn): Likewise for this variable.
> 	(haifa_start_insn): Add a checked cast.
> 	(note_dep): Strengthen param "e" from rtx to rtx_insn *.
> 	(sched_analyze_reg): Likewise for param "insn".
> 	(sched_analyze_1): Likewise.
> 	(sched_analyze_2): Likewise.  Add checked casts.
> 	(sched_analyze_insn): Likewise.  Also for local "prev".
> 	(deps_analyze_insn): Likewise for param "insn".
> 	(sched_analyze): Likewise for params "head", "tail" and local "insn".
> 	(add_dependence_1): Likewise for params "insn", "elem".
> 	(struct mem_inc_info): Likewise for fields "inc_insn", "mem_insn".
> 	(parse_add_or_inc): Likewise for param "insn".
> 	(find_inc): Likewise for local "inc_cand".
> 	(find_modifiable_mems): Likewise for params "head", "tail" and
> 	locals "insn", "next_tail".
>
> 	* sched-ebb.c (init_ready_list): Likewise for local "insn".
> 	(begin_schedule_ready): Likewise for param "insn".
> 	(begin_move_insn): Likewise for params "insn" and "last".
> 	(ebb_print_insn): Strengthen param "insn" from const_rtx to
> 	const rtx_insn *.
> 	(rank): Strengthen params "insn1", "insn2" from rtx to rtx_insn *.
> 	(ebb_contributes_to_priority): Likewise for params "next", "insn".
> 	(ebb_add_remove_insn): Likewise for param "insn".
> 	(advance_target_bb): Likewise.
>
> 	* sched-rgn.c (rgn_estimate_number_of_insns): Likewise for local
> 	"insn".
> 	(check_live): Likewise for param "insn".
> 	(init_ready_list): Likewise for local "insn".
> 	(can_schedule_ready_p): Likewise for param "insn".
> 	(begin_schedule_ready): Likewise.
> 	(new_ready): Likewise for param "next".
> 	(rgn_print_insn): Likewise for param "insn".
> 	(rgn_rank): Likewise for params "insn1", "insn2".
> 	(contributes_to_priority): Likewise for params "next", "insn".
> 	(rgn_insn_finishes_block_p): Likewise for param "insn".
> 	(add_branch_dependences): Likewise for params "head", "tail" and
> 	locals "insn", "last".
> 	(rgn_add_remove_insn): Likewise for param "insn".
> 	(advance_target_bb): Likewise.
>
> 	* sel-sched-dump.c (sel_print_insn): Strengthen param "insn" from
> 	const_rtx to const rtx_insn *.
>
> 	* sel-sched-dump.h (sel_print_insn): Likewise.
>
> 	* sel-sched-ir.c (advance_deps_context): Add a checked cast.
> 	(deps_init_id): Likewise.
>
> 	* sel-sched.c (convert_vec_av_set_to_ready): Likewise.
> 	(invoke_reorder_hooks): Strengthen local "arr" from rtx * to
> 	rtx_insn **.
FWIW, this is what I expected to see a lot more regularly.  This looks 
like the first patch that makes the use of rtx_insn pervasive.

But even so, I think it still points to places where we want to continue 
to push these concepts further.  For example the start_label field in 
the hwloop_info structure.  I don't need you to fix it now, but just 
wanted to point out an example of things we can improve further.  A grep 
for as_a <rtx_insn *> when this series goes in would make a good for a 
todo list :-)  There's other introductions of as_a, but they're clearly 
scheduler related and I'm sure there's a later patch that strengthens 
scheduler stuff.

Or maybe that particular examples goes away...  I didn't go digging hard 
for further scaffolding teardown.

Anyway, this patch is OK.  As are patches: #170-193

As a follow-up, in patch #172, you add a few new ilist functions. 
They're pretty trivial, but still need a function comment. Similarly in 
patch 191 you add change_regs_in_insn without a function comment.

Jeff

Re: [PATCH 169/236] Strengthen haifa_sched_info callbacks and 3 scheduler hooks

[David Malcolm]

On Fri, 2014-08-15 at 16:03 -0600, Jeff Law wrote:
> On 08/06/14 11:22, David Malcolm wrote:
> > gcc/
> > 	* target.def (reorder): Strengthen param "ready" of this DEFHOOK
> > 	from rtx * to rtx_insn **.
> > 	(reorder2): Likewise.
> > 	(dependencies_evaluation_hook): Strengthen params "head", "tail"
> > 	from rtx to rtx_insn *.
> >
> > 	* doc/tm.texi: Update mechanically for above change to target.def.
> >
> > 	* sched-int.h (note_list): Strengthen this variable from rtx to
> > 	rtx_insn *.
> > 	(remove_notes): Likewise for both params.
> > 	(restore_other_notes): Likewise for return type and first param.
> > 	(struct ready_list): Strengthen field "vec" from rtx * to
> > 	rtx_insn **.
> > 	(struct dep_replacement): Strenghten field "insn" from rtx to
> > 	rtx_insn *.
> > 	(struct deps_desc): Likewise for fields "last_debug_insn",
> > 	"last_args_size".
> > 	(struct haifa_sched_info): Likewise for callback field
> > 	"can_schedule_ready_p"'s param, for first param of "new_ready"
> > 	callback field, for both params of "rank" callback field, for
> > 	first field of "print_insn" callback field (with a const), for
> > 	both params of "contributes_to_priority" callback, for param
> > 	of "insn_finishes_block_p" callback, for fields "prev_head",
> > 	"next_tail", "head", "tail", for first param of "add_remove_insn"
> > 	callback, for first param of "begin_schedule_ready" callback, for
> > 	both params of "begin_move_insn" callback, and for second param
> > 	of "advance_target_bb" callback.
> > 	(add_dependence): Likewise for params 1 and 2.
> > 	(sched_analyze): Likewise for params 2 and 3.
> > 	(deps_analyze_insn): Likewise for param 2.
> > 	(ready_element): Likewise for return type.
> > 	(ready_lastpos): Strengthen return type from rtx * to rtx_insn **.
> > 	(try_ready): Strenghten param from rtx to rtx_insn *.
> > 	(sched_emit_insn): Likewise for return type.
> > 	(record_delay_slot_pair): Likewise for params 1 and 2.
> > 	(add_delay_dependencies): Likewise for param.
> > 	(contributes_to_priority): Likewise for both params.
> > 	(find_modifiable_mems): Likewise.
> >
> > 	* config/arm/arm.c (cortexa7_sched_reorder):  Strengthen param
> > 	"ready" from rtx * to rtx_insn **.  Strengthen locals "insn",
> > 	"first_older_only_insn" from rtx to rtx_insn *.
> > 	(arm_sched_reorder):  Strengthen param "ready"  from rtx * to
> > 	rtx_insn **.
> >
> > 	* config/c6x/c6x.c (struct c6x_sched_context): Strengthen field
> > 	"last_scheduled_iter0" from rtx to rtx_insn *.
> > 	(init_sched_state): Replace use of NULL_RTX with NULL for insn.
> > 	(c6x_sched_reorder_1): Strengthen param "ready" and locals
> > 	"e_ready", "insnp" from rtx * to rtx_insn **.  Strengthen local
> > 	"insn" from rtx to rtx_insn *.
> > 	(c6x_sched_reorder): Strengthen param "ready" from rtx * to
> > 	rtx_insn **.
> > 	(c6x_sched_reorder2): Strengthen param "ready" and locals
> > 	"e_ready", "insnp" from rtx * to rtx_insn **. Strengthen local
> > 	"insn" from rtx to rtx_insn *.
> > 	(c6x_variable_issue):  Add a checked cast when assigning from insn
> > 	to ss.last_scheduled_iter0.
> > 	(split_delayed_branch): Strengthen param "insn" and local "i1"
> > 	from rtx to rtx_insn *.
> > 	(split_delayed_nonbranch): Likewise.
> > 	(undo_split_delayed_nonbranch): Likewise for local "insn".
> > 	(hwloop_optimize): Likewise for locals "seq", "insn", "prev",
> > 	"entry_after", "end_packet", "head_insn", "tail_insn",
> > 	"new_insns", "last_insn", "this_iter", "prev_stage_insn".
> > 	Strengthen locals "orig_vec", "copies", "insn_copies" from rtx *
> > 	to rtx_insn **.  Remove now-redundant checked cast on last_insn,
> > 	but add a checked cast on loop->start_label.  Consolidate calls to
> > 	avoid assigning result of gen_spkernel to "insn", now an
> > 	rtx_insn *.
> >
> > 	* config/i386/i386.c (do_reorder_for_imul): Strengthen param
> > 	"ready" from rtx * to rtx_insn **.  Strengthen local "insn" from
> > 	rtx to rtx_insn *.
> > 	(swap_top_of_ready_list): Strengthen param "ready" from rtx * to
> > 	rtx_insn **.  Strengthen locals "top", "next" from rtx to
> > 	rtx_insn *.
> > 	(ix86_sched_reorder): Strengthen param "ready" from rtx * to
> > 	rtx_insn **.  Strengthen local "insn" from rtx to rtx_insn *.
> > 	(add_parameter_dependencies): Strengthen params "call", "head" and
> > 	locals "insn", "last", "first_arg" from rtx to rtx_insn *.
> > 	(avoid_func_arg_motion): Likewise for params "first_arg", "insn".
> > 	(add_dependee_for_func_arg): Likewise for param "arg" and local
> > 	"insn".
> > 	(ix86_dependencies_evaluation_hook): Likewise for params "head",
> > 	"tail" and locals "insn", "first_arg".
> >
> > 	* config/ia64/ia64.c (ia64_dependencies_evaluation_hook): Likewise
> > 	for params "head", "tail" and locals "insn", "next", "next_tail".
> > 	(ia64_dfa_sched_reorder): Strengthen param "ready" and locals
> > 	"e_ready", "insnp" from rtx * to rtx_insn **. Strengthen locals
> > 	"insn", "lowest", "highest" from rtx to rtx_insn *.
> > 	(ia64_sched_reorder): Strengthen param "ready" from rtx * to
> > 	rtx_insn **.
> > 	(ia64_sched_reorder2): Likewise.
> >
> > 	* config/mep/mep.c (mep_find_ready_insn): Strengthen return type
> > 	and local "insn" from rtx to rtx_insn *.  Strengthen param "ready"
> > 	from rtx * to rtx_insn **.
> > 	(mep_move_ready_insn): Strengthen param "ready" from rtx * to
> > 	rtx_insn **.
> > 	(mep_print_sched_insn): Strengthen param "insn" from rtx to
> > 	rtx_insn *.
> > 	(mep_sched_reorder): Strengthen param "ready" from rtx * to
> > 	rtx_insn **.  Strengthen locals "core_insn", "cop_insn" from rtx
> > 	to rtx_insn *.
> >
> > 	* config/mips/mips.c (mips_promote_ready): Strengthen param "ready"
> > 	from rtx * to rtx_insn **.  Strengthen local "new_head" from rtx
> > 	to rtx_insn *.
> > 	(mips_maybe_swap_ready): Strengthen param "ready" from rtx * to
> > 	rtx_insn **.  Strengthen local "temp" from rtx to rtx_insn *.
> > 	(mips_macc_chains_reorder): Strengthen param "ready" from rtx * to
> > 	rtx_insn **.
> > 	(vr4130_reorder): Likewise.
> > 	(mips_74k_agen_reorder): Likewise.  Strengthen local "insn" from
> > 	rtx to rtx_insn *.
> > 	(mips_sched_reorder_1): Strengthen param "ready" from rtx * to
> > 	rtx_insn **.
> > 	(mips_sched_reorder): Likewise.
> > 	(mips_sched_reorder2): Likewise.
> >
> > 	* config/picochip/picochip.c (picochip_sched_reorder): Likewise.
> >
> > 	* config/rs6000/rs6000.c (rs6000_sched_reorder): Likewise.
> > 	Strengthen local "tmp" from rtx to rtx_insn *.
> > 	(rs6000_sched_reorder2): Likewise.
> >
> > 	* config/s390/s390.c (s390_z10_prevent_earlyload_conflicts):
> > 	Likewise.  Update sizeof(rtx) to sizeof(rtx_insn *) in memmove.
> > 	(s390_sched_reorder): Strengthen param "ready" from rtx * to
> > 	rtx_insn **.  Strengthen local "tmp" from rtx to rtx_insn *.
> >
> > 	* config/sh/sh.c (rank_for_reorder): Strengthen locals "tmp",
> > 	"tmp2" from rtx to rtx_insn *.
> > 	(swap_reorder): Strengthen param "a" from rtx * to rtx_insn **.
> > 	Strengthen local "insn" from rtx to rtx_insn *.
> > 	(ready_reorder): Strengthen param "ready" from rtx * to
> > 	rtx_insn **.  Update sizeof(rtx) to sizeof(rtx_insn *) in qsort.
> > 	(sh_reorder):  Strengthen param "ready" from rtx * to rtx_insn **.
> > 	(sh_reorder2): Likewise.
> >
> > 	* config/spu/spu.c (spu_sched_reorder): Likewise.  Strengthen
> > 	local "insn" from rtx to rtx_insn *.
> >
> > 	* haifa-sched.c (note_list): Strengthen this variable from rtx to
> > 	rtx_insn *.
> > 	(scheduled_insns): Strengthen this variable from vec<rtx> to
> > 	vec<rtx_insn *>.
> > 	(set_modulo_params): Likewise for locals "i1", "i2".
> > 	(record_delay_slot_pair): Likewise for params "i1", "i2".
> > 	(add_delay_dependencies): Likewise for param "insn".
> > 	(cond_clobbered_p): Likewise.
> > 	(recompute_todo_spec): Likewise for local "prev".
> > 	(last_scheduled_insn): Likewise for this variable.
> > 	(nonscheduled_insns_begin): Likewise.
> > 	(model_set_excess_costs): Strengthen param "insns" from rtx * to
> > 	rtx_insn **.
> > 	(rank_for_schedule): Strengthen locals "tmp", "tmp2" from rtx to
> > 	rtx_insn *.
> > 	(swap_sort): Strengthen param "a" from rtx * to rtx_insn **.
> > 	Strengthen local "insn" from rtx to rtx_insn *.
> > 	(queue_insn): Strengthen param "insn" from rtx to rtx_insn *.
> > 	(ready_lastpos): Strengthen return type from rtx * to rtx_insn **.
> > 	(ready_add): Strengthen param "insn" from rtx to rtx_insn *.
> > 	(ready_remove_first): Likewise for return type and local "t".
> > 	(ready_element): Likewise for return type.
> > 	(ready_remove): Likewise for return type and local "t".
> > 	(ready_sort): Strengthen local "first" from rtx * to rtx_insn **.
> > 	(check_clobbered_conditions): Strengthen local "x" from rtx to
> > 	rtx_insn *, adding a checked cast.
> > 	(schedule_insn): Likewise for param "insn".
> > 	(remove_notes): Likewise for params "head", "tail" and locals
> > 	"next_tail", "insn", "next".
> > 	(struct haifa_saved_data): Likewise for fields
> > 	"last_scheduled_insn", "nonscheduled_insns_begin".
> > 	(save_backtrack_point): Update for change to field "vec" of
> > 	struct ready_list.
> > 	(toggle_cancelled_flags): Strengthen local "first" from rtx * to
> > 	rtx_insn **.
> > 	(restore_last_backtrack_point): Likewise.  Strengthen local "insn"
> > 	from rtx to rtx_insn *
> > 	(resolve_dependencies): Strengthen param "insn" from rtx to
> > 	rtx_insn *
> > 	(restore_other_notes): Likewise for return type, for param "head"
> > 	and local "note_head".
> > 	(undo_all_replacements): Likewise for local "insn".
> > 	(first_nonscheduled_insn): Likewise for return type and local "insn".
> > 	(queue_to_ready): Likewise for local "insn", adding checked casts.
> > 	(early_queue_to_ready): Likewise for local "insn".
> > 	(debug_ready_list_1): Strengthen local "p" from rtx * to
> > 	rtx_insn **.
> > 	(move_insn): Strengthen param "insn" and local "note" from rtx to
> > 	rtx_insn *
> > 	(insn_finishes_cycle_p): Likewise for param "insn".
> > 	(max_issue): Likewise for local "insn".
> > 	(choose_ready): Likewise.  Strengthen param "insn_ptr" from rtx *
> > 	to rtx_insn **.
> > 	(commit_schedule): Strengthen param "prev_head" and local "insn"
> > 	from rtx to rtx_insn *
> > 	(prune_ready_list): Likewise for local "insn".
> > 	(schedule_block): Likewise for locals "prev_head", "head", "tail",
> > 	"skip_insn", "insn", "failed_insn", "x", adding a checked cast.
> > 	(set_priorities): Likewise for local "prev_head".
> > 	(try_ready): Likewise for param "next".
> > 	(fix_tick_ready): Likewise.
> > 	(change_queue_index): Likewise.
> > 	(sched_extend_ready_list): Update for change to field "vec" of
> > 	struct ready_list.
> > 	(generate_recovery_code): Strengthen param "insn" from rtx to
> > 	rtx_insn *.
> > 	(begin_speculative_block): Likewise.
> > 	(create_check_block_twin): Likewise for param "insn" and locals
> > 	"label", "check", "twin".  Introduce local "check_pat" to avoid
> > 	"check" being used as a plain rtx before being used as an insn.
> > 	(fix_recovery_deps): Add a checked cast to rtx_insn * when
> > 	extracting elements from ready_list.
> > 	(sched_remove_insn): Strengthen param "insn" from rtx to
> > 	rtx_insn *.
> > 	(sched_emit_insn): Likewise for return type.
> > 	(ready_remove_first_dispatch): Likewise for return type and local
> > 	"insn".
> >
> > 	* hw-doloop.c (discover_loop): Add a checked cast to rtx_insn *.
> >
> > 	* modulo-sched.c (sms_print_insn): Strengthen from const_rtx to
> > 	const rtx_insn *.
> >
> > 	* sched-deps.c (add_dependence): Strengthen params "con", "pro"
> > 	from rtx to rtx_insn *.
> > 	(add_dependence_list): Likewise for param "insn".  Add a checked
> > 	cast.
> > 	(add_dependence_list_and_free): Strengthen param "insn" from rtx
> > 	to rtx_insn *.  Strengthen param "list_p" from rtx * to
> > 	rtx_insn **.
> > 	(chain_to_prev_insn): Strengthen param "insn" and locals
> > 	"prec_nonnote", "i" from rtx to rtx_insn *.
> > 	(flush_pending_lists): Likewise for param "insn".
> > 	(cur_insn): Likewise for this variable.
> > 	(haifa_start_insn): Add a checked cast.
> > 	(note_dep): Strengthen param "e" from rtx to rtx_insn *.
> > 	(sched_analyze_reg): Likewise for param "insn".
> > 	(sched_analyze_1): Likewise.
> > 	(sched_analyze_2): Likewise.  Add checked casts.
> > 	(sched_analyze_insn): Likewise.  Also for local "prev".
> > 	(deps_analyze_insn): Likewise for param "insn".
> > 	(sched_analyze): Likewise for params "head", "tail" and local "insn".
> > 	(add_dependence_1): Likewise for params "insn", "elem".
> > 	(struct mem_inc_info): Likewise for fields "inc_insn", "mem_insn".
> > 	(parse_add_or_inc): Likewise for param "insn".
> > 	(find_inc): Likewise for local "inc_cand".
> > 	(find_modifiable_mems): Likewise for params "head", "tail" and
> > 	locals "insn", "next_tail".
> >
> > 	* sched-ebb.c (init_ready_list): Likewise for local "insn".
> > 	(begin_schedule_ready): Likewise for param "insn".
> > 	(begin_move_insn): Likewise for params "insn" and "last".
> > 	(ebb_print_insn): Strengthen param "insn" from const_rtx to
> > 	const rtx_insn *.
> > 	(rank): Strengthen params "insn1", "insn2" from rtx to rtx_insn *.
> > 	(ebb_contributes_to_priority): Likewise for params "next", "insn".
> > 	(ebb_add_remove_insn): Likewise for param "insn".
> > 	(advance_target_bb): Likewise.
> >
> > 	* sched-rgn.c (rgn_estimate_number_of_insns): Likewise for local
> > 	"insn".
> > 	(check_live): Likewise for param "insn".
> > 	(init_ready_list): Likewise for local "insn".
> > 	(can_schedule_ready_p): Likewise for param "insn".
> > 	(begin_schedule_ready): Likewise.
> > 	(new_ready): Likewise for param "next".
> > 	(rgn_print_insn): Likewise for param "insn".
> > 	(rgn_rank): Likewise for params "insn1", "insn2".
> > 	(contributes_to_priority): Likewise for params "next", "insn".
> > 	(rgn_insn_finishes_block_p): Likewise for param "insn".
> > 	(add_branch_dependences): Likewise for params "head", "tail" and
> > 	locals "insn", "last".
> > 	(rgn_add_remove_insn): Likewise for param "insn".
> > 	(advance_target_bb): Likewise.
> >
> > 	* sel-sched-dump.c (sel_print_insn): Strengthen param "insn" from
> > 	const_rtx to const rtx_insn *.
> >
> > 	* sel-sched-dump.h (sel_print_insn): Likewise.
> >
> > 	* sel-sched-ir.c (advance_deps_context): Add a checked cast.
> > 	(deps_init_id): Likewise.
> >
> > 	* sel-sched.c (convert_vec_av_set_to_ready): Likewise.
> > 	(invoke_reorder_hooks): Strengthen local "arr" from rtx * to
> > 	rtx_insn **.
> FWIW, this is what I expected to see a lot more regularly.  This looks 
> like the first patch that makes the use of rtx_insn pervasive.
> 
> But even so, I think it still points to places where we want to continue 
> to push these concepts further.  For example the start_label field in 
> the hwloop_info structure.  I don't need you to fix it now, but just 
> wanted to point out an example of things we can improve further.

This one gets fixed in patch #229 :)

> A grep 
> for as_a <rtx_insn *> when this series goes in would make a good for a 
> todo list :-)  There's other introductions of as_a, but they're clearly 
> scheduler related and I'm sure there's a later patch that strengthens 
> scheduler stuff.
> 
> Or maybe that particular examples goes away...  I didn't go digging hard 
> for further scaffolding teardown.
> 
> Anyway, this patch is OK.  As are patches: #170-193
> 
> As a follow-up, in patch #172, you add a few new ilist functions. 
> They're pretty trivial, but still need a function comment. Similarly in 
> patch 191 you add change_regs_in_insn without a function comment.

Thanks.  Will fix.

[PATCH 074/236] expr.c: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* expr.c (convert_move): Strengthen local "insns" from rtx to
	rtx_insn *.
	(emit_block_move_via_loop): Strengthen locals "cmp_label" and
	"top_label" from rtx to rtx_code_label *.
	(move_block_to_reg): Strengthen local "insn", "last" from rtx to
	rtx_insn *.
	(emit_single_push_insn): Likewise for locals "prev", "last".
	(store_expr): Strengthen locals "lab1", "lab2", "label" from rtx
	to rtx_code_label *.
	(store_constructor): Likewise for locals "loop_start", "loop_end".
	(expand_cond_expr_using_cmove): Strengthen local "seq" from rtx to
	rtx_insn *.
	(expand_expr_real_2): Likewise.
	(expand_expr_real_1): Strengthen local "label" from rtx to
	rtx_code_label *.
---
 gcc/expr.c | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/gcc/expr.c b/gcc/expr.c
index ba1a36c..0290c4e 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -362,7 +362,8 @@ convert_move (rtx to, rtx from, int unsignedp)
 
   if (to_real)
     {
-      rtx value, insns;
+      rtx value;
+      rtx_insn *insns;
       convert_optab tab;
 
       gcc_assert ((GET_MODE_PRECISION (from_mode)
@@ -470,7 +471,7 @@ convert_move (rtx to, rtx from, int unsignedp)
   if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
       && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
     {
-      rtx insns;
+      rtx_insn *insns;
       rtx lowpart;
       rtx fill_value;
       rtx lowfrom;
@@ -1451,7 +1452,8 @@ static void
 emit_block_move_via_loop (rtx x, rtx y, rtx size,
 			  unsigned int align ATTRIBUTE_UNUSED)
 {
-  rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
+  rtx_code_label *cmp_label, *top_label;
+  rtx iter, x_addr, y_addr, tmp;
   enum machine_mode x_addr_mode = get_address_mode (x);
   enum machine_mode y_addr_mode = get_address_mode (y);
   enum machine_mode iter_mode;
@@ -1505,7 +1507,7 @@ move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
   int i;
 #ifdef HAVE_load_multiple
   rtx pat;
-  rtx last;
+  rtx_insn *last;
 #endif
 
   if (nregs == 0)
@@ -1551,7 +1553,7 @@ move_block_from_reg (int regno, rtx x, int nregs)
 #ifdef HAVE_store_multiple
   if (HAVE_store_multiple)
     {
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
       rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
 				    GEN_INT (nregs));
       if (pat)
@@ -4062,8 +4064,8 @@ static void
 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
 {
   int delta, old_delta = stack_pointer_delta;
-  rtx prev = get_last_insn ();
-  rtx last;
+  rtx_insn *prev = get_last_insn ();
+  rtx_insn *last;
 
   emit_single_push_insn_1 (mode, x, type);
 
@@ -5168,7 +5170,7 @@ store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
 	 side.  This avoids the creation of unnecessary temporaries.
 	 For non-BLKmode, it is more efficient not to do this.  */
 
-      rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
+      rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx ();
 
       do_pending_stack_adjust ();
       NO_DEFER_POP;
@@ -5403,7 +5405,7 @@ store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
 		= expand_expr (copy_size, NULL_RTX, VOIDmode,
 			       (call_param_p
 				? EXPAND_STACK_PARM : EXPAND_NORMAL));
-	      rtx label = 0;
+	      rtx_code_label *label = 0;
 
 	      /* Copy that much.  */
 	      copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
@@ -6190,8 +6192,8 @@ store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
 		  }
 		else
 		  {
-		    rtx loop_start = gen_label_rtx ();
-		    rtx loop_end = gen_label_rtx ();
+		    rtx_code_label *loop_start = gen_label_rtx ();
+		    rtx_code_label *loop_end = gen_label_rtx ();
 		    tree exit_cond;
 
 		    expand_normal (hi_index);
@@ -8008,7 +8010,7 @@ expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
      and return.  */
   if (insn)
     {
-      rtx seq = get_insns ();
+      rtx_insn *seq = get_insns ();
       end_sequence ();
       emit_insn (seq);
       return convert_modes (orig_mode, mode, temp, 0);
@@ -8812,7 +8814,7 @@ expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
 	       and return.  */
 	    if (insn)
 	      {
-		rtx seq = get_insns ();
+		rtx_insn *seq = get_insns ();
 		end_sequence ();
 		emit_insn (seq);
 		return target;
@@ -10547,7 +10549,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
 	    && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
 	    && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
 	  {
-	    rtx label = gen_label_rtx ();
+	    rtx_code_label *label = gen_label_rtx ();
 	    int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
 	    do_jump (TREE_OPERAND (rhs, 1),
 		     value ? label : 0,
-- 
1.8.5.3

[PATCH 085/236] ira: Use rtx_insn in various places

[David Malcolm]

gcc/
	* ira-int.h (struct ira_allocno_copy): Strengthen field "insn"
	from rtx to rtx_insn *insn.
	(ira_create_copy): Strengthen param "insn" from rtx to rtx_insn *.
	(ira_add_allocno_copy): Likewise.
	* ira-build.c (find_allocno_copy): Strengthen param "insn" from
	rtx to rtx_insn *.
	(ira_create_copy): Likewise.
	(ira_add_allocno_copy): Likewise.
	(create_bb_allocnos): Likewise for local "insn".
	* ira-conflicts.c (process_regs_for_copy): Likewise for param "insn".
	(process_reg_shuffles): Update NULL_RTX to NULL in invocation of
	process_regs_for_copy for rtx_insn * param.
	(add_insn_allocno_copies): Strengthen param "insn" from rtx to
	rtx_insn *insn.  Update NULL_RTX to NULL in invocation of
	process_regs_for_copy for rtx_insn * param.
	(add_copies): Strengthen local "insn" from rtx to rtx_insn *insn.
	* ira-costs.c (record_reg_classes): Likewise for param "insn".
	(record_operand_costs): Likewise.
	(scan_one_insn): Likewise for return type, and for param "insn".
	(process_bb_for_costs): Likewise for local "insn".
	(process_bb_node_for_hard_reg_moves): Likewise.
	* ira-emit.c (struct move): Likewise for field "insn".
	(create_move): Eliminate use of NULL_RTX when dealing with an
	rtx_insn *.
	(emit_move_list): Strengthen return type and locals "result",
	"insn" from rtx to rtx_insn *insn.
	(emit_moves): Likewise for locals "insns", "tmp".
	(ira_emit): Likewise for local "insn".
	* ira-lives.c (mark_hard_reg_early_clobbers): Likewise for param
	"insn".
	(find_call_crossed_cheap_reg): Likewise.
	(process_bb_node_lives): Likewise for local "insn".
	* ira.c (decrease_live_ranges_number): Likewise.
	(compute_regs_asm_clobbered): Likewise.
	(build_insn_chain): Likewise.
	(find_moveable_pseudos): Likewise, also locals "def_insn",
	"use_insn", "x".  Also strengthen local "closest_uses" from rtx *
	to rtx_insn **.  Add a checked cast when assigning from
	"closest_use" into closest_uses array in a region where we know
	it's a non-NULL insn.
	(interesting_dest_for_shprep): Strengthen param "insn" from rtx
	to rtx_insn *.
	(split_live_ranges_for_shrink_wrap): Likewise for locals "insn",
	"last_interesting_insn", "uin".
	(move_unallocated_pseudos): Likewise for locals "def_insn",
	"move_insn", "newinsn".
---
 gcc/ira-build.c     | 10 +++++-----
 gcc/ira-conflicts.c | 10 +++++-----
 gcc/ira-costs.c     | 13 +++++++------
 gcc/ira-emit.c      | 13 +++++++------
 gcc/ira-int.h       |  8 +++++---
 gcc/ira-lives.c     |  6 +++---
 gcc/ira.c           | 40 ++++++++++++++++++++++------------------
 7 files changed, 54 insertions(+), 46 deletions(-)

diff --git a/gcc/ira-build.c b/gcc/ira-build.c
index 000c25c..d2c8973 100644
--- a/gcc/ira-build.c
+++ b/gcc/ira-build.c
@@ -39,7 +39,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "ira-int.h"
 #include "emit-rtl.h"  /* FIXME: Can go away once crtl is moved to rtl.h.  */
 
-static ira_copy_t find_allocno_copy (ira_allocno_t, ira_allocno_t, rtx,
+static ira_copy_t find_allocno_copy (ira_allocno_t, ira_allocno_t, rtx_insn *,
 				     ira_loop_tree_node_t);
 
 /* The root of the loop tree corresponding to the all function.  */
@@ -1385,7 +1385,7 @@ initiate_copies (void)
 /* Return copy connecting A1 and A2 and originated from INSN of
    LOOP_TREE_NODE if any.  */
 static ira_copy_t
-find_allocno_copy (ira_allocno_t a1, ira_allocno_t a2, rtx insn,
+find_allocno_copy (ira_allocno_t a1, ira_allocno_t a2, rtx_insn *insn,
 		   ira_loop_tree_node_t loop_tree_node)
 {
   ira_copy_t cp, next_cp;
@@ -1416,7 +1416,7 @@ find_allocno_copy (ira_allocno_t a1, ira_allocno_t a2, rtx insn,
    SECOND, FREQ, CONSTRAINT_P, and INSN.  */
 ira_copy_t
 ira_create_copy (ira_allocno_t first, ira_allocno_t second, int freq,
-		 bool constraint_p, rtx insn,
+		 bool constraint_p, rtx_insn *insn,
 		 ira_loop_tree_node_t loop_tree_node)
 {
   ira_copy_t cp;
@@ -1493,7 +1493,7 @@ swap_allocno_copy_ends_if_necessary (ira_copy_t cp)
    LOOP_TREE_NODE.  */
 ira_copy_t
 ira_add_allocno_copy (ira_allocno_t first, ira_allocno_t second, int freq,
-		      bool constraint_p, rtx insn,
+		      bool constraint_p, rtx_insn *insn,
 		      ira_loop_tree_node_t loop_tree_node)
 {
   ira_copy_t cp;
@@ -1927,7 +1927,7 @@ static void
 create_bb_allocnos (ira_loop_tree_node_t bb_node)
 {
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
   unsigned int i;
   bitmap_iterator bi;
 
diff --git a/gcc/ira-conflicts.c b/gcc/ira-conflicts.c
index 8701622..011a865 100644
--- a/gcc/ira-conflicts.c
+++ b/gcc/ira-conflicts.c
@@ -244,7 +244,7 @@ go_through_subreg (rtx x, int *offset)
    FALSE.  */
 static bool
 process_regs_for_copy (rtx reg1, rtx reg2, bool constraint_p,
-		       rtx insn, int freq)
+		       rtx_insn *insn, int freq)
 {
   int allocno_preferenced_hard_regno, cost, index, offset1, offset2;
   bool only_regs_p;
@@ -345,7 +345,7 @@ process_reg_shuffles (rtx reg, int op_num, int freq, bool *bound_p)
 	  || bound_p[i])
 	continue;
 
-      process_regs_for_copy (reg, another_reg, false, NULL_RTX, freq);
+      process_regs_for_copy (reg, another_reg, false, NULL, freq);
     }
 }
 
@@ -353,7 +353,7 @@ process_reg_shuffles (rtx reg, int op_num, int freq, bool *bound_p)
    it might be because INSN is a pseudo-register move or INSN is two
    operand insn.  */
 static void
-add_insn_allocno_copies (rtx insn)
+add_insn_allocno_copies (rtx_insn *insn)
 {
   rtx set, operand, dup;
   bool bound_p[MAX_RECOG_OPERANDS];
@@ -396,7 +396,7 @@ add_insn_allocno_copies (rtx insn)
 				REG_P (operand)
 				? operand
 				: SUBREG_REG (operand)) != NULL_RTX)
-	    process_regs_for_copy (operand, dup, true, NULL_RTX,
+	    process_regs_for_copy (operand, dup, true, NULL,
 				   freq);
 	}
     }
@@ -421,7 +421,7 @@ static void
 add_copies (ira_loop_tree_node_t loop_tree_node)
 {
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
 
   bb = loop_tree_node->bb;
   if (bb == NULL)
diff --git a/gcc/ira-costs.c b/gcc/ira-costs.c
index 4ecf75f..2709a23 100644
--- a/gcc/ira-costs.c
+++ b/gcc/ira-costs.c
@@ -402,7 +402,7 @@ copy_cost (rtx x, enum machine_mode mode, reg_class_t rclass, bool to_p,
 static void
 record_reg_classes (int n_alts, int n_ops, rtx *ops,
 		    enum machine_mode *modes, const char **constraints,
-		    rtx insn, enum reg_class *pref)
+		    rtx_insn *insn, enum reg_class *pref)
 {
   int alt;
   int i, j, k;
@@ -1242,7 +1242,7 @@ record_address_regs (enum machine_mode mode, addr_space_t as, rtx x,
 
 /* Calculate the costs of insn operands.  */
 static void
-record_operand_costs (rtx insn, enum reg_class *pref)
+record_operand_costs (rtx_insn *insn, enum reg_class *pref)
 {
   const char *constraints[MAX_RECOG_OPERANDS];
   enum machine_mode modes[MAX_RECOG_OPERANDS];
@@ -1386,8 +1386,8 @@ record_operand_costs (rtx insn, enum reg_class *pref)
 /* Process one insn INSN.  Scan it and record each time it would save
    code to put a certain allocnos in a certain class.  Return the last
    insn processed, so that the scan can be continued from there.  */
-static rtx
-scan_one_insn (rtx insn)
+static rtx_insn *
+scan_one_insn (rtx_insn *insn)
 {
   enum rtx_code pat_code;
   rtx set, note;
@@ -1570,7 +1570,7 @@ print_pseudo_costs (FILE *f)
 static void
 process_bb_for_costs (basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   frequency = REG_FREQ_FROM_BB (bb);
   if (frequency == 0)
@@ -1963,7 +1963,8 @@ process_bb_node_for_hard_reg_moves (ira_loop_tree_node_t loop_tree_node)
   ira_loop_tree_node_t curr_loop_tree_node;
   enum reg_class rclass;
   basic_block bb;
-  rtx insn, set, src, dst;
+  rtx_insn *insn;
+  rtx set, src, dst;
 
   bb = loop_tree_node->bb;
   if (bb == NULL)
diff --git a/gcc/ira-emit.c b/gcc/ira-emit.c
index 71dc6bc..445b386 100644
--- a/gcc/ira-emit.c
+++ b/gcc/ira-emit.c
@@ -172,7 +172,7 @@ struct move
      dependencies.  */
   move_t *deps;
   /* First insn generated for the move.  */
-  rtx insn;
+  rtx_insn *insn;
 };
 
 /* Array of moves (indexed by BB index) which should be put at the
@@ -196,7 +196,7 @@ create_move (ira_allocno_t to, ira_allocno_t from)
   move->to = to;
   move->from = from;
   move->next = NULL;
-  move->insn = NULL_RTX;
+  move->insn = NULL;
   move->visited_p = false;
   return move;
 }
@@ -893,12 +893,13 @@ modify_move_list (move_t list)
 
 /* Generate RTX move insns from the move list LIST.  This updates
    allocation cost using move execution frequency FREQ.  */
-static rtx
+static rtx_insn *
 emit_move_list (move_t list, int freq)
 {
   rtx to, from, dest;
   int to_regno, from_regno, cost, regno;
-  rtx result, insn, set;
+  rtx_insn *result, *insn;
+  rtx set;
   enum machine_mode mode;
   enum reg_class aclass;
 
@@ -984,7 +985,7 @@ emit_moves (void)
   basic_block bb;
   edge_iterator ei;
   edge e;
-  rtx insns, tmp;
+  rtx_insn *insns, *tmp;
 
   FOR_EACH_BB_FN (bb, cfun)
     {
@@ -1234,7 +1235,7 @@ void
 ira_emit (bool loops_p)
 {
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
   edge_iterator ei;
   edge e;
   ira_allocno_t a;
diff --git a/gcc/ira-int.h b/gcc/ira-int.h
index 413c823..3d1a1d3 100644
--- a/gcc/ira-int.h
+++ b/gcc/ira-int.h
@@ -571,7 +571,7 @@ struct ira_allocno_copy
      for the copy created to remove register shuffle is NULL.  In last
      case the copy frequency is smaller than the corresponding insn
      execution frequency.  */
-  rtx insn;
+  rtx_insn *insn;
   /* All copies with the same allocno as FIRST are linked by the two
      following members.  */
   ira_copy_t prev_first_allocno_copy, next_first_allocno_copy;
@@ -1009,9 +1009,11 @@ extern void ira_add_allocno_pref (ira_allocno_t, int, int);
 extern void ira_remove_pref (ira_pref_t);
 extern void ira_remove_allocno_prefs (ira_allocno_t);
 extern ira_copy_t ira_create_copy (ira_allocno_t, ira_allocno_t,
-				   int, bool, rtx, ira_loop_tree_node_t);
+				   int, bool, rtx_insn *,
+				   ira_loop_tree_node_t);
 extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int,
-					bool, rtx, ira_loop_tree_node_t);
+					bool, rtx_insn *,
+					ira_loop_tree_node_t);
 
 extern int *ira_allocate_cost_vector (reg_class_t);
 extern void ira_free_cost_vector (int *, reg_class_t);
diff --git a/gcc/ira-lives.c b/gcc/ira-lives.c
index 0dccee3..4875399 100644
--- a/gcc/ira-lives.c
+++ b/gcc/ira-lives.c
@@ -709,7 +709,7 @@ make_early_clobber_and_input_conflicts (void)
 /* Mark early clobber hard registers of the current INSN as live (if
    LIVE_P) or dead.  Return true if there are such registers.  */
 static bool
-mark_hard_reg_early_clobbers (rtx insn, bool live_p)
+mark_hard_reg_early_clobbers (rtx_insn *insn, bool live_p)
 {
   df_ref *def_rec;
   bool set_p = false;
@@ -1049,7 +1049,7 @@ bb_has_abnormal_call_pred (basic_block bb)
    we find a SET rtx that we can use to deduce that a register can be cheaply
    caller-saved.  Return such a register, or NULL_RTX if none is found.  */
 static rtx
-find_call_crossed_cheap_reg (rtx insn)
+find_call_crossed_cheap_reg (rtx_insn *insn)
 {
   rtx cheap_reg = NULL_RTX;
   rtx exp = CALL_INSN_FUNCTION_USAGE (insn);
@@ -1116,7 +1116,7 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node)
   int i, freq;
   unsigned int j;
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
   bitmap_iterator bi;
   bitmap reg_live_out;
   unsigned int px;
diff --git a/gcc/ira.c b/gcc/ira.c
index bad6759..71a8fc3 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -2097,7 +2097,8 @@ static void
 decrease_live_ranges_number (void)
 {
   basic_block bb;
-  rtx insn, set, src, dest, dest_death, p, q, note;
+  rtx_insn *insn;
+  rtx set, src, dest, dest_death, p, q, note;
   int sregno, dregno;
 
   if (! flag_expensive_optimizations)
@@ -2331,7 +2332,7 @@ compute_regs_asm_clobbered (void)
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
       FOR_BB_INSNS_REVERSE (bb, insn)
 	{
 	  df_ref *def_rec;
@@ -4101,7 +4102,7 @@ build_insn_chain (void)
   FOR_EACH_BB_REVERSE_FN (bb, cfun)
     {
       bitmap_iterator bi;
-      rtx insn;
+      rtx_insn *insn;
 
       CLEAR_REG_SET (live_relevant_regs);
       bitmap_clear (live_subregs_used);
@@ -4476,7 +4477,7 @@ find_moveable_pseudos (void)
   int max_uid = get_max_uid ();
   basic_block bb;
   int *uid_luid = XNEWVEC (int, max_uid);
-  rtx *closest_uses = XNEWVEC (rtx, max_regs);
+  rtx_insn **closest_uses = XNEWVEC (rtx_insn *, max_regs);
   /* A set of registers which are live but not modified throughout a block.  */
   bitmap_head *bb_transp_live = XNEWVEC (bitmap_head,
 					 last_basic_block_for_fn (cfun));
@@ -4505,7 +4506,7 @@ find_moveable_pseudos (void)
   bitmap_initialize (&unusable_as_input, 0);
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
       bitmap transp = bb_transp_live + bb->index;
       bitmap moveable = bb_moveable_reg_sets + bb->index;
       bitmap local = bb_local + bb->index;
@@ -4569,12 +4570,13 @@ find_moveable_pseudos (void)
   FOR_EACH_BB_FN (bb, cfun)
     {
       bitmap local = bb_local + bb->index;
-      rtx insn;
+      rtx_insn *insn;
 
       FOR_BB_INSNS (bb, insn)
 	if (NONDEBUG_INSN_P (insn))
 	  {
-	    rtx def_insn, closest_use, note;
+	    rtx_insn *def_insn;
+	    rtx closest_use, note;
 	    df_ref *def_rec, def, use;
 	    unsigned regno;
 	    bool all_dominated, all_local;
@@ -4617,7 +4619,7 @@ find_moveable_pseudos (void)
 	    closest_use = NULL_RTX;
 	    for (; use; use = DF_REF_NEXT_REG (use))
 	      {
-		rtx insn;
+		rtx_insn *insn;
 		if (!DF_REF_INSN_INFO (use))
 		  {
 		    all_dominated = false;
@@ -4669,7 +4671,9 @@ find_moveable_pseudos (void)
 	      }
 #endif
 	    bitmap_set_bit (&interesting, regno);
-	    closest_uses[regno] = closest_use;
+	    /* If we get here, we know closest_use is a non-NULL insn
+	       (as opposed to const_0_rtx).  */
+	    closest_uses[regno] = as_a <rtx_insn *> (closest_use);
 
 	    if (dump_file && (all_local || all_dominated))
 	      {
@@ -4688,13 +4692,13 @@ find_moveable_pseudos (void)
   EXECUTE_IF_SET_IN_BITMAP (&interesting, 0, i, bi)
     {
       df_ref def = DF_REG_DEF_CHAIN (i);
-      rtx def_insn = DF_REF_INSN (def);
+      rtx_insn *def_insn = DF_REF_INSN (def);
       basic_block def_block = BLOCK_FOR_INSN (def_insn);
       bitmap def_bb_local = bb_local + def_block->index;
       bitmap def_bb_moveable = bb_moveable_reg_sets + def_block->index;
       bitmap def_bb_transp = bb_transp_live + def_block->index;
       bool local_to_bb_p = bitmap_bit_p (def_bb_local, i);
-      rtx use_insn = closest_uses[i];
+      rtx_insn *use_insn = closest_uses[i];
       df_ref *def_insn_use_rec = DF_INSN_USES (def_insn);
       bool all_ok = true;
       bool all_transp = true;
@@ -4748,7 +4752,7 @@ find_moveable_pseudos (void)
 		{
 		  if (modified_between_p (DF_REF_REG (use), def_insn, use_insn))
 		    {
-		      rtx x = NEXT_INSN (def_insn);
+		      rtx_insn *x = NEXT_INSN (def_insn);
 		      while (!modified_in_p (DF_REF_REG (use), x))
 			{
 			  gcc_assert (x != use_insn);
@@ -4843,7 +4847,7 @@ interesting_dest_for_shprep_1 (rtx set, basic_block call_dom)
    Otherwise return NULL.  */
 
 static rtx
-interesting_dest_for_shprep (rtx insn, basic_block call_dom)
+interesting_dest_for_shprep (rtx_insn *insn, basic_block call_dom)
 {
   if (!INSN_P (insn))
     return NULL;
@@ -4881,7 +4885,7 @@ split_live_ranges_for_shrink_wrap (void)
 {
   basic_block bb, call_dom = NULL;
   basic_block first = single_succ (ENTRY_BLOCK_PTR_FOR_FN (cfun));
-  rtx insn, last_interesting_insn = NULL;
+  rtx_insn *insn, *last_interesting_insn = NULL;
   bitmap_head need_new, reachable;
   vec<basic_block> queue;
 
@@ -4998,7 +5002,7 @@ split_live_ranges_for_shrink_wrap (void)
       df_ref use, next;
       for (use = DF_REG_USE_CHAIN (REGNO (dest)); use; use = next)
 	{
-	  rtx uin = DF_REF_INSN (use);
+	  rtx_insn *uin = DF_REF_INSN (use);
 	  next = DF_REF_NEXT_REG (use);
 
 	  basic_block ubb = BLOCK_FOR_INSN (uin);
@@ -5044,12 +5048,12 @@ move_unallocated_pseudos (void)
       {
 	int idx = i - first_moveable_pseudo;
 	rtx other_reg = pseudo_replaced_reg[idx];
-	rtx def_insn = DF_REF_INSN (DF_REG_DEF_CHAIN (i));
+	rtx_insn *def_insn = DF_REF_INSN (DF_REG_DEF_CHAIN (i));
 	/* The use must follow all definitions of OTHER_REG, so we can
 	   insert the new definition immediately after any of them.  */
 	df_ref other_def = DF_REG_DEF_CHAIN (REGNO (other_reg));
-	rtx move_insn = DF_REF_INSN (other_def);
-	rtx newinsn = emit_insn_after (PATTERN (def_insn), move_insn);
+	rtx_insn *move_insn = DF_REF_INSN (other_def);
+	rtx_insn *newinsn = emit_insn_after (PATTERN (def_insn), move_insn);
 	rtx set;
 	int success;
 
-- 
1.8.5.3

[PATCH 055/236] caller-save.c: Use rtx_insn

[David Malcolm]

gcc/
	* caller-save.c (save_call_clobbered_regs): Strengthen locals
	"ins" and "prev" from rtx to rtx_insn *.
---
 gcc/caller-save.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/caller-save.c b/gcc/caller-save.c
index b1ef3a9..fd936ba 100644
--- a/gcc/caller-save.c
+++ b/gcc/caller-save.c
@@ -901,7 +901,7 @@ save_call_clobbered_regs (void)
 	      && last
 	      && last->block == chain->block)
 	    {
-	      rtx ins, prev;
+	      rtx_insn *ins, *prev;
 	      basic_block bb = BLOCK_FOR_INSN (insn);
 
 	      /* When adding hard reg restores after a DEBUG_INSN, move
-- 
1.8.5.3

[PATCH 150/236] config/sparc: Use rtx_insn

[David Malcolm]

gcc/
	* config/sparc/sparc-protos.h (output_ubranch): Strengthen param 2
	from rtx to rtx_insn *.
	(output_cbranch): Likewise for param 6.
	(output_return): Likewise for param 1.
	(output_sibcall): Likewise.
	(output_v8plus_shift): Likewise.
	(output_v8plus_mult): Likewise.
	(output_v9branch): Likewise for param 7.
	(output_cbcond):  Likewise for param 3.

	* config/sparc/sparc.c (sparc_legitimize_tls_address): Likewise
	for local "insn".
	(sparc_legitimize_pic_address): Likewise.
	(sparc_emit_call_insn): Likewise.
	(emit_save_or_restore_regs): Likewise.
	(emit_window_save): Likewise for return type and local "insn".
	(sparc_expand_prologue): Likewise for local "insn".
	(sparc_flat_expand_prologue): Likewise.
	(output_return): Likewise for param "insn".
	(output_sibcall): Likewise for param "insn" and local "delay".
	(output_ubranch): Likewise for param "insn".
	(output_cbranch): Likewise.
	(output_cbcond): Likewise.
	(output_v9branch): Likewise.
	(output_v8plus_shift): Likewise.
	(sparc_output_mi_thunk): Likewise for local "insn".
	(get_some_local_dynamic_name): Likewise.
	(output_v8plus_mult): Likewise for param "insn".
---
 gcc/config/sparc/sparc-protos.h | 16 ++++++++--------
 gcc/config/sparc/sparc.c        | 41 ++++++++++++++++++++++-------------------
 2 files changed, 30 insertions(+), 27 deletions(-)

diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index ee2091b..c6b9802 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -69,15 +69,15 @@ extern bool sparc_expand_move (enum machine_mode, rtx *);
 extern void sparc_emit_set_symbolic_const64 (rtx, rtx, rtx);
 extern int sparc_splitdi_legitimate (rtx, rtx);
 extern int sparc_split_regreg_legitimate (rtx, rtx);
-extern const char *output_ubranch (rtx, rtx);
-extern const char *output_cbranch (rtx, rtx, int, int, int, rtx);
-extern const char *output_return (rtx);
-extern const char *output_sibcall (rtx, rtx);
-extern const char *output_v8plus_shift (rtx, rtx *, const char *);
-extern const char *output_v8plus_mult (rtx, rtx *, const char *);
-extern const char *output_v9branch (rtx, rtx, int, int, int, int, rtx);
+extern const char *output_ubranch (rtx, rtx_insn *);
+extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
+extern const char *output_return (rtx_insn *);
+extern const char *output_sibcall (rtx_insn *, rtx);
+extern const char *output_v8plus_shift (rtx_insn *, rtx *, const char *);
+extern const char *output_v8plus_mult (rtx_insn *, rtx *, const char *);
+extern const char *output_v9branch (rtx, rtx, int, int, int, int, rtx_insn *);
 extern const char *output_probe_stack_range (rtx, rtx);
-extern const char *output_cbcond (rtx, rtx, rtx);
+extern const char *output_cbcond (rtx, rtx, rtx_insn *);
 extern bool emit_scc_insn (rtx []);
 extern void emit_conditional_branch_insn (rtx []);
 extern int registers_ok_for_ldd_peep (rtx, rtx);
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 7bfd3c1..7c2e57f 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -4104,7 +4104,8 @@ sparc_tls_referenced_p (rtx x)
 static rtx
 sparc_legitimize_tls_address (rtx addr)
 {
-  rtx temp1, temp2, temp3, ret, o0, got, insn;
+  rtx temp1, temp2, temp3, ret, o0, got;
+  rtx_insn *insn;
 
   gcc_assert (can_create_pseudo_p ());
 
@@ -4257,7 +4258,7 @@ sparc_legitimize_pic_address (rtx orig, rtx reg)
       || (GET_CODE (orig) == LABEL_REF && !can_use_mov_pic_label_ref (orig)))
     {
       rtx pic_ref, address;
-      rtx insn;
+      rtx_insn *insn;
 
       if (reg == 0)
 	{
@@ -4601,7 +4602,7 @@ load_got_register (void)
 void
 sparc_emit_call_insn (rtx pat, rtx addr)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   insn = emit_call_insn (pat);
 
@@ -5248,7 +5249,8 @@ emit_save_or_restore_regs (unsigned int low, unsigned int high, rtx base,
 			   sorr_act_t action_true, sorr_act_t action_false)
 {
   unsigned int i;
-  rtx mem, insn;
+  rtx mem;
+  rtx_insn *insn;
 
   if (TARGET_ARCH64 && high <= 32)
     {
@@ -5407,10 +5409,10 @@ emit_save_or_restore_local_in_regs (rtx base, int offset, sorr_act_t action)
 
 /* Emit a window_save insn.  */
 
-static rtx
+static rtx_insn *
 emit_window_save (rtx increment)
 {
-  rtx insn = emit_insn (gen_window_save (increment));
+  rtx_insn *insn = emit_insn (gen_window_save (increment));
   RTX_FRAME_RELATED_P (insn) = 1;
 
   /* The incoming return address (%o7) is saved in %i7.  */
@@ -5451,7 +5453,7 @@ void
 sparc_expand_prologue (void)
 {
   HOST_WIDE_INT size;
-  rtx insn;
+  rtx_insn *insn;
 
   /* Compute a snapshot of crtl->uses_only_leaf_regs.  Relying
      on the final value of the flag means deferring the prologue/epilogue
@@ -5585,7 +5587,7 @@ void
 sparc_flat_expand_prologue (void)
 {
   HOST_WIDE_INT size;
-  rtx insn;
+  rtx_insn *insn;
 
   sparc_leaf_function_p = optimize > 0 && crtl->is_leaf;
 
@@ -5893,7 +5895,7 @@ output_restore (rtx pat)
 /* Output a return.  */
 
 const char *
-output_return (rtx insn)
+output_return (rtx_insn *insn)
 {
   if (crtl->calls_eh_return)
     {
@@ -5980,7 +5982,7 @@ output_return (rtx insn)
 /* Output a sibling call.  */
 
 const char *
-output_sibcall (rtx insn, rtx call_operand)
+output_sibcall (rtx_insn *insn, rtx call_operand)
 {
   rtx operands[1];
 
@@ -6015,7 +6017,7 @@ output_sibcall (rtx insn, rtx call_operand)
 
       if (final_sequence)
 	{
-	  rtx delay = NEXT_INSN (insn);
+	  rtx_insn *delay = NEXT_INSN (insn);
 	  gcc_assert (delay);
 
 	  output_restore (PATTERN (delay));
@@ -7587,7 +7589,7 @@ sparc_preferred_simd_mode (enum machine_mode mode)
    DEST is the destination insn (i.e. the label), INSN is the source.  */
 
 const char *
-output_ubranch (rtx dest, rtx insn)
+output_ubranch (rtx dest, rtx_insn *insn)
 {
   static char string[64];
   bool v9_form = false;
@@ -7661,7 +7663,7 @@ output_ubranch (rtx dest, rtx insn)
 
 const char *
 output_cbranch (rtx op, rtx dest, int label, int reversed, int annul,
-		rtx insn)
+		rtx_insn *insn)
 {
   static char string[64];
   enum rtx_code code = GET_CODE (op);
@@ -8124,7 +8126,7 @@ sparc_emit_fixunsdi (rtx *operands, enum machine_mode mode)
    and OP is the conditional expression.  */
 
 const char *
-output_cbcond (rtx op, rtx dest, rtx insn)
+output_cbcond (rtx op, rtx dest, rtx_insn *insn)
 {
   enum machine_mode mode = GET_MODE (XEXP (op, 0));
   enum rtx_code code = GET_CODE (op);
@@ -8251,7 +8253,7 @@ output_cbcond (rtx op, rtx dest, rtx insn)
 
 const char *
 output_v9branch (rtx op, rtx dest, int reg, int label, int reversed,
-		 int annul, rtx insn)
+		 int annul, rtx_insn *insn)
 {
   static char string[64];
   enum rtx_code code = GET_CODE (op);
@@ -9838,7 +9840,7 @@ sparc_check_64 (rtx x, rtx insn)
    OPERANDS are its operands and OPCODE is the mnemonic to be used.  */
 
 const char *
-output_v8plus_shift (rtx insn, rtx *operands, const char *opcode)
+output_v8plus_shift (rtx_insn *insn, rtx *operands, const char *opcode)
 {
   static char asm_code[60];
 
@@ -11265,7 +11267,8 @@ sparc_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
 		       HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
 		       tree function)
 {
-  rtx this_rtx, insn, funexp;
+  rtx this_rtx, funexp;
+  rtx_insn *insn;
   unsigned int int_arg_first;
 
   reload_completed = 1;
@@ -11487,7 +11490,7 @@ sparc_init_machine_status (void)
 static const char *
 get_some_local_dynamic_name (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (cfun->machine->some_ld_name)
     return cfun->machine->some_ld_name;
@@ -12121,7 +12124,7 @@ sparc_preferred_reload_class (rtx x, reg_class_t rclass)
    OPERANDS are its operands and OPCODE is the mnemonic to be used.  */
 
 const char *
-output_v8plus_mult (rtx insn, rtx *operands, const char *opcode)
+output_v8plus_mult (rtx_insn *insn, rtx *operands, const char *opcode)
 {
   char mulstr[32];
 
-- 
1.8.5.3

[PATCH 065/236] cse.c: Use rtx_insn

[David Malcolm]

gcc/
	* cse.c (struct qty_table_elem): Strengthen field "const_insn"
	from rtx to rtx_insn *.
	(struct change_cc_mode_args): Likewise for field "insn".
	(this_insn): Strengthen from rtx to rtx_insn *.
	(make_new_qty): Replace use of NULL_RTX with NULL when dealing
	with insn.
	(validate_canon_reg): Strengthen param "insn" from rtx to
	rtx_insn *.
	(canon_reg): Likewise.
	(fold_rtx): Likewise.  Replace use of NULL_RTX with NULL when
	dealing with insn.
	(record_jump_equiv): Strengthen param "insn" from rtx to
	rtx_insn *.
	(try_back_substitute_reg): Likewise, also for locals "prev",
	"bb_head".
	(find_sets_in_insn): Likewise for param "insn".
	(canonicalize_insn): Likewise.
	(cse_insn): Likewise.  Add a checked cast.
	(invalidate_from_clobbers): Likewise for param "insn".
	(invalidate_from_sets_and_clobbers): Likewise.
	(cse_process_notes_1): Replace use of NULL_RTX with NULL when
	dealing with insn.
	(cse_prescan_path): Strengthen local "insn" from rtx to
	rtx_insn *.
	(cse_extended_basic_block): Likewise for locals "insn" and
	"prev_insn".
	(cse_main): Likewise for param "f".
	(check_for_label_ref): Likewise for local "insn".
	(set_live_p): Likewise for second param ("insn").
	(insn_live_p): Likewise for first param ("insn") and for local
	"next".
	(cse_change_cc_mode_insn): Likewise for first param "insn".
	(cse_change_cc_mode_insns): Likewise for first and second params
	"start" and "end".
	(cse_cc_succs): Likewise for locals "insns", "last_insns", "insn"
	and "end".
	(cse_condition_code_reg): Likewise for locals "last_insn", "insn",
	"cc_src_insn".
---
 gcc/cse.c | 99 ++++++++++++++++++++++++++++++++-------------------------------
 1 file changed, 50 insertions(+), 49 deletions(-)

diff --git a/gcc/cse.c b/gcc/cse.c
index 6473c3e..9c39fea 100644
--- a/gcc/cse.c
+++ b/gcc/cse.c
@@ -241,7 +241,7 @@ static int next_qty;
 struct qty_table_elem
 {
   rtx const_rtx;
-  rtx const_insn;
+  rtx_insn *const_insn;
   rtx comparison_const;
   int comparison_qty;
   unsigned int first_reg, last_reg;
@@ -258,7 +258,7 @@ static struct qty_table_elem *qty_table;
    cse_change_cc_mode.  */
 struct change_cc_mode_args
 {
-  rtx insn;
+  rtx_insn *insn;
   rtx newreg;
 };
 
@@ -278,7 +278,7 @@ static enum machine_mode this_insn_cc0_mode, prev_insn_cc0_mode;
 
 /* Insn being scanned.  */
 
-static rtx this_insn;
+static rtx_insn *this_insn;
 static bool optimize_this_for_speed_p;
 
 /* Index by register number, gives the number of the next (or
@@ -582,19 +582,19 @@ static inline unsigned canon_hash (rtx, enum machine_mode);
 static inline unsigned safe_hash (rtx, enum machine_mode);
 static inline unsigned hash_rtx_string (const char *);
 
-static rtx canon_reg (rtx, rtx);
+static rtx canon_reg (rtx, rtx_insn *);
 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
 					   enum machine_mode *,
 					   enum machine_mode *);
-static rtx fold_rtx (rtx, rtx);
+static rtx fold_rtx (rtx, rtx_insn *);
 static rtx equiv_constant (rtx);
-static void record_jump_equiv (rtx, bool);
+static void record_jump_equiv (rtx_insn *, bool);
 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
 			      int);
-static void cse_insn (rtx);
+static void cse_insn (rtx_insn *);
 static void cse_prescan_path (struct cse_basic_block_data *);
-static void invalidate_from_clobbers (rtx);
-static void invalidate_from_sets_and_clobbers (rtx);
+static void invalidate_from_clobbers (rtx_insn *);
+static void invalidate_from_sets_and_clobbers (rtx_insn *);
 static rtx cse_process_notes (rtx, rtx, bool *);
 static void cse_extended_basic_block (struct cse_basic_block_data *);
 static int check_for_label_ref (rtx *, void *);
@@ -604,11 +604,11 @@ static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
 static int check_dependence (rtx *, void *);
 
 static void flush_hash_table (void);
-static bool insn_live_p (rtx, int *);
-static bool set_live_p (rtx, rtx, int *);
+static bool insn_live_p (rtx_insn *, int *);
+static bool set_live_p (rtx, rtx_insn *, int *);
 static int cse_change_cc_mode (rtx *, void *);
-static void cse_change_cc_mode_insn (rtx, rtx);
-static void cse_change_cc_mode_insns (rtx, rtx, rtx);
+static void cse_change_cc_mode_insn (rtx_insn *, rtx);
+static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx);
 static enum machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
 				       bool);
 \f
@@ -904,7 +904,7 @@ make_new_qty (unsigned int reg, enum machine_mode mode)
   ent->first_reg = reg;
   ent->last_reg = reg;
   ent->mode = mode;
-  ent->const_rtx = ent->const_insn = NULL_RTX;
+  ent->const_rtx = ent->const_insn = NULL;
   ent->comparison_code = UNKNOWN;
 
   eqv = &reg_eqv_table[reg];
@@ -2794,7 +2794,7 @@ exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
    the result if necessary.  INSN is as for canon_reg.  */
 
 static void
-validate_canon_reg (rtx *xloc, rtx insn)
+validate_canon_reg (rtx *xloc, rtx_insn *insn)
 {
   if (*xloc)
     {
@@ -2818,7 +2818,7 @@ validate_canon_reg (rtx *xloc, rtx insn)
    generally be discarded since the changes we are making are optional.  */
 
 static rtx
-canon_reg (rtx x, rtx insn)
+canon_reg (rtx x, rtx_insn *insn)
 {
   int i;
   enum rtx_code code;
@@ -3097,7 +3097,7 @@ find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
    of X before modifying it.  */
 
 static rtx
-fold_rtx (rtx x, rtx insn)
+fold_rtx (rtx x, rtx_insn *insn)
 {
   enum rtx_code code;
   enum machine_mode mode;
@@ -3573,7 +3573,7 @@ fold_rtx (rtx x, rtx insn)
 		for (p = p->first_same_value; p; p = p->next_same_value)
 		  if (REG_P (p->exp))
 		    return simplify_gen_binary (MINUS, mode, folded_arg0,
-						canon_reg (p->exp, NULL_RTX));
+						canon_reg (p->exp, NULL));
 	    }
 	  goto from_plus;
 
@@ -3586,7 +3586,7 @@ fold_rtx (rtx x, rtx insn)
 	      if (y && CONST_INT_P (XEXP (y, 1)))
 		return fold_rtx (plus_constant (mode, copy_rtx (y),
 						-INTVAL (const_arg1)),
-				 NULL_RTX);
+				 NULL);
 	    }
 
 	  /* Fall through.  */
@@ -3851,7 +3851,7 @@ equiv_constant (rtx x)
    comparison is seen later, we will know its value.  */
 
 static void
-record_jump_equiv (rtx insn, bool taken)
+record_jump_equiv (rtx_insn *insn, bool taken)
 {
   int cond_known_true;
   rtx op0, op1;
@@ -4178,7 +4178,7 @@ struct set
    This is the last transformation that cse_insn will try to do.  */
 
 static void
-try_back_substitute_reg (rtx set, rtx insn)
+try_back_substitute_reg (rtx set, rtx_insn *insn)
 {
   rtx dest = SET_DEST (set);
   rtx src = SET_SRC (set);
@@ -4194,8 +4194,8 @@ try_back_substitute_reg (rtx set, rtx insn)
 	{
 	  /* Scan for the previous nonnote insn, but stop at a basic
 	     block boundary.  */
-	  rtx prev = insn;
-	  rtx bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
+	  rtx_insn *prev = insn;
+	  rtx_insn *bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
 	  do
 	    {
 	      prev = PREV_INSN (prev);
@@ -4242,7 +4242,7 @@ try_back_substitute_reg (rtx set, rtx insn)
 /* Record all the SETs in this instruction into SETS_PTR,
    and return the number of recorded sets.  */
 static int
-find_sets_in_insn (rtx insn, struct set **psets)
+find_sets_in_insn (rtx_insn *insn, struct set **psets)
 {
   struct set *sets = *psets;
   int n_sets = 0;
@@ -4324,7 +4324,7 @@ find_sets_in_insn (rtx insn, struct set **psets)
    see canon_reg.  */
 
 static void
-canonicalize_insn (rtx insn, struct set **psets, int n_sets)
+canonicalize_insn (rtx_insn *insn, struct set **psets, int n_sets)
 {
   struct set *sets = *psets;
   rtx tem;
@@ -4480,7 +4480,7 @@ canonicalize_insn (rtx insn, struct set **psets, int n_sets)
    of available values.  */
 
 static void
-cse_insn (rtx insn)
+cse_insn (rtx_insn *insn)
 {
   rtx x = PATTERN (insn);
   int i;
@@ -5474,7 +5474,7 @@ cse_insn (rtx insn)
 		}
 
 	      delete_insn_and_edges (insn);
-	      insn = new_rtx;
+	      insn = as_a <rtx_insn *> (new_rtx);
 	    }
 	  else
 	    INSN_CODE (insn) = -1;
@@ -5977,7 +5977,7 @@ invalidate_memory (void)
    alias with something that is SET or CLOBBERed.  */
 
 static void
-invalidate_from_clobbers (rtx insn)
+invalidate_from_clobbers (rtx_insn *insn)
 {
   rtx x = PATTERN (insn);
 
@@ -6019,7 +6019,7 @@ invalidate_from_clobbers (rtx insn)
    alias with something that is SET or CLOBBERed.  */
 
 static void
-invalidate_from_sets_and_clobbers (rtx insn)
+invalidate_from_sets_and_clobbers (rtx_insn *insn)
 {
   rtx tem;
   rtx x = PATTERN (insn);
@@ -6147,7 +6147,7 @@ cse_process_notes_1 (rtx x, rtx object, bool *changed)
 	}
 
       /* Otherwise, canonicalize this register.  */
-      return canon_reg (x, NULL_RTX);
+      return canon_reg (x, NULL);
 
     default:
       break;
@@ -6359,7 +6359,7 @@ cse_prescan_path (struct cse_basic_block_data *data)
   for (path_entry = 0; path_entry < path_size; path_entry++)
     {
       basic_block bb;
-      rtx insn;
+      rtx_insn *insn;
 
       bb = data->path[path_entry].bb;
 
@@ -6398,7 +6398,7 @@ cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
   for (path_entry = 0; path_entry < path_size; path_entry++)
     {
       basic_block bb;
-      rtx insn;
+      rtx_insn *insn;
 
       bb = ebb_data->path[path_entry].bb;
 
@@ -6465,7 +6465,8 @@ cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
 		     Here we use fact that nothing expects CC0 to be
 		     valid over an insn, which is true until the final
 		     pass.  */
-		  rtx prev_insn, tem;
+		  rtx_insn *prev_insn;
+		  rtx tem;
 
 		  prev_insn = prev_nonnote_nondebug_insn (insn);
 		  if (prev_insn && NONJUMP_INSN_P (prev_insn)
@@ -6556,7 +6557,7 @@ cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
    Return 0 otherwise.  */
 
 static int
-cse_main (rtx f ATTRIBUTE_UNUSED, int nregs)
+cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs)
 {
   struct cse_basic_block_data ebb_data;
   basic_block bb;
@@ -6653,7 +6654,7 @@ cse_main (rtx f ATTRIBUTE_UNUSED, int nregs)
 static int
 check_for_label_ref (rtx *rtl, void *data)
 {
-  rtx insn = (rtx) data;
+  rtx_insn *insn = (rtx_insn *) data;
 
   /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
      note for it, we must rerun jump since it needs to place the note.  If
@@ -6807,7 +6808,7 @@ is_dead_reg (rtx x, int *counts)
 
 /* Return true if set is live.  */
 static bool
-set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0.  */
+set_live_p (rtx set, rtx_insn *insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0.  */
 	    int *counts)
 {
 #ifdef HAVE_cc0
@@ -6834,7 +6835,7 @@ set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0.  */
 /* Return true if insn is live.  */
 
 static bool
-insn_live_p (rtx insn, int *counts)
+insn_live_p (rtx_insn *insn, int *counts)
 {
   int i;
   if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn))
@@ -6859,7 +6860,7 @@ insn_live_p (rtx insn, int *counts)
     }
   else if (DEBUG_INSN_P (insn))
     {
-      rtx next;
+      rtx_insn *next;
 
       for (next = NEXT_INSN (insn); next; next = NEXT_INSN (next))
 	if (NOTE_P (next))
@@ -7112,7 +7113,7 @@ cse_change_cc_mode (rtx *loc, void *data)
    GET_MODE (NEWREG) in INSN.  */
 
 static void
-cse_change_cc_mode_insn (rtx insn, rtx newreg)
+cse_change_cc_mode_insn (rtx_insn *insn, rtx newreg)
 {
   struct change_cc_mode_args args;
   int success;
@@ -7139,9 +7140,9 @@ cse_change_cc_mode_insn (rtx insn, rtx newreg)
    any instruction which modifies NEWREG.  */
 
 static void
-cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
+cse_change_cc_mode_insns (rtx_insn *start, rtx_insn *end, rtx newreg)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = start; insn != end; insn = NEXT_INSN (insn))
     {
@@ -7179,9 +7180,9 @@ cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
   enum machine_mode mode;
   unsigned int insn_count;
   edge e;
-  rtx insns[2];
+  rtx_insn *insns[2];
   enum machine_mode modes[2];
-  rtx last_insns[2];
+  rtx_insn *last_insns[2];
   unsigned int i;
   rtx newreg;
   edge_iterator ei;
@@ -7197,8 +7198,8 @@ cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
   insn_count = 0;
   FOR_EACH_EDGE (e, ei, bb->succs)
     {
-      rtx insn;
-      rtx end;
+      rtx_insn *insn;
+      rtx_insn *end;
 
       if (e->flags & EDGE_COMPLEX)
 	continue;
@@ -7375,10 +7376,10 @@ cse_condition_code_reg (void)
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx last_insn;
+      rtx_insn *last_insn;
       rtx cc_reg;
-      rtx insn;
-      rtx cc_src_insn;
+      rtx_insn *insn;
+      rtx_insn *cc_src_insn;
       rtx cc_src;
       enum machine_mode mode;
       enum machine_mode orig_mode;
@@ -7403,7 +7404,7 @@ cse_condition_code_reg (void)
       else
 	continue;
 
-      cc_src_insn = NULL_RTX;
+      cc_src_insn = NULL;
       cc_src = NULL_RTX;
       for (insn = PREV_INSN (last_insn);
 	   insn && insn != PREV_INSN (BB_HEAD (bb));
-- 
1.8.5.3

[PATCH 143/236] config/pa: Use rtx_insn

[David Malcolm]

gcc/
	* config/pa/pa-protos.h (pa_output_call): Strengthen first param
	from rtx to rtx_insn *.
	(pa_output_indirect_call): Likewise.
	(pa_adjust_insn_length): Likewise.
	(pa_attr_length_millicode_call): Likewise.
	(pa_attr_length_call): Likewise.
	(pa_attr_length_indirect_call): Likewise.

	* config/pa/pa.c (pa_adjust_insn_length): Likewise for param
	"insn".
	(pa_attr_length_millicode_call): Likewise.
	(pa_attr_length_call): Likewise.
	(pa_output_call): Likewise.
	(pa_attr_length_indirect_call): Likewise.
	(pa_output_indirect_call): Likewise.
---
 gcc/config/pa/pa-protos.h | 12 ++++++------
 gcc/config/pa/pa.c        | 14 +++++++-------
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/gcc/config/pa/pa-protos.h b/gcc/config/pa/pa-protos.h
index 2659dcd..800d69b 100644
--- a/gcc/config/pa/pa-protos.h
+++ b/gcc/config/pa/pa-protos.h
@@ -42,8 +42,8 @@ extern const char *pa_output_dbra (rtx *, rtx, int);
 extern const char *pa_output_movb (rtx *, rtx, int, int);
 extern const char *pa_output_parallel_movb (rtx *, rtx);
 extern const char *pa_output_parallel_addb (rtx *, rtx);
-extern const char *pa_output_call (rtx, rtx, int);
-extern const char *pa_output_indirect_call (rtx, rtx);
+extern const char *pa_output_call (rtx_insn *, rtx, int);
+extern const char *pa_output_indirect_call (rtx_insn *, rtx);
 extern const char *pa_output_millicode_call (rtx, rtx);
 extern const char *pa_output_mul_insn (int, rtx);
 extern const char *pa_output_div_insn (rtx *, int, rtx);
@@ -55,7 +55,7 @@ extern void pa_print_operand (FILE *, rtx, int);
 extern void pa_encode_label (rtx);
 extern int pa_symbolic_expression_p (rtx);
 extern bool pa_tls_referenced_p (rtx);
-extern int pa_adjust_insn_length (rtx, int);
+extern int pa_adjust_insn_length (rtx_insn *, int);
 extern int pa_fmpyaddoperands (rtx *);
 extern int pa_fmpysuboperands (rtx *);
 extern void pa_emit_bcond_fp (rtx[]);
@@ -64,9 +64,9 @@ extern int pa_emit_hpdiv_const (rtx *, int);
 extern int pa_is_function_label_plus_const (rtx);
 extern int pa_jump_in_call_delay (rtx);
 extern int pa_fpstore_bypass_p (rtx, rtx);
-extern int pa_attr_length_millicode_call (rtx);
-extern int pa_attr_length_call (rtx, int);
-extern int pa_attr_length_indirect_call (rtx);
+extern int pa_attr_length_millicode_call (rtx_insn *);
+extern int pa_attr_length_call (rtx_insn *, int);
+extern int pa_attr_length_indirect_call (rtx_insn *);
 extern rtx pa_legitimize_reload_address (rtx, enum machine_mode,
 					 int, int, int);
 
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 95dcbb9..e552775 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -4909,7 +4909,7 @@ pa_issue_rate (void)
    Also compute the length of an inline block move here as it is too
    complicated to express as a length attribute in pa.md.  */
 int
-pa_adjust_insn_length (rtx insn, int length)
+pa_adjust_insn_length (rtx_insn *insn, int length)
 {
   rtx pat = PATTERN (insn);
 
@@ -4917,7 +4917,7 @@ pa_adjust_insn_length (rtx insn, int length)
   if ((unsigned int) length >= INT_MAX)
     {
       if (GET_CODE (pat) == SEQUENCE)
-	insn = XVECEXP (pat, 0, 0);
+	insn = as_a <rtx_insn *> (XVECEXP (pat, 0, 0));
 
       switch (get_attr_type (insn))
 	{
@@ -7510,7 +7510,7 @@ length_fp_args (rtx insn)
    over estimate the length than to under estimate it.  */
 
 int
-pa_attr_length_millicode_call (rtx insn)
+pa_attr_length_millicode_call (rtx_insn *insn)
 {
   unsigned long distance = -1;
   unsigned long total = IN_NAMED_SECTION_P (cfun->decl) ? 0 : total_code_bytes;
@@ -7706,7 +7706,7 @@ pa_output_millicode_call (rtx insn, rtx call_dest)
    these sequences.  */
 
 int
-pa_attr_length_call (rtx insn, int sibcall)
+pa_attr_length_call (rtx_insn *insn, int sibcall)
 {
   int local_call;
   rtx call, call_dest;
@@ -7796,7 +7796,7 @@ pa_attr_length_call (rtx insn, int sibcall)
    CALL_DEST is the routine we are calling.  */
 
 const char *
-pa_output_call (rtx insn, rtx call_dest, int sibcall)
+pa_output_call (rtx_insn *insn, rtx call_dest, int sibcall)
 {
   int delay_insn_deleted = 0;
   int delay_slot_filled = 0;
@@ -8085,7 +8085,7 @@ pa_output_call (rtx insn, rtx call_dest, int sibcall)
    the sequence itself.  */
 
 int
-pa_attr_length_indirect_call (rtx insn)
+pa_attr_length_indirect_call (rtx_insn *insn)
 {
   unsigned long distance = -1;
   unsigned long total = IN_NAMED_SECTION_P (cfun->decl) ? 0 : total_code_bytes;
@@ -8118,7 +8118,7 @@ pa_attr_length_indirect_call (rtx insn)
 }
 
 const char *
-pa_output_indirect_call (rtx insn, rtx call_dest)
+pa_output_indirect_call (rtx_insn *insn, rtx call_dest)
 {
   rtx xoperands[1];
 
-- 
1.8.5.3

[PATCH 016/236] BND_TO scaffolding

[David Malcolm]

gcc/
	* sel-sched-ir.h (BND_TO): insn_t will eventually be an
	rtx_insn *.  To help with transition, for now, convert from an
	access macro into a pair of functions: BND_TO, returning an
	rtx_insn *, and...
	(SET_BND_TO): New function, for use where BND_TO is used as an
	lvalue.

	* sel-sched-ir.c (blist_add): Update lvalue usage of BND_TO to
	SET_BND_TO.
	(BND_TO): New function, adding a checked cast.
	(SET_BND_TO): New function.

	* sel-sched.c (move_cond_jump): Update lvalue usage of BND_TO to
	SET_BND_TO.
	(compute_av_set_on_boundaries): Likewise.

/
	* rtx-classes-status.txt: Add SET_BND_TO
---
 gcc/sel-sched-ir.c     | 12 +++++++++++-
 gcc/sel-sched-ir.h     |  3 ++-
 gcc/sel-sched.c        |  4 ++--
 rtx-classes-status.txt |  1 +
 4 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index cb4682f..01e1dd3 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -207,7 +207,7 @@ blist_add (blist_t *lp, insn_t to, ilist_t ptr, deps_t dc)
   _list_add (lp);
   bnd = BLIST_BND (*lp);
 
-  BND_TO (bnd) = to;
+  SET_BND_TO (bnd) = to;
   BND_PTR (bnd) = ptr;
   BND_AV (bnd) = NULL;
   BND_AV1 (bnd) = NULL;
@@ -6468,4 +6468,14 @@ rtx& SET_BB_NOTE_LIST (basic_block bb)
   return SEL_REGION_BB_INFO (bb)->note_list;
 }
 
+rtx_insn *BND_TO (bnd_t bnd)
+{
+  return as_a_nullable <rtx_insn *> (bnd->to);
+}
+
+insn_t& SET_BND_TO (bnd_t bnd)
+{
+  return bnd->to;
+}
+
 #endif
diff --git a/gcc/sel-sched-ir.h b/gcc/sel-sched-ir.h
index 81accaf..ab1f42f 100644
--- a/gcc/sel-sched-ir.h
+++ b/gcc/sel-sched-ir.h
@@ -233,7 +233,8 @@ struct _bnd
   deps_t dc;
 };
 typedef struct _bnd *bnd_t;
-#define BND_TO(B) ((B)->to)
+extern rtx_insn *BND_TO (bnd_t bnd);
+extern insn_t& SET_BND_TO (bnd_t bnd);
 
 /* PTR stands not for pointer as you might think, but as a Path To Root of the
    current instruction group from boundary B.  */
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index c3e0cca..8181ec2 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -4961,7 +4961,7 @@ move_cond_jump (rtx insn, bnd_t bnd)
 
   /* Jump is moved to the boundary.  */
   next = PREV_INSN (insn);
-  BND_TO (bnd) = insn;
+  SET_BND_TO (bnd) = insn;
 
   ft_edge = find_fallthru_edge_from (block_from);
   block_next = ft_edge->dest;
@@ -5102,7 +5102,7 @@ compute_av_set_on_boundaries (fence_t fence, blist_t bnds, av_set_t *av_vliw_p)
 	{
   	  gcc_assert (FENCE_INSN (fence) == BND_TO (bnd));
 	  FENCE_INSN (fence) = bnd_to;
-	  BND_TO (bnd) = bnd_to;
+	  SET_BND_TO (bnd) = bnd_to;
 	}
 
       av_set_clear (&BND_AV (bnd));
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index e77e847..52567e7 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -13,6 +13,7 @@ TODO: "Scaffolding" to be removed
 * DF_REF_INSN
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
 * SET_BB_NOTE_LIST
+* SET_BND_TO
 * SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
 * SET_VINSN_INSN_RTX
-- 
1.8.5.3

Re: [PATCH 016/236] BND_TO scaffolding

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> gcc/
> 	* sel-sched-ir.h (BND_TO): insn_t will eventually be an
> 	rtx_insn *.  To help with transition, for now, convert from an
> 	access macro into a pair of functions: BND_TO, returning an
> 	rtx_insn *, and...
> 	(SET_BND_TO): New function, for use where BND_TO is used as an
> 	lvalue.
>
> 	* sel-sched-ir.c (blist_add): Update lvalue usage of BND_TO to
> 	SET_BND_TO.
> 	(BND_TO): New function, adding a checked cast.
> 	(SET_BND_TO): New function.
>
> 	* sel-sched.c (move_cond_jump): Update lvalue usage of BND_TO to
> 	SET_BND_TO.
> 	(compute_av_set_on_boundaries): Likewise.
>
> /
> 	* rtx-classes-status.txt: Add SET_BND_TO
OK.
jeff

Re: [PATCH 016/236] BND_TO scaffolding

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 1203 bytes --]

On Tue, 2014-08-12 at 15:22 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > gcc/
> > 	* sel-sched-ir.h (BND_TO): insn_t will eventually be an
> > 	rtx_insn *.  To help with transition, for now, convert from an
> > 	access macro into a pair of functions: BND_TO, returning an
> > 	rtx_insn *, and...
> > 	(SET_BND_TO): New function, for use where BND_TO is used as an
> > 	lvalue.
> >
> > 	* sel-sched-ir.c (blist_add): Update lvalue usage of BND_TO to
> > 	SET_BND_TO.
> > 	(BND_TO): New function, adding a checked cast.
> > 	(SET_BND_TO): New function.
> >
> > 	* sel-sched.c (move_cond_jump): Update lvalue usage of BND_TO to
> > 	SET_BND_TO.
> > 	(compute_av_set_on_boundaries): Likewise.
> >
> > /
> > 	* rtx-classes-status.txt: Add SET_BND_TO
> OK.

Thanks.

Fixed up the as_a_nullable to safe_as_a, and committed to trunk as
r214170, having verified bootstrap&regrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone with 9 targets.

Am attaching what I committed.

FWIW these functions become a macro again in patch #173.


Dave

[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html


[-- Attachment #2: r214170.patch --]
[-- Type: text/x-patch, Size: 3414 bytes --]

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 214169)
+++ ChangeLog	(revision 214170)
@@ -1,5 +1,9 @@
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
 
+	* rtx-classes-status.txt (TODO): Add SET_BND_TO
+
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
 	* rtx-classes-status.txt (TODO): Add SET_BB_NOTE_LIST.
 
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
Index: rtx-classes-status.txt
===================================================================
--- rtx-classes-status.txt	(revision 214169)
+++ rtx-classes-status.txt	(revision 214170)
@@ -17,6 +17,7 @@
 * DF_REF_INSN
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
 * SET_BB_NOTE_LIST
+* SET_BND_TO
 * SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
 * SET_VINSN_INSN_RTX
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214169)
+++ gcc/ChangeLog	(revision 214170)
@@ -1,3 +1,21 @@
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	* sel-sched-ir.h (BND_TO): insn_t will eventually be an
+	rtx_insn *.  To help with transition, for now, convert from an
+	access macro into a pair of functions: BND_TO, returning an
+	rtx_insn *, and...
+	(SET_BND_TO): New function, for use where BND_TO is used as an
+	lvalue.
+
+	* sel-sched-ir.c (blist_add): Update lvalue usage of BND_TO to
+	SET_BND_TO.
+	(BND_TO): New function, adding a checked cast.
+	(SET_BND_TO): New function.
+
+	* sel-sched.c (move_cond_jump): Update lvalue usage of BND_TO to
+	SET_BND_TO.
+	(compute_av_set_on_boundaries): Likewise.
+
 2014-08-19  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* config/i386/i386.md (*ctz<mode>2_falsedep_1): Don't clear
Index: gcc/sel-sched.c
===================================================================
--- gcc/sel-sched.c	(revision 214169)
+++ gcc/sel-sched.c	(revision 214170)
@@ -4954,7 +4954,7 @@
 
   /* Jump is moved to the boundary.  */
   next = PREV_INSN (insn);
-  BND_TO (bnd) = insn;
+  SET_BND_TO (bnd) = insn;
 
   ft_edge = find_fallthru_edge_from (block_from);
   block_next = ft_edge->dest;
@@ -5095,7 +5095,7 @@
 	{
   	  gcc_assert (FENCE_INSN (fence) == BND_TO (bnd));
 	  FENCE_INSN (fence) = bnd_to;
-	  BND_TO (bnd) = bnd_to;
+	  SET_BND_TO (bnd) = bnd_to;
 	}
 
       av_set_clear (&BND_AV (bnd));
Index: gcc/sel-sched-ir.c
===================================================================
--- gcc/sel-sched-ir.c	(revision 214169)
+++ gcc/sel-sched-ir.c	(revision 214170)
@@ -207,7 +207,7 @@
   _list_add (lp);
   bnd = BLIST_BND (*lp);
 
-  BND_TO (bnd) = to;
+  SET_BND_TO (bnd) = to;
   BND_PTR (bnd) = ptr;
   BND_AV (bnd) = NULL;
   BND_AV1 (bnd) = NULL;
@@ -6463,4 +6463,14 @@
   return SEL_REGION_BB_INFO (bb)->note_list;
 }
 
+rtx_insn *BND_TO (bnd_t bnd)
+{
+  return safe_as_a <rtx_insn *> (bnd->to);
+}
+
+insn_t& SET_BND_TO (bnd_t bnd)
+{
+  return bnd->to;
+}
+
 #endif
Index: gcc/sel-sched-ir.h
===================================================================
--- gcc/sel-sched-ir.h	(revision 214169)
+++ gcc/sel-sched-ir.h	(revision 214170)
@@ -233,7 +233,8 @@
   deps_t dc;
 };
 typedef struct _bnd *bnd_t;
-#define BND_TO(B) ((B)->to)
+extern rtx_insn *BND_TO (bnd_t bnd);
+extern insn_t& SET_BND_TO (bnd_t bnd);
 
 /* PTR stands not for pointer as you might think, but as a Path To Root of the
    current instruction group from boundary B.  */

[PATCH 141/236] config/mips: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* config/mips/mips-protos.h (mips_emit_move): Strengthen return
	type from rtx to rtx_insn *.
	(mips_expand_call): Likewise.
	(mips_adjust_insn_length): Likewise for first param.
	(mips_output_conditional_branch): Likewise.
	(mips_output_order_conditional_branch): Likewise.
	(mips_final_prescan_insn): Likewise.

	* config/mips/mips.c (SEQ_BEGIN): For now, add checked cast to
	rtx_insn * for the SEQUENCE case.
	(SEQ_END): Likewise.
	(mips_emit_move): Strengthen return type from rtx to rtx_insn *.
	(mips_emit_call_insn): Likewise, also for local "insn".
	(mips16_gp_pseudo_reg): Likewise for local "scan".
	(mips16_build_call_stub): Likewise for return type and for local
	"insn".  Introduce a new local "pattern" so that "insn" can indeed
	be an insn.
	(mips_expand_call): Strengthen return type and local "insn" from
	rtx to rtx_insn *.
	(mips_block_move_loop): Strengthen local "label" from rtx to
	rtx_code_label *.
	(mips_expand_synci_loop): Likewise for locals "label",
	"end_label".
	(mips_set_frame_expr): Strengthen local "insn" from rtx to
	rtx_insn *.
	(mips16e_collect_argument_saves): Likewise for locals "insn",
	"next".
	(mips_find_gp_ref): Likewise for param of callback for "pred"
	param, and for local "insn".
	(mips_insn_has_inflexible_gp_ref_p): Likewise for param "insn".
	(mips_insn_has_flexible_gp_ref_p): Likewise.
	(mips_epilogue_emit_cfa_restores): Likewise for return type and
	local "insn".
	(mips_epilogue_set_cfa): Likewise for local "insn".
	(mips_expand_epilogue): Likewise.
	(mips_adjust_insn_length): Likewise for param "insn".
	(mips_output_conditional_branch): Likewise.
	(mips_output_order_conditional_branch): Likewise.
	(struct mips_ls2): Likewise for fields "alu1_turn_enabled_insn",
	"alu2_turn_enabled_insn", "falu1_turn_enabled_insn",
	"falu2_turn_enabled_insn".
	(mips_builtin_branch_and_move): Strengthen locals "true_label",
	"done_label" from rtx to rtx_code_label *.
	(struct mips16_constant): Likewise for field "label".
	(mips16_add_constant): Likewise for return type.
	(mips16_emit_constants_1): Strengthen return type and param "insn"
	from rtx to rtx_insn *.
	(mips16_emit_constants): Likewise for param "insn".
	(mips16_insn_length): Likewise.
	(mips16_rewrite_pool_constant): Strengthen local "label" from rtx
	to rtx_code_label *.
	(struct mips16_rewrite_pool_refs_info): Strengthen field "insn"
	from rtx to rtx_insn *.
	(mips16_lay_out_constants): Likewise for locals "insn", "barrier",
	"jump".  Strengthen local "label" from rtx to rtx_code_label *.
	(r10k_simplify_address): Strengthen param "insn" and local
	"def_insn" from rtx to rtx_insn *.
	(r10k_safe_address_p): Strengthen param "insn" from rtx to
	rtx_insn *.
	(r10k_needs_protection_p_1): Update target type of cast of data
	from to rtx to rtx_insn *.
	(r10k_needs_protection_p_store): Strengthen local "insn_ptr" from
	rtx * to rtx_insn **.
	(r10k_needs_protection_p): Strengthen param "insn" from rtx to
	rtx_insn *.
	(r10k_insert_cache_barriers): Likewise for locals "insn", "end".
	(mips_call_expr_from_insn): Likewise for param "insn".
	(mips_pic_call_symbol_from_set): Likewise for local "def_insn".
	(mips_find_pic_call_symbol): Likewise for param "insn".
	(mips_annotate_pic_calls): Likewise for local "insn".
	(mips_sim_insn): Likewise for this variable.
	(struct mips_sim): Likewise for field "insn" within elements of
	last_set array.
	(mips_sim_wait_reg): Likewise for param "insn".
	(mips_sim_wait_regs): Likewise.
	(mips_sim_wait_units): Likewise.
	(mips_sim_wait_insn): Likewise.
	(mips_sim_issue_insn): Likewise.
	(mips_sim_finish_insn): Likewise.
	(mips_seq_time): Likewise for param "seq" and local "insn".
	(vr4130_avoid_branch_rt_conflict): Likewise for param "insn" and
	locals "first", "second".
	(vr4130_align_insns): Likewise for locals "insn", "subinsn",
	"last", "last2", "next".
	(mips_avoid_hazard): Likewise for params "after", "insn".
	(mips_reorg_process_insns): Likewise for locals "insn",
	"last_insn", "subinsn", "next_insn".
	(mips_has_long_branch_p): Likewise for locals "insn", "subinsn".
	(mips16_split_long_branches): Likewise for locals "insn" "jump",
	"jump_sequence".
	(mips_output_mi_thunk): Likewise for local "insn".
	(mips_final_prescan_insn): Likewise for param "insn".
---
 gcc/config/mips/mips-protos.h |  16 ++--
 gcc/config/mips/mips.c        | 185 +++++++++++++++++++++++-------------------
 2 files changed, 111 insertions(+), 90 deletions(-)

diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h
index 3d59b7b..53f251d 100644
--- a/gcc/config/mips/mips-protos.h
+++ b/gcc/config/mips/mips-protos.h
@@ -199,7 +199,7 @@ extern int mips_const_insns (rtx);
 extern int mips_split_const_insns (rtx);
 extern int mips_load_store_insns (rtx, rtx);
 extern int mips_idiv_insns (void);
-extern rtx mips_emit_move (rtx, rtx);
+extern rtx_insn *mips_emit_move (rtx, rtx);
 #ifdef RTX_CODE
 extern void mips_emit_binary (enum rtx_code, rtx, rtx, rtx);
 #endif
@@ -229,7 +229,8 @@ extern void mips_expand_conditional_move (rtx *);
 extern void mips_expand_conditional_trap (rtx);
 #endif
 extern bool mips_use_pic_fn_addr_reg_p (const_rtx);
-extern rtx mips_expand_call (enum mips_call_type, rtx, rtx, rtx, rtx, bool);
+extern rtx_insn *mips_expand_call (enum mips_call_type, rtx, rtx, rtx, rtx,
+				   bool);
 extern void mips_split_call (rtx, rtx);
 extern bool mips_get_pic_call_symbol (rtx *, int);
 extern void mips_expand_fcc_reload (rtx, rtx, rtx);
@@ -288,11 +289,12 @@ extern enum reg_class mips_secondary_reload_class (enum reg_class,
 						   rtx, bool);
 extern int mips_class_max_nregs (enum reg_class, enum machine_mode);
 
-extern int mips_adjust_insn_length (rtx, int);
+extern int mips_adjust_insn_length (rtx_insn *, int);
 extern void mips_output_load_label (rtx);
-extern const char *mips_output_conditional_branch (rtx, rtx *, const char *,
-						   const char *);
-extern const char *mips_output_order_conditional_branch (rtx, rtx *, bool);
+extern const char *mips_output_conditional_branch (rtx_insn *, rtx *,
+						   const char *, const char *);
+extern const char *mips_output_order_conditional_branch (rtx_insn *, rtx *,
+							 bool);
 extern const char *mips_output_sync (void);
 extern const char *mips_output_sync_loop (rtx, rtx *);
 extern unsigned int mips_sync_loop_insns (rtx, rtx *);
@@ -350,7 +352,7 @@ extern void mips16_expand_set_fcsr (rtx);
 
 extern bool mips_eh_uses (unsigned int);
 extern bool mips_epilogue_uses (unsigned int);
-extern void mips_final_prescan_insn (rtx, rtx *, int);
+extern void mips_final_prescan_insn (rtx_insn *, rtx *, int);
 extern int mips_trampoline_code_size (void);
 extern void mips_function_profiler (FILE *);
 
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 804112c..7be20fe 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -123,13 +123,15 @@ along with GCC; see the file COPYING3.  If not see
    in the sequence, otherwise return INSN itself.  */
 #define SEQ_BEGIN(INSN)							\
   (INSN_P (INSN) && GET_CODE (PATTERN (INSN)) == SEQUENCE		\
-   ? XVECEXP (PATTERN (INSN), 0, 0)					\
+   ? as_a <rtx_insn *> (XVECEXP (PATTERN (INSN), 0, 0))			\
    : (INSN))
 
 /* Likewise for the last instruction in a delayed branch sequence.  */
 #define SEQ_END(INSN)							\
   (INSN_P (INSN) && GET_CODE (PATTERN (INSN)) == SEQUENCE		\
-   ? XVECEXP (PATTERN (INSN), 0, XVECLEN (PATTERN (INSN), 0) - 1)	\
+   ? as_a <rtx_insn *> (XVECEXP (PATTERN (INSN),			\
+				 0,					\
+				 XVECLEN (PATTERN (INSN), 0) - 1))	\
    : (INSN))
 
 /* Execute the following loop body with SUBINSN set to each instruction
@@ -1182,7 +1184,7 @@ static const struct mips_rtx_cost_data
   }
 };
 \f
-static rtx mips_find_pic_call_symbol (rtx, rtx, bool);
+static rtx mips_find_pic_call_symbol (rtx_insn *, rtx, bool);
 static int mips_register_move_cost (enum machine_mode, reg_class_t,
 				    reg_class_t);
 static unsigned int mips_function_arg_boundary (enum machine_mode, const_tree);
@@ -2734,7 +2736,7 @@ mips_idiv_insns (void)
    how to force Pmode objects into the constant pool even when the
    constant pool address is not itself legitimate.  */
 
-rtx
+rtx_insn *
 mips_emit_move (rtx dest, rtx src)
 {
   return (can_create_pseudo_p ()
@@ -2819,10 +2821,11 @@ mips_force_temporary (rtx dest, rtx value)
    ADDR is the legitimized form, and LAZY_P is true if the call
    address is lazily-bound.  */
 
-static rtx
+static rtx_insn *
 mips_emit_call_insn (rtx pattern, rtx orig_addr, rtx addr, bool lazy_p)
 {
-  rtx insn, reg;
+  rtx_insn *insn;
+  rtx reg;
 
   insn = emit_call_insn (pattern);
 
@@ -2938,7 +2941,8 @@ mips16_gp_pseudo_reg (void)
 {
   if (cfun->machine->mips16_gp_pseudo_rtx == NULL_RTX)
     {
-      rtx insn, scan;
+      rtx insn;
+      rtx_insn *scan;
 
       cfun->machine->mips16_gp_pseudo_rtx = gen_reg_rtx (Pmode);
 
@@ -6730,18 +6734,19 @@ mips16_copy_fpr_return_value (void)
    automatically redirects the JAL to the stub, otherwise the JAL
    continues to call FN directly.  */
 
-static rtx
+static rtx_insn *
 mips16_build_call_stub (rtx retval, rtx *fn_ptr, rtx args_size, int fp_code)
 {
   const char *fnname;
   bool fp_ret_p;
   struct mips16_stub *l;
-  rtx insn, fn;
+  rtx_insn *insn;
+  rtx pattern, fn;
 
   /* We don't need to do anything if we aren't in MIPS16 mode, or if
      we were invoked with the -msoft-float option.  */
   if (!TARGET_MIPS16 || TARGET_SOFT_FLOAT_ABI)
-    return NULL_RTX;
+    return NULL;
 
   /* Figure out whether the value might come back in a floating-point
      register.  */
@@ -6751,20 +6756,20 @@ mips16_build_call_stub (rtx retval, rtx *fn_ptr, rtx args_size, int fp_code)
      arguments and the value will not be returned in a floating-point
      register.  */
   if (fp_code == 0 && !fp_ret_p)
-    return NULL_RTX;
+    return NULL;
 
   /* We don't need to do anything if this is a call to a special
      MIPS16 support function.  */
   fn = *fn_ptr;
   if (mips16_stub_function_p (fn))
-    return NULL_RTX;
+    return NULL;
 
   /* If we're calling a locally-defined MIPS16 function, we know that
      it will return values in both the "soft-float" and "hard-float"
      registers.  There is no need to use a stub to move the latter
      to the former.  */
   if (fp_code == 0 && mips16_local_function_p (fn))
-    return NULL_RTX;
+    return NULL;
 
   /* This code will only work for o32 and o64 abis.  The other ABI's
      require more sophisticated support.  */
@@ -6777,7 +6782,8 @@ mips16_build_call_stub (rtx retval, rtx *fn_ptr, rtx args_size, int fp_code)
       || !call_insn_operand (fn, VOIDmode))
     {
       char buf[30];
-      rtx stub_fn, insn, addr;
+      rtx stub_fn, addr;
+      rtx_insn *insn;
       bool lazy_p;
 
       /* If this is a locally-defined and locally-binding function,
@@ -6785,7 +6791,7 @@ mips16_build_call_stub (rtx retval, rtx *fn_ptr, rtx args_size, int fp_code)
       if (mips16_local_function_p (fn))
 	{
 	  *fn_ptr = mips16_local_alias (fn);
-	  return NULL_RTX;
+	  return NULL;
 	}
 
       /* Create a SYMBOL_REF for the libgcc.a function.  */
@@ -7007,10 +7013,10 @@ mips16_build_call_stub (rtx retval, rtx *fn_ptr, rtx args_size, int fp_code)
     error ("cannot handle inconsistent calls to %qs", fnname);
 
   if (retval == NULL_RTX)
-    insn = gen_call_internal_direct (fn, args_size);
+    pattern = gen_call_internal_direct (fn, args_size);
   else
-    insn = gen_call_value_internal_direct (retval, fn, args_size);
-  insn = mips_emit_call_insn (insn, fn, fn, false);
+    pattern = gen_call_value_internal_direct (retval, fn, args_size);
+  insn = mips_emit_call_insn (pattern, fn, fn, false);
 
   /* If we are calling a stub which handles a floating-point return
      value, we need to arrange to save $18 in the prologue.  We do this
@@ -7035,11 +7041,12 @@ mips16_build_call_stub (rtx retval, rtx *fn_ptr, rtx args_size, int fp_code)
 
    Return the call itself.  */
 
-rtx
+rtx_insn *
 mips_expand_call (enum mips_call_type type, rtx result, rtx addr,
 		  rtx args_size, rtx aux, bool lazy_p)
 {
-  rtx orig_addr, pattern, insn;
+  rtx orig_addr, pattern;
+  rtx_insn *insn;
   int fp_code;
 
   fp_code = aux == 0 ? 0 : (int) GET_MODE (aux);
@@ -7391,7 +7398,8 @@ static void
 mips_block_move_loop (rtx dest, rtx src, HOST_WIDE_INT length,
 		      HOST_WIDE_INT bytes_per_iter)
 {
-  rtx label, src_reg, dest_reg, final_src, test;
+  rtx_code_label *label;
+  rtx src_reg, dest_reg, final_src, test;
   HOST_WIDE_INT leftover;
 
   leftover = length % bytes_per_iter;
@@ -7457,7 +7465,8 @@ mips_expand_block_move (rtx dest, rtx src, rtx length)
 void
 mips_expand_synci_loop (rtx begin, rtx end)
 {
-  rtx inc, label, end_label, cmp_result, mask, length;
+  rtx inc, cmp_result, mask, length;
+  rtx_code_label *label, *end_label;
 
   /* Create end_label.  */
   end_label = gen_label_rtx ();
@@ -9050,7 +9059,7 @@ mips_code_end (void)
 static void
 mips_set_frame_expr (rtx frame_pattern)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   insn = get_last_insn ();
   RTX_FRAME_RELATED_P (insn) = 1;
@@ -9218,7 +9227,8 @@ static unsigned int
 mips16e_collect_argument_saves (void)
 {
   rtx reg_values[FIRST_PSEUDO_REGISTER];
-  rtx insn, next, set, dest, src;
+  rtx_insn *insn, *next;
+  rtx set, dest, src;
   unsigned int nargs, regno;
 
   push_topmost_sequence ();
@@ -9554,9 +9564,9 @@ mips16_cfun_returns_in_fpr_p (void)
    if *CACHE is already true.  */
 
 static bool
-mips_find_gp_ref (bool *cache, bool (*pred) (rtx))
+mips_find_gp_ref (bool *cache, bool (*pred) (rtx_insn *))
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (!*cache)
     {
@@ -9576,7 +9586,7 @@ mips_find_gp_ref (bool *cache, bool (*pred) (rtx))
    See mips_cfun_has_inflexible_gp_ref_p for details.  */
 
 static bool
-mips_insn_has_inflexible_gp_ref_p (rtx insn)
+mips_insn_has_inflexible_gp_ref_p (rtx_insn *insn)
 {
   /* Uses of pic_offset_table_rtx in CALL_INSN_FUNCTION_USAGE
      indicate that the target could be a traditional MIPS
@@ -9629,7 +9639,7 @@ mips_cfun_has_inflexible_gp_ref_p (void)
    See mips_cfun_has_flexible_gp_ref_p for details.  */
 
 static bool
-mips_insn_has_flexible_gp_ref_p (rtx insn)
+mips_insn_has_flexible_gp_ref_p (rtx_insn *insn)
 {
   return (get_attr_got (insn) != GOT_UNSET
 	  || mips_small_data_pattern_p (PATTERN (insn))
@@ -11386,10 +11396,10 @@ mips_expand_prologue (void)
 /* Attach all pending register saves to the previous instruction.
    Return that instruction.  */
 
-static rtx
+static rtx_insn *
 mips_epilogue_emit_cfa_restores (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   insn = get_last_insn ();
   gcc_assert (insn && !REG_NOTES (insn));
@@ -11408,7 +11418,7 @@ mips_epilogue_emit_cfa_restores (void)
 static void
 mips_epilogue_set_cfa (rtx reg, HOST_WIDE_INT offset)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   insn = mips_epilogue_emit_cfa_restores ();
   if (reg != mips_epilogue.cfa_reg || offset != mips_epilogue.cfa_offset)
@@ -11504,7 +11514,8 @@ mips_expand_epilogue (bool sibcall_p)
 {
   const struct mips_frame_info *frame;
   HOST_WIDE_INT step1, step2;
-  rtx base, adjust, insn;
+  rtx base, adjust;
+  rtx_insn *insn;
   bool use_jraddiusp_p = false;
 
   if (!sibcall_p && mips_can_use_return_insn ())
@@ -12451,7 +12462,7 @@ mips_output_load_label (rtx target)
    attributes in the machine-description file.  */
 
 int
-mips_adjust_insn_length (rtx insn, int length)
+mips_adjust_insn_length (rtx_insn *insn, int length)
 {
   /* mips.md uses MAX_PIC_BRANCH_LENGTH as a placeholder for the length
      of a PIC long-branch sequence.  Substitute the correct value.  */
@@ -12505,7 +12516,7 @@ mips_adjust_insn_length (rtx insn, int length)
    version of BRANCH_IF_TRUE.  */
 
 const char *
-mips_output_conditional_branch (rtx insn, rtx *operands,
+mips_output_conditional_branch (rtx_insn *insn, rtx *operands,
 				const char *branch_if_true,
 				const char *branch_if_false)
 {
@@ -12588,7 +12599,7 @@ mips_output_conditional_branch (rtx insn, rtx *operands,
    its second is always zero.  */
 
 const char *
-mips_output_order_conditional_branch (rtx insn, rtx *operands, bool inverted_p)
+mips_output_order_conditional_branch (rtx_insn *insn, rtx *operands, bool inverted_p)
 {
   const char *branch[2];
 
@@ -13142,10 +13153,10 @@ static struct
      DFA state.
      E.g., when alu1_turn_enabled_insn is issued it makes next ALU1/2
      instruction to go ALU1.  */
-  rtx alu1_turn_enabled_insn;
-  rtx alu2_turn_enabled_insn;
-  rtx falu1_turn_enabled_insn;
-  rtx falu2_turn_enabled_insn;
+  rtx_insn *alu1_turn_enabled_insn;
+  rtx_insn *alu2_turn_enabled_insn;
+  rtx_insn *falu1_turn_enabled_insn;
+  rtx_insn *falu2_turn_enabled_insn;
 } mips_ls2;
 
 /* Implement TARGET_SCHED_ADJUST_COST.  We assume that anti and output
@@ -14502,7 +14513,7 @@ static rtx
 mips_builtin_branch_and_move (rtx condition, rtx target,
 			      rtx value_if_true, rtx value_if_false)
 {
-  rtx true_label, done_label;
+  rtx_code_label *true_label, *done_label;
 
   true_label = gen_label_rtx ();
   done_label = gen_label_rtx ();
@@ -14642,7 +14653,7 @@ mips_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
 struct mips16_constant {
   struct mips16_constant *next;
   rtx value;
-  rtx label;
+  rtx_code_label *label;
   enum machine_mode mode;
 };
 
@@ -14659,7 +14670,7 @@ struct mips16_constant_pool {
 /* Add constant VALUE to POOL and return its label.  MODE is the
    value's mode (used for CONST_INTs, etc.).  */
 
-static rtx
+static rtx_code_label *
 mips16_add_constant (struct mips16_constant_pool *pool,
 		     rtx value, enum machine_mode mode)
 {
@@ -14716,8 +14727,8 @@ mips16_add_constant (struct mips16_constant_pool *pool,
 /* Output constant VALUE after instruction INSN and return the last
    instruction emitted.  MODE is the mode of the constant.  */
 
-static rtx
-mips16_emit_constants_1 (enum machine_mode mode, rtx value, rtx insn)
+static rtx_insn *
+mips16_emit_constants_1 (enum machine_mode mode, rtx value, rtx_insn *insn)
 {
   if (SCALAR_INT_MODE_P (mode) || ALL_SCALAR_FIXED_POINT_MODE_P (mode))
     {
@@ -14744,7 +14755,7 @@ mips16_emit_constants_1 (enum machine_mode mode, rtx value, rtx insn)
 /* Dump out the constants in CONSTANTS after INSN.  */
 
 static void
-mips16_emit_constants (struct mips16_constant *constants, rtx insn)
+mips16_emit_constants (struct mips16_constant *constants, rtx_insn *insn)
 {
   struct mips16_constant *c, *next;
   int align;
@@ -14773,7 +14784,7 @@ mips16_emit_constants (struct mips16_constant *constants, rtx insn)
 /* Return the length of instruction INSN.  */
 
 static int
-mips16_insn_length (rtx insn)
+mips16_insn_length (rtx_insn *insn)
 {
   if (JUMP_TABLE_DATA_P (insn))
     {
@@ -14794,7 +14805,8 @@ mips16_insn_length (rtx insn)
 static void
 mips16_rewrite_pool_constant (struct mips16_constant_pool *pool, rtx *x)
 {
-  rtx base, offset, label;
+  rtx base, offset;
+  rtx_code_label *label;
 
   split_const (*x, &base, &offset);
   if (GET_CODE (base) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (base))
@@ -14810,7 +14822,7 @@ mips16_rewrite_pool_constant (struct mips16_constant_pool *pool, rtx *x)
    INSN is the instruction we're rewriting and POOL points to the current
    constant pool.  */
 struct mips16_rewrite_pool_refs_info {
-  rtx insn;
+  rtx_insn *insn;
   struct mips16_constant_pool *pool;
 };
 
@@ -14863,7 +14875,7 @@ mips16_lay_out_constants (bool split_p)
 {
   struct mips16_constant_pool pool;
   struct mips16_rewrite_pool_refs_info info;
-  rtx insn, barrier;
+  rtx_insn *insn, *barrier;
 
   if (!TARGET_MIPS16_PCREL_LOADS)
     return;
@@ -14900,7 +14912,8 @@ mips16_lay_out_constants (bool split_p)
 	     do it immediately before INSN.  */
 	  if (barrier == 0 && pool.insn_address + 4 > pool.highest_address)
 	    {
-	      rtx label, jump;
+	      rtx_code_label *label;
+	      rtx_insn *jump;
 
 	      label = gen_label_rtx ();
 
@@ -14948,9 +14961,10 @@ r10k_simplified_address_p (rtx x)
    virtual_incoming_args_rtx (which should never occur in X otherwise).  */
 
 static rtx
-r10k_simplify_address (rtx x, rtx insn)
+r10k_simplify_address (rtx x, rtx_insn *insn)
 {
-  rtx newx, op0, op1, set, def_insn, note;
+  rtx newx, op0, op1, set, note;
+  rtx_insn *def_insn;
   df_ref use, def;
   struct df_link *defs;
 
@@ -15052,7 +15066,7 @@ r10k_uncached_address_p (unsigned HOST_WIDE_INT address)
    expression; it might not be a legitimate address.  */
 
 static bool
-r10k_safe_address_p (rtx x, rtx insn)
+r10k_safe_address_p (rtx x, rtx_insn *insn)
 {
   rtx base, offset;
   HOST_WIDE_INT offset_val;
@@ -15117,7 +15131,7 @@ r10k_needs_protection_p_1 (rtx *loc, void *data)
       && r10k_safe_mem_expr_p (MEM_EXPR (mem), MEM_OFFSET (mem)))
     return -1;
 
-  if (r10k_safe_address_p (XEXP (mem, 0), (rtx) data))
+  if (r10k_safe_address_p (XEXP (mem, 0), (rtx_insn *) data))
     return -1;
 
   return 1;
@@ -15131,11 +15145,11 @@ static void
 r10k_needs_protection_p_store (rtx x, const_rtx pat ATTRIBUTE_UNUSED,
 			       void *data)
 {
-  rtx *insn_ptr;
+  rtx_insn **insn_ptr;
 
-  insn_ptr = (rtx *) data;
+  insn_ptr = (rtx_insn **) data;
   if (*insn_ptr && for_each_rtx (&x, r10k_needs_protection_p_1, *insn_ptr))
-    *insn_ptr = NULL_RTX;
+    *insn_ptr = NULL;
 }
 
 /* A for_each_rtx callback that iterates over the pattern of a CALL_INSN.
@@ -15161,7 +15175,7 @@ r10k_needs_protection_p_call (rtx *loc, void *data ATTRIBUTE_UNUSED)
    cache barrier.  */
 
 static bool
-r10k_needs_protection_p (rtx insn)
+r10k_needs_protection_p (rtx_insn *insn)
 {
   if (CALL_P (insn))
     return for_each_rtx (&PATTERN (insn), r10k_needs_protection_p_call, NULL);
@@ -15201,7 +15215,8 @@ r10k_insert_cache_barriers (void)
   unsigned int i, n;
   basic_block bb;
   sbitmap protected_bbs;
-  rtx insn, end, unprotected_region;
+  rtx_insn *insn, *end;
+  rtx unprotected_region;
 
   if (TARGET_MIPS16)
     {
@@ -15294,7 +15309,7 @@ r10k_insert_cache_barriers (void)
    SECOND_CALL.  */
 
 static rtx
-mips_call_expr_from_insn (rtx insn, rtx *second_call)
+mips_call_expr_from_insn (rtx_insn *insn, rtx *second_call)
 {
   rtx x;
   rtx x2;
@@ -15334,7 +15349,8 @@ mips_call_expr_from_insn (rtx insn, rtx *second_call)
 static rtx
 mips_pic_call_symbol_from_set (df_ref def, rtx reg, bool recurse_p)
 {
-  rtx def_insn, set;
+  rtx_insn *def_insn;
+  rtx set;
 
   if (DF_REF_IS_ARTIFICIAL (def))
     return NULL_RTX;
@@ -15397,7 +15413,7 @@ mips_pic_call_symbol_from_set (df_ref def, rtx reg, bool recurse_p)
    mips_pic_call_symbol_from_set.  */
 
 static rtx
-mips_find_pic_call_symbol (rtx insn, rtx reg, bool recurse_p)
+mips_find_pic_call_symbol (rtx_insn *insn, rtx reg, bool recurse_p)
 {
   df_ref use;
   struct df_link *defs;
@@ -15473,7 +15489,7 @@ static void
 mips_annotate_pic_calls (void)
 {
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
 
   FOR_EACH_BB_FN (bb, cfun)
     FOR_BB_INSNS (bb, insn)
@@ -15500,7 +15516,7 @@ mips_annotate_pic_calls (void)
 }
 \f
 /* A temporary variable used by for_each_rtx callbacks, etc.  */
-static rtx mips_sim_insn;
+static rtx_insn *mips_sim_insn;
 
 /* A structure representing the state of the processor pipeline.
    Used by the mips_sim_* family of functions.  */
@@ -15519,7 +15535,7 @@ struct mips_sim {
      LAST_SET[X].TIME is the time at which that instruction was issued.
      INSN is null if no instruction has yet set register X.  */
   struct {
-    rtx insn;
+    rtx_insn *insn;
     unsigned int time;
   } last_set[FIRST_PSEUDO_REGISTER];
 
@@ -15576,7 +15592,7 @@ mips_sim_next_cycle (struct mips_sim *state)
    register REG.  */
 
 static void
-mips_sim_wait_reg (struct mips_sim *state, rtx insn, rtx reg)
+mips_sim_wait_reg (struct mips_sim *state, rtx_insn *insn, rtx reg)
 {
   unsigned int regno, end_regno;
 
@@ -15616,7 +15632,7 @@ mips_sim_wait_regs_1 (rtx *x, void *data)
    dependencies are satisfied.  */
 
 static void
-mips_sim_wait_regs (struct mips_sim *state, rtx insn)
+mips_sim_wait_regs (struct mips_sim *state, rtx_insn *insn)
 {
   mips_sim_insn = insn;
   note_uses (&PATTERN (insn), mips_sim_wait_regs_1, state);
@@ -15626,7 +15642,7 @@ mips_sim_wait_regs (struct mips_sim *state, rtx insn)
    instruction INSN are available.  */
 
 static void
-mips_sim_wait_units (struct mips_sim *state, rtx insn)
+mips_sim_wait_units (struct mips_sim *state, rtx_insn *insn)
 {
   state_t tmp_state;
 
@@ -15640,7 +15656,7 @@ mips_sim_wait_units (struct mips_sim *state, rtx insn)
 /* Advance simulation state STATE until INSN is ready to issue.  */
 
 static void
-mips_sim_wait_insn (struct mips_sim *state, rtx insn)
+mips_sim_wait_insn (struct mips_sim *state, rtx_insn *insn)
 {
   mips_sim_wait_regs (state, insn);
   mips_sim_wait_units (state, insn);
@@ -15673,7 +15689,7 @@ mips_sim_record_set (rtx x, const_rtx pat ATTRIBUTE_UNUSED, void *data)
    been called).  */
 
 static void
-mips_sim_issue_insn (struct mips_sim *state, rtx insn)
+mips_sim_issue_insn (struct mips_sim *state, rtx_insn *insn)
 {
   curr_state = state->dfa_state;
 
@@ -15700,7 +15716,7 @@ mips_sim_issue_nop (struct mips_sim *state)
    SEQUENCE.  */
 
 static void
-mips_sim_finish_insn (struct mips_sim *state, rtx insn)
+mips_sim_finish_insn (struct mips_sim *state, rtx_insn *insn)
 {
   /* If INSN is a jump with an implicit delay slot, simulate a nop.  */
   if (JUMP_P (insn))
@@ -15735,10 +15751,10 @@ mips_sim_finish_insn (struct mips_sim *state, rtx insn)
    instruction sequence SEQ.  */
 
 static unsigned int
-mips_seq_time (struct mips_sim *state, rtx seq)
+mips_seq_time (struct mips_sim *state, rtx_insn *seq)
 {
   mips_sim_reset (state);
-  for (rtx insn = seq; insn; insn = NEXT_INSN (insn))
+  for (rtx_insn *insn = seq; insn; insn = NEXT_INSN (insn))
     {
       mips_sim_wait_insn (state, insn);
       mips_sim_issue_insn (state, insn);
@@ -15847,9 +15863,9 @@ mips_expand_to_rtl_hook (void)
    try to avoid it by swapping rs and rt.  */
 
 static void
-vr4130_avoid_branch_rt_conflict (rtx insn)
+vr4130_avoid_branch_rt_conflict (rtx_insn *insn)
 {
-  rtx first, second;
+  rtx_insn *first, *second;
 
   first = SEQ_BEGIN (insn);
   second = SEQ_END (insn);
@@ -15884,7 +15900,7 @@ static void
 vr4130_align_insns (void)
 {
   struct mips_sim state;
-  rtx insn, subinsn, last, last2, next;
+  rtx_insn *insn, *subinsn, *last, *last2, *next;
   bool aligned_p;
 
   dfa_start ();
@@ -16136,7 +16152,7 @@ mips_orphaned_high_part_p (mips_offset_table htab, rtx insn)
    LO_REG is an rtx for the LO register, used in dependence checking.  */
 
 static void
-mips_avoid_hazard (rtx after, rtx insn, int *hilo_delay,
+mips_avoid_hazard (rtx_insn *after, rtx_insn *insn, int *hilo_delay,
 		   rtx *delayed_reg, rtx lo_reg)
 {
   rtx pattern, set;
@@ -16201,7 +16217,8 @@ mips_avoid_hazard (rtx after, rtx insn, int *hilo_delay,
 static void
 mips_reorg_process_insns (void)
 {
-  rtx insn, last_insn, subinsn, next_insn, lo_reg, delayed_reg;
+  rtx_insn *insn, *last_insn, *subinsn, *next_insn;
+  rtx lo_reg, delayed_reg;
   int hilo_delay;
   mips_offset_table htab;
 
@@ -16331,7 +16348,7 @@ mips_reorg_process_insns (void)
 static bool
 mips_has_long_branch_p (void)
 {
-  rtx insn, subinsn;
+  rtx_insn *insn, *subinsn;
   int normal_length;
 
   /* We need up-to-date instruction lengths.  */
@@ -16440,7 +16457,7 @@ mips16_split_long_branches (void)
   /* Loop until the alignments for all targets are sufficient.  */
   do
     {
-      rtx insn;
+      rtx_insn *insn;
 
       shorten_branches (get_insns ());
       something_changed = false;
@@ -16450,7 +16467,8 @@ mips16_split_long_branches (void)
 	    && (any_condjump_p (insn) || any_uncondjump_p (insn)))
 	  {
 	    rtx old_label, new_label, temp, saved_temp;
-	    rtx target, jump, jump_sequence;
+	    rtx target;
+	    rtx_insn *jump, *jump_sequence;
 
 	    start_sequence ();
 
@@ -16583,7 +16601,8 @@ mips_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
 		      HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
 		      tree function)
 {
-  rtx this_rtx, temp1, temp2, insn, fnaddr;
+  rtx this_rtx, temp1, temp2, fnaddr;
+  rtx_insn *insn;
   bool use_sibcall_p;
 
   /* Pretend to be a post-reload pass while generating rtl.  */
@@ -17615,7 +17634,7 @@ mips_need_noat_wrapper_p (rtx insn, rtx *opvec, int noperands)
 /* Implement FINAL_PRESCAN_INSN.  */
 
 void
-mips_final_prescan_insn (rtx insn, rtx *opvec, int noperands)
+mips_final_prescan_insn (rtx_insn *insn, rtx *opvec, int noperands)
 {
   if (mips_need_noat_wrapper_p (insn, opvec, noperands))
     mips_push_asm_switch (&mips_noat);
-- 
1.8.5.3

[PATCH 146/236] config/rx: Use rtx_insn

[David Malcolm]

gcc/
	* config/rx/rx-protos.h (rx_adjust_insn_length): Strengthen first
	param from rtx to rtx_insn *.
	* config/rx/rx.c (rx_adjust_insn_length): Likewise for param "insn".
---
 gcc/config/rx/rx-protos.h | 2 +-
 gcc/config/rx/rx.c        | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rx/rx-protos.h b/gcc/config/rx/rx-protos.h
index 189afb0..6cfa8fc 100644
--- a/gcc/config/rx/rx-protos.h
+++ b/gcc/config/rx/rx-protos.h
@@ -27,7 +27,7 @@ extern void		rx_expand_prologue (void);
 extern int		rx_initial_elimination_offset (int, int);
 
 #ifdef RTX_CODE
-extern int		rx_adjust_insn_length (rtx, int);
+extern int		rx_adjust_insn_length (rtx_insn *, int);
 extern int 		rx_align_for_label (rtx, int);
 extern void             rx_emit_stack_popm (rtx *, bool);
 extern void             rx_emit_stack_pushm (rtx *);
diff --git a/gcc/config/rx/rx.c b/gcc/config/rx/rx.c
index c81b2d4..694e42d 100644
--- a/gcc/config/rx/rx.c
+++ b/gcc/config/rx/rx.c
@@ -3231,7 +3231,7 @@ rx_max_skip_for_label (rtx lab)
 /* Compute the real length of the extending load-and-op instructions.  */
 
 int
-rx_adjust_insn_length (rtx insn, int current_length)
+rx_adjust_insn_length (rtx_insn *insn, int current_length)
 {
   rtx extend, mem, offset;
   bool zero;
-- 
1.8.5.3

[PATCH 178/236] Remove BB_HEAD, BB_END, BB_HEADER scaffolding

[David Malcolm]

gcc/
	* basic-block.h (struct rtl_bb_info): Strengthen fields "end_"
	and "header_" from rtx to rtx_insn *.
	(struct basic_block_d): Likewise for field "head_" within "x"
	field of union basic_block_il_dependent.
	(BB_HEAD): Drop function...
	(SET_BB_HEAD): ...and this function in favor of...
	(BB_HEAD): ...reinstate macro.
	(BB_END): Drop function...
	(SET_BB_END): ...and this function in favor of...
	(BB_END): ...reinstate macro.
	(BB_HEADER): Drop function...
	(SET_BB_HEADER): ...and this function in favor of...
	(BB_HEADER): ...reinstate macro.

	* bb-reorder.c (add_labels_and_missing_jumps): Drop use of BB_END.
	(fix_crossing_unconditional_branches): Likewise.
	* caller-save.c (save_call_clobbered_regs): Likewise.
	(insert_one_insn): Drop use of SET_BB_HEAD and SET_BB_END.
	* cfgbuild.c (find_bb_boundaries): Drop use of SET_BB_END.
	* cfgcleanup.c (merge_blocks_move_successor_nojumps): Likewise.
	(merge_blocks_move_successor_nojumps): Likewise.
	(outgoing_edges_match): Update use of for_each_rtx to
	for_each_rtx_in_insn.
	* cfgexpand.c (expand_gimple_cond): Drop use of SET_BB_END.
	(expand_gimple_cond): Likewise.
	(expand_gimple_tailcall): Likewise.
	(expand_gimple_basic_block): Drop use of SET_BB_HEAD and
	SET_BB_END.
	(construct_exit_block): Drop use of SET_BB_END.
	* cfgrtl.c (cfg_layout_function_footer): Strengthen from rtx to
	rtx_insn *.
	(delete_insn): Rename param "insn" to "uncast_insn", introducing
	a new local "insn" with a checked cast to rtx_insn *.  Drop use of
	SET_BB_HEAD and SET_BB_END.
	(create_basic_block_structure): Drop use of SET_BB_HEAD and
	SET_BB_END.
	(rtl_delete_block): Drop use of SET_BB_HEAD.
	(rtl_split_block): Drop use of SET_BB_END.
	(emit_nop_for_unique_locus_between): Likewise.
	(rtl_merge_blocks): Drop use of SET_BB_END and SET_BB_HEAD.
	(block_label): Drop use of SET_BB_HEAD.
	(fixup_abnormal_edges): Drop use of SET_BB_END.
	(record_effective_endpoints): Drop use of SET_BB_HEADER.
	(relink_block_chain): Likewise.
	(fixup_reorder_chain): Drop use of SET_BB_END.
	(cfg_layout_duplicate_bb): Drop use of SET_BB_HEADER.
	(cfg_layout_delete_block): Strengthen local "to" from rtx * to
	rtx_insn **.  Drop use of SET_BB_HEADER.
	(cfg_layout_merge_blocks): Drop use of SET_BB_HEADER, SET_BB_END,
	SET_BB_HEAD.
	(BB_HEAD): Delete this function.
	(SET_BB_HEAD): Likewise.
	(BB_END): Likewise.
	(SET_BB_END): Likewise.
	(BB_HEADER): Likewise.
	(SET_BB_HEADER): Likewise.
	* emit-rtl.c (add_insn_after):  Rename param "insn" to
	"uncast_insn", adding a new local "insn" and a checked cast to
	rtx_insn *.  Drop use of SET_BB_END.
	(remove_insn): Strengthen locals "next" and "prev" from rtx to
	rtx_insn *.  Drop use of SET_BB_HEAD and SET_BB_END.
	(reorder_insns): Drop use of SET_BB_END.
	(emit_insn_after_1): Strengthen param "first" and locals "last",
	"after_after" from rtx to rtx_insn *.  Drop use of SET_BB_END.
	(emit_pattern_after_noloc): Add checked cast.
	* haifa-sched.c (get_ebb_head_tail): Drop use of SET_BB_END.
	(restore_other_notes): Likewise.
	(move_insn): Likewise.
	(sched_extend_bb): Likewise.
	(fix_jump_move): Likewise.
	* ifcvt.c (noce_process_if_block): Likewise.
	(dead_or_predicable): Likewise.
	* ira.c (update_equiv_regs): Drop use of SET_BB_HEAD.
	* reg-stack.c (change_stack): Drop use of SET_BB_END.
	* sel-sched-ir.c (sel_move_insn): Likewise.
	* sel-sched.c (move_nop_to_previous_block): Likewise.

	* config/c6x/c6x.c (hwloop_optimize): Drop use of SET_BB_HEAD and
	SET_BB_END.
	* config/ia64/ia64.c (emit_predicate_relation_info): Likewise.
/
	* rtx-classes-status.txt: SET_BB_HEAD, SET_BB_END, SET_BB_HEADER
	are done.
---
 gcc/basic-block.h      | 18 ++++------
 gcc/bb-reorder.c       |  4 +--
 gcc/caller-save.c      |  6 ++--
 gcc/cfgbuild.c         |  4 +--
 gcc/cfgcleanup.c       |  8 ++---
 gcc/cfgexpand.c        | 22 ++++++------
 gcc/cfgrtl.c           | 96 ++++++++++++++------------------------------------
 gcc/config/c6x/c6x.c   |  4 +--
 gcc/config/ia64/ia64.c |  6 ++--
 gcc/emit-rtl.c         | 27 +++++++-------
 gcc/haifa-sched.c      | 18 +++++-----
 gcc/ifcvt.c            |  4 +--
 gcc/ira.c              |  2 +-
 gcc/reg-stack.c        |  2 +-
 gcc/sel-sched-ir.c     |  2 +-
 gcc/sel-sched.c        |  2 +-
 rtx-classes-status.txt |  1 -
 17 files changed, 88 insertions(+), 138 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 5b2af29..b96c28a 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -122,11 +122,11 @@ struct loop;
 struct GTY(()) rtl_bb_info {
   /* The first insn of the block is embedded into bb->il.x.  */
   /* The last insn of the block.  */
-  rtx end_;
+  rtx_insn *end_;
 
   /* In CFGlayout mode points to insn notes/jumptables to be placed just before
      and after the block.   */
-  rtx header_;
+  rtx_insn *header_;
   rtx_insn *footer_;
 };
 
@@ -185,7 +185,7 @@ struct GTY((chain_next ("%h.next_bb"), chain_prev ("%h.prev_bb"))) basic_block_d
   union basic_block_il_dependent {
       struct gimple_bb_info GTY ((tag ("0"))) gimple;
       struct {
-        rtx head_;
+        rtx_insn *head_;
         struct rtl_bb_info * rtl;
       } GTY ((tag ("1"))) x;
     } GTY ((desc ("((%1.flags & BB_RTL) != 0)"))) il;
@@ -372,15 +372,9 @@ struct GTY(()) control_flow_graph {
    to rtx_insn.   Once the underlying fields are converted from rtx
    to rtx_insn, these can be converted back to macros.  */
 
-extern rtx_insn *BB_HEAD (const_basic_block bb);
-extern rtx& SET_BB_HEAD (basic_block bb);
-
-extern rtx_insn *BB_END (const_basic_block bb);
-extern rtx& SET_BB_END (basic_block bb);
-
-extern rtx_insn *BB_HEADER (const_basic_block bb);
-extern rtx& SET_BB_HEADER (basic_block bb);
-
+#define BB_HEAD(B)      (B)->il.x.head_
+#define BB_END(B)       (B)->il.x.rtl->end_
+#define BB_HEADER(B)    (B)->il.x.rtl->header_
 #define BB_FOOTER(B)    (B)->il.x.rtl->footer_
 
 /* Special block numbers [markers] for entry and exit.
diff --git a/gcc/bb-reorder.c b/gcc/bb-reorder.c
index 551320e..cad1675 100644
--- a/gcc/bb-reorder.c
+++ b/gcc/bb-reorder.c
@@ -1759,7 +1759,7 @@ add_labels_and_missing_jumps (vec<edge> crossing_edges)
       gcc_assert (single_succ_p (src));
 
       new_jump = emit_jump_insn_after (gen_jump (label), BB_END (src));
-      SET_BB_END (src) = new_jump;
+      BB_END (src) = new_jump;
       JUMP_LABEL (new_jump) = label;
       LABEL_NUSES (label) += 1;
 
@@ -2190,7 +2190,7 @@ fix_crossing_unconditional_branches (void)
 	      /* Make BB_END for cur_bb be the jump instruction (NOT the
 		 barrier instruction at the end of the sequence...).  */
 
-	      SET_BB_END (cur_bb) = jump_insn;
+	      BB_END (cur_bb) = jump_insn;
 	    }
 	}
     }
diff --git a/gcc/caller-save.c b/gcc/caller-save.c
index 03d22a0..8bdca51 100644
--- a/gcc/caller-save.c
+++ b/gcc/caller-save.c
@@ -921,7 +921,7 @@ save_call_clobbered_regs (void)
 		      if (NEXT_INSN (ins))
 			SET_PREV_INSN (NEXT_INSN (ins)) = ins;
                       if (BB_END (bb) == insn)
-			SET_BB_END (bb) = ins;
+			BB_END (bb) = ins;
 		    }
 		  else
 		    gcc_assert (DEBUG_INSN_P (ins));
@@ -1418,7 +1418,7 @@ insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
 
       CLEAR_REG_SET (&new_chain->dead_or_set);
       if (chain->insn == BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
-	SET_BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
+	BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
     }
   else
     {
@@ -1438,7 +1438,7 @@ insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
 		   &new_chain->live_throughout);
       CLEAR_REG_SET (&new_chain->dead_or_set);
       if (chain->insn == BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
-	SET_BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
+	BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
     }
   new_chain->block = chain->block;
   new_chain->is_caller_save_insn = 1;
diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index 3cd782c..dd6ed7a 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -462,7 +462,7 @@ find_bb_boundaries (basic_block bb)
 	  fallthru = split_block (bb, PREV_INSN (insn));
 	  if (flow_transfer_insn)
 	    {
-	      SET_BB_END (bb) = flow_transfer_insn;
+	      BB_END (bb) = flow_transfer_insn;
 
 	      /* Clean up the bb field for the insns between the blocks.  */
 	      for (x = NEXT_INSN (flow_transfer_insn);
@@ -499,7 +499,7 @@ find_bb_boundaries (basic_block bb)
      ordinary jump, we need to take care and move basic block boundary.  */
   if (flow_transfer_insn)
     {
-      SET_BB_END (bb) = flow_transfer_insn;
+      BB_END (bb) = flow_transfer_insn;
 
       /* Clean up the bb field for the insns that do not belong to BB.  */
       x = flow_transfer_insn;
diff --git a/gcc/cfgcleanup.c b/gcc/cfgcleanup.c
index 6930c03..1a35a89 100644
--- a/gcc/cfgcleanup.c
+++ b/gcc/cfgcleanup.c
@@ -728,7 +728,7 @@ merge_blocks_move_successor_nojumps (basic_block a, basic_block b)
   if (tablejump_p (BB_END (b), &label, &table)
       && prev_active_insn (label) == BB_END (b))
     {
-      SET_BB_END (b) = table;
+      BB_END (b) = table;
     }
 
   /* There had better have been a barrier there.  Delete it.  */
@@ -741,7 +741,7 @@ merge_blocks_move_successor_nojumps (basic_block a, basic_block b)
   reorder_insns_nobb (BB_HEAD (b), BB_END (b), BB_END (a));
 
   /* Restore the real end of b.  */
-  SET_BB_END (b) = real_b_end;
+  BB_END (b) = real_b_end;
 
   if (dump_file)
     fprintf (dump_file, "Moved block %d after %d and merged.\n",
@@ -1725,7 +1725,7 @@ outgoing_edges_match (int mode, basic_block bb1, basic_block bb2)
 		  rr.r1 = label1;
 		  rr.r2 = label2;
 		  rr.update_label_nuses = false;
-		  for_each_rtx (&SET_BB_END (bb1), replace_label, &rr);
+		  for_each_rtx_in_insn (&BB_END (bb1), replace_label, &rr);
 
 		  match = (old_insns_match_p (mode, BB_END (bb1), BB_END (bb2))
 			   == dir_both);
@@ -1739,7 +1739,7 @@ outgoing_edges_match (int mode, basic_block bb1, basic_block bb2)
 		     from the instruction is deleted too.  */
 		  rr.r1 = label2;
 		  rr.r2 = label1;
-		  for_each_rtx (&SET_BB_END (bb1), replace_label, &rr);
+		  for_each_rtx_in_insn (&BB_END (bb1), replace_label, &rr);
 
 		  return match;
 		}
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 51dfe73..bdd7028 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -2158,9 +2158,9 @@ expand_gimple_cond (basic_block bb, gimple stmt)
     set_curr_insn_location (false_edge->goto_locus);
   emit_jump (label_rtx_for_bb (false_edge->dest));
 
-  SET_BB_END (bb) = last;
+  BB_END (bb) = last;
   if (BARRIER_P (BB_END (bb)))
-    SET_BB_END (bb) = PREV_INSN (BB_END (bb));
+    BB_END (bb) = PREV_INSN (BB_END (bb));
   update_bb_for_insn (bb);
 
   new_bb = create_basic_block (NEXT_INSN (last), get_last_insn (), bb);
@@ -2175,7 +2175,7 @@ expand_gimple_cond (basic_block bb, gimple stmt)
   new_edge->probability = REG_BR_PROB_BASE;
   new_edge->count = new_bb->count;
   if (BARRIER_P (BB_END (new_bb)))
-    SET_BB_END (new_bb) = PREV_INSN (BB_END (new_bb));
+    BB_END (new_bb) = PREV_INSN (BB_END (new_bb));
   update_bb_for_insn (new_bb);
 
   maybe_dump_rtl_for_gimple_stmt (stmt, last2);
@@ -3468,7 +3468,7 @@ expand_gimple_tailcall (basic_block bb, gimple stmt, bool *can_fallthru)
 		 | EDGE_SIBCALL);
   e->probability += probability;
   e->count += count;
-  SET_BB_END (bb) = last;
+  BB_END (bb) = last;
   update_bb_for_insn (bb);
 
   if (NEXT_INSN (last))
@@ -3477,7 +3477,7 @@ expand_gimple_tailcall (basic_block bb, gimple stmt, bool *can_fallthru)
 
       last = BB_END (bb);
       if (BARRIER_P (last))
-	SET_BB_END (bb) = PREV_INSN (last);
+	BB_END (bb) = PREV_INSN (last);
     }
 
   maybe_dump_rtl_for_gimple_stmt (stmt, last2);
@@ -4943,15 +4943,15 @@ expand_gimple_basic_block (basic_block bb, bool disable_tail_calls)
 
       /* Java emits line number notes in the top of labels.
 	 ??? Make this go away once line number notes are obsoleted.  */
-      SET_BB_HEAD (bb) = NEXT_INSN (last);
+      BB_HEAD (bb) = NEXT_INSN (last);
       if (NOTE_P (BB_HEAD (bb)))
-	SET_BB_HEAD (bb) = NEXT_INSN (BB_HEAD (bb));
+	BB_HEAD (bb) = NEXT_INSN (BB_HEAD (bb));
       note = emit_note_after (NOTE_INSN_BASIC_BLOCK, BB_HEAD (bb));
 
       maybe_dump_rtl_for_gimple_stmt (stmt, last);
     }
   else
-    SET_BB_HEAD (bb) = note = emit_note (NOTE_INSN_BASIC_BLOCK);
+    BB_HEAD (bb) = note = emit_note (NOTE_INSN_BASIC_BLOCK);
 
   NOTE_BASIC_BLOCK (note) = bb;
 
@@ -5234,7 +5234,7 @@ expand_gimple_basic_block (basic_block bb, bool disable_tail_calls)
     last = PREV_INSN (last);
   if (JUMP_TABLE_DATA_P (last))
     last = PREV_INSN (PREV_INSN (last));
-  SET_BB_END (bb) = last;
+  BB_END (bb) = last;
 
   update_bb_for_insn (bb);
 
@@ -5337,7 +5337,7 @@ construct_exit_block (void)
     return;
   /* While emitting the function end we could move end of the last basic
      block.  */
-  SET_BB_END (prev_bb) = orig_end;
+  BB_END (prev_bb) = orig_end;
   while (NEXT_INSN (head) && NOTE_P (NEXT_INSN (head)))
     head = NEXT_INSN (head);
   /* But make sure exit_block starts with RETURN_LABEL, otherwise the
@@ -5349,7 +5349,7 @@ construct_exit_block (void)
       while (NEXT_INSN (head) != return_label)
 	{
 	  if (!NOTE_P (NEXT_INSN (head)))
-	    SET_BB_END (prev_bb) = NEXT_INSN (head);
+	    BB_END (prev_bb) = NEXT_INSN (head);
 	  head = NEXT_INSN (head);
 	}
     }
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 1949aff..965517b 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -64,7 +64,7 @@ along with GCC; see the file COPYING3.  If not see
 
 /* Holds the interesting leading and trailing notes for the function.
    Only applicable if the CFG is in cfglayout mode.  */
-static GTY(()) rtx cfg_layout_function_footer;
+static GTY(()) rtx_insn *cfg_layout_function_footer;
 static GTY(()) rtx cfg_layout_function_header;
 
 static rtx_insn *skip_insns_after_block (basic_block);
@@ -123,8 +123,9 @@ can_delete_label_p (const rtx_code_label *label)
 /* Delete INSN by patching it out.  */
 
 void
-delete_insn (rtx insn)
+delete_insn (rtx uncast_insn)
 {
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   rtx note;
   bool really_delete = true;
 
@@ -152,9 +153,9 @@ delete_insn (rtx insn)
 	      && bb == BLOCK_FOR_INSN (bb_note))
 	    {
 	      reorder_insns_nobb (insn, insn, bb_note);
-	      SET_BB_HEAD (bb) = bb_note;
+	      BB_HEAD (bb) = bb_note;
 	      if (BB_END (bb) == bb_note)
-		SET_BB_END (bb) = insn;
+		BB_END (bb) = insn;
 	    }
 	}
 
@@ -326,8 +327,8 @@ create_basic_block_structure (rtx_insn *head, rtx_insn *end, rtx_note *bb_note,
   if (NEXT_INSN (end) == bb_note)
     end = bb_note;
 
-  SET_BB_HEAD (bb) = head;
-  SET_BB_END (bb) = end;
+  BB_HEAD (bb) = head;
+  BB_END (bb) = end;
   bb->index = last_basic_block_for_fn (cfun)++;
   bb->flags = BB_NEW | BB_RTL;
   link_block (bb, after);
@@ -401,7 +402,7 @@ rtl_delete_block (basic_block b)
   end = get_last_bb_insn (b);
 
   /* Selectively delete the entire chain.  */
-  SET_BB_HEAD (b) = NULL;
+  BB_HEAD (b) = NULL;
   delete_insn_chain (insn, end, true);
 
 
@@ -745,7 +746,7 @@ rtl_split_block (basic_block bb, void *insnp)
   /* Create the new basic block.  */
   new_bb = create_basic_block (NEXT_INSN (insn), BB_END (bb), bb);
   BB_COPY_PARTITION (new_bb, bb);
-  SET_BB_END (bb) = insn;
+  BB_END (bb) = insn;
 
   /* Redirect the outgoing edges.  */
   new_bb->succs = bb->succs;
@@ -804,7 +805,7 @@ emit_nop_for_unique_locus_between (basic_block a, basic_block b)
   if (!unique_locus_on_edge_between_p (a, b))
     return;
 
-  SET_BB_END (a) = emit_insn_after_noloc (gen_nop (), BB_END (a), a);
+  BB_END (a) = emit_insn_after_noloc (gen_nop (), BB_END (a), a);
   INSN_LOCATION (BB_END (a)) = EDGE_SUCC (a, 0)->goto_locus;
 }
 
@@ -886,8 +887,8 @@ rtl_merge_blocks (basic_block a, basic_block b)
 
   /* Delete everything marked above as well as crap that might be
      hanging out between the two blocks.  */
-  SET_BB_END (a) = a_end;
-  SET_BB_HEAD (b) = b_empty ? NULL_RTX : b_head;
+  BB_END (a) = a_end;
+  BB_HEAD (b) = b_empty ? NULL : b_head;
   delete_insn_chain (del_first, del_last, true);
 
   /* When not optimizing and the edge is the only place in RTL which holds
@@ -903,8 +904,8 @@ rtl_merge_blocks (basic_block a, basic_block b)
     {
       update_bb_for_insn_chain (a_end, b_debug_end, a);
 
-      SET_BB_END (a) = b_debug_end;
-      SET_BB_HEAD (b) = NULL_RTX;
+      BB_END (a) = b_debug_end;
+      BB_HEAD (b) = NULL;
     }
   else if (b_end != b_debug_end)
     {
@@ -916,7 +917,7 @@ rtl_merge_blocks (basic_block a, basic_block b)
 	reorder_insns_nobb (NEXT_INSN (a_end), PREV_INSN (b_debug_start),
 			    b_debug_end);
       update_bb_for_insn_chain (b_debug_start, b_debug_end, a);
-      SET_BB_END (a) = b_debug_end;
+      BB_END (a) = b_debug_end;
     }
 
   df_bb_delete (b->index);
@@ -981,7 +982,7 @@ block_label (basic_block block)
 
   if (!LABEL_P (BB_HEAD (block)))
     {
-      SET_BB_HEAD (block) = emit_label_before (gen_label_rtx (), BB_HEAD (block));
+      BB_HEAD (block) = emit_label_before (gen_label_rtx (), BB_HEAD (block));
     }
 
   return BB_HEAD (block);
@@ -3260,7 +3261,7 @@ fixup_abnormal_edges (void)
 	      e = find_fallthru_edge (bb->succs);
 
 	      stop = NEXT_INSN (BB_END (bb));
-	      SET_BB_END (bb) = insn;
+	      BB_END (bb) = insn;
 
 	      for (insn = NEXT_INSN (insn); insn != stop; insn = next)
 		{
@@ -3456,7 +3457,7 @@ record_effective_endpoints (void)
       rtx_insn *end;
 
       if (PREV_INSN (BB_HEAD (bb)) && next_insn != BB_HEAD (bb))
-	SET_BB_HEADER (bb) = unlink_insn_chain (next_insn,
+	BB_HEADER (bb) = unlink_insn_chain (next_insn,
 						PREV_INSN (BB_HEAD (bb)));
       end = skip_insns_after_block (bb);
       if (NEXT_INSN (BB_END (bb)) && BB_END (bb) != end)
@@ -3620,7 +3621,7 @@ relink_block_chain (bool stay_in_cfglayout_mode)
     {
       bb->aux = NULL;
       if (!stay_in_cfglayout_mode)
-	SET_BB_HEADER (bb) = BB_FOOTER (bb) = NULL;
+	BB_HEADER (bb) = BB_FOOTER (bb) = NULL;
     }
 
   /* Maybe reset the original copy tables, they are not valid anymore
@@ -3913,7 +3914,7 @@ fixup_reorder_chain (void)
 		}
 	      nb = split_edge (e);
 	      if (!INSN_P (BB_END (nb)))
-		SET_BB_END (nb) = emit_insn_after_noloc (gen_nop (), BB_END (nb),
+		BB_END (nb) = emit_insn_after_noloc (gen_nop (), BB_END (nb),
 							 nb);
 	      INSN_LOCATION (BB_END (nb)) = e->goto_locus;
 
@@ -4193,7 +4194,7 @@ cfg_layout_duplicate_bb (basic_block bb)
 	insn = NEXT_INSN (insn);
       insn = duplicate_insn_chain (BB_HEADER (bb), insn);
       if (insn)
-	SET_BB_HEADER (new_bb) = unlink_insn_chain (insn, get_last_insn ());
+	BB_HEADER (new_bb) = unlink_insn_chain (insn, get_last_insn ());
     }
 
   if (BB_FOOTER (bb))
@@ -4416,7 +4417,7 @@ static void
 cfg_layout_delete_block (basic_block bb)
 {
   rtx_insn *insn, *next, *prev = PREV_INSN (BB_HEAD (bb)), *remaints;
-  rtx *to;
+  rtx_insn **to;
 
   if (BB_HEADER (bb))
     {
@@ -4466,7 +4467,7 @@ cfg_layout_delete_block (basic_block bb)
 	}
     }
   if (bb->next_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
-    to = &SET_BB_HEADER (bb->next_bb);
+    to = &BB_HEADER (bb->next_bb);
   else
     to = &cfg_layout_function_footer;
 
@@ -4608,7 +4609,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
 	  SET_PREV_INSN (BB_FOOTER (a)) = last;
 	  BB_FOOTER (a) = BB_HEADER (b);
 	}
-      SET_BB_HEADER (b) = NULL;
+      BB_HEADER (b) = NULL;
     }
 
   /* In the case basic blocks are not adjacent, move them around.  */
@@ -4622,7 +4623,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
   else
     {
       insn = BB_HEAD (b);
-      SET_BB_END (a) = BB_END (b);
+      BB_END (a) = BB_END (b);
     }
 
   /* emit_insn_after_noloc doesn't call df_insn_change_bb.
@@ -4633,7 +4634,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
   if (!NOTE_INSN_BASIC_BLOCK_P (insn))
     insn = NEXT_INSN (insn);
   gcc_assert (NOTE_INSN_BASIC_BLOCK_P (insn));
-  SET_BB_HEAD (b) = SET_BB_END (b) = NULL;
+  BB_HEAD (b) = BB_END (b) = NULL;
   delete_insn (insn);
 
   df_bb_delete (b->index);
@@ -5105,49 +5106,4 @@ struct cfg_hooks cfg_layout_rtl_cfg_hooks = {
   rtl_account_profile_record,
 };
 
-/* BB_HEAD as an rvalue. */
-
-rtx_insn *BB_HEAD (const_basic_block bb)
-{
-  rtx insn = bb->il.x.head_;
-  return as_a_nullable <rtx_insn *> (insn);
-}
-
-/* BB_HEAD for use as an lvalue. */
-
-rtx& SET_BB_HEAD (basic_block bb)
-{
-  return bb->il.x.head_;
-}
-
-/* BB_END as an rvalue. */
-
-rtx_insn *BB_END (const_basic_block bb)
-{
-  rtx insn = bb->il.x.rtl->end_;
-  return as_a_nullable <rtx_insn *> (insn);
-}
-
-/* BB_END as an lvalue. */
-
-rtx& SET_BB_END (basic_block bb)
-{
-  return bb->il.x.rtl->end_;
-}
-
-/* BB_HEADER as an rvalue. */
-
-rtx_insn *BB_HEADER (const_basic_block bb)
-{
-  rtx insn = bb->il.x.rtl->header_;
-  return as_a_nullable <rtx_insn *> (insn);
-}
-
-/* BB_HEADER as an lvalue. */
-
-rtx& SET_BB_HEADER (basic_block bb)
-{
-  return bb->il.x.rtl->header_;
-}
-
 #include "gt-cfgrtl.h"
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index c8d7f0b..9a83c3b 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -5833,8 +5833,8 @@ hwloop_optimize (hwloop_info loop)
   SET_NEXT_INSN (PREV_INSN (BB_HEAD (bb))) = orig_vec[0];
   SET_NEXT_INSN (orig_vec[n_insns - 1]) = NEXT_INSN (BB_END (bb));
   SET_PREV_INSN (NEXT_INSN (BB_END (bb))) = orig_vec[n_insns - 1];
-  SET_BB_HEAD (bb) = orig_vec[0];
-  SET_BB_END (bb) = orig_vec[n_insns - 1];
+  BB_HEAD (bb) = orig_vec[0];
+  BB_END (bb) = orig_vec[n_insns - 1];
  undo_splits:
   free_delay_pairs ();
   FOR_BB_INSNS (bb, insn)
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 3ff7b10..c95dcfc 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -9622,7 +9622,7 @@ emit_predicate_relation_info (void)
 	    rtx p = gen_rtx_REG (BImode, r);
 	    rtx_insn *n = emit_insn_after (gen_pred_rel_mutex (p), head);
 	    if (head == BB_END (bb))
-	      SET_BB_END (bb) = n;
+	      BB_END (bb) = n;
 	    head = n;
 	  }
     }
@@ -9645,9 +9645,9 @@ emit_predicate_relation_info (void)
 		emit_insn_before (gen_safe_across_calls_all (), insn);
 	      rtx_insn *a = emit_insn_after (gen_safe_across_calls_normal (), insn);
 	      if (BB_HEAD (bb) == insn)
-		SET_BB_HEAD (bb) = b;
+		BB_HEAD (bb) = b;
 	      if (BB_END (bb) == insn)
-		SET_BB_END (bb) = a;
+		BB_END (bb) = a;
 	    }
 
 	  if (insn == BB_END (bb))
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 40e3dfc..7a6a069 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3969,8 +3969,9 @@ add_insn_before_nobb (rtx insn, rtx before)
    they know how to update a SEQUENCE. */
 
 void
-add_insn_after (rtx insn, rtx after, basic_block bb)
+add_insn_after (rtx uncast_insn, rtx after, basic_block bb)
 {
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   add_insn_after_nobb (insn, after);
   if (!BARRIER_P (after)
       && !BARRIER_P (insn)
@@ -3985,7 +3986,7 @@ add_insn_after (rtx insn, rtx after, basic_block bb)
 	  /* Avoid clobbering of structure when creating new BB.  */
 	  && !BARRIER_P (insn)
 	  && !NOTE_INSN_BASIC_BLOCK_P (insn))
-	SET_BB_END (bb) = insn;
+	BB_END (bb) = insn;
     }
 }
 
@@ -4050,8 +4051,8 @@ set_insn_deleted (rtx insn)
 void
 remove_insn (rtx insn)
 {
-  rtx next = NEXT_INSN (insn);
-  rtx prev = PREV_INSN (insn);
+  rtx_insn *next = NEXT_INSN (insn);
+  rtx_insn *prev = PREV_INSN (insn);
   basic_block bb;
 
   if (prev)
@@ -4114,10 +4115,10 @@ remove_insn (rtx insn)
 	  /* Never ever delete the basic block note without deleting whole
 	     basic block.  */
 	  gcc_assert (!NOTE_P (insn));
-	  SET_BB_HEAD (bb) = next;
+	  BB_HEAD (bb) = next;
 	}
       if (BB_END (bb) == insn)
-	SET_BB_END (bb) = prev;
+	BB_END (bb) = prev;
     }
 }
 
@@ -4217,12 +4218,12 @@ reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn *after)
 	  && (bb2 = BLOCK_FOR_INSN (from)))
 	{
 	  if (BB_END (bb2) == to)
-	    SET_BB_END (bb2) = prev;
+	    BB_END (bb2) = prev;
 	  df_set_bb_dirty (bb2);
 	}
 
       if (BB_END (bb) == after)
-	SET_BB_END (bb) = to;
+	BB_END (bb) = to;
 
       for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
 	if (!BARRIER_P (x))
@@ -4368,10 +4369,10 @@ emit_label_before (rtx label, rtx before)
    efficiently.  */
 
 static rtx
-emit_insn_after_1 (rtx first, rtx after, basic_block bb)
+emit_insn_after_1 (rtx_insn *first, rtx after, basic_block bb)
 {
-  rtx last;
-  rtx after_after;
+  rtx_insn *last;
+  rtx_insn *after_after;
   if (!bb && !BARRIER_P (after))
     bb = BLOCK_FOR_INSN (after);
 
@@ -4390,7 +4391,7 @@ emit_insn_after_1 (rtx first, rtx after, basic_block bb)
 	  df_insn_rescan (last);
 	}
       if (BB_END (bb) == after)
-	SET_BB_END (bb) = last;
+	BB_END (bb) = last;
     }
   else
     for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
@@ -4430,7 +4431,7 @@ emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
     case CODE_LABEL:
     case BARRIER:
     case NOTE:
-      last = emit_insn_after_1 (x, after, bb);
+      last = emit_insn_after_1 (as_a <rtx_insn *> (x), after, bb);
       break;
 
 #ifdef ENABLE_RTL_CHECKING
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index a27e404..1f7e7cf 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -4758,7 +4758,7 @@ get_ebb_head_tail (basic_block beg, basic_block end,
 		reorder_insns_nobb (note, note, end_tail);
 
 		if (end_tail == BB_END (end))
-		  SET_BB_END (end) = note;
+		  BB_END (end) = note;
 
 		if (BLOCK_FOR_INSN (note) != end)
 		  df_insn_change_bb (note, end);
@@ -4817,7 +4817,7 @@ restore_other_notes (rtx_insn *head, basic_block head_bb)
       SET_NEXT_INSN (note_list) = head;
 
       if (BLOCK_FOR_INSN (head) != head_bb)
-	SET_BB_END (head_bb) = note_list;
+	BB_END (head_bb) = note_list;
 
       head = note_head;
     }
@@ -5216,7 +5216,7 @@ move_insn (rtx_insn *insn, rtx last, rtx nt)
 
 	  gcc_assert (BLOCK_FOR_INSN (PREV_INSN (insn)) == bb);
 
-	  SET_BB_END (bb) = PREV_INSN (insn);
+	  BB_END (bb) = PREV_INSN (insn);
 	}
 
       gcc_assert (BB_END (bb) != last);
@@ -5265,7 +5265,7 @@ move_insn (rtx_insn *insn, rtx last, rtx nt)
 
       /* Update BB_END, if needed.  */
       if (BB_END (bb) == last)
-	SET_BB_END (bb) = insn;
+	BB_END (bb) = insn;
     }
 
   SCHED_GROUP_P (insn) = 0;
@@ -7553,7 +7553,7 @@ sched_extend_bb (void)
       rtx_note *note = emit_note_after (NOTE_INSN_DELETED, end);
       /* Make note appear outside BB.  */
       set_block_for_insn (note, NULL);
-      SET_BB_END (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb) = end;
+      BB_END (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb) = end;
     }
 }
 
@@ -8240,18 +8240,18 @@ fix_jump_move (rtx jump)
 
   if (!NOTE_INSN_BASIC_BLOCK_P (BB_END (jump_bb_next)))
     /* if jump_bb_next is not empty.  */
-    SET_BB_END (jump_bb) = BB_END (jump_bb_next);
+    BB_END (jump_bb) = BB_END (jump_bb_next);
 
   if (BB_END (bb) != PREV_INSN (jump))
     /* Then there are instruction after jump that should be placed
        to jump_bb_next.  */
-    SET_BB_END (jump_bb_next) = BB_END (bb);
+    BB_END (jump_bb_next) = BB_END (bb);
   else
     /* Otherwise jump_bb_next is empty.  */
-    SET_BB_END (jump_bb_next) = NEXT_INSN (BB_HEAD (jump_bb_next));
+    BB_END (jump_bb_next) = NEXT_INSN (BB_HEAD (jump_bb_next));
 
   /* To make assertion in move_insn happy.  */
-  SET_BB_END (bb) = PREV_INSN (jump);
+  BB_END (bb) = PREV_INSN (jump);
 
   update_bb_for_insn (jump_bb_next);
 }
diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index c9cca6e..25e6493 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -2607,7 +2607,7 @@ noce_process_if_block (struct noce_if_info *if_info)
 	  rtx note;
 
 	  if (else_bb && insn_b == BB_END (else_bb))
-	    SET_BB_END (else_bb) = PREV_INSN (insn_b);
+	    BB_END (else_bb) = PREV_INSN (insn_b);
 	  reorder_insns (insn_b, insn_b, PREV_INSN (jump));
 
 	  /* If there was a REG_EQUAL note, delete it since it may have been
@@ -4379,7 +4379,7 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
       rtx_insn *insn;
 
       if (end == BB_END (merge_bb))
-	SET_BB_END (merge_bb) = PREV_INSN (head);
+	BB_END (merge_bb) = PREV_INSN (head);
 
       /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
 	 notes being moved might become invalid.  */
diff --git a/gcc/ira.c b/gcc/ira.c
index 71a8fc3..527b927 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -3864,7 +3864,7 @@ update_equiv_regs (void)
 		      REG_LIVE_LENGTH (regno) = 2;
 
 		      if (insn == BB_HEAD (bb))
-			SET_BB_HEAD (bb) = PREV_INSN (insn);
+			BB_HEAD (bb) = PREV_INSN (insn);
 
 		      ira_reg_equiv[regno].init_insns
 			= gen_rtx_INSN_LIST (VOIDmode, new_insn, NULL_RTX);
diff --git a/gcc/reg-stack.c b/gcc/reg-stack.c
index 4293911..2ce6026 100644
--- a/gcc/reg-stack.c
+++ b/gcc/reg-stack.c
@@ -2602,7 +2602,7 @@ change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack,
     }
 
   if (update_end)
-    SET_BB_END (current_block) = PREV_INSN (insn);
+    BB_END (current_block) = PREV_INSN (insn);
 }
 \f
 /* Print stack configuration.  */
diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 8fc1b1a..c47ce14 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -1435,7 +1435,7 @@ sel_move_insn (expr_t expr, int seqno, insn_t after)
   /* Update links from insn to bb and vice versa.  */
   df_insn_change_bb (insn, bb);
   if (BB_END (bb) == after)
-    SET_BB_END (bb) = insn;
+    BB_END (bb) = insn;
 
   prepare_insn_expr (insn, seqno);
   return insn;
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index a6065fd..bead27a 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -5210,7 +5210,7 @@ move_nop_to_previous_block (insn_t nop, basic_block prev_bb)
   SET_NEXT_INSN (nop) = note;
   SET_PREV_INSN (next_insn) = note;
 
-  SET_BB_END (prev_bb) = nop;
+  BB_END (prev_bb) = nop;
   BLOCK_FOR_INSN (nop) = prev_bb;
 }
 
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index 787e992..8d56d11 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -11,5 +11,4 @@ Phase 6: use extra rtx_def subclasses:             TODO
 TODO: "Scaffolding" to be removed
 =================================
 * DF_REF_INSN
-* SET_BB_HEAD, SET_BB_END, SET_BB_HEADER
 * SET_NEXT_INSN, SET_PREV_INSN
-- 
1.8.5.3

[PATCH 117/236] stack-ptr-mod.c: Use rtx_insn

[David Malcolm]

gcc/
	* stack-ptr-mod.c (pass_stack_ptr_mod::execute): Strengthen local
	"insn" from rtx to rtx_insn *.
---
 gcc/stack-ptr-mod.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/stack-ptr-mod.c b/gcc/stack-ptr-mod.c
index 75bec2f..a16369f 100644
--- a/gcc/stack-ptr-mod.c
+++ b/gcc/stack-ptr-mod.c
@@ -84,7 +84,7 @@ unsigned int
 pass_stack_ptr_mod::execute (function *fun)
 {
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
 
   /* Assume that the stack pointer is unchanging if alloca hasn't
      been used.  */
-- 
1.8.5.3

[PATCH 204/236] final.c: Use rtx_sequence

[David Malcolm]

gcc/
	* final.c (get_attr_length_1): Replace GET_CODE check with a
	dyn_cast, introducing local "seq" and the use of methods of
	rtx_sequence.
	(shorten_branches): Likewise, introducing local "body_seq".
	Strengthen local "inner_insn" from rtx to rtx_insn *.
	(reemit_insn_block_notes): Replace GET_CODE check with a
	dyn_cast, strengthening local "body" from rtx to rtx_sequence *.
	Use methods of rtx_sequence.
	(final_scan_insn): Likewise, introducing local "seq" for when
	"body" is known to be a SEQUENCE, using its methods.
---
 gcc/final.c | 35 +++++++++++++++++------------------
 1 file changed, 17 insertions(+), 18 deletions(-)

diff --git a/gcc/final.c b/gcc/final.c
index ea22464..b53367d 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -406,9 +406,9 @@ get_attr_length_1 (rtx uncast_insn, int (*fallback_fn) (rtx))
 
 	else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
 	  length = asm_insn_count (body) * fallback_fn (insn);
-	else if (GET_CODE (body) == SEQUENCE)
-	  for (i = 0; i < XVECLEN (body, 0); i++)
-	    length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
+	else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
+	  for (i = 0; i < seq->len (); i++)
+	    length += get_attr_length_1 (seq->insn (i), fallback_fn);
 	else
 	  length = fallback_fn (insn);
 	break;
@@ -1149,12 +1149,12 @@ shorten_branches (rtx_insn *first)
 	}
       else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
 	insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
-      else if (GET_CODE (body) == SEQUENCE)
+      else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body))
 	{
 	  int i;
 	  int const_delay_slots;
 #ifdef DELAY_SLOTS
-	  const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
+	  const_delay_slots = const_num_delay_slots (body_seq->insn (0));
 #else
 	  const_delay_slots = 0;
 #endif
@@ -1163,14 +1163,14 @@ shorten_branches (rtx_insn *first)
 	  /* Inside a delay slot sequence, we do not do any branch shortening
 	     if the shortening could change the number of delay slots
 	     of the branch.  */
-	  for (i = 0; i < XVECLEN (body, 0); i++)
+	  for (i = 0; i < body_seq->len (); i++)
 	    {
-	      rtx inner_insn = XVECEXP (body, 0, i);
+	      rtx_insn *inner_insn = body_seq->insn (i);
 	      int inner_uid = INSN_UID (inner_insn);
 	      int inner_length;
 
 	      if (GET_CODE (body) == ASM_INPUT
-		  || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
+		  || asm_noperands (PATTERN (inner_insn)) >= 0)
 		inner_length = (asm_insn_count (PATTERN (inner_insn))
 				* insn_default_length (inner_insn));
 	      else
@@ -1685,15 +1685,14 @@ reemit_insn_block_notes (void)
       this_block = insn_scope (insn);
       /* For sequences compute scope resulting from merging all scopes
 	 of instructions nested inside.  */
-      if (GET_CODE (PATTERN (insn)) == SEQUENCE)
+      if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn)))
 	{
 	  int i;
-	  rtx body = PATTERN (insn);
 
 	  this_block = NULL;
-	  for (i = 0; i < XVECLEN (body, 0); i++)
+	  for (i = 0; i < body->len (); i++)
 	    this_block = choose_inner_scope (this_block,
-					     insn_scope (XVECEXP (body, 0, i)));
+					     insn_scope (body->insn (i)));
 	}
       if (! this_block)
 	{
@@ -2614,7 +2613,7 @@ final_scan_insn (rtx uncast_insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 
 	app_disable ();
 
-	if (GET_CODE (body) == SEQUENCE)
+	if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
 	  {
 	    /* A delayed-branch sequence */
 	    int i;
@@ -2626,16 +2625,16 @@ final_scan_insn (rtx uncast_insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 	       thought unnecessary.  If that happens, cancel this sequence
 	       and cause that insn to be restored.  */
 
-	    next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
-	    if (next != XVECEXP (body, 0, 1))
+	    next = final_scan_insn (seq->insn (0), file, 0, 1, seen);
+	    if (next != seq->insn (1))
 	      {
 		final_sequence = 0;
 		return next;
 	      }
 
-	    for (i = 1; i < XVECLEN (body, 0); i++)
+	    for (i = 1; i < seq->len (); i++)
 	      {
-		rtx insn = XVECEXP (body, 0, i);
+		rtx_insn *insn = seq->insn (i);
 		rtx_insn *next = NEXT_INSN (insn);
 		/* We loop in case any instruction in a delay slot gets
 		   split.  */
@@ -2653,7 +2652,7 @@ final_scan_insn (rtx uncast_insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 	       called function.  Hence we don't preserve any CC-setting
 	       actions in these insns and the CC must be marked as being
 	       clobbered by the function.  */
-	    if (CALL_P (XVECEXP (body, 0, 0)))
+	    if (CALL_P (seq->insn (0)))
 	      {
 		CC_STATUS_INIT;
 	      }
-- 
1.8.5.3

Re: [PATCH 204/236] final.c: Use rtx_sequence

[Jeff Law]

On 08/06/14 11:23, David Malcolm wrote:
> gcc/
> 	* final.c (get_attr_length_1): Replace GET_CODE check with a
> 	dyn_cast, introducing local "seq" and the use of methods of
> 	rtx_sequence.
> 	(shorten_branches): Likewise, introducing local "body_seq".
> 	Strengthen local "inner_insn" from rtx to rtx_insn *.
> 	(reemit_insn_block_notes): Replace GET_CODE check with a
> 	dyn_cast, strengthening local "body" from rtx to rtx_sequence *.
> 	Use methods of rtx_sequence.
> 	(final_scan_insn): Likewise, introducing local "seq" for when
> 	"body" is known to be a SEQUENCE, using its methods.
So presumably a dyn_cast isn't terribly expensive here?  I guess I'm a 
bit fuzzy on whether or not we agreed to allow using dynamic casts?!? 
Doesn't that have to check the RTTI info which I would think would be 
considerably more expensive than just checking the code.  Or am I 
missing something here?

Jeff

Re: [PATCH 204/236] final.c: Use rtx_sequence

[Trevor Saunders]

On Fri, Aug 15, 2014 at 04:24:49PM -0600, Jeff Law wrote:
> On 08/06/14 11:23, David Malcolm wrote:
> >gcc/
> >	* final.c (get_attr_length_1): Replace GET_CODE check with a
> >	dyn_cast, introducing local "seq" and the use of methods of
> >	rtx_sequence.
> >	(shorten_branches): Likewise, introducing local "body_seq".
> >	Strengthen local "inner_insn" from rtx to rtx_insn *.
> >	(reemit_insn_block_notes): Replace GET_CODE check with a
> >	dyn_cast, strengthening local "body" from rtx to rtx_sequence *.
> >	Use methods of rtx_sequence.
> >	(final_scan_insn): Likewise, introducing local "seq" for when
> >	"body" is known to be a SEQUENCE, using its methods.
> So presumably a dyn_cast isn't terribly expensive here?  I guess I'm a bit
> fuzzy on whether or not we agreed to allow using dynamic casts?!? Doesn't
> that have to check the RTTI info which I would think would be considerably
> more expensive than just checking the code.  Or am I missing something here?

 your missing dyn_cast != dynamic_cast, the first is just a wrapper
 around as_a / is_a, and so doesn't use rtti.

Trev

> 
> Jeff
> 

Re: [PATCH 204/236] final.c: Use rtx_sequence

[David Malcolm]

On Fri, 2014-08-15 at 18:38 -0400, Trevor Saunders wrote:
> On Fri, Aug 15, 2014 at 04:24:49PM -0600, Jeff Law wrote:
> > On 08/06/14 11:23, David Malcolm wrote:
> > >gcc/
> > >	* final.c (get_attr_length_1): Replace GET_CODE check with a
> > >	dyn_cast, introducing local "seq" and the use of methods of
> > >	rtx_sequence.
> > >	(shorten_branches): Likewise, introducing local "body_seq".
> > >	Strengthen local "inner_insn" from rtx to rtx_insn *.
> > >	(reemit_insn_block_notes): Replace GET_CODE check with a
> > >	dyn_cast, strengthening local "body" from rtx to rtx_sequence *.
> > >	Use methods of rtx_sequence.
> > >	(final_scan_insn): Likewise, introducing local "seq" for when
> > >	"body" is known to be a SEQUENCE, using its methods.
> > So presumably a dyn_cast isn't terribly expensive here?  I guess I'm a bit
> > fuzzy on whether or not we agreed to allow using dynamic casts?!? Doesn't
> > that have to check the RTTI info which I would think would be considerably
> > more expensive than just checking the code.  Or am I missing something here?
> 
>  your missing dyn_cast != dynamic_cast, the first is just a wrapper
>  around as_a / is_a, and so doesn't use rtti.
> 
Yes; as Trevor notes, this isn't using C++'s dynamic_cast and RTTI, it's
using dyn_cast from our is-a.h, so this is just:

inline T
dyn_cast (U *p)
{
  if (is_a <T> (p))
    return is_a_helper <T>::cast (p);
  else
    return static_cast <T> (0);
}

and (after inlining with the specializations for
T == rtx_sequence *) is essentially just:

rtx_sequence *
dyn_cast (rtx p)
{
  if (GET_CODE (p) == SEQUENCE)
    return reinterpret_cast <rtx_sequence *> (p);
  else
    return static_cast <rtx_sequence *> (0);
}

i.e. back to just a GET_CODE check again (albeit with a new local, of
the subclass ptr type; I don't know how well our optimizations handle
that yet: the idea that a local ptr X is either equal to another local
ptr Y or is NULL.  Does our value-numbering cope with this, where one
ptr is a subclass of another?).

Dave

Re: [PATCH 204/236] final.c: Use rtx_sequence

[Jeff Law]

On 08/15/14 18:56, David Malcolm wrote:
> On Fri, 2014-08-15 at 18:38 -0400, Trevor Saunders wrote:
>
> i.e. back to just a GET_CODE check again (albeit with a new local, of
> the subclass ptr type; I don't know how well our optimizations handle
> that yet: the idea that a local ptr X is either equal to another local
> ptr Y or is NULL.  Does our value-numbering cope with this, where one
> ptr is a subclass of another?).
I'm not sure what you're asking.  If you can give me the gimple I can 
probably answer ;-)

In general the gimple optimizers don't care/know about class 
relationships.   So if the pointers point to the same object, but have 
different types, it's likely we won't optimize away things as well as 
we'd like.
jeff

Re: [PATCH 204/236] final.c: Use rtx_sequence

[Jeff Law]

On 08/15/14 16:38, Trevor Saunders wrote:
> On Fri, Aug 15, 2014 at 04:24:49PM -0600, Jeff Law wrote:
>> On 08/06/14 11:23, David Malcolm wrote:
>>> gcc/
>>> 	* final.c (get_attr_length_1): Replace GET_CODE check with a
>>> 	dyn_cast, introducing local "seq" and the use of methods of
>>> 	rtx_sequence.
>>> 	(shorten_branches): Likewise, introducing local "body_seq".
>>> 	Strengthen local "inner_insn" from rtx to rtx_insn *.
>>> 	(reemit_insn_block_notes): Replace GET_CODE check with a
>>> 	dyn_cast, strengthening local "body" from rtx to rtx_sequence *.
>>> 	Use methods of rtx_sequence.
>>> 	(final_scan_insn): Likewise, introducing local "seq" for when
>>> 	"body" is known to be a SEQUENCE, using its methods.
>> So presumably a dyn_cast isn't terribly expensive here?  I guess I'm a bit
>> fuzzy on whether or not we agreed to allow using dynamic casts?!? Doesn't
>> that have to check the RTTI info which I would think would be considerably
>> more expensive than just checking the code.  Or am I missing something here?
>
>   your missing dyn_cast != dynamic_cast, the first is just a wrapper
>   around as_a / is_a, and so doesn't use rtti.
Ah.  Nevermind my concerns then :-)

jeff

[PATCH 114/236] sel-sched.c: Use rtx_insn

[David Malcolm]

gcc/
	* sel-sched.c (substitute_reg_in_expr): Strengthen local
	"new_insn" from rtx to rtx_insn *.
	(create_insn_rtx_with_rhs): Likewise for return type and for local
	"insn_rtx".
	(create_insn_rtx_with_lhs): Likewise.
	(create_speculation_check): Likewise for local "insn_rtx".
	(implicit_clobber_conflict_p): Likewise for local "insn".
	(get_expr_cost): Likewise.
	(emit_bookkeeping_insn): Likewise for local "new_insn_rtx".
	(move_cond_jump): Likewise for locals "next", "prev", "link",
	"head", "from", "to".
---
 gcc/sel-sched.c | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index d697b95..d9ec878 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -753,7 +753,7 @@ substitute_reg_in_expr (expr_t expr, insn_t insn, bool undo)
   /* Substitute if INSN has a form of x:=y and LHS(INSN) occurs in *VI.  */
   if (rtx_ok_for_substitution_p (old, *where))
     {
-      rtx new_insn;
+      rtx_insn *new_insn;
       rtx *where_replace;
 
       /* We should copy these rtxes before substitution.  */
@@ -864,12 +864,12 @@ rtx_ok_for_substitution_p (rtx what, rtx where)
 
 /* Substitute VI's set source with REGNO.  Returns newly created pattern
    that has REGNO as its source.  */
-static rtx
+static rtx_insn *
 create_insn_rtx_with_rhs (vinsn_t vi, rtx rhs_rtx)
 {
   rtx lhs_rtx;
   rtx pattern;
-  rtx insn_rtx;
+  rtx_insn *insn_rtx;
 
   lhs_rtx = copy_rtx (VINSN_LHS (vi));
 
@@ -945,12 +945,12 @@ replace_dest_with_reg_ok_p (insn_t insn, rtx new_reg)
 }
 
 /* Create a pattern with rhs of VI and lhs of LHS_RTX.  */
-static rtx
+static rtx_insn *
 create_insn_rtx_with_lhs (vinsn_t vi, rtx lhs_rtx)
 {
   rtx rhs_rtx;
   rtx pattern;
-  rtx insn_rtx;
+  rtx_insn *insn_rtx;
 
   rhs_rtx = copy_rtx (VINSN_RHS (vi));
 
@@ -1809,7 +1809,7 @@ static insn_t
 create_speculation_check (expr_t c_expr, ds_t check_ds, insn_t orig_insn)
 {
   rtx check_pattern;
-  rtx insn_rtx;
+  rtx_insn *insn_rtx;
   insn_t insn;
   basic_block recovery_block;
   rtx label;
@@ -2110,7 +2110,8 @@ static bool
 implicit_clobber_conflict_p (insn_t through_insn, expr_t expr)
 {
   HARD_REG_SET temp;
-  rtx insn, reg, rhs, pat;
+  rtx_insn *insn;
+  rtx reg, rhs, pat;
   hard_reg_set_iterator hrsi;
   unsigned regno;
   bool valid;
@@ -4334,7 +4335,7 @@ estimate_insn_cost (rtx insn, state_t state)
 static int
 get_expr_cost (expr_t expr, fence_t fence)
 {
-  rtx insn = EXPR_INSN_RTX (expr);
+  rtx_insn *insn = EXPR_INSN_RTX (expr);
 
   if (recog_memoized (insn) < 0)
     {
@@ -4804,7 +4805,7 @@ find_seqno_for_bookkeeping (insn_t place_to_insert, insn_t join_point)
 static insn_t
 emit_bookkeeping_insn (insn_t place_to_insert, expr_t c_expr, int new_seqno)
 {
-  rtx new_insn_rtx = create_copy_of_insn_rtx (EXPR_INSN_RTX (c_expr));
+  rtx_insn *new_insn_rtx = create_copy_of_insn_rtx (EXPR_INSN_RTX (c_expr));
 
   vinsn_t new_vinsn
     = create_vinsn_from_insn_rtx (new_insn_rtx,
@@ -4932,7 +4933,7 @@ move_cond_jump (rtx insn, bnd_t bnd)
 {
   edge ft_edge;
   basic_block block_from, block_next, block_new, block_bnd, bb;
-  rtx next, prev, link, head;
+  rtx_insn *next, *prev, *link, *head;
 
   block_from = BLOCK_FOR_INSN (insn);
   block_bnd = BLOCK_FOR_INSN (BND_TO (bnd));
@@ -4979,7 +4980,7 @@ move_cond_jump (rtx insn, bnd_t bnd)
   head = BB_HEAD (block_new);
   while (bb != block_from->next_bb)
     {
-      rtx from, to;
+      rtx_insn *from, *to;
       from = bb == block_bnd ? prev : sel_bb_head (bb);
       to = bb == block_from ? next : sel_bb_end (bb);
 
-- 
1.8.5.3

[PATCH 136/236] config/ia64/ia64.c: Use rtx_insn

[David Malcolm]

gcc/
	* config/ia64/ia64.c (ia64_expand_tls_address): Strengthen local
	"insns" from rtx to rtx_insn *.
	(ia64_emit_cond_move): Likewise for locals "insn", "first".
	(struct spill_fill_data): Likewise for field "init_after" and for
	elements of array field "prev_insn".
	(spill_restore_mem): Likewise for locals "insn", "first".
	(do_spill): Likewise for local "insn".
	(do_restore): Likewise.
	(ia64_expand_prologue): Likewise.
	(ia64_expand_epilogue): Likewise.
	(emit_insn_group_barriers): Likewise for locals "insn",
	"last_label".
	(emit_all_insn_group_barriers): Likewise for locals "insn",
	"last".
	(dfa_stop_insn): Likewise for this global.
	(dfa_pre_cycle_insn): Likewise.
	(ia64_nop): Likewise.
	(final_emit_insn_group_barriers): Likewise for locals "insn",
	"last".
	(emit_predicate_relation_info): Likewise for locals "head", "n",
	"insn", "b", "a".
	(ia64_reorg): Likewise for local "insn".
	(ia64_output_mi_thunk): Likewise.
	(expand_vec_perm_interleave_2): Likewise for local "seq".
---
 gcc/config/ia64/ia64.c | 63 ++++++++++++++++++++++++++++----------------------
 1 file changed, 35 insertions(+), 28 deletions(-)

diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 3b25f2e..1abd4ee 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -1159,7 +1159,8 @@ static rtx
 ia64_expand_tls_address (enum tls_model tls_kind, rtx op0, rtx op1,
 			 rtx orig_op1, HOST_WIDE_INT addend)
 {
-  rtx tga_op1, tga_op2, tga_ret, tga_eqv, tmp, insns;
+  rtx tga_op1, tga_op2, tga_ret, tga_eqv, tmp;
+  rtx_insn *insns;
   rtx orig_op0 = op0;
   HOST_WIDE_INT addend_lo, addend_hi;
 
@@ -1340,7 +1341,7 @@ ia64_expand_move (rtx op0, rtx op1)
 void
 ia64_emit_cond_move (rtx op0, rtx op1, rtx cond)
 {
-  rtx insn, first = get_last_insn ();
+  rtx_insn *insn, *first = get_last_insn ();
 
   emit_move_insn (op0, op1);
 
@@ -2995,11 +2996,11 @@ ia64_initial_elimination_offset (int from, int to)
 
 struct spill_fill_data
 {
-  rtx init_after;		/* point at which to emit initializations */
+  rtx_insn *init_after;		/* point at which to emit initializations */
   rtx init_reg[2];		/* initial base register */
   rtx iter_reg[2];		/* the iterator registers */
   rtx *prev_addr[2];		/* address of last memory use */
-  rtx prev_insn[2];		/* the insn corresponding to prev_addr */
+  rtx_insn *prev_insn[2];	/* the insn corresponding to prev_addr */
   HOST_WIDE_INT prev_off[2];	/* last offset */
   int n_iter;			/* number of iterators in use */
   int next_iter;		/* next iterator to use */
@@ -3087,7 +3088,8 @@ spill_restore_mem (rtx reg, HOST_WIDE_INT cfa_off)
     }
   else
     {
-      rtx seq, insn;
+      rtx seq;
+      rtx_insn *insn;
 
       if (disp == 0)
 	seq = gen_movdi (spill_fill_data.iter_reg[iter],
@@ -3116,7 +3118,7 @@ spill_restore_mem (rtx reg, HOST_WIDE_INT cfa_off)
 	insn = emit_insn_after (seq, spill_fill_data.init_after);
       else
 	{
-	  rtx first = get_insns ();
+	  rtx_insn *first = get_insns ();
 	  if (first)
 	    insn = emit_insn_before (seq, first);
 	  else
@@ -3147,7 +3149,8 @@ do_spill (rtx (*move_fn) (rtx, rtx, rtx), rtx reg, HOST_WIDE_INT cfa_off,
 	  rtx frame_reg)
 {
   int iter = spill_fill_data.next_iter;
-  rtx mem, insn;
+  rtx mem;
+  rtx_insn *insn;
 
   mem = spill_restore_mem (reg, cfa_off);
   insn = emit_insn ((*move_fn) (mem, reg, GEN_INT (cfa_off)));
@@ -3188,7 +3191,7 @@ static void
 do_restore (rtx (*move_fn) (rtx, rtx, rtx), rtx reg, HOST_WIDE_INT cfa_off)
 {
   int iter = spill_fill_data.next_iter;
-  rtx insn;
+  rtx_insn *insn;
 
   insn = emit_insn ((*move_fn) (reg, spill_restore_mem (reg, cfa_off),
 				GEN_INT (cfa_off)));
@@ -3443,7 +3446,8 @@ output_probe_stack_range (rtx reg1, rtx reg2)
 void
 ia64_expand_prologue (void)
 {
-  rtx insn, ar_pfs_save_reg, ar_unat_save_reg;
+  rtx_insn *insn;
+  rtx ar_pfs_save_reg, ar_unat_save_reg;
   int i, epilogue_p, regno, alt_regno, cfa_off, n_varargs;
   rtx reg, alt_reg;
 
@@ -3854,7 +3858,8 @@ ia64_start_function (FILE *file, const char *fnname,
 void
 ia64_expand_epilogue (int sibcall_p)
 {
-  rtx insn, reg, alt_reg, ar_unat_save_reg;
+  rtx_insn *insn;
+  rtx reg, alt_reg, ar_unat_save_reg;
   int regno, alt_regno, cfa_off;
 
   ia64_compute_frame_size (get_frame_size ());
@@ -6949,8 +6954,8 @@ safe_group_barrier_needed (rtx insn)
 static void
 emit_insn_group_barriers (FILE *dump)
 {
-  rtx insn;
-  rtx last_label = 0;
+  rtx_insn *insn;
+  rtx_insn *last_label = 0;
   int insns_since_last_label = 0;
 
   init_insn_group_barriers ();
@@ -7005,7 +7010,7 @@ emit_insn_group_barriers (FILE *dump)
 static void
 emit_all_insn_group_barriers (FILE *dump ATTRIBUTE_UNUSED)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   init_insn_group_barriers ();
 
@@ -7013,7 +7018,7 @@ emit_all_insn_group_barriers (FILE *dump ATTRIBUTE_UNUSED)
     {
       if (BARRIER_P (insn))
 	{
-	  rtx last = prev_active_insn (insn);
+	  rtx_insn *last = prev_active_insn (insn);
 
 	  if (! last)
 	    continue;
@@ -7078,7 +7083,7 @@ static int pos_1, pos_2, pos_3, pos_4, pos_5, pos_6;
 
 /* The following variable value is an insn group barrier.  */
 
-static rtx dfa_stop_insn;
+static rtx_insn *dfa_stop_insn;
 
 /* The following variable value is the last issued insn.  */
 
@@ -7556,7 +7561,7 @@ ia64_first_cycle_multipass_dfa_lookahead_guard (rtx insn, int ready_index)
    scheduler to change the DFA state when the simulated clock is
    increased.  */
 
-static rtx dfa_pre_cycle_insn;
+static rtx_insn *dfa_pre_cycle_insn;
 
 /* Returns 1 when a meaningful insn was scheduled between the last group
    barrier and LAST.  */
@@ -8649,7 +8654,7 @@ finish_bundle_state_table (void)
 /* The following variable is a insn `nop' used to check bundle states
    with different number of inserted nops.  */
 
-static rtx ia64_nop;
+static rtx_insn *ia64_nop;
 
 /* The following function tries to issue NOPS_NUM nops for the current
    state without advancing processor cycle.  If it failed, the
@@ -9378,7 +9383,7 @@ ia64_sched_finish (FILE *dump, int sched_verbose)
 static void
 final_emit_insn_group_barriers (FILE *dump ATTRIBUTE_UNUSED)
 {
-  rtx insn;
+  rtx_insn *insn;
   int need_barrier_p = 0;
   int seen_good_insn = 0;
 
@@ -9390,7 +9395,7 @@ final_emit_insn_group_barriers (FILE *dump ATTRIBUTE_UNUSED)
     {
       if (BARRIER_P (insn))
 	{
-	  rtx last = prev_active_insn (insn);
+	  rtx_insn *last = prev_active_insn (insn);
 
 	  if (! last)
 	    continue;
@@ -9418,7 +9423,7 @@ final_emit_insn_group_barriers (FILE *dump ATTRIBUTE_UNUSED)
 	    {
 	      if (TARGET_EARLY_STOP_BITS)
 		{
-		  rtx last;
+		  rtx_insn *last;
 
 		  for (last = insn;
 		       last != current_sched_info->prev_head;
@@ -9601,7 +9606,7 @@ emit_predicate_relation_info (void)
   FOR_EACH_BB_REVERSE_FN (bb, cfun)
     {
       int r;
-      rtx head = BB_HEAD (bb);
+      rtx_insn *head = BB_HEAD (bb);
 
       /* We only need such notes at code labels.  */
       if (! LABEL_P (head))
@@ -9615,7 +9620,7 @@ emit_predicate_relation_info (void)
 	if (REGNO_REG_SET_P (df_get_live_in (bb), r))
 	  {
 	    rtx p = gen_rtx_REG (BImode, r);
-	    rtx n = emit_insn_after (gen_pred_rel_mutex (p), head);
+	    rtx_insn *n = emit_insn_after (gen_pred_rel_mutex (p), head);
 	    if (head == BB_END (bb))
 	      SET_BB_END (bb) = n;
 	    head = n;
@@ -9628,7 +9633,7 @@ emit_predicate_relation_info (void)
      the call.  */
   FOR_EACH_BB_REVERSE_FN (bb, cfun)
     {
-      rtx insn = BB_HEAD (bb);
+      rtx_insn *insn = BB_HEAD (bb);
 
       while (1)
 	{
@@ -9636,8 +9641,9 @@ emit_predicate_relation_info (void)
 	      && GET_CODE (PATTERN (insn)) == COND_EXEC
 	      && find_reg_note (insn, REG_NORETURN, NULL_RTX))
 	    {
-	      rtx b = emit_insn_before (gen_safe_across_calls_all (), insn);
-	      rtx a = emit_insn_after (gen_safe_across_calls_normal (), insn);
+	      rtx_insn *b =
+		emit_insn_before (gen_safe_across_calls_all (), insn);
+	      rtx_insn *a = emit_insn_after (gen_safe_across_calls_normal (), insn);
 	      if (BB_HEAD (bb) == insn)
 		SET_BB_HEAD (bb) = b;
 	      if (BB_END (bb) == insn)
@@ -9771,7 +9777,7 @@ ia64_reorg (void)
      properly.  Note that IA-64 differs from dwarf2 on this point.  */
   if (ia64_except_unwind_info (&global_options) == UI_TARGET)
     {
-      rtx insn;
+      rtx_insn *insn;
       int saw_stop = 0;
 
       insn = get_last_insn ();
@@ -10741,7 +10747,8 @@ ia64_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
 		      HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
 		      tree function)
 {
-  rtx this_rtx, insn, funexp;
+  rtx this_rtx, funexp;
+  rtx_insn *insn;
   unsigned int this_parmno;
   unsigned int this_regno;
   rtx delta_rtx;
@@ -11400,7 +11407,7 @@ expand_vec_perm_interleave_2 (struct expand_vec_perm_d *d)
   unsigned char remap[2 * MAX_VECT_LEN];
   unsigned contents, i, nelt, nelt2;
   unsigned h0, h1, h2, h3;
-  rtx seq;
+  rtx_insn *seq;
   bool ok;
 
   if (d->one_operand_p)
-- 
1.8.5.3

[PATCH 076/236] function.c: Use rtx_insn

[David Malcolm]

gcc/
	* function.c (emit_initial_value_sets): Strengthen local "seq"
	from rtx to rtx_insn *.
	(instantiate_virtual_regs_in_insn): Likewise for param "insn" and
	local "seq".
	(instantiate_virtual_regs): Likewise for local "insn".
	(assign_parm_setup_reg): Likewise for locals "linsn", "sinsn".
	(reorder_blocks_1): Likewise for param "insns" and local "insn".
	(expand_function_end): Likewise for locals "insn" and "seq".
	(epilogue_done): Likewise for local "insn".
	(thread_prologue_and_epilogue_insns): Likewise for locals "prev",
	"last", "trial".
	(reposition_prologue_and_epilogue_notes): Likewise for locals
	"insn", "last", "note", "first".
	(match_asm_constraints_1): Likewise for param "insn" and local "insns".
	(pass_match_asm_constraints::execute): Likewise for local "insn".
---
 gcc/function.c | 39 ++++++++++++++++++++++-----------------
 1 file changed, 22 insertions(+), 17 deletions(-)

diff --git a/gcc/function.c b/gcc/function.c
index 4d8d32d..b2c9d81 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -114,7 +114,7 @@ vec<tree, va_gc> *types_used_by_cur_var_decl;
 static struct temp_slot *find_temp_slot_from_address (rtx);
 static void pad_to_arg_alignment (struct args_size *, int, struct args_size *);
 static void pad_below (struct args_size *, enum machine_mode, tree);
-static void reorder_blocks_1 (rtx, tree, vec<tree> *);
+static void reorder_blocks_1 (rtx_insn *, tree, vec<tree> *);
 static int all_blocks (tree, tree *);
 static tree *get_block_vector (tree, int *);
 extern tree debug_find_var_in_block_tree (tree, tree);
@@ -1299,7 +1299,7 @@ emit_initial_value_sets (void)
 {
   struct initial_value_struct *ivs = crtl->hard_reg_initial_vals;
   int i;
-  rtx seq;
+  rtx_insn *seq;
 
   if (ivs == 0)
     return 0;
@@ -1492,12 +1492,13 @@ safe_insn_predicate (int code, int operand, rtx x)
    registers present inside of insn.  The result will be a valid insn.  */
 
 static void
-instantiate_virtual_regs_in_insn (rtx insn)
+instantiate_virtual_regs_in_insn (rtx_insn *insn)
 {
   HOST_WIDE_INT offset;
   int insn_code, i;
   bool any_change = false;
-  rtx set, new_rtx, x, seq;
+  rtx set, new_rtx, x;
+  rtx_insn *seq;
 
   /* There are some special cases to be handled first.  */
   set = single_set (insn);
@@ -1888,7 +1889,7 @@ instantiate_decls (tree fndecl)
 static unsigned int
 instantiate_virtual_regs (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   /* Compute the offsets to use for this function.  */
   in_arg_offset = FIRST_PARM_OFFSET (current_function_decl);
@@ -3161,8 +3162,9 @@ assign_parm_setup_reg (struct assign_parm_data_all *all, tree parm,
       && reg_mentioned_p (virtual_incoming_args_rtx,
 			  XEXP (data->stack_parm, 0)))
     {
-      rtx linsn = get_last_insn ();
-      rtx sinsn, set;
+      rtx_insn *linsn = get_last_insn ();
+      rtx_insn *sinsn;
+      rtx set;
 
       /* Mark complex types separately.  */
       if (GET_CODE (parmreg) == CONCAT)
@@ -4145,9 +4147,10 @@ clear_block_marks (tree block)
 }
 
 static void
-reorder_blocks_1 (rtx insns, tree current_block, vec<tree> *p_block_stack)
+reorder_blocks_1 (rtx_insn *insns, tree current_block,
+		  vec<tree> *p_block_stack)
 {
-  rtx insn;
+  rtx_insn *insn;
   tree prev_beg = NULL_TREE, prev_end = NULL_TREE;
 
   for (insn = insns; insn; insn = NEXT_INSN (insn))
@@ -4976,7 +4979,7 @@ expand_function_end (void)
      space for another stack frame.  */
   if (flag_stack_check == GENERIC_STACK_CHECK)
     {
-      rtx insn, seq;
+      rtx_insn *insn, *seq;
 
       for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
 	if (CALL_P (insn))
@@ -5735,7 +5738,7 @@ thread_prologue_and_epilogue_insns (void)
      EPILOGUE_BEG note and mark the insns as epilogue insns.  */
   FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR_FOR_FN (cfun)->preds)
     {
-      rtx prev, last, trial;
+      rtx_insn *prev, *last, *trial;
 
       if (e->flags & EDGE_FALLTHRU)
 	continue;
@@ -5844,7 +5847,7 @@ epilogue_done:
 							     )
     {
       basic_block bb = e->src;
-      rtx insn = BB_END (bb);
+      rtx_insn *insn = BB_END (bb);
       rtx ep_seq;
 
       if (!CALL_P (insn)
@@ -5923,7 +5926,7 @@ reposition_prologue_and_epilogue_notes (void)
   if (prologue_insn_hash != NULL)
     {
       size_t len = htab_elements (prologue_insn_hash);
-      rtx insn, last = NULL, note = NULL;
+      rtx_insn *insn, *last = NULL, *note = NULL;
 
       /* Scan from the beginning until we reach the last prologue insn.  */
       /* ??? While we do have the CFG intact, there are two problems:
@@ -5974,7 +5977,7 @@ reposition_prologue_and_epilogue_notes (void)
 
       FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR_FOR_FN (cfun)->preds)
 	{
-	  rtx insn, first = NULL, note = NULL;
+	  rtx_insn *insn, *first = NULL, *note = NULL;
 	  basic_block bb = e->src;
 
 	  /* Scan from the beginning until we reach the first epilogue insn. */
@@ -6306,7 +6309,7 @@ make_pass_thread_prologue_and_epilogue (gcc::context *ctxt)
      asm ("": "=mr" (inout_2) : "0" (inout_2));  */
 
 static void
-match_asm_constraints_1 (rtx insn, rtx *p_sets, int noutputs)
+match_asm_constraints_1 (rtx_insn *insn, rtx *p_sets, int noutputs)
 {
   int i;
   bool changed = false;
@@ -6318,7 +6321,8 @@ match_asm_constraints_1 (rtx insn, rtx *p_sets, int noutputs)
   memset (output_matched, 0, noutputs * sizeof (bool));
   for (i = 0; i < ninputs; i++)
     {
-      rtx input, output, insns;
+      rtx input, output;
+      rtx_insn *insns;
       const char *constraint = ASM_OPERANDS_INPUT_CONSTRAINT (op, i);
       char *end;
       int match, j;
@@ -6439,7 +6443,8 @@ unsigned
 pass_match_asm_constraints::execute (function *fun)
 {
   basic_block bb;
-  rtx insn, pat, *p_sets;
+  rtx_insn *insn;
+  rtx pat, *p_sets;
   int noutputs;
 
   if (!crtl->has_asm_statement)
-- 
1.8.5.3

[PATCH 122/236] var-tracking.c: Use rtx_insn

[David Malcolm]

gcc/
	* var-tracking.c (struct micro_operation_def): Strengthen field
	"insn" from rtx to rtx_insn *.
	(struct emit_note_data_def): Likewise.
	(insn_stack_adjust_offset_pre_post): Likewise for param "insn".
	(vt_stack_adjustments): Likewise for local "insn".
	(adjust_insn): Likewise for param "insn".
	(val_store): Likewise.
	(val_resolve): Likewise.
	(struct count_use_info): Likewise for field "insn".
	(log_op_type): Likewise for param "insn".
	(reverse_op): Likewise.
	(prepare_call_arguments): Likewise.
	(add_with_sets):  The initial param takes an insn, but we can't
	yet strengthen it from rtx to rtx_insn * since it's used as a
	cselib_record_sets_hook callback.  For now rename initial param
	from "insn" to "uncast_insn", and introduce a local "insn" of
	the stronger rtx_insn * type, with a checked cast.
	(compute_bb_dataflow): Strengthen local "insn" from rtx to
	rtx_insn *.
	(emit_note_insn_var_location): Likewise.
	(emit_notes_for_changes): Likewise.
	(emit_notes_for_differences): Likewise.
	(next_non_note_insn_var_location): Likewise for return type and
	for param "insn".
	(emit_notes_in_bb): Likewise for locals "insn" and "next_insn".
	(vt_initialize): Likewise for local "insn".
	(delete_debug_insns): Likewise for locals "insn" and "next".
---
 gcc/var-tracking.c | 48 +++++++++++++++++++++++++-----------------------
 1 file changed, 25 insertions(+), 23 deletions(-)

diff --git a/gcc/var-tracking.c b/gcc/var-tracking.c
index ed8abdc..4d30650 100644
--- a/gcc/var-tracking.c
+++ b/gcc/var-tracking.c
@@ -179,7 +179,7 @@ typedef struct micro_operation_def
      instruction or note in the original flow (before any var-tracking
      notes are inserted, to simplify emission of notes), for MO_SET
      and MO_CLOBBER.  */
-  rtx insn;
+  rtx_insn *insn;
 
   union {
     /* Location.  For MO_SET and MO_COPY, this is the SET that
@@ -509,7 +509,7 @@ typedef variable_table_type::iterator variable_iterator_type;
 typedef struct emit_note_data_def
 {
   /* The instruction which the note will be emitted before/after.  */
-  rtx insn;
+  rtx_insn *insn;
 
   /* Where the note will be emitted (before/after insn)?  */
   enum emit_note_where where;
@@ -622,7 +622,7 @@ static bool cselib_hook_called;
 /* Local function prototypes.  */
 static void stack_adjust_offset_pre_post (rtx, HOST_WIDE_INT *,
 					  HOST_WIDE_INT *);
-static void insn_stack_adjust_offset_pre_post (rtx, HOST_WIDE_INT *,
+static void insn_stack_adjust_offset_pre_post (rtx_insn *, HOST_WIDE_INT *,
 					       HOST_WIDE_INT *);
 static bool vt_stack_adjustments (void);
 
@@ -793,7 +793,7 @@ stack_adjust_offset_pre_post (rtx pattern, HOST_WIDE_INT *pre,
    PRE- and POST-modifying stack pointer.  */
 
 static void
-insn_stack_adjust_offset_pre_post (rtx insn, HOST_WIDE_INT *pre,
+insn_stack_adjust_offset_pre_post (rtx_insn *insn, HOST_WIDE_INT *pre,
 				   HOST_WIDE_INT *post)
 {
   rtx pattern;
@@ -862,7 +862,7 @@ vt_stack_adjustments (void)
       /* Check if the edge destination has been visited yet.  */
       if (!VTI (dest)->visited)
 	{
-	  rtx insn;
+	  rtx_insn *insn;
 	  HOST_WIDE_INT pre, post, offset;
 	  VTI (dest)->visited = true;
 	  VTI (dest)->in.stack_adjust = offset = VTI (src)->out.stack_adjust;
@@ -1198,7 +1198,7 @@ adjust_mem_stores (rtx loc, const_rtx expr, void *data)
    as other sets to the insn.  */
 
 static void
-adjust_insn (basic_block bb, rtx insn)
+adjust_insn (basic_block bb, rtx_insn *insn)
 {
   struct adjust_mem_data amd;
   rtx set;
@@ -2470,7 +2470,8 @@ val_bind (dataflow_set *set, rtx val, rtx loc, bool modified)
    values bound to it.  */
 
 static void
-val_store (dataflow_set *set, rtx val, rtx loc, rtx insn, bool modified)
+val_store (dataflow_set *set, rtx val, rtx loc, rtx_insn *insn,
+	   bool modified)
 {
   cselib_val *v = CSELIB_VAL_PTR (val);
 
@@ -2601,7 +2602,7 @@ val_reset (dataflow_set *set, decl_or_value dv)
    value.  */
 
 static void
-val_resolve (dataflow_set *set, rtx val, rtx loc, rtx insn)
+val_resolve (dataflow_set *set, rtx val, rtx loc, rtx_insn *insn)
 {
   decl_or_value dv = dv_from_value (val);
 
@@ -5296,7 +5297,7 @@ var_lowpart (enum machine_mode mode, rtx loc)
 struct count_use_info
 {
   /* The insn where the RTX is.  */
-  rtx insn;
+  rtx_insn *insn;
 
   /* The basic block where insn is.  */
   basic_block bb;
@@ -5478,7 +5479,7 @@ use_type (rtx loc, struct count_use_info *cui, enum machine_mode *modep)
    INSN of BB.  */
 
 static inline void
-log_op_type (rtx x, basic_block bb, rtx insn,
+log_op_type (rtx x, basic_block bb, rtx_insn *insn,
 	     enum micro_operation_type mopt, FILE *out)
 {
   fprintf (out, "bb %i op %i insn %i %s ",
@@ -5730,7 +5731,7 @@ add_uses_1 (rtx *x, void *cui)
    no longer live we can express its value as VAL - 6.  */
 
 static void
-reverse_op (rtx val, const_rtx expr, rtx insn)
+reverse_op (rtx val, const_rtx expr, rtx_insn *insn)
 {
   rtx src, arg, ret;
   cselib_val *v;
@@ -6127,7 +6128,7 @@ static rtx call_arguments;
 /* Compute call_arguments.  */
 
 static void
-prepare_call_arguments (basic_block bb, rtx insn)
+prepare_call_arguments (basic_block bb, rtx_insn *insn)
 {
   rtx link, x, call;
   rtx prev, cur, next;
@@ -6463,8 +6464,9 @@ prepare_call_arguments (basic_block bb, rtx insn)
    first place, in which case sets and n_sets will be 0).  */
 
 static void
-add_with_sets (rtx insn, struct cselib_set *sets, int n_sets)
+add_with_sets (rtx uncast_insn, struct cselib_set *sets, int n_sets)
 {
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   basic_block bb = BLOCK_FOR_INSN (insn);
   int n1, n2;
   struct count_use_info cui;
@@ -6661,7 +6663,7 @@ compute_bb_dataflow (basic_block bb)
 
   FOR_EACH_VEC_ELT (VTI (bb)->mos, i, mo)
     {
-      rtx insn = mo->insn;
+      rtx_insn *insn = mo->insn;
 
       switch (mo->type)
 	{
@@ -8585,7 +8587,7 @@ int
 emit_note_insn_var_location (variable_def **varp, emit_note_data *data)
 {
   variable var = *varp;
-  rtx insn = data->insn;
+  rtx_insn *insn = data->insn;
   enum emit_note_where where = data->where;
   variable_table_type vars = data->vars;
   rtx_note *note;
@@ -8966,7 +8968,7 @@ process_changed_values (variable_table_type htab)
    the notes shall be emitted before of after instruction INSN.  */
 
 static void
-emit_notes_for_changes (rtx insn, enum emit_note_where where,
+emit_notes_for_changes (rtx_insn *insn, enum emit_note_where where,
 			shared_hash vars)
 {
   emit_note_data data;
@@ -9084,7 +9086,7 @@ emit_notes_for_differences_2 (variable_def **slot, variable_table_type old_vars)
    NEW_SET.  */
 
 static void
-emit_notes_for_differences (rtx insn, dataflow_set *old_set,
+emit_notes_for_differences (rtx_insn *insn, dataflow_set *old_set,
 			    dataflow_set *new_set)
 {
   shared_hash_htab (old_set->vars)
@@ -9098,8 +9100,8 @@ emit_notes_for_differences (rtx insn, dataflow_set *old_set,
 
 /* Return the next insn after INSN that is not a NOTE_INSN_VAR_LOCATION.  */
 
-static rtx
-next_non_note_insn_var_location (rtx insn)
+static rtx_insn *
+next_non_note_insn_var_location (rtx_insn *insn)
 {
   while (insn)
     {
@@ -9126,8 +9128,8 @@ emit_notes_in_bb (basic_block bb, dataflow_set *set)
 
   FOR_EACH_VEC_ELT (VTI (bb)->mos, i, mo)
     {
-      rtx insn = mo->insn;
-      rtx next_insn = next_non_note_insn_var_location (insn);
+      rtx_insn *insn = mo->insn;
+      rtx_insn *next_insn = next_non_note_insn_var_location (insn);
 
       switch (mo->type)
 	{
@@ -10048,7 +10050,7 @@ vt_initialize (void)
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
       HOST_WIDE_INT pre, post = 0;
       basic_block first_bb, last_bb;
 
@@ -10184,7 +10186,7 @@ static void
 delete_debug_insns (void)
 {
   basic_block bb;
-  rtx insn, next;
+  rtx_insn *insn, *next;
 
   if (!MAY_HAVE_DEBUG_INSNS)
     return;
-- 
1.8.5.3

[PATCH 124/236] PHASE 3: Per-config subdir commits

[David Malcolm]

/
	* rtx-classes-status.txt: Update
---
 rtx-classes-status.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index e350eaf..b22cb1e 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -2,8 +2,8 @@
 exists to be modified by marker commits.
 
 Phase 1: initial "scaffolding" commits:            DONE
-Phase 2: per-file commits in main source dir:      IN PROGRESS
-Phase 3: per-file commits within "config" subdirs: TODO
+Phase 2: per-file commits in main source dir:      DONE
+Phase 3: per-file commits within "config" subdirs: IN PROGRESS
 Phase 4: removal of "scaffolding":                 TODO
 Phase 5: additional rtx_def subclasses:            TODO
 Phase 6: use extra rtx_def subclasses:             TODO
-- 
1.8.5.3

Re: [PATCH 124/236] PHASE 3: Per-config subdir commits

[Jeff Law]

On 08/06/14 11:21, David Malcolm wrote:
> /
> 	* rtx-classes-status.txt: Update
> ---
>   rtx-classes-status.txt | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
> index e350eaf..b22cb1e 100644
> --- a/rtx-classes-status.txt
> +++ b/rtx-classes-status.txt
> @@ -2,8 +2,8 @@
>   exists to be modified by marker commits.
>
>   Phase 1: initial "scaffolding" commits:            DONE
> -Phase 2: per-file commits in main source dir:      IN PROGRESS
> -Phase 3: per-file commits within "config" subdirs: TODO
> +Phase 2: per-file commits in main source dir:      DONE
> +Phase 3: per-file commits within "config" subdirs: IN PROGRESS
>   Phase 4: removal of "scaffolding":                 TODO
>   Phase 5: additional rtx_def subclasses:            TODO
>   Phase 6: use extra rtx_def subclasses:             TODO
>
OK.  As are patches #125-#129.

Jeff

[PATCH 071/236] except.*: Use rtx_insn (also touches function.h)

[David Malcolm]

gcc/
	* except.h (sjlj_emit_function_exit_after): Strengthen param
	"after" from rtx to rtx_insn *.  This is only called with
	result of get_last_insn (in function.c) so type-change should be
	self-contained.

	* function.h (struct rtl_eh): Strengthen field "ehr_label" from
	rtx to rtx_code_label *, and field "sjlj_exit_after" from rtx
	to rtx_insn *.  These fields are only used from except.c so this
	type-change should be self-contained to this patch.

	* except.c (emit_to_new_bb_before): Strengthen param "seq" and
	local "last" from rtx to rtx_insn *.
	(dw2_build_landing_pads): Likewise for local "seq".
	(sjlj_mark_call_sites): Likewise for locals "insn", "before", p".
	(sjlj_emit_function_enter): Strengthen param "dispatch_label" from
	rtx to rtx_code_label *.  Strengthen locals "fn_begin", "seq" from
	rtx to rtx_insn *.
	(sjlj_emit_function_exit_after): Strengthen param "after" from rtx
	to rtx_insn *.
	(sjlj_emit_function_exit): Likewise for locals "seq", "insn".
	(sjlj_emit_dispatch_table): Likewise for locals "seq", "seq2".
	(sjlj_build_landing_pads): Replace NULL_RTX with NULL when
	referring to an insn.  Strengthen local "dispatch_label" from
	rtx to rtx_code_label *.
	(set_nothrow_function_flags): Strengthen local "insn" from rtx to
	rtx_insn *.
	(expand_eh_return): Strengthen local "around_label" from
	rtx to rtx_code_label *.
	(convert_to_eh_region_ranges): Strengthen locals "iter",
	"last_action_insn", "first_no_action_insn",
	"first_no_action_insn_before_switch",
	"last_no_action_insn_before_switch", from rtx to rtx_insn *.
---
 gcc/except.c   | 53 +++++++++++++++++++++++++++++------------------------
 gcc/except.h   |  2 +-
 gcc/function.h |  4 ++--
 3 files changed, 32 insertions(+), 27 deletions(-)

diff --git a/gcc/except.c b/gcc/except.c
index ec712a9..1a26b08 100644
--- a/gcc/except.c
+++ b/gcc/except.c
@@ -959,9 +959,9 @@ assign_filter_values (void)
    first instruction of some existing BB and return the newly
    produced block.  */
 static basic_block
-emit_to_new_bb_before (rtx seq, rtx insn)
+emit_to_new_bb_before (rtx_insn *seq, rtx insn)
 {
-  rtx last;
+  rtx_insn *last;
   basic_block bb;
   edge e;
   edge_iterator ei;
@@ -1030,7 +1030,7 @@ dw2_build_landing_pads (void)
   for (i = 1; vec_safe_iterate (cfun->eh->lp_array, i, &lp); ++i)
     {
       basic_block bb;
-      rtx seq;
+      rtx_insn *seq;
       edge e;
 
       if (lp == NULL || lp->post_landing_pad == NULL)
@@ -1119,7 +1119,8 @@ static void
 sjlj_mark_call_sites (void)
 {
   int last_call_site = -2;
-  rtx insn, mem;
+  rtx_insn *insn;
+  rtx mem;
 
   for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
     {
@@ -1127,7 +1128,7 @@ sjlj_mark_call_sites (void)
       eh_region r;
       bool nothrow;
       int this_call_site;
-      rtx before, p;
+      rtx_insn *before, *p;
 
       /* Reset value tracking at extended basic block boundaries.  */
       if (LABEL_P (insn))
@@ -1180,9 +1181,10 @@ sjlj_mark_call_sites (void)
 /* Construct the SjLj_Function_Context.  */
 
 static void
-sjlj_emit_function_enter (rtx dispatch_label)
+sjlj_emit_function_enter (rtx_code_label *dispatch_label)
 {
-  rtx fn_begin, fc, mem, seq;
+  rtx_insn *fn_begin, *seq;
+  rtx fc, mem;
   bool fn_begin_outside_block;
   rtx personality = get_personality_function (current_function_decl);
 
@@ -1260,7 +1262,7 @@ sjlj_emit_function_enter (rtx dispatch_label)
    the call to unwind_sjlj_unregister_libfunc if needed.  */
 
 void
-sjlj_emit_function_exit_after (rtx after)
+sjlj_emit_function_exit_after (rtx_insn *after)
 {
   crtl->eh.sjlj_exit_after = after;
 }
@@ -1268,7 +1270,7 @@ sjlj_emit_function_exit_after (rtx after)
 static void
 sjlj_emit_function_exit (void)
 {
-  rtx seq, insn;
+  rtx_insn *seq, *insn;
 
   start_sequence ();
 
@@ -1295,7 +1297,8 @@ sjlj_emit_dispatch_table (rtx dispatch_label, int num_dispatch)
   enum machine_mode unwind_word_mode = targetm.unwind_word_mode ();
   enum machine_mode filter_mode = targetm.eh_return_filter_mode ();
   eh_landing_pad lp;
-  rtx mem, seq, fc, before, exc_ptr_reg, filter_reg;
+  rtx mem, fc, before, exc_ptr_reg, filter_reg;
+  rtx_insn *seq;
   rtx first_reachable_label;
   basic_block bb;
   eh_region r;
@@ -1353,7 +1356,8 @@ sjlj_emit_dispatch_table (rtx dispatch_label, int num_dispatch)
   for (i = 1; vec_safe_iterate (cfun->eh->lp_array, i, &lp); ++i)
     if (lp && lp->post_landing_pad)
       {
-	rtx seq2, label;
+	rtx_insn *seq2;
+	rtx label;
 
 	start_sequence ();
 
@@ -1467,7 +1471,7 @@ sjlj_build_landing_pads (void)
   num_dispatch = sjlj_assign_call_site_values ();
   if (num_dispatch > 0)
     {
-      rtx dispatch_label = gen_label_rtx ();
+      rtx_code_label *dispatch_label = gen_label_rtx ();
       int align = STACK_SLOT_ALIGNMENT (sjlj_fc_type_node,
 					TYPE_MODE (sjlj_fc_type_node),
 					TYPE_ALIGN (sjlj_fc_type_node));
@@ -1495,7 +1499,7 @@ sjlj_build_landing_pads (void)
 			      align);
 
       sjlj_mark_call_sites ();
-      sjlj_emit_function_enter (NULL_RTX);
+      sjlj_emit_function_enter (NULL);
       sjlj_emit_function_exit ();
     }
 
@@ -1962,7 +1966,7 @@ can_nonlocal_goto (const_rtx insn)
 static unsigned int
 set_nothrow_function_flags (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   crtl->nothrow = 1;
 
@@ -2262,7 +2266,7 @@ expand_builtin_eh_return (tree stackadj_tree ATTRIBUTE_UNUSED,
 void
 expand_eh_return (void)
 {
-  rtx around_label;
+  rtx_code_label *around_label;
 
   if (! crtl->eh.ehr_label)
     return;
@@ -2479,18 +2483,19 @@ add_call_site (rtx landing_pad, int action, int section)
 static unsigned int
 convert_to_eh_region_ranges (void)
 {
-  rtx insn, iter;
+  rtx insn;
+  rtx_insn *iter;
   rtx_note *note;
   action_hash_type ar_hash;
   int last_action = -3;
-  rtx last_action_insn = NULL_RTX;
+  rtx_insn *last_action_insn = NULL;
   rtx last_landing_pad = NULL_RTX;
-  rtx first_no_action_insn = NULL_RTX;
+  rtx_insn *first_no_action_insn = NULL;
   int call_site = 0;
   int cur_sec = 0;
   rtx section_switch_note = NULL_RTX;
-  rtx first_no_action_insn_before_switch = NULL_RTX;
-  rtx last_no_action_insn_before_switch = NULL_RTX;
+  rtx_insn *first_no_action_insn_before_switch = NULL;
+  rtx_insn *last_no_action_insn_before_switch = NULL;
   int saved_call_site_base = call_site_base;
 
   vec_alloc (crtl->eh.action_record_data, 64);
@@ -2559,8 +2564,8 @@ convert_to_eh_region_ranges (void)
 		gcc_assert (last_action != -3
 			    || (last_action_insn
 				== last_no_action_insn_before_switch));
-		first_no_action_insn_before_switch = NULL_RTX;
-		last_no_action_insn_before_switch = NULL_RTX;
+		first_no_action_insn_before_switch = NULL;
+		last_no_action_insn_before_switch = NULL;
 		call_site_base++;
 	      }
 	    /* If we'd not seen a previous action (-3) or the previous
@@ -2575,7 +2580,7 @@ convert_to_eh_region_ranges (void)
 		    note = emit_note_before (NOTE_INSN_EH_REGION_BEG,
 					     first_no_action_insn);
 		    NOTE_EH_HANDLER (note) = call_site;
-		    first_no_action_insn = NULL_RTX;
+		    first_no_action_insn = NULL;
 		  }
 
 		note = emit_note_after (NOTE_INSN_EH_REGION_END,
@@ -2609,7 +2614,7 @@ convert_to_eh_region_ranges (void)
 	  {
 	    first_no_action_insn_before_switch = first_no_action_insn;
 	    last_no_action_insn_before_switch = last_action_insn;
-	    first_no_action_insn = NULL_RTX;
+	    first_no_action_insn = NULL;
 	    gcc_assert (last_action == -1);
 	    last_action = -3;
 	  }
diff --git a/gcc/except.h b/gcc/except.h
index bab13e1..f09b0e9 100644
--- a/gcc/except.h
+++ b/gcc/except.h
@@ -252,7 +252,7 @@ typedef tree (*duplicate_eh_regions_map) (tree, void *);
 extern struct pointer_map_t *duplicate_eh_regions
   (struct function *, eh_region, int, duplicate_eh_regions_map, void *);
 
-extern void sjlj_emit_function_exit_after (rtx);
+extern void sjlj_emit_function_exit_after (rtx_insn *);
 
 extern eh_region gen_eh_region_cleanup (eh_region);
 extern eh_region gen_eh_region_try (eh_region);
diff --git a/gcc/function.h b/gcc/function.h
index 575de1b..14d1b2c 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -144,10 +144,10 @@ typedef struct call_site_record_d *call_site_record;
 struct GTY(()) rtl_eh {
   rtx ehr_stackadj;
   rtx ehr_handler;
-  rtx ehr_label;
+  rtx_code_label *ehr_label;
 
   rtx sjlj_fc;
-  rtx sjlj_exit_after;
+  rtx_insn *sjlj_exit_after;
 
   vec<uchar, va_gc> *action_record_data;
 
-- 
1.8.5.3

[PATCH 010/236] Split NEXT_INSN/PREV_INSN into lvalue and rvalue forms

[David Malcolm]

gcc/
	* rtl.h (PREV_INSN): Split macro in two: the existing one,
	for rvalues, and...
	(SET_PREV_INSN): New macro, for use as an lvalue.
	(NEXT_INSN, SET_NEXT_INSN): Likewise.

	* caller-save.c (save_call_clobbered_regs): Convert lvalue use of
	PREV_INSN/NEXT_INSN into SET_PREV_INSN/SET_NEXT_INSN.
	* cfgrtl.c (try_redirect_by_replacing_jump): Likewise.
	(fixup_abnormal_edges): Likewise.
	(unlink_insn_chain): Likewise.
	(fixup_reorder_chain): Likewise.
	(cfg_layout_delete_block): Likewise.
	(cfg_layout_merge_blocks): Likewise.
	* combine.c (update_cfg_for_uncondjump): Likewise.
	* emit-rtl.c (link_insn_into_chain): Likewise.
	(remove_insn): Likewise.
	(delete_insns_since): Likewise.
	(reorder_insns_nobb): Likewise.
	(emit_insn_after_1): Likewise.
	* final.c (rest_of_clean_state): Likewise.
	(final_scan_insn): Likewise.
	* gcse.c (can_assign_to_reg_without_clobbers_p): Likewise.
	* haifa-sched.c (concat_note_lists): Likewise.
	(remove_notes): Likewise.
	(restore_other_notes): Likewise.
	(move_insn): Likewise.
	(unlink_bb_notes): Likewise.
	(restore_bb_notes): Likewise.
	* jump.c (delete_for_peephole): Likewise.
	* optabs.c (emit_libcall_block_1): Likewise.
	* reorg.c (emit_delay_sequence): Likewise.
	(fill_simple_delay_slots): Likewise.
	* sel-sched-ir.c (sel_move_insn): Likewise.
	(sel_remove_insn): Likewise.
	(get_bb_note_from_pool): Likewise.
	* sel-sched.c (move_nop_to_previous_block): Likewise.

	* config/bfin/bfin.c (reorder_var_tracking_notes): Likewise.
	* config/c6x/c6x.c (gen_one_bundle): Likewise.
	(c6x_gen_bundles): Likewise.
	(hwloop_optimize): Likewise.
	* config/frv/frv.c (frv_function_prologue): Likewise.
	(frv_register_nop): Likewise.
	* config/ia64/ia64.c (ia64_init_dfa_pre_cycle_insn): Likewise.
	(ia64_reorg): Likewise.
	* config/mep/mep.c (mep_reorg_addcombine): Likewise.
	(mep_make_bundle): Likewise.
	(mep_bundle_insns): Likewise.
	* config/picochip/picochip.c (reorder_var_tracking_notes): Likewise.
	* config/tilegx/tilegx.c (reorder_var_tracking_notes): Likewise.
	* config/tilepro/tilepro.c (reorder_var_tracking_notes): Likewise.

/
	* rtx-classes-status.txt: Add SET_NEXT_INSN, SET_PREV_INSN
---
 gcc/caller-save.c              | 12 +++----
 gcc/cfgrtl.c                   | 76 +++++++++++++++++++++---------------------
 gcc/combine.c                  |  4 +--
 gcc/config/bfin/bfin.c         | 14 ++++----
 gcc/config/c6x/c6x.c           | 42 +++++++++++------------
 gcc/config/frv/frv.c           | 16 ++++-----
 gcc/config/ia64/ia64.c         |  6 ++--
 gcc/config/mep/mep.c           | 36 ++++++++++----------
 gcc/config/picochip/picochip.c | 22 ++++++------
 gcc/config/tilegx/tilegx.c     | 14 ++++----
 gcc/config/tilepro/tilepro.c   | 14 ++++----
 gcc/emit-rtl.c                 | 48 +++++++++++++-------------
 gcc/final.c                    | 16 ++++-----
 gcc/gcse.c                     |  2 +-
 gcc/haifa-sched.c              | 40 +++++++++++-----------
 gcc/jump.c                     |  4 +--
 gcc/optabs.c                   |  4 +--
 gcc/reorg.c                    |  8 ++---
 gcc/rtl.h                      | 11 ++++--
 gcc/sel-sched-ir.c             | 16 ++++-----
 gcc/sel-sched.c                | 12 +++----
 rtx-classes-status.txt         |  1 +
 22 files changed, 213 insertions(+), 205 deletions(-)

diff --git a/gcc/caller-save.c b/gcc/caller-save.c
index 41b3f01..b1ef3a9 100644
--- a/gcc/caller-save.c
+++ b/gcc/caller-save.c
@@ -913,13 +913,13 @@ save_call_clobbered_regs (void)
 		  prev = PREV_INSN (ins);
 		  if (NOTE_P (ins))
 		    {
-		      NEXT_INSN (prev) = NEXT_INSN (ins);
-		      PREV_INSN (NEXT_INSN (ins)) = prev;
-		      PREV_INSN (ins) = insn;
-		      NEXT_INSN (ins) = NEXT_INSN (insn);
-		      NEXT_INSN (insn) = ins;
+		      SET_NEXT_INSN (prev) = NEXT_INSN (ins);
+		      SET_PREV_INSN (NEXT_INSN (ins)) = prev;
+		      SET_PREV_INSN (ins) = insn;
+		      SET_NEXT_INSN (ins) = NEXT_INSN (insn);
+		      SET_NEXT_INSN (insn) = ins;
 		      if (NEXT_INSN (ins))
-			PREV_INSN (NEXT_INSN (ins)) = ins;
+			SET_PREV_INSN (NEXT_INSN (ins)) = ins;
                       if (BB_END (bb) == insn)
 			SET_BB_END (bb) = ins;
 		    }
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 5f2879e..d386367 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -1061,11 +1061,11 @@ try_redirect_by_replacing_jump (edge e, basic_block target, bool in_cfglayout)
 	      if (BARRIER_P (insn))
 		{
 		  if (PREV_INSN (insn))
-		    NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
+		    SET_NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
 		  else
 		    SET_BB_FOOTER (src) = NEXT_INSN (insn);
 		  if (NEXT_INSN (insn))
-		    PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
+		    SET_PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
 		}
 	      if (LABEL_P (insn))
 		break;
@@ -1133,14 +1133,14 @@ try_redirect_by_replacing_jump (edge e, basic_block target, bool in_cfglayout)
 	      update_bb_for_insn_chain (NEXT_INSN (BB_END (src)),
 				        PREV_INSN (barrier), src);
 
-	      NEXT_INSN (PREV_INSN (new_insn)) = NEXT_INSN (new_insn);
-	      PREV_INSN (NEXT_INSN (new_insn)) = PREV_INSN (new_insn);
+	      SET_NEXT_INSN (PREV_INSN (new_insn)) = NEXT_INSN (new_insn);
+	      SET_PREV_INSN (NEXT_INSN (new_insn)) = PREV_INSN (new_insn);
 
-	      NEXT_INSN (new_insn) = barrier;
-	      NEXT_INSN (PREV_INSN (barrier)) = new_insn;
+	      SET_NEXT_INSN (new_insn) = barrier;
+	      SET_NEXT_INSN (PREV_INSN (barrier)) = new_insn;
 
-	      PREV_INSN (new_insn) = PREV_INSN (barrier);
-	      PREV_INSN (barrier) = new_insn;
+	      SET_PREV_INSN (new_insn) = PREV_INSN (barrier);
+	      SET_PREV_INSN (barrier) = new_insn;
 	    }
 	}
     }
@@ -3271,8 +3271,8 @@ fixup_abnormal_edges (void)
 			{
 			  /* We're not deleting it, we're moving it.  */
 			  INSN_DELETED_P (insn) = 0;
-			  PREV_INSN (insn) = NULL_RTX;
-			  NEXT_INSN (insn) = NULL_RTX;
+			  SET_PREV_INSN (insn) = NULL_RTX;
+			  SET_NEXT_INSN (insn) = NULL_RTX;
 
 			  insert_insn_on_edge (insn, e);
 			  inserted = true;
@@ -3303,12 +3303,12 @@ unlink_insn_chain (rtx first, rtx last)
   rtx prevfirst = PREV_INSN (first);
   rtx nextlast = NEXT_INSN (last);
 
-  PREV_INSN (first) = NULL;
-  NEXT_INSN (last) = NULL;
+  SET_PREV_INSN (first) = NULL;
+  SET_NEXT_INSN (last) = NULL;
   if (prevfirst)
-    NEXT_INSN (prevfirst) = nextlast;
+    SET_NEXT_INSN (prevfirst) = nextlast;
   if (nextlast)
-    PREV_INSN (nextlast) = prevfirst;
+    SET_PREV_INSN (nextlast) = prevfirst;
   else
     set_last_insn (prevfirst);
   if (!prevfirst)
@@ -3653,32 +3653,32 @@ fixup_reorder_chain (void)
       if (BB_HEADER (bb))
 	{
 	  if (insn)
-	    NEXT_INSN (insn) = BB_HEADER (bb);
+	    SET_NEXT_INSN (insn) = BB_HEADER (bb);
 	  else
 	    set_first_insn (BB_HEADER (bb));
-	  PREV_INSN (BB_HEADER (bb)) = insn;
+	  SET_PREV_INSN (BB_HEADER (bb)) = insn;
 	  insn = BB_HEADER (bb);
 	  while (NEXT_INSN (insn))
 	    insn = NEXT_INSN (insn);
 	}
       if (insn)
-	NEXT_INSN (insn) = BB_HEAD (bb);
+	SET_NEXT_INSN (insn) = BB_HEAD (bb);
       else
 	set_first_insn (BB_HEAD (bb));
-      PREV_INSN (BB_HEAD (bb)) = insn;
+      SET_PREV_INSN (BB_HEAD (bb)) = insn;
       insn = BB_END (bb);
       if (BB_FOOTER (bb))
 	{
-	  NEXT_INSN (insn) = BB_FOOTER (bb);
-	  PREV_INSN (BB_FOOTER (bb)) = insn;
+	  SET_NEXT_INSN (insn) = BB_FOOTER (bb);
+	  SET_PREV_INSN (BB_FOOTER (bb)) = insn;
 	  while (NEXT_INSN (insn))
 	    insn = NEXT_INSN (insn);
 	}
     }
 
-  NEXT_INSN (insn) = cfg_layout_function_footer;
+  SET_NEXT_INSN (insn) = cfg_layout_function_footer;
   if (cfg_layout_function_footer)
-    PREV_INSN (cfg_layout_function_footer) = insn;
+    SET_PREV_INSN (cfg_layout_function_footer) = insn;
 
   while (NEXT_INSN (insn))
     insn = NEXT_INSN (insn);
@@ -4413,15 +4413,15 @@ cfg_layout_delete_block (basic_block bb)
     {
       next = BB_HEAD (bb);
       if (prev)
-	NEXT_INSN (prev) = BB_HEADER (bb);
+	SET_NEXT_INSN (prev) = BB_HEADER (bb);
       else
 	set_first_insn (BB_HEADER (bb));
-      PREV_INSN (BB_HEADER (bb)) = prev;
+      SET_PREV_INSN (BB_HEADER (bb)) = prev;
       insn = BB_HEADER (bb);
       while (NEXT_INSN (insn))
 	insn = NEXT_INSN (insn);
-      NEXT_INSN (insn) = next;
-      PREV_INSN (next) = insn;
+      SET_NEXT_INSN (insn) = next;
+      SET_PREV_INSN (next) = insn;
     }
   next = NEXT_INSN (BB_END (bb));
   if (BB_FOOTER (bb))
@@ -4432,11 +4432,11 @@ cfg_layout_delete_block (basic_block bb)
 	  if (BARRIER_P (insn))
 	    {
 	      if (PREV_INSN (insn))
-		NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
+		SET_NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
 	      else
 		SET_BB_FOOTER (bb) = NEXT_INSN (insn);
 	      if (NEXT_INSN (insn))
-		PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
+		SET_PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
 	    }
 	  if (LABEL_P (insn))
 	    break;
@@ -4445,13 +4445,13 @@ cfg_layout_delete_block (basic_block bb)
       if (BB_FOOTER (bb))
 	{
 	  insn = BB_END (bb);
-	  NEXT_INSN (insn) = BB_FOOTER (bb);
-	  PREV_INSN (BB_FOOTER (bb)) = insn;
+	  SET_NEXT_INSN (insn) = BB_FOOTER (bb);
+	  SET_PREV_INSN (BB_FOOTER (bb)) = insn;
 	  while (NEXT_INSN (insn))
 	    insn = NEXT_INSN (insn);
-	  NEXT_INSN (insn) = next;
+	  SET_NEXT_INSN (insn) = next;
 	  if (next)
-	    PREV_INSN (next) = insn;
+	    SET_PREV_INSN (next) = insn;
 	  else
 	    set_last_insn (insn);
 	}
@@ -4478,9 +4478,9 @@ cfg_layout_delete_block (basic_block bb)
       insn = remaints;
       while (NEXT_INSN (insn))
 	insn = NEXT_INSN (insn);
-      NEXT_INSN (insn) = *to;
+      SET_NEXT_INSN (insn) = *to;
       if (*to)
-	PREV_INSN (*to) = insn;
+	SET_PREV_INSN (*to) = insn;
       *to = remaints;
     }
 }
@@ -4576,8 +4576,8 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
 
 	  while (NEXT_INSN (last))
 	    last = NEXT_INSN (last);
-	  NEXT_INSN (last) = BB_FOOTER (b);
-	  PREV_INSN (BB_FOOTER (b)) = last;
+	  SET_NEXT_INSN (last) = BB_FOOTER (b);
+	  SET_PREV_INSN (BB_FOOTER (b)) = last;
 	}
       SET_BB_FOOTER (b) = NULL;
     }
@@ -4595,8 +4595,8 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
  
 	  while (NEXT_INSN (last))
 	    last = NEXT_INSN (last);
-	  NEXT_INSN (last) = BB_FOOTER (a);
-	  PREV_INSN (BB_FOOTER (a)) = last;
+	  SET_NEXT_INSN (last) = BB_FOOTER (a);
+	  SET_PREV_INSN (BB_FOOTER (a)) = last;
 	  SET_BB_FOOTER (a) = BB_HEADER (b);
 	}
       SET_BB_HEADER (b) = NULL;
diff --git a/gcc/combine.c b/gcc/combine.c
index 3cc8f2b..dafacaf 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -2391,11 +2391,11 @@ update_cfg_for_uncondjump (rtx insn)
 	if (BARRIER_P (insn))
 	  {
 	    if (PREV_INSN (insn))
-	      NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
+	      SET_NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
 	    else
 	      SET_BB_FOOTER (bb) = NEXT_INSN (insn);
 	    if (NEXT_INSN (insn))
-	      PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
+	      SET_PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
 	  }
 	else if (LABEL_P (insn))
 	  break;
diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index 7945de4..b037a46 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -4057,10 +4057,10 @@ reorder_var_tracking_notes (void)
 		  while (queue)
 		    {
 		      rtx next_queue = PREV_INSN (queue);
-		      PREV_INSN (NEXT_INSN (insn)) = queue;
-		      NEXT_INSN (queue) = NEXT_INSN (insn);
-		      NEXT_INSN (insn) = queue;
-		      PREV_INSN (queue) = insn;
+		      SET_PREV_INSN (NEXT_INSN (insn)) = queue;
+		      SET_NEXT_INSN (queue) = NEXT_INSN (insn);
+		      SET_NEXT_INSN (insn) = queue;
+		      SET_PREV_INSN (queue) = insn;
 		      queue = next_queue;
 		    }
 		  in_bundle = false;
@@ -4073,10 +4073,10 @@ reorder_var_tracking_notes (void)
 	      if (in_bundle)
 		{
 		  rtx prev = PREV_INSN (insn);
-		  PREV_INSN (next) = prev;
-		  NEXT_INSN (prev) = next;
+		  SET_PREV_INSN (next) = prev;
+		  SET_NEXT_INSN (prev) = next;
 
-		  PREV_INSN (insn) = queue;
+		  SET_PREV_INSN (insn) = queue;
 		  queue = insn;
 		}
 	    }
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index 2d73cb8..6588d76 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -4598,7 +4598,7 @@ gen_one_bundle (rtx *slot, int n_filled, int real_first)
   bundle = make_insn_raw (bundle);
   BLOCK_FOR_INSN (bundle) = BLOCK_FOR_INSN (slot[0]);
   INSN_LOCATION (bundle) = INSN_LOCATION (slot[0]);
-  PREV_INSN (bundle) = PREV_INSN (slot[real_first]);
+  SET_PREV_INSN (bundle) = SET_PREV_INSN (slot[real_first]);
 
   t = NULL_RTX;
 
@@ -4606,18 +4606,18 @@ gen_one_bundle (rtx *slot, int n_filled, int real_first)
     {
       rtx insn = slot[i];
       remove_insn (insn);
-      PREV_INSN (insn) = t ? t : PREV_INSN (bundle);
+      SET_PREV_INSN (insn) = t ? t : PREV_INSN (bundle);
       if (t != NULL_RTX)
-	NEXT_INSN (t) = insn;
+	SET_NEXT_INSN (t) = insn;
       t = insn;
       if (i > 0)
 	INSN_LOCATION (slot[i]) = INSN_LOCATION (bundle);
     }
 
-  NEXT_INSN (bundle) = NEXT_INSN (PREV_INSN (bundle));
-  NEXT_INSN (t) = NEXT_INSN (bundle);
-  NEXT_INSN (PREV_INSN (bundle)) = bundle;
-  PREV_INSN (NEXT_INSN (bundle)) = bundle;
+  SET_NEXT_INSN (bundle) = NEXT_INSN (PREV_INSN (bundle));
+  SET_NEXT_INSN (t) = NEXT_INSN (bundle);
+  SET_NEXT_INSN (PREV_INSN (bundle)) = bundle;
+  SET_PREV_INSN (NEXT_INSN (bundle)) = bundle;
 }
 
 /* Move all parallel instructions into SEQUENCEs, so that no subsequent passes
@@ -4709,12 +4709,12 @@ c6x_gen_bundles (void)
 	continue;
       if (NEXT_INSN (last_call) == insn)
 	continue;
-      NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
-      PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
-      PREV_INSN (insn) = last_call;
-      NEXT_INSN (insn) = NEXT_INSN (last_call);
-      PREV_INSN (NEXT_INSN (insn)) = insn;
-      NEXT_INSN (PREV_INSN (insn)) = insn;
+      SET_NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
+      SET_PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
+      SET_PREV_INSN (insn) = last_call;
+      SET_NEXT_INSN (insn) = NEXT_INSN (last_call);
+      SET_PREV_INSN (NEXT_INSN (insn)) = insn;
+      SET_NEXT_INSN (PREV_INSN (insn)) = insn;
       last_call = insn;
     }
 }
@@ -5697,8 +5697,8 @@ hwloop_optimize (hwloop_info loop)
      reservations of the instructions contained in it to the corresponding
      instructions from iteration 0, which are the only ones we'll keep.  */
   assign_reservations (BB_HEAD (bb), ss.last_scheduled_insn);
-  PREV_INSN (BB_END (bb)) = ss.last_scheduled_iter0;
-  NEXT_INSN (ss.last_scheduled_iter0) = BB_END (bb);
+  SET_PREV_INSN (BB_END (bb)) = ss.last_scheduled_iter0;
+  SET_NEXT_INSN (ss.last_scheduled_iter0) = BB_END (bb);
   filter_insns_above (bb, sploop_max_uid_iter0);
 
   for (i = 0; i < n_real_insns; i++)
@@ -5820,13 +5820,13 @@ hwloop_optimize (hwloop_info loop)
 
   for (i = 1; i < n_insns; i++)
     {
-      NEXT_INSN (orig_vec[i - 1]) = orig_vec[i];
-      PREV_INSN (orig_vec[i]) = orig_vec[i - 1];
+      SET_NEXT_INSN (orig_vec[i - 1]) = orig_vec[i];
+      SET_PREV_INSN (orig_vec[i]) = orig_vec[i - 1];
     }
-  PREV_INSN (orig_vec[0]) = PREV_INSN (BB_HEAD (bb));
-  NEXT_INSN (PREV_INSN (BB_HEAD (bb))) = orig_vec[0];
-  NEXT_INSN (orig_vec[n_insns - 1]) = NEXT_INSN (BB_END (bb));
-  PREV_INSN (NEXT_INSN (BB_END (bb))) = orig_vec[n_insns - 1];
+  SET_PREV_INSN (orig_vec[0]) = PREV_INSN (BB_HEAD (bb));
+  SET_NEXT_INSN (PREV_INSN (BB_HEAD (bb))) = orig_vec[0];
+  SET_NEXT_INSN (orig_vec[n_insns - 1]) = NEXT_INSN (BB_END (bb));
+  SET_PREV_INSN (NEXT_INSN (BB_END (bb))) = orig_vec[n_insns - 1];
   SET_BB_HEAD (bb) = orig_vec[0];
   SET_BB_END (bb) = orig_vec[n_insns - 1];
  undo_splits:
diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c
index 2b0a0b2..b7b3185 100644
--- a/gcc/config/frv/frv.c
+++ b/gcc/config/frv/frv.c
@@ -1483,12 +1483,12 @@ frv_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
       if (NEXT_INSN (last_call) == insn)
 	continue;
 
-      NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
-      PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
-      PREV_INSN (insn) = last_call;
-      NEXT_INSN (insn) = NEXT_INSN (last_call);
-      PREV_INSN (NEXT_INSN (insn)) = insn;
-      NEXT_INSN (PREV_INSN (insn)) = insn;
+      SET_NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
+      SET_PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
+      SET_PREV_INSN (insn) = last_call;
+      SET_NEXT_INSN (insn) = NEXT_INSN (last_call);
+      SET_PREV_INSN (NEXT_INSN (insn)) = insn;
+      SET_NEXT_INSN (PREV_INSN (insn)) = insn;
       last_call = insn;
     }
 }
@@ -8180,8 +8180,8 @@ static void
 frv_register_nop (rtx nop)
 {
   nop = make_insn_raw (nop);
-  NEXT_INSN (nop) = 0;
-  PREV_INSN (nop) = 0;
+  SET_NEXT_INSN (nop) = 0;
+  SET_PREV_INSN (nop) = 0;
   frv_nops[frv_num_nops++] = nop;
 }
 
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index feee157..3b25f2e 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -9488,10 +9488,10 @@ ia64_init_dfa_pre_cycle_insn (void)
       prev_cycle_state = xmalloc (dfa_state_size);
     }
   dfa_pre_cycle_insn = make_insn_raw (gen_pre_cycle ());
-  PREV_INSN (dfa_pre_cycle_insn) = NEXT_INSN (dfa_pre_cycle_insn) = NULL_RTX;
+  SET_PREV_INSN (dfa_pre_cycle_insn) = SET_NEXT_INSN (dfa_pre_cycle_insn) = NULL_RTX;
   recog_memoized (dfa_pre_cycle_insn);
   dfa_stop_insn = make_insn_raw (gen_insn_group_barrier (GEN_INT (3)));
-  PREV_INSN (dfa_stop_insn) = NEXT_INSN (dfa_stop_insn) = NULL_RTX;
+  SET_PREV_INSN (dfa_stop_insn) = SET_NEXT_INSN (dfa_stop_insn) = NULL_RTX;
   recog_memoized (dfa_stop_insn);
 }
 
@@ -9678,7 +9678,7 @@ ia64_reorg (void)
 
       initiate_bundle_states ();
       ia64_nop = make_insn_raw (gen_nop ());
-      PREV_INSN (ia64_nop) = NEXT_INSN (ia64_nop) = NULL_RTX;
+      SET_PREV_INSN (ia64_nop) = SET_NEXT_INSN (ia64_nop) = NULL_RTX;
       recog_memoized (ia64_nop);
       clocks_length = get_max_uid () + 1;
       stops_p = XCNEWVEC (char, clocks_length);
diff --git a/gcc/config/mep/mep.c b/gcc/config/mep/mep.c
index 107f1fa..544f267 100644
--- a/gcc/config/mep/mep.c
+++ b/gcc/config/mep/mep.c
@@ -5695,9 +5695,9 @@ mep_reorg_addcombine (rtx insns)
 		&& ic + nc > -32768)
 	      {
 		XEXP (SET_SRC (PATTERN (i)), 1) = GEN_INT (ic + nc);
-		NEXT_INSN (i) = NEXT_INSN (n);
+		SET_NEXT_INSN (i) = NEXT_INSN (n);
 		if (NEXT_INSN (i))
-		  PREV_INSN (NEXT_INSN (i)) = i;
+		  SET_PREV_INSN (NEXT_INSN (i)) = i;
 	      }
 	  }
       }
@@ -6812,10 +6812,10 @@ mep_make_bundle (rtx core, rtx cop)
   remove_insn (cop);
 
   /* Set up the links of the insns inside the SEQUENCE.  */
-  PREV_INSN (core) = PREV_INSN (insn);
-  NEXT_INSN (core) = cop;
-  PREV_INSN (cop) = core;
-  NEXT_INSN (cop) = NEXT_INSN (insn);
+  SET_PREV_INSN (core) = PREV_INSN (insn);
+  SET_NEXT_INSN (core) = cop;
+  SET_PREV_INSN (cop) = core;
+  SET_NEXT_INSN (cop) = NEXT_INSN (insn);
 
   /* Set the VLIW flag for the coprocessor instruction.  */
   PUT_MODE (core, VOIDmode);
@@ -6933,13 +6933,13 @@ mep_bundle_insns (rtx insns)
 	      if (NOTE_P (note))
 		{
 		  /* Remove NOTE from here... */
-		  PREV_INSN (NEXT_INSN (note)) = PREV_INSN (note);
-		  NEXT_INSN (PREV_INSN (note)) = NEXT_INSN (note);
+		  SET_PREV_INSN (NEXT_INSN (note)) = PREV_INSN (note);
+		  SET_NEXT_INSN (PREV_INSN (note)) = NEXT_INSN (note);
 		  /* ...and put it in here.  */
-		  NEXT_INSN (note) = first;
-		  PREV_INSN (note) = PREV_INSN (first);
-		  NEXT_INSN (PREV_INSN (note)) = note;
-		  PREV_INSN (NEXT_INSN (note)) = note;
+		  SET_NEXT_INSN (note) = first;
+		  SET_PREV_INSN (note) = PREV_INSN (first);
+		  SET_NEXT_INSN (PREV_INSN (note)) = note;
+		  SET_PREV_INSN (NEXT_INSN (note)) = note;
 		}
 
 	      note = prev;
@@ -7001,17 +7001,17 @@ mep_bundle_insns (rtx insns)
 
 		  /* Remove core insn.  */
 		  if (PREV_INSN (core_insn))
-		    NEXT_INSN (PREV_INSN (core_insn)) = NEXT_INSN (core_insn);
+		    SET_NEXT_INSN (PREV_INSN (core_insn)) = NEXT_INSN (core_insn);
 		  if (NEXT_INSN (core_insn))
-		    PREV_INSN (NEXT_INSN (core_insn)) = PREV_INSN (core_insn);
+		    SET_PREV_INSN (NEXT_INSN (core_insn)) = PREV_INSN (core_insn);
 
 		  /* Re-insert core insn.  */
-		  PREV_INSN (core_insn) = PREV_INSN (insn);
-		  NEXT_INSN (core_insn) = insn;
+		  SET_PREV_INSN (core_insn) = PREV_INSN (insn);
+		  SET_NEXT_INSN (core_insn) = insn;
 
 		  if (PREV_INSN (core_insn))
-		    NEXT_INSN (PREV_INSN (core_insn)) = core_insn;
-		  PREV_INSN (insn) = core_insn;
+		    SET_NEXT_INSN (PREV_INSN (core_insn)) = core_insn;
+		  SET_PREV_INSN (insn) = core_insn;
 
 		  PUT_MODE (core_insn, TImode);
 		  PUT_MODE (insn, VOIDmode);
diff --git a/gcc/config/picochip/picochip.c b/gcc/config/picochip/picochip.c
index 8738564..25802ef 100644
--- a/gcc/config/picochip/picochip.c
+++ b/gcc/config/picochip/picochip.c
@@ -3198,10 +3198,10 @@ reorder_var_tracking_notes (void)
               while (queue)
                 {
                   rtx next_queue = PREV_INSN (queue);
-                  PREV_INSN (NEXT_INSN(insn)) = queue;
-                  NEXT_INSN(queue) = NEXT_INSN(insn);
-                  PREV_INSN(queue) = insn;
-                  NEXT_INSN(insn) = queue;
+                  SET_PREV_INSN (NEXT_INSN(insn)) = queue;
+                  SET_NEXT_INSN(queue) = NEXT_INSN(insn);
+                  SET_PREV_INSN(queue) = insn;
+                  SET_NEXT_INSN(insn) = queue;
                   queue = next_queue;
                 }
               /* There is no more to do for this bb. break*/
@@ -3215,10 +3215,10 @@ reorder_var_tracking_notes (void)
                   while (queue)
                     {
                       rtx next_queue = PREV_INSN (queue);
-                      NEXT_INSN (PREV_INSN(insn)) = queue;
-                      PREV_INSN (queue) = PREV_INSN(insn);
-                      PREV_INSN (insn) = queue;
-                      NEXT_INSN (queue) = insn;
+                      SET_NEXT_INSN (PREV_INSN(insn)) = queue;
+                      SET_PREV_INSN (queue) = PREV_INSN(insn);
+                      SET_PREV_INSN (insn) = queue;
+                      SET_NEXT_INSN (queue) = insn;
                       queue = next_queue;
                     }
                 }
@@ -3226,15 +3226,15 @@ reorder_var_tracking_notes (void)
           else if (NOTE_P (insn))
             {
                rtx prev = PREV_INSN (insn);
-               PREV_INSN (next) = prev;
-               NEXT_INSN (prev) = next;
+               SET_PREV_INSN (next) = prev;
+               SET_NEXT_INSN (prev) = next;
                /* Ignore call_arg notes. They are expected to be just after the
                   call insn. If the call is start of a long VLIW, labels are
                   emitted in the middle of a VLIW, which our assembler can not
                   handle. */
                if (NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION)
                  {
-                   PREV_INSN (insn) = queue;
+                   SET_PREV_INSN (insn) = queue;
                    queue = insn;
                  }
             }
diff --git a/gcc/config/tilegx/tilegx.c b/gcc/config/tilegx/tilegx.c
index 70fce93..7c251c7 100644
--- a/gcc/config/tilegx/tilegx.c
+++ b/gcc/config/tilegx/tilegx.c
@@ -4827,10 +4827,10 @@ reorder_var_tracking_notes (void)
 		while (queue)
 		  {
 		    rtx next_queue = PREV_INSN (queue);
-		    PREV_INSN (NEXT_INSN (insn)) = queue;
-		    NEXT_INSN (queue) = NEXT_INSN (insn);
-		    NEXT_INSN (insn) = queue;
-		    PREV_INSN (queue) = insn;
+		    SET_PREV_INSN (NEXT_INSN (insn)) = queue;
+		    SET_NEXT_INSN (queue) = NEXT_INSN (insn);
+		    SET_NEXT_INSN (insn) = queue;
+		    SET_PREV_INSN (queue) = insn;
 		    queue = next_queue;
 		  }
 		in_bundle = false;
@@ -4843,10 +4843,10 @@ reorder_var_tracking_notes (void)
 	    if (in_bundle)
 	      {
 		rtx prev = PREV_INSN (insn);
-		PREV_INSN (next) = prev;
-		NEXT_INSN (prev) = next;
+		SET_PREV_INSN (next) = prev;
+		SET_NEXT_INSN (prev) = next;
 
-		PREV_INSN (insn) = queue;
+		SET_PREV_INSN (insn) = queue;
 		queue = insn;
 	      }
 	  }
diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c
index e89a733..4dd60c5 100644
--- a/gcc/config/tilepro/tilepro.c
+++ b/gcc/config/tilepro/tilepro.c
@@ -4283,10 +4283,10 @@ reorder_var_tracking_notes (void)
 		while (queue)
 		  {
 		    rtx next_queue = PREV_INSN (queue);
-		    PREV_INSN (NEXT_INSN (insn)) = queue;
-		    NEXT_INSN (queue) = NEXT_INSN (insn);
-		    NEXT_INSN (insn) = queue;
-		    PREV_INSN (queue) = insn;
+		    SET_PREV_INSN (NEXT_INSN (insn)) = queue;
+		    SET_NEXT_INSN (queue) = NEXT_INSN (insn);
+		    SET_NEXT_INSN (insn) = queue;
+		    SET_PREV_INSN (queue) = insn;
 		    queue = next_queue;
 		  }
 		in_bundle = false;
@@ -4299,10 +4299,10 @@ reorder_var_tracking_notes (void)
 	    if (in_bundle)
 	      {
 		rtx prev = PREV_INSN (insn);
-		PREV_INSN (next) = prev;
-		NEXT_INSN (prev) = next;
+		SET_PREV_INSN (next) = prev;
+		SET_NEXT_INSN (prev) = next;
 
-		PREV_INSN (insn) = queue;
+		SET_PREV_INSN (insn) = queue;
 		queue = insn;
 	      }
 	  }
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 2c3d8f7..729e0cc 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3861,29 +3861,29 @@ make_note_raw (enum insn_note subtype)
 static inline void
 link_insn_into_chain (rtx insn, rtx prev, rtx next)
 {
-  PREV_INSN (insn) = prev;
-  NEXT_INSN (insn) = next;
+  SET_PREV_INSN (insn) = prev;
+  SET_NEXT_INSN (insn) = next;
   if (prev != NULL)
     {
-      NEXT_INSN (prev) = insn;
+      SET_NEXT_INSN (prev) = insn;
       if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
 	{
 	  rtx sequence = PATTERN (prev);
-	  NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
+	  SET_NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
 	}
     }
   if (next != NULL)
     {
-      PREV_INSN (next) = insn;
+      SET_PREV_INSN (next) = insn;
       if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
-	PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
+	SET_PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
     }
 
   if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
     {
       rtx sequence = PATTERN (insn);
-      PREV_INSN (XVECEXP (sequence, 0, 0)) = prev;
-      NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
+      SET_PREV_INSN (XVECEXP (sequence, 0, 0)) = prev;
+      SET_NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
     }
 }
 
@@ -4055,17 +4055,17 @@ remove_insn (rtx insn)
 
   if (prev)
     {
-      NEXT_INSN (prev) = next;
+      SET_NEXT_INSN (prev) = next;
       if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
 	{
 	  rtx sequence = PATTERN (prev);
-	  NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
+	  SET_NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
 	}
     }
   else if (get_insns () == insn)
     {
       if (next)
-        PREV_INSN (next) = NULL;
+        SET_PREV_INSN (next) = NULL;
       set_first_insn (next);
     }
   else
@@ -4084,9 +4084,9 @@ remove_insn (rtx insn)
 
   if (next)
     {
-      PREV_INSN (next) = prev;
+      SET_PREV_INSN (next) = prev;
       if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
-	PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
+	SET_PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
     }
   else if (get_last_insn () == insn)
     set_last_insn (prev);
@@ -4152,7 +4152,7 @@ delete_insns_since (rtx from)
   if (from == 0)
     set_first_insn (0);
   else
-    NEXT_INSN (from) = 0;
+    SET_NEXT_INSN (from) = 0;
   set_last_insn (from);
 }
 
@@ -4178,9 +4178,9 @@ reorder_insns_nobb (rtx from, rtx to, rtx after)
 
   /* Splice this bunch out of where it is now.  */
   if (PREV_INSN (from))
-    NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
+    SET_NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
   if (NEXT_INSN (to))
-    PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
+    SET_PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
   if (get_last_insn () == to)
     set_last_insn (PREV_INSN (from));
   if (get_insns () == from)
@@ -4188,11 +4188,11 @@ reorder_insns_nobb (rtx from, rtx to, rtx after)
 
   /* Make the new neighbors point to it and it to them.  */
   if (NEXT_INSN (after))
-    PREV_INSN (NEXT_INSN (after)) = to;
+    SET_PREV_INSN (NEXT_INSN (after)) = to;
 
-  NEXT_INSN (to) = NEXT_INSN (after);
-  PREV_INSN (from) = after;
-  NEXT_INSN (after) = from;
+  SET_NEXT_INSN (to) = NEXT_INSN (after);
+  SET_PREV_INSN (from) = after;
+  SET_NEXT_INSN (after) = from;
   if (after == get_last_insn ())
     set_last_insn (to);
 }
@@ -4397,11 +4397,11 @@ emit_insn_after_1 (rtx first, rtx after, basic_block bb)
 
   after_after = NEXT_INSN (after);
 
-  NEXT_INSN (after) = first;
-  PREV_INSN (first) = after;
-  NEXT_INSN (last) = after_after;
+  SET_NEXT_INSN (after) = first;
+  SET_PREV_INSN (first) = after;
+  SET_NEXT_INSN (last) = after_after;
   if (after_after)
-    PREV_INSN (after_after) = last;
+    SET_PREV_INSN (after_after) = last;
 
   if (after == get_last_insn ())
     set_last_insn (last);
diff --git a/gcc/final.c b/gcc/final.c
index c32e177..c6339ae 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -2856,12 +2856,12 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 		   when generating a far jump in a delayed branch
 		   sequence.  */
 		note = NEXT_INSN (insn);
-		PREV_INSN (note) = prev;
-		NEXT_INSN (prev) = note;
-		NEXT_INSN (PREV_INSN (next)) = insn;
-		PREV_INSN (insn) = PREV_INSN (next);
-		NEXT_INSN (insn) = next;
-		PREV_INSN (next) = insn;
+		SET_PREV_INSN (note) = prev;
+		SET_NEXT_INSN (prev) = note;
+		SET_NEXT_INSN (PREV_INSN (next)) = insn;
+		SET_PREV_INSN (insn) = PREV_INSN (next);
+		SET_NEXT_INSN (insn) = next;
+		SET_PREV_INSN (next) = insn;
 	      }
 
 	    /* PEEPHOLE might have changed this.  */
@@ -4624,8 +4624,8 @@ rest_of_clean_state (void)
   for (insn = get_insns (); insn; insn = next)
     {
       next = NEXT_INSN (insn);
-      NEXT_INSN (insn) = NULL;
-      PREV_INSN (insn) = NULL;
+      SET_NEXT_INSN (insn) = NULL;
+      SET_PREV_INSN (insn) = NULL;
 
       if (final_output
 	  && (!NOTE_P (insn) ||
diff --git a/gcc/gcse.c b/gcc/gcse.c
index 84a1147..163a529 100644
--- a/gcc/gcse.c
+++ b/gcc/gcse.c
@@ -865,7 +865,7 @@ can_assign_to_reg_without_clobbers_p (rtx x)
 				      gen_rtx_REG (word_mode,
 						   FIRST_PSEUDO_REGISTER * 2),
 				      const0_rtx));
-      NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0;
+      SET_NEXT_INSN (test_insn) = SET_PREV_INSN (test_insn) = 0;
     }
 
   /* Now make an insn like the one we would make when GCSE'ing and see if
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index b3482e3..59c7fc9 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -3972,8 +3972,8 @@ concat_note_lists (rtx from_end, rtx *to_endp)
   while (PREV_INSN (from_start) != NULL)
     from_start = PREV_INSN (from_start);
 
-  PREV_INSN (from_start) = *to_endp;
-  NEXT_INSN (*to_endp) = from_start;
+  SET_PREV_INSN (from_start) = *to_endp;
+  SET_NEXT_INSN (*to_endp) = from_start;
   *to_endp = from_end;
 }
 
@@ -4014,10 +4014,10 @@ remove_notes (rtx head, rtx tail)
 	  remove_insn (insn);
 
 	  /* Add the note to list that ends at NOTE_LIST.  */
-	  PREV_INSN (insn) = note_list;
-	  NEXT_INSN (insn) = NULL_RTX;
+	  SET_PREV_INSN (insn) = note_list;
+	  SET_NEXT_INSN (insn) = NULL_RTX;
 	  if (note_list)
-	    NEXT_INSN (note_list) = insn;
+	    SET_NEXT_INSN (note_list) = insn;
 	  note_list = insn;
 	  break;
 	}
@@ -4810,10 +4810,10 @@ restore_other_notes (rtx head, basic_block head_bb)
       /* In the above cycle we've missed this note.  */
       set_block_for_insn (note_head, head_bb);
 
-      PREV_INSN (note_head) = PREV_INSN (head);
-      NEXT_INSN (PREV_INSN (head)) = note_head;
-      PREV_INSN (head) = note_list;
-      NEXT_INSN (note_list) = head;
+      SET_PREV_INSN (note_head) = PREV_INSN (head);
+      SET_NEXT_INSN (PREV_INSN (head)) = note_head;
+      SET_PREV_INSN (head) = note_list;
+      SET_NEXT_INSN (note_list) = head;
 
       if (BLOCK_FOR_INSN (head) != head_bb)
 	SET_BB_END (head_bb) = note_list;
@@ -5239,14 +5239,14 @@ move_insn (rtx insn, rtx last, rtx nt)
       else
 	note = insn;
 
-      NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (note);
-      PREV_INSN (NEXT_INSN (note)) = PREV_INSN (insn);
+      SET_NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (note);
+      SET_PREV_INSN (NEXT_INSN (note)) = PREV_INSN (insn);
 
-      NEXT_INSN (note) = NEXT_INSN (last);
-      PREV_INSN (NEXT_INSN (last)) = note;
+      SET_NEXT_INSN (note) = NEXT_INSN (last);
+      SET_PREV_INSN (NEXT_INSN (last)) = note;
 
-      NEXT_INSN (last) = insn;
-      PREV_INSN (insn) = last;
+      SET_NEXT_INSN (last) = insn;
+      SET_PREV_INSN (insn) = last;
 
       bb = BLOCK_FOR_INSN (last);
 
@@ -8166,8 +8166,8 @@ unlink_bb_notes (basic_block first, basic_block last)
       next = NEXT_INSN (note);
       gcc_assert (prev && next);
 
-      NEXT_INSN (prev) = next;
-      PREV_INSN (next) = prev;
+      SET_NEXT_INSN (prev) = next;
+      SET_PREV_INSN (next) = prev;
 
       bb_header[last->index] = label;
 
@@ -8208,9 +8208,9 @@ restore_bb_notes (basic_block first)
 
       bb_header[first->index] = 0;
 
-      NEXT_INSN (prev) = label;
-      NEXT_INSN (note) = next;
-      PREV_INSN (next) = note;
+      SET_NEXT_INSN (prev) = label;
+      SET_NEXT_INSN (note) = next;
+      SET_PREV_INSN (next) = note;
 
       first = first->next_bb;
     }
diff --git a/gcc/jump.c b/gcc/jump.c
index 9418f65..69263e6 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -1404,10 +1404,10 @@ delete_for_peephole (rtx from, rtx to)
 	  /* We don't do this all at once, because we
 	     must preserve all NOTEs.  */
 	  if (prev)
-	    NEXT_INSN (prev) = next;
+	    SET_NEXT_INSN (prev) = next;
 
 	  if (next)
-	    PREV_INSN (next) = prev;
+	    SET_PREV_INSN (next) = prev;
 	}
 
       if (insn == to)
diff --git a/gcc/optabs.c b/gcc/optabs.c
index ca1c194..24fc015 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -3956,12 +3956,12 @@ emit_libcall_block_1 (rtx insns, rtx target, rtx result, rtx equiv,
 	  if (! data.must_stay)
 	    {
 	      if (PREV_INSN (insn))
-		NEXT_INSN (PREV_INSN (insn)) = next;
+		SET_NEXT_INSN (PREV_INSN (insn)) = next;
 	      else
 		insns = next;
 
 	      if (next)
-		PREV_INSN (next) = PREV_INSN (insn);
+		SET_PREV_INSN (next) = PREV_INSN (insn);
 
 	      add_insn (insn);
 	    }
diff --git a/gcc/reorg.c b/gcc/reorg.c
index e4b6d45..75819bc 100644
--- a/gcc/reorg.c
+++ b/gcc/reorg.c
@@ -516,7 +516,7 @@ emit_delay_sequence (rtx insn, rtx list, int length)
      the SEQUENCE.   Remember where we want to emit SEQUENCE in AFTER.  */
   rtx after = PREV_INSN (insn);
   remove_insn (insn);
-  NEXT_INSN (insn) = PREV_INSN (insn) = NULL;
+  SET_NEXT_INSN (insn) = SET_PREV_INSN (insn) = NULL;
 
   /* Build our SEQUENCE and rebuild the insn chain.  */
   int i = 1;
@@ -532,7 +532,7 @@ emit_delay_sequence (rtx insn, rtx list, int length)
 
       /* Unlink insn from its original place, and re-emit it into
 	 the sequence.  */
-      NEXT_INSN (tem) = PREV_INSN (tem) = NULL;
+      SET_NEXT_INSN (tem) = SET_PREV_INSN (tem) = NULL;
       XVECEXP (seq, 0, i) = emit_insn (tem);
 
       /* SPARC assembler, for instance, emit warning when debug info is output
@@ -2015,9 +2015,9 @@ fill_simple_delay_slots (int non_jumps_p)
 	    rtx next = NEXT_INSN (trial);
 	    rtx prev = PREV_INSN (trial);
 	    if (prev)
-	      NEXT_INSN (prev) = next;
+	      SET_NEXT_INSN (prev) = next;
 	    if (next)
-	      PREV_INSN (next) = prev;
+	      SET_PREV_INSN (next) = prev;
 	  }
 	}
 
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 3e37ed0..e08f05b 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -972,8 +972,15 @@ extern void rtl_check_failed_flag (const char *, const_rtx, const char *,
   (RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID", (INSN))->u2.insn_uid)
 
 /* Chain insns together in sequence.  */
-#define PREV_INSN(INSN)	XEXP (INSN, 0)
-#define NEXT_INSN(INSN)	XEXP (INSN, 1)
+/* For now these are split in two: an rvalue form:
+     PREV_INSN/NEXT_INSN
+   and an lvalue form:
+     SET_NEXT_INSN/SET_PREV_INSN.  */
+
+#define PREV_INSN(INSN)      XEXP ((const_rtx)(INSN), 0)
+#define SET_PREV_INSN(INSN)  XEXP (INSN, 0)
+#define NEXT_INSN(INSN)      XEXP ((const_rtx)(INSN), 1)
+#define SET_NEXT_INSN(INSN)  XEXP (INSN, 1)
 
 #define BLOCK_FOR_INSN(INSN) XBBDEF (INSN, 2)
 
diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 7eccdf9..c1a8a48 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -1423,11 +1423,11 @@ sel_move_insn (expr_t expr, int seqno, insn_t after)
 
   /* Assert that in move_op we disconnected this insn properly.  */
   gcc_assert (EXPR_VINSN (INSN_EXPR (insn)) != NULL);
-  PREV_INSN (insn) = after;
-  NEXT_INSN (insn) = next;
+  SET_PREV_INSN (insn) = after;
+  SET_NEXT_INSN (insn) = next;
 
-  NEXT_INSN (after) = insn;
-  PREV_INSN (next) = insn;
+  SET_NEXT_INSN (after) = insn;
+  SET_PREV_INSN (next) = insn;
 
   /* Update links from insn to bb and vice versa.  */
   df_insn_change_bb (insn, bb);
@@ -3947,8 +3947,8 @@ sel_remove_insn (insn_t insn, bool only_disconnect, bool full_tidying)
   /* It is necessary to NULL these fields in case we are going to re-insert
      INSN into the insns stream, as will usually happen in the ONLY_DISCONNECT
      case, but also for NOPs that we will return to the nop pool.  */
-  PREV_INSN (insn) = NULL_RTX;
-  NEXT_INSN (insn) = NULL_RTX;
+  SET_PREV_INSN (insn) = NULL_RTX;
+  SET_NEXT_INSN (insn) = NULL_RTX;
   set_block_for_insn (insn, NULL);
 
   return tidy_control_flow (bb, full_tidying);
@@ -4990,8 +4990,8 @@ get_bb_note_from_pool (void)
     {
       rtx note = bb_note_pool.pop ();
 
-      PREV_INSN (note) = NULL_RTX;
-      NEXT_INSN (note) = NULL_RTX;
+      SET_PREV_INSN (note) = NULL_RTX;
+      SET_NEXT_INSN (note) = NULL_RTX;
 
       return note;
     }
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index bfbd2fe..1df2da0 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -5200,14 +5200,14 @@ move_nop_to_previous_block (insn_t nop, basic_block prev_bb)
   gcc_assert (prev_insn != NULL_RTX
               && PREV_INSN (note) == prev_insn);
 
-  NEXT_INSN (prev_insn) = nop;
-  PREV_INSN (nop) = prev_insn;
+  SET_NEXT_INSN (prev_insn) = nop;
+  SET_PREV_INSN (nop) = prev_insn;
 
-  PREV_INSN (note) = nop;
-  NEXT_INSN (note) = next_insn;
+  SET_PREV_INSN (note) = nop;
+  SET_NEXT_INSN (note) = next_insn;
 
-  NEXT_INSN (nop) = note;
-  PREV_INSN (next_insn) = note;
+  SET_NEXT_INSN (nop) = note;
+  SET_PREV_INSN (next_insn) = note;
 
   SET_BB_END (prev_bb) = nop;
   BLOCK_FOR_INSN (nop) = prev_bb;
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index c1039bc..e57d775 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -11,3 +11,4 @@ Phase 6: use extra rtx_def subclasses:             TODO
 TODO: "Scaffolding" to be removed
 =================================
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
+* SET_NEXT_INSN, SET_PREV_INSN
-- 
1.8.5.3

Re: [PATCH 010/236] Split NEXT_INSN/PREV_INSN into lvalue and rvalue forms

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> gcc/
> 	* rtl.h (PREV_INSN): Split macro in two: the existing one,
> 	for rvalues, and...
> 	(SET_PREV_INSN): New macro, for use as an lvalue.
> 	(NEXT_INSN, SET_NEXT_INSN): Likewise.
>
> 	* caller-save.c (save_call_clobbered_regs): Convert lvalue use of
> 	PREV_INSN/NEXT_INSN into SET_PREV_INSN/SET_NEXT_INSN.
> 	* cfgrtl.c (try_redirect_by_replacing_jump): Likewise.
> 	(fixup_abnormal_edges): Likewise.
> 	(unlink_insn_chain): Likewise.
> 	(fixup_reorder_chain): Likewise.
> 	(cfg_layout_delete_block): Likewise.
> 	(cfg_layout_merge_blocks): Likewise.
> 	* combine.c (update_cfg_for_uncondjump): Likewise.
> 	* emit-rtl.c (link_insn_into_chain): Likewise.
> 	(remove_insn): Likewise.
> 	(delete_insns_since): Likewise.
> 	(reorder_insns_nobb): Likewise.
> 	(emit_insn_after_1): Likewise.
> 	* final.c (rest_of_clean_state): Likewise.
> 	(final_scan_insn): Likewise.
> 	* gcse.c (can_assign_to_reg_without_clobbers_p): Likewise.
> 	* haifa-sched.c (concat_note_lists): Likewise.
> 	(remove_notes): Likewise.
> 	(restore_other_notes): Likewise.
> 	(move_insn): Likewise.
> 	(unlink_bb_notes): Likewise.
> 	(restore_bb_notes): Likewise.
> 	* jump.c (delete_for_peephole): Likewise.
> 	* optabs.c (emit_libcall_block_1): Likewise.
> 	* reorg.c (emit_delay_sequence): Likewise.
> 	(fill_simple_delay_slots): Likewise.
> 	* sel-sched-ir.c (sel_move_insn): Likewise.
> 	(sel_remove_insn): Likewise.
> 	(get_bb_note_from_pool): Likewise.
> 	* sel-sched.c (move_nop_to_previous_block): Likewise.
>
> 	* config/bfin/bfin.c (reorder_var_tracking_notes): Likewise.
> 	* config/c6x/c6x.c (gen_one_bundle): Likewise.
> 	(c6x_gen_bundles): Likewise.
> 	(hwloop_optimize): Likewise.
> 	* config/frv/frv.c (frv_function_prologue): Likewise.
> 	(frv_register_nop): Likewise.
> 	* config/ia64/ia64.c (ia64_init_dfa_pre_cycle_insn): Likewise.
> 	(ia64_reorg): Likewise.
> 	* config/mep/mep.c (mep_reorg_addcombine): Likewise.
> 	(mep_make_bundle): Likewise.
> 	(mep_bundle_insns): Likewise.
> 	* config/picochip/picochip.c (reorder_var_tracking_notes): Likewise.
> 	* config/tilegx/tilegx.c (reorder_var_tracking_notes): Likewise.
> 	* config/tilepro/tilepro.c (reorder_var_tracking_notes): Likewise.
OK.
jeff

Re: [PATCH 010/236] Split NEXT_INSN/PREV_INSN into lvalue and rvalue forms

[David Malcolm]

On Tue, 2014-08-12 at 15:17 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (PREV_INSN): Split macro in two: the existing one,
> > 	for rvalues, and...
> > 	(SET_PREV_INSN): New macro, for use as an lvalue.
> > 	(NEXT_INSN, SET_NEXT_INSN): Likewise.
> >
> > 	* caller-save.c (save_call_clobbered_regs): Convert lvalue use of
> > 	PREV_INSN/NEXT_INSN into SET_PREV_INSN/SET_NEXT_INSN.
> > 	* cfgrtl.c (try_redirect_by_replacing_jump): Likewise.
> > 	(fixup_abnormal_edges): Likewise.
> > 	(unlink_insn_chain): Likewise.
> > 	(fixup_reorder_chain): Likewise.
> > 	(cfg_layout_delete_block): Likewise.
> > 	(cfg_layout_merge_blocks): Likewise.
> > 	* combine.c (update_cfg_for_uncondjump): Likewise.
> > 	* emit-rtl.c (link_insn_into_chain): Likewise.
> > 	(remove_insn): Likewise.
> > 	(delete_insns_since): Likewise.
> > 	(reorder_insns_nobb): Likewise.
> > 	(emit_insn_after_1): Likewise.
> > 	* final.c (rest_of_clean_state): Likewise.
> > 	(final_scan_insn): Likewise.
> > 	* gcse.c (can_assign_to_reg_without_clobbers_p): Likewise.
> > 	* haifa-sched.c (concat_note_lists): Likewise.
> > 	(remove_notes): Likewise.
> > 	(restore_other_notes): Likewise.
> > 	(move_insn): Likewise.
> > 	(unlink_bb_notes): Likewise.
> > 	(restore_bb_notes): Likewise.
> > 	* jump.c (delete_for_peephole): Likewise.
> > 	* optabs.c (emit_libcall_block_1): Likewise.
> > 	* reorg.c (emit_delay_sequence): Likewise.
> > 	(fill_simple_delay_slots): Likewise.
> > 	* sel-sched-ir.c (sel_move_insn): Likewise.
> > 	(sel_remove_insn): Likewise.
> > 	(get_bb_note_from_pool): Likewise.
> > 	* sel-sched.c (move_nop_to_previous_block): Likewise.
> >
> > 	* config/bfin/bfin.c (reorder_var_tracking_notes): Likewise.
> > 	* config/c6x/c6x.c (gen_one_bundle): Likewise.
> > 	(c6x_gen_bundles): Likewise.
> > 	(hwloop_optimize): Likewise.
> > 	* config/frv/frv.c (frv_function_prologue): Likewise.
> > 	(frv_register_nop): Likewise.
> > 	* config/ia64/ia64.c (ia64_init_dfa_pre_cycle_insn): Likewise.
> > 	(ia64_reorg): Likewise.
> > 	* config/mep/mep.c (mep_reorg_addcombine): Likewise.
> > 	(mep_make_bundle): Likewise.
> > 	(mep_bundle_insns): Likewise.
> > 	* config/picochip/picochip.c (reorder_var_tracking_notes): Likewise.
> > 	* config/tilegx/tilegx.c (reorder_var_tracking_notes): Likewise.
> > 	* config/tilepro/tilepro.c (reorder_var_tracking_notes): Likewise.
> OK.

Thanks; committed to trunk as r214128, having bootstrapped&regrtested on
x86_64-unknown-linux-gnu (Fedora 20) albeit in combination with patches
9-29 [1], and verified that it builds standalone with the following
targets:
* x86_64-unknown-linux-gnu (Fedora 20)
* bfin-elf
* c6x-elf
* ia64-elf
* mep-elf
* picochip-elf
* tilegx-linux-gnu
* tilepro-linux-gnu

I was also able to verify the build of the touched file frv.c with
frv-elf, and that fully builds apart from what appears to be a
pre-existing issue in ifcvt.c:
../../src/gcc/ifcvt.c: In function ‘int
cond_exec_process_insns(ce_if_block*, rtx, rtx, rtx, int, int)’:
../../src/gcc/config/frv/frv.h:1964:58: error: ‘frv_ifcvt_modify_insn’
was not declared in this scope
 (PATTERN) = frv_ifcvt_modify_insn (CE_INFO, PATTERN, INSN)
                                                          ^
../../src/gcc/ifcvt.c:408:7: note: in expansion of macro
‘IFCVT_MODIFY_INSN’
       IFCVT_MODIFY_INSN (ce_info, pattern, insn);

[PATCH 207/236] reorg.c: Use rtx_sequence

[David Malcolm]

gcc/
	* reorg.c (redundant_insn): In two places in the function, replace
	a check of GET_CODE with a dyn_cast, introducing local "seq", and
	usings methods of rtx_sequence to clarify the code.
---
 gcc/reorg.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/gcc/reorg.c b/gcc/reorg.c
index 75819bc..3894863 100644
--- a/gcc/reorg.c
+++ b/gcc/reorg.c
@@ -1526,11 +1526,11 @@ redundant_insn (rtx insn, rtx target, rtx delay_list)
       if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
 	continue;
 
-      if (GET_CODE (pat) == SEQUENCE)
+      if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
 	{
 	  /* Stop for a CALL and its delay slots because it is difficult to
 	     track its resource needs correctly.  */
-	  if (CALL_P (XVECEXP (pat, 0, 0)))
+	  if (CALL_P (seq->element (0)))
 	    return 0;
 
 	  /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
@@ -1538,21 +1538,21 @@ redundant_insn (rtx insn, rtx target, rtx delay_list)
 	     correctly.  */
 
 #ifdef INSN_SETS_ARE_DELAYED
-	  if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
+	  if (INSN_SETS_ARE_DELAYED (seq->element (0)))
 	    return 0;
 #endif
 
 #ifdef INSN_REFERENCES_ARE_DELAYED
-	  if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
+	  if (INSN_REFERENCES_ARE_DELAYED (seq->element (0)))
 	    return 0;
 #endif
 
 	  /* See if any of the insns in the delay slot match, updating
 	     resource requirements as we go.  */
-	  for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
-	    if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
-		&& rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat)
-		&& ! find_reg_note (XVECEXP (pat, 0, i), REG_UNUSED, NULL_RTX))
+	  for (i = seq->len () - 1; i > 0; i--)
+	    if (GET_CODE (seq->element (i)) == GET_CODE (insn)
+		&& rtx_equal_p (PATTERN (seq->element (i)), ipat)
+		&& ! find_reg_note (seq->element (i), REG_UNUSED, NULL_RTX))
 	      break;
 
 	  /* If found a match, exit this loop early.  */
@@ -1628,10 +1628,10 @@ redundant_insn (rtx insn, rtx target, rtx delay_list)
       if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
 	continue;
 
-      if (GET_CODE (pat) == SEQUENCE)
+      if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
 	{
 	  bool annul_p = false;
-          rtx control = XVECEXP (pat, 0, 0);
+          rtx control = seq->element (0);
 
 	  /* If this is a CALL_INSN and its delay slots, it is hard to track
 	     the resource needs properly, so give up.  */
@@ -1656,9 +1656,9 @@ redundant_insn (rtx insn, rtx target, rtx delay_list)
 
 	  /* See if any of the insns in the delay slot match, updating
 	     resource requirements as we go.  */
-	  for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
+	  for (i = seq->len () - 1; i > 0; i--)
 	    {
-	      rtx candidate = XVECEXP (pat, 0, i);
+	      rtx candidate = seq->element (i);
 
 	      /* If an insn will be annulled if the branch is false, it isn't
 		 considered as a possible duplicate insn.  */
-- 
1.8.5.3

Re: [PATCH 207/236] reorg.c: Use rtx_sequence

[Jeff Law]

On 08/06/14 11:23, David Malcolm wrote:
> gcc/
> 	* reorg.c (redundant_insn): In two places in the function, replace
> 	a check of GET_CODE with a dyn_cast, introducing local "seq", and
> 	usings methods of rtx_sequence to clarify the code.
Some concerns here with the dynamic cast.

jeff

[PATCH 045/236] define_bypass guard functions take a pair of rtx_insn

[David Malcolm]

(define_bypass) clauses in .md files can specify the name of a guard
function as their final operand.  Currently these functions are called
with a pair of rtx.  This patch strengthens insn-automata.c so that such
guard functions are passed a pair of rtx_insn *, allowing these guard
functions to be similarly strengthened in the per-target phase of this
patch kit.

gcc/
	* genautomata.c (output_internal_insn_latency_func): When writing
	the function "internal_insn_latency" to insn-automata.c,
	strengthen params "insn" and "insn2" from rtx to rtx_insn *, thus
	allowing the optional guard function of (define_bypass) clauses to
	expect a pair of rtx_insn *, rather than a pair of rtx.
	(output_insn_latency_func): When writing the function
	"insn_latency", add an "uncast_" prefix to params "insn" and
	"insn2", reintroducing "insn" and "insn2" as rtx_insn * locals
	using checked casts from the params, thus enabling the above
	change to the generated "internal_insn_latency" function.
---
 gcc/genautomata.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/gcc/genautomata.c b/gcc/genautomata.c
index 0c61278..3017e20 100644
--- a/gcc/genautomata.c
+++ b/gcc/genautomata.c
@@ -8360,7 +8360,7 @@ output_internal_insn_latency_func (void)
   decl_t decl;
   struct bypass_decl *bypass;
 
-  fprintf (output_file, "static int\n%s (int %s ATTRIBUTE_UNUSED,\n\tint %s ATTRIBUTE_UNUSED,\n\trtx %s ATTRIBUTE_UNUSED,\n\trtx %s ATTRIBUTE_UNUSED)\n",
+  fprintf (output_file, "static int\n%s (int %s ATTRIBUTE_UNUSED,\n\tint %s ATTRIBUTE_UNUSED,\n\trtx_insn *%s ATTRIBUTE_UNUSED,\n\trtx_insn *%s ATTRIBUTE_UNUSED)\n",
 	   INTERNAL_INSN_LATENCY_FUNC_NAME, INTERNAL_INSN_CODE_NAME,
 	   INTERNAL_INSN2_CODE_NAME, INSN_PARAMETER_NAME,
 	   INSN2_PARAMETER_NAME);
@@ -8477,10 +8477,16 @@ output_internal_maximal_insn_latency_func (void)
 static void
 output_insn_latency_func (void)
 {
-  fprintf (output_file, "int\n%s (rtx %s, rtx %s)\n",
+  fprintf (output_file, "int\n%s (rtx uncast_%s, rtx uncast_%s)\n",
 	   INSN_LATENCY_FUNC_NAME, INSN_PARAMETER_NAME, INSN2_PARAMETER_NAME);
   fprintf (output_file, "{\n  int %s, %s;\n",
 	   INTERNAL_INSN_CODE_NAME, INTERNAL_INSN2_CODE_NAME);
+  fprintf (output_file,
+	   "  rtx_insn *%s = as_a_nullable <rtx_insn *> (uncast_%s);\n",
+	   INSN_PARAMETER_NAME, INSN_PARAMETER_NAME);
+  fprintf (output_file,
+	   "  rtx_insn *%s = as_a_nullable <rtx_insn *> (uncast_%s);\n",
+	   INSN2_PARAMETER_NAME, INSN2_PARAMETER_NAME);
   output_internal_insn_code_evaluation (INSN_PARAMETER_NAME,
 					INTERNAL_INSN_CODE_NAME, 0);
   output_internal_insn_code_evaluation (INSN2_PARAMETER_NAME,
-- 
1.8.5.3

Re: [PATCH 045/236] define_bypass guard functions take a pair of rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> (define_bypass) clauses in .md files can specify the name of a guard
> function as their final operand.  Currently these functions are called
> with a pair of rtx.  This patch strengthens insn-automata.c so that such
> guard functions are passed a pair of rtx_insn *, allowing these guard
> functions to be similarly strengthened in the per-target phase of this
> patch kit.
>
> gcc/
> 	* genautomata.c (output_internal_insn_latency_func): When writing
> 	the function "internal_insn_latency" to insn-automata.c,
> 	strengthen params "insn" and "insn2" from rtx to rtx_insn *, thus
> 	allowing the optional guard function of (define_bypass) clauses to
> 	expect a pair of rtx_insn *, rather than a pair of rtx.
> 	(output_insn_latency_func): When writing the function
> 	"insn_latency", add an "uncast_" prefix to params "insn" and
> 	"insn2", reintroducing "insn" and "insn2" as rtx_insn * locals
> 	using checked casts from the params, thus enabling the above
> 	change to the generated "internal_insn_latency" function.
OK.
Jeff

Re: [PATCH 045/236] define_bypass guard functions take a pair of rtx_insn

[David Malcolm]

On Wed, 2014-08-13 at 12:07 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > (define_bypass) clauses in .md files can specify the name of a guard
> > function as their final operand.  Currently these functions are called
> > with a pair of rtx.  This patch strengthens insn-automata.c so that such
> > guard functions are passed a pair of rtx_insn *, allowing these guard
> > functions to be similarly strengthened in the per-target phase of this
> > patch kit.
> >
> > gcc/
> > 	* genautomata.c (output_internal_insn_latency_func): When writing
> > 	the function "internal_insn_latency" to insn-automata.c,
> > 	strengthen params "insn" and "insn2" from rtx to rtx_insn *, thus
> > 	allowing the optional guard function of (define_bypass) clauses to
> > 	expect a pair of rtx_insn *, rather than a pair of rtx.
> > 	(output_insn_latency_func): When writing the function
> > 	"insn_latency", add an "uncast_" prefix to params "insn" and
> > 	"insn2", reintroducing "insn" and "insn2" as rtx_insn * locals
> > 	using checked casts from the params, thus enabling the above
> > 	change to the generated "internal_insn_latency" function.
> OK.
Thanks; committed to trunk as r214273, with the trivial fixup of
as_a_nullable to safe_as_a.

[PATCH 069/236] dwarf2cfi.c: Use rtx_insn

[David Malcolm]

gcc/
	* dwarf2cfi.c (add_cfis_to_fde): Strengthen locals "insn", "next"
	from rtx to rtx_insn *.
	create_pseudo_cfg): Likewise for local "insn".
---
 gcc/dwarf2cfi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index 1f56fed..7abe48c 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -2132,7 +2132,7 @@ static void
 add_cfis_to_fde (void)
 {
   dw_fde_ref fde = cfun->fde;
-  rtx insn, next;
+  rtx_insn *insn, *next;
   /* We always start with a function_begin label.  */
   bool first = false;
 
@@ -2727,7 +2727,7 @@ create_pseudo_cfg (void)
 {
   bool saw_barrier, switch_sections;
   dw_trace_info ti;
-  rtx insn;
+  rtx_insn *insn;
   unsigned i;
 
   /* The first trace begins at the start of the function,
-- 
1.8.5.3

[PATCH 133/236] config/h8300: Use rtx_insn

[David Malcolm]

gcc/
	* config/h8300/h8300-protos.h (final_prescan_insn): Strengthen
	first param from rtx to rtx_insn *.
	(h8300_insn_length_from_table): Likewise.
	* config/h8300/h8300.c (F): Likewise for return type and param
	 "x".
	(Fpa): Add a checked cast to rtx_insn *.
	(h8300_emit_stack_adjustment): Strengthen local "x" from rtx to
	rtx_insn *.
	(final_prescan_insn): Likewise for param "insn".
	(h8300_binary_length): Likewise.
	(h8300_insn_length_from_table): Likewise.
---
 gcc/config/h8300/h8300-protos.h |  4 ++--
 gcc/config/h8300/h8300.c        | 19 ++++++++++---------
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/gcc/config/h8300/h8300-protos.h b/gcc/config/h8300/h8300-protos.h
index 1af2cc6..ae14125 100644
--- a/gcc/config/h8300/h8300-protos.h
+++ b/gcc/config/h8300/h8300-protos.h
@@ -33,7 +33,7 @@ extern unsigned int compute_a_shift_length (rtx, rtx *);
 extern const char *output_a_rotate (enum rtx_code, rtx *);
 extern unsigned int compute_a_rotate_length (rtx *);
 extern const char *output_simode_bld (int, rtx[]);
-extern void final_prescan_insn (rtx, rtx *, int);
+extern void final_prescan_insn (rtx_insn *, rtx *, int);
 extern int h8300_expand_movsi (rtx[]);
 extern void notice_update_cc (rtx, rtx);
 extern const char *output_logical_op (enum machine_mode, rtx *);
@@ -107,7 +107,7 @@ struct cpp_reader;
 extern void h8300_pr_interrupt (struct cpp_reader *);
 extern void h8300_pr_saveall (struct cpp_reader *);
 extern enum reg_class  h8300_reg_class_from_letter (int);
-extern unsigned int    h8300_insn_length_from_table (rtx, rtx *);
+extern unsigned int    h8300_insn_length_from_table (rtx_insn *, rtx *);
 extern const char *    output_h8sx_shift (rtx *, int, int);
 extern bool            h8300_operands_match_p (rtx *);
 extern bool            h8sx_mergeable_memrefs_p (rtx, rtx);
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index e7ed03a..e904802 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -114,7 +114,7 @@ static unsigned int  h8300_length_from_table      (rtx, rtx, const h8300_length_
 static unsigned int  h8300_unary_length           (rtx);
 static unsigned int  h8300_short_immediate_length (rtx);
 static unsigned int  h8300_bitfield_length        (rtx, rtx);
-static unsigned int  h8300_binary_length          (rtx, const h8300_length_table *);
+static unsigned int  h8300_binary_length          (rtx_insn *, const h8300_length_table *);
 static bool          h8300_short_move_mem_p       (rtx, enum rtx_code);
 static unsigned int  h8300_move_length            (rtx *, const h8300_length_table *);
 static bool	     h8300_hard_regno_scratch_ok  (unsigned int);
@@ -485,8 +485,8 @@ byte_reg (rtx x, int b)
 	   && !crtl->is_leaf)))
 
 /* We use this to wrap all emitted insns in the prologue.  */
-static rtx
-F (rtx x, bool set_it)
+static rtx_insn *
+F (rtx_insn *x, bool set_it)
 {
   if (set_it)
     RTX_FRAME_RELATED_P (x) = 1;
@@ -506,7 +506,7 @@ Fpa (rtx par)
   int i;
 
   for (i = 0; i < len; i++)
-    F (XVECEXP (par, 0, i), true);
+    F (as_a <rtx_insn *> (XVECEXP (par, 0, i)), true);
 
   return par;
 }
@@ -543,8 +543,9 @@ h8300_emit_stack_adjustment (int sign, HOST_WIDE_INT size, bool in_prologue)
 	 the splitter will do.  */
       if (Pmode == HImode)
 	{
-	  rtx x = emit_insn (gen_addhi3 (stack_pointer_rtx,
-					 stack_pointer_rtx, GEN_INT (sign * size)));
+	  rtx_insn *x = emit_insn (gen_addhi3 (stack_pointer_rtx,
+					       stack_pointer_rtx,
+					       GEN_INT (sign * size)));
 	  if (size < 4)
 	    F (x, in_prologue);
 	}
@@ -1874,7 +1875,7 @@ h8300_print_operand_address (FILE *file, rtx addr)
    option.  */
 
 void
-final_prescan_insn (rtx insn, rtx *operand ATTRIBUTE_UNUSED,
+final_prescan_insn (rtx_insn *insn, rtx *operand ATTRIBUTE_UNUSED,
 		    int num_operands ATTRIBUTE_UNUSED)
 {
   /* This holds the last insn address.  */
@@ -2438,7 +2439,7 @@ h8300_bitfield_length (rtx op, rtx op2)
 /* Calculate the length of general binary instruction INSN using TABLE.  */
 
 static unsigned int
-h8300_binary_length (rtx insn, const h8300_length_table *table)
+h8300_binary_length (rtx_insn *insn, const h8300_length_table *table)
 {
   rtx set;
 
@@ -2527,7 +2528,7 @@ h8300_mova_length (rtx dest, rtx src, rtx offset)
    OPERANDS is the array of its operands.  */
 
 unsigned int
-h8300_insn_length_from_table (rtx insn, rtx * operands)
+h8300_insn_length_from_table (rtx_insn *insn, rtx * operands)
 {
   switch (get_attr_length_table (insn))
     {
-- 
1.8.5.3

[PATCH 036/236] get_last_bb_insn returns an rtx_insn

[David Malcolm]

gcc/
	* basic-block.h (get_last_bb_insn): Strengthen return type from
	rtx to rtx_insn *.
	* cfgrtl.c (get_last_bb_insn): Likewise, and for locals "tmp" and
	end".
---
 gcc/basic-block.h | 2 +-
 gcc/cfgrtl.c      | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 03dbdbc..2eb6553 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -828,7 +828,7 @@ extern bool delete_unreachable_blocks (void);
 extern void update_br_prob_note (basic_block);
 extern bool inside_basic_block_p (const_rtx);
 extern bool control_flow_insn_p (const_rtx);
-extern rtx get_last_bb_insn (basic_block);
+extern rtx_insn *get_last_bb_insn (basic_block);
 
 /* In dominance.c */
 
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 5611ab8..e3bad95 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -2238,12 +2238,12 @@ update_br_prob_note (basic_block bb)
 
 /* Get the last insn associated with block BB (that includes barriers and
    tablejumps after BB).  */
-rtx
+rtx_insn *
 get_last_bb_insn (basic_block bb)
 {
   rtx_jump_table_data *table;
-  rtx tmp;
-  rtx end = BB_END (bb);
+  rtx_insn *tmp;
+  rtx_insn *end = BB_END (bb);
 
   /* Include any jump table following the basic block.  */
   if (tablejump_p (end, NULL, &table))
-- 
1.8.5.3

Re: [PATCH 036/236] get_last_bb_insn returns an rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* basic-block.h (get_last_bb_insn): Strengthen return type from
> 	rtx to rtx_insn *.
> 	* cfgrtl.c (get_last_bb_insn): Likewise, and for locals "tmp" and
> 	end".
OK.
jeff

Re: [PATCH 036/236] get_last_bb_insn returns an rtx_insn

[David Malcolm]

On Wed, 2014-08-13 at 11:57 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* basic-block.h (get_last_bb_insn): Strengthen return type from
> > 	rtx to rtx_insn *.
> > 	* cfgrtl.c (get_last_bb_insn): Likewise, and for locals "tmp" and
> > 	end".
> OK.
Thanks.  Committed to trunk as r214246 (having rerun bootstrap and
regrtest).

[PATCH 131/236] config/c6x: Use rtx_insn

[David Malcolm]

gcc/
	* config/c6x/c6x-protos.h (c6x_get_unit_specifier): Strengthen
	param from rtx to rtx_insn *.
	(c6x_final_prescan_insn): Likewise for first param.

	* config/c6x/c6x.c (c6x_current_insn): Likewise for this variable.
	(c6x_output_mi_thunk): Replace use of NULL_RTX with NULL.
	(c6x_expand_compare): Strengthen local "insns" from rtx to
	rtx_insn *.
	(c6x_get_unit_specifier): Likewise for param "insn".
	(c6x_print_unit_specifier_field): Likewise.
	(c6x_final_prescan_insn): Likewise.
	(emit_add_sp_const): Likewise for local "insn".
	(c6x_expand_prologue): Likewise.
---
 gcc/config/c6x/c6x-protos.h |  4 ++--
 gcc/config/c6x/c6x.c        | 17 +++++++++--------
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/gcc/config/c6x/c6x-protos.h b/gcc/config/c6x/c6x-protos.h
index e360ebf..78080da 100644
--- a/gcc/config/c6x/c6x-protos.h
+++ b/gcc/config/c6x/c6x-protos.h
@@ -41,9 +41,9 @@ extern rtx c6x_subword (rtx, bool);
 extern void split_di (rtx *, int, rtx *, rtx *);
 extern bool c6x_valid_mask_p (HOST_WIDE_INT);
 
-extern char c6x_get_unit_specifier (rtx);
+extern char c6x_get_unit_specifier (rtx_insn *);
 
-extern void c6x_final_prescan_insn(rtx insn, rtx *opvec, int noperands);
+extern void c6x_final_prescan_insn(rtx_insn *insn, rtx *opvec, int noperands);
 
 extern int c6x_nsaved_regs (void);
 extern HOST_WIDE_INT c6x_initial_elimination_offset (int, int);
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index ba628d0..38070c0 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -86,7 +86,7 @@ unsigned long c6x_insn_mask = C6X_DEFAULT_INSN_MASK;
 
 /* The instruction that is being output (as obtained from FINAL_PRESCAN_INSN).
  */
-static rtx c6x_current_insn = NULL_RTX;
+static rtx_insn *c6x_current_insn = NULL;
 
 /* A decl we build to access __c6xabi_DSBT_base.  */
 static GTY(()) tree dsbt_decl;
@@ -769,7 +769,7 @@ c6x_output_mi_thunk (FILE *file ATTRIBUTE_UNUSED,
   /* The this parameter is passed as the first argument.  */
   rtx this_rtx = gen_rtx_REG (Pmode, REG_A4);
 
-  c6x_current_insn = NULL_RTX;
+  c6x_current_insn = NULL;
 
   xops[4] = XEXP (DECL_RTL (function), 0);
   if (!vcall_offset)
@@ -1565,7 +1565,7 @@ c6x_expand_compare (rtx comparison, enum machine_mode mode)
 
       if (is_fp_libfunc)
 	{
-	  rtx insns;
+	  rtx_insn *insns;
 	  rtx libfunc;
 	  switch (code)
 	    {
@@ -1970,7 +1970,7 @@ c6x_print_address_operand (FILE *file, rtx x, enum machine_mode mem_mode)
    specifies the functional unit used by INSN.  */
 
 char
-c6x_get_unit_specifier (rtx insn)
+c6x_get_unit_specifier (rtx_insn *insn)
 {
   enum attr_units units;
 
@@ -2007,7 +2007,7 @@ c6x_get_unit_specifier (rtx insn)
 
 /* Prints the unit specifier field.  */
 static void
-c6x_print_unit_specifier_field (FILE *file, rtx insn)
+c6x_print_unit_specifier_field (FILE *file, rtx_insn *insn)
 {
   enum attr_units units = get_attr_units (insn);
   enum attr_cross cross = get_attr_cross (insn);
@@ -2487,7 +2487,7 @@ c6x_preferred_rename_class (reg_class_t cl)
 \f
 /* Implements FINAL_PRESCAN_INSN.  */
 void
-c6x_final_prescan_insn (rtx insn, rtx *opvec ATTRIBUTE_UNUSED,
+c6x_final_prescan_insn (rtx_insn *insn, rtx *opvec ATTRIBUTE_UNUSED,
 			int noperands ATTRIBUTE_UNUSED)
 {
   c6x_current_insn = insn;
@@ -2715,7 +2715,7 @@ emit_add_sp_const (HOST_WIDE_INT offset, bool frame_related_p)
 {
   rtx to_add = GEN_INT (offset);
   rtx orig_to_add = to_add;
-  rtx insn;
+  rtx_insn *insn;
 
   if (offset == 0)
     return;
@@ -2752,7 +2752,8 @@ void
 c6x_expand_prologue (void)
 {
   struct c6x_frame frame;
-  rtx insn, mem;
+  rtx_insn *insn;
+  rtx mem;
   int nsaved = 0;
   HOST_WIDE_INT initial_offset, off, added_already;
 
-- 
1.8.5.3

[PATCH 041/236] Debug hooks: use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* debug.h (struct gcc_debug_hooks): Strengthen param 1 of hook
	"label" from rtx to rtx_code_label *.  Strengthen param 1 o
	"var_location" hook from rtx to rtx_insn *.
	(debug_nothing_rtx): Delete in favor of...
	(debug_nothing_rtx_code_label): New prototype.
	(debug_nothing_rtx_rtx): Delete unused prototype.
	(debug_nothing_rtx_insn): New prototype.

	* final.c (final_scan_insn): Add checked cast to rtx_insn * when
	invoking debug_hooks->var_location (in two places, one in a NOTE
	case of a switch statement, the other guarded by a CALL_P
	conditional.  Add checked cast to rtx_code_label * when invoking
	debug_hooks->label (within CODE_LABEL case of switch statement).

	* dbxout.c (dbx_debug_hooks): Update "label" hook from
	debug_nothing_rtx to debug_nothing_rtx_code_label.  Update
	"var_location" from debug_nothing_rtx to debug_nothing_rtx_insn.
	(xcoff_debug_hooks): Likewise.
	* debug.c (do_nothing_debug_hooks): Likewise.
	(debug_nothing_rtx): Delete in favor of...
	(debug_nothing_rtx_insn): New function.
	(debug_nothing_rtx_rtx): Delete unused function.
	(debug_nothing_rtx_code_label): New function.
	* dwarf2out.c (dwarf2_debug_hooks): Update "label" hook from
	debug_nothing_rtx to debug_nothing_rtx_code_label.
	(dwarf2out_var_location): Strengthen param "loc_note" from rtx
	to rtx_insn *.
	* sdbout.c (sdb_debug_hooks): Update "var_location" hook from
	debug_nothing_rtx to debug_nothing_rtx_insn.
	(sdbout_label): Strengthen param "insn" from rtx to
	rtx_code_label *.
	* vmsdbgout.c (vmsdbg_debug_hooks): Update "label" hook from
	debug_nothing_rtx to debug_nothing_rtx_code_label.  Update
	"var_location" hook from debug_nothing_rtx to
	debug_nothing_rtx_insn.
---
 gcc/dbxout.c    | 8 ++++----
 gcc/debug.c     | 9 ++++-----
 gcc/debug.h     | 8 ++++----
 gcc/dwarf2out.c | 6 +++---
 gcc/final.c     | 6 +++---
 gcc/sdbout.c    | 6 +++---
 gcc/vmsdbgout.c | 4 ++--
 7 files changed, 23 insertions(+), 24 deletions(-)

diff --git a/gcc/dbxout.c b/gcc/dbxout.c
index 6cb4341..a41db37 100644
--- a/gcc/dbxout.c
+++ b/gcc/dbxout.c
@@ -371,9 +371,9 @@ const struct gcc_debug_hooks dbx_debug_hooks =
   debug_nothing_tree_tree_tree_bool,	 /* imported_module_or_decl */
   debug_nothing_tree,		         /* deferred_inline_function */
   debug_nothing_tree,		         /* outlining_inline_function */
-  debug_nothing_rtx,		         /* label */
+  debug_nothing_rtx_code_label,	         /* label */
   dbxout_handle_pch,		         /* handle_pch */
-  debug_nothing_rtx,		         /* var_location */
+  debug_nothing_rtx_insn,	         /* var_location */
   debug_nothing_void,                    /* switch_text_section */
   debug_nothing_tree_tree,		 /* set_name */
   0,                                     /* start_end_main_source_file */
@@ -407,9 +407,9 @@ const struct gcc_debug_hooks xcoff_debug_hooks =
   debug_nothing_tree_tree_tree_bool,	 /* imported_module_or_decl */
   debug_nothing_tree,		         /* deferred_inline_function */
   debug_nothing_tree,		         /* outlining_inline_function */
-  debug_nothing_rtx,		         /* label */
+  debug_nothing_rtx_code_label,	         /* label */
   dbxout_handle_pch,		         /* handle_pch */
-  debug_nothing_rtx,		         /* var_location */
+  debug_nothing_rtx_insn,	         /* var_location */
   debug_nothing_void,                    /* switch_text_section */
   debug_nothing_tree_tree,	         /* set_name */
   0,                                     /* start_end_main_source_file */
diff --git a/gcc/debug.c b/gcc/debug.c
index 1734540..dba068c 100644
--- a/gcc/debug.c
+++ b/gcc/debug.c
@@ -48,9 +48,9 @@ const struct gcc_debug_hooks do_nothing_debug_hooks =
   debug_nothing_tree_tree_tree_bool,	 /* imported_module_or_decl */
   debug_nothing_tree,		         /* deferred_inline_function */
   debug_nothing_tree,		         /* outlining_inline_function */
-  debug_nothing_rtx,		         /* label */
+  debug_nothing_rtx_code_label,	         /* label */
   debug_nothing_int,		         /* handle_pch */
-  debug_nothing_rtx,		         /* var_location */
+  debug_nothing_rtx_insn,	         /* var_location */
   debug_nothing_void,                    /* switch_text_section */
   debug_nothing_tree_tree,		 /* set_name */
   0,                                     /* start_end_main_source_file */
@@ -91,13 +91,12 @@ debug_true_const_tree (const_tree block ATTRIBUTE_UNUSED)
 }
 
 void
-debug_nothing_rtx (rtx insn ATTRIBUTE_UNUSED)
+debug_nothing_rtx_insn (rtx_insn *insn ATTRIBUTE_UNUSED)
 {
 }
 
 void
-debug_nothing_rtx_rtx (rtx insn ATTRIBUTE_UNUSED,
-		       rtx new_insn ATTRIBUTE_UNUSED)
+debug_nothing_rtx_code_label (rtx_code_label *label ATTRIBUTE_UNUSED)
 {
 }
 
diff --git a/gcc/debug.h b/gcc/debug.h
index fc57589..3ac7976 100644
--- a/gcc/debug.h
+++ b/gcc/debug.h
@@ -119,14 +119,14 @@ struct gcc_debug_hooks
 
   /* Called from final_scan_insn for any CODE_LABEL insn whose
      LABEL_NAME is non-null.  */
-  void (* label) (rtx);
+  void (* label) (rtx_code_label *);
 
   /* Called after the start and before the end of writing a PCH file.
      The parameter is 0 if after the start, 1 if before the end.  */
   void (* handle_pch) (unsigned int);
 
   /* Called from final_scan_insn for any NOTE_INSN_VAR_LOCATION note.  */
-  void (* var_location) (rtx);
+  void (* var_location) (rtx_insn *);
 
   /* Called from final_scan_insn if there is a switch between hot and cold
      text sections.  */
@@ -160,8 +160,8 @@ extern void debug_nothing_tree_tree (tree, tree);
 extern void debug_nothing_tree_int (tree, int);
 extern void debug_nothing_tree_tree_tree_bool (tree, tree, tree, bool);
 extern bool debug_true_const_tree (const_tree);
-extern void debug_nothing_rtx (rtx);
-extern void debug_nothing_rtx_rtx (rtx, rtx);
+extern void debug_nothing_rtx_insn (rtx_insn *);
+extern void debug_nothing_rtx_code_label (rtx_code_label *);
 
 /* Hooks for various debug formats.  */
 extern const struct gcc_debug_hooks do_nothing_debug_hooks;
diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
index 7c93074..320d367 100644
--- a/gcc/dwarf2out.c
+++ b/gcc/dwarf2out.c
@@ -2433,7 +2433,7 @@ static void dwarf2out_imported_module_or_decl (tree, tree, tree, bool);
 static void dwarf2out_imported_module_or_decl_1 (tree, tree, tree,
 						 dw_die_ref);
 static void dwarf2out_abstract_function (tree);
-static void dwarf2out_var_location (rtx);
+static void dwarf2out_var_location (rtx_insn *);
 static void dwarf2out_begin_function (tree);
 static void dwarf2out_end_function (unsigned int);
 static void dwarf2out_set_name (tree, tree);
@@ -2473,7 +2473,7 @@ const struct gcc_debug_hooks dwarf2_debug_hooks =
      emitting the abstract description of inline functions until
      something tries to reference them.  */
   dwarf2out_abstract_function,	/* outlining_inline_function */
-  debug_nothing_rtx,		/* label */
+  debug_nothing_rtx_code_label,	/* label */
   debug_nothing_int,		/* handle_pch */
   dwarf2out_var_location,
   dwarf2out_switch_text_section,
@@ -21305,7 +21305,7 @@ static unsigned int first_loclabel_num_not_at_text_label;
    our lookup table.  */
 
 static void
-dwarf2out_var_location (rtx loc_note)
+dwarf2out_var_location (rtx_insn *loc_note)
 {
   char loclabel[MAX_ARTIFICIAL_LABEL_BYTES + 2];
   struct var_loc_node *newloc;
diff --git a/gcc/final.c b/gcc/final.c
index 3a78aad..1ae2c90 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -2343,7 +2343,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 	case NOTE_INSN_VAR_LOCATION:
 	case NOTE_INSN_CALL_ARG_LOCATION:
 	  if (!DECL_IGNORED_P (current_function_decl))
-	    debug_hooks->var_location (insn);
+	    debug_hooks->var_location (as_a <rtx_insn *> (insn));
 	  break;
 
 	default:
@@ -2381,7 +2381,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
       CC_STATUS_INIT;
 
       if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
-	debug_hooks->label (insn);
+	debug_hooks->label (as_a <rtx_code_label *> (insn));
 
       app_disable ();
 
@@ -2984,7 +2984,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 		  assemble_external (t);
 	      }
 	    if (!DECL_IGNORED_P (current_function_decl))
-	      debug_hooks->var_location (insn);
+	      debug_hooks->var_location (as_a <rtx_insn *> (insn));
 	  }
 
 	/* Output assembler code from the template.  */
diff --git a/gcc/sdbout.c b/gcc/sdbout.c
index b07824b..583c08a 100644
--- a/gcc/sdbout.c
+++ b/gcc/sdbout.c
@@ -125,7 +125,7 @@ static void sdbout_end_prologue		(unsigned int, const char *);
 static void sdbout_begin_function	(tree);
 static void sdbout_end_function		(unsigned int);
 static void sdbout_toplevel_data	(tree);
-static void sdbout_label		(rtx);
+static void sdbout_label		(rtx_code_label *);
 static char *gen_fake_label		(void);
 static int plain_type			(tree);
 static int template_name_p		(tree);
@@ -302,7 +302,7 @@ const struct gcc_debug_hooks sdb_debug_hooks =
   debug_nothing_tree,		         /* outlining_inline_function */
   sdbout_label,			         /* label */
   debug_nothing_int,		         /* handle_pch */
-  debug_nothing_rtx,		         /* var_location */
+  debug_nothing_rtx_insn,	         /* var_location */
   debug_nothing_void,                    /* switch_text_section */
   debug_nothing_tree_tree,		 /* set_name */
   0,                                     /* start_end_main_source_file */
@@ -1597,7 +1597,7 @@ sdbout_end_epilogue (unsigned int line ATTRIBUTE_UNUSED,
    is present.  */
 
 static void
-sdbout_label (rtx insn)
+sdbout_label (rtx_code_label *insn)
 {
   PUT_SDB_DEF (LABEL_NAME (insn));
   PUT_SDB_VAL (insn);
diff --git a/gcc/vmsdbgout.c b/gcc/vmsdbgout.c
index 3ee44bf..463a418 100644
--- a/gcc/vmsdbgout.c
+++ b/gcc/vmsdbgout.c
@@ -193,9 +193,9 @@ const struct gcc_debug_hooks vmsdbg_debug_hooks
    debug_nothing_tree_tree_tree_bool, /* imported_module_or_decl */
    debug_nothing_tree,		  /* deferred_inline_function */
    vmsdbgout_abstract_function,
-   debug_nothing_rtx,		  /* label */
+   debug_nothing_rtx_code_label,  /* label */
    debug_nothing_int,		  /* handle_pch */
-   debug_nothing_rtx,		  /* var_location */
+   debug_nothing_rtx_insn,	  /* var_location */
    debug_nothing_void,            /* switch_text_section */
    debug_nothing_tree_tree,	  /* set_name */
    0,                             /* start_end_main_source_file */
-- 
1.8.5.3

Re: [PATCH 041/236] Debug hooks: use rtx_insn and rtx_code_label

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* debug.h (struct gcc_debug_hooks): Strengthen param 1 of hook
> 	"label" from rtx to rtx_code_label *.  Strengthen param 1 o
> 	"var_location" hook from rtx to rtx_insn *.
> 	(debug_nothing_rtx): Delete in favor of...
> 	(debug_nothing_rtx_code_label): New prototype.
> 	(debug_nothing_rtx_rtx): Delete unused prototype.
> 	(debug_nothing_rtx_insn): New prototype.
>
> 	* final.c (final_scan_insn): Add checked cast to rtx_insn * when
> 	invoking debug_hooks->var_location (in two places, one in a NOTE
> 	case of a switch statement, the other guarded by a CALL_P
> 	conditional.  Add checked cast to rtx_code_label * when invoking
> 	debug_hooks->label (within CODE_LABEL case of switch statement).
>
> 	* dbxout.c (dbx_debug_hooks): Update "label" hook from
> 	debug_nothing_rtx to debug_nothing_rtx_code_label.  Update
> 	"var_location" from debug_nothing_rtx to debug_nothing_rtx_insn.
> 	(xcoff_debug_hooks): Likewise.
> 	* debug.c (do_nothing_debug_hooks): Likewise.
> 	(debug_nothing_rtx): Delete in favor of...
> 	(debug_nothing_rtx_insn): New function.
> 	(debug_nothing_rtx_rtx): Delete unused function.
> 	(debug_nothing_rtx_code_label): New function.
> 	* dwarf2out.c (dwarf2_debug_hooks): Update "label" hook from
> 	debug_nothing_rtx to debug_nothing_rtx_code_label.
> 	(dwarf2out_var_location): Strengthen param "loc_note" from rtx
> 	to rtx_insn *.
> 	* sdbout.c (sdb_debug_hooks): Update "var_location" hook from
> 	debug_nothing_rtx to debug_nothing_rtx_insn.
> 	(sdbout_label): Strengthen param "insn" from rtx to
> 	rtx_code_label *.
> 	* vmsdbgout.c (vmsdbg_debug_hooks): Update "label" hook from
> 	debug_nothing_rtx to debug_nothing_rtx_code_label.  Update
> 	"var_location" hook from debug_nothing_rtx to
> 	debug_nothing_rtx_insn.
OK.  Note minor typo in changelog line #2.  "o" at EOL should probably 
be "of"

jeff

Re: [PATCH 041/236] Debug hooks: use rtx_insn and rtx_code_label

[David Malcolm]

On Wed, 2014-08-13 at 12:05 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* debug.h (struct gcc_debug_hooks): Strengthen param 1 of hook
> > 	"label" from rtx to rtx_code_label *.  Strengthen param 1 o
> > 	"var_location" hook from rtx to rtx_insn *.
> > 	(debug_nothing_rtx): Delete in favor of...
> > 	(debug_nothing_rtx_code_label): New prototype.
> > 	(debug_nothing_rtx_rtx): Delete unused prototype.
> > 	(debug_nothing_rtx_insn): New prototype.
> >
> > 	* final.c (final_scan_insn): Add checked cast to rtx_insn * when
> > 	invoking debug_hooks->var_location (in two places, one in a NOTE
> > 	case of a switch statement, the other guarded by a CALL_P
> > 	conditional.  Add checked cast to rtx_code_label * when invoking
> > 	debug_hooks->label (within CODE_LABEL case of switch statement).
> >
> > 	* dbxout.c (dbx_debug_hooks): Update "label" hook from
> > 	debug_nothing_rtx to debug_nothing_rtx_code_label.  Update
> > 	"var_location" from debug_nothing_rtx to debug_nothing_rtx_insn.
> > 	(xcoff_debug_hooks): Likewise.
> > 	* debug.c (do_nothing_debug_hooks): Likewise.
> > 	(debug_nothing_rtx): Delete in favor of...
> > 	(debug_nothing_rtx_insn): New function.
> > 	(debug_nothing_rtx_rtx): Delete unused function.
> > 	(debug_nothing_rtx_code_label): New function.
> > 	* dwarf2out.c (dwarf2_debug_hooks): Update "label" hook from
> > 	debug_nothing_rtx to debug_nothing_rtx_code_label.
> > 	(dwarf2out_var_location): Strengthen param "loc_note" from rtx
> > 	to rtx_insn *.
> > 	* sdbout.c (sdb_debug_hooks): Update "var_location" hook from
> > 	debug_nothing_rtx to debug_nothing_rtx_insn.
> > 	(sdbout_label): Strengthen param "insn" from rtx to
> > 	rtx_code_label *.
> > 	* vmsdbgout.c (vmsdbg_debug_hooks): Update "label" hook from
> > 	debug_nothing_rtx to debug_nothing_rtx_code_label.  Update
> > 	"var_location" hook from debug_nothing_rtx to
> > 	debug_nothing_rtx_insn.
> OK.  Note minor typo in changelog line #2.  "o" at EOL should probably 
> be "of"

Thanks.  Bootstrapped; committed to trunk as r214259, with the ChangeLog
typo fixed.

[PATCH 128/236] config/arm: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* config/arm/arm-protos.h (arm_final_prescan_insn): Likewise for param.
	(thumb1_final_prescan_insn): Likewise.
	(thumb2_final_prescan_insn): Likewise.

	* config/arm/arm.c (emit_set_insn): Strengthen return type from
	rtx to rtx_insn *.
	(struct minipool_node): Likewise for field "insn".
	(dump_minipool): Likewise for param "scan".
	(create_fix_barrier): Likewise for local "from".  Strengthen local
	"label" from rtx to rtx_code_label *.
	(push_minipool_barrier): Strengthen param "insn" from rtx to
	rtx_insn *.
	(push_minipool_fix): Likewise.
	(note_invalid_constants): Likewise.
	(thumb2_reorg): Likewise for local "insn".
	(arm_reorg): Likewise.
	(thumb2_final_prescan_insn): Likewise for param
	"insn" and local "first_insn".
	(arm_final_prescan_insn): Likewise for param "insn" and locals
	"start_insn", "this_insn".
	(arm_debugger_arg_offset): Likewise for param "insn".
	(thumb1_emit_multi_reg_push): Likewise for return type and local
	"insn".
	(thumb1_final_prescan_insn): Likewise for param "insn".
	(thumb_far_jump_used_p): Likewise for local "insn".
	(thumb1_expand_prologue): Likewise.
	(arm_expand_epilogue_apcs_frame): Likewise.
	(arm_expand_epilogue): Likewise for locals "insn", "tmp".
	(arm_split_compare_and_swap): Strengthen locals "label1", "label2"
	from rtx to rtx_code_label *.
	(arm_split_atomic_op): Likewise for local "label".
	(arm_emit_coreregs_64bit_shift): Likewise for local "done_label".
---
 gcc/config/arm/arm-protos.h |  6 +--
 gcc/config/arm/arm.c        | 91 ++++++++++++++++++++++++---------------------
 2 files changed, 51 insertions(+), 46 deletions(-)

diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 74645ee..a5a16fe 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -143,7 +143,7 @@ extern const char *arithmetic_instr (rtx, int);
 extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
 extern const char *output_return_instruction (rtx, bool, bool, bool);
 extern void arm_poke_function_name (FILE *, const char *);
-extern void arm_final_prescan_insn (rtx);
+extern void arm_final_prescan_insn (rtx_insn *);
 extern int arm_debugger_arg_offset (int, rtx);
 extern bool arm_is_long_call_p (tree);
 extern int    arm_emit_vector_const (FILE *, rtx);
@@ -184,8 +184,8 @@ extern int is_called_in_ARM_mode (tree);
 extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
 #ifdef RTX_CODE
 extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
-extern void thumb1_final_prescan_insn (rtx);
-extern void thumb2_final_prescan_insn (rtx);
+extern void thumb1_final_prescan_insn (rtx_insn *);
+extern void thumb2_final_prescan_insn (rtx_insn *);
 extern const char *thumb_load_double_from_address (rtx *);
 extern const char *thumb_output_move_mem_multiple (int, rtx *);
 extern const char *thumb_call_via_reg (rtx);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 6535d21..646c479 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -113,14 +113,14 @@ static Mnode *move_minipool_fix_backward_ref (Mnode *, Mnode *, HOST_WIDE_INT);
 static Mnode *add_minipool_backward_ref (Mfix *);
 static void assign_minipool_offsets (Mfix *);
 static void arm_print_value (FILE *, rtx);
-static void dump_minipool (rtx);
+static void dump_minipool (rtx_insn *);
 static int arm_barrier_cost (rtx);
 static Mfix *create_fix_barrier (Mfix *, HOST_WIDE_INT);
-static void push_minipool_barrier (rtx, HOST_WIDE_INT);
-static void push_minipool_fix (rtx, HOST_WIDE_INT, rtx *, enum machine_mode,
-			       rtx);
+static void push_minipool_barrier (rtx_insn *, HOST_WIDE_INT);
+static void push_minipool_fix (rtx_insn *, HOST_WIDE_INT, rtx *,
+			       enum machine_mode, rtx);
 static void arm_reorg (void);
-static void note_invalid_constants (rtx, HOST_WIDE_INT, int);
+static void note_invalid_constants (rtx_insn *, HOST_WIDE_INT, int);
 static unsigned long arm_compute_save_reg0_reg12_mask (void);
 static unsigned long arm_compute_save_reg_mask (void);
 static unsigned long arm_isr_value (tree);
@@ -178,7 +178,7 @@ static rtx arm_expand_unop_builtin (enum insn_code, tree, rtx, int);
 static rtx arm_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
 static tree arm_builtin_decl (unsigned, bool);
 static void emit_constant_insn (rtx cond, rtx pattern);
-static rtx emit_set_insn (rtx, rtx);
+static rtx_insn *emit_set_insn (rtx, rtx);
 static rtx emit_multi_reg_push (unsigned long, unsigned long);
 static int arm_arg_partial_bytes (cumulative_args_t, enum machine_mode,
 				  tree, bool);
@@ -1966,7 +1966,7 @@ arm_constant_limit (bool size_p)
 
 /* Emit an insn that's a simple single-set.  Both the operands must be known
    to be valid.  */
-inline static rtx
+inline static rtx_insn *
 emit_set_insn (rtx x, rtx y)
 {
   return emit_insn (gen_rtx_SET (VOIDmode, x, y));
@@ -15977,7 +15977,7 @@ struct minipool_node
 struct minipool_fixup
 {
   Mfix *            next;
-  rtx               insn;
+  rtx_insn *        insn;
   HOST_WIDE_INT     address;
   rtx *             loc;
   enum machine_mode mode;
@@ -16457,7 +16457,7 @@ assign_minipool_offsets (Mfix *barrier)
 
 /* Output the literal table */
 static void
-dump_minipool (rtx scan)
+dump_minipool (rtx_insn *scan)
 {
   Mnode * mp;
   Mnode * nmp;
@@ -16580,8 +16580,8 @@ static Mfix *
 create_fix_barrier (Mfix *fix, HOST_WIDE_INT max_address)
 {
   HOST_WIDE_INT count = 0;
-  rtx barrier;
-  rtx from = fix->insn;
+  rtx_barrier *barrier;
+  rtx_insn *from = fix->insn;
   /* The instruction after which we will insert the jump.  */
   rtx selected = NULL;
   int selected_cost;
@@ -16589,7 +16589,7 @@ create_fix_barrier (Mfix *fix, HOST_WIDE_INT max_address)
   HOST_WIDE_INT selected_address;
   Mfix * new_fix;
   HOST_WIDE_INT max_count = max_address - fix->address;
-  rtx label = gen_label_rtx ();
+  rtx_code_label *label = gen_label_rtx ();
 
   selected_cost = arm_barrier_cost (from);
   selected_address = fix->address;
@@ -16678,7 +16678,7 @@ create_fix_barrier (Mfix *fix, HOST_WIDE_INT max_address)
 /* Record that there is a natural barrier in the insn stream at
    ADDRESS.  */
 static void
-push_minipool_barrier (rtx insn, HOST_WIDE_INT address)
+push_minipool_barrier (rtx_insn *insn, HOST_WIDE_INT address)
 {
   Mfix * fix = (Mfix *) obstack_alloc (&minipool_obstack, sizeof (* fix));
 
@@ -16700,7 +16700,7 @@ push_minipool_barrier (rtx insn, HOST_WIDE_INT address)
    fixing; VALUE is the constant that must be loaded, which is of type
    MODE.  */
 static void
-push_minipool_fix (rtx insn, HOST_WIDE_INT address, rtx *loc,
+push_minipool_fix (rtx_insn *insn, HOST_WIDE_INT address, rtx *loc,
 		   enum machine_mode mode, rtx value)
 {
   Mfix * fix = (Mfix *) obstack_alloc (&minipool_obstack, sizeof (* fix));
@@ -16856,7 +16856,7 @@ arm_const_double_by_immediates (rtx val)
    If DO_PUSHES is false we do not actually push any of the fixups
    needed.  */
 static void
-note_invalid_constants (rtx insn, HOST_WIDE_INT address, int do_pushes)
+note_invalid_constants (rtx_insn *insn, HOST_WIDE_INT address, int do_pushes)
 {
   int opno;
 
@@ -17014,7 +17014,7 @@ thumb2_reorg (void)
 	  && optimize_bb_for_speed_p (bb))
 	continue;
 
-      rtx insn;
+      rtx_insn *insn;
       Convert_Action action = SKIP;
       Convert_Action action_for_partial_flag_setting
 	= (current_tune->disparage_partial_flag_setting_t16_encodings
@@ -17208,7 +17208,7 @@ thumb2_reorg (void)
 static void
 arm_reorg (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   HOST_WIDE_INT address = 0;
   Mfix * fix;
 
@@ -22417,9 +22417,9 @@ get_arm_condition_code (rtx comparison)
 /* Tell arm_asm_output_opcode to output IT blocks for conditionally executed
    instructions.  */
 void
-thumb2_final_prescan_insn (rtx insn)
+thumb2_final_prescan_insn (rtx_insn *insn)
 {
-  rtx first_insn = insn;
+  rtx_insn *first_insn = insn;
   rtx body = PATTERN (insn);
   rtx predicate;
   enum arm_cond_code code;
@@ -22501,7 +22501,7 @@ thumb2_final_prescan_insn (rtx insn)
 }
 
 void
-arm_final_prescan_insn (rtx insn)
+arm_final_prescan_insn (rtx_insn *insn)
 {
   /* BODY will hold the body of INSN.  */
   rtx body = PATTERN (insn);
@@ -22516,7 +22516,7 @@ arm_final_prescan_insn (rtx insn)
 
   /* START_INSN will hold the insn from where we start looking.  This is the
      first insn after the following code_label if REVERSE is true.  */
-  rtx start_insn = insn;
+  rtx_insn *start_insn = insn;
 
   /* If in state 4, check if the target branch is reached, in order to
      change back to state 0.  */
@@ -22588,7 +22588,8 @@ arm_final_prescan_insn (rtx insn)
       int fail = FALSE, succeed = FALSE;
       /* Flag which part of the IF_THEN_ELSE is the LABEL_REF.  */
       int then_not_else = TRUE;
-      rtx this_insn = start_insn, label = 0;
+      rtx_insn *this_insn = start_insn;
+      rtx label = 0;
 
       /* Register the insn jumped to.  */
       if (reverse)
@@ -22959,7 +22960,7 @@ arm_regno_class (int regno)
 int
 arm_debugger_arg_offset (int value, rtx addr)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   /* We are only interested if dbxout_parms() failed to compute the offset.  */
   if (value != 0)
@@ -25947,11 +25948,12 @@ number_of_first_bit_set (unsigned mask)
    to be saved; REAL_REGS is the set of registers to be described as
    saved.  If REAL_REGS is 0, only describe the stack adjustment.  */
 
-static rtx
+static rtx_insn *
 thumb1_emit_multi_reg_push (unsigned long mask, unsigned long real_regs)
 {
   unsigned long regno;
-  rtx par[10], tmp, reg, insn;
+  rtx par[10], tmp, reg;
+  rtx_insn *insn;
   int i, j;
 
   /* Build the parallel of the registers actually being stored.  */
@@ -26347,7 +26349,7 @@ thumb_exit (FILE *f, int reg_containing_return_addr)
    For Thumb-1, we track the status of the condition codes; this
    information is used in the cbranchsi4_insn pattern.  */
 void
-thumb1_final_prescan_insn (rtx insn)
+thumb1_final_prescan_insn (rtx_insn *insn)
 {
   if (flag_print_asm_name)
     asm_fprintf (asm_out_file, "%@ 0x%04x\n",
@@ -26416,7 +26418,7 @@ thumb_shiftable_const (unsigned HOST_WIDE_INT val)
 static int
 thumb_far_jump_used_p (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   bool far_jump = false;
   unsigned int func_size = 0;
 
@@ -26865,7 +26867,7 @@ thumb_compute_initial_elimination_offset (unsigned int from, unsigned int to)
 void
 thumb1_expand_prologue (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   HOST_WIDE_INT amount;
   arm_stack_offsets *offsets;
@@ -27317,7 +27319,7 @@ arm_expand_epilogue_apcs_frame (bool really_return)
       int saved_size = arm_get_vfp_saved_size ();
       if (saved_size > 0)
         {
-	  rtx insn;
+	  rtx_insn *insn;
           floats_from_frame += saved_size;
           insn = emit_insn (gen_addsi3 (ip_rtx,
 					hard_frame_pointer_rtx,
@@ -27356,7 +27358,7 @@ arm_expand_epilogue_apcs_frame (bool really_return)
     {
       /* The frame pointer is guaranteed to be non-double-word aligned, as
          it is set to double-word-aligned old_stack_pointer - 4.  */
-      rtx insn;
+      rtx_insn *insn;
       int lrm_count = (num_regs % 2) ? (num_regs + 2) : (num_regs + 1);
 
       for (i = LAST_IWMMXT_REGNUM; i >= FIRST_IWMMXT_REGNUM; i--)
@@ -27396,7 +27398,7 @@ arm_expand_epilogue_apcs_frame (bool really_return)
   num_regs = bit_count (saved_regs_mask);
   if ((offsets->outgoing_args != (1 + num_regs)) || cfun->calls_alloca)
     {
-      rtx insn;
+      rtx_insn *insn;
       emit_insn (gen_blockage ());
       /* Unwind the stack to just below the saved registers.  */
       insn = emit_insn (gen_addsi3 (stack_pointer_rtx,
@@ -27413,7 +27415,7 @@ arm_expand_epilogue_apcs_frame (bool really_return)
     {
       /* Interrupt handlers will have pushed the
          IP onto the stack, so restore it now.  */
-      rtx insn;
+      rtx_insn *insn;
       rtx addr = gen_rtx_MEM (SImode,
                               gen_rtx_POST_INC (SImode,
                               stack_pointer_rtx));
@@ -27482,7 +27484,7 @@ arm_expand_epilogue (bool really_return)
 
   if (frame_pointer_needed)
     {
-      rtx insn;
+      rtx_insn *insn;
       /* Restore stack pointer if necessary.  */
       if (TARGET_ARM)
         {
@@ -27539,7 +27541,7 @@ arm_expand_epilogue (bool really_return)
       amount = offsets->outgoing_args - offsets->saved_regs;
       if (amount)
         {
-	  rtx tmp;
+	  rtx_insn *tmp;
           /* Force out any pending memory operations that reference stacked data
              before stack de-allocation occurs.  */
           emit_insn (gen_blockage ());
@@ -27591,7 +27593,7 @@ arm_expand_epilogue (bool really_return)
     for (i = FIRST_IWMMXT_REGNUM; i <= LAST_IWMMXT_REGNUM; i++)
       if (df_regs_ever_live_p (i) && !call_used_regs[i])
         {
-          rtx insn;
+          rtx_insn *insn;
           rtx addr = gen_rtx_MEM (V2SImode,
                                   gen_rtx_POST_INC (SImode,
                                                     stack_pointer_rtx));
@@ -27680,9 +27682,10 @@ arm_expand_epilogue (bool really_return)
     {
       int i, j;
       rtx dwarf = NULL_RTX;
-      rtx tmp = emit_insn (gen_addsi3 (stack_pointer_rtx,
-			   stack_pointer_rtx,
-			   GEN_INT (crtl->args.pretend_args_size)));
+      rtx_insn *tmp =
+	emit_insn (gen_addsi3 (stack_pointer_rtx,
+			       stack_pointer_rtx,
+			       GEN_INT (crtl->args.pretend_args_size)));
 
       RTX_FRAME_RELATED_P (tmp) = 1;
 
@@ -30234,7 +30237,8 @@ arm_split_compare_and_swap (rtx operands[])
   enum machine_mode mode;
   enum memmodel mod_s, mod_f;
   bool is_weak;
-  rtx label1, label2, x, cond;
+  rtx_code_label *label1, *label2;
+  rtx x, cond;
 
   rval = operands[0];
   mem = operands[1];
@@ -30260,7 +30264,7 @@ arm_split_compare_and_swap (rtx operands[])
   if (!(use_acquire || use_release))
     arm_pre_atomic_barrier (mod_s);
 
-  label1 = NULL_RTX;
+  label1 = NULL;
   if (!is_weak)
     {
       label1 = gen_label_rtx ();
@@ -30310,7 +30314,8 @@ arm_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem,
   enum memmodel model = (enum memmodel) INTVAL (model_rtx);
   enum machine_mode mode = GET_MODE (mem);
   enum machine_mode wmode = (mode == DImode ? DImode : SImode);
-  rtx label, x;
+  rtx_code_label *label;
+  rtx x;
 
   bool use_acquire = TARGET_HAVE_LDACQ
                      && !(model == MEMMODEL_RELAXED
@@ -31236,7 +31241,7 @@ arm_emit_coreregs_64bit_shift (enum rtx_code code, rtx out, rtx in,
 			  ORR (SHIFT (ASHIFT, in_up, scratch1), out_down)));
 	  if (code == ASHIFTRT)
 	    {
-	      rtx done_label = gen_label_rtx ();
+	      rtx_code_label *done_label = gen_label_rtx ();
 	      emit_jump_insn (BRANCH (LT, done_label));
 	      emit_insn (SET (out_down, ORR (SHIFT (ASHIFTRT, in_up, scratch2),
 					     out_down)));
@@ -31255,7 +31260,7 @@ arm_emit_coreregs_64bit_shift (enum rtx_code code, rtx out, rtx in,
 
 	  if (code == ASHIFTRT)
 	    {
-	      rtx done_label = gen_label_rtx ();
+	      rtx_code_label *done_label = gen_label_rtx ();
 	      emit_jump_insn (BRANCH (LT, done_label));
 	      emit_insn (SET (scratch2, SHIFT (ASHIFTRT, in_up, scratch2)));
 	      emit_insn (SET (out_down, ORR (out_down, scratch2)));
-- 
1.8.5.3

Re: [PATCH 128/236] config/arm: Use rtx_insn and rtx_code_label

[Richard Earnshaw]

On 06/08/14 18:21, David Malcolm wrote:
> gcc/
>         * config/arm/arm-protos.h (arm_final_prescan_insn): Likewise for param.
>         (thumb1_final_prescan_insn): Likewise.
>         (thumb2_final_prescan_insn): Likewise.
> 
>         * config/arm/arm.c (emit_set_insn): Strengthen return type from
>         rtx to rtx_insn *.
>         (struct minipool_node): Likewise for field "insn".
>         (dump_minipool): Likewise for param "scan".
>         (create_fix_barrier): Likewise for local "from".  Strengthen local
>         "label" from rtx to rtx_code_label *.
>         (push_minipool_barrier): Strengthen param "insn" from rtx to
>         rtx_insn *.
>         (push_minipool_fix): Likewise.
>         (note_invalid_constants): Likewise.
>         (thumb2_reorg): Likewise for local "insn".
>         (arm_reorg): Likewise.
>         (thumb2_final_prescan_insn): Likewise for param
>         "insn" and local "first_insn".
>         (arm_final_prescan_insn): Likewise for param "insn" and locals
>         "start_insn", "this_insn".
>         (arm_debugger_arg_offset): Likewise for param "insn".
>         (thumb1_emit_multi_reg_push): Likewise for return type and local
>         "insn".
>         (thumb1_final_prescan_insn): Likewise for param "insn".
>         (thumb_far_jump_used_p): Likewise for local "insn".
>         (thumb1_expand_prologue): Likewise.
>         (arm_expand_epilogue_apcs_frame): Likewise.
>         (arm_expand_epilogue): Likewise for locals "insn", "tmp".
>         (arm_split_compare_and_swap): Strengthen locals "label1", "label2"
>         from rtx to rtx_code_label *.
>         (arm_split_atomic_op): Likewise for local "label".
>         (arm_emit_coreregs_64bit_shift): Likewise for local "done_label".

OK.

R.

[PATCH 195/236] Convert PATTERN from a macro to a pair of inline functions

[David Malcolm]

gcc/
	* rtl.h (PATTERN): Convert this macro into a pair of inline
	functions, for now, requiring const_rtx and rtx.
---
 gcc/rtl.h | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/gcc/rtl.h b/gcc/rtl.h
index 79cca1b..640616f 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -1226,7 +1226,15 @@ inline rtx& SET_NEXT_INSN (rtx insn)
 #define BLOCK_FOR_INSN(INSN) XBBDEF (INSN, 2)
 
 /* The body of an insn.  */
-#define PATTERN(INSN)	XEXP (INSN, 3)
+inline rtx PATTERN (const_rtx insn)
+{
+  return XEXP (insn, 3);
+}
+
+inline rtx& PATTERN (rtx insn)
+{
+  return XEXP (insn, 3);
+}
 
 #define INSN_LOCATION(INSN) XUINT (INSN, 4)
 
-- 
1.8.5.3

Re: [PATCH 195/236] Convert PATTERN from a macro to a pair of inline functions

[Jakub Jelinek]

On Wed, Aug 06, 2014 at 01:22:54PM -0400, David Malcolm wrote:
> gcc/
> 	* rtl.h (PATTERN): Convert this macro into a pair of inline
> 	functions, for now, requiring const_rtx and rtx.
> ---
>  gcc/rtl.h | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/gcc/rtl.h b/gcc/rtl.h
> index 79cca1b..640616f 100644
> --- a/gcc/rtl.h
> +++ b/gcc/rtl.h
> @@ -1226,7 +1226,15 @@ inline rtx& SET_NEXT_INSN (rtx insn)
>  #define BLOCK_FOR_INSN(INSN) XBBDEF (INSN, 2)
>  
>  /* The body of an insn.  */
> -#define PATTERN(INSN)	XEXP (INSN, 3)
> +inline rtx PATTERN (const_rtx insn)
> +{
> +  return XEXP (insn, 3);
> +}
> +
> +inline rtx& PATTERN (rtx insn)
> +{
> +  return XEXP (insn, 3);
> +}

:(, that is going to make debugging harder.  Can you make sure they are
ignored by gdb?
skip file rtl.h
probably in gdbinit.in.  I guess we also want skip file gimple.h and
similarly for some other headers where we have just tiny inlines we really
don't want to step in through.

	Jakub

Re: [PATCH 195/236] Convert PATTERN from a macro to a pair of inline functions

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 1617 bytes --]

On Wed, 2014-08-06 at 20:03 +0200, Jakub Jelinek wrote:
> On Wed, Aug 06, 2014 at 01:22:54PM -0400, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (PATTERN): Convert this macro into a pair of inline
> > 	functions, for now, requiring const_rtx and rtx.
> > ---
> >  gcc/rtl.h | 10 +++++++++-
> >  1 file changed, 9 insertions(+), 1 deletion(-)
> > 
> > diff --git a/gcc/rtl.h b/gcc/rtl.h
> > index 79cca1b..640616f 100644
> > --- a/gcc/rtl.h
> > +++ b/gcc/rtl.h
> > @@ -1226,7 +1226,15 @@ inline rtx& SET_NEXT_INSN (rtx insn)
> >  #define BLOCK_FOR_INSN(INSN) XBBDEF (INSN, 2)
> >  
> >  /* The body of an insn.  */
> > -#define PATTERN(INSN)	XEXP (INSN, 3)
> > +inline rtx PATTERN (const_rtx insn)
> > +{
> > +  return XEXP (insn, 3);
> > +}
> > +
> > +inline rtx& PATTERN (rtx insn)
> > +{
> > +  return XEXP (insn, 3);
> > +}
> 
> :(, that is going to make debugging harder.  Can you make sure they are
> ignored by gdb?
> skip file rtl.h
> probably in gdbinit.in.  I guess we also want skip file gimple.h and
> similarly for some other headers where we have just tiny inlines we really
> don't want to step in through.

Aha - I wasn't aware of that gdb feature.  Thanks.

It can be done per-file, or per-function:
https://sourceware.org/gdb/current/onlinedocs/gdb/Skipping-Over-Functions-and-Files.html

I tested the following, doing it on all of rtl.h, and it seems to work
well (e.g. when iterating with NEXT_INSN down a chain of insns).

We can also do gimple.h (or a more fine-grained approach there? some of
the inline fns there are non-trivial iirc) - but I'd prefer to keep that
separate from this discussion.

[-- Attachment #2: add-skip-rtl.h.patch --]
[-- Type: text/x-patch, Size: 758 bytes --]

commit 0d12aa2b6e0533b7ac6183542338067b9ab71f66
Author: David Malcolm <dmalcolm@redhat.com>
Date:   Wed Aug 6 15:58:20 2014 -0400

    gdbinit.in: Skip all inline functions in rtl.h when stepping
    
    See https://sourceware.org/gdb/current/onlinedocs/gdb/Skipping-Over-Functions-and-Files.html
    
    gcc/
    	* gdbinit.in: Skip all inline functions in rtl.h when stepping.

diff --git a/gcc/gdbinit.in b/gcc/gdbinit.in
index 25c530a..472c316 100644
--- a/gcc/gdbinit.in
+++ b/gcc/gdbinit.in
@@ -235,3 +235,6 @@ set check type off
 # Note that this is added at the end because older gdb versions
 # do not understand the 'skip' command.
 skip file tree.h
+
+# Likewise, skip all inline functions in rtl.h.
+skip file rtl.h
\ No newline at end of file

[PATCH 214/236] rtl_data.x_stack_slot_list becomes an rtx_expr_list

[David Malcolm]

gcc/
	* function.h (struct rtl_data): Strengthen field
	"x_stack_slot_list" from rtx to rtx_expr_list *.

	* emit-rtl.c (unshare_all_rtl_1): Add a checked cast
	when assigning to stack_slot_list.
---
 gcc/emit-rtl.c | 3 ++-
 gcc/function.h | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 5d946b8..5a2d549 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -2550,7 +2550,8 @@ unshare_all_rtl_1 (rtx_insn *insn)
      This special care is necessary when the stack slot MEM does not
      actually appear in the insn chain.  If it does appear, its address
      is unshared from all else at that point.  */
-  stack_slot_list = copy_rtx_if_shared (stack_slot_list);
+  stack_slot_list = as_a_nullable <rtx_expr_list *> (
+		      copy_rtx_if_shared (stack_slot_list));
 }
 
 /* Go through all the RTL insn bodies and copy any invalid shared
diff --git a/gcc/function.h b/gcc/function.h
index a176e0a..1f8da7a 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -280,7 +280,7 @@ struct GTY(()) rtl_data {
 
   /* List (chain of EXPR_LISTs) of all stack slots in this function.
      Made for the sake of unshare_all_rtl.  */
-  rtx x_stack_slot_list;
+  rtx_expr_list *x_stack_slot_list;
 
   /* List of empty areas in the stack frame.  */
   struct frame_space *frame_space_list;
-- 
1.8.5.3

[PATCH 234/236] Strengthen params to active_insn_between

[David Malcolm]

gcc/
	* shrink-wrap.h (active_insn_between): Strengthen both params from
	rtx to rtx_insn *.
	* function.c (active_insn_between): Likewise.
---
 gcc/function.c    | 3 +--
 gcc/shrink-wrap.h | 2 +-
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/gcc/function.c b/gcc/function.c
index 782d5be..9eee7668 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -5396,9 +5396,8 @@ set_return_jump_label (rtx returnjump)
 #if defined (HAVE_return) || defined (HAVE_simple_return)
 /* Return true if there are any active insns between HEAD and TAIL.  */
 bool
-active_insn_between (rtx head, rtx uncast_tail)
+active_insn_between (rtx_insn *head, rtx_insn *tail)
 {
-  rtx_insn *tail = as_a_nullable <rtx_insn *> (uncast_tail);
   while (tail)
     {
       if (active_insn_p (tail))
diff --git a/gcc/shrink-wrap.h b/gcc/shrink-wrap.h
index 647c076..29bdcfd 100644
--- a/gcc/shrink-wrap.h
+++ b/gcc/shrink-wrap.h
@@ -27,7 +27,7 @@ along with GCC; see the file COPYING3.  If not see
 #ifdef HAVE_simple_return
 /* In function.c.  */
 extern void emit_return_into_block (bool simple_p, basic_block bb);
-extern bool active_insn_between (rtx head, rtx tail);
+extern bool active_insn_between (rtx_insn *head, rtx_insn *tail);
 extern vec<edge> convert_jumps_to_returns (basic_block last_bb, bool simple_p,
 					   vec<edge> unconverted);
 extern basic_block emit_return_for_exit (edge exit_fallthru_edge,
-- 
1.8.5.3

[PATCH 211/236] Introduce rtx_expr_list subclass of rtx_def

[David Malcolm]

gcc/
	* coretypes.h (class rtx_expr_list): Add forward declaration.
	* emit-rtl.c (gen_rtx_EXPR_LIST): New.
	* gengenrtl.c (special_rtx): Add EXPR_LIST.
	* rtl.h (class rtx_expr_list): New subclass of rtx_def, adding
	invariant: GET_CODE (X) == EXPR_LIST.
	(is_a_helper <rtx_expr_list *>::test): New.
	(rtx_expr_list::next): New.
	(rtx_expr_list::element): New.
	(gen_rtx_EXPR_LIST): New.
---
 gcc/coretypes.h |  1 +
 gcc/emit-rtl.c  |  7 +++++++
 gcc/gengenrtl.c |  3 ++-
 gcc/rtl.h       | 36 ++++++++++++++++++++++++++++++++++++
 4 files changed, 46 insertions(+), 1 deletion(-)

diff --git a/gcc/coretypes.h b/gcc/coretypes.h
index 02cac5a..5ba83b1 100644
--- a/gcc/coretypes.h
+++ b/gcc/coretypes.h
@@ -60,6 +60,7 @@ typedef const struct rtx_def *const_rtx;
    hierarchy, along with the relevant invariant.
    Where possible, keep this list in the same order as in rtl.def.  */
 class rtx_def;
+  class rtx_expr_list;           /* GET_CODE (X) == EXPR_LIST */
   class rtx_insn_list;           /* GET_CODE (X) == INSN_LIST */
   class rtx_sequence;            /* GET_CODE (X) == SEQUENCE */
   class rtx_insn;
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index fef4faa..5d946b8 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -404,6 +404,13 @@ gen_raw_REG (enum machine_mode mode, int regno)
    functions do the raw handling.  If you add to this list, modify
    special_rtx in gengenrtl.c as well.  */
 
+rtx_expr_list *
+gen_rtx_EXPR_LIST (enum machine_mode mode, rtx expr, rtx expr_list)
+{
+  return as_a <rtx_expr_list *> (gen_rtx_fmt_ee (EXPR_LIST, mode, expr,
+						 expr_list));
+}
+
 rtx_insn_list *
 gen_rtx_INSN_LIST (enum machine_mode mode, rtx insn, rtx insn_list)
 {
diff --git a/gcc/gengenrtl.c b/gcc/gengenrtl.c
index cd29341..885dd20 100644
--- a/gcc/gengenrtl.c
+++ b/gcc/gengenrtl.c
@@ -123,7 +123,8 @@ special_format (const char *fmt)
 static int
 special_rtx (int idx)
 {
-  return (strcmp (defs[idx].enumname, "INSN_LIST") == 0
+  return (strcmp (defs[idx].enumname, "EXPR_LIST") == 0
+	  || strcmp (defs[idx].enumname, "INSN_LIST") == 0
 	  || strcmp (defs[idx].enumname, "CONST_INT") == 0
 	  || strcmp (defs[idx].enumname, "REG") == 0
 	  || strcmp (defs[idx].enumname, "SUBREG") == 0
diff --git a/gcc/rtl.h b/gcc/rtl.h
index ed736cc..6fe89ec 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -402,6 +402,28 @@ struct GTY((desc("0"), tag("0"),
   } GTY ((special ("rtx_def"), desc ("GET_CODE (&%0)"))) u;
 };
 
+/* A node for constructing singly-linked lists of rtx.  */
+
+class GTY(()) rtx_expr_list : public rtx_def
+{
+  /* No extra fields, but adds invariant: (GET_CODE (X) == EXPR_LIST).  */
+
+public:
+  /* Get next in list.  */
+  rtx_expr_list *next () const;
+
+  /* Get at the underlying rtx.  */
+  rtx element () const;
+};
+
+template <>
+template <>
+inline bool
+is_a_helper <rtx_expr_list *>::test (rtx rt)
+{
+  return rt->code == EXPR_LIST;
+}
+
 class GTY(()) rtx_insn_list : public rtx_def
 {
   /* No extra fields, but adds invariant: (GET_CODE (X) == INSN_LIST).
@@ -1252,6 +1274,19 @@ extern void rtl_check_failed_flag (const char *, const_rtx, const char *,
 #define XC2EXP(RTX, N, C1, C2)      (RTL_CHECKC2 (RTX, N, C1, C2).rt_rtx)
 \f
 
+/* Methods of rtx_expr_list.  */
+
+inline rtx_expr_list *rtx_expr_list::next () const
+{
+  rtx tmp = XEXP (this, 1);
+  return as_a_nullable <rtx_expr_list *> (tmp);
+}
+
+inline rtx rtx_expr_list::element () const
+{
+  return XEXP (this, 0);
+}
+
 /* Methods of rtx_insn_list.  */
 
 inline rtx_insn_list *rtx_insn_list::next () const
@@ -3021,6 +3056,7 @@ get_mem_attrs (const_rtx x)
    generation functions included above do the raw handling.  If you
    add to this list, modify special_rtx in gengenrtl.c as well.  */
 
+extern rtx_expr_list *gen_rtx_EXPR_LIST (enum machine_mode, rtx, rtx);
 extern rtx_insn_list *gen_rtx_INSN_LIST (enum machine_mode, rtx, rtx);
 extern rtx gen_rtx_CONST_INT (enum machine_mode, HOST_WIDE_INT);
 extern rtx gen_rtx_CONST_VECTOR (enum machine_mode, rtvec);
-- 
1.8.5.3

[PATCH 044/236] Pass "insn" as an rtx_insn within generated get_attr_ fns in insn-attrtab.c

[David Malcolm]

Strengthen "insn" from rtx to rtx_insn * within the generated get_attr_
functions in insn-attrtab.c, without imposing a strengthening from rtx
to rtx_insn * on the param itself and thus the callers.

gcc/
	* genattrtab.c (write_attr_get): Within the generated get_attr_
	functions, rename param "insn" to "uncast_insn" and reintroduce
	"insn" as an local rtx_insn * using a checked cast, so that "insn"
	is an rtx_insn * within insn-attrtab.c
---
 gcc/genattrtab.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/gcc/genattrtab.c b/gcc/genattrtab.c
index c5ce51c..68d05d07 100644
--- a/gcc/genattrtab.c
+++ b/gcc/genattrtab.c
@@ -4027,9 +4027,9 @@ write_attr_get (FILE *outf, struct attr_desc *attr)
   /* If the attribute name starts with a star, the remainder is the name of
      the subroutine to use, instead of `get_attr_...'.  */
   if (attr->name[0] == '*')
-    fprintf (outf, "%s (rtx insn ATTRIBUTE_UNUSED)\n", &attr->name[1]);
+    fprintf (outf, "%s (rtx uncast_insn ATTRIBUTE_UNUSED)\n", &attr->name[1]);
   else if (attr->is_const == 0)
-    fprintf (outf, "get_attr_%s (rtx insn ATTRIBUTE_UNUSED)\n", attr->name);
+    fprintf (outf, "get_attr_%s (rtx uncast_insn ATTRIBUTE_UNUSED)\n", attr->name);
   else
     {
       fprintf (outf, "get_attr_%s (void)\n", attr->name);
@@ -4050,6 +4050,9 @@ write_attr_get (FILE *outf, struct attr_desc *attr)
 
   fprintf (outf, "{\n");
 
+  if (attr->name[0] == '*' || attr->is_const == 0)
+    fprintf (outf, "  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);\n");
+
   /* Find attributes that are worth caching in the conditions.  */
   cached_attr_count = 0;
   attrs_seen_more_than_once = 0;
-- 
1.8.5.3

Re: [PATCH 044/236] Pass "insn" as an rtx_insn within generated get_attr_ fns in insn-attrtab.c

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> Strengthen "insn" from rtx to rtx_insn * within the generated get_attr_
> functions in insn-attrtab.c, without imposing a strengthening from rtx
> to rtx_insn * on the param itself and thus the callers.
>
> gcc/
> 	* genattrtab.c (write_attr_get): Within the generated get_attr_
> 	functions, rename param "insn" to "uncast_insn" and reintroduce
> 	"insn" as an local rtx_insn * using a checked cast, so that "insn"
> 	is an rtx_insn * within insn-attrtab.c
OK.
Jeff

Re: [PATCH 044/236] Pass "insn" as an rtx_insn within generated get_attr_ fns in insn-attrtab.c

[David Malcolm]

On Wed, 2014-08-13 at 12:07 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > Strengthen "insn" from rtx to rtx_insn * within the generated get_attr_
> > functions in insn-attrtab.c, without imposing a strengthening from rtx
> > to rtx_insn * on the param itself and thus the callers.
> >
> > gcc/
> > 	* genattrtab.c (write_attr_get): Within the generated get_attr_
> > 	functions, rename param "insn" to "uncast_insn" and reintroduce
> > 	"insn" as an local rtx_insn * using a checked cast, so that "insn"
> > 	is an rtx_insn * within insn-attrtab.c
> OK.
Thanks; committed to trunk as r214265.

[PATCH 088/236] loop-invariant.c: Use rtx_insn in various places

[David Malcolm]

gcc/
	* loop-invariant.c (struct use): Strengthen field "insn" from rtx
	to rtx_insn *.
	(struct invariant): Likewise.
	(hash_invariant_expr_1): Likewise for param "insn".
	(invariant_expr_equal_p): Likewise for param "insn1", "insn2".
	(find_exits): Likewise for local "insn".
	(create_new_invariant): Likewise for param "insn".
	(check_dependencies): Likewise.
	(find_invariant_insn): Likewise.
	(record_uses): Likewise.
	(find_invariants_insn): Likewise.
	(find_invariants_bb): Likewise for local "insn".
	(get_pressure_class_and_nregs): Likewise for param "insn".
	(calculate_loop_reg_pressure): Likewise for local "insn".
---
 gcc/loop-invariant.c | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c
index 100a2c1..5592cd4 100644
--- a/gcc/loop-invariant.c
+++ b/gcc/loop-invariant.c
@@ -78,7 +78,7 @@ struct loop_data
 struct use
 {
   rtx *pos;			/* Position of the use.  */
-  rtx insn;			/* The insn in that the use occurs.  */
+  rtx_insn *insn;		/* The insn in that the use occurs.  */
   unsigned addr_use_p;		/* Whether the use occurs in an address.  */
   struct use *next;		/* Next use in the list.  */
 };
@@ -116,7 +116,7 @@ struct invariant
   struct def *def;
 
   /* The insn in that it is defined.  */
-  rtx insn;
+  rtx_insn *insn;
 
   /* Whether it is always executed.  */
   bool always_executed;
@@ -286,7 +286,7 @@ invariant_for_use (df_ref use)
 /* Computes hash value for invariant expression X in INSN.  */
 
 static hashval_t
-hash_invariant_expr_1 (rtx insn, rtx x)
+hash_invariant_expr_1 (rtx_insn *insn, rtx x)
 {
   enum rtx_code code = GET_CODE (x);
   int i, j;
@@ -340,7 +340,7 @@ hash_invariant_expr_1 (rtx insn, rtx x)
    and INSN2 have always the same value.  */
 
 static bool
-invariant_expr_equal_p (rtx insn1, rtx e1, rtx insn2, rtx e2)
+invariant_expr_equal_p (rtx_insn *insn1, rtx e1, rtx_insn *insn2, rtx e2)
 {
   enum rtx_code code = GET_CODE (e1);
   int i, j;
@@ -572,7 +572,7 @@ find_exits (struct loop *loop, basic_block *body,
   edge e;
   struct loop *outermost_exit = loop, *aexit;
   bool has_call = false;
-  rtx insn;
+  rtx_insn *insn;
 
   for (i = 0; i < loop->num_nodes; i++)
     {
@@ -683,7 +683,7 @@ find_defs (struct loop *loop)
    is returned.  */
 
 static struct invariant *
-create_new_invariant (struct def *def, rtx insn, bitmap depends_on,
+create_new_invariant (struct def *def, rtx_insn *insn, bitmap depends_on,
 		      bool always_executed)
 {
   struct invariant *inv = XNEW (struct invariant);
@@ -823,7 +823,7 @@ check_dependency (basic_block bb, df_ref use, bitmap depends_on)
    loop invariants, false otherwise.  */
 
 static bool
-check_dependencies (rtx insn, bitmap depends_on)
+check_dependencies (rtx_insn *insn, bitmap depends_on)
 {
   struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
   df_ref *use_rec;
@@ -844,7 +844,7 @@ check_dependencies (rtx insn, bitmap depends_on)
    unless the program ends due to a function call.  */
 
 static void
-find_invariant_insn (rtx insn, bool always_reached, bool always_executed)
+find_invariant_insn (rtx_insn *insn, bool always_reached, bool always_executed)
 {
   df_ref ref;
   struct def *def;
@@ -906,7 +906,7 @@ find_invariant_insn (rtx insn, bool always_reached, bool always_executed)
 /* Record registers used in INSN that have a unique invariant definition.  */
 
 static void
-record_uses (rtx insn)
+record_uses (rtx_insn *insn)
 {
   struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
   df_ref *use_rec;
@@ -933,7 +933,7 @@ record_uses (rtx insn)
    unless the program ends due to a function call.  */
 
 static void
-find_invariants_insn (rtx insn, bool always_reached, bool always_executed)
+find_invariants_insn (rtx_insn *insn, bool always_reached, bool always_executed)
 {
   find_invariant_insn (insn, always_reached, always_executed);
   record_uses (insn);
@@ -947,7 +947,7 @@ find_invariants_insn (rtx insn, bool always_reached, bool always_executed)
 static void
 find_invariants_bb (basic_block bb, bool always_reached, bool always_executed)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   FOR_BB_INSNS (bb, insn)
     {
@@ -1024,7 +1024,7 @@ free_use_list (struct use *use)
 /* Return pressure class and number of hard registers (through *NREGS)
    for destination of INSN. */
 static enum reg_class
-get_pressure_class_and_nregs (rtx insn, int *nregs)
+get_pressure_class_and_nregs (rtx_insn *insn, int *nregs)
 {
   rtx reg;
   enum reg_class pressure_class;
@@ -1804,7 +1804,8 @@ calculate_loop_reg_pressure (void)
   unsigned int j;
   bitmap_iterator bi;
   basic_block bb;
-  rtx insn, link;
+  rtx_insn *insn;
+  rtx link;
   struct loop *loop, *parent;
 
   FOR_EACH_LOOP (loop, 0)
-- 
1.8.5.3

[PATCH 029/236] rtl_data.x_parm_birth_insn is an insn

[David Malcolm]

gcc/
	* function.h (struct rtl_data): Strengthen field
	"x_parm_birth_insn" from rtx to rtx_insn *.
	* function.c (struct assign_parm_data_all): Strengthen fields
	"first_conversion_insn" and "last_conversion_insn" from rtx to
	rtx_insn *.
---
 gcc/function.c | 4 ++--
 gcc/function.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/function.c b/gcc/function.c
index ec2ea26..4d8d32d 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -2181,8 +2181,8 @@ struct assign_parm_data_all
   struct args_size stack_args_size;
   tree function_result_decl;
   tree orig_fnargs;
-  rtx first_conversion_insn;
-  rtx last_conversion_insn;
+  rtx_insn *first_conversion_insn;
+  rtx_insn *last_conversion_insn;
   HOST_WIDE_INT pretend_args_size;
   HOST_WIDE_INT extra_pretend_bytes;
   int reg_parm_stack_space;
diff --git a/gcc/function.h b/gcc/function.h
index a8294b2..0367225 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -303,7 +303,7 @@ struct GTY(()) rtl_data {
   HOST_WIDE_INT x_frame_offset;
 
   /* Insn after which register parms and SAVE_EXPRs are born, if nonopt.  */
-  rtx x_parm_birth_insn;
+  rtx_insn *x_parm_birth_insn;
 
   /* List of all used temporaries allocated, by level.  */
   vec<temp_slot_p, va_gc> *x_used_temp_slots;
-- 
1.8.5.3

Re: [PATCH 029/236] rtl_data.x_parm_birth_insn is an insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* function.h (struct rtl_data): Strengthen field
> 	"x_parm_birth_insn" from rtx to rtx_insn *.
> 	* function.c (struct assign_parm_data_all): Strengthen fields
> 	"first_conversion_insn" and "last_conversion_insn" from rtx to
> 	rtx_insn *.
OK.  I think at this point any patch which merely changes the type of 
some variable or in a signature from rtx to rtx_insn (or any of the 
concrete passes) is considered trivial enough to go forward without 
explicit review.

That applies to patches in this series, additions you may need to make 
due to changes in the tree since you last rebased and further 
strengthening you or anyone else may want to tackle.



jeff

Re: [PATCH 029/236] rtl_data.x_parm_birth_insn is an insn

[David Malcolm]

On Wed, 2014-08-13 at 07:44 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* function.h (struct rtl_data): Strengthen field
> > 	"x_parm_birth_insn" from rtx to rtx_insn *.
> > 	* function.c (struct assign_parm_data_all): Strengthen fields
> > 	"first_conversion_insn" and "last_conversion_insn" from rtx to
> > 	rtx_insn *.
> OK.  I think at this point any patch which merely changes the type of 
> some variable or in a signature from rtx to rtx_insn (or any of the 
> concrete passes) is considered trivial enough to go forward without 
           ^^^^^^
Presumably you meant "subclasses" here, right?

> explicit review.
> 
> That applies to patches in this series, additions you may need to make 
> due to changes in the tree since you last rebased and further 
> strengthening you or anyone else may want to tackle.

Heh - indeed, patch #30 needs a trivial fixup of the return type of the
helper function
  emit_note_eh_region_end
that was added in r212171, from rtx to rtx_note *.

[yes, I'm working on rebasing it all against today's trunk right now]

Thanks
Dave

Re: [PATCH 029/236] rtl_data.x_parm_birth_insn is an insn

[Jeff Law]

On 08/13/14 11:08, David Malcolm wrote:
> On Wed, 2014-08-13 at 07:44 -0600, Jeff Law wrote:
>> On 08/06/14 11:20, David Malcolm wrote:
>>> gcc/
>>> 	* function.h (struct rtl_data): Strengthen field
>>> 	"x_parm_birth_insn" from rtx to rtx_insn *.
>>> 	* function.c (struct assign_parm_data_all): Strengthen fields
>>> 	"first_conversion_insn" and "last_conversion_insn" from rtx to
>>> 	rtx_insn *.
>> OK.  I think at this point any patch which merely changes the type of
>> some variable or in a signature from rtx to rtx_insn (or any of the
>> concrete passes) is considered trivial enough to go forward without
>             ^^^^^^
> Presumably you meant "subclasses" here, right?
yes.

>
>> explicit review.
>>
>> That applies to patches in this series, additions you may need to make
>> due to changes in the tree since you last rebased and further
>> strengthening you or anyone else may want to tackle.
>
> Heh - indeed, patch #30 needs a trivial fixup of the return type of the
> helper function
>    emit_note_eh_region_end
> that was added in r212171, from rtx to rtx_note *.
>
> [yes, I'm working on rebasing it all against today's trunk right now]
:-)
Jeff

[COMMITTED] Update rs6000.c's pass_analyze_swaps to use rtx_insn [was Re: [PATCH 029/236] rtl_data.x_parm_birth_insn is an insn]

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 1903 bytes --]

On Wed, 2014-08-13 at 11:13 -0600, Jeff Law wrote:
> On 08/13/14 11:08, David Malcolm wrote:
> > On Wed, 2014-08-13 at 07:44 -0600, Jeff Law wrote:
> >> On 08/06/14 11:20, David Malcolm wrote:
> >>> gcc/
> >>> 	* function.h (struct rtl_data): Strengthen field
> >>> 	"x_parm_birth_insn" from rtx to rtx_insn *.
> >>> 	* function.c (struct assign_parm_data_all): Strengthen fields
> >>> 	"first_conversion_insn" and "last_conversion_insn" from rtx to
> >>> 	rtx_insn *.
> >> OK.  I think at this point any patch which merely changes the type of
> >> some variable or in a signature from rtx to rtx_insn (or any of the
> >> concrete passes) is considered trivial enough to go forward without
> >             ^^^^^^
> > Presumably you meant "subclasses" here, right?
> yes.
> 
> >
> >> explicit review.
> >>
> >> That applies to patches in this series, additions you may need to make
> >> due to changes in the tree since you last rebased and further
> >> strengthening you or anyone else may want to tackle.

[...snip...]

Based on the above pre-approval, I went ahead and committed the
following patch to trunk as r214489 (bootstrapped on
powerpc64-unknown-linux-gnu: Fedora 20, gcc110, in fact)

Commit r214254 (aka 1b66c2db6a7d0a64fa2c33f083483d16fd864172) added a
new pass_analyze_swaps to rs6000 (aka ppc).

The following trivial patch updates it to use rtx_insn, needed before
the params to df_insn_rescan and df_insn_delete can be tightened up from
rtx to rtx_insn * in patch #191 (fwiw, trunk is currently at #171, i.e.
early in phase 4).

gcc/
	* config/rs6000/rs6000.c (class swap_web_entry): Strengthen field
	"insn" from rtx to rtx_insn *.
	(permute_load): Likewise for param "insn".
	(permute_store): Likewise.
	(handle_special_swappables): Likewise for local "insn".
	(replace_swap_with_copy): Likewise for locals "insn" and
	"new_insn".
	(rs6000_analyze_swaps): Likewise for local "insn".


[-- Attachment #2: r214489.patch --]
[-- Type: text/x-patch, Size: 2589 bytes --]

Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214488)
+++ gcc/ChangeLog	(revision 214489)
@@ -1,3 +1,14 @@
+2014-08-26  David Malcolm  <dmalcolm@redhat.com>
+
+	* config/rs6000/rs6000.c (class swap_web_entry): Strengthen field
+	"insn" from rtx to rtx_insn *.
+	(permute_load): Likewise for param "insn".
+	(permute_store): Likewise.
+	(handle_special_swappables): Likewise for local "insn".
+	(replace_swap_with_copy): Likewise for locals "insn" and
+	"new_insn".
+	(rs6000_analyze_swaps): Likewise for local "insn".
+
 2014-08-25  David Malcolm  <dmalcolm@redhat.com>
 
 	* regrename.h (struct du_chain): Strengthen field "insn" from rtx
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	(revision 214488)
+++ gcc/config/rs6000/rs6000.c	(revision 214489)
@@ -33496,7 +33496,7 @@
 {
  public:
   /* Pointer to the insn.  */
-  rtx insn;
+  rtx_insn *insn;
   /* Set if insn contains a mention of a vector register.  All other
      fields are undefined if this field is unset.  */
   unsigned int is_relevant : 1;
@@ -34040,7 +34040,7 @@
 
 /* Convert the non-permuting load INSN to a permuting one.  */
 static void
-permute_load (rtx insn)
+permute_load (rtx_insn *insn)
 {
   rtx body = PATTERN (insn);
   rtx mem_op = SET_SRC (body);
@@ -34066,7 +34066,7 @@
 
 /* Convert the non-permuting store INSN to a permuting one.  */
 static void
-permute_store (rtx insn)
+permute_store (rtx_insn *insn)
 {
   rtx body = PATTERN (insn);
   rtx src_reg = SET_SRC (body);
@@ -34094,7 +34094,7 @@
 static void
 handle_special_swappables (swap_web_entry *insn_entry, unsigned i)
 {
-  rtx insn = insn_entry[i].insn;
+  rtx_insn *insn = insn_entry[i].insn;
   rtx body = PATTERN (insn);
 
   switch (insn_entry[i].special_handling)
@@ -34133,11 +34133,11 @@
 static void
 replace_swap_with_copy (swap_web_entry *insn_entry, unsigned i)
 {
-  rtx insn = insn_entry[i].insn;
+  rtx_insn *insn = insn_entry[i].insn;
   rtx body = PATTERN (insn);
   rtx src_reg = XEXP (SET_SRC (body), 0);
   rtx copy = gen_rtx_SET (VOIDmode, SET_DEST (body), src_reg);
-  rtx new_insn = emit_insn_before (copy, insn);
+  rtx_insn *new_insn = emit_insn_before (copy, insn);
   set_block_for_insn (new_insn, BLOCK_FOR_INSN (insn));
   df_insn_rescan (new_insn);
 
@@ -34209,7 +34209,7 @@
 {
   swap_web_entry *insn_entry;
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
 
   /* Dataflow analysis for use-def chains.  */
   df_set_flags (DF_RD_PRUNE_DEAD_DEFS);

Re: [PATCH 029/236] rtl_data.x_parm_birth_insn is an insn

[David Malcolm]

On Wed, 2014-08-13 at 07:44 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* function.h (struct rtl_data): Strengthen field
> > 	"x_parm_birth_insn" from rtx to rtx_insn *.
> > 	* function.c (struct assign_parm_data_all): Strengthen fields
> > 	"first_conversion_insn" and "last_conversion_insn" from rtx to
> > 	rtx_insn *.
> OK.  I think at this point any patch which merely changes the type of 
> some variable or in a signature from rtx to rtx_insn (or any of the 
> concrete passes) is considered trivial enough to go forward without 
> explicit review.
> 
> That applies to patches in this series, additions you may need to make 
> due to changes in the tree since you last rebased and further 
> strengthening you or anyone else may want to tackle.

Thanks.  Committed to trunk as r214191.

[PATCH 023/236] delete_trivially_dead_insns works on insns

[David Malcolm]

gcc/
	* rtl.h (delete_trivially_dead_insns): Strengthen initial param
	"insns" from rtx to rtx_insn *.
	* cse.c (delete_trivially_dead_insns): Likewise, also do it for
	locals "insn" and "prev".
---
 gcc/cse.c | 4 ++--
 gcc/rtl.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/cse.c b/gcc/cse.c
index 3ca8e17..6473c3e 100644
--- a/gcc/cse.c
+++ b/gcc/cse.c
@@ -6940,10 +6940,10 @@ replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data)
    remaining passes of the compilation are also sped up.  */
 
 int
-delete_trivially_dead_insns (rtx insns, int nreg)
+delete_trivially_dead_insns (rtx_insn *insns, int nreg)
 {
   int *counts;
-  rtx insn, prev;
+  rtx_insn *insn, *prev;
   rtx *replacements = NULL;
   int ndead = 0;
 
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 739a550..e29cda3 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2992,7 +2992,7 @@ extern int cse_not_expected;
 extern int rtx_to_tree_code (enum rtx_code);
 
 /* In cse.c */
-extern int delete_trivially_dead_insns (rtx, int);
+extern int delete_trivially_dead_insns (rtx_insn *, int);
 extern int exp_equiv_p (const_rtx, const_rtx, int, bool);
 extern unsigned hash_rtx (const_rtx x, enum machine_mode, int *, int *, bool);
 
-- 
1.8.5.3

Re: [PATCH 023/236] delete_trivially_dead_insns works on insns

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* rtl.h (delete_trivially_dead_insns): Strengthen initial param
> 	"insns" from rtx to rtx_insn *.
> 	* cse.c (delete_trivially_dead_insns): Likewise, also do it for
> 	locals "insn" and "prev".
OK.
Jeff

Re: [PATCH 023/236] delete_trivially_dead_insns works on insns

[David Malcolm]

On Tue, 2014-08-12 at 21:51 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (delete_trivially_dead_insns): Strengthen initial param
> > 	"insns" from rtx to rtx_insn *.
> > 	* cse.c (delete_trivially_dead_insns): Likewise, also do it for
> > 	locals "insn" and "prev".
> OK.

Thanks; committed to trunk as r214185.

[PATCH 221/236] Add insn method to rtx_expr_list

[David Malcolm]

gcc/
	* rtl.h (rtx_expr_list::insn): New method.
---
 gcc/rtl.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/gcc/rtl.h b/gcc/rtl.h
index d028be1..d5811c2 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -414,6 +414,10 @@ public:
 
   /* Get at the underlying rtx.  */
   rtx element () const;
+
+  /* Get at the rtx, casting to rtx_insn *.  */
+  rtx_insn *insn () const;
+
 };
 
 template <>
@@ -1287,6 +1291,11 @@ inline rtx rtx_expr_list::element () const
   return XEXP (this, 0);
 }
 
+inline rtx_insn *rtx_expr_list::insn () const
+{
+  return as_a <rtx_insn *> (XEXP (this, 0));
+}
+
 /* Methods of rtx_insn_list.  */
 
 inline rtx_insn_list *rtx_insn_list::next () const
-- 
1.8.5.3

Re: [PATCH 221/236] Add insn method to rtx_expr_list

[Richard Henderson]

On 08/06/2014 10:23 AM, David Malcolm wrote:
> gcc/
> 	* rtl.h (rtx_expr_list::insn): New method.
> ---
>  gcc/rtl.h | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/gcc/rtl.h b/gcc/rtl.h
> index d028be1..d5811c2 100644
> --- a/gcc/rtl.h
> +++ b/gcc/rtl.h
> @@ -414,6 +414,10 @@ public:
>  
>    /* Get at the underlying rtx.  */
>    rtx element () const;
> +
> +  /* Get at the rtx, casting to rtx_insn *.  */
> +  rtx_insn *insn () const;
> +
>  };
>  
>  template <>
> @@ -1287,6 +1291,11 @@ inline rtx rtx_expr_list::element () const
>    return XEXP (this, 0);
>  }
>  
> +inline rtx_insn *rtx_expr_list::insn () const
> +{
> +  return as_a <rtx_insn *> (XEXP (this, 0));
> +}
> +

Even with the current code base we aren't *supposed* to be putting insns into
an EXPR_LIST -- that's what INSN_LIST is for.  Note the horribleness with which
anything doing this will have in the rtl dumps.

Can we please fix these uses instead of adding this accessor?


r~

Re: [PATCH 221/236] Add insn method to rtx_expr_list

[Jeff Law]

On 08/19/14 14:41, Richard Henderson wrote:
> On 08/06/2014 10:23 AM, David Malcolm wrote:
>> gcc/
>> 	* rtl.h (rtx_expr_list::insn): New method.
>> ---
>>   gcc/rtl.h | 9 +++++++++
>>   1 file changed, 9 insertions(+)
>>
>> diff --git a/gcc/rtl.h b/gcc/rtl.h
>> index d028be1..d5811c2 100644
>> --- a/gcc/rtl.h
>> +++ b/gcc/rtl.h
>> @@ -414,6 +414,10 @@ public:
>>
>>     /* Get at the underlying rtx.  */
>>     rtx element () const;
>> +
>> +  /* Get at the rtx, casting to rtx_insn *.  */
>> +  rtx_insn *insn () const;
>> +
>>   };
>>
>>   template <>
>> @@ -1287,6 +1291,11 @@ inline rtx rtx_expr_list::element () const
>>     return XEXP (this, 0);
>>   }
>>
>> +inline rtx_insn *rtx_expr_list::insn () const
>> +{
>> +  return as_a <rtx_insn *> (XEXP (this, 0));
>> +}
>> +
>
> Even with the current code base we aren't *supposed* to be putting insns into
> an EXPR_LIST -- that's what INSN_LIST is for.  Note the horribleness with which
> anything doing this will have in the rtl dumps.
>
> Can we please fix these uses instead of adding this accessor?
I'd be OK with that as a follow-up.

jeff

[PATCH 0/3] Updated patches to eliminate need for rtx_expr_list::insn (was Re: [PATCH 221/236] Add insn method to rtx_expr_list)

[David Malcolm]

On Mon, 2014-08-25 at 08:22 -0600, Jeff Law wrote:
On 08/19/14 14:41, Richard Henderson wrote:
> > On 08/06/2014 10:23 AM, David Malcolm wrote:
> >> gcc/
> >>      * rtl.h (rtx_expr_list::insn): New method.
> >> ---
> >>   gcc/rtl.h | 9 +++++++++
> >>   1 file changed, 9 insertions(+)
> >>
> >> diff --git a/gcc/rtl.h b/gcc/rtl.h
> >> index d028be1..d5811c2 100644
> >> --- a/gcc/rtl.h
> >> +++ b/gcc/rtl.h
> >> @@ -414,6 +414,10 @@ public:
> >>
> >>     /* Get at the underlying rtx.  */
> >>     rtx element () const;
> >> +
> >> +  /* Get at the rtx, casting to rtx_insn *.  */
> >> +  rtx_insn *insn () const;
> >> +
> >>   };
> >>
> >>   template <>
> >> @@ -1287,6 +1291,11 @@ inline rtx rtx_expr_list::element () const
> >>     return XEXP (this, 0);
> >>   }
> >>
> >> +inline rtx_insn *rtx_expr_list::insn () const
> >> +{
> >> +  return as_a <rtx_insn *> (XEXP (this, 0));
> >> +}
> >> +
> >
> > Even with the current code base we aren't *supposed* to be putting insns into
> > an EXPR_LIST -- that's what INSN_LIST is for.  Note the horribleness with which
> > anything doing this will have in the rtl dumps.
> >
> > Can we please fix these uses instead of adding this accessor?
> I'd be OK with that as a follow-up.
> 
> jeff

It turned out there were two places in the tree where I was using the
unloved rtx_expr_list::insn method:
  * nonlocal_goto_handler_labels
  * forced_labels.

These are both currently EXPR_LIST, and both of them are set up by the
patch series leading up to #221 to be rtx_expr_list.  However, given that
they contain CODE_LABELs and are handled as insns, presumably they should
be INSN_LIST, rather than EXPR_LIST.

So I had a go at cleaning this up.

The first two patches take the place of patch #221, by converting them
from EXPR_LIST to INSN_LIST, updating the relevant vars from
rtx_expr_list * to rtx_insn_list *.

The third patch is a rewrite of patch #222, using the new types.

I've successfully bootstrapped each progressively on top of trunk+the
relevant patches of the patch series (trunk is currently at #171, so
thats #172-#220).

OK for trunk?

David Malcolm (3):
  Convert nonlocal_goto_handler_labels from an EXPR_LIST to an INSN_LIST
  Convert forced_labels from an EXPR_LIST to an INSN_LIST
  Use rtx_insn in more places in dwarf2cfi.c

 gcc/builtins.c  |  2 +-
 gcc/cfgbuild.c  |  8 ++++----
 gcc/cfgrtl.c    |  6 +++---
 gcc/dwarf2cfi.c | 33 +++++++++++++++++----------------
 gcc/except.c    |  2 +-
 gcc/function.h  |  6 +++---
 gcc/jump.c      |  6 +++---
 gcc/reload1.c   | 12 ++++++------
 gcc/rtl.h       |  1 +
 gcc/rtlanal.c   | 29 +++++++++++++++++++++++++++++
 gcc/stmt.c      | 10 +++++-----
 11 files changed, 73 insertions(+), 42 deletions(-)

-- 
1.8.5.3

[PATCH 3/3] Use rtx_insn in more places in dwarf2cfi.c

[David Malcolm]

gcc/
	* dwarf2cfi.c (dw_trace_info): Strengthen field "head" from rtx to
	rtx_insn *.
	(get_trace_info): Likewise for param "insn".
	(save_point_p): Likewise.
	(maybe_record_trace_start): Likewise for both params.
	(maybe_record_trace_start_abnormal): Likewise.
	(create_trace_edges): Likewise for sole param and for three of the
	locals named "lab".
	(scan_trace): Strengthen local "prev", "insn", "control" from rtx
	to rtx_insn *, and update a call to pat->element to pat->insn.
---
 gcc/dwarf2cfi.c | 25 +++++++++++++------------
 1 file changed, 13 insertions(+), 12 deletions(-)

diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index 8b00b1e..e3fb078 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -100,7 +100,7 @@ typedef struct GTY(()) reg_saved_in_data_struct {
 typedef struct
 {
   /* The insn that begins the trace.  */
-  rtx head;
+  rtx_insn *head;
 
   /* The row state at the beginning and end of the trace.  */
   dw_cfi_row *beg_row, *end_row;
@@ -303,7 +303,7 @@ expand_builtin_init_dwarf_reg_sizes (tree address)
 
 \f
 static dw_trace_info *
-get_trace_info (rtx insn)
+get_trace_info (rtx_insn *insn)
 {
   dw_trace_info dummy;
   dummy.head = insn;
@@ -311,7 +311,7 @@ get_trace_info (rtx insn)
 }
 
 static bool
-save_point_p (rtx insn)
+save_point_p (rtx_insn *insn)
 {
   /* Labels, except those that are really jump tables.  */
   if (LABEL_P (insn))
@@ -2197,7 +2197,7 @@ add_cfis_to_fde (void)
    trace from CUR_TRACE and CUR_ROW.  */
 
 static void
-maybe_record_trace_start (rtx start, rtx origin)
+maybe_record_trace_start (rtx_insn *start, rtx_insn *origin)
 {
   dw_trace_info *ti;
   HOST_WIDE_INT args_size;
@@ -2248,7 +2248,7 @@ maybe_record_trace_start (rtx start, rtx origin)
    and non-local goto edges.  */
 
 static void
-maybe_record_trace_start_abnormal (rtx start, rtx origin)
+maybe_record_trace_start_abnormal (rtx_insn *start, rtx_insn *origin)
 {
   HOST_WIDE_INT save_args_size, delta;
   dw_cfa_location save_cfa;
@@ -2284,7 +2284,7 @@ maybe_record_trace_start_abnormal (rtx start, rtx origin)
 /* ??? Sadly, this is in large part a duplicate of make_edges.  */
 
 static void
-create_trace_edges (rtx insn)
+create_trace_edges (rtx_insn *insn)
 {
   rtx tmp;
   int i, n;
@@ -2303,7 +2303,7 @@ create_trace_edges (rtx insn)
 	  n = GET_NUM_ELEM (vec);
 	  for (i = 0; i < n; ++i)
 	    {
-	      rtx lab = XEXP (RTVEC_ELT (vec, i), 0);
+	      rtx_insn *lab = as_a <rtx_insn *> (XEXP (RTVEC_ELT (vec, i), 0));
 	      maybe_record_trace_start (lab, insn);
 	    }
 	}
@@ -2319,13 +2319,14 @@ create_trace_edges (rtx insn)
 	  n = ASM_OPERANDS_LABEL_LENGTH (tmp);
 	  for (i = 0; i < n; ++i)
 	    {
-	      rtx lab = XEXP (ASM_OPERANDS_LABEL (tmp, i), 0);
+	      rtx_insn *lab =
+		as_a <rtx_insn *> (XEXP (ASM_OPERANDS_LABEL (tmp, i), 0));
 	      maybe_record_trace_start (lab, insn);
 	    }
 	}
       else
 	{
-	  rtx lab = JUMP_LABEL (insn);
+	  rtx_insn *lab = JUMP_LABEL_AS_INSN (insn);
 	  gcc_assert (lab != NULL);
 	  maybe_record_trace_start (lab, insn);
 	}
@@ -2376,7 +2377,7 @@ scan_insn_after (rtx insn)
 static void
 scan_trace (dw_trace_info *trace)
 {
-  rtx prev, insn = trace->head;
+  rtx_insn *prev, *insn = trace->head;
   dw_cfa_location this_cfa;
 
   if (dump_file)
@@ -2397,7 +2398,7 @@ scan_trace (dw_trace_info *trace)
        insn;
        prev = insn, insn = NEXT_INSN (insn))
     {
-      rtx control;
+      rtx_insn *control;
 
       /* Do everything that happens "before" the insn.  */
       add_cfi_insn = prev;
@@ -2427,7 +2428,7 @@ scan_trace (dw_trace_info *trace)
 	  rtx elt;
 	  int i, n = pat->len ();
 
-	  control = pat->element (0);
+	  control = pat->insn (0);
 	  if (can_throw_internal (control))
 	    notice_eh_throw (control);
 	  dwarf2out_flush_queued_reg_saves ();
-- 
1.8.5.3

[PATCH 2/3] Convert forced_labels from an EXPR_LIST to an INSN_LIST

[David Malcolm]

gcc/
	* function.h (struct expr_status): Convert field "x_forced_labels"
	from rtx_expr_list * to rtx_insn_list *.

	* cfgbuild.c (make_edges): Convert local "x" from an
	rtx_expr_list * to an rtx_insn_list *, replacing use of
	"element" method with "insn" method.
	* dwarf2cfi.c (create_trace_edges): Likewise for local "lab".
	* except.c (sjlj_emit_dispatch_table): Replace use of
	gen_rtx_EXPR_LIST with gen_rtx_INSN_LIST when prepending to
	forced_labels.
	* jump.c (rebuild_jump_labels_1): Convert local "insn" from an
	rtx_expr_list * to an rtx_insn_list *, replacing use of
	"element" method with "insn" method.
	* reload1.c (set_initial_label_offsets): Likewise for local "x".
	* stmt.c (label_rtx): Strengthen local "ref" from rtx to
	rtx_insn *, adding a checked cast.  Replace use of
	gen_rtx_EXPR_LIST with gen_rtx_INSN_LIST when prepending it to
	forced_labels.
	(expand_label): Likewise for local "label_r".
---
 gcc/cfgbuild.c  | 4 ++--
 gcc/dwarf2cfi.c | 4 ++--
 gcc/except.c    | 2 +-
 gcc/function.h  | 2 +-
 gcc/jump.c      | 6 +++---
 gcc/reload1.c   | 6 +++---
 gcc/stmt.c      | 8 ++++----
 7 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index d7fa97a..475739d 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -284,8 +284,8 @@ make_edges (basic_block min, basic_block max, int update_p)
 	     everything on the forced_labels list.  */
 	  else if (computed_jump_p (insn))
 	    {
-	      for (rtx_expr_list *x = forced_labels; x; x = x->next ())
-		make_label_edge (edge_cache, bb, x->element (), EDGE_ABNORMAL);
+	      for (rtx_insn_list *x = forced_labels; x; x = x->next ())
+		make_label_edge (edge_cache, bb, x->insn (), EDGE_ABNORMAL);
 	    }
 
 	  /* Returns create an exit out.  */
diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index 7c495e4..8b00b1e 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -2309,8 +2309,8 @@ create_trace_edges (rtx insn)
 	}
       else if (computed_jump_p (insn))
 	{
-	  for (rtx_expr_list *lab = forced_labels; lab; lab = lab->next ())
-	    maybe_record_trace_start (lab->element (), insn);
+	  for (rtx_insn_list *lab = forced_labels; lab; lab = lab->next ())
+	    maybe_record_trace_start (lab->insn (), insn);
 	}
       else if (returnjump_p (insn))
 	;
diff --git a/gcc/except.c b/gcc/except.c
index 05da989..99a66a0 100644
--- a/gcc/except.c
+++ b/gcc/except.c
@@ -1310,7 +1310,7 @@ sjlj_emit_dispatch_table (rtx_code_label *dispatch_label, int num_dispatch)
      CFG edges more exactly, we can use the forced_labels list instead.  */
   LABEL_PRESERVE_P (dispatch_label) = 1;
   forced_labels
-    = gen_rtx_EXPR_LIST (VOIDmode, dispatch_label, forced_labels);
+    = gen_rtx_INSN_LIST (VOIDmode, dispatch_label, forced_labels);
 #endif
 
   /* Load up exc_ptr and filter values from the function context.  */
diff --git a/gcc/function.h b/gcc/function.h
index 3921d21..071f5dd 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -135,7 +135,7 @@ struct GTY(()) expr_status {
   rtx x_apply_args_value;
 
   /* List of labels that must never be deleted.  */
-  rtx_expr_list *x_forced_labels;
+  rtx_insn_list *x_forced_labels;
 };
 
 typedef struct call_site_record_d *call_site_record;
diff --git a/gcc/jump.c b/gcc/jump.c
index b8d3d52..3529ed6 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -74,7 +74,7 @@ static int returnjump_p_1 (rtx *, void *);
 static void
 rebuild_jump_labels_1 (rtx_insn *f, bool count_forced)
 {
-  rtx_expr_list *insn;
+  rtx_insn_list *insn;
 
   timevar_push (TV_REBUILD_JUMP);
   init_label_info (f);
@@ -86,8 +86,8 @@ rebuild_jump_labels_1 (rtx_insn *f, bool count_forced)
 
   if (count_forced)
     for (insn = forced_labels; insn; insn = insn->next ())
-      if (LABEL_P (insn->element ()))
-	LABEL_NUSES (insn->element ())++;
+      if (LABEL_P (insn->insn ()))
+	LABEL_NUSES (insn->insn ())++;
   timevar_pop (TV_REBUILD_JUMP);
 }
 
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 419940e..77ec6ac 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -3911,9 +3911,9 @@ set_initial_label_offsets (void)
 {
   memset (offsets_known_at, 0, num_labels);
 
-  for (rtx_expr_list *x = forced_labels; x; x = x->next ())
-    if (x->element ())
-      set_label_offsets (x->element (), NULL, 1);
+  for (rtx_insn_list *x = forced_labels; x; x = x->next ())
+    if (x->insn ())
+      set_label_offsets (x->insn (), NULL, 1);
 
   for (rtx_insn_list *x = nonlocal_goto_handler_labels; x; x = x->next ())
     if (x->insn ())
diff --git a/gcc/stmt.c b/gcc/stmt.c
index 1cbd63d..70dad0c 100644
--- a/gcc/stmt.c
+++ b/gcc/stmt.c
@@ -141,12 +141,12 @@ label_rtx (tree label)
 rtx
 force_label_rtx (tree label)
 {
-  rtx ref = label_rtx (label);
+  rtx_insn *ref = as_a <rtx_insn *> (label_rtx (label));
   tree function = decl_function_context (label);
 
   gcc_assert (function);
 
-  forced_labels = gen_rtx_EXPR_LIST (VOIDmode, ref, forced_labels);
+  forced_labels = gen_rtx_INSN_LIST (VOIDmode, ref, forced_labels);
   return ref;
 }
 
@@ -176,7 +176,7 @@ emit_jump (rtx label)
 void
 expand_label (tree label)
 {
-  rtx label_r = label_rtx (label);
+  rtx_insn *label_r = as_a <rtx_insn *> (label_rtx (label));
 
   do_pending_stack_adjust ();
   emit_label (label_r);
@@ -192,7 +192,7 @@ expand_label (tree label)
     }
 
   if (FORCED_LABEL (label))
-    forced_labels = gen_rtx_EXPR_LIST (VOIDmode, label_r, forced_labels);
+    forced_labels = gen_rtx_INSN_LIST (VOIDmode, label_r, forced_labels);
 
   if (DECL_NONLOCAL (label) || FORCED_LABEL (label))
     maybe_set_first_label_num (label_r);
-- 
1.8.5.3

[PATCH 1/3] Convert nonlocal_goto_handler_labels from an EXPR_LIST to an INSN_LIST

[David Malcolm]

gcc/
	* function.h (struct rtl_data): Convert field
	"x_nonlocal_goto_handler_labels" from rtx_expr_list * to
	rtx_insn_list *.
	* rtl.h (remove_node_from_insn_list): New prototype.

	* builtins.c (expand_builtin): When prepending to
	nonlocal_goto_handler_labels, use gen_rtx_INSN_LIST rather than
	gen_rtx_EXPR_LIST.
	* cfgbuild.c (make_edges): Convert local "x" from rtx_expr_list *
	to rtx_insn_list *, and use its "insn" method rather than
	"element" method.
	* cfgrtl.c (delete_insn): Use new function
	remove_node_from_insn_list rather than
	remove_node_from_expr_list.
	(cfg_layout_initialize): Convert local "x" from rtx_expr_list *
	to rtx_insn_list *, and use its "insn" method rather than
	"element" method.
	* dwarf2cfi.c (create_trace_edges): Likewise for local "lab".
	* reload1.c (set_initial_label_offsets): Likewise for local "x".
	* rtlanal.c (remove_node_from_insn_list): New function, adapted
	from remove_node_from_expr_list.
	* stmt.c (expand_label): When prepending to
	nonlocal_goto_handler_labels, use gen_rtx_INSN_LIST rather than
	gen_rtx_EXPR_LIST.
---
 gcc/builtins.c  |  2 +-
 gcc/cfgbuild.c  |  4 ++--
 gcc/cfgrtl.c    |  6 +++---
 gcc/dwarf2cfi.c |  4 ++--
 gcc/function.h  |  4 ++--
 gcc/reload1.c   |  6 +++---
 gcc/rtl.h       |  1 +
 gcc/rtlanal.c   | 29 +++++++++++++++++++++++++++++
 gcc/stmt.c      |  2 +-
 9 files changed, 44 insertions(+), 14 deletions(-)

diff --git a/gcc/builtins.c b/gcc/builtins.c
index e5a9b4d..5b1068e 100644
--- a/gcc/builtins.c
+++ b/gcc/builtins.c
@@ -6186,7 +6186,7 @@ expand_builtin (tree exp, rtx target, rtx subtarget, enum machine_mode mode,
 	  /* This is copied from the handling of non-local gotos.  */
 	  expand_builtin_setjmp_setup (buf_addr, label_r);
 	  nonlocal_goto_handler_labels
-	    = gen_rtx_EXPR_LIST (VOIDmode, label_r,
+	    = gen_rtx_INSN_LIST (VOIDmode, label_r,
 				 nonlocal_goto_handler_labels);
 	  /* ??? Do not let expand_label treat us as such since we would
 	     not want to be both on the list of non-local labels and on
diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index 082f070..d7fa97a 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -337,10 +337,10 @@ make_edges (basic_block min, basic_block max, int update_p)
 		     taken, then only calls to those functions or to other
 		     nested functions that use them could possibly do
 		     nonlocal gotos.  */
-		  for (rtx_expr_list *x = nonlocal_goto_handler_labels;
+		  for (rtx_insn_list *x = nonlocal_goto_handler_labels;
 		       x;
 		       x = x->next ())
-		    make_label_edge (edge_cache, bb, x->element (),
+		    make_label_edge (edge_cache, bb, x->insn (),
 				     EDGE_ABNORMAL | EDGE_ABNORMAL_CALL);
 		}
 
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 9707c1f..d9b41e0 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -159,7 +159,7 @@ delete_insn (rtx uncast_insn)
 	    }
 	}
 
-      remove_node_from_expr_list (insn, &nonlocal_goto_handler_labels);
+      remove_node_from_insn_list (insn, &nonlocal_goto_handler_labels);
     }
 
   if (really_delete)
@@ -4216,7 +4216,7 @@ cfg_layout_duplicate_bb (basic_block bb)
 void
 cfg_layout_initialize (unsigned int flags)
 {
-  rtx_expr_list *x;
+  rtx_insn_list *x;
   basic_block bb;
 
   /* Once bb partitioning is complete, cfg layout mode should not be
@@ -4237,7 +4237,7 @@ cfg_layout_initialize (unsigned int flags)
   /* Make sure that the targets of non local gotos are marked.  */
   for (x = nonlocal_goto_handler_labels; x; x = x->next ())
     {
-      bb = BLOCK_FOR_INSN (x->element ());
+      bb = BLOCK_FOR_INSN (x->insn ());
       bb->flags |= BB_NON_LOCAL_GOTO_TARGET;
     }
 
diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index 2452824..7c495e4 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -2338,10 +2338,10 @@ create_trace_edges (rtx insn)
 
       /* Process non-local goto edges.  */
       if (can_nonlocal_goto (insn))
-	for (rtx_expr_list *lab = nonlocal_goto_handler_labels;
+	for (rtx_insn_list *lab = nonlocal_goto_handler_labels;
 	     lab;
 	     lab = lab->next ())
-	  maybe_record_trace_start_abnormal (lab->element (), insn);
+	  maybe_record_trace_start_abnormal (lab->insn (), insn);
     }
   else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
     {
diff --git a/gcc/function.h b/gcc/function.h
index c2e0366..3921d21 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -264,9 +264,9 @@ struct GTY(()) rtl_data {
      Used for detecting stack clobbers.  */
   tree stack_protect_guard;
 
-  /* List (chain of EXPR_LIST) of labels heading the current handlers for
+  /* List (chain of INSN_LIST) of labels heading the current handlers for
      nonlocal gotos.  */
-  rtx_expr_list *x_nonlocal_goto_handler_labels;
+  rtx_insn_list *x_nonlocal_goto_handler_labels;
 
   /* Label that will go on function epilogue.
      Jumping to this label serves as a "return" instruction
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 9db479e..419940e 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -3915,9 +3915,9 @@ set_initial_label_offsets (void)
     if (x->element ())
       set_label_offsets (x->element (), NULL, 1);
 
-  for (rtx_expr_list *x = nonlocal_goto_handler_labels; x; x = x->next ())
-    if (x->element ())
-      set_label_offsets (x->element (), NULL, 1);
+  for (rtx_insn_list *x = nonlocal_goto_handler_labels; x; x = x->next ())
+    if (x->insn ())
+      set_label_offsets (x->insn (), NULL, 1);
 
   for_each_eh_label (set_initial_eh_label_offset);
 }
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 0732309..f34a3bd 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2839,6 +2839,7 @@ extern rtx regno_use_in (unsigned int, rtx);
 extern int auto_inc_p (const_rtx);
 extern int in_expr_list_p (const_rtx, const_rtx);
 extern void remove_node_from_expr_list (const_rtx, rtx_expr_list **);
+extern void remove_node_from_insn_list (const rtx_insn *, rtx_insn_list **);
 extern int loc_mentioned_in_p (rtx *, const_rtx);
 extern rtx_insn *find_first_parameter_load (rtx, rtx);
 extern bool keep_with_call_p (const_rtx);
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 297ca41..8383cdf 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -2156,6 +2156,35 @@ remove_node_from_expr_list (const_rtx node, rtx_expr_list **listp)
       temp = temp->next ();
     }
 }
+
+/* Search LISTP (an INSN_LIST) for an entry whose first operand is NODE and
+   remove that entry from the list if it is found.
+
+   A simple equality test is used to determine if NODE matches.  */
+
+void
+remove_node_from_insn_list (const rtx_insn *node, rtx_insn_list **listp)
+{
+  rtx_insn_list *temp = *listp;
+  rtx prev = NULL;
+
+  while (temp)
+    {
+      if (node == temp->insn ())
+	{
+	  /* Splice the node out of the list.  */
+	  if (prev)
+	    XEXP (prev, 1) = temp->next ();
+	  else
+	    *listp = temp->next ();
+
+	  return;
+	}
+
+      prev = temp;
+      temp = temp->next ();
+    }
+}
 \f
 /* Nonzero if X contains any volatile instructions.  These are instructions
    which may cause unpredictable machine state instructions, and thus no
diff --git a/gcc/stmt.c b/gcc/stmt.c
index beafaa0..1cbd63d 100644
--- a/gcc/stmt.c
+++ b/gcc/stmt.c
@@ -187,7 +187,7 @@ expand_label (tree label)
     {
       expand_builtin_setjmp_receiver (NULL);
       nonlocal_goto_handler_labels
-	= gen_rtx_EXPR_LIST (VOIDmode, label_r,
+	= gen_rtx_INSN_LIST (VOIDmode, label_r,
 			     nonlocal_goto_handler_labels);
     }
 
-- 
1.8.5.3

Re: [PATCH 0/3] Updated patches to eliminate need for rtx_expr_list::insn (was Re: [PATCH 221/236] Add insn method to rtx_expr_list)

[Richard Henderson]

On 08/26/2014 09:00 AM, David Malcolm wrote:
> OK for trunk?
> 
> David Malcolm (3):
>   Convert nonlocal_goto_handler_labels from an EXPR_LIST to an INSN_LIST
>   Convert forced_labels from an EXPR_LIST to an INSN_LIST
>   Use rtx_insn in more places in dwarf2cfi.c

Ok to all.  Thanks.


r~

[PATCH 015/236] BB_NOTE_LIST scaffolding

[David Malcolm]

gcc/
	* sel-sched-ir.h (BB_NOTE_LIST): struct sel_region_bb_info_def's
	"note_list" field will eventually be an rtx_insn *.  To help with
	transition, for now, convert from an access macro into a pair of
	functions: BB_NOTE_LIST, returning an rtx_insn *, and...
	(SET_BB_NOTE_LIST): New function, for use where BB_NOTE_LIST is
	used as an lvalue.

	* sel-sched.c (create_block_for_bookkeeping): Update lvalue usage
	of BB_NOTE_LIST to SET_BB_NOTE_LIST.

	* sel-sched-ir.c (init_bb): Likewise.
	(sel_restore_notes): Likewise.
	(move_bb_info): Likewise.
	(BB_NOTE_LIST): New function, adding a checked cast to rtx_insn *.
	(SET_BB_NOTE_LIST): New function.

/
	* rtx-classes-status.txt: Add SET_BB_NOTE_LIST.
---
 gcc/sel-sched-ir.c     | 19 +++++++++++++++----
 gcc/sel-sched-ir.h     |  3 ++-
 gcc/sel-sched.c        |  4 ++--
 rtx-classes-status.txt |  1 +
 4 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 18ffa6c..cb4682f 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -4625,7 +4625,7 @@ static void
 init_bb (basic_block bb)
 {
   remove_notes (bb_note (bb), BB_END (bb));
-  BB_NOTE_LIST (bb) = note_list;
+  SET_BB_NOTE_LIST (bb) = note_list;
 }
 
 void
@@ -4660,7 +4660,7 @@ sel_restore_notes (void)
 	{
 	  note_list = BB_NOTE_LIST (first);
 	  restore_other_notes (NULL, first);
-	  BB_NOTE_LIST (first) = NULL_RTX;
+	  SET_BB_NOTE_LIST (first) = NULL_RTX;
 
 	  FOR_BB_INSNS (first, insn)
 	    if (NONDEBUG_INSN_P (insn))
@@ -5268,8 +5268,8 @@ move_bb_info (basic_block merge_bb, basic_block empty_bb)
 {
   if (in_current_region_p (merge_bb))
     concat_note_lists (BB_NOTE_LIST (empty_bb),
-		       &BB_NOTE_LIST (merge_bb));
-  BB_NOTE_LIST (empty_bb) = NULL_RTX;
+		       &SET_BB_NOTE_LIST (merge_bb));
+  SET_BB_NOTE_LIST (empty_bb) = NULL_RTX;
 
 }
 
@@ -6457,4 +6457,15 @@ rtx& SET_VINSN_INSN_RTX (vinsn_t vi)
   return vi->insn_rtx;
 }
 
+rtx_insn *BB_NOTE_LIST (basic_block bb)
+{
+  rtx note_list = SEL_REGION_BB_INFO (bb)->note_list;
+  return as_a_nullable <rtx_insn *> (note_list);
+}
+
+rtx& SET_BB_NOTE_LIST (basic_block bb)
+{
+  return SEL_REGION_BB_INFO (bb)->note_list;
+}
+
 #endif
diff --git a/gcc/sel-sched-ir.h b/gcc/sel-sched-ir.h
index 7aef287..81accaf 100644
--- a/gcc/sel-sched-ir.h
+++ b/gcc/sel-sched-ir.h
@@ -920,7 +920,8 @@ extern vec<sel_region_bb_info_def> sel_region_bb_info;
    A note_list is a list of various notes that was scattered across BB
    before scheduling, and will be appended at the beginning of BB after
    scheduling is finished.  */
-#define BB_NOTE_LIST(BB) (SEL_REGION_BB_INFO (BB)->note_list)
+extern rtx_insn *BB_NOTE_LIST (basic_block);
+extern rtx& SET_BB_NOTE_LIST (basic_block);
 
 #define BB_AV_SET(BB) (SEL_REGION_BB_INFO (BB)->av_set)
 #define BB_AV_LEVEL(BB) (SEL_REGION_BB_INFO (BB)->av_level)
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index 1df2da0..c3e0cca 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -4592,8 +4592,8 @@ create_block_for_bookkeeping (edge e1, edge e2)
 
   /* Move note_list from the upper bb.  */
   gcc_assert (BB_NOTE_LIST (new_bb) == NULL_RTX);
-  BB_NOTE_LIST (new_bb) = BB_NOTE_LIST (bb);
-  BB_NOTE_LIST (bb) = NULL_RTX;
+  SET_BB_NOTE_LIST (new_bb) = BB_NOTE_LIST (bb);
+  SET_BB_NOTE_LIST (bb) = NULL_RTX;
 
   gcc_assert (e2->dest == bb);
 
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index fe04611..e77e847 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -12,6 +12,7 @@ TODO: "Scaffolding" to be removed
 =================================
 * DF_REF_INSN
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
+* SET_BB_NOTE_LIST
 * SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
 * SET_VINSN_INSN_RTX
-- 
1.8.5.3

Re: [PATCH 015/236] BB_NOTE_LIST scaffolding

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> gcc/
> 	* sel-sched-ir.h (BB_NOTE_LIST): struct sel_region_bb_info_def's
> 	"note_list" field will eventually be an rtx_insn *.  To help with
> 	transition, for now, convert from an access macro into a pair of
> 	functions: BB_NOTE_LIST, returning an rtx_insn *, and...
> 	(SET_BB_NOTE_LIST): New function, for use where BB_NOTE_LIST is
> 	used as an lvalue.
>
> 	* sel-sched.c (create_block_for_bookkeeping): Update lvalue usage
> 	of BB_NOTE_LIST to SET_BB_NOTE_LIST.
>
> 	* sel-sched-ir.c (init_bb): Likewise.
> 	(sel_restore_notes): Likewise.
> 	(move_bb_info): Likewise.
> 	(BB_NOTE_LIST): New function, adding a checked cast to rtx_insn *.
> 	(SET_BB_NOTE_LIST): New function.
>
> /
> 	* rtx-classes-status.txt: Add SET_BB_NOTE_LIST.
OK.
jeff

Re: [PATCH 015/236] BB_NOTE_LIST scaffolding

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 1307 bytes --]

On Tue, 2014-08-12 at 15:22 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > gcc/
> > 	* sel-sched-ir.h (BB_NOTE_LIST): struct sel_region_bb_info_def's
> > 	"note_list" field will eventually be an rtx_insn *.  To help with
> > 	transition, for now, convert from an access macro into a pair of
> > 	functions: BB_NOTE_LIST, returning an rtx_insn *, and...
> > 	(SET_BB_NOTE_LIST): New function, for use where BB_NOTE_LIST is
> > 	used as an lvalue.
> >
> > 	* sel-sched.c (create_block_for_bookkeeping): Update lvalue usage
> > 	of BB_NOTE_LIST to SET_BB_NOTE_LIST.
> >
> > 	* sel-sched-ir.c (init_bb): Likewise.
> > 	(sel_restore_notes): Likewise.
> > 	(move_bb_info): Likewise.
> > 	(BB_NOTE_LIST): New function, adding a checked cast to rtx_insn *.
> > 	(SET_BB_NOTE_LIST): New function.
> >
> > /
> > 	* rtx-classes-status.txt: Add SET_BB_NOTE_LIST.
> OK.
Thanks.

Fixed up the as_a_nullable to safe_as_a, and committed to trunk as
r214167, having verified bootstrap&regrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone with 9 targets.

Am attaching what I committed.

FWIW these functions becomes a macro again in patch #170.


Dave

[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html


[-- Attachment #2: r214167.patch --]
[-- Type: text/x-patch, Size: 4326 bytes --]

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 214166)
+++ ChangeLog	(revision 214167)
@@ -1,5 +1,9 @@
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
 
+	* rtx-classes-status.txt (TODO): Add SET_BB_NOTE_LIST.
+
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
 	* rtx-classes-status.txt (TODO): Add SET_VINSN_INSN_RTX.
 
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
Index: rtx-classes-status.txt
===================================================================
--- rtx-classes-status.txt	(revision 214166)
+++ rtx-classes-status.txt	(revision 214167)
@@ -16,6 +16,7 @@
 =================================
 * DF_REF_INSN
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
+* SET_BB_NOTE_LIST
 * SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
 * SET_VINSN_INSN_RTX
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214166)
+++ gcc/ChangeLog	(revision 214167)
@@ -1,5 +1,23 @@
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
 
+	* sel-sched-ir.h (BB_NOTE_LIST): struct sel_region_bb_info_def's
+	"note_list" field will eventually be an rtx_insn *.  To help with
+	transition, for now, convert from an access macro into a pair of
+	functions: BB_NOTE_LIST, returning an rtx_insn *, and...
+	(SET_BB_NOTE_LIST): New function, for use where BB_NOTE_LIST is
+	used as an lvalue.
+
+	* sel-sched.c (create_block_for_bookkeeping): Update lvalue usage
+	of BB_NOTE_LIST to SET_BB_NOTE_LIST.
+
+	* sel-sched-ir.c (init_bb): Likewise.
+	(sel_restore_notes): Likewise.
+	(move_bb_info): Likewise.
+	(BB_NOTE_LIST): New function, adding a checked cast to rtx_insn *.
+	(SET_BB_NOTE_LIST): New function.
+
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
 	* sel-sched-ir.h (VINSN_INSN_RTX): struct vinsn_def's "insn_rtx"
 	field will eventually be an rtx_insn *.  To help with transition,
 	for now, convert from an access macro into a pair of functions:
Index: gcc/sel-sched.c
===================================================================
--- gcc/sel-sched.c	(revision 214166)
+++ gcc/sel-sched.c	(revision 214167)
@@ -4585,8 +4585,8 @@
 
   /* Move note_list from the upper bb.  */
   gcc_assert (BB_NOTE_LIST (new_bb) == NULL_RTX);
-  BB_NOTE_LIST (new_bb) = BB_NOTE_LIST (bb);
-  BB_NOTE_LIST (bb) = NULL_RTX;
+  SET_BB_NOTE_LIST (new_bb) = BB_NOTE_LIST (bb);
+  SET_BB_NOTE_LIST (bb) = NULL_RTX;
 
   gcc_assert (e2->dest == bb);
 
Index: gcc/sel-sched-ir.c
===================================================================
--- gcc/sel-sched-ir.c	(revision 214166)
+++ gcc/sel-sched-ir.c	(revision 214167)
@@ -4620,7 +4620,7 @@
 init_bb (basic_block bb)
 {
   remove_notes (bb_note (bb), BB_END (bb));
-  BB_NOTE_LIST (bb) = note_list;
+  SET_BB_NOTE_LIST (bb) = note_list;
 }
 
 void
@@ -4655,7 +4655,7 @@
 	{
 	  note_list = BB_NOTE_LIST (first);
 	  restore_other_notes (NULL, first);
-	  BB_NOTE_LIST (first) = NULL_RTX;
+	  SET_BB_NOTE_LIST (first) = NULL_RTX;
 
 	  FOR_BB_INSNS (first, insn)
 	    if (NONDEBUG_INSN_P (insn))
@@ -5263,8 +5263,8 @@
 {
   if (in_current_region_p (merge_bb))
     concat_note_lists (BB_NOTE_LIST (empty_bb),
-		       &BB_NOTE_LIST (merge_bb));
-  BB_NOTE_LIST (empty_bb) = NULL_RTX;
+		       &SET_BB_NOTE_LIST (merge_bb));
+  SET_BB_NOTE_LIST (empty_bb) = NULL_RTX;
 
 }
 
@@ -6452,4 +6452,15 @@
   return vi->insn_rtx;
 }
 
+rtx_insn *BB_NOTE_LIST (basic_block bb)
+{
+  rtx note_list = SEL_REGION_BB_INFO (bb)->note_list;
+  return safe_as_a <rtx_insn *> (note_list);
+}
+
+rtx& SET_BB_NOTE_LIST (basic_block bb)
+{
+  return SEL_REGION_BB_INFO (bb)->note_list;
+}
+
 #endif
Index: gcc/sel-sched-ir.h
===================================================================
--- gcc/sel-sched-ir.h	(revision 214166)
+++ gcc/sel-sched-ir.h	(revision 214167)
@@ -920,7 +920,8 @@
    A note_list is a list of various notes that was scattered across BB
    before scheduling, and will be appended at the beginning of BB after
    scheduling is finished.  */
-#define BB_NOTE_LIST(BB) (SEL_REGION_BB_INFO (BB)->note_list)
+extern rtx_insn *BB_NOTE_LIST (basic_block);
+extern rtx& SET_BB_NOTE_LIST (basic_block);
 
 #define BB_AV_SET(BB) (SEL_REGION_BB_INFO (BB)->av_set)
 #define BB_AV_LEVEL(BB) (SEL_REGION_BB_INFO (BB)->av_level)

[PATCH 081/236] hw-doloop: Use rtx_insn (touches config/bfin/bfin.c)

[David Malcolm]

gcc/
	* hw-doloop.h (struct hwloop_info_d): Strengthen fields
	"last_insn", "loop_end" from rtx to rtx_insn *.

	* hw-doloop.c (scan_loop): Likewise for local "insn".
	(discover_loop): Likewise for param "tail_insn".
	(discover_loops): Likewise for local "tail".

	* config/bfin/bfin.c (hwloop_optimize): For now, add a checked
	cast to rtx_insn * when assigning from an rtx local to a
	hwloop_info's "last_insn" field.
---
 gcc/config/bfin/bfin.c | 2 +-
 gcc/hw-doloop.c        | 6 +++---
 gcc/hw-doloop.h        | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index b037a46..02bd4bd 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -3654,7 +3654,7 @@ hwloop_optimize (hwloop_info loop)
       last_insn = emit_insn_after (gen_forced_nop (), last_insn);
     }
 
-  loop->last_insn = last_insn;
+  loop->last_insn = as_a_nullable <rtx_insn *> (last_insn);
 
   /* The loop is good for replacement.  */
   start_label = loop->start_label;
diff --git a/gcc/hw-doloop.c b/gcc/hw-doloop.c
index d182761..bb66982 100644
--- a/gcc/hw-doloop.c
+++ b/gcc/hw-doloop.c
@@ -94,7 +94,7 @@ scan_loop (hwloop_info loop)
 
   for (ix = 0; loop->blocks.iterate (ix, &bb); ix++)
     {
-      rtx insn;
+      rtx_insn *insn;
       edge e;
       edge_iterator ei;
 
@@ -232,7 +232,7 @@ add_forwarder_blocks (hwloop_info loop)
    the expected use; targets that call into this code usually replace the
    loop counter with a different special register.  */
 static void
-discover_loop (hwloop_info loop, basic_block tail_bb, rtx tail_insn, rtx reg)
+discover_loop (hwloop_info loop, basic_block tail_bb, rtx_insn *tail_insn, rtx reg)
 {
   bool found_tail;
   unsigned dwork = 0;
@@ -359,7 +359,7 @@ discover_loops (bitmap_obstack *loop_stack, struct hw_doloop_hooks *hooks)
      structure and add the head block to the work list. */
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx tail = BB_END (bb);
+      rtx_insn *tail = BB_END (bb);
       rtx insn, reg;
 
       while (tail && NOTE_P (tail) && tail != BB_HEAD (bb))
diff --git a/gcc/hw-doloop.h b/gcc/hw-doloop.h
index 9fc3c15..a98f213 100644
--- a/gcc/hw-doloop.h
+++ b/gcc/hw-doloop.h
@@ -66,10 +66,10 @@ struct GTY (()) hwloop_info_d
   basic_block successor;
 
   /* The last instruction in the tail.  */
-  rtx last_insn;
+  rtx_insn *last_insn;
 
   /* The loop_end insn.  */
-  rtx loop_end;
+  rtx_insn *loop_end;
 
   /* The iteration register.  */
   rtx iter_reg;
-- 
1.8.5.3

[PATCH 179/236] cselib_record_sets_hook takes an rtx_insn

[David Malcolm]

gcc/
	* cselib.h (cselib_record_sets_hook):  Strengthen initial param
	"insn" from rtx to rtx_insn *.

	* cselib.c (cselib_record_sets_hook): Likewise.

	* var-tracking.c (add_with_sets): Likewise, renaming back from
	"uncast_insn" to "insn" and eliminating the checked cast from rtx
	to rtx_insn *.
---
 gcc/cselib.c       | 2 +-
 gcc/cselib.h       | 2 +-
 gcc/var-tracking.c | 3 +--
 3 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/gcc/cselib.c b/gcc/cselib.c
index c453904..f500d8a 100644
--- a/gcc/cselib.c
+++ b/gcc/cselib.c
@@ -258,7 +258,7 @@ void (*cselib_discard_hook) (cselib_val *);
    represented in the array sets[n_sets].  new_val_min can be used to
    tell whether values present in sets are introduced by this
    instruction.  */
-void (*cselib_record_sets_hook) (rtx insn, struct cselib_set *sets,
+void (*cselib_record_sets_hook) (rtx_insn *insn, struct cselib_set *sets,
 				 int n_sets);
 
 #define PRESERVED_VALUE_P(RTX) \
diff --git a/gcc/cselib.h b/gcc/cselib.h
index 62374c0..67ce6da 100644
--- a/gcc/cselib.h
+++ b/gcc/cselib.h
@@ -65,7 +65,7 @@ enum cselib_record_what
 };
 
 extern void (*cselib_discard_hook) (cselib_val *);
-extern void (*cselib_record_sets_hook) (rtx insn, struct cselib_set *sets,
+extern void (*cselib_record_sets_hook) (rtx_insn *insn, struct cselib_set *sets,
 					int n_sets);
 
 extern cselib_val *cselib_lookup (rtx, enum machine_mode,
diff --git a/gcc/var-tracking.c b/gcc/var-tracking.c
index 4d30650..8f04110 100644
--- a/gcc/var-tracking.c
+++ b/gcc/var-tracking.c
@@ -6464,9 +6464,8 @@ prepare_call_arguments (basic_block bb, rtx_insn *insn)
    first place, in which case sets and n_sets will be 0).  */
 
 static void
-add_with_sets (rtx uncast_insn, struct cselib_set *sets, int n_sets)
+add_with_sets (rtx_insn *insn, struct cselib_set *sets, int n_sets)
 {
-  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   basic_block bb = BLOCK_FOR_INSN (insn);
   int n1, n2;
   struct count_use_info cui;
-- 
1.8.5.3

[PATCH 153/236] config/tilepro: Use rtx_insn

[David Malcolm]

gcc/
	* config/tilepro/tilepro-protos.h (tilepro_output_cbranch_with_opcode):
	Strengthen param 1 from rtx to rtx_insn *.
	(tilepro_output_cbranch): Likewise.
	(tilepro_adjust_insn_length): Likewise.
	(tilepro_final_prescan_insn): Likewise for sole param.

	* config/tilepro/tilepro.c (tilepro_legitimize_tls_address):
	Likewise for local "last".
	(cbranch_predicted_p): Likewise for param "insn".
	(tilepro_output_simple_cbranch_with_opcode): Likewise.
	(tilepro_output_cbranch_with_opcode): Likewise.
	(tilepro_output_cbranch): Likewise.
	(frame_emit_load): Likewise for return type and locals "seq",
	"insn".
	(emit_sp_adjust): Likewise for return type and local "insn".
	(tilepro_expand_epilogue): Likewise for locals "last_insn",
	"insn".
	(tilepro_adjust_insn_length): Likewise for param "insn".
	(next_insn_to_bundle): Likewise for return type and params
	"r", "end".
	(tilepro_gen_bundles): Likewise for locals "insn", "next", "end".
	(replace_pc_relative_symbol_ref): Likewise for param "insn" and
	local "new_insns".
	(match_addli_pcrel): Likewise for param "insn".
	(replace_addli_pcrel): Likewise.
	(match_auli_pcrel): Likewise.
	(replace_auli_pcrel): Likewise.
	(tilepro_fixup_pcrel_references): Likewise for locals "insn",
	"next_insn".
	(reorder_var_tracking_notes): Likewise for locals "insn", "next",
	"queue", "next_queue", "prev".
	(tilepro_asm_output_mi_thunk): Likewise for local "insn".
	(tilepro_final_prescan_insn): Likewise for param "insn".
---
 gcc/config/tilepro/tilepro-protos.h |  8 ++---
 gcc/config/tilepro/tilepro.c        | 72 +++++++++++++++++++------------------
 2 files changed, 42 insertions(+), 38 deletions(-)

diff --git a/gcc/config/tilepro/tilepro-protos.h b/gcc/config/tilepro/tilepro-protos.h
index fcd29ab..fe9b81b 100644
--- a/gcc/config/tilepro/tilepro-protos.h
+++ b/gcc/config/tilepro/tilepro-protos.h
@@ -44,11 +44,11 @@ extern void tilepro_expand_umulsi3_highpart (rtx, rtx, rtx);
 extern bool tilepro_emit_setcc (rtx[], enum machine_mode);
 extern void tilepro_emit_conditional_branch (rtx[], enum machine_mode);
 extern rtx tilepro_emit_conditional_move (rtx);
-extern const char *tilepro_output_cbranch_with_opcode (rtx, rtx *,
+extern const char *tilepro_output_cbranch_with_opcode (rtx_insn *, rtx *,
 						       const char *,
 						       const char *, int,
 						       bool);
-extern const char *tilepro_output_cbranch (rtx, rtx *, bool);
+extern const char *tilepro_output_cbranch (rtx_insn *, rtx *, bool);
 extern void tilepro_expand_tablejump (rtx, rtx);
 extern void tilepro_expand_builtin_vector_binop (rtx (*)(rtx, rtx, rtx),
 						 enum machine_mode, rtx,
@@ -62,10 +62,10 @@ extern void tilepro_expand_epilogue (bool);
 extern int tilepro_initial_elimination_offset (int, int);
 extern rtx tilepro_return_addr (int, rtx);
 extern rtx tilepro_eh_return_handler_rtx (void);
-extern int tilepro_adjust_insn_length (rtx, int);
+extern int tilepro_adjust_insn_length (rtx_insn *, int);
 
 extern int tilepro_asm_preferred_eh_data_format (int, int);
-extern void tilepro_final_prescan_insn (rtx);
+extern void tilepro_final_prescan_insn (rtx_insn *);
 extern const char *tilepro_asm_output_opcode (FILE *, const char *);
 extern void tilepro_function_profiler (FILE *, int);
 
diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c
index 4dd60c5..520b485 100644
--- a/gcc/config/tilepro/tilepro.c
+++ b/gcc/config/tilepro/tilepro.c
@@ -897,7 +897,8 @@ tilepro_legitimize_tls_address (rtx addr)
       case TLS_MODEL_GLOBAL_DYNAMIC:
       case TLS_MODEL_LOCAL_DYNAMIC:
 	{
-	  rtx r0, temp1, temp2, temp3, got, last;
+	  rtx r0, temp1, temp2, temp3, got;
+	  rtx_insn *last;
 
 	  ret = gen_reg_rtx (Pmode);
 	  r0 = gen_rtx_REG (Pmode, 0);
@@ -917,7 +918,8 @@ tilepro_legitimize_tls_address (rtx addr)
 	}
       case TLS_MODEL_INITIAL_EXEC:
 	{
-	  rtx temp1, temp2, temp3, got, last;
+	  rtx temp1, temp2, temp3, got;
+	  rtx_insn *last;
 
 	  ret = gen_reg_rtx (Pmode);
 	  temp1 = gen_reg_rtx (Pmode);
@@ -939,7 +941,8 @@ tilepro_legitimize_tls_address (rtx addr)
 	}
       case TLS_MODEL_LOCAL_EXEC:
 	{
-	  rtx temp1, last;
+	  rtx temp1;
+	  rtx_insn *last;
 
 	  ret = gen_reg_rtx (Pmode);
 	  temp1 = gen_reg_rtx (Pmode);
@@ -2422,7 +2425,7 @@ tilepro_emit_conditional_move (rtx cmp)
 /* Return true if INSN is annotated with a REG_BR_PROB note that
    indicates it's a branch that's predicted taken.  */
 static bool
-cbranch_predicted_p (rtx insn)
+cbranch_predicted_p (rtx_insn *insn)
 {
   rtx x = find_reg_note (insn, REG_BR_PROB, 0);
 
@@ -2440,7 +2443,7 @@ cbranch_predicted_p (rtx insn)
 /* Output assembly code for a specific branch instruction, appending
    the branch prediction flag to the opcode if appropriate.  */
 static const char *
-tilepro_output_simple_cbranch_with_opcode (rtx insn, const char *opcode,
+tilepro_output_simple_cbranch_with_opcode (rtx_insn *insn, const char *opcode,
 					   int regop, bool netreg_p,
 					   bool reverse_predicted)
 {
@@ -2455,7 +2458,7 @@ tilepro_output_simple_cbranch_with_opcode (rtx insn, const char *opcode,
 /* Output assembly code for a specific branch instruction, appending
    the branch prediction flag to the opcode if appropriate.  */
 const char *
-tilepro_output_cbranch_with_opcode (rtx insn, rtx *operands,
+tilepro_output_cbranch_with_opcode (rtx_insn *insn, rtx *operands,
 				    const char *opcode,
 				    const char *rev_opcode,
 				    int regop, bool netreg_p)
@@ -2506,7 +2509,7 @@ tilepro_output_cbranch_with_opcode (rtx insn, rtx *operands,
 
 /* Output assembly code for a conditional branch instruction.  */
 const char *
-tilepro_output_cbranch (rtx insn, rtx *operands, bool reversed)
+tilepro_output_cbranch (rtx_insn *insn, rtx *operands, bool reversed)
 {
   enum rtx_code code = GET_CODE (operands[1]);
   const char *opcode;
@@ -3302,7 +3305,7 @@ frame_emit_store (int regno, int regno_note, rtx addr, rtx cfa,
 /* Emit a load in the stack frame to load REGNO from address ADDR.
    Add a REG_CFA_RESTORE note to CFA_RESTORES if CFA_RESTORES is
    non-null.  Return the emitted insn.  */
-static rtx
+static rtx_insn *
 frame_emit_load (int regno, rtx addr, rtx *cfa_restores)
 {
   rtx reg = gen_rtx_REG (Pmode, regno);
@@ -3315,16 +3318,16 @@ frame_emit_load (int regno, rtx addr, rtx *cfa_restores)
 
 /* Helper function to set RTX_FRAME_RELATED_P on instructions,
    including sequences.  */
-static rtx
+static rtx_insn *
 set_frame_related_p (void)
 {
-  rtx seq = get_insns ();
-  rtx insn;
+  rtx_insn *seq = get_insns ();
+  rtx_insn *insn;
 
   end_sequence ();
 
   if (!seq)
-    return NULL_RTX;
+    return NULL;
 
   if (INSN_P (seq))
     {
@@ -3355,14 +3358,14 @@ set_frame_related_p (void)
    large register and using 'add'.
 
    This happens after reload, so we need to expand it ourselves.  */
-static rtx
+static rtx_insn *
 emit_sp_adjust (int offset, int *next_scratch_regno, bool frame_related,
 		rtx reg_notes)
 {
   rtx to_add;
   rtx imm_rtx = gen_int_si (offset);
 
-  rtx insn;
+  rtx_insn *insn;
   if (satisfies_constraint_J (imm_rtx))
     {
       /* We can add this using a single addi or addli.  */
@@ -3686,7 +3689,7 @@ tilepro_expand_epilogue (bool sibcall_p)
   rtx reg_save_addr[ROUND_ROBIN_SIZE] = {
     NULL_RTX, NULL_RTX, NULL_RTX, NULL_RTX
   };
-  rtx last_insn, insn;
+  rtx_insn *last_insn, *insn;
   unsigned int which_scratch;
   int offset, start_offset, regno;
   rtx cfa_restores = NULL_RTX;
@@ -3908,7 +3911,7 @@ tilepro_frame_pointer_required (void)
    by attributes in the machine-description file.  This is where we
    account for bundles.  */
 int
-tilepro_adjust_insn_length (rtx insn, int length)
+tilepro_adjust_insn_length (rtx_insn *insn, int length)
 {
   enum machine_mode mode = GET_MODE (insn);
 
@@ -3972,8 +3975,8 @@ tilepro_sched_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
 
 /* Skip over irrelevant NOTEs and such and look for the next insn we
    would consider bundling.  */
-static rtx
-next_insn_to_bundle (rtx r, rtx end)
+static rtx_insn *
+next_insn_to_bundle (rtx_insn *r, rtx_insn *end)
 {
   for (; r != end; r = NEXT_INSN (r))
     {
@@ -3983,7 +3986,7 @@ next_insn_to_bundle (rtx r, rtx end)
 	return r;
     }
 
-  return NULL_RTX;
+  return NULL;
 }
 
 
@@ -3996,8 +3999,8 @@ tilepro_gen_bundles (void)
   basic_block bb;
   FOR_EACH_BB_FN (bb, cfun)
   {
-    rtx insn, next;
-    rtx end = NEXT_INSN (BB_END (bb));
+    rtx_insn *insn, *next;
+    rtx_insn *end = NEXT_INSN (BB_END (bb));
 
     for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn; insn = next)
       {
@@ -4031,9 +4034,9 @@ tilepro_gen_bundles (void)
 
 /* Helper function for tilepro_fixup_pcrel_references.  */
 static void
-replace_pc_relative_symbol_ref (rtx insn, rtx opnds[4], bool first_insn_p)
+replace_pc_relative_symbol_ref (rtx_insn *insn, rtx opnds[4], bool first_insn_p)
 {
-  rtx new_insns;
+  rtx_insn *new_insns;
 
   start_sequence ();
 
@@ -4072,7 +4075,7 @@ replace_pc_relative_symbol_ref (rtx insn, rtx opnds[4], bool first_insn_p)
 
 /* Returns whether INSN is a pc-relative addli insn.   */
 static bool
-match_addli_pcrel (rtx insn)
+match_addli_pcrel (rtx_insn *insn)
 {
   rtx pattern = PATTERN (insn);
   rtx unspec;
@@ -4095,7 +4098,7 @@ match_addli_pcrel (rtx insn)
 
 /* Helper function for tilepro_fixup_pcrel_references.  */
 static void
-replace_addli_pcrel (rtx insn)
+replace_addli_pcrel (rtx_insn *insn)
 {
   rtx pattern = PATTERN (insn);
   rtx set_src;
@@ -4129,7 +4132,7 @@ replace_addli_pcrel (rtx insn)
 
 /* Returns whether INSN is a pc-relative auli insn.   */
 static bool
-match_auli_pcrel (rtx insn)
+match_auli_pcrel (rtx_insn *insn)
 {
   rtx pattern = PATTERN (insn);
   rtx high;
@@ -4156,7 +4159,7 @@ match_auli_pcrel (rtx insn)
 
 /* Helper function for tilepro_fixup_pcrel_references.  */
 static void
-replace_auli_pcrel (rtx insn)
+replace_auli_pcrel (rtx_insn *insn)
 {
   rtx pattern = PATTERN (insn);
   rtx set_src;
@@ -4230,7 +4233,7 @@ replace_auli_pcrel (rtx insn)
 static void
 tilepro_fixup_pcrel_references (void)
 {
-  rtx insn, next_insn;
+  rtx_insn *insn, *next_insn;
   bool same_section_as_entry = true;
 
   for (insn = get_insns (); insn; insn = next_insn)
@@ -4267,8 +4270,8 @@ reorder_var_tracking_notes (void)
   basic_block bb;
   FOR_EACH_BB_FN (bb, cfun)
   {
-    rtx insn, next;
-    rtx queue = NULL_RTX;
+    rtx_insn *insn, *next;
+    rtx_insn *queue = NULL;
     bool in_bundle = false;
 
     for (insn = BB_HEAD (bb); insn != BB_END (bb); insn = next)
@@ -4282,7 +4285,7 @@ reorder_var_tracking_notes (void)
 	      {
 		while (queue)
 		  {
-		    rtx next_queue = PREV_INSN (queue);
+		    rtx_insn *next_queue = PREV_INSN (queue);
 		    SET_PREV_INSN (NEXT_INSN (insn)) = queue;
 		    SET_NEXT_INSN (queue) = NEXT_INSN (insn);
 		    SET_NEXT_INSN (insn) = queue;
@@ -4298,7 +4301,7 @@ reorder_var_tracking_notes (void)
 	  {
 	    if (in_bundle)
 	      {
-		rtx prev = PREV_INSN (insn);
+		rtx_insn *prev = PREV_INSN (insn);
 		SET_PREV_INSN (next) = prev;
 		SET_NEXT_INSN (prev) = next;
 
@@ -4371,7 +4374,8 @@ tilepro_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
 			     HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
 			     tree function)
 {
-  rtx this_rtx, insn, funexp;
+  rtx this_rtx, funexp;
+  rtx_insn *insn;
 
   /* Pretend to be a post-reload pass while generating rtl.  */
   reload_completed = 1;
@@ -4870,7 +4874,7 @@ static enum machine_mode insn_mode;
 
 /* Implement FINAL_PRESCAN_INSN.  This is used to emit bundles.  */
 void
-tilepro_final_prescan_insn (rtx insn)
+tilepro_final_prescan_insn (rtx_insn *insn)
 {
   /* Record this for tilepro_asm_output_opcode to examine.  */
   insn_mode = GET_MODE (insn);
-- 
1.8.5.3

[PATCH 094/236] get_ebb_head_tail works with rtx_insn

[David Malcolm]

gcc/
	* sched-int.h (get_ebb_head_tail): Strengthen params "headp" and
	"tailp" from rtx * to rtx_insn **.

	* ddg.c (build_intra_loop_deps): Strengthen locals head", "tail"
	from rtx to rtx_insn *.
	* haifa-sched.c (get_ebb_head_tail): Strengthen params "headp" and
	"tailp" from rtx * to rtx_insn **.  Strengthen locals "beg_head",
	"beg_tail", "end_head", "end_tail", "note", "next", "prev" from
	rtx to rtx_insn *.
	* modulo-sched.c (const_iteration_count): Strengthen return type
	and locals "insn", "head", "tail" from rtx to rtx_insn *.  Replace
	use of NULL_RTX with NULL when working with insns.
	(loop_single_full_bb_p): Strengthen locals "head", "tail" from rtx
	to rtx_insn *.
	(sms_schedule): Likewise.
	* sched-rgn.c (init_ready_list): Likewise, also for locals
	"src_head" and "src_next_tail".
	(compute_block_dependences): Likewise.
	(free_block_dependencies): Likewise.
	(debug_rgn_dependencies): Likewise.
	(free_rgn_deps): Likewise.
	(compute_priorities): Likewise.
	(schedule_region): Likewise.
	* sel-sched.c (find_ebb_boundaries): Likewise.

	* config/sh/sh.c (find_insn_regmode_weight): Strengthen locals
	"insn", "next_tail", "head", "tail" from rtx to rtx_insn *.
---
 gcc/config/sh/sh.c |  2 +-
 gcc/ddg.c          |  2 +-
 gcc/haifa-sched.c  | 15 ++++++++-------
 gcc/modulo-sched.c | 20 ++++++++++----------
 gcc/sched-int.h    |  3 ++-
 gcc/sched-rgn.c    | 22 +++++++++++-----------
 gcc/sel-sched.c    |  2 +-
 7 files changed, 34 insertions(+), 32 deletions(-)

diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index df6a5bb..a1374e0 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -11067,7 +11067,7 @@ find_insn_regmode_weight (rtx insn, enum machine_mode mode)
 static void
 find_regmode_weight (basic_block b, enum machine_mode mode)
 {
-  rtx insn, next_tail, head, tail;
+  rtx_insn *insn, *next_tail, *head, *tail;
 
   get_ebb_head_tail (b, b, &head, &tail);
   next_tail = NEXT_INSN (tail);
diff --git a/gcc/ddg.c b/gcc/ddg.c
index 1da2836..6baca86 100644
--- a/gcc/ddg.c
+++ b/gcc/ddg.c
@@ -507,7 +507,7 @@ build_intra_loop_deps (ddg_ptr g)
   int i;
   /* Hold the dependency analysis state during dependency calculations.  */
   struct deps_desc tmp_deps;
-  rtx head, tail;
+  rtx_insn *head, *tail;
 
   /* Build the dependence information, using the sched_analyze function.  */
   init_deps_global ();
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index fd46977..4e8a772 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -4686,12 +4686,13 @@ resolve_dependencies (rtx insn)
 /* Return the head and tail pointers of ebb starting at BEG and ending
    at END.  */
 void
-get_ebb_head_tail (basic_block beg, basic_block end, rtx *headp, rtx *tailp)
+get_ebb_head_tail (basic_block beg, basic_block end,
+		   rtx_insn **headp, rtx_insn **tailp)
 {
-  rtx beg_head = BB_HEAD (beg);
-  rtx beg_tail = BB_END (beg);
-  rtx end_head = BB_HEAD (end);
-  rtx end_tail = BB_END (end);
+  rtx_insn *beg_head = BB_HEAD (beg);
+  rtx_insn * beg_tail = BB_END (beg);
+  rtx_insn * end_head = BB_HEAD (end);
+  rtx_insn * end_tail = BB_END (end);
 
   /* Don't include any notes or labels at the beginning of the BEG
      basic block, or notes at the end of the END basic blocks.  */
@@ -4704,7 +4705,7 @@ get_ebb_head_tail (basic_block beg, basic_block end, rtx *headp, rtx *tailp)
       beg_head = NEXT_INSN (beg_head);
     else if (DEBUG_INSN_P (beg_head))
       {
-	rtx note, next;
+	rtx_insn * note, *next;
 
 	for (note = NEXT_INSN (beg_head);
 	     note != beg_tail;
@@ -4742,7 +4743,7 @@ get_ebb_head_tail (basic_block beg, basic_block end, rtx *headp, rtx *tailp)
       end_tail = PREV_INSN (end_tail);
     else if (DEBUG_INSN_P (end_tail))
       {
-	rtx note, prev;
+	rtx_insn * note, *prev;
 
 	for (note = PREV_INSN (end_tail);
 	     note != end_head;
diff --git a/gcc/modulo-sched.c b/gcc/modulo-sched.c
index 16caa8f..328026a 100644
--- a/gcc/modulo-sched.c
+++ b/gcc/modulo-sched.c
@@ -392,17 +392,17 @@ doloop_register_get (rtx head ATTRIBUTE_UNUSED, rtx tail ATTRIBUTE_UNUSED)
 
 /* Check if COUNT_REG is set to a constant in the PRE_HEADER block, so
    that the number of iterations is a compile-time constant.  If so,
-   return the rtx that sets COUNT_REG to a constant, and set COUNT to
+   return the rtx_insn that sets COUNT_REG to a constant, and set COUNT to
    this constant.  Otherwise return 0.  */
-static rtx
+static rtx_insn *
 const_iteration_count (rtx count_reg, basic_block pre_header,
 		       int64_t * count)
 {
-  rtx insn;
-  rtx head, tail;
+  rtx_insn *insn;
+  rtx_insn *head, *tail;
 
   if (! pre_header)
-    return NULL_RTX;
+    return NULL;
 
   get_ebb_head_tail (pre_header, pre_header, &head, &tail);
 
@@ -418,10 +418,10 @@ const_iteration_count (rtx count_reg, basic_block pre_header,
 	    return insn;
 	  }
 
-	return NULL_RTX;
+	return NULL;
       }
 
-  return NULL_RTX;
+  return NULL;
 }
 
 /* A very simple resource-based lower bound on the initiation interval.
@@ -1211,7 +1211,7 @@ loop_single_full_bb_p (struct loop *loop)
 
   for (i = 0; i < loop->num_nodes ; i++)
     {
-      rtx head, tail;
+      rtx_insn *head, *tail;
       bool empty_bb = true;
 
       if (bbs[i] == loop->header)
@@ -1399,7 +1399,7 @@ sms_schedule (void)
      indexed by the loop index.  */
   FOR_EACH_LOOP (loop, 0)
     {
-      rtx head, tail;
+      rtx_insn *head, *tail;
       rtx count_reg;
 
       /* For debugging.  */
@@ -1537,7 +1537,7 @@ sms_schedule (void)
   /* We don't want to perform SMS on new loops - created by versioning.  */
   FOR_EACH_LOOP (loop, 0)
     {
-      rtx head, tail;
+      rtx_insn *head, *tail;
       rtx count_reg, count_init;
       int mii, rec_mii, stage_count, min_cycle;
       int64_t loop_count = 0;
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index 7f236a1..df7795d 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -1342,7 +1342,8 @@ extern void finish_live_range_shrinkage (void);
 extern void sched_init_region_reg_pressure_info (void);
 extern void free_global_sched_pressure_data (void);
 extern int haifa_classify_insn (const_rtx);
-extern void get_ebb_head_tail (basic_block, basic_block, rtx *, rtx *);
+extern void get_ebb_head_tail (basic_block, basic_block,
+			       rtx_insn **, rtx_insn **);
 extern int no_real_insns_p (const_rtx, const_rtx);
 
 extern int insn_cost (rtx);
diff --git a/gcc/sched-rgn.c b/gcc/sched-rgn.c
index 53ba0a4..f8660f8 100644
--- a/gcc/sched-rgn.c
+++ b/gcc/sched-rgn.c
@@ -2140,9 +2140,9 @@ init_ready_list (void)
   for (bb_src = target_bb + 1; bb_src < current_nr_blocks; bb_src++)
     if (IS_VALID (bb_src))
       {
-	rtx src_head;
-	rtx src_next_tail;
-	rtx tail, head;
+	rtx_insn *src_head;
+	rtx_insn *src_next_tail;
+	rtx_insn *tail, *head;
 
 	get_ebb_head_tail (EBB_FIRST_BB (bb_src), EBB_LAST_BB (bb_src),
 			   &head, &tail);
@@ -2721,7 +2721,7 @@ propagate_deps (int bb, struct deps_desc *pred_deps)
 static void
 compute_block_dependences (int bb)
 {
-  rtx head, tail;
+  rtx_insn *head, *tail;
   struct deps_desc tmp_deps;
 
   tmp_deps = bb_deps[bb];
@@ -2750,8 +2750,8 @@ compute_block_dependences (int bb)
 static void
 free_block_dependencies (int bb)
 {
-  rtx head;
-  rtx tail;
+  rtx_insn *head;
+  rtx_insn *tail;
 
   get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
 
@@ -2793,7 +2793,7 @@ debug_rgn_dependencies (int from_bb)
 
   for (bb = from_bb; bb < current_nr_blocks; bb++)
     {
-      rtx head, tail;
+      rtx_insn *head, *tail;
 
       get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
       fprintf (sched_dump, "\n;;   --- Region Dependences --- b %d bb %d \n",
@@ -2894,7 +2894,7 @@ free_rgn_deps (void)
 
   for (bb = 0; bb < current_nr_blocks; bb++)
     {
-      rtx head, tail;
+      rtx_insn *head, *tail;
 
       gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
       get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
@@ -2914,7 +2914,7 @@ compute_priorities (void)
   current_sched_info->sched_max_insns_priority = 0;
   for (bb = 0; bb < current_nr_blocks; bb++)
     {
-      rtx head, tail;
+      rtx_insn *head, *tail;
 
       gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
       get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
@@ -3025,7 +3025,7 @@ schedule_region (int rgn)
       for (bb = 0; bb < current_nr_blocks; bb++)
 	{
 	  basic_block first_bb, last_bb;
-	  rtx head, tail;
+	  rtx_insn *head, *tail;
 
 	  first_bb = EBB_FIRST_BB (bb);
 	  last_bb = EBB_LAST_BB (bb);
@@ -3045,7 +3045,7 @@ schedule_region (int rgn)
   for (bb = 0; bb < current_nr_blocks; bb++)
     {
       basic_block first_bb, last_bb, curr_bb;
-      rtx head, tail;
+      rtx_insn *head, *tail;
 
       first_bb = EBB_FIRST_BB (bb);
       last_bb = EBB_LAST_BB (bb);
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index 8181ec2..d697b95 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -7031,7 +7031,7 @@ simplify_changed_insns (void)
 static void
 find_ebb_boundaries (basic_block bb, bitmap scheduled_blocks)
 {
-  insn_t head, tail;
+  rtx_insn *head, *tail;
   basic_block bb1 = bb;
   if (sched_verbose >= 2)
     sel_print ("Finishing schedule in bbs: ");
-- 
1.8.5.3

[PATCH 072/236] explow.c: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* explow.c (force_reg): Strengthen local "insn" from rtx to
	rtx_insn *.
	(adjust_stack_1): Likewise.
	(allocate_dynamic_stack_space): Likewise.  Strengthen locals
	"final_label", "available_label", "space_available" from rtx to
	rtx_code_label *.
	(probe_stack_range): Likewise for locals "loop_lab", "end_lab".
	(anti_adjust_stack_and_probe): Likewise.
---
 gcc/explow.c | 30 +++++++++++++++++-------------
 1 file changed, 17 insertions(+), 13 deletions(-)

diff --git a/gcc/explow.c b/gcc/explow.c
index e39db05..88beb3b 100644
--- a/gcc/explow.c
+++ b/gcc/explow.c
@@ -649,7 +649,8 @@ copy_to_mode_reg (enum machine_mode mode, rtx x)
 rtx
 force_reg (enum machine_mode mode, rtx x)
 {
-  rtx temp, insn, set;
+  rtx temp, set;
+  rtx_insn *insn;
 
   if (REG_P (x))
     return x;
@@ -880,7 +881,8 @@ static bool suppress_reg_args_size;
 static void
 adjust_stack_1 (rtx adjust, bool anti_p)
 {
-  rtx temp, insn;
+  rtx temp;
+  rtx_insn *insn;
 
 #ifndef STACK_GROWS_DOWNWARD
   /* Hereafter anti_p means subtract_p.  */
@@ -1160,7 +1162,8 @@ allocate_dynamic_stack_space (rtx size, unsigned size_align,
 			      unsigned required_align, bool cannot_accumulate)
 {
   HOST_WIDE_INT stack_usage_size = -1;
-  rtx final_label, final_target, target;
+  rtx_code_label *final_label;
+  rtx final_target, target;
   unsigned extra_align = 0;
   bool must_align;
 
@@ -1184,7 +1187,8 @@ allocate_dynamic_stack_space (rtx size, unsigned size_align,
         {
 	  /* Look into the last emitted insn and see if we can deduce
 	     something for the register.  */
-	  rtx insn, set, note;
+	  rtx_insn *insn;
+	  rtx set, note;
 	  insn = get_last_insn ();
 	  if ((set = single_set (insn)) && rtx_equal_p (SET_DEST (set), size))
 	    {
@@ -1313,7 +1317,7 @@ allocate_dynamic_stack_space (rtx size, unsigned size_align,
 	current_function_has_unbounded_dynamic_stack_size = 1;
     }
 
-  final_label = NULL_RTX;
+  final_label = NULL;
   final_target = NULL_RTX;
 
   /* If we are splitting the stack, we need to ask the backend whether
@@ -1325,9 +1329,10 @@ allocate_dynamic_stack_space (rtx size, unsigned size_align,
      least it doesn't cause a stack overflow.  */
   if (flag_split_stack)
     {
-      rtx available_label, ask, space, func;
+      rtx_code_label *available_label;
+      rtx ask, space, func;
 
-      available_label = NULL_RTX;
+      available_label = NULL;
 
 #ifdef HAVE_split_stack_space_check
       if (HAVE_split_stack_space_check)
@@ -1420,7 +1425,7 @@ allocate_dynamic_stack_space (rtx size, unsigned size_align,
       if (crtl->limit_stack)
 	{
 	  rtx available;
-	  rtx space_available = gen_label_rtx ();
+	  rtx_code_label *space_available = gen_label_rtx ();
 #ifdef STACK_GROWS_DOWNWARD
 	  available = expand_binop (Pmode, sub_optab,
 				    stack_pointer_rtx, stack_limit_rtx,
@@ -1622,9 +1627,8 @@ probe_stack_range (HOST_WIDE_INT first, rtx size)
   else
     {
       rtx rounded_size, rounded_size_op, test_addr, last_addr, temp;
-      rtx loop_lab = gen_label_rtx ();
-      rtx end_lab = gen_label_rtx ();
-
+      rtx_code_label *loop_lab = gen_label_rtx ();
+      rtx_code_label *end_lab = gen_label_rtx ();
 
       /* Step 1: round SIZE to the previous multiple of the interval.  */
 
@@ -1770,8 +1774,8 @@ anti_adjust_stack_and_probe (rtx size, bool adjust_back)
   else
     {
       rtx rounded_size, rounded_size_op, last_addr, temp;
-      rtx loop_lab = gen_label_rtx ();
-      rtx end_lab = gen_label_rtx ();
+      rtx_code_label *loop_lab = gen_label_rtx ();
+      rtx_code_label *end_lab = gen_label_rtx ();
 
 
       /* Step 1: round SIZE to the previous multiple of the interval.  */
-- 
1.8.5.3

[PATCH 024/236] last_call_insn returns an rtx_call_insn *

[David Malcolm]

gcc/
	* emit-rtl.c (last_call_insn): Strengthen return type from rtx to
	rtx_call_insn *.
	* rtl.h (is_a_helper <rtx_call_insn *>::test): New overload, accepting
	an rtx_insn *.
	(last_call_insn): Strengthen return type from rtx to
	rtx_call_insn *.
---
 gcc/emit-rtl.c |  6 +++---
 gcc/rtl.h      | 10 +++++++++-
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 5175284..39e73a2 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3369,17 +3369,17 @@ prev_real_insn (rtx insn)
 /* Return the last CALL_INSN in the current list, or 0 if there is none.
    This routine does not look inside SEQUENCEs.  */
 
-rtx
+rtx_call_insn *
 last_call_insn (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = get_last_insn ();
        insn && !CALL_P (insn);
        insn = PREV_INSN (insn))
     ;
 
-  return insn;
+  return as_a_nullable <rtx_call_insn *> (insn);
 }
 
 /* Find the next insn after INSN that really does something.  This routine
diff --git a/gcc/rtl.h b/gcc/rtl.h
index e29cda3..85b725a 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -753,6 +753,14 @@ is_a_helper <rtx_call_insn *>::test (rtx rt)
 template <>
 template <>
 inline bool
+is_a_helper <rtx_call_insn *>::test (rtx_insn *insn)
+{
+  return CALL_P (insn);
+}
+
+template <>
+template <>
+inline bool
 is_a_helper <rtx_jump_table_data *>::test (rtx rt)
 {
   return JUMP_TABLE_DATA_P (rt);
@@ -2394,7 +2402,7 @@ extern rtx gen_use (rtx);
 extern rtx emit_use (rtx);
 extern rtx make_insn_raw (rtx);
 extern void add_function_usage_to (rtx, rtx);
-extern rtx last_call_insn (void);
+extern rtx_call_insn *last_call_insn (void);
 extern rtx_insn *previous_insn (rtx);
 extern rtx_insn *next_insn (rtx);
 extern rtx_insn *prev_nonnote_insn (rtx);
-- 
1.8.5.3

Re: [PATCH 024/236] last_call_insn returns an rtx_call_insn *

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* emit-rtl.c (last_call_insn): Strengthen return type from rtx to
> 	rtx_call_insn *.
> 	* rtl.h (is_a_helper <rtx_call_insn *>::test): New overload, accepting
> 	an rtx_insn *.
> 	(last_call_insn): Strengthen return type from rtx to
> 	rtx_call_insn *.
OK.
Jeff

Re: [PATCH 024/236] last_call_insn returns an rtx_call_insn *

[David Malcolm]

On Tue, 2014-08-12 at 21:52 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* emit-rtl.c (last_call_insn): Strengthen return type from rtx to
> > 	rtx_call_insn *.
> > 	* rtl.h (is_a_helper <rtx_call_insn *>::test): New overload, accepting
> > 	an rtx_insn *.
> > 	(last_call_insn): Strengthen return type from rtx to
> > 	rtx_call_insn *.
> OK.

Thanks; committed to trunk as r214186 (fixing up as_a_nullable to
safe_as_a).

[PATCH 174/236] Remove VINSN_INSN_RTX scaffolding

[David Malcolm]

gcc/
	* sel-sched-ir.h (struct vinsn_def): Strengthen field "insn_rtx"
	from rtx to rtx_insn *.
        (VINSN_INSN_RTX): Eliminate rvalue function and...
	(SET_VINSN_INSN): ...lvalue function in favor of...
	(VINSN_INSN_RTX): reinstate this old macro.

	* sel-sched-ir.c (vinsn_init): Eliminate use of SET_VINSN_INSN_RTX
	in favor of VINSN_INSN_RTX.
	(VINSN_INSN_RTX): Delete this function.
	(SET_VINSN_INSN_RTX): Likewise.

/
	* rtx-classes-status.txt: Delete SET_VINSN_INSN_RTX.
---
 gcc/sel-sched-ir.c     | 12 +-----------
 gcc/sel-sched-ir.h     |  5 ++---
 rtx-classes-status.txt |  1 -
 3 files changed, 3 insertions(+), 15 deletions(-)

diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index a15bfc0..a996cc8 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -1182,7 +1182,7 @@ vinsn_init (vinsn_t vi, insn_t insn, bool force_unique_p)
   hash_rtx_callback_function hrcf;
   int insn_class;
 
-  SET_VINSN_INSN_RTX (vi) = insn;
+  VINSN_INSN_RTX (vi) = insn;
   VINSN_COUNT (vi) = 0;
   vi->cost = -1;
 
@@ -6454,14 +6454,4 @@ sel_remove_loop_preheader (void)
 			       preheader_blocks);
 }
 
-rtx_insn *VINSN_INSN_RTX (vinsn_t vi)
-{
-  return as_a_nullable <rtx_insn *> (vi->insn_rtx);
-}
-
-rtx& SET_VINSN_INSN_RTX (vinsn_t vi)
-{
-  return vi->insn_rtx;
-}
-
 #endif
diff --git a/gcc/sel-sched-ir.h b/gcc/sel-sched-ir.h
index 118e001..9f1fb6b 100644
--- a/gcc/sel-sched-ir.h
+++ b/gcc/sel-sched-ir.h
@@ -655,7 +655,7 @@ struct idata_def
 struct vinsn_def
 {
   /* Associated insn.  */
-  rtx insn_rtx;
+  rtx_insn *insn_rtx;
 
   /* Its description.  */
   struct idata_def id;
@@ -677,8 +677,7 @@ struct vinsn_def
   bool may_trap_p;
 };
 
-extern rtx_insn *VINSN_INSN_RTX (vinsn_t);
-extern rtx& SET_VINSN_INSN_RTX (vinsn_t);
+#define VINSN_INSN_RTX(VI) ((VI)->insn_rtx)
 #define VINSN_PATTERN(VI) (PATTERN (VINSN_INSN_RTX (VI)))
 
 #define VINSN_ID(VI) (&((VI)->id))
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index 29d445f..347114b 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -14,4 +14,3 @@ TODO: "Scaffolding" to be removed
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER
 * SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
-* SET_VINSN_INSN_RTX
-- 
1.8.5.3

[PATCH 039/236] create_insn_rtx_from_pattern and create_copy_of_insn_rtx return rtx_insn

[David Malcolm]

gcc/
	* sel-sched-ir.h (create_insn_rtx_from_pattern): Strengthen return
	type from rtx to rtx_insn *.
	* sel-sched-ir.h (create_copy_of_insn_rtx): Likewise.
	* sel-sched-ir.c (create_insn_rtx_from_pattern): Likewise.
	* sel-sched-ir.c (create_copy_of_insn_rtx): Likewise, also for
	local "res".
---
 gcc/sel-sched-ir.c | 9 +++++----
 gcc/sel-sched-ir.h | 4 ++--
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 43569ee..f51f4f3 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -5724,10 +5724,10 @@ sel_unregister_cfg_hooks (void)
 
 /* Emit an insn rtx based on PATTERN.  If a jump insn is wanted,
    LABEL is where this jump should be directed.  */
-rtx
+rtx_insn *
 create_insn_rtx_from_pattern (rtx pattern, rtx label)
 {
-  rtx insn_rtx;
+  rtx_insn *insn_rtx;
 
   gcc_assert (!INSN_P (pattern));
 
@@ -5767,10 +5767,11 @@ create_vinsn_from_insn_rtx (rtx insn_rtx, bool force_unique_p)
 }
 
 /* Create a copy of INSN_RTX.  */
-rtx
+rtx_insn *
 create_copy_of_insn_rtx (rtx insn_rtx)
 {
-  rtx res, link;
+  rtx_insn *res;
+  rtx link;
 
   if (DEBUG_INSN_P (insn_rtx))
     return create_insn_rtx_from_pattern (copy_rtx (PATTERN (insn_rtx)),
diff --git a/gcc/sel-sched-ir.h b/gcc/sel-sched-ir.h
index 16e7806..d2bf7e2 100644
--- a/gcc/sel-sched-ir.h
+++ b/gcc/sel-sched-ir.h
@@ -1629,9 +1629,9 @@ extern void sel_register_cfg_hooks (void);
 extern void sel_unregister_cfg_hooks (void);
 
 /* Expression transformation routines.  */
-extern rtx create_insn_rtx_from_pattern (rtx, rtx);
+extern rtx_insn *create_insn_rtx_from_pattern (rtx, rtx);
 extern vinsn_t create_vinsn_from_insn_rtx (rtx, bool);
-extern rtx create_copy_of_insn_rtx (rtx);
+extern rtx_insn *create_copy_of_insn_rtx (rtx);
 extern void change_vinsn_in_expr (expr_t, vinsn_t);
 
 /* Various initialization functions.  */
-- 
1.8.5.3

Re: [PATCH 039/236] create_insn_rtx_from_pattern and create_copy_of_insn_rtx return rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* sel-sched-ir.h (create_insn_rtx_from_pattern): Strengthen return
> 	type from rtx to rtx_insn *.
> 	* sel-sched-ir.h (create_copy_of_insn_rtx): Likewise.
> 	* sel-sched-ir.c (create_insn_rtx_from_pattern): Likewise.
> 	* sel-sched-ir.c (create_copy_of_insn_rtx): Likewise, also for
> 	local "res".
OK.
jeff

Re: [PATCH 039/236] create_insn_rtx_from_pattern and create_copy_of_insn_rtx return rtx_insn

[David Malcolm]

On Wed, 2014-08-13 at 12:02 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* sel-sched-ir.h (create_insn_rtx_from_pattern): Strengthen return
> > 	type from rtx to rtx_insn *.
> > 	* sel-sched-ir.h (create_copy_of_insn_rtx): Likewise.
> > 	* sel-sched-ir.c (create_insn_rtx_from_pattern): Likewise.
> > 	* sel-sched-ir.c (create_copy_of_insn_rtx): Likewise, also for
> > 	local "res".
> OK.
Thanks; committed to trunk as r214253.

Re: [PATCH 039/236] create_insn_rtx_from_pattern and create_copy_of_insn_rtx return rtx_insn

[Mike Stump]

On Aug 20, 2014, at 6:03 PM, David Malcolm <dmalcolm@redhat.com> wrote:
>> OK.
> Thanks; committed to trunk as r214253.

So, unless there is a consumer of this information, in general, you don’t need to let us know you checked things in.  We assume that by default.  Cases were it is useful, you check in someone else’s patch and you want them to know the patch is now in, or say, you want someone working with you to know the work went in, or someone depending upon a patch, you want them to know that they are now unblocked, say for testing or additional work.

[PATCH 216/236] PHASE 6: Use extra rtx_def subclasses

[David Malcolm]

/
	rtx-classes-status.txt: Update
---
 rtx-classes-status.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index e51b0f3..abd5c7f 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -5,8 +5,8 @@ Phase 1: initial "scaffolding" commits:            DONE
 Phase 2: per-file commits in main source dir:      DONE
 Phase 3: per-file commits within "config" subdirs: DONE
 Phase 4: removal of "scaffolding":                 DONE
-Phase 5: additional rtx_def subclasses:            IN PROGRESS
-Phase 6: use extra rtx_def subclasses:             TODO
+Phase 5: additional rtx_def subclasses:            DONE
+Phase 6: use extra rtx_def subclasses:             IN PROGRESS
 
 TODO: "Scaffolding" to be removed
 =================================
-- 
1.8.5.3

[PATCH 180/236] Params of add_insn and unlink_insn_chain

[David Malcolm]

gcc/
	* rtl.h (add_insn): Strengthen param from rtx to rtx_insn *.
	(unlink_insn_chain): Strengthen both params from rtx to
	rtx_insn *.

	* cfgrtl.c (cfg_layout_function_header): Likewise for this
	variable.
	(unlink_insn_chain): Likewise for params "first" and "last".
	Remove now-redundant checked cast.
	(record_effective_endpoints): Replace use of NULL_RTX with NULL.
	(fixup_reorder_chain): Strengthen local "insn" from rtx to
	rtx_insn *.
	* emit-rtl.c (link_insn_into_chain): Likewise for all three
	params.
	(add_insn): Likewise for param "insn" and local "prev".
	(add_insn_after_nobb): Likewise for both params and local "next".
	(add_insn_before_nobb): Likewise for both params and local "prev".
	(add_insn_after): Rename param "after" to "uncast_after",
	introducing local "after" with another checked cast.
	(add_insn_before): Rename params "insn" and "before", giving them
	"uncast_" prefixes, adding the old names back using checked casts.
	(emit_note_after): Likewise for param "after".
	(emit_note_before): Likewise for param "before".
	(emit_label): Add a checked cast.
---
 gcc/cfgrtl.c   | 10 +++++-----
 gcc/emit-rtl.c | 29 +++++++++++++++++------------
 gcc/rtl.h      |  4 ++--
 3 files changed, 24 insertions(+), 19 deletions(-)

diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 965517b..b20e871 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -65,7 +65,7 @@ along with GCC; see the file COPYING3.  If not see
 /* Holds the interesting leading and trailing notes for the function.
    Only applicable if the CFG is in cfglayout mode.  */
 static GTY(()) rtx_insn *cfg_layout_function_footer;
-static GTY(()) rtx cfg_layout_function_header;
+static GTY(()) rtx_insn *cfg_layout_function_header;
 
 static rtx_insn *skip_insns_after_block (basic_block);
 static void record_effective_endpoints (void);
@@ -3306,7 +3306,7 @@ fixup_abnormal_edges (void)
 /* Cut the insns from FIRST to LAST out of the insns stream.  */
 
 rtx_insn *
-unlink_insn_chain (rtx first, rtx last)
+unlink_insn_chain (rtx_insn *first, rtx_insn *last)
 {
   rtx_insn *prevfirst = PREV_INSN (first);
   rtx_insn *nextlast = NEXT_INSN (last);
@@ -3321,7 +3321,7 @@ unlink_insn_chain (rtx first, rtx last)
     set_last_insn (prevfirst);
   if (!prevfirst)
     set_first_insn (nextlast);
-  return as_a <rtx_insn *> (first);
+  return first;
 }
 \f
 /* Skip over inter-block insns occurring after BB which are typically
@@ -3449,7 +3449,7 @@ record_effective_endpoints (void)
     cfg_layout_function_header =
 	    unlink_insn_chain (get_insns (), PREV_INSN (insn));
   else
-    cfg_layout_function_header = NULL_RTX;
+    cfg_layout_function_header = NULL;
 
   next_insn = get_insns ();
   FOR_EACH_BB_FN (bb, cfun)
@@ -3642,7 +3642,7 @@ static void
 fixup_reorder_chain (void)
 {
   basic_block bb;
-  rtx insn = NULL;
+  rtx_insn *insn = NULL;
 
   if (cfg_layout_function_header)
     {
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 7a6a069..2d0f506 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3860,7 +3860,7 @@ make_note_raw (enum insn_note subtype)
    but also BARRIERs and JUMP_TABLE_DATAs.  PREV and NEXT may be NULL.  */
 
 static inline void
-link_insn_into_chain (rtx insn, rtx prev, rtx next)
+link_insn_into_chain (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
 {
   SET_PREV_INSN (insn) = prev;
   SET_NEXT_INSN (insn) = next;
@@ -3892,9 +3892,9 @@ link_insn_into_chain (rtx insn, rtx prev, rtx next)
    INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE.  */
 
 void
-add_insn (rtx insn)
+add_insn (rtx_insn *insn)
 {
-  rtx prev = get_last_insn ();
+  rtx_insn *prev = get_last_insn ();
   link_insn_into_chain (insn, prev, NULL);
   if (NULL == get_insns ())
     set_first_insn (insn);
@@ -3904,9 +3904,9 @@ add_insn (rtx insn)
 /* Add INSN into the doubly-linked list after insn AFTER.  */
 
 static void
-add_insn_after_nobb (rtx insn, rtx after)
+add_insn_after_nobb (rtx_insn *insn, rtx_insn *after)
 {
-  rtx next = NEXT_INSN (after);
+  rtx_insn *next = NEXT_INSN (after);
 
   gcc_assert (!optimize || !INSN_DELETED_P (after));
 
@@ -3933,9 +3933,9 @@ add_insn_after_nobb (rtx insn, rtx after)
 /* Add INSN into the doubly-linked list before insn BEFORE.  */
 
 static void
-add_insn_before_nobb (rtx insn, rtx before)
+add_insn_before_nobb (rtx_insn *insn, rtx_insn *before)
 {
-  rtx prev = PREV_INSN (before);
+  rtx_insn *prev = PREV_INSN (before);
 
   gcc_assert (!optimize || !INSN_DELETED_P (before));
 
@@ -3969,9 +3969,10 @@ add_insn_before_nobb (rtx insn, rtx before)
    they know how to update a SEQUENCE. */
 
 void
-add_insn_after (rtx uncast_insn, rtx after, basic_block bb)
+add_insn_after (rtx uncast_insn, rtx uncast_after, basic_block bb)
 {
   rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
+  rtx_insn *after = as_a <rtx_insn *> (uncast_after);
   add_insn_after_nobb (insn, after);
   if (!BARRIER_P (after)
       && !BARRIER_P (insn)
@@ -3998,8 +3999,10 @@ add_insn_after (rtx uncast_insn, rtx after, basic_block bb)
    they know how to update a SEQUENCE. */
 
 void
-add_insn_before (rtx insn, rtx before, basic_block bb)
+add_insn_before (rtx uncast_insn, rtx uncast_before, basic_block bb)
 {
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
+  rtx_insn *before = as_a <rtx_insn *> (uncast_before);
   add_insn_before_nobb (insn, before);
 
   if (!bb
@@ -4546,8 +4549,9 @@ note_outside_basic_block_p (enum insn_note subtype, bool on_bb_boundary_p)
 /* Emit a note of subtype SUBTYPE after the insn AFTER.  */
 
 rtx_note *
-emit_note_after (enum insn_note subtype, rtx after)
+emit_note_after (enum insn_note subtype, rtx uncast_after)
 {
+  rtx_insn *after = as_a <rtx_insn *> (uncast_after);
   rtx_note *note = make_note_raw (subtype);
   basic_block bb = BARRIER_P (after) ? NULL : BLOCK_FOR_INSN (after);
   bool on_bb_boundary_p = (bb != NULL && BB_END (bb) == after);
@@ -4562,8 +4566,9 @@ emit_note_after (enum insn_note subtype, rtx after)
 /* Emit a note of subtype SUBTYPE before the insn BEFORE.  */
 
 rtx_note *
-emit_note_before (enum insn_note subtype, rtx before)
+emit_note_before (enum insn_note subtype, rtx uncast_before)
 {
+  rtx_insn *before = as_a <rtx_insn *> (uncast_before);
   rtx_note *note = make_note_raw (subtype);
   basic_block bb = BARRIER_P (before) ? NULL : BLOCK_FOR_INSN (before);
   bool on_bb_boundary_p = (bb != NULL && BB_HEAD (bb) == before);
@@ -4980,7 +4985,7 @@ emit_label (rtx label)
 {
   gcc_checking_assert (INSN_UID (label) == 0);
   INSN_UID (label) = cur_insn_uid++;
-  add_insn (label);
+  add_insn (as_a <rtx_insn *> (label));
   return as_a <rtx_insn *> (label);
 }
 
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 82431f4..d6bb252 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3087,7 +3087,7 @@ extern unsigned int unshare_all_rtl (void);
 extern void unshare_all_rtl_again (rtx_insn *);
 extern void unshare_all_rtl_in_chain (rtx);
 extern void verify_rtl_sharing (void);
-extern void add_insn (rtx);
+extern void add_insn (rtx_insn *);
 extern void add_insn_before (rtx, rtx, basic_block);
 extern void add_insn_after (rtx, rtx, basic_block);
 extern void remove_insn (rtx);
@@ -3096,7 +3096,7 @@ extern void delete_insn (rtx);
 extern rtx_insn *entry_of_function (void);
 extern void emit_insn_at_entry (rtx);
 extern void delete_insn_chain (rtx, rtx, bool);
-extern rtx_insn *unlink_insn_chain (rtx, rtx);
+extern rtx_insn *unlink_insn_chain (rtx_insn *, rtx_insn *);
 extern void delete_insn_and_edges (rtx_insn *);
 extern rtx gen_lowpart_SUBREG (enum machine_mode, rtx);
 extern rtx gen_const_mem (enum machine_mode, rtx);
-- 
1.8.5.3

[PATCH 235/236] Make next_insn and previous_insn require an rtx_insn *

[David Malcolm]

gcc/
	* rtl.h (previous_insn): Strengthen param from rtx to rtx_insn *.
	(next_insn): Likewise.
	* emit-rtl.c (next_insn): Likewise.
	(previous_insn): Likewise.
	* config/pa/pa.c (remove_useless_addtr_insns): Strenghten locals
	"insn" and "next" from rtx to rtx_insn *.
	* config/picochip/picochip.c (picochip_reorg): Likewise for locals
	"insn", "insn1", "vliw_start",  "prologue_end_note",
	"last_insn_in_packet".
---
 gcc/config/pa/pa.c             | 5 +++--
 gcc/config/picochip/picochip.c | 6 +++---
 gcc/emit-rtl.c                 | 6 ++----
 gcc/rtl.h                      | 4 ++--
 4 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 9579db0..5b3688c 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -3314,7 +3314,7 @@ pa_output_ascii (FILE *file, const char *p, int size)
 static void
 remove_useless_addtr_insns (int check_notes)
 {
-  rtx insn;
+  rtx_insn *insn;
   static int pass = 0;
 
   /* This is fairly cheap, so always run it when optimizing.  */
@@ -3366,7 +3366,8 @@ remove_useless_addtr_insns (int check_notes)
 	 reverse the comparison & the branch to avoid add,tr insns.  */
       for (insn = get_insns (); insn; insn = next_insn (insn))
 	{
-	  rtx tmp, next;
+	  rtx tmp;
+	  rtx_insn *next;
 
 	  /* Ignore anything that isn't an INSN.  */
 	  if (! NONJUMP_INSN_P (insn))
diff --git a/gcc/config/picochip/picochip.c b/gcc/config/picochip/picochip.c
index 3131d28..c59bf76 100644
--- a/gcc/config/picochip/picochip.c
+++ b/gcc/config/picochip/picochip.c
@@ -3248,7 +3248,7 @@ reorder_var_tracking_notes (void)
 void
 picochip_reorg (void)
 {
-  rtx insn, insn1, vliw_start = NULL_RTX;
+  rtx_insn *insn, *insn1, *vliw_start = NULL;
   int vliw_insn_location = 0;
 
   /* We are freeing block_for_insn in the toplev to keep compatibility
@@ -3325,8 +3325,8 @@ picochip_reorg (void)
      of VLIW packets. */
   if (picochip_schedule_type == DFA_TYPE_SPEED)
     {
-      rtx prologue_end_note = NULL;
-      rtx last_insn_in_packet = NULL;
+      rtx_insn *prologue_end_note = NULL;
+      rtx_insn *last_insn_in_packet = NULL;
 
       for (insn = get_insns (); insn; insn = next_insn (insn))
 	{
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 2fc07d6..f6b9356 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3201,9 +3201,8 @@ get_max_insn_count (void)
    of the sequence.  */
 
 rtx_insn *
-next_insn (rtx uncast_insn)
+next_insn (rtx_insn *insn)
 {
-  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
   if (insn)
     {
       insn = NEXT_INSN (insn);
@@ -3219,9 +3218,8 @@ next_insn (rtx uncast_insn)
    of the sequence.  */
 
 rtx_insn *
-previous_insn (rtx uncast_insn)
+previous_insn (rtx_insn *insn)
 {
-  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
   if (insn)
     {
       insn = PREV_INSN (insn);
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 49ad08b..71aefc3 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2607,8 +2607,8 @@ extern rtx_insn *emit_use (rtx);
 extern rtx_insn *make_insn_raw (rtx);
 extern void add_function_usage_to (rtx, rtx);
 extern rtx_call_insn *last_call_insn (void);
-extern rtx_insn *previous_insn (rtx);
-extern rtx_insn *next_insn (rtx);
+extern rtx_insn *previous_insn (rtx_insn *);
+extern rtx_insn *next_insn (rtx_insn *);
 extern rtx_insn *prev_nonnote_insn (rtx);
 extern rtx_insn *prev_nonnote_insn_bb (rtx);
 extern rtx_insn *next_nonnote_insn (rtx);
-- 
1.8.5.3

[PATCH 161/236] reorder_insns requires rtx_insn *

[David Malcolm]

All in-tree users of reorder_insns should now use rtx_insn * for each
param.

gcc/
	* rtl.h (reorder_insns): Strengthen params "from", "to", "after"
	from rtx to rtx_insn *.

	* emit-rtl.c (reorder_insns): Likewise, also for local "insn".
---
 gcc/emit-rtl.c | 4 ++--
 gcc/rtl.h      | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 05b787b..74d6f80 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -4200,9 +4200,9 @@ reorder_insns_nobb (rtx from, rtx to, rtx after)
 
 /* Same as function above, but take care to update BB boundaries.  */
 void
-reorder_insns (rtx from, rtx to, rtx after)
+reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn *after)
 {
-  rtx prev = PREV_INSN (from);
+  rtx_insn *prev = PREV_INSN (from);
   basic_block bb, bb2;
 
   reorder_insns_nobb (from, to, after);
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 4c1d20b..0a245cc 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3048,7 +3048,7 @@ extern void mark_reg_pointer (rtx, int);
 extern void mark_user_reg (rtx);
 extern void reset_used_flags (rtx);
 extern void set_used_flags (rtx);
-extern void reorder_insns (rtx, rtx, rtx);
+extern void reorder_insns (rtx_insn *, rtx_insn *, rtx_insn *);
 extern void reorder_insns_nobb (rtx, rtx, rtx);
 extern int get_max_insn_count (void);
 extern int in_sequence_p (void);
-- 
1.8.5.3

[PATCH 098/236] postreload.c: Use rtx_insn (also touches rtl.h and cprop.c)

[David Malcolm]

Also, update fis_get_condition

gcc/
	* rtl.h (fis_get_condition): Strengthen param "jump" from rtx to
	rtx_insn *.

	* cprop.c (fis_get_condition): Likewise.

	* postreload.c (reload_cse_regs): Likewise for param "first".
	(reload_cse_simplify): Likewise for param "insn".
	(reload_cse_regs_1): Likewise for local "insn".
	(reload_cse_simplify_set): Likewise for param "insn".
	(reload_cse_simplify_operands): Likewise.
	(struct reg_use): Likewise for field "insn".
	(reload_combine_purge_insn_uses): Likewise for param "insn".
	(fixup_debug_insns): Likewise for params "from", "to" and local
	"insn".
	(try_replace_in_use): Likewise for local "use_insn".
	(reload_combine_recognize_const_pattern): Likewise for param
	"insn" and locals "add_moved_after_insn", "use_insn".
	(reload_combine_recognize_pattern): Likewise for param "insn" and
	local "prev".
	(reload_combine): Likewise for locals "insn", "prev".
	(reload_combine_note_use): Likewise for param "insn".
	(move2add_use_add2_insn): Likewise.
	(move2add_use_add3_insn): Likewise.
	(reload_cse_move2add): Likewise, also for local "next".
	(move2add_note_store): Likewise for local "insn".
---
 gcc/cprop.c      |  2 +-
 gcc/postreload.c | 56 ++++++++++++++++++++++++++++----------------------------
 gcc/rtl.h        |  2 +-
 3 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/gcc/cprop.c b/gcc/cprop.c
index 1378161..3826b74 100644
--- a/gcc/cprop.c
+++ b/gcc/cprop.c
@@ -1287,7 +1287,7 @@ local_cprop_pass (void)
    but this would require some code reorganization.  */
 
 rtx
-fis_get_condition (rtx jump)
+fis_get_condition (rtx_insn *jump)
 {
   return get_condition (jump, NULL, false, true);
 }
diff --git a/gcc/postreload.c b/gcc/postreload.c
index 29ba81b..a598ae5 100644
--- a/gcc/postreload.c
+++ b/gcc/postreload.c
@@ -46,23 +46,23 @@ along with GCC; see the file COPYING3.  If not see
 #include "dbgcnt.h"
 
 static int reload_cse_noop_set_p (rtx);
-static bool reload_cse_simplify (rtx, rtx);
+static bool reload_cse_simplify (rtx_insn *, rtx);
 static void reload_cse_regs_1 (void);
-static int reload_cse_simplify_set (rtx, rtx);
-static int reload_cse_simplify_operands (rtx, rtx);
+static int reload_cse_simplify_set (rtx, rtx_insn *);
+static int reload_cse_simplify_operands (rtx_insn *, rtx);
 
 static void reload_combine (void);
-static void reload_combine_note_use (rtx *, rtx, int, rtx);
+static void reload_combine_note_use (rtx *, rtx_insn *, int, rtx);
 static void reload_combine_note_store (rtx, const_rtx, void *);
 
-static bool reload_cse_move2add (rtx);
+static bool reload_cse_move2add (rtx_insn *);
 static void move2add_note_store (rtx, const_rtx, void *);
 
 /* Call cse / combine like post-reload optimization phases.
    FIRST is the first instruction.  */
 
 static void
-reload_cse_regs (rtx first ATTRIBUTE_UNUSED)
+reload_cse_regs (rtx_insn *first ATTRIBUTE_UNUSED)
 {
   bool moves_converted;
   reload_cse_regs_1 ();
@@ -88,7 +88,7 @@ reload_cse_noop_set_p (rtx set)
 
 /* Try to simplify INSN.  Return true if the CFG may have changed.  */
 static bool
-reload_cse_simplify (rtx insn, rtx testreg)
+reload_cse_simplify (rtx_insn *insn, rtx testreg)
 {
   rtx body = PATTERN (insn);
   basic_block insn_bb = BLOCK_FOR_INSN (insn);
@@ -207,7 +207,7 @@ reload_cse_regs_1 (void)
 {
   bool cfg_changed = false;
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
   rtx testreg = gen_rtx_REG (VOIDmode, -1);
 
   cselib_init (CSELIB_RECORD_MEMORY);
@@ -236,7 +236,7 @@ reload_cse_regs_1 (void)
    and change the set into a register copy.  */
 
 static int
-reload_cse_simplify_set (rtx set, rtx insn)
+reload_cse_simplify_set (rtx set, rtx_insn *insn)
 {
   int did_change = 0;
   int dreg;
@@ -380,7 +380,7 @@ reload_cse_simplify_set (rtx set, rtx insn)
    hard registers.  */
 
 static int
-reload_cse_simplify_operands (rtx insn, rtx testreg)
+reload_cse_simplify_operands (rtx_insn *insn, rtx testreg)
 {
   int i, j;
 
@@ -686,7 +686,7 @@ reload_cse_simplify_operands (rtx insn, rtx testreg)
 struct reg_use
 {
   /* The insn where a register has been used.  */
-  rtx insn;
+  rtx_insn *insn;
   /* Points to the memory reference enclosing the use, if any, NULL_RTX
      otherwise.  */
   rtx containing_mem;
@@ -784,7 +784,7 @@ reload_combine_split_ruids (int split_ruid)
    information about uses in that particular insn.  */
 
 static void
-reload_combine_purge_insn_uses (rtx insn)
+reload_combine_purge_insn_uses (rtx_insn *insn)
 {
   unsigned i;
 
@@ -869,9 +869,9 @@ reload_combine_closest_single_use (unsigned regno, int ruid_limit)
    should make this change on debug insns.  */
 
 static void
-fixup_debug_insns (rtx reg, rtx replacement, rtx from, rtx to)
+fixup_debug_insns (rtx reg, rtx replacement, rtx_insn *from, rtx_insn *to)
 {
-  rtx insn;
+  rtx_insn *insn;
   for (insn = from; insn != to; insn = NEXT_INSN (insn))
     {
       rtx t;
@@ -892,7 +892,7 @@ fixup_debug_insns (rtx reg, rtx replacement, rtx from, rtx to)
 static bool
 try_replace_in_use (struct reg_use *use, rtx reg, rtx src)
 {
-  rtx use_insn = use->insn;
+  rtx_insn *use_insn = use->insn;
   rtx mem = use->containing_mem;
   bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (use_insn));
 
@@ -947,14 +947,14 @@ try_replace_in_use (struct reg_use *use, rtx reg, rtx src)
    recognized and should be handled normally.  */
 
 static bool
-reload_combine_recognize_const_pattern (rtx insn)
+reload_combine_recognize_const_pattern (rtx_insn *insn)
 {
   int from_ruid = reload_combine_ruid;
   rtx set, pat, reg, src, addreg;
   unsigned int regno;
   struct reg_use *use;
   bool must_move_add;
-  rtx add_moved_after_insn = NULL_RTX;
+  rtx_insn *add_moved_after_insn = NULL;
   int add_moved_after_ruid = 0;
   int clobbered_regno = -1;
 
@@ -1010,7 +1010,7 @@ reload_combine_recognize_const_pattern (rtx insn)
       if (use && GET_MODE (*use->usep) == Pmode)
 	{
 	  bool delete_add = false;
-	  rtx use_insn = use->insn;
+	  rtx_insn *use_insn = use->insn;
 	  int use_ruid = use->ruid;
 
 	  /* Avoid moving the add insn past a jump.  */
@@ -1091,7 +1091,7 @@ reload_combine_recognize_const_pattern (rtx insn)
    INSN; false if it wasn't recognized and should be handled normally.  */
 
 static bool
-reload_combine_recognize_pattern (rtx insn)
+reload_combine_recognize_pattern (rtx_insn *insn)
 {
   rtx set, reg, src;
   unsigned int regno;
@@ -1133,7 +1133,7 @@ reload_combine_recognize_pattern (rtx insn)
       && last_label_ruid < reg_state[regno].use_ruid)
     {
       rtx base = XEXP (src, 1);
-      rtx prev = prev_nonnote_nondebug_insn (insn);
+      rtx_insn *prev = prev_nonnote_nondebug_insn (insn);
       rtx prev_set = prev ? single_set (prev) : NULL_RTX;
       rtx index_reg = NULL_RTX;
       rtx reg_sum = NULL_RTX;
@@ -1242,7 +1242,7 @@ reload_combine_recognize_pattern (rtx insn)
 static void
 reload_combine (void)
 {
-  rtx insn, prev;
+  rtx_insn *insn, *prev;
   basic_block bb;
   unsigned int r;
   int min_labelno, n_labels;
@@ -1507,7 +1507,7 @@ reload_combine_note_store (rtx dst, const_rtx set, void *data ATTRIBUTE_UNUSED)
    *XP is the pattern of INSN, or a part of it.
    Called from reload_combine, and recursively by itself.  */
 static void
-reload_combine_note_use (rtx *xp, rtx insn, int ruid, rtx containing_mem)
+reload_combine_note_use (rtx *xp, rtx_insn *insn, int ruid, rtx containing_mem)
 {
   rtx x = *xp;
   enum rtx_code code = x->code;
@@ -1761,7 +1761,7 @@ move2add_valid_value_p (int regno, enum machine_mode mode)
    Return true if we made a change.  */
 
 static bool
-move2add_use_add2_insn (rtx reg, rtx sym, rtx off, rtx insn)
+move2add_use_add2_insn (rtx reg, rtx sym, rtx off, rtx_insn *insn)
 {
   rtx pat = PATTERN (insn);
   rtx src = SET_SRC (pat);
@@ -1842,7 +1842,7 @@ move2add_use_add2_insn (rtx reg, rtx sym, rtx off, rtx insn)
    Return true iff we made a change.  */
 
 static bool
-move2add_use_add3_insn (rtx reg, rtx sym, rtx off, rtx insn)
+move2add_use_add3_insn (rtx reg, rtx sym, rtx off, rtx_insn *insn)
 {
   rtx pat = PATTERN (insn);
   rtx src = SET_SRC (pat);
@@ -1916,10 +1916,10 @@ move2add_use_add3_insn (rtx reg, rtx sym, rtx off, rtx insn)
 /* Convert move insns with constant inputs to additions if they are cheaper.
    Return true if any changes were made.  */
 static bool
-reload_cse_move2add (rtx first)
+reload_cse_move2add (rtx_insn *first)
 {
   int i;
-  rtx insn;
+  rtx_insn *insn;
   bool changed = false;
 
   for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
@@ -1999,7 +1999,7 @@ reload_cse_move2add (rtx first)
 		       && reg_base_reg[regno] == reg_base_reg[REGNO (src)]
 		       && move2add_valid_value_p (REGNO (src), GET_MODE (reg)))
 		{
-		  rtx next = next_nonnote_nondebug_insn (insn);
+		  rtx_insn *next = next_nonnote_nondebug_insn (insn);
 		  rtx set = NULL_RTX;
 		  if (next)
 		    set = single_set (next);
@@ -2167,7 +2167,7 @@ reload_cse_move2add (rtx first)
 static void
 move2add_note_store (rtx dst, const_rtx set, void *data)
 {
-  rtx insn = (rtx) data;
+  rtx_insn *insn = (rtx_insn *) data;
   unsigned int regno = 0;
   enum machine_mode mode = GET_MODE (dst);
 
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 992d4af..759d9be 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3161,7 +3161,7 @@ extern void init_lower_subreg (void);
 /* In gcse.c */
 extern bool can_copy_p (enum machine_mode);
 extern bool can_assign_to_reg_without_clobbers_p (rtx);
-extern rtx fis_get_condition (rtx);
+extern rtx fis_get_condition (rtx_insn *);
 
 /* In ira.c */
 #ifdef HARD_CONST
-- 
1.8.5.3

[PATCH 070/236] dwarf2out.c: Use rtx_insn

[David Malcolm]

gcc/
	* dwarf2out.c (last_var_location_insn): Strengthen this variable
	from rtx to rtx_insn *.
	(cached_next_real_insn): Likewise.
	(dwarf2out_end_epilogue): Replace use of NULL_RTX with NULL when
	working with insns.
	(dwarf2out_var_location): Strengthen locals "next_real",
	"next_note", "expected_next_loc_note", "last_start", "insn" from
	rtx to rtx_insn *.
---
 gcc/dwarf2out.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
index 320d367..92f5c83 100644
--- a/gcc/dwarf2out.c
+++ b/gcc/dwarf2out.c
@@ -99,8 +99,8 @@ along with GCC; see the file COPYING3.  If not see
 #include "gdb/gdb-index.h"
 
 static void dwarf2out_source_line (unsigned int, const char *, int, bool);
-static rtx last_var_location_insn;
-static rtx cached_next_real_insn;
+static rtx_insn *last_var_location_insn;
+static rtx_insn *cached_next_real_insn;
 
 #ifdef VMS_DEBUGGING_INFO
 int vms_file_stats_name (const char *, long long *, long *, char *, int *);
@@ -1137,8 +1137,8 @@ dwarf2out_end_epilogue (unsigned int line ATTRIBUTE_UNUSED,
   dw_fde_ref fde;
   char label[MAX_ARTIFICIAL_LABEL_BYTES];
 
-  last_var_location_insn = NULL_RTX;
-  cached_next_real_insn = NULL_RTX;
+  last_var_location_insn = NULL;
+  cached_next_real_insn = NULL;
 
   if (dwarf2out_do_cfi_asm ())
     fprintf (asm_out_file, "\t.cfi_endproc\n");
@@ -21309,11 +21309,11 @@ dwarf2out_var_location (rtx_insn *loc_note)
 {
   char loclabel[MAX_ARTIFICIAL_LABEL_BYTES + 2];
   struct var_loc_node *newloc;
-  rtx next_real, next_note;
+  rtx_insn *next_real, *next_note;
   static const char *last_label;
   static const char *last_postcall_label;
   static bool last_in_cold_section_p;
-  static rtx expected_next_loc_note;
+  static rtx_insn *expected_next_loc_note;
   tree decl;
   bool var_loc_p;
 
@@ -21340,7 +21340,7 @@ dwarf2out_var_location (rtx_insn *loc_note)
   if (next_real)
     {
       if (expected_next_loc_note != loc_note)
-	next_real = NULL_RTX;
+	next_real = NULL;
     }
 
   next_note = NEXT_INSN (loc_note);
@@ -21349,7 +21349,7 @@ dwarf2out_var_location (rtx_insn *loc_note)
       || ! NOTE_P (next_note)
       || (NOTE_KIND (next_note) != NOTE_INSN_VAR_LOCATION
 	  && NOTE_KIND (next_note) != NOTE_INSN_CALL_ARG_LOCATION))
-    next_note = NULL_RTX;
+    next_note = NULL;
 
   if (! next_real)
     next_real = next_real_insn (loc_note);
@@ -21360,7 +21360,7 @@ dwarf2out_var_location (rtx_insn *loc_note)
       cached_next_real_insn = next_real;
     }
   else
-    cached_next_real_insn = NULL_RTX;
+    cached_next_real_insn = NULL;
 
   /* If there are no instructions which would be affected by this note,
      don't do anything.  */
@@ -21413,8 +21413,8 @@ dwarf2out_var_location (rtx_insn *loc_note)
 	  && in_first_function_p
 	  && maybe_at_text_label_p)
 	{
-	  static rtx last_start;
-	  rtx insn;
+	  static rtx_insn *last_start;
+	  rtx_insn *insn;
 	  for (insn = loc_note; insn; insn = previous_insn (insn))
 	    if (insn == last_start)
 	      break;
-- 
1.8.5.3

[PATCH 110/236] rtlanal.c: Use rtx_insn

[David Malcolm]

	* rtlanal.c (reg_used_between_p): Strengthen local "insn" from rtx
	to rtx_insn *.
	(reg_set_between_p): Strengthen local "insn" from const_rtx to
	const rtx_insn *.
	(modified_between_p): Strengthen local "insn" from rtx to
	rtx_insn *.
	(remove_reg_equal_equiv_notes_for_regno): Likewise.
	(keep_with_call_p): Strengthen local "i2" from const_rtx to
	const rtx_insn *.
---
 gcc/rtlanal.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 493c812..13f9b78 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -762,7 +762,7 @@ no_labels_between_p (const_rtx beg, const_rtx end)
 int
 reg_used_between_p (const_rtx reg, const_rtx from_insn, const_rtx to_insn)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (from_insn == to_insn)
     return 0;
@@ -858,7 +858,7 @@ reg_referenced_p (const_rtx x, const_rtx body)
 int
 reg_set_between_p (const_rtx reg, const_rtx from_insn, const_rtx to_insn)
 {
-  const_rtx insn;
+  const rtx_insn *insn;
 
   if (from_insn == to_insn)
     return 0;
@@ -899,7 +899,7 @@ modified_between_p (const_rtx x, const_rtx start, const_rtx end)
   const enum rtx_code code = GET_CODE (x);
   const char *fmt;
   int i, j;
-  rtx insn;
+  rtx_insn *insn;
 
   if (start == end)
     return 0;
@@ -2100,7 +2100,7 @@ remove_reg_equal_equiv_notes_for_regno (unsigned int regno)
      over the head.  We plan to drain the list anyway.  */
   while ((eq_use = DF_REG_EQ_USE_CHAIN (regno)) != NULL)
     {
-      rtx insn = DF_REF_INSN (eq_use);
+      rtx_insn *insn = DF_REF_INSN (eq_use);
       rtx note = find_reg_equal_equiv_note (insn);
 
       /* This assert is generally triggered when someone deletes a REG_EQUAL
@@ -3777,7 +3777,7 @@ keep_with_call_p (const_rtx insn)
 	  /* This CONST_CAST is okay because next_nonnote_insn just
 	     returns its argument and we assign it to a const_rtx
 	     variable.  */
-	  const_rtx i2 = next_nonnote_insn (CONST_CAST_RTX (insn));
+	  const rtx_insn *i2 = next_nonnote_insn (CONST_CAST_RTX (insn));
 	  if (i2 && keep_with_call_p (i2))
 	    return true;
 	}
-- 
1.8.5.3

[PATCH 148/236] config/score/score.c: Use rtx_insn

[David Malcolm]

gcc/
	* config/score/score.c (score_output_mi_thunk): Strengthen local
	"insn" from rtx to rtx_insn *.
	(score_prologue): Likewise.
---
 gcc/config/score/score.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/gcc/config/score/score.c b/gcc/config/score/score.c
index e429602..26c77a3 100644
--- a/gcc/config/score/score.c
+++ b/gcc/config/score/score.c
@@ -452,7 +452,8 @@ score_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
                        HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
                        tree function)
 {
-  rtx this_rtx, temp1, insn, fnaddr;
+  rtx this_rtx, temp1, fnaddr;
+  rtx_insn *insn;
 
   /* Pretend to be a post-reload pass while generating rtl.  */
   reload_completed = 1;
@@ -1476,7 +1477,7 @@ score_prologue (void)
 
   if (size > 0)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       if (size >= -32768 && size <= 32767)
         EMIT_PL (emit_insn (gen_add3_insn (stack_pointer_rtx,
-- 
1.8.5.3

[PATCH 115/236] sel-sched-ir.c: Use rtx_insn

[David Malcolm]

gcc/
	* sel-sched-ir.c (vinsn_copy): Strengthen local "copy" from rtx to
	rtx_insn *.
	(speculate_expr): Likewise for locals "orig_insn_rtx",
	"spec_insn_rtx".
	(eq_transformed_insns): Likewise for locals "i1", "i2".
	(check_for_new_jump): Likewise for return type and local "end".
	(find_new_jump): Likewise for return type and local "jump".
	(sel_split_edge): Likewise for local "jump".
	(sel_create_recovery_block): Likewise.
	(sel_redirect_edge_and_branch_force): Likewise.
	(sel_redirect_edge_and_branch): Likewise.
---
 gcc/sel-sched-ir.c | 29 ++++++++++++++++-------------
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index f51f4f3..9e9abad 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -1246,7 +1246,7 @@ vinsn_create (insn_t insn, bool force_unique_p)
 vinsn_t
 vinsn_copy (vinsn_t vi, bool reattach_p)
 {
-  rtx copy;
+  rtx_insn *copy;
   bool unique = VINSN_UNIQUE_P (vi);
   vinsn_t new_vi;
 
@@ -1962,7 +1962,7 @@ int
 speculate_expr (expr_t expr, ds_t ds)
 {
   int res;
-  rtx orig_insn_rtx;
+  rtx_insn *orig_insn_rtx;
   rtx spec_pat;
   ds_t target_ds, current_ds;
 
@@ -1983,7 +1983,8 @@ speculate_expr (expr_t expr, ds_t ds)
 
     case 1:
       {
-	rtx spec_insn_rtx = create_insn_rtx_from_pattern (spec_pat, NULL_RTX);
+	rtx_insn *spec_insn_rtx =
+	  create_insn_rtx_from_pattern (spec_pat, NULL_RTX);
 	vinsn_t spec_vinsn = create_vinsn_from_insn_rtx (spec_insn_rtx, false);
 
 	change_vinsn_in_expr (expr, spec_vinsn);
@@ -2830,8 +2831,10 @@ hash_transformed_insns (const void *p)
 static int
 eq_transformed_insns (const void *p, const void *q)
 {
-  rtx i1 = VINSN_INSN_RTX (((const struct transformed_insns *) p)->vinsn_old);
-  rtx i2 = VINSN_INSN_RTX (((const struct transformed_insns *) q)->vinsn_old);
+  rtx_insn *i1 =
+    VINSN_INSN_RTX (((const struct transformed_insns *) p)->vinsn_old);
+  rtx_insn *i2 =
+    VINSN_INSN_RTX (((const struct transformed_insns *) q)->vinsn_old);
 
   if (INSN_UID (i1) == INSN_UID (i2))
     return 1;
@@ -5439,10 +5442,10 @@ sel_split_block (basic_block bb, rtx after)
 
 /* If BB ends with a jump insn whose ID is bigger then PREV_MAX_UID, return it.
    Otherwise returns NULL.  */
-static rtx
+static rtx_insn *
 check_for_new_jump (basic_block bb, int prev_max_uid)
 {
-  rtx end;
+  rtx_insn *end;
 
   end = sel_bb_end (bb);
   if (end && INSN_UID (end) >= prev_max_uid)
@@ -5452,10 +5455,10 @@ check_for_new_jump (basic_block bb, int prev_max_uid)
 
 /* Look for a new jump either in FROM_BB block or in newly created JUMP_BB block.
    New means having UID at least equal to PREV_MAX_UID.  */
-static rtx
+static rtx_insn *
 find_new_jump (basic_block from, basic_block jump_bb, int prev_max_uid)
 {
-  rtx jump;
+  rtx_insn *jump;
 
   /* Return immediately if no new insns were emitted.  */
   if (get_max_uid () == prev_max_uid)
@@ -5478,7 +5481,7 @@ sel_split_edge (edge e)
 {
   basic_block new_bb, src, other_bb = NULL;
   int prev_max_uid;
-  rtx jump;
+  rtx_insn *jump;
 
   src = e->src;
   prev_max_uid = get_max_uid ();
@@ -5541,7 +5544,7 @@ sel_create_recovery_block (insn_t orig_insn)
 {
   basic_block first_bb, second_bb, recovery_block;
   basic_block before_recovery = NULL;
-  rtx jump;
+  rtx_insn *jump;
 
   first_bb = BLOCK_FOR_INSN (orig_insn);
   if (sel_bb_end_p (orig_insn))
@@ -5592,7 +5595,7 @@ sel_redirect_edge_and_branch_force (edge e, basic_block to)
 {
   basic_block jump_bb, src, orig_dest = e->dest;
   int prev_max_uid;
-  rtx jump;
+  rtx_insn *jump;
   int old_seqno = -1;
 
   /* This function is now used only for bookkeeping code creation, where
@@ -5636,7 +5639,7 @@ sel_redirect_edge_and_branch (edge e, basic_block to)
   bool latch_edge_p;
   basic_block src, orig_dest = e->dest;
   int prev_max_uid;
-  rtx jump;
+  rtx_insn *jump;
   edge redirected;
   bool recompute_toporder_p = false;
   bool maybe_unreachable = single_pred_p (orig_dest);
-- 
1.8.5.3

[PATCH 196/236] Convert various INSN accessors in rtl.h to inline functions

[David Malcolm]

gcc/
	* rtl.h (INSN_UID): Convert from a macro to a pair of inline
	functions.  Require merely an rtx for now, not an rtx_insn *,
	or rtx_real_insn *.
	(BLOCK_FOR_INSN): Likewise.
	(INSN_LOCATION): Likewise.
	(INSN_HAS_LOCATION): Convert from a macro to an inline function.
---
 gcc/rtl.h | 38 ++++++++++++++++++++++++++++++++------
 1 file changed, 32 insertions(+), 6 deletions(-)

diff --git a/gcc/rtl.h b/gcc/rtl.h
index 640616f..9069ea7 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -1191,8 +1191,16 @@ extern void rtl_check_failed_flag (const char *, const_rtx, const char *,
 
 /* Holds a unique number for each insn.
    These are not necessarily sequentially increasing.  */
-#define INSN_UID(INSN) \
-  (RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID", (INSN))->u2.insn_uid)
+inline int INSN_UID (const_rtx insn)
+{
+  return RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID",
+				    (insn))->u2.insn_uid;
+}
+inline int& INSN_UID (rtx insn)
+{
+  return RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID",
+				    (insn))->u2.insn_uid;
+}
 
 /* Chain insns together in sequence.  */
 
@@ -1223,7 +1231,15 @@ inline rtx& SET_NEXT_INSN (rtx insn)
   return XEXP (insn, 1);
 }
 
-#define BLOCK_FOR_INSN(INSN) XBBDEF (INSN, 2)
+inline basic_block BLOCK_FOR_INSN (const_rtx insn)
+{
+  return XBBDEF (insn, 2);
+}
+
+inline basic_block& BLOCK_FOR_INSN (rtx insn)
+{
+  return XBBDEF (insn, 2);
+}
 
 /* The body of an insn.  */
 inline rtx PATTERN (const_rtx insn)
@@ -1236,10 +1252,20 @@ inline rtx& PATTERN (rtx insn)
   return XEXP (insn, 3);
 }
 
-#define INSN_LOCATION(INSN) XUINT (INSN, 4)
+inline unsigned int INSN_LOCATION (const_rtx insn)
+{
+  return XUINT (insn, 4);
+}
+
+inline unsigned int& INSN_LOCATION (rtx insn)
+{
+  return XUINT (insn, 4);
+}
 
-#define INSN_HAS_LOCATION(INSN) ((LOCATION_LOCUS (INSN_LOCATION (INSN)))\
-  != UNKNOWN_LOCATION)
+inline bool INSN_HAS_LOCATION (const_rtx insn)
+{
+  return LOCATION_LOCUS (INSN_LOCATION (insn)) != UNKNOWN_LOCATION;
+}
 
 /* LOCATION of an RTX if relevant.  */
 #define RTL_LOCATION(X) (INSN_P (X) ? \
-- 
1.8.5.3

[PATCH 078/236] genpeep.c: peephole requires an rtx_insn

[David Malcolm]

Given an alphabetical ordering of this phase of the patches we can do this
now, since the argument of peephole in final.c is by now an rtx_insn *.

gcc/
	* genpeep.c (main): Rename param back from "uncast_ins1" to
	"ins1", strengthening from rtx to rtx_insn *.  Drop now-redundant
	checked cast.

	* output.h (peephole): Strengthen param from rtx to rtx_insn *.
---
 gcc/genpeep.c | 3 +--
 gcc/output.h  | 2 +-
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/gcc/genpeep.c b/gcc/genpeep.c
index bc2785e..440f444 100644
--- a/gcc/genpeep.c
+++ b/gcc/genpeep.c
@@ -378,8 +378,7 @@ from the machine description file `md'.  */\n\n");
   printf ("extern rtx peep_operand[];\n\n");
   printf ("#define operands peep_operand\n\n");
 
-  printf ("rtx_insn *\npeephole (rtx uncast_ins1)\n{\n");
-  printf ("  rtx_insn *ins1 = as_a <rtx_insn *> (uncast_ins1);\n");
+  printf ("rtx_insn *\npeephole (rtx_insn *ins1)\n{\n");
   printf ("  rtx_insn *insn ATTRIBUTE_UNUSED;\n");
   printf ("  rtx x ATTRIBUTE_UNUSED, pat ATTRIBUTE_UNUSED;\n\n");
 
diff --git a/gcc/output.h b/gcc/output.h
index e4799cf..0b63737 100644
--- a/gcc/output.h
+++ b/gcc/output.h
@@ -281,7 +281,7 @@ extern void assemble_addr_to_section (rtx, section *);
 extern int get_pool_size (void);
 
 #ifdef HAVE_peephole
-extern rtx_insn *peephole (rtx);
+extern rtx_insn *peephole (rtx_insn *);
 #endif
 
 extern void output_shared_constant_pool (void);
-- 
1.8.5.3

[PATCH 035/236] Return types of unlink_insn_chain and duplicate_insn_chain

[David Malcolm]

gcc/
	* rtl.h (unlink_insn_chain): Strengthen return type from rtx to
	rtx_insn *.
	(duplicate_insn_chain): Likewise.
	* cfgrtl.c (unlink_insn_chain): Strengthen return type from rtx to
	rtx_insn *, also for locals "prevfirst" and "nextlast".  Add a
	checked cast for now (until we can strengthen the params in the
	same way).
	(duplicate_insn_chain): Likewise.
---
 gcc/cfgrtl.c | 12 ++++++------
 gcc/rtl.h    |  4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 9f15a7d..5611ab8 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -3304,11 +3304,11 @@ fixup_abnormal_edges (void)
 \f
 /* Cut the insns from FIRST to LAST out of the insns stream.  */
 
-rtx
+rtx_insn *
 unlink_insn_chain (rtx first, rtx last)
 {
-  rtx prevfirst = PREV_INSN (first);
-  rtx nextlast = NEXT_INSN (last);
+  rtx_insn *prevfirst = PREV_INSN (first);
+  rtx_insn *nextlast = NEXT_INSN (last);
 
   SET_PREV_INSN (first) = NULL;
   SET_NEXT_INSN (last) = NULL;
@@ -3320,7 +3320,7 @@ unlink_insn_chain (rtx first, rtx last)
     set_last_insn (prevfirst);
   if (!prevfirst)
     set_first_insn (nextlast);
-  return first;
+  return as_a <rtx_insn *> (first);
 }
 \f
 /* Skip over inter-block insns occurring after BB which are typically
@@ -4083,7 +4083,7 @@ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
   return true;
 }
 
-rtx
+rtx_insn *
 duplicate_insn_chain (rtx from, rtx to)
 {
   rtx insn, next, copy;
@@ -4169,7 +4169,7 @@ duplicate_insn_chain (rtx from, rtx to)
     }
   insn = NEXT_INSN (last);
   delete_insn (last);
-  return insn;
+  return as_a <rtx_insn *> (insn);
 }
 
 /* Create a duplicate of the basic block BB.  */
diff --git a/gcc/rtl.h b/gcc/rtl.h
index b4027aa..2cce7d4 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3072,7 +3072,7 @@ extern void delete_insn (rtx);
 extern rtx_insn *entry_of_function (void);
 extern void emit_insn_at_entry (rtx);
 extern void delete_insn_chain (rtx, rtx, bool);
-extern rtx unlink_insn_chain (rtx, rtx);
+extern rtx_insn *unlink_insn_chain (rtx, rtx);
 extern void delete_insn_and_edges (rtx);
 extern rtx gen_lowpart_SUBREG (enum machine_mode, rtx);
 extern rtx gen_const_mem (enum machine_mode, rtx);
@@ -3148,7 +3148,7 @@ extern int fixup_args_size_notes (rtx, rtx, int);
 
 /* In cfgrtl.c */
 extern void print_rtl_with_bb (FILE *, const_rtx, int);
-extern rtx duplicate_insn_chain (rtx, rtx);
+extern rtx_insn *duplicate_insn_chain (rtx, rtx);
 
 /* In expmed.c */
 extern void init_expmed (void);
-- 
1.8.5.3

Re: [PATCH 035/236] Return types of unlink_insn_chain and duplicate_insn_chain

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* rtl.h (unlink_insn_chain): Strengthen return type from rtx to
> 	rtx_insn *.
> 	(duplicate_insn_chain): Likewise.
> 	* cfgrtl.c (unlink_insn_chain): Strengthen return type from rtx to
> 	rtx_insn *, also for locals "prevfirst" and "nextlast".  Add a
> 	checked cast for now (until we can strengthen the params in the
> 	same way).
> 	(duplicate_insn_chain): Likewise.
OK.
jeff

Re: [PATCH 035/236] Return types of unlink_insn_chain and duplicate_insn_chain

[David Malcolm]

On Wed, 2014-08-13 at 11:56 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (unlink_insn_chain): Strengthen return type from rtx to
> > 	rtx_insn *.
> > 	(duplicate_insn_chain): Likewise.
> > 	* cfgrtl.c (unlink_insn_chain): Strengthen return type from rtx to
> > 	rtx_insn *, also for locals "prevfirst" and "nextlast".  Add a
> > 	checked cast for now (until we can strengthen the params in the
> > 	same way).
> > 	(duplicate_insn_chain): Likewise.
> OK.

Thanks.  Committed to trunk as r214197, having bootstrapped&regrtested
on x86_64-unknown-linux-gnu (Fedora 20) albeit in combination with
patches 30-39, and verified that it builds standalone on several
targets.

Re: [PATCH 035/236] Return types of unlink_insn_chain and duplicate_insn_chain

[Andreas Schwab]

David Malcolm <dmalcolm@redhat.com> writes:

> @@ -4083,7 +4083,7 @@ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
>    return true;
>  }
>  
> -rtx
> +rtx_insn *
>  duplicate_insn_chain (rtx from, rtx to)
>  {
>    rtx insn, next, copy;
> @@ -4169,7 +4169,7 @@ duplicate_insn_chain (rtx from, rtx to)
>      }
>    insn = NEXT_INSN (last);
>    delete_insn (last);
> -  return insn;
> +  return as_a <rtx_insn *> (insn);

This is wrong, insn may be NULL.

Andreas.

-- 
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

Re: [PATCH 035/236] Return types of unlink_insn_chain and duplicate_insn_chain

[David Malcolm]

On Wed, 2014-08-20 at 10:20 +0200, Andreas Schwab wrote:
> David Malcolm <dmalcolm@redhat.com> writes:
> 
> > @@ -4083,7 +4083,7 @@ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
> >    return true;
> >  }
> >  
> > -rtx
> > +rtx_insn *
> >  duplicate_insn_chain (rtx from, rtx to)
> >  {
> >    rtx insn, next, copy;
> > @@ -4169,7 +4169,7 @@ duplicate_insn_chain (rtx from, rtx to)
> >      }
> >    insn = NEXT_INSN (last);
> >    delete_insn (last);
> > -  return insn;
> > +  return as_a <rtx_insn *> (insn);
> 
> This is wrong, insn may be NULL.

Thanks; and indeed, this broke the bootstrap, as noted in:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01964.html

Fixed in r214207:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01971.html


Sorry.  I'm trying to figure out why this didn't break during my
testing.  Patch #60 of the original series contained an equivalent as_a
-> as_a_nullable hunk:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00708.html
- albeit with a misleading ChangeLog entry (I'm assuming I messed that
up during a rebase) - but this hadn't been applied yet.


Dave

PR62203 (was Re: [PATCH 035/236] Return types of unlink_insn_chain and duplicate_insn_chain)

[David Malcolm]

On Wed, 2014-08-20 at 06:19 -0400, David Malcolm wrote:
> On Wed, 2014-08-20 at 10:20 +0200, Andreas Schwab wrote:
> > David Malcolm <dmalcolm@redhat.com> writes:
> > 
> > > @@ -4083,7 +4083,7 @@ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
> > >    return true;
> > >  }
> > >  
> > > -rtx
> > > +rtx_insn *
> > >  duplicate_insn_chain (rtx from, rtx to)
> > >  {
> > >    rtx insn, next, copy;
> > > @@ -4169,7 +4169,7 @@ duplicate_insn_chain (rtx from, rtx to)
> > >      }
> > >    insn = NEXT_INSN (last);
> > >    delete_insn (last);
> > > -  return insn;
> > > +  return as_a <rtx_insn *> (insn);
> > 
> > This is wrong, insn may be NULL.
> 
> Thanks; and indeed, this broke the bootstrap, as noted in:
> https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01964.html
> 
> Fixed in r214207:
> https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01971.html

...and this has subsequently been filed as PR62203 (retitling
accordingly).

> Sorry.  I'm trying to figure out why this didn't break during my
> testing.  Patch #60 of the original series contained an equivalent as_a
> -> as_a_nullable hunk:
> https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00708.html
> - albeit with a misleading ChangeLog entry (I'm assuming I messed that
> up during a rebase) - but this hadn't been applied yet.

I just reran a bootstrap with patches 4-35 containing the unsafe as_a
cast from #35, on top of r213973 (from 2014-08-14), and somehow it
successfully bootstrapped and regression tested on
x86_64-unknown-linux-gnu (Fedora 20).  r213973 has been the baseline
I've been testing and patching against.

So presumably something changed *since* r213973 to make the bug in patch
#35 show itself when applied on a more recent trunk (I was able to
reproduce the bug on the same machine, with the same configure flags).

Bother.

I'll rebase against a more recent trunk and retest accordingly for the
followup patches.  I'll also take another look at the patches that add
as_a<> (as opposed to safe_as_a<>) [Does this make a case for adding the
safety check to the is_a_helper functions, and dropping safe_as_a
variant altogether?]

Sorry about this
Dave

Re: PR62203 (was Re: [PATCH 035/236] Return types of unlink_insn_chain and duplicate_insn_chain)

[David Malcolm]

On Wed, 2014-08-20 at 12:09 -0400, David Malcolm wrote:
> On Wed, 2014-08-20 at 06:19 -0400, David Malcolm wrote:
> > On Wed, 2014-08-20 at 10:20 +0200, Andreas Schwab wrote:
> > > David Malcolm <dmalcolm@redhat.com> writes:
> > > 
> > > > @@ -4083,7 +4083,7 @@ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
> > > >    return true;
> > > >  }
> > > >  
> > > > -rtx
> > > > +rtx_insn *
> > > >  duplicate_insn_chain (rtx from, rtx to)
> > > >  {
> > > >    rtx insn, next, copy;
> > > > @@ -4169,7 +4169,7 @@ duplicate_insn_chain (rtx from, rtx to)
> > > >      }
> > > >    insn = NEXT_INSN (last);
> > > >    delete_insn (last);
> > > > -  return insn;
> > > > +  return as_a <rtx_insn *> (insn);
> > > 
> > > This is wrong, insn may be NULL.
> > 
> > Thanks; and indeed, this broke the bootstrap, as noted in:
> > https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01964.html
> > 
> > Fixed in r214207:
> > https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01971.html
> 
> ...and this has subsequently been filed as PR62203 (retitling
> accordingly).
> 
> > Sorry.  I'm trying to figure out why this didn't break during my
> > testing.  Patch #60 of the original series contained an equivalent as_a
> > -> as_a_nullable hunk:
> > https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00708.html
> > - albeit with a misleading ChangeLog entry (I'm assuming I messed that
> > up during a rebase) - but this hadn't been applied yet.
> 
> I just reran a bootstrap with patches 4-35 containing the unsafe as_a
> cast from #35, on top of r213973 (from 2014-08-14), and somehow it
> successfully bootstrapped and regression tested on
> x86_64-unknown-linux-gnu (Fedora 20).  r213973 has been the baseline
> I've been testing and patching against.
> 
> So presumably something changed *since* r213973 to make the bug in patch
> #35 show itself when applied on a more recent trunk (I was able to
> reproduce the bug on the same machine, with the same configure flags).
> 
> Bother.

I figured this out: my testing bootstrap had a stray
   --enable-checking=release
which meant that the as_a wasn't running the is_a_helper, and hence
gracefully handled a NULL insn.

Fixed now in my testing setup, and am rerunning bootstrap for the
followup patches.

Sorry again.

> I'll rebase against a more recent trunk and retest accordingly for the
> followup patches.  I'll also take another look at the patches that add
> as_a<> (as opposed to safe_as_a<>) [Does this make a case for adding the
> safety check to the is_a_helper functions, and dropping safe_as_a
> variant altogether?]
> 
> Sorry about this
> Dave

[PATCH 172/236] sel-sched-ir.h: Make ilist_t work on insn_t rather than rtx

[David Malcolm]

gcc/
	* sel-sched-ir.h (ilist_t): Redefine this typedef in terms of
	ilist_t, not _xlist_t;
	(ILIST_INSN): Define in terms of new union field "insn".
	(ILIST_NEXT): Define in terms of _LIST_NEXT rather than
	_XLIST_NEXT.
	(struct _list_node): Add new field "insn" to the union, of type
	insn_t.
	(ilist_add): Replace macro with an inline function, requiring an
	insn_t.
	(ilist_remove): Define this macro directly in terms of
	_list_remove, rather than indirectly via _xlist_remove.
	(ilist_clear): Likewise, in terms of _list_clear rather than
	_xlist_clear.
	(ilist_is_in_p): Replace macro with an inline function, requiring
	an insn_t.
	(_list_iter_cond_insn): New function.
	(ilist_iter_remove): Define this macro directly in terms of
	_list_iter_remove, rather than indirectly via _xlist_iter_remove.
	(ilist_iterator): Define directly in terms of _list_iterator
	rather than indirectly through _xlist_iterator.
	(FOR_EACH_INSN): Define in terms of _list_iter_cond_insn rather
	than in terms of _FOR_EACH_X.
	(FOR_EACH_INSN_1): Likewise.
---
 gcc/sel-sched-ir.h | 56 ++++++++++++++++++++++++++++++++++++++++++------------
 1 file changed, 44 insertions(+), 12 deletions(-)

diff --git a/gcc/sel-sched-ir.h b/gcc/sel-sched-ir.h
index 2af7f03..abff203 100644
--- a/gcc/sel-sched-ir.h
+++ b/gcc/sel-sched-ir.h
@@ -63,9 +63,9 @@ typedef _list_t _xlist_t;
 typedef rtx insn_t;
 
 /* List of insns.  */
-typedef _xlist_t ilist_t;
-#define ILIST_INSN(L) (_XLIST_X (L))
-#define ILIST_NEXT(L) (_XLIST_NEXT (L))
+typedef _list_t ilist_t;
+#define ILIST_INSN(L) ((L)->u.insn)
+#define ILIST_NEXT(L) (_LIST_NEXT (L))
 
 /* This lists possible transformations that done locally, i.e. in
    moveup_expr.  */
@@ -353,6 +353,7 @@ struct _list_node
   union
   {
     rtx x;
+    insn_t insn;
     struct _bnd bnd;
     expr_def expr;
     struct _fence fence;
@@ -511,17 +512,48 @@ typedef _list_iterator _xlist_iterator;
 #define _FOR_EACH_X_1(X, I, LP) _FOR_EACH_1 (x, (X), (I), (LP))
 \f
 
-/* ilist_t functions.  Instruction lists are simply RTX lists.  */
+/* ilist_t functions.  */
 
-#define ilist_add(LP, INSN) (_xlist_add ((LP), (INSN)))
-#define ilist_remove(LP) (_xlist_remove (LP))
-#define ilist_clear(LP) (_xlist_clear (LP))
-#define ilist_is_in_p(L, INSN) (_xlist_is_in_p ((L), (INSN)))
-#define ilist_iter_remove(IP) (_xlist_iter_remove (IP))
+static inline void
+ilist_add (ilist_t *lp, insn_t insn)
+{
+  _list_add (lp);
+  ILIST_INSN (*lp) = insn;
+}
+#define ilist_remove(LP) (_list_remove (LP))
+#define ilist_clear(LP) (_list_clear (LP))
+
+static inline bool
+ilist_is_in_p (ilist_t l, insn_t insn)
+{
+  while (l)
+    {
+      if (ILIST_INSN (l) == insn)
+        return true;
+      l = ILIST_NEXT (l);
+    }
+
+  return false;
+}
+
+/* Used through _FOR_EACH.  */
+static inline bool
+_list_iter_cond_insn (ilist_t l, insn_t *ip)
+{
+  if (l)
+    {
+      *ip = ILIST_INSN (l);
+      return true;
+    }
+
+  return false;
+}
+
+#define ilist_iter_remove(IP) (_list_iter_remove (IP))
 
-typedef _xlist_iterator ilist_iterator;
-#define FOR_EACH_INSN(INSN, I, L) _FOR_EACH_X (INSN, I, L)
-#define FOR_EACH_INSN_1(INSN, I, LP) _FOR_EACH_X_1 (INSN, I, LP)
+typedef _list_iterator ilist_iterator;
+#define FOR_EACH_INSN(INSN, I, L) _FOR_EACH (insn, (INSN), (I), (L))
+#define FOR_EACH_INSN_1(INSN, I, LP) _FOR_EACH_1 (insn, (INSN), (I), (LP))
 \f
 
 /* Av set iterators.  */
-- 
1.8.5.3

[PATCH 228/236] tablejump_p takes an rtx_insn

[David Malcolm]

gcc/
	* rtl.h (tablejump_p): Strengthen first param from const_rtx to
	const rtx_insn *.
	(label_is_jump_target_p): Likewise for second param.

	* rtlanal.c (tablejump_p): Likewise for param "insn".
	(label_is_jump_target_p): Likewise for param "jump_insn".
---
 gcc/rtl.h     | 4 ++--
 gcc/rtlanal.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/rtl.h b/gcc/rtl.h
index 8f8d7f0..c38eb58 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2787,7 +2787,7 @@ extern int inequality_comparisons_p (const_rtx);
 extern rtx replace_rtx (rtx, rtx, rtx);
 extern int replace_label (rtx *, void *);
 extern int rtx_referenced_p (rtx, rtx);
-extern bool tablejump_p (const_rtx, rtx *, rtx_jump_table_data **);
+extern bool tablejump_p (const rtx_insn *, rtx *, rtx_jump_table_data **);
 extern int computed_jump_p (const_rtx);
 
 typedef int (*rtx_function) (rtx *, void *);
@@ -2822,7 +2822,7 @@ extern void remove_node_from_expr_list (const_rtx, rtx_expr_list **);
 extern int loc_mentioned_in_p (rtx *, const_rtx);
 extern rtx_insn *find_first_parameter_load (rtx_insn *, rtx_insn *);
 extern bool keep_with_call_p (const_rtx);
-extern bool label_is_jump_target_p (const_rtx, const_rtx);
+extern bool label_is_jump_target_p (const_rtx, const rtx_insn *);
 extern int insn_rtx_cost (rtx, bool);
 
 /* Given an insn and condition, return a canonical description of
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index df2f734..5b1e600 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -2732,7 +2732,7 @@ rtx_referenced_p (rtx x, rtx body)
    *LABELP and the jump table to *TABLEP.  LABELP and TABLEP may be NULL.  */
 
 bool
-tablejump_p (const_rtx insn, rtx *labelp, rtx_jump_table_data **tablep)
+tablejump_p (const rtx_insn *insn, rtx *labelp, rtx_jump_table_data **tablep)
 {
   rtx label, table;
 
@@ -3746,7 +3746,7 @@ keep_with_call_p (const_rtx insn)
    not apply to the fallthru case of a conditional jump.  */
 
 bool
-label_is_jump_target_p (const_rtx label, const_rtx jump_insn)
+label_is_jump_target_p (const_rtx label, const rtx_insn *jump_insn)
 {
   rtx tmp = JUMP_LABEL (jump_insn);
   rtx_jump_table_data *table;
-- 
1.8.5.3

Re: [PATCH 228/236] tablejump_p takes an rtx_insn

[Richard Henderson]

On 08/06/2014 10:23 AM, David Malcolm wrote:
> gcc/
> 	* rtl.h (tablejump_p): Strengthen first param from const_rtx to
> 	const rtx_insn *.
> 	(label_is_jump_target_p): Likewise for second param.
> 
> 	* rtlanal.c (tablejump_p): Likewise for param "insn".
> 	(label_is_jump_target_p): Likewise for param "jump_insn".
> ---
>  gcc/rtl.h     | 4 ++--
>  gcc/rtlanal.c | 4 ++--
>  2 files changed, 4 insertions(+), 4 deletions(-)

#226 - #228 are ok.


r~

[PATCH 031/236] emit_jump_table_data returns an rtx_jump_table_data *

[David Malcolm]

gcc/
	* emit-rtl.c (emit_jump_table_data): Strengthen return type from
	rtx to rtx_jump_table_data *.  Also for local.
	* rtl.h (emit_jump_table_data): Likwise.
---
 gcc/emit-rtl.c | 5 +++--
 gcc/rtl.h      | 2 +-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index afbb6a0..2614937 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -4985,10 +4985,11 @@ emit_label (rtx label)
 /* Make an insn of code JUMP_TABLE_DATA
    and add it to the end of the doubly-linked list.  */
 
-rtx
+rtx_jump_table_data *
 emit_jump_table_data (rtx table)
 {
-  rtx jump_table_data = rtx_alloc (JUMP_TABLE_DATA);
+  rtx_jump_table_data *jump_table_data =
+    as_a <rtx_jump_table_data *> (rtx_alloc (JUMP_TABLE_DATA));
   INSN_UID (jump_table_data) = cur_insn_uid++;
   PATTERN (jump_table_data) = table;
   BLOCK_FOR_INSN (jump_table_data) = NULL;
diff --git a/gcc/rtl.h b/gcc/rtl.h
index cca0e20..ed65d1e 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2392,7 +2392,7 @@ extern rtx emit_debug_insn (rtx);
 extern rtx emit_jump_insn (rtx);
 extern rtx emit_call_insn (rtx);
 extern rtx emit_label (rtx);
-extern rtx emit_jump_table_data (rtx);
+extern rtx_jump_table_data *emit_jump_table_data (rtx);
 extern rtx emit_barrier (void);
 extern rtx_note *emit_note (enum insn_note);
 extern rtx_note *emit_note_copy (rtx_note *);
-- 
1.8.5.3

Re: [PATCH 031/236] emit_jump_table_data returns an rtx_jump_table_data *

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* emit-rtl.c (emit_jump_table_data): Strengthen return type from
> 	rtx to rtx_jump_table_data *.  Also for local.
> 	* rtl.h (emit_jump_table_data): Likwise.
OK.
jeff

Re: [PATCH 031/236] emit_jump_table_data returns an rtx_jump_table_data *

[David Malcolm]

On Wed, 2014-08-13 at 07:45 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* emit-rtl.c (emit_jump_table_data): Strengthen return type from
> > 	rtx to rtx_jump_table_data *.  Also for local.
> > 	* rtl.h (emit_jump_table_data): Likwise.
> OK.

Thanks.  Committed to trunk as r214193, having bootstrapped&regrtested
on x86_64-unknown-linux-gnu (Fedora 20) albeit in combination with
patches 30-39, and verified that it builds standalone.

[PATCH 022/236] Make tablejump_p accept a rtx_jump_table_data **

[David Malcolm]

gcc/
	* rtl.h (tablejump_p): Strengthen third param from rtx * to
	rtx_jump_table_data **.

	* cfgbuild.c (make_edges): Introduce local "table", using it in
	place of "tmp" for jump table data.
	(find_bb_boundaries): Strengthen local "table" from rtx to
	rtx_jump_table_data *.
	* cfgcleanup.c (merge_blocks_move_successor_nojumps): Likewise.
	(outgoing_edges_match): Likewise for locals "table1" and "table2".
	(try_crossjump_to_edge): Likewise.
	* cfgrtl.c (try_redirect_by_replacing_jump): Likewise for local
	"table".
	(patch_jump_insn): Introduce local "table", using it in place of
	"tmp" for jump table data.
	(force_nonfallthru_and_redirect): Introduce local "table", so that
	call to tablejump_p can receive an rtx_jump_table_data **.  Update
	logic around the call to overwrite "note" appropriately if
	tablejump_p returns non-zero.
	(get_last_bb_insn): Introduce local "table", using it in place of
	"tmp" for jump table data.
	* dwarf2cfi.c (create_trace_edges): Likewise.

	* config/arm/arm.c (get_jump_table_size): Strengthen param "insn"
	from rtx to rtx_jump_table_data *.
	(create_fix_barrier): Strengthen local "tmp" from rtx to
	rtx_jump_table_data *.
	(arm_reorg): Likewise for local "table".

	* config/s390/s390.c (s390_chunkify_start): Likewise.

	* config/spu/spu.c (spu_emit_branch_hint): Likewise.

	* jump.c (delete_related_insns): Strengthen local "lab_next" from
	rtx to rtx_jump_table_data *.

	* rtlanal.c (tablejump_p): Strengthen param "tablep" from rtx * to
	rtx_jump_table_data **.  Add a checked cast when writing through
	the pointer: we know there that local "table" is non-NULL and that
	JUMP_TABLE_DATA_P (table) holds.
	(label_is_jump_target_p): Introduce local "table", using it in
	place of "tmp" for jump table data.
---
 gcc/cfgbuild.c         | 11 ++++++-----
 gcc/cfgcleanup.c       |  7 ++++---
 gcc/cfgrtl.c           | 22 ++++++++++++++--------
 gcc/config/arm/arm.c   |  8 ++++----
 gcc/config/s390/s390.c |  2 +-
 gcc/config/spu/spu.c   |  2 +-
 gcc/dwarf2cfi.c        |  6 ++++--
 gcc/jump.c             |  3 ++-
 gcc/rtl.h              |  2 +-
 gcc/rtlanal.c          | 11 ++++++-----
 10 files changed, 43 insertions(+), 31 deletions(-)

diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index 76d3a99..848e13f 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -252,6 +252,7 @@ make_edges (basic_block min, basic_block max, int update_p)
       if (code == JUMP_INSN)
 	{
 	  rtx tmp;
+	  rtx_jump_table_data *table;
 
 	  /* Recognize a non-local goto as a branch outside the
 	     current function.  */
@@ -259,15 +260,15 @@ make_edges (basic_block min, basic_block max, int update_p)
 	    ;
 
 	  /* Recognize a tablejump and do the right thing.  */
-	  else if (tablejump_p (insn, NULL, &tmp))
+	  else if (tablejump_p (insn, NULL, &table))
 	    {
 	      rtvec vec;
 	      int j;
 
-	      if (GET_CODE (PATTERN (tmp)) == ADDR_VEC)
-		vec = XVEC (PATTERN (tmp), 0);
+	      if (GET_CODE (PATTERN (table)) == ADDR_VEC)
+		vec = XVEC (PATTERN (table), 0);
 	      else
-		vec = XVEC (PATTERN (tmp), 1);
+		vec = XVEC (PATTERN (table), 1);
 
 	      for (j = GET_NUM_ELEM (vec) - 1; j >= 0; --j)
 		make_label_edge (edge_cache, bb,
@@ -444,7 +445,7 @@ find_bb_boundaries (basic_block bb)
   basic_block orig_bb = bb;
   rtx insn = BB_HEAD (bb);
   rtx end = BB_END (bb), x;
-  rtx table;
+  rtx_jump_table_data *table;
   rtx flow_transfer_insn = NULL_RTX;
   edge fallthru = NULL;
 
diff --git a/gcc/cfgcleanup.c b/gcc/cfgcleanup.c
index b6cb77b..e6a8084 100644
--- a/gcc/cfgcleanup.c
+++ b/gcc/cfgcleanup.c
@@ -704,7 +704,8 @@ static void
 merge_blocks_move_successor_nojumps (basic_block a, basic_block b)
 {
   rtx barrier, real_b_end;
-  rtx label, table;
+  rtx label;
+  rtx_jump_table_data *table;
 
   /* If we are partitioning hot/cold basic blocks, we don't want to
      mess up unconditional or indirect jumps that cross between hot
@@ -1675,7 +1676,7 @@ outgoing_edges_match (int mode, basic_block bb1, basic_block bb2)
      Return true if they are identical.  */
     {
       rtx label1, label2;
-      rtx table1, table2;
+      rtx_jump_table_data *table1, *table2;
 
       if (tablejump_p (BB_END (bb1), &label1, &table1)
 	  && tablejump_p (BB_END (bb2), &label2, &table2)
@@ -1978,7 +1979,7 @@ try_crossjump_to_edge (int mode, edge e1, edge e2,
      so replace the references to TABLE1 by references to TABLE2.  */
     {
       rtx label1, label2;
-      rtx table1, table2;
+      rtx_jump_table_data *table1, *table2;
 
       if (tablejump_p (BB_END (osrc1), &label1, &table1)
 	  && tablejump_p (BB_END (osrc2), &label2, &table2)
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 3079bb3..168a44a 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -1100,7 +1100,8 @@ try_redirect_by_replacing_jump (edge e, basic_block target, bool in_cfglayout)
   else
     {
       rtx target_label = block_label (target);
-      rtx barrier, label, table;
+      rtx barrier, label;
+      rtx_jump_table_data *table;
 
       emit_jump_insn_after_noloc (gen_jump (target_label), insn);
       JUMP_LABEL (BB_END (src)) = target_label;
@@ -1173,9 +1174,10 @@ try_redirect_by_replacing_jump (edge e, basic_block target, bool in_cfglayout)
 static bool
 patch_jump_insn (rtx insn, rtx old_label, basic_block new_bb)
 {
+  rtx_jump_table_data *table;
   rtx tmp;
   /* Recognize a tablejump and adjust all matching cases.  */
-  if (tablejump_p (insn, NULL, &tmp))
+  if (tablejump_p (insn, NULL, &table))
     {
       rtvec vec;
       int j;
@@ -1183,10 +1185,10 @@ patch_jump_insn (rtx insn, rtx old_label, basic_block new_bb)
 
       if (new_bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
 	return false;
-      if (GET_CODE (PATTERN (tmp)) == ADDR_VEC)
-	vec = XVEC (PATTERN (tmp), 0);
+      if (GET_CODE (PATTERN (table)) == ADDR_VEC)
+	vec = XVEC (PATTERN (table), 0);
       else
-	vec = XVEC (PATTERN (tmp), 1);
+	vec = XVEC (PATTERN (table), 1);
 
       for (j = GET_NUM_ELEM (vec) - 1; j >= 0; --j)
 	if (XEXP (RTVEC_ELT (vec, j), 0) == old_label)
@@ -1608,7 +1610,10 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
       /* If the old block ended with a tablejump, skip its table
 	 by searching forward from there.  Otherwise start searching
 	 forward from the last instruction of the old block.  */
-      if (!tablejump_p (BB_END (e->src), NULL, &note))
+      rtx_jump_table_data *table;
+      if (tablejump_p (BB_END (e->src), NULL, &table))
+	note = table;
+      else
 	note = BB_END (e->src);
       note = NEXT_INSN (note);
 
@@ -2235,12 +2240,13 @@ update_br_prob_note (basic_block bb)
 rtx
 get_last_bb_insn (basic_block bb)
 {
+  rtx_jump_table_data *table;
   rtx tmp;
   rtx end = BB_END (bb);
 
   /* Include any jump table following the basic block.  */
-  if (tablejump_p (end, NULL, &tmp))
-    end = tmp;
+  if (tablejump_p (end, NULL, &table))
+    end = table;
 
   /* Include any barriers that may follow the basic block.  */
   tmp = next_nonnote_insn_bb (end);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 1117bd4..6535d21 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -106,7 +106,7 @@ static const char *output_multi_immediate (rtx *, const char *, const char *,
 static const char *shift_op (rtx, HOST_WIDE_INT *);
 static struct machine_function *arm_init_machine_status (void);
 static void thumb_exit (FILE *, int);
-static HOST_WIDE_INT get_jump_table_size (rtx);
+static HOST_WIDE_INT get_jump_table_size (rtx_jump_table_data *);
 static Mnode *move_minipool_fix_forward_ref (Mnode *, Mnode *, HOST_WIDE_INT);
 static Mnode *add_minipool_forward_ref (Mfix *);
 static Mnode *move_minipool_fix_backward_ref (Mnode *, Mnode *, HOST_WIDE_INT);
@@ -16008,7 +16008,7 @@ Mfix *		minipool_barrier;
 #endif
 
 static HOST_WIDE_INT
-get_jump_table_size (rtx insn)
+get_jump_table_size (rtx_jump_table_data *insn)
 {
   /* ADDR_VECs only take room if read-only data does into the text
      section.  */
@@ -16596,7 +16596,7 @@ create_fix_barrier (Mfix *fix, HOST_WIDE_INT max_address)
 
   while (from && count < max_count)
     {
-      rtx tmp;
+      rtx_jump_table_data *tmp;
       int new_cost;
 
       /* This code shouldn't have been called if there was a natural barrier
@@ -17239,7 +17239,7 @@ arm_reorg (void)
 	push_minipool_barrier (insn, address);
       else if (INSN_P (insn))
 	{
-	  rtx table;
+	  rtx_jump_table_data *table;
 
 	  note_invalid_constants (insn, address, true);
 	  address += get_attr_length (insn);
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 417e2a8..09ab631 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -7072,7 +7072,7 @@ s390_chunkify_start (void)
 
   for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
-      rtx table;
+      rtx_jump_table_data *table;
 
       /* Labels marked with LABEL_PRESERVE_P can be target
 	 of non-local jumps, so we have to mark them.
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index 41d3c2c..e2bcfe9 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -2104,7 +2104,7 @@ spu_emit_branch_hint (rtx before, rtx branch, rtx target,
   rtx branch_label = 0;
   rtx hint;
   rtx insn;
-  rtx table;
+  rtx_jump_table_data *table;
 
   if (before == 0 || branch == 0 || target == 0)
     return;
diff --git a/gcc/dwarf2cfi.c b/gcc/dwarf2cfi.c
index 47fd028..1f56fed 100644
--- a/gcc/dwarf2cfi.c
+++ b/gcc/dwarf2cfi.c
@@ -2291,14 +2291,16 @@ create_trace_edges (rtx insn)
 
   if (JUMP_P (insn))
     {
+      rtx_jump_table_data *table;
+
       if (find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX))
 	return;
 
-      if (tablejump_p (insn, NULL, &tmp))
+      if (tablejump_p (insn, NULL, &table))
 	{
 	  rtvec vec;
 
-	  tmp = PATTERN (tmp);
+	  tmp = PATTERN (table);
 	  vec = XVEC (tmp, GET_CODE (tmp) == ADDR_DIFF_VEC);
 
 	  n = GET_NUM_ELEM (vec);
diff --git a/gcc/jump.c b/gcc/jump.c
index 69263e6..0cac620 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -1285,7 +1285,8 @@ delete_related_insns (rtx insn)
 
   if (jump_to_label_p (insn))
     {
-      rtx lab = JUMP_LABEL (insn), lab_next;
+      rtx lab = JUMP_LABEL (insn);
+      rtx_jump_table_data *lab_next;
 
       if (LABEL_NUSES (lab) == 0)
 	/* This can delete NEXT or PREV,
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 3a28fcc..739a550 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2576,7 +2576,7 @@ extern int inequality_comparisons_p (const_rtx);
 extern rtx replace_rtx (rtx, rtx, rtx);
 extern int replace_label (rtx *, void *);
 extern int rtx_referenced_p (rtx, rtx);
-extern bool tablejump_p (const_rtx, rtx *, rtx *);
+extern bool tablejump_p (const_rtx, rtx *, rtx_jump_table_data **);
 extern int computed_jump_p (const_rtx);
 
 typedef int (*rtx_function) (rtx *, void *);
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 5e2e908..d62f44b 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -2778,7 +2778,7 @@ rtx_referenced_p (rtx x, rtx body)
    *LABELP and the jump table to *TABLEP.  LABELP and TABLEP may be NULL.  */
 
 bool
-tablejump_p (const_rtx insn, rtx *labelp, rtx *tablep)
+tablejump_p (const_rtx insn, rtx *labelp, rtx_jump_table_data **tablep)
 {
   rtx label, table;
 
@@ -2793,7 +2793,7 @@ tablejump_p (const_rtx insn, rtx *labelp, rtx *tablep)
       if (labelp)
 	*labelp = label;
       if (tablep)
-	*tablep = table;
+	*tablep = as_a <rtx_jump_table_data *> (table);
       return true;
     }
   return false;
@@ -3794,14 +3794,15 @@ bool
 label_is_jump_target_p (const_rtx label, const_rtx jump_insn)
 {
   rtx tmp = JUMP_LABEL (jump_insn);
+  rtx_jump_table_data *table;
 
   if (label == tmp)
     return true;
 
-  if (tablejump_p (jump_insn, NULL, &tmp))
+  if (tablejump_p (jump_insn, NULL, &table))
     {
-      rtvec vec = XVEC (PATTERN (tmp),
-			GET_CODE (PATTERN (tmp)) == ADDR_DIFF_VEC);
+      rtvec vec = XVEC (PATTERN (table),
+			GET_CODE (PATTERN (table)) == ADDR_DIFF_VEC);
       int i, veclen = GET_NUM_ELEM (vec);
 
       for (i = 0; i < veclen; ++i)
-- 
1.8.5.3

Re: [PATCH 022/236] Make tablejump_p accept a rtx_jump_table_data **

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* rtl.h (tablejump_p): Strengthen third param from rtx * to
> 	rtx_jump_table_data **.
>
> 	* cfgbuild.c (make_edges): Introduce local "table", using it in
> 	place of "tmp" for jump table data.
> 	(find_bb_boundaries): Strengthen local "table" from rtx to
> 	rtx_jump_table_data *.
> 	* cfgcleanup.c (merge_blocks_move_successor_nojumps): Likewise.
> 	(outgoing_edges_match): Likewise for locals "table1" and "table2".
> 	(try_crossjump_to_edge): Likewise.
> 	* cfgrtl.c (try_redirect_by_replacing_jump): Likewise for local
> 	"table".
> 	(patch_jump_insn): Introduce local "table", using it in place of
> 	"tmp" for jump table data.
> 	(force_nonfallthru_and_redirect): Introduce local "table", so that
> 	call to tablejump_p can receive an rtx_jump_table_data **.  Update
> 	logic around the call to overwrite "note" appropriately if
> 	tablejump_p returns non-zero.
> 	(get_last_bb_insn): Introduce local "table", using it in place of
> 	"tmp" for jump table data.
> 	* dwarf2cfi.c (create_trace_edges): Likewise.
>
> 	* config/arm/arm.c (get_jump_table_size): Strengthen param "insn"
> 	from rtx to rtx_jump_table_data *.
> 	(create_fix_barrier): Strengthen local "tmp" from rtx to
> 	rtx_jump_table_data *.
> 	(arm_reorg): Likewise for local "table".
>
> 	* config/s390/s390.c (s390_chunkify_start): Likewise.
>
> 	* config/spu/spu.c (spu_emit_branch_hint): Likewise.
>
> 	* jump.c (delete_related_insns): Strengthen local "lab_next" from
> 	rtx to rtx_jump_table_data *.
>
> 	* rtlanal.c (tablejump_p): Strengthen param "tablep" from rtx * to
> 	rtx_jump_table_data **.  Add a checked cast when writing through
> 	the pointer: we know there that local "table" is non-NULL and that
> 	JUMP_TABLE_DATA_P (table) holds.
> 	(label_is_jump_target_p): Introduce local "table", using it in
> 	place of "tmp" for jump table data.
OK.
Jeff

Re: [PATCH 022/236] Make tablejump_p accept a rtx_jump_table_data **

[David Malcolm]

On Tue, 2014-08-12 at 21:51 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (tablejump_p): Strengthen third param from rtx * to
> > 	rtx_jump_table_data **.
> >
> > 	* cfgbuild.c (make_edges): Introduce local "table", using it in
> > 	place of "tmp" for jump table data.
> > 	(find_bb_boundaries): Strengthen local "table" from rtx to
> > 	rtx_jump_table_data *.
> > 	* cfgcleanup.c (merge_blocks_move_successor_nojumps): Likewise.
> > 	(outgoing_edges_match): Likewise for locals "table1" and "table2".
> > 	(try_crossjump_to_edge): Likewise.
> > 	* cfgrtl.c (try_redirect_by_replacing_jump): Likewise for local
> > 	"table".
> > 	(patch_jump_insn): Introduce local "table", using it in place of
> > 	"tmp" for jump table data.
> > 	(force_nonfallthru_and_redirect): Introduce local "table", so that
> > 	call to tablejump_p can receive an rtx_jump_table_data **.  Update
> > 	logic around the call to overwrite "note" appropriately if
> > 	tablejump_p returns non-zero.
> > 	(get_last_bb_insn): Introduce local "table", using it in place of
> > 	"tmp" for jump table data.
> > 	* dwarf2cfi.c (create_trace_edges): Likewise.
> >
> > 	* config/arm/arm.c (get_jump_table_size): Strengthen param "insn"
> > 	from rtx to rtx_jump_table_data *.
> > 	(create_fix_barrier): Strengthen local "tmp" from rtx to
> > 	rtx_jump_table_data *.
> > 	(arm_reorg): Likewise for local "table".
> >
> > 	* config/s390/s390.c (s390_chunkify_start): Likewise.
> >
> > 	* config/spu/spu.c (spu_emit_branch_hint): Likewise.
> >
> > 	* jump.c (delete_related_insns): Strengthen local "lab_next" from
> > 	rtx to rtx_jump_table_data *.
> >
> > 	* rtlanal.c (tablejump_p): Strengthen param "tablep" from rtx * to
> > 	rtx_jump_table_data **.  Add a checked cast when writing through
> > 	the pointer: we know there that local "table" is non-NULL and that
> > 	JUMP_TABLE_DATA_P (table) holds.
> > 	(label_is_jump_target_p): Introduce local "table", using it in
> > 	place of "tmp" for jump table data.
> OK.

Thanks.  Committed to trunk as r214184, having verified
bootstrap&regrtest on x86_64-unknown-linux-gnu (Fedora 20) albeit in
combination with patches 9-29, and verified that it builds standalone
with targets:
* x86_64-unknown-linux-gnu
* arm-unknown-uclinux_eabi
* s390-ibm-linux-gnu
* spu-unknown-elf
the latter three for coverage of the touched config subdirs.

[PATCH 011/236] Replace PREV_INSN et al macros with functions

[David Malcolm]

Yet more scaffolding: convert the NEXT_INSN/PREV_INSN macros
and their SET_* variants into functions.

Convert the rvalue-style functions into returning
rtx_insn * rather than plain rtx.

For now, this is done by adding a checked cast, but I hope this can
eventually become a field lookup.  The lvalue forms for now return an rtx&
to allow in-place modification.

gcc/
	* rtl.h (PREV_INSN): Convert to an inline function.  Strengthen
	the return type from rtx to rtx_insn *,  which will enable various
	conversions in followup patches.  For now this is is done by a
	checked cast.
	(NEXT_INSN): Likewise.
	(SET_PREV_INSN): Convert to an inilne function.  This is intended
	for use as an lvalue, and so returns an rtx& to allow in-place
	modification.
	(SET_NEXT_INSN): Likewise.
---
 gcc/rtl.h | 26 ++++++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/gcc/rtl.h b/gcc/rtl.h
index e08f05b..5936829 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -972,15 +972,33 @@ extern void rtl_check_failed_flag (const char *, const_rtx, const char *,
   (RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID", (INSN))->u2.insn_uid)
 
 /* Chain insns together in sequence.  */
+
 /* For now these are split in two: an rvalue form:
      PREV_INSN/NEXT_INSN
    and an lvalue form:
      SET_NEXT_INSN/SET_PREV_INSN.  */
 
-#define PREV_INSN(INSN)      XEXP ((const_rtx)(INSN), 0)
-#define SET_PREV_INSN(INSN)  XEXP (INSN, 0)
-#define NEXT_INSN(INSN)      XEXP ((const_rtx)(INSN), 1)
-#define SET_NEXT_INSN(INSN)  XEXP (INSN, 1)
+inline rtx_insn *PREV_INSN (const_rtx insn)
+{
+  rtx prev = XEXP (insn, 0);
+  return as_a_nullable <rtx_insn *> (prev);
+}
+
+inline rtx& SET_PREV_INSN (rtx insn)
+{
+  return XEXP (insn, 0);
+}
+
+inline rtx_insn *NEXT_INSN (const_rtx insn)
+{
+  rtx next = XEXP (insn, 1);
+  return as_a_nullable <rtx_insn *> (next);
+}
+
+inline rtx& SET_NEXT_INSN (rtx insn)
+{
+  return XEXP (insn, 1);
+}
 
 #define BLOCK_FOR_INSN(INSN) XBBDEF (INSN, 2)
 
-- 
1.8.5.3

Re: [PATCH 011/236] Replace PREV_INSN et al macros with functions

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> Yet more scaffolding: convert the NEXT_INSN/PREV_INSN macros
> and their SET_* variants into functions.
>
> Convert the rvalue-style functions into returning
> rtx_insn * rather than plain rtx.
>
> For now, this is done by adding a checked cast, but I hope this can
> eventually become a field lookup.  The lvalue forms for now return an rtx&
> to allow in-place modification.
>
> gcc/
> 	* rtl.h (PREV_INSN): Convert to an inline function.  Strengthen
> 	the return type from rtx to rtx_insn *,  which will enable various
> 	conversions in followup patches.  For now this is is done by a
> 	checked cast.
> 	(NEXT_INSN): Likewise.
> 	(SET_PREV_INSN): Convert to an inilne function.  This is intended
> 	for use as an lvalue, and so returns an rtx& to allow in-place
> 	modification.
> 	(SET_NEXT_INSN): Likewise.
OK.

FWIW, I do think that after this series is done that we should look very 
closely at moving those fields out of the rtunion array and just have 
them first class fields in their classes.

I can see a day where I say foo->uid or foo->next/prev and be 
exceedingly happy.  And if we keep "rtx_real_insn" as a concept, then 
foo.pattern ;-)

Jeff

Re: [PATCH 011/236] Replace PREV_INSN et al macros with functions

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 1768 bytes --]

On Tue, 2014-08-12 at 15:20 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > Yet more scaffolding: convert the NEXT_INSN/PREV_INSN macros
> > and their SET_* variants into functions.
> >
> > Convert the rvalue-style functions into returning
> > rtx_insn * rather than plain rtx.
> >
> > For now, this is done by adding a checked cast, but I hope this can
> > eventually become a field lookup.  The lvalue forms for now return an rtx&
> > to allow in-place modification.
> >
> > gcc/
> > 	* rtl.h (PREV_INSN): Convert to an inline function.  Strengthen
> > 	the return type from rtx to rtx_insn *,  which will enable various
> > 	conversions in followup patches.  For now this is is done by a
> > 	checked cast.
> > 	(NEXT_INSN): Likewise.
> > 	(SET_PREV_INSN): Convert to an inilne function.  This is intended
> > 	for use as an lvalue, and so returns an rtx& to allow in-place
> > 	modification.
> > 	(SET_NEXT_INSN): Likewise.
> OK.

Thanks

Fixed up the as_a_nullable to safe_as_a, and committed to trunk as
r214152, having verified bootstrap&regrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone.

Am attaching what I committed.

Should I add a blanket skip for rtl.h to gdbinit.in, or special-case the
individual inline functions>

> FWIW, I do think that after this series is done that we should look very 
> closely at moving those fields out of the rtunion array and just have 
> them first class fields in their classes.
> 
> I can see a day where I say foo->uid or foo->next/prev and be 
> exceedingly happy.  And if we keep "rtx_real_insn" as a concept, then 
> foo.pattern ;-)

(nods)


[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html



[-- Attachment #2: r214152.patch --]
[-- Type: text/x-patch, Size: 1816 bytes --]

Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214151)
+++ gcc/ChangeLog	(revision 214152)
@@ -1,3 +1,15 @@
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
+	* rtl.h (PREV_INSN): Convert to an inline function.  Strengthen
+	the return type from rtx to rtx_insn *,  which will enable various
+	conversions in followup patches.  For now this is is done by a
+	checked cast.
+	(NEXT_INSN): Likewise.
+	(SET_PREV_INSN): Convert to an inline function.  This is intended
+	for use as an lvalue, and so returns an rtx& to allow in-place
+	modification.
+	(SET_NEXT_INSN): Likewise.
+
 2014-07-08  Mark Wielaard  <mjw@redhat.com>
 
 	PR debug/59051
Index: gcc/rtl.h
===================================================================
--- gcc/rtl.h	(revision 214151)
+++ gcc/rtl.h	(revision 214152)
@@ -972,16 +972,34 @@
   (RTL_INSN_CHAIN_FLAG_CHECK ("INSN_UID", (INSN))->u2.insn_uid)
 
 /* Chain insns together in sequence.  */
+
 /* For now these are split in two: an rvalue form:
      PREV_INSN/NEXT_INSN
    and an lvalue form:
      SET_NEXT_INSN/SET_PREV_INSN.  */
 
-#define PREV_INSN(INSN)      XEXP ((const_rtx)(INSN), 0)
-#define SET_PREV_INSN(INSN)  XEXP (INSN, 0)
-#define NEXT_INSN(INSN)      XEXP ((const_rtx)(INSN), 1)
-#define SET_NEXT_INSN(INSN)  XEXP (INSN, 1)
+inline rtx_insn *PREV_INSN (const_rtx insn)
+{
+  rtx prev = XEXP (insn, 0);
+  return safe_as_a <rtx_insn *> (prev);
+}
 
+inline rtx& SET_PREV_INSN (rtx insn)
+{
+  return XEXP (insn, 0);
+}
+
+inline rtx_insn *NEXT_INSN (const_rtx insn)
+{
+  rtx next = XEXP (insn, 1);
+  return safe_as_a <rtx_insn *> (next);
+}
+
+inline rtx& SET_NEXT_INSN (rtx insn)
+{
+  return XEXP (insn, 1);
+}
+
 #define BLOCK_FOR_INSN(INSN) XBBDEF (INSN, 2)
 
 /* The body of an insn.  */

[PATCH 052/236] bt-load.c: Use rtx_insn

[David Malcolm]

gcc/
	* bt-load.c (struct btr_user_s): Strengthen field "insn" from rtx
	to rtx_insn *.
	(struct btr_def_s): Likewise.
	(insn_sets_btr_p): Strengthen param "insn" from const_rtx to
	const rtx_insn *.
	(add_btr_def): Likewise.
	(new_btr_user): Likewise.
	(compute_defs_uses_and_gen): Strengthen locals "insn", "last" from
	rtx to rtx_insn *.
	(link_btr_uses): Likewise.
	(move_btr_def): Likewise for locals "insp", "old_insn",
	"new_insn".  Add checked cast to rtx_insn * for now on result of
	gen_move_insn.
	(can_move_up): Strengthen param "insn" from const_rtx to
	const rtx_insn *.
---
 gcc/bt-load.c | 37 +++++++++++++++++++------------------
 1 file changed, 19 insertions(+), 18 deletions(-)

diff --git a/gcc/bt-load.c b/gcc/bt-load.c
index f57d84d..58dbc09 100644
--- a/gcc/bt-load.c
+++ b/gcc/bt-load.c
@@ -53,7 +53,7 @@ typedef struct btr_user_s
   struct btr_user_s *next;
   basic_block bb;
   int luid;
-  rtx insn;
+  rtx_insn *insn;
   /* If INSN has a single use of a single branch register, then
      USE points to it within INSN.  If there is more than
      one branch register use, or the use is in some way ambiguous,
@@ -79,7 +79,7 @@ typedef struct btr_def_s
   struct btr_def_s *next_this_group;
   basic_block bb;
   int luid;
-  rtx insn;
+  rtx_insn *insn;
   int btr;
   int cost;
   /* For a branch register setting insn that has a constant
@@ -112,14 +112,14 @@ typedef struct btr_def_s
 static int issue_rate;
 
 static int basic_block_freq (const_basic_block);
-static int insn_sets_btr_p (const_rtx, int, int *);
+static int insn_sets_btr_p (const rtx_insn *, int, int *);
 static rtx *find_btr_use (rtx);
 static int btr_referenced_p (rtx, rtx *);
 static int find_btr_reference (rtx *, void *);
 static void find_btr_def_group (btr_def_group *, btr_def);
-static btr_def add_btr_def (fibheap_t, basic_block, int, rtx,
+static btr_def add_btr_def (fibheap_t, basic_block, int, rtx_insn *,
 			    unsigned int, int, btr_def_group *);
-static btr_user new_btr_user (basic_block, int, rtx);
+static btr_user new_btr_user (basic_block, int, rtx_insn *);
 static void dump_hard_reg_set (HARD_REG_SET);
 static void dump_btrs_live (int);
 static void note_other_use_this_block (unsigned int, btr_user);
@@ -140,7 +140,7 @@ static void btr_def_live_range (btr_def, HARD_REG_SET *);
 static void move_btr_def (basic_block, int, btr_def, bitmap, HARD_REG_SET *);
 static int migrate_btr_def (btr_def, int);
 static void migrate_btr_defs (enum reg_class, int);
-static int can_move_up (const_basic_block, const_rtx, int);
+static int can_move_up (const_basic_block, const rtx_insn *, int);
 static void note_btr_set (rtx, const_rtx, void *);
 \f
 /* The following code performs code motion of target load instructions
@@ -222,7 +222,7 @@ btr_referenced_p (rtx x, rtx *excludep)
    If such a set is found and REGNO is nonzero, assign the register number
    of the destination register to *REGNO.  */
 static int
-insn_sets_btr_p (const_rtx insn, int check_const, int *regno)
+insn_sets_btr_p (const rtx_insn *insn, int check_const, int *regno)
 {
   rtx set;
 
@@ -297,7 +297,8 @@ find_btr_def_group (btr_def_group *all_btr_def_groups, btr_def def)
    block BB, instruction INSN, and insert it into ALL_BTR_DEFS.  Return
    the new definition.  */
 static btr_def
-add_btr_def (fibheap_t all_btr_defs, basic_block bb, int insn_luid, rtx insn,
+add_btr_def (fibheap_t all_btr_defs, basic_block bb, int insn_luid,
+	     rtx_insn *insn,
 	     unsigned int dest_reg, int other_btr_uses_before_def,
 	     btr_def_group *all_btr_def_groups)
 {
@@ -330,7 +331,7 @@ add_btr_def (fibheap_t all_btr_defs, basic_block bb, int insn_luid, rtx insn,
 /* Create a new target register user structure, for a use in block BB,
    instruction INSN.  Return the new user.  */
 static btr_user
-new_btr_user (basic_block bb, int insn_luid, rtx insn)
+new_btr_user (basic_block bb, int insn_luid, rtx_insn *insn)
 {
   /* This instruction reads target registers.  We need
      to decide whether we can replace all target register
@@ -463,8 +464,8 @@ compute_defs_uses_and_gen (fibheap_t all_btr_defs, btr_def *def_array,
       basic_block bb = BASIC_BLOCK_FOR_FN (cfun, i);
       int reg;
       btr_def defs_this_bb = NULL;
-      rtx insn;
-      rtx last;
+      rtx_insn *insn;
+      rtx_insn *last;
       int can_throw = 0;
 
       info.users_this_bb = NULL;
@@ -671,8 +672,8 @@ link_btr_uses (btr_def *def_array, btr_user *use_array, sbitmap *bb_out,
   for (i = NUM_FIXED_BLOCKS; i < last_basic_block_for_fn (cfun); i++)
     {
       basic_block bb = BASIC_BLOCK_FOR_FN (cfun, i);
-      rtx insn;
-      rtx last;
+      rtx_insn *insn;
+      rtx_insn *last;
 
       bitmap_union_of_preds (reaching_defs, bb_out, BASIC_BLOCK_FOR_FN (cfun, i));
       for (insn = BB_HEAD (bb), last = NEXT_INSN (BB_END (bb));
@@ -1154,11 +1155,11 @@ move_btr_def (basic_block new_def_bb, int btr, btr_def def, bitmap live_range,
      Replace all uses of the old target register definition by
      uses of the new definition.  Delete the old definition.  */
   basic_block b = new_def_bb;
-  rtx insp = BB_HEAD (b);
-  rtx old_insn = def->insn;
+  rtx_insn *insp = BB_HEAD (b);
+  rtx_insn *old_insn = def->insn;
   rtx src;
   rtx btr_rtx;
-  rtx new_insn;
+  rtx_insn *new_insn;
   enum machine_mode btr_mode;
   btr_user user;
   rtx set;
@@ -1200,7 +1201,7 @@ move_btr_def (basic_block new_def_bb, int btr, btr_def def, bitmap live_range,
   btr_mode = GET_MODE (SET_DEST (set));
   btr_rtx = gen_rtx_REG (btr_mode, btr);
 
-  new_insn = gen_move_insn (btr_rtx, src);
+  new_insn = as_a <rtx_insn *> (gen_move_insn (btr_rtx, src));
 
   /* Insert target register initialization at head of basic block.  */
   def->insn = emit_insn_after (new_insn, insp);
@@ -1236,7 +1237,7 @@ move_btr_def (basic_block new_def_bb, int btr, btr_def def, bitmap live_range,
 /* We anticipate intra-block scheduling to be done.  See if INSN could move
    up within BB by N_INSNS.  */
 static int
-can_move_up (const_basic_block bb, const_rtx insn, int n_insns)
+can_move_up (const_basic_block bb, const rtx_insn *insn, int n_insns)
 {
   while (insn != BB_HEAD (bb) && n_insns > 0)
     {
-- 
1.8.5.3

[PATCH 051/236] bb-reorder.c: Use rtx_insn

[David Malcolm]

gcc/
	* bb-reorder.c (copy_bb_p): Strengthen local "insn" from rtx to
	rtx_insn *.
	(get_uncond_jump_length): Likewise for locals "label", "jump".
	(fix_up_crossing_landing_pad): Likewise for locals "new_label",
	"jump", "insn".
	(add_labels_and_missing_jumps): Likewise for local "new_jump".
	(fix_up_fall_thru_edges): Likewise for local "old_jump".
	(find_jump_block): Likewise for local "insn".
	(fix_crossing_conditional_branches): Likewise for locals
	"old_jump", "new_jump".
	(fix_crossing_unconditional_branches): Likewise for locals
	"last_insn", "indirect_jump_sequence", "jump_insn", "cur_insn".
	(pass_duplicate_computed_gotos::execute): Likewise for local "insn".
---
 gcc/bb-reorder.c | 30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/gcc/bb-reorder.c b/gcc/bb-reorder.c
index 2d3e6eb..551320e 100644
--- a/gcc/bb-reorder.c
+++ b/gcc/bb-reorder.c
@@ -1331,7 +1331,7 @@ copy_bb_p (const_basic_block bb, int code_may_grow)
 {
   int size = 0;
   int max_size = uncond_jump_length;
-  rtx insn;
+  rtx_insn *insn;
 
   if (!bb->frequency)
     return false;
@@ -1371,7 +1371,7 @@ copy_bb_p (const_basic_block bb, int code_may_grow)
 int
 get_uncond_jump_length (void)
 {
-  rtx label, jump;
+  rtx_insn *label, *jump;
   int length;
 
   label = emit_label_before (gen_label_rtx (), get_insns ());
@@ -1393,7 +1393,8 @@ fix_up_crossing_landing_pad (eh_landing_pad old_lp, basic_block old_bb)
 {
   eh_landing_pad new_lp;
   basic_block new_bb, last_bb, post_bb;
-  rtx new_label, jump, post_label;
+  rtx_insn *new_label, *jump;
+  rtx post_label;
   unsigned new_partition;
   edge_iterator ei;
   edge e;
@@ -1434,7 +1435,7 @@ fix_up_crossing_landing_pad (eh_landing_pad old_lp, basic_block old_bb)
   for (ei = ei_start (old_bb->preds); (e = ei_safe_edge (ei)) != NULL; )
     if (BB_PARTITION (e->src) == new_partition)
       {
-	rtx insn = BB_END (e->src);
+	rtx_insn *insn = BB_END (e->src);
 	rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
 
 	gcc_assert (note != NULL);
@@ -1732,7 +1733,8 @@ add_labels_and_missing_jumps (vec<edge> crossing_edges)
     {
       basic_block src = e->src;
       basic_block dest = e->dest;
-      rtx label, new_jump;
+      rtx label;
+      rtx_insn *new_jump;
 
       if (dest == EXIT_BLOCK_PTR_FOR_FN (cfun))
 	continue;
@@ -1789,7 +1791,7 @@ fix_up_fall_thru_edges (void)
   edge e;
   bool cond_jump_crosses;
   int invert_worked;
-  rtx old_jump;
+  rtx_insn *old_jump;
   rtx fall_thru_label;
 
   FOR_EACH_BB_FN (cur_bb, cfun)
@@ -1936,7 +1938,7 @@ find_jump_block (basic_block jump_dest)
 {
   basic_block source_bb = NULL;
   edge e;
-  rtx insn;
+  rtx_insn *insn;
   edge_iterator ei;
 
   FOR_EACH_EDGE (e, ei, jump_dest->preds)
@@ -1986,7 +1988,7 @@ fix_crossing_conditional_branches (void)
   edge succ2;
   edge crossing_edge;
   edge new_edge;
-  rtx old_jump;
+  rtx_insn *old_jump;
   rtx set_src;
   rtx old_label = NULL_RTX;
   rtx new_label;
@@ -2053,7 +2055,7 @@ fix_crossing_conditional_branches (void)
 	      else
 		{
 		  basic_block last_bb;
-		  rtx new_jump;
+		  rtx_insn *new_jump;
 
 		  /* Create new basic block to be dest for
 		     conditional jump.  */
@@ -2113,13 +2115,13 @@ static void
 fix_crossing_unconditional_branches (void)
 {
   basic_block cur_bb;
-  rtx last_insn;
+  rtx_insn *last_insn;
   rtx label;
   rtx label_addr;
-  rtx indirect_jump_sequence;
-  rtx jump_insn = NULL_RTX;
+  rtx_insn *indirect_jump_sequence;
+  rtx_insn *jump_insn = NULL;
   rtx new_reg;
-  rtx cur_insn;
+  rtx_insn *cur_insn;
   edge succ;
 
   FOR_EACH_BB_FN (cur_bb, cfun)
@@ -2443,7 +2445,7 @@ pass_duplicate_computed_gotos::execute (function *fun)
      mark it in the candidates.  */
   FOR_EACH_BB_FN (bb, fun)
     {
-      rtx insn;
+      rtx_insn *insn;
       edge e;
       edge_iterator ei;
       int size, all_flags;
-- 
1.8.5.3

Re: [PATCH 051/236] bb-reorder.c: Use rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* bb-reorder.c (copy_bb_p): Strengthen local "insn" from rtx to
> 	rtx_insn *.
> 	(get_uncond_jump_length): Likewise for locals "label", "jump".
> 	(fix_up_crossing_landing_pad): Likewise for locals "new_label",
> 	"jump", "insn".
> 	(add_labels_and_missing_jumps): Likewise for local "new_jump".
> 	(fix_up_fall_thru_edges): Likewise for local "old_jump".
> 	(find_jump_block): Likewise for local "insn".
> 	(fix_crossing_conditional_branches): Likewise for locals
> 	"old_jump", "new_jump".
> 	(fix_crossing_unconditional_branches): Likewise for locals
> 	"last_insn", "indirect_jump_sequence", "jump_insn", "cur_insn".
> 	(pass_duplicate_computed_gotos::execute): Likewise for local "insn".
> ---
OK.

As are patches #52-#56

Jeff

[PATCH 089/236] loop-iv.c: Use rtx_insn (also touches cfgloop.h and loop-unroll.c)

[David Malcolm]

gcc/
	* cfgloop.h (iv_analyze): Strengthen param 1 "insn" from rtx to
	rtx_insn *.
	(iv_analyze_result): Likewise.
	(iv_analyze_expr): Likewise.
	(biv_p): Likewise.

	* loop-iv.c (iv_get_reaching_def): Strengthen param "insn" and
	local "def_insn" from rtx to rtx_insn *.
	(get_biv_step_1): Likewise for local "insn".
	(iv_analyze_expr): Likewise for param "insn".
	(iv_analyze_def): Likewise for local "insn".
	(iv_analyze_op): Likewise for param "insn".
	(iv_analyze): Likewise.
	(iv_analyze_result): Likewise.
	(biv_p): Likewise.
	(suitable_set_for_replacement): Likewise.
	(simplify_using_initial_values): Likewise for local "insn".
	(iv_number_of_iterations): Likewise for param "insn".
	(check_simple_exit): Add checked cast to rtx_insn when invoking
	iv_number_of_iterations for now (until get_condition is
	strengthened).

	* loop-unroll.c (analyze_iv_to_split_insn): Strengthen param
	"insn" from rtx to rtx_insn *.
	(analyze_insns_in_loop): Likewise for local "insn".
---
 gcc/cfgloop.h     |  9 +++++----
 gcc/loop-iv.c     | 31 +++++++++++++++++--------------
 gcc/loop-unroll.c |  6 +++---
 3 files changed, 25 insertions(+), 21 deletions(-)

diff --git a/gcc/cfgloop.h b/gcc/cfgloop.h
index 7d2c1de..b7f5d2a 100644
--- a/gcc/cfgloop.h
+++ b/gcc/cfgloop.h
@@ -423,11 +423,12 @@ struct GTY(()) niter_desc
 };
 
 extern void iv_analysis_loop_init (struct loop *);
-extern bool iv_analyze (rtx, rtx, struct rtx_iv *);
-extern bool iv_analyze_result (rtx, rtx, struct rtx_iv *);
-extern bool iv_analyze_expr (rtx, rtx, enum machine_mode, struct rtx_iv *);
+extern bool iv_analyze (rtx_insn *, rtx, struct rtx_iv *);
+extern bool iv_analyze_result (rtx_insn *, rtx, struct rtx_iv *);
+extern bool iv_analyze_expr (rtx_insn *, rtx, enum machine_mode,
+			     struct rtx_iv *);
 extern rtx get_iv_value (struct rtx_iv *, rtx);
-extern bool biv_p (rtx, rtx);
+extern bool biv_p (rtx_insn *, rtx);
 extern void find_simple_exit (struct loop *, struct niter_desc *);
 extern void iv_analysis_done (void);
 
diff --git a/gcc/loop-iv.c b/gcc/loop-iv.c
index ee6c71e..b8b5d19 100644
--- a/gcc/loop-iv.c
+++ b/gcc/loop-iv.c
@@ -136,7 +136,7 @@ biv_entry_hasher::equal (const value_type *b, const compare_type *r)
 
 static hash_table <biv_entry_hasher> bivs;
 
-static bool iv_analyze_op (rtx, rtx, struct rtx_iv *);
+static bool iv_analyze_op (rtx_insn *, rtx, struct rtx_iv *);
 
 /* Return the RTX code corresponding to the IV extend code EXTEND.  */
 static inline enum rtx_code
@@ -339,11 +339,11 @@ latch_dominating_def (rtx reg, df_ref *def)
 /* Gets definition of REG reaching its use in INSN and stores it to DEF.  */
 
 static enum iv_grd_result
-iv_get_reaching_def (rtx insn, rtx reg, df_ref *def)
+iv_get_reaching_def (rtx_insn *insn, rtx reg, df_ref *def)
 {
   df_ref use, adef;
   basic_block def_bb, use_bb;
-  rtx def_insn;
+  rtx_insn *def_insn;
   bool dom_p;
 
   *def = NULL;
@@ -650,7 +650,7 @@ get_biv_step_1 (df_ref def, rtx reg,
   rtx set, rhs, op0 = NULL_RTX, op1 = NULL_RTX;
   rtx next, nextr, tmp;
   enum rtx_code code;
-  rtx insn = DF_REF_INSN (def);
+  rtx_insn *insn = DF_REF_INSN (def);
   df_ref next_def;
   enum iv_grd_result res;
 
@@ -946,7 +946,8 @@ iv_analyze_biv (rtx def, struct rtx_iv *iv)
    The mode of the induction variable is MODE.  */
 
 bool
-iv_analyze_expr (rtx insn, rtx rhs, enum machine_mode mode, struct rtx_iv *iv)
+iv_analyze_expr (rtx_insn *insn, rtx rhs, enum machine_mode mode,
+		 struct rtx_iv *iv)
 {
   rtx mby = NULL_RTX, tmp;
   rtx op0 = NULL_RTX, op1 = NULL_RTX;
@@ -1073,7 +1074,7 @@ iv_analyze_expr (rtx insn, rtx rhs, enum machine_mode mode, struct rtx_iv *iv)
 static bool
 iv_analyze_def (df_ref def, struct rtx_iv *iv)
 {
-  rtx insn = DF_REF_INSN (def);
+  rtx_insn *insn = DF_REF_INSN (def);
   rtx reg = DF_REF_REG (def);
   rtx set, rhs;
 
@@ -1134,7 +1135,7 @@ iv_analyze_def (df_ref def, struct rtx_iv *iv)
 /* Analyzes operand OP of INSN and stores the result to *IV.  */
 
 static bool
-iv_analyze_op (rtx insn, rtx op, struct rtx_iv *iv)
+iv_analyze_op (rtx_insn *insn, rtx op, struct rtx_iv *iv)
 {
   df_ref def = NULL;
   enum iv_grd_result res;
@@ -1192,7 +1193,7 @@ iv_analyze_op (rtx insn, rtx op, struct rtx_iv *iv)
 /* Analyzes value VAL at INSN and stores the result to *IV.  */
 
 bool
-iv_analyze (rtx insn, rtx val, struct rtx_iv *iv)
+iv_analyze (rtx_insn *insn, rtx val, struct rtx_iv *iv)
 {
   rtx reg;
 
@@ -1217,7 +1218,7 @@ iv_analyze (rtx insn, rtx val, struct rtx_iv *iv)
 /* Analyzes definition of DEF in INSN and stores the result to IV.  */
 
 bool
-iv_analyze_result (rtx insn, rtx def, struct rtx_iv *iv)
+iv_analyze_result (rtx_insn *insn, rtx def, struct rtx_iv *iv)
 {
   df_ref adef;
 
@@ -1233,7 +1234,7 @@ iv_analyze_result (rtx insn, rtx def, struct rtx_iv *iv)
    iv_analysis_loop_init) for this function to produce a result.  */
 
 bool
-biv_p (rtx insn, rtx reg)
+biv_p (rtx_insn *insn, rtx reg)
 {
   struct rtx_iv iv;
   df_ref def, last_def;
@@ -1453,7 +1454,7 @@ replace_single_def_regs (rtx *reg, void *expr1)
    the set; return false otherwise.  */
 
 static bool
-suitable_set_for_replacement (rtx insn, rtx *dest, rtx *src)
+suitable_set_for_replacement (rtx_insn *insn, rtx *dest, rtx *src)
 {
   rtx set = single_set (insn);
   rtx lhs = NULL_RTX, rhs;
@@ -1871,7 +1872,8 @@ static void
 simplify_using_initial_values (struct loop *loop, enum rtx_code op, rtx *expr)
 {
   bool expression_valid;
-  rtx head, tail, insn, cond_list, last_valid_expr;
+  rtx head, tail, cond_list, last_valid_expr;
+  rtx_insn *insn;
   rtx neutral, aggr;
   regset altered, this_altered;
   edge e;
@@ -2322,7 +2324,7 @@ determine_max_iter (struct loop *loop, struct niter_desc *desc, rtx old_niter)
    (basically its rtl version), complicated by things like subregs.  */
 
 static void
-iv_number_of_iterations (struct loop *loop, rtx insn, rtx condition,
+iv_number_of_iterations (struct loop *loop, rtx_insn *insn, rtx condition,
 			 struct niter_desc *desc)
 {
   rtx op0, op1, delta, step, bound, may_xform, tmp, tmp0, tmp1;
@@ -2928,7 +2930,8 @@ check_simple_exit (struct loop *loop, edge e, struct niter_desc *desc)
 
   /* Check that we are able to determine number of iterations and fill
      in information about it.  */
-  iv_number_of_iterations (loop, at, condition, desc);
+  iv_number_of_iterations (loop, as_a_nullable <rtx_insn *> (at),
+			   condition, desc);
 }
 
 /* Finds a simple exit of LOOP and stores its description into DESC.  */
diff --git a/gcc/loop-unroll.c b/gcc/loop-unroll.c
index 4ce0830..c283900 100644
--- a/gcc/loop-unroll.c
+++ b/gcc/loop-unroll.c
@@ -194,7 +194,7 @@ static void apply_opt_in_copies (struct opt_info *, unsigned, bool, bool);
 static void free_opt_info (struct opt_info *);
 static struct var_to_expand *analyze_insn_to_expand_var (struct loop*, rtx);
 static bool referenced_in_one_insn_in_loop_p (struct loop *, rtx, int *);
-static struct iv_to_split *analyze_iv_to_split_insn (rtx);
+static struct iv_to_split *analyze_iv_to_split_insn (rtx_insn *);
 static void expand_var_during_unrolling (struct var_to_expand *, rtx);
 static void insert_var_expansion_initialization (struct var_to_expand *,
 						 basic_block);
@@ -1898,7 +1898,7 @@ analyze_insn_to_expand_var (struct loop *loop, rtx insn)
    pointer to it.  */
 
 static struct iv_to_split *
-analyze_iv_to_split_insn (rtx insn)
+analyze_iv_to_split_insn (rtx_insn *insn)
 {
   rtx set, dest;
   struct rtx_iv iv;
@@ -1959,7 +1959,7 @@ analyze_insns_in_loop (struct loop *loop)
   basic_block *body, bb;
   unsigned i;
   struct opt_info *opt_info = XCNEW (struct opt_info);
-  rtx insn;
+  rtx_insn *insn;
   struct iv_to_split *ivts = NULL;
   struct var_to_expand *ves = NULL;
   iv_to_split **slot1;
-- 
1.8.5.3

[PATCH 106/236] regrename.c: Use rtx_insn

[David Malcolm]

gcc/
	* regrename.c (create_new_chain): Strengthen param "insn" from rtx
	to rtx_insn *.
	(init_rename_info): Replace use of NULL_RTX with NULL when dealing
	with an insn.
	(regrename_analyze): Strengthen local "insn" from rtx to
	rtx_insn *.
	(scan_rtx_reg): Likewise for param "insn".
	(scan_rtx_address): Likewise.
	(scan_rtx): Likewise.
	(restore_operands): Likewise.
	(record_out_operands): Likewise.
	(build_def_use): Likewise for local "insn".  Replace use of
	NULL_RTX with NULL when dealing with an insn.
---
 gcc/regrename.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/gcc/regrename.c b/gcc/regrename.c
index 019aee1..805cb7b 100644
--- a/gcc/regrename.c
+++ b/gcc/regrename.c
@@ -107,7 +107,7 @@ static struct obstack rename_obstack;
    information about insn operands, and we store it here.  */
 vec<insn_rr_info> insn_rr;
 
-static void scan_rtx (rtx, rtx *, enum reg_class, enum scan_actions,
+static void scan_rtx (rtx_insn *, rtx *, enum reg_class, enum scan_actions,
 		      enum op_type);
 static bool build_def_use (basic_block);
 
@@ -219,7 +219,7 @@ record_operand_use (struct du_head *head, struct du_chain *this_du)
 
 static du_head_p
 create_new_chain (unsigned this_regno, unsigned this_nregs, rtx *loc,
-		  rtx insn, enum reg_class cl)
+		  rtx_insn *insn, enum reg_class cl)
 {
   struct du_head *head = XOBNEW (&rename_obstack, struct du_head);
   struct du_chain *this_du;
@@ -579,7 +579,7 @@ init_rename_info (struct bb_rename_info *p, basic_block bb)
 	  du_head_p chain;
 	  if (dump_file)
 	    fprintf (dump_file, "opening incoming chain\n");
-	  chain = create_new_chain (i, iri->nregs, NULL, NULL_RTX, NO_REGS);
+	  chain = create_new_chain (i, iri->nregs, NULL, NULL, NO_REGS);
 	  bitmap_set_bit (&p->incoming_open_chains_set, chain->id);
 	}
     }
@@ -724,7 +724,7 @@ regrename_analyze (bitmap bb_mask)
 	  open_chains = NULL;
 	  if (insn_rr.exists ())
 	    {
-	      rtx insn;
+	      rtx_insn *insn;
 	      FOR_BB_INSNS (bb1, insn)
 		{
 		  insn_rr_info *p = &insn_rr[INSN_UID (insn)];
@@ -1023,7 +1023,7 @@ note_sets_clobbers (rtx x, const_rtx set, void *data)
 }
 
 static void
-scan_rtx_reg (rtx insn, rtx *loc, enum reg_class cl, enum scan_actions action,
+scan_rtx_reg (rtx_insn *insn, rtx *loc, enum reg_class cl, enum scan_actions action,
 	      enum op_type type)
 {
   struct du_head **p;
@@ -1178,7 +1178,7 @@ scan_rtx_reg (rtx insn, rtx *loc, enum reg_class cl, enum scan_actions action,
    BASE_REG_CLASS depending on how the register is being considered.  */
 
 static void
-scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl,
+scan_rtx_address (rtx_insn *insn, rtx *loc, enum reg_class cl,
 		  enum scan_actions action, enum machine_mode mode,
 		  addr_space_t as)
 {
@@ -1328,7 +1328,7 @@ scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl,
 }
 
 static void
-scan_rtx (rtx insn, rtx *loc, enum reg_class cl, enum scan_actions action,
+scan_rtx (rtx_insn *insn, rtx *loc, enum reg_class cl, enum scan_actions action,
 	  enum op_type type)
 {
   const char *fmt;
@@ -1458,7 +1458,7 @@ hide_operands (int n_ops, rtx *old_operands, rtx *old_dups,
    are processing; the arguments are the same as in hide_operands.  */
 
 static void
-restore_operands (rtx insn, int n_ops, rtx *old_operands, rtx *old_dups)
+restore_operands (rtx_insn *insn, int n_ops, rtx *old_operands, rtx *old_dups)
 {
   int i;
   for (i = 0; i < recog_data.n_dups; i++)
@@ -1475,7 +1475,7 @@ restore_operands (rtx insn, int n_ops, rtx *old_operands, rtx *old_dups)
    record information about the operands in the insn.  */
 
 static void
-record_out_operands (rtx insn, bool earlyclobber, insn_rr_info *insn_info)
+record_out_operands (rtx_insn *insn, bool earlyclobber, insn_rr_info *insn_info)
 {
   int n_ops = recog_data.n_operands;
   int alt = which_alternative;
@@ -1525,7 +1525,7 @@ record_out_operands (rtx insn, bool earlyclobber, insn_rr_info *insn_info)
 static bool
 build_def_use (basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
   unsigned HOST_WIDE_INT untracked_operands;
 
   fail_current_block = false;
@@ -1626,7 +1626,7 @@ build_def_use (basic_block bb)
 		  enum machine_mode mode = GET_MODE (op);
 		  unsigned this_regno = REGNO (op);
 		  unsigned this_nregs = hard_regno_nregs[this_regno][mode];
-		  create_new_chain (this_regno, this_nregs, NULL, NULL_RTX,
+		  create_new_chain (this_regno, this_nregs, NULL, NULL,
 				    NO_REGS);
 		}
 	    }
-- 
1.8.5.3

[PATCH 163/236] unshare_all_rtl_again takes an rtx_insn *

[David Malcolm]

All in-tree users of unshare_all_rtl_again now pass in an rtx_insn *.

gcc/
	* rtl.h (unshare_all_rtl_again): Strengthen param "insn" from rtx
	to rtx_insn *.

	* emit-rtl.c (unshare_all_rtl_1): Likewise.
	(unshare_all_rtl_again): Likewise, also for local "p".
---
 gcc/emit-rtl.c | 6 +++---
 gcc/rtl.h      | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 74d6f80..40e3dfc 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -2524,7 +2524,7 @@ set_new_first_and_last_insn (rtx first, rtx last)
    structure.  This routine should only be called once.  */
 
 static void
-unshare_all_rtl_1 (rtx insn)
+unshare_all_rtl_1 (rtx_insn *insn)
 {
   /* Unshare just about everything else.  */
   unshare_all_rtl_in_chain (insn);
@@ -2544,9 +2544,9 @@ unshare_all_rtl_1 (rtx insn)
    should be done sparingly.  */
 
 void
-unshare_all_rtl_again (rtx insn)
+unshare_all_rtl_again (rtx_insn *insn)
 {
-  rtx p;
+  rtx_insn *p;
   tree decl;
 
   for (p = insn; p; p = NEXT_INSN (p))
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 6afafcc..f0b48c3 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3060,7 +3060,7 @@ extern void push_topmost_sequence (void);
 extern void pop_topmost_sequence (void);
 extern void set_new_first_and_last_insn (rtx, rtx);
 extern unsigned int unshare_all_rtl (void);
-extern void unshare_all_rtl_again (rtx);
+extern void unshare_all_rtl_again (rtx_insn *);
 extern void unshare_all_rtl_in_chain (rtx);
 extern void verify_rtl_sharing (void);
 extern void add_insn (rtx);
-- 
1.8.5.3

[PATCH 073/236] expmed.c: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* expmed.c (store_bit_field_using_insv): Strengthen local "last"
	from rtx to rtx_insn *.
	(store_bit_field_1): Likewise.
	(extract_bit_field_1): Likewise.
	(expand_mult_const): Likewise for local "insns".
	(expmed_mult_highpart): Strengthen local "label" from rtx to
	rtx_code_label *.
	(expand_smod_pow2): Likewise.
	(expand_sdiv_pow2): Likewise.
	(expand_divmod): Strengthen locals "last", "insn" from rtx to
	rtx_insn *.  Strengthen locals "label", "label1", "label2",
	"label3", "label4", "label5", "lab" from rtx to rtx_code_label *.
	(emit_cstore): Strengthen local "last" from rtx to rtx_insn *.
	(emit_store_flag): Likewise.
	(emit_store_flag_force): Strengthen local "label" from rtx to
	rtx_code_label *.
	(do_cmp_and_jump): Likewise for param "label".
---
 gcc/expmed.c | 61 +++++++++++++++++++++++++++++++++---------------------------
 1 file changed, 34 insertions(+), 27 deletions(-)

diff --git a/gcc/expmed.c b/gcc/expmed.c
index e76b6fc..1c79618 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -65,7 +65,7 @@ static rtx extract_fixed_bit_field_1 (enum machine_mode, rtx,
 static rtx lshift_value (enum machine_mode, unsigned HOST_WIDE_INT, int);
 static rtx extract_split_bit_field (rtx, unsigned HOST_WIDE_INT,
 				    unsigned HOST_WIDE_INT, int);
-static void do_cmp_and_jump (rtx, rtx, enum rtx_code, enum machine_mode, rtx);
+static void do_cmp_and_jump (rtx, rtx, enum rtx_code, enum machine_mode, rtx_code_label *);
 static rtx expand_smod_pow2 (enum machine_mode, rtx, HOST_WIDE_INT);
 static rtx expand_sdiv_pow2 (enum machine_mode, rtx, HOST_WIDE_INT);
 
@@ -508,7 +508,7 @@ store_bit_field_using_insv (const extraction_insn *insv, rtx op0,
   struct expand_operand ops[4];
   rtx value1;
   rtx xop0 = op0;
-  rtx last = get_last_insn ();
+  rtx_insn *last = get_last_insn ();
   bool copy_back = false;
 
   enum machine_mode op_mode = insv->field_mode;
@@ -794,7 +794,7 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
       unsigned int backwards = WORDS_BIG_ENDIAN && fieldmode != BLKmode;
       unsigned int nwords = (bitsize + (BITS_PER_WORD - 1)) / BITS_PER_WORD;
       unsigned int i;
-      rtx last;
+      rtx_insn *last;
 
       /* This is the mode we must force value to, so that there will be enough
 	 subwords to extract.  Note that fieldmode will often (always?) be
@@ -900,7 +900,7 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 	  && store_bit_field_using_insv (&insv, op0, bitsize, bitnum, value))
 	return true;
 
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
 
       /* Try loading part of OP0 into a register, inserting the bitfield
 	 into that, and then copying the result back to OP0.  */
@@ -1579,7 +1579,7 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
       unsigned int backwards = WORDS_BIG_ENDIAN;
       unsigned int nwords = (bitsize + (BITS_PER_WORD - 1)) / BITS_PER_WORD;
       unsigned int i;
-      rtx last;
+      rtx_insn *last;
 
       if (target == 0 || !REG_P (target) || !valid_multiword_target_p (target))
 	target = gen_reg_rtx (mode);
@@ -1697,7 +1697,7 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 	    return result;
 	}
 
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
 
       /* Try loading part of OP0 into a register and extracting the
 	 bitfield from that.  */
@@ -2929,7 +2929,8 @@ expand_mult_const (enum machine_mode mode, rtx op0, HOST_WIDE_INT val,
 		   enum mult_variant variant)
 {
   HOST_WIDE_INT val_so_far;
-  rtx insn, accum, tem;
+  rtx_insn *insn;
+  rtx accum, tem;
   int opno;
   enum machine_mode nmode;
 
@@ -3526,7 +3527,8 @@ expmed_mult_highpart_optab (enum machine_mode mode, rtx op0, rtx op1,
       && (mul_cost (speed, wider_mode) + shift_cost (speed, mode, size-1)
 	  < max_cost))
     {
-      rtx insns, wop0, wop1;
+      rtx_insn *insns;
+      rtx wop0, wop1;
 
       /* We need to widen the operands, for example to ensure the
 	 constant multiplier is correctly sign or zero extended.
@@ -3647,7 +3649,8 @@ expmed_mult_highpart (enum machine_mode mode, rtx op0, rtx op1,
 static rtx
 expand_smod_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d)
 {
-  rtx result, temp, shift, label;
+  rtx result, temp, shift;
+  rtx_code_label *label;
   int logd;
   int prec = GET_MODE_PRECISION (mode);
 
@@ -3743,7 +3746,8 @@ expand_smod_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d)
 static rtx
 expand_sdiv_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d)
 {
-  rtx temp, label;
+  rtx temp;
+  rtx_code_label *label;
   int logd;
 
   logd = floor_log2 (d);
@@ -3776,7 +3780,7 @@ expand_sdiv_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d)
 				     mode, temp, temp2, mode, 0);
       if (temp2)
 	{
-	  rtx seq = get_insns ();
+	  rtx_insn *seq = get_insns ();
 	  end_sequence ();
 	  emit_insn (seq);
 	  return expand_shift (RSHIFT_EXPR, mode, temp2, logd, NULL_RTX, 0);
@@ -3857,9 +3861,9 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
   enum machine_mode compute_mode;
   rtx tquotient;
   rtx quotient = 0, remainder = 0;
-  rtx last;
+  rtx_insn *last;
   int size;
-  rtx insn;
+  rtx_insn *insn;
   optab optab1, optab2;
   int op1_is_constant, op1_is_pow2 = 0;
   int max_cost, extra_cost;
@@ -4477,7 +4481,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 	    /* This could be computed with a branch-less sequence.
 	       Save that for later.  */
 	    rtx tem;
-	    rtx label = gen_label_rtx ();
+	    rtx_code_label *label = gen_label_rtx ();
 	    do_cmp_and_jump (remainder, const0_rtx, EQ, compute_mode, label);
 	    tem = expand_binop (compute_mode, xor_optab, op0, op1,
 				NULL_RTX, 0, OPTAB_WIDEN);
@@ -4491,7 +4495,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 	/* No luck with division elimination or divmod.  Have to do it
 	   by conditionally adjusting op0 *and* the result.  */
 	{
-	  rtx label1, label2, label3, label4, label5;
+	  rtx_code_label *label1, *label2, *label3, *label4, *label5;
 	  rtx adjusted_op0;
 	  rtx tem;
 
@@ -4552,7 +4556,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 				      compute_mode, 1, 1);
 		if (t3 == 0)
 		  {
-		    rtx lab;
+		    rtx_code_label *lab;
 		    lab = gen_label_rtx ();
 		    do_cmp_and_jump (t2, const0_rtx, EQ, compute_mode, lab);
 		    expand_inc (t1, const1_rtx);
@@ -4592,7 +4596,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 	      {
 		/* This could be computed with a branch-less sequence.
 		   Save that for later.  */
-		rtx label = gen_label_rtx ();
+		rtx_code_label *label = gen_label_rtx ();
 		do_cmp_and_jump (remainder, const0_rtx, EQ,
 				 compute_mode, label);
 		expand_inc (quotient, const1_rtx);
@@ -4604,7 +4608,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 	    /* No luck with division elimination or divmod.  Have to do it
 	       by conditionally adjusting op0 *and* the result.  */
 	    {
-	      rtx label1, label2;
+	      rtx_code_label *label1, *label2;
 	      rtx adjusted_op0, tem;
 
 	      quotient = gen_reg_rtx (compute_mode);
@@ -4649,7 +4653,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 				      compute_mode, 1, 1);
 		if (t3 == 0)
 		  {
-		    rtx lab;
+		    rtx_code_label *lab;
 		    lab = gen_label_rtx ();
 		    do_cmp_and_jump (t2, const0_rtx, EQ, compute_mode, lab);
 		    expand_inc (t1, const1_rtx);
@@ -4689,7 +4693,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 		/* This could be computed with a branch-less sequence.
 		   Save that for later.  */
 		rtx tem;
-		rtx label = gen_label_rtx ();
+		rtx_code_label *label = gen_label_rtx ();
 		do_cmp_and_jump (remainder, const0_rtx, EQ,
 				 compute_mode, label);
 		tem = expand_binop (compute_mode, xor_optab, op0, op1,
@@ -4704,7 +4708,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 	    /* No luck with division elimination or divmod.  Have to do it
 	       by conditionally adjusting op0 *and* the result.  */
 	    {
-	      rtx label1, label2, label3, label4, label5;
+	      rtx_code_label *label1, *label2, *label3, *label4, *label5;
 	      rtx adjusted_op0;
 	      rtx tem;
 
@@ -4779,7 +4783,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 	if (unsignedp)
 	  {
 	    rtx tem;
-	    rtx label;
+	    rtx_code_label *label;
 	    label = gen_label_rtx ();
 	    quotient = gen_reg_rtx (compute_mode);
 	    remainder = gen_reg_rtx (compute_mode);
@@ -4802,7 +4806,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode,
 	else
 	  {
 	    rtx abs_rem, abs_op1, tem, mask;
-	    rtx label;
+	    rtx_code_label *label;
 	    label = gen_label_rtx ();
 	    quotient = gen_reg_rtx (compute_mode);
 	    remainder = gen_reg_rtx (compute_mode);
@@ -5112,7 +5116,8 @@ emit_cstore (rtx target, enum insn_code icode, enum rtx_code code,
 	     enum machine_mode target_mode)
 {
   struct expand_operand ops[4];
-  rtx op0, last, comparison, subtarget;
+  rtx op0, comparison, subtarget;
+  rtx_insn *last;
   enum machine_mode result_mode = targetm.cstore_mode (icode);
 
   last = get_last_insn ();
@@ -5416,7 +5421,8 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1,
   enum machine_mode target_mode = target ? GET_MODE (target) : VOIDmode;
   enum rtx_code rcode;
   rtx subtarget;
-  rtx tem, last, trueval;
+  rtx tem, trueval;
+  rtx_insn *last;
 
   /* If we compare constants, we shouldn't use a store-flag operation,
      but a constant load.  We can get there via the vanilla route that
@@ -5744,7 +5750,8 @@ rtx
 emit_store_flag_force (rtx target, enum rtx_code code, rtx op0, rtx op1,
 		       enum machine_mode mode, int unsignedp, int normalizep)
 {
-  rtx tem, label;
+  rtx tem;
+  rtx_code_label *label;
   rtx trueval, falseval;
 
   /* First see if emit_store_flag can do the job.  */
@@ -5818,7 +5825,7 @@ emit_store_flag_force (rtx target, enum rtx_code code, rtx op0, rtx op1,
 
 static void
 do_cmp_and_jump (rtx arg1, rtx arg2, enum rtx_code op, enum machine_mode mode,
-		 rtx label)
+		 rtx_code_label *label)
 {
   int unsignedp = (op == LTU || op == LEU || op == GTU || op == GEU);
   do_compare_rtx_and_jump (arg1, arg2, op, unsignedp, mode,
-- 
1.8.5.3

[PATCH 100/236] print-rtl.c: Use rtx_insn for various debug_ functions (also touches config/rs6000/rs6000.c)

[David Malcolm]

gcc/
	* rtl.h (debug_rtx_list): Strengthen param 1 "x" from const_rtx to
	const rtx_insn *.
	(debug_rtx_range): Likewise for params 1 and 2 "start" and "end".
	(debug_rtx_find): Likewise for param 1 "x".

	* print-rtl.c (debug_rtx_list): Strengthen param 1 "x" from
	const_rtx to const rtx_insn *.  Likewise for local "insn".
	(debug_rtx_range): Likewise for params 1 and 2 "start" and "end".
	(debug_rtx_find): Likewise for param 1 "x".
	(print_rtl): Likewise for local "tmp_rtx", adding a checked cast
	from const_rtx to const rtx_insn * within the appropriate cases of
	the switch statement.

	* config/rs6000/rs6000.c (rs6000_debug_legitimize_address):
	Strengthen local "insns" from rtx to rtx_insn * since this is
	passed to a call to debug_rtx_list.
---
 gcc/config/rs6000/rs6000.c |  2 +-
 gcc/print-rtl.c            | 24 ++++++++++++++----------
 gcc/rtl.h                  |  6 +++---
 3 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 8d80146..5faf329 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -6737,7 +6737,7 @@ static rtx
 rs6000_debug_legitimize_address (rtx x, rtx oldx, enum machine_mode mode)
 {
   rtx ret;
-  rtx insns;
+  rtx_insn *insns;
 
   start_sequence ();
   ret = rs6000_legitimize_address (x, oldx, mode);
diff --git a/gcc/print-rtl.c b/gcc/print-rtl.c
index 2f9f547..58351ef 100644
--- a/gcc/print-rtl.c
+++ b/gcc/print-rtl.c
@@ -697,14 +697,15 @@ DEBUG_VARIABLE int debug_rtx_count = 0;	/* 0 is treated as equivalent to 1 */
 /* Call this function to print list from X on.
 
    N is a count of the rtx's to print. Positive values print from the specified
-   rtx on.  Negative values print a window around the rtx.
-   EG: -5 prints 2 rtx's on either side (in addition to the specified rtx).  */
+   rtx_insn on.  Negative values print a window around the rtx_insn.
+   EG: -5 prints 2 rtx_insn's on either side (in addition to the specified
+   rtx_insn).  */
 
 DEBUG_FUNCTION void
-debug_rtx_list (const_rtx x, int n)
+debug_rtx_list (const rtx_insn *x, int n)
 {
   int i,count;
-  const_rtx insn;
+  const rtx_insn *insn;
 
   count = n == 0 ? 1 : n < 0 ? -n : n;
 
@@ -725,10 +726,11 @@ debug_rtx_list (const_rtx x, int n)
     }
 }
 
-/* Call this function to print an rtx list from START to END inclusive.  */
+/* Call this function to print an rtx_insn list from START to END
+   inclusive.  */
 
 DEBUG_FUNCTION void
-debug_rtx_range (const_rtx start, const_rtx end)
+debug_rtx_range (const rtx_insn *start, const rtx_insn *end)
 {
   while (1)
     {
@@ -740,12 +742,12 @@ debug_rtx_range (const_rtx start, const_rtx end)
     }
 }
 
-/* Call this function to search an rtx list to find one with insn uid UID,
+/* Call this function to search an rtx_insn list to find one with insn uid UID,
    and then call debug_rtx_list to print it, using DEBUG_RTX_COUNT.
    The found insn is returned to enable further debugging analysis.  */
 
 DEBUG_FUNCTION const_rtx
-debug_rtx_find (const_rtx x, int uid)
+debug_rtx_find (const rtx_insn *x, int uid)
 {
   while (x != 0 && INSN_UID (x) != uid)
     x = NEXT_INSN (x);
@@ -770,7 +772,7 @@ debug_rtx_find (const_rtx x, int uid)
 void
 print_rtl (FILE *outf, const_rtx rtx_first)
 {
-  const_rtx tmp_rtx;
+  const rtx_insn *tmp_rtx;
 
   outfile = outf;
   sawclose = 0;
@@ -790,7 +792,9 @@ print_rtl (FILE *outf, const_rtx rtx_first)
       case CODE_LABEL:
       case JUMP_TABLE_DATA:
       case BARRIER:
-	for (tmp_rtx = rtx_first; tmp_rtx != 0; tmp_rtx = NEXT_INSN (tmp_rtx))
+	for (tmp_rtx = as_a <const rtx_insn *> (rtx_first);
+	     tmp_rtx != 0;
+	     tmp_rtx = NEXT_INSN (tmp_rtx))
 	  {
 	    fputs (print_rtx_head, outfile);
 	    print_rtx (tmp_rtx);
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 759d9be..17da2be 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3105,9 +3105,9 @@ extern const char *print_rtx_head;
 extern void debug (const rtx_def &ref);
 extern void debug (const rtx_def *ptr);
 extern void debug_rtx (const_rtx);
-extern void debug_rtx_list (const_rtx, int);
-extern void debug_rtx_range (const_rtx, const_rtx);
-extern const_rtx debug_rtx_find (const_rtx, int);
+extern void debug_rtx_list (const rtx_insn *, int);
+extern void debug_rtx_range (const rtx_insn *, const rtx_insn *);
+extern const_rtx debug_rtx_find (const rtx_insn *, int);
 extern void print_mem_expr (FILE *, const_tree);
 extern void print_rtl (FILE *, const_rtx);
 extern void print_simple_rtl (FILE *, const_rtx);
-- 
1.8.5.3

[PATCH 033/236] emit_move et al return rtx_insn *

[David Malcolm]

gcc/
	* expr.h (emit_move_insn): Strengthen return type from rtx to
	rtx_insn *.
	(emit_move_insn_1): Likewise.
	(emit_move_complex_push): Likewise.
	(emit_move_complex_parts): Likewise.

	* expr.c (emit_move_via_integer): Strengthen return type from rtx
	to rtx_insn *.  Replace use of NULL_RTX with NULL when working
	with insns.
	(emit_move_complex_push): Strengthen return type from rtx to
	rtx_insn *.
	(emit_move_complex): Likewise, also for local "ret".
	(emit_move_ccmode): Likewise.
	(emit_move_multi_word): Likewise for return type and locals
	"last_insn", "seq".
	(emit_move_insn_1): Likewise for return type and locals "result",
	"ret".
	(emit_move_insn): Likewise for return type and local "last_insn".
	(compress_float_constant): Likewise.
---
 gcc/expr.c | 49 ++++++++++++++++++++++++++-----------------------
 gcc/expr.h |  8 ++++----
 2 files changed, 30 insertions(+), 27 deletions(-)

diff --git a/gcc/expr.c b/gcc/expr.c
index d99bc1e..ba1a36c 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -132,7 +132,7 @@ static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
 static void store_by_pieces_2 (insn_gen_fn, machine_mode,
 			       struct store_by_pieces_d *);
 static tree clear_storage_libcall_fn (int);
-static rtx compress_float_constant (rtx, rtx);
+static rtx_insn *compress_float_constant (rtx, rtx);
 static rtx get_subtarget (rtx);
 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
 				     HOST_WIDE_INT, enum machine_mode,
@@ -3157,7 +3157,7 @@ emit_move_change_mode (enum machine_mode new_mode,
    an integer mode of the same size as MODE.  Returns the instruction
    emitted, or NULL if such a move could not be generated.  */
 
-static rtx
+static rtx_insn *
 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
 {
   enum machine_mode imode;
@@ -3166,19 +3166,19 @@ emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
   /* There must exist a mode of the exact size we require.  */
   imode = int_mode_for_mode (mode);
   if (imode == BLKmode)
-    return NULL_RTX;
+    return NULL;
 
   /* The target must support moves in this mode.  */
   code = optab_handler (mov_optab, imode);
   if (code == CODE_FOR_nothing)
-    return NULL_RTX;
+    return NULL;
 
   x = emit_move_change_mode (imode, mode, x, force);
   if (x == NULL_RTX)
-    return NULL_RTX;
+    return NULL;
   y = emit_move_change_mode (imode, mode, y, force);
   if (y == NULL_RTX)
-    return NULL_RTX;
+    return NULL;
   return emit_insn (GEN_FCN (code) (x, y));
 }
 
@@ -3243,7 +3243,7 @@ emit_move_resolve_push (enum machine_mode mode, rtx x)
    X is known to satisfy push_operand, and MODE is known to be complex.
    Returns the last instruction emitted.  */
 
-rtx
+rtx_insn *
 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
 {
   enum machine_mode submode = GET_MODE_INNER (mode);
@@ -3286,7 +3286,7 @@ emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
 /* A subroutine of emit_move_complex.  Perform the move from Y to X
    via two moves of the parts.  Returns the last instruction emitted.  */
 
-rtx
+rtx_insn *
 emit_move_complex_parts (rtx x, rtx y)
 {
   /* Show the output dies here.  This is necessary for SUBREGs
@@ -3305,7 +3305,7 @@ emit_move_complex_parts (rtx x, rtx y)
 /* A subroutine of emit_move_insn_1.  Generate a move from Y into X.
    MODE is known to be complex.  Returns the last instruction emitted.  */
 
-static rtx
+static rtx_insn *
 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
 {
   bool try_int;
@@ -3345,7 +3345,7 @@ emit_move_complex (enum machine_mode mode, rtx x, rtx y)
 
   if (try_int)
     {
-      rtx ret;
+      rtx_insn *ret;
 
       /* For memory to memory moves, optimal behavior can be had with the
 	 existing block move logic.  */
@@ -3367,10 +3367,10 @@ emit_move_complex (enum machine_mode mode, rtx x, rtx y)
 /* A subroutine of emit_move_insn_1.  Generate a move from Y into X.
    MODE is known to be MODE_CC.  Returns the last instruction emitted.  */
 
-static rtx
+static rtx_insn *
 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
 {
-  rtx ret;
+  rtx_insn *ret;
 
   /* Assume all MODE_CC modes are equivalent; if we have movcc, use it.  */
   if (mode != CCmode)
@@ -3427,11 +3427,12 @@ undefined_operand_subword_p (const_rtx op, int i)
    pattern.  Note that you will get better code if you define such
    patterns, even if they must turn into multiple assembler instructions.  */
 
-static rtx
+static rtx_insn *
 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
 {
-  rtx last_insn = 0;
-  rtx seq, inner;
+  rtx_insn *last_insn = 0;
+  rtx_insn *seq;
+  rtx inner;
   bool need_clobber;
   int i;
 
@@ -3507,7 +3508,7 @@ emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
    Called just like emit_move_insn, but assumes X and Y
    are basically valid.  */
 
-rtx
+rtx_insn *
 emit_move_insn_1 (rtx x, rtx y)
 {
   enum machine_mode mode = GET_MODE (x);
@@ -3526,7 +3527,7 @@ emit_move_insn_1 (rtx x, rtx y)
   if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
       || ALL_FIXED_POINT_MODE_P (mode))
     {
-      rtx result = emit_move_via_integer (mode, x, y, true);
+      rtx_insn *result = emit_move_via_integer (mode, x, y, true);
 
       /* If we can't find an integer mode, use multi words.  */
       if (result)
@@ -3544,7 +3545,7 @@ emit_move_insn_1 (rtx x, rtx y)
      fits within a HOST_WIDE_INT.  */
   if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
     {
-      rtx ret = emit_move_via_integer (mode, x, y, lra_in_progress);
+      rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);
 
       if (ret)
 	{
@@ -3563,12 +3564,13 @@ emit_move_insn_1 (rtx x, rtx y)
 
    Return the last instruction emitted.  */
 
-rtx
+rtx_insn *
 emit_move_insn (rtx x, rtx y)
 {
   enum machine_mode mode = GET_MODE (x);
   rtx y_cst = NULL_RTX;
-  rtx last_insn, set;
+  rtx_insn *last_insn;
+  rtx set;
 
   gcc_assert (mode != BLKmode
 	      && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
@@ -3626,7 +3628,7 @@ emit_move_insn (rtx x, rtx y)
    perform the extension directly from constant or memory, then emit the
    move as an extension.  */
 
-static rtx
+static rtx_insn *
 compress_float_constant (rtx x, rtx y)
 {
   enum machine_mode dstmode = GET_MODE (x);
@@ -3648,7 +3650,8 @@ compress_float_constant (rtx x, rtx y)
        srcmode = GET_MODE_WIDER_MODE (srcmode))
     {
       enum insn_code ic;
-      rtx trunc_y, last_insn;
+      rtx trunc_y;
+      rtx_insn *last_insn;
 
       /* Skip if the target can't extend this way.  */
       ic = can_extend_p (dstmode, srcmode, 0);
@@ -3708,7 +3711,7 @@ compress_float_constant (rtx x, rtx y)
       return last_insn;
     }
 
-  return NULL_RTX;
+  return NULL;
 }
 \f
 /* Pushing data onto the stack.  */
diff --git a/gcc/expr.h b/gcc/expr.h
index 1823feb..204dc0a 100644
--- a/gcc/expr.h
+++ b/gcc/expr.h
@@ -416,13 +416,13 @@ extern rtx store_by_pieces (rtx, unsigned HOST_WIDE_INT,
 			    void *, unsigned int, bool, int);
 
 /* Emit insns to set X from Y.  */
-extern rtx emit_move_insn (rtx, rtx);
+extern rtx_insn *emit_move_insn (rtx, rtx);
 
 /* Emit insns to set X from Y, with no frills.  */
-extern rtx emit_move_insn_1 (rtx, rtx);
+extern rtx_insn *emit_move_insn_1 (rtx, rtx);
 
-extern rtx emit_move_complex_push (enum machine_mode, rtx, rtx);
-extern rtx emit_move_complex_parts (rtx, rtx);
+extern rtx_insn *emit_move_complex_push (enum machine_mode, rtx, rtx);
+extern rtx_insn *emit_move_complex_parts (rtx, rtx);
 extern rtx emit_move_resolve_push (enum machine_mode, rtx);
 
 /* Push a block of length SIZE (perhaps variable)
-- 
1.8.5.3

Re: [PATCH 033/236] emit_move et al return rtx_insn *

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* expr.h (emit_move_insn): Strengthen return type from rtx to
> 	rtx_insn *.
> 	(emit_move_insn_1): Likewise.
> 	(emit_move_complex_push): Likewise.
> 	(emit_move_complex_parts): Likewise.
>
> 	* expr.c (emit_move_via_integer): Strengthen return type from rtx
> 	to rtx_insn *.  Replace use of NULL_RTX with NULL when working
> 	with insns.
> 	(emit_move_complex_push): Strengthen return type from rtx to
> 	rtx_insn *.
> 	(emit_move_complex): Likewise, also for local "ret".
> 	(emit_move_ccmode): Likewise.
> 	(emit_move_multi_word): Likewise for return type and locals
> 	"last_insn", "seq".
> 	(emit_move_insn_1): Likewise for return type and locals "result",
> 	"ret".
> 	(emit_move_insn): Likewise for return type and local "last_insn".
> 	(compress_float_constant): Likewise.
OK.
jeff

Re: [PATCH 033/236] emit_move et al return rtx_insn *

[David Malcolm]

On Wed, 2014-08-13 at 11:54 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* expr.h (emit_move_insn): Strengthen return type from rtx to
> > 	rtx_insn *.
> > 	(emit_move_insn_1): Likewise.
> > 	(emit_move_complex_push): Likewise.
> > 	(emit_move_complex_parts): Likewise.
> >
> > 	* expr.c (emit_move_via_integer): Strengthen return type from rtx
> > 	to rtx_insn *.  Replace use of NULL_RTX with NULL when working
> > 	with insns.
> > 	(emit_move_complex_push): Strengthen return type from rtx to
> > 	rtx_insn *.
> > 	(emit_move_complex): Likewise, also for local "ret".
> > 	(emit_move_ccmode): Likewise.
> > 	(emit_move_multi_word): Likewise for return type and locals
> > 	"last_insn", "seq".
> > 	(emit_move_insn_1): Likewise for return type and locals "result",
> > 	"ret".
> > 	(emit_move_insn): Likewise for return type and local "last_insn".
> > 	(compress_float_constant): Likewise.
> OK.

Thanks.  Committed to trunk as r214195 (having bootstrapped&regrtested
on x86_64-unknown-linux-gnu (Fedora 20) albeit in combination with
patches 30-39, and verified that it builds standalone for 3 targets).

[PATCH 184/236] Use rtx_insn in more places in sel-sched.c

[David Malcolm]

gcc/
	* sel-sched.c (find_place_for_bookkeeping): Strengthen local "insn"
	from rtx to rtx_insn *.
	(need_nop_to_preserve_insn_bb): Likewise for param "insn".
	(code_motion_path_driver): Likewise for local "last_insn".
	(simplify_changed_insns): Likewise for local "insn".
---
 gcc/sel-sched.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index bead27a..fdaad36 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -4723,7 +4723,7 @@ find_place_for_bookkeeping (edge e1, edge e2, fence_t *fence_to_rewind)
 	 removed already.  */
       if (DEBUG_INSN_P (place_to_insert))
 	{
-	  rtx insn = sel_bb_head (book_block);
+	  rtx_insn *insn = sel_bb_head (book_block);
 
 	  while (insn != place_to_insert &&
 		 (DEBUG_INSN_P (insn) || NOTE_P (insn)))
@@ -5967,7 +5967,7 @@ handle_emitting_transformations (rtx_insn *insn, expr_t expr,
    leave a NOP there till the return to fill_insns.  */
 
 static bool
-need_nop_to_preserve_insn_bb (rtx insn)
+need_nop_to_preserve_insn_bb (rtx_insn *insn)
 {
   insn_t bb_head, bb_end, bb_next, in_next;
   basic_block bb = BLOCK_FOR_INSN (insn);
@@ -6645,7 +6645,7 @@ code_motion_path_driver (insn_t insn, av_set_t orig_ops, ilist_t path,
   if (!expr)
     {
       int res;
-      rtx last_insn = PREV_INSN (insn);
+      rtx_insn *last_insn = PREV_INSN (insn);
       bool added_to_path;
 
       gcc_assert (insn == sel_bb_end (bb));
@@ -7013,7 +7013,7 @@ simplify_changed_insns (void)
   for (i = 0; i < current_nr_blocks; i++)
     {
       basic_block bb = BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (i));
-      rtx insn;
+      rtx_insn *insn;
 
       FOR_BB_INSNS (bb, insn)
 	if (INSN_P (insn))
-- 
1.8.5.3

[PATCH 101/236] recog.c: Use rtx_insn

[David Malcolm]

gcc/
	* recog.c (split_insn): Strengthen param "insn" and locals
	"first", "last" from rtx to rtx_insn *.
	* recog.c (split_all_insns): Likewise for locals "insn", "next".
	(split_all_insns_noflow): Likewise.
---
 gcc/recog.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/recog.c b/gcc/recog.c
index c470694..9f4291e 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -59,7 +59,7 @@ along with GCC; see the file COPYING3.  If not see
 
 static void validate_replace_rtx_1 (rtx *, rtx, rtx, rtx, bool);
 static void validate_replace_src_1 (rtx *, void *);
-static rtx split_insn (rtx);
+static rtx split_insn (rtx_insn *);
 
 struct target_recog default_target_recog;
 #if SWITCHABLE_TARGET
@@ -2956,11 +2956,11 @@ reg_fits_class_p (const_rtx operand, reg_class_t cl, int offset,
    or NULL if unsuccessful.  */
 
 static rtx
-split_insn (rtx insn)
+split_insn (rtx_insn *insn)
 {
   /* Split insns here to get max fine-grain parallelism.  */
-  rtx first = PREV_INSN (insn);
-  rtx last = try_split (PATTERN (insn), insn, 1);
+  rtx_insn *first = PREV_INSN (insn);
+  rtx_insn *last = try_split (PATTERN (insn), insn, 1);
   rtx insn_set, last_set, note;
 
   if (last == insn)
@@ -3021,7 +3021,7 @@ split_all_insns (void)
 
   FOR_EACH_BB_REVERSE_FN (bb, cfun)
     {
-      rtx insn, next;
+      rtx_insn *insn, *next;
       bool finish = false;
 
       rtl_profile_for_bb (bb);
@@ -3077,7 +3077,7 @@ split_all_insns (void)
 unsigned int
 split_all_insns_noflow (void)
 {
-  rtx next, insn;
+  rtx_insn *next, *insn;
 
   for (insn = get_insns (); insn; insn = next)
     {
-- 
1.8.5.3

[PATCH 119/236] store-motion.c: Use rtx_insn

[David Malcolm]

gcc/
	* store-motion.c (store_killed_in_insn): Strengthen param "insn"
	from const_rtx to const rtx_insn *.
	(store_killed_after): Likewise.  Strengthen locals "last", "act"
	from rtx to rtx_insn *.
	(store_killed_before): Strengthen param "insn" from const_rtx to
	const rtx_insn *.  Strengthen local "first" from rtx to rtx_insn *.
	(find_moveable_store): Strengthen param "insn" from rtx to
	rtx_insn *.
	(compute_store_table): Likewise for local "insn".
	(insert_insn_start_basic_block): Likewise for param "insn" and
	locals "prev", "before", "insn".
	(insert_store): For now, add a checked cast to rtx_insn * on the
	result of gen_move_insn.
	(remove_reachable_equiv_notes): Strengthen local "insn" from rtx
	to rtx_insn *.
	(replace_store_insn): Likewise.  For now, add a checked cast to
	rtx_insn * on the result of gen_move_insn.
---
 gcc/store-motion.c | 37 +++++++++++++++++++++----------------
 1 file changed, 21 insertions(+), 16 deletions(-)

diff --git a/gcc/store-motion.c b/gcc/store-motion.c
index b3e5890..567ab07 100644
--- a/gcc/store-motion.c
+++ b/gcc/store-motion.c
@@ -396,7 +396,7 @@ store_killed_in_pat (const_rtx x, const_rtx pat, int after)
    after the insn.  Return true if it does.  */
 
 static bool
-store_killed_in_insn (const_rtx x, const_rtx x_regs, const_rtx insn, int after)
+store_killed_in_insn (const_rtx x, const_rtx x_regs, const rtx_insn *insn, int after)
 {
   const_rtx reg, note, pat;
 
@@ -458,10 +458,11 @@ store_killed_in_insn (const_rtx x, const_rtx x_regs, const_rtx insn, int after)
    is killed, return the last insn in that it occurs in FAIL_INSN.  */
 
 static bool
-store_killed_after (const_rtx x, const_rtx x_regs, const_rtx insn, const_basic_block bb,
+store_killed_after (const_rtx x, const_rtx x_regs, const rtx_insn *insn,
+		    const_basic_block bb,
 		    int *regs_set_after, rtx *fail_insn)
 {
-  rtx last = BB_END (bb), act;
+  rtx_insn *last = BB_END (bb), *act;
 
   if (!store_ops_ok (x_regs, regs_set_after))
     {
@@ -487,10 +488,10 @@ store_killed_after (const_rtx x, const_rtx x_regs, const_rtx insn, const_basic_b
    within basic block BB. X_REGS is list of registers mentioned in X.
    REGS_SET_BEFORE is bitmap of registers set before or in this insn.  */
 static bool
-store_killed_before (const_rtx x, const_rtx x_regs, const_rtx insn, const_basic_block bb,
-		     int *regs_set_before)
+store_killed_before (const_rtx x, const_rtx x_regs, const rtx_insn *insn,
+		     const_basic_block bb, int *regs_set_before)
 {
-  rtx first = BB_HEAD (bb);
+  rtx_insn *first = BB_HEAD (bb);
 
   if (!store_ops_ok (x_regs, regs_set_before))
     return true;
@@ -536,7 +537,7 @@ store_killed_before (const_rtx x, const_rtx x_regs, const_rtx insn, const_basic_
    */
 
 static void
-find_moveable_store (rtx insn, int *regs_set_before, int *regs_set_after)
+find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
 {
   struct st_expr * ptr;
   rtx dest, set, tmp;
@@ -644,7 +645,8 @@ compute_store_table (void)
 #ifdef ENABLE_CHECKING
   unsigned regno;
 #endif
-  rtx insn, tmp;
+  rtx_insn *insn;
+  rtx tmp;
   df_ref *def_rec;
   int *last_set_in, *already_set;
   struct st_expr * ptr, **prev_next_ptr_ptr;
@@ -739,11 +741,11 @@ compute_store_table (void)
    the BB_HEAD if needed.  */
 
 static void
-insert_insn_start_basic_block (rtx insn, basic_block bb)
+insert_insn_start_basic_block (rtx_insn *insn, basic_block bb)
 {
   /* Insert at start of successor block.  */
-  rtx prev = PREV_INSN (BB_HEAD (bb));
-  rtx before = BB_HEAD (bb);
+  rtx_insn *prev = PREV_INSN (BB_HEAD (bb));
+  rtx_insn *before = BB_HEAD (bb);
   while (before != 0)
     {
       if (! LABEL_P (before)
@@ -773,7 +775,8 @@ insert_insn_start_basic_block (rtx insn, basic_block bb)
 static int
 insert_store (struct st_expr * expr, edge e)
 {
-  rtx reg, insn;
+  rtx reg;
+  rtx_insn *insn;
   basic_block bb;
   edge tmp;
   edge_iterator ei;
@@ -787,7 +790,7 @@ insert_store (struct st_expr * expr, edge e)
     return 0;
 
   reg = expr->reaching_reg;
-  insn = gen_move_insn (copy_rtx (expr->pattern), reg);
+  insn = as_a <rtx_insn *> (gen_move_insn (copy_rtx (expr->pattern), reg));
 
   /* If we are inserting this expression on ALL predecessor edges of a BB,
      insert it at the start of the BB, and reset the insert bits on the other
@@ -845,7 +848,8 @@ remove_reachable_equiv_notes (basic_block bb, struct st_expr *smexpr)
   int sp;
   edge act;
   sbitmap visited = sbitmap_alloc (last_basic_block_for_fn (cfun));
-  rtx last, insn, note;
+  rtx last, note;
+  rtx_insn *insn;
   rtx mem = smexpr->pattern;
 
   stack = XNEWVEC (edge_iterator, n_basic_blocks_for_fn (cfun));
@@ -922,10 +926,11 @@ remove_reachable_equiv_notes (basic_block bb, struct st_expr *smexpr)
 static void
 replace_store_insn (rtx reg, rtx del, basic_block bb, struct st_expr *smexpr)
 {
-  rtx insn, mem, note, set, ptr;
+  rtx_insn *insn;
+  rtx mem, note, set, ptr;
 
   mem = smexpr->pattern;
-  insn = gen_move_insn (reg, SET_SRC (single_set (del)));
+  insn = as_a <rtx_insn *> (gen_move_insn (reg, SET_SRC (single_set (del))));
 
   for (ptr = smexpr->antic_stores; ptr; ptr = XEXP (ptr, 1))
     if (XEXP (ptr, 0) == del)
-- 
1.8.5.3

[PATCH 095/236] modulo-sched.c: Use rtx_insn in various places

[David Malcolm]

gcc/
	* modulo-sched.c (struct ps_reg_move_info): Strengthen field
	"insn" from rtx to rtx_insn *.
	(ps_rtl_insn): Likewise for return type.
	(doloop_register_get): Likewise for params "head", "tail" and
	locals "insn", "first_insn_not_to_check".
	(schedule_reg_move): Likewise for local "this_insn".
	(schedule_reg_moves): Add a checked cast to rtx_insn * to result
	of gen_move_insn for now.
	(reset_sched_times): Strengthen local "insn" from rtx to
	rtx_insn *.
	(permute_partial_schedule): Likewise.
	(duplicate_insns_of_cycles): Likewise for local "u_insn".
	(dump_insn_location): Likewise for param "insn".
	(loop_canon_p): Likewise for local "insn".
	(sms_schedule): Likewise.
	(print_partial_schedule): Likewise.
	(ps_has_conflicts): Likewise.
---
 gcc/modulo-sched.c | 36 +++++++++++++++++++-----------------
 1 file changed, 19 insertions(+), 17 deletions(-)

diff --git a/gcc/modulo-sched.c b/gcc/modulo-sched.c
index 328026a..911ef6b 100644
--- a/gcc/modulo-sched.c
+++ b/gcc/modulo-sched.c
@@ -155,7 +155,7 @@ struct ps_reg_move_info
   /* An instruction that sets NEW_REG to the correct value.  The first
      move associated with DEF will have an rhs of OLD_REG; later moves
      use the result of the previous move.  */
-  rtx insn;
+  rtx_insn *insn;
 };
 
 typedef struct ps_reg_move_info ps_reg_move_info;
@@ -305,7 +305,7 @@ ps_reg_move (partial_schedule_ptr ps, int id)
 
 /* Return the rtl instruction that is being scheduled by partial schedule
    instruction ID, which belongs to schedule PS.  */
-static rtx
+static rtx_insn *
 ps_rtl_insn (partial_schedule_ptr ps, int id)
 {
   if (id < ps->g->num_nodes)
@@ -342,10 +342,11 @@ ps_num_consecutive_stages (partial_schedule_ptr ps, int id)
    more than one occurrence in the loop besides the control part or the
    do-loop pattern is not of the form we expect.  */
 static rtx
-doloop_register_get (rtx head ATTRIBUTE_UNUSED, rtx tail ATTRIBUTE_UNUSED)
+doloop_register_get (rtx_insn *head ATTRIBUTE_UNUSED, rtx_insn *tail ATTRIBUTE_UNUSED)
 {
 #ifdef HAVE_doloop_end
-  rtx reg, condition, insn, first_insn_not_to_check;
+  rtx reg, condition;
+  rtx_insn *insn, *first_insn_not_to_check;
 
   if (!JUMP_P (tail))
     return NULL_RTX;
@@ -552,7 +553,7 @@ schedule_reg_move (partial_schedule_ptr ps, int i_reg_move,
   int start, end, c, ii;
   sbitmap_iterator sbi;
   ps_reg_move_info *move;
-  rtx this_insn;
+  rtx_insn *this_insn;
   ps_insn_ptr psi;
 
   move = ps_reg_move (ps, i_reg_move);
@@ -758,7 +759,8 @@ schedule_reg_moves (partial_schedule_ptr ps)
 	  move->old_reg = old_reg;
 	  move->new_reg = gen_reg_rtx (GET_MODE (prev_reg));
 	  move->num_consecutive_stages = distances[0] && distances[1] ? 2 : 1;
-	  move->insn = gen_move_insn (move->new_reg, copy_rtx (prev_reg));
+	  move->insn = as_a <rtx_insn *> (gen_move_insn (move->new_reg,
+							 copy_rtx (prev_reg)));
 	  bitmap_clear (move->uses);
 
 	  prev_reg = move->new_reg;
@@ -852,7 +854,7 @@ reset_sched_times (partial_schedule_ptr ps, int amount)
         if (dump_file)
           {
             /* Print the scheduling times after the rotation.  */
-	    rtx insn = ps_rtl_insn (ps, u);
+	    rtx_insn *insn = ps_rtl_insn (ps, u);
 
             fprintf (dump_file, "crr_insn->node=%d (insn id %d), "
                      "crr_insn->cycle=%d, min_cycle=%d", u,
@@ -883,7 +885,7 @@ permute_partial_schedule (partial_schedule_ptr ps, rtx last)
   for (row = 0; row < ii ; row++)
     for (ps_ij = ps->rows[row]; ps_ij; ps_ij = ps_ij->next_in_row)
       {
-	rtx insn = ps_rtl_insn (ps, ps_ij->id);
+	rtx_insn *insn = ps_rtl_insn (ps, ps_ij->id);
 
 	if (PREV_INSN (last) != insn)
 	  {
@@ -1105,7 +1107,7 @@ duplicate_insns_of_cycles (partial_schedule_ptr ps, int from_stage,
       {
 	int u = ps_ij->id;
 	int first_u, last_u;
-	rtx u_insn;
+	rtx_insn *u_insn;
 
         /* Do not duplicate any insn which refers to count_reg as it
            belongs to the control part.
@@ -1242,7 +1244,7 @@ loop_single_full_bb_p (struct loop *loop)
 /* Dump file:line from INSN's location info to dump_file.  */
 
 static void
-dump_insn_location (rtx insn)
+dump_insn_location (rtx_insn *insn)
 {
   if (dump_file && INSN_LOCATION (insn))
     {
@@ -1275,7 +1277,7 @@ loop_canon_p (struct loop *loop)
     {
       if (dump_file)
 	{
-	  rtx insn = BB_END (loop->header);
+	  rtx_insn *insn = BB_END (loop->header);
 
 	  fprintf (dump_file, "SMS loop many exits");
 	  dump_insn_location (insn);
@@ -1288,7 +1290,7 @@ loop_canon_p (struct loop *loop)
     {
       if (dump_file)
 	{
-	  rtx insn = BB_END (loop->header);
+	  rtx_insn *insn = BB_END (loop->header);
 
 	  fprintf (dump_file, "SMS loop many BBs.");
 	  dump_insn_location (insn);
@@ -1350,7 +1352,7 @@ setup_sched_infos (void)
 static void
 sms_schedule (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   ddg_ptr *g_arr, g;
   int * node_order;
   int maxii, max_asap;
@@ -1413,7 +1415,7 @@ sms_schedule (void)
 
       if (dump_file)
 	{
-	  rtx insn = BB_END (loop->header);
+	  rtx_insn *insn = BB_END (loop->header);
 
 	  fprintf (dump_file, "SMS loop num: %d", loop->num);
 	  dump_insn_location (insn);
@@ -1548,7 +1550,7 @@ sms_schedule (void)
 
       if (dump_file)
 	{
-	  rtx insn = BB_END (loop->header);
+	  rtx_insn *insn = BB_END (loop->header);
 
 	  fprintf (dump_file, "SMS loop num: %d", loop->num);
 	  dump_insn_location (insn);
@@ -2931,7 +2933,7 @@ print_partial_schedule (partial_schedule_ptr ps, FILE *dump)
       fprintf (dump, "\n[ROW %d ]: ", i);
       while (ps_i)
 	{
-	  rtx insn = ps_rtl_insn (ps, ps_i->id);
+	  rtx_insn *insn = ps_rtl_insn (ps, ps_i->id);
 
 	  if (JUMP_P (insn))
 	    fprintf (dump, "%d (branch), ", INSN_UID (insn));
@@ -3193,7 +3195,7 @@ ps_has_conflicts (partial_schedule_ptr ps, int from, int to)
 	   crr_insn;
 	   crr_insn = crr_insn->next_in_row)
 	{
-	  rtx insn = ps_rtl_insn (ps, crr_insn->id);
+	  rtx_insn *insn = ps_rtl_insn (ps, crr_insn->id);
 
 	  if (!NONDEBUG_INSN_P (insn))
 	    continue;
-- 
1.8.5.3

[PATCH 188/236] Use rtx_insn in more places in haifa-sched.c

[David Malcolm]

gcc/
	* haifa-sched.c (struct model_insn_info): Strengthen field "insn"
	from rtx to rtx_insn *.
	(model_add_to_schedule): Likewise for locals "start", "end",
	"iter".
---
 gcc/haifa-sched.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 1f7e7cf..72ed6a1 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -1822,7 +1822,7 @@ struct model_pressure_data {
    than the main schedule.  */
 struct model_insn_info {
   /* The instruction itself.  */
-  rtx insn;
+  rtx_insn *insn;
 
   /* If this instruction is in model_worklist, these fields link to the
      previous (higher-priority) and next (lower-priority) instructions
@@ -3299,7 +3299,7 @@ model_add_to_schedule (rtx insn)
 static void
 model_analyze_insns (void)
 {
-  rtx start, end, iter;
+  rtx_insn *start, *end, *iter;
   sd_iterator_def sd_it;
   dep_t dep;
   struct model_insn_info *insn, *con;
-- 
1.8.5.3

[PATCH 147/236] config/s390: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* config/s390/s390-protos.h (s390_match_ccmode): Strengthen param
	1 from rtx to rtx_insn *.
	(s390_emit_jump): Likewise for return type.
	(s390_emit_call): Likewise.
	(s390_load_got): Likewise.

	* config/s390/s390.c (last_scheduled_insn): Likewise for this
	variable.
	(s390_match_ccmode): Likewise for param "insn".
	(s390_emit_jump): Likewise for return type.
	(s390_split_branches): Likewise for local "label".
	(struct constant): Strengthen field "label" from rtx to
	rtx_code_label *.
	(struct constant_pool): Likewise for field "label".  Strengthen
	fields "first_insn", "pool_insn", "emit_pool_after" from rtx to
	rtx_insn *.
	(s390_alloc_pool): Replace NULL_RTX with NULL when dealing with
	insns.
	(s390_start_pool): Strengthen param "insn" from rtx to rtx_insn *.
	(s390_end_pool): Likewise.
	(s390_dump_pool): Likewise for local "insn".
	(s390_mainpool_start): Likewise.
	(s390_chunkify_start): Likewise.
	(s390_chunkify_start): Replace NULL_RTX with NULL when dealing
	with insns.  Strengthen locals "label", "jump", "barrier", "next",
	"prev", "vec_insn", "insn" from rtx to rtx_insn *.
	(s390_chunkify_finish): Strengthen local "insn" from rtx to
	rtx_insn *.
	(s390_chunkify_cancel): Likewise for locals "insn", "barrier",
	"jump", "label", "next_insn".
	(s390_regs_ever_clobbered): Likewise for local "cur_insn".
	(s390_optimize_nonescaping_tx): Likewise for locals "insn",
	"tbegin_insn".
	(s390_load_got): Likewise for return type and local "insns".
	(s390_save_gprs_to_fprs): Likewise for local "insn".
	(s390_restore_gprs_from_fprs): Likewise.
	(pass_s390_early_mach::execute): Likewise.
	(s390_emit_prologue): Likewise for local "insns".
	(s390_expand_tbegin): Strengthen local "leave_label" from rtx to
	rtx_code_label *.
	(s390_emit_call): Strengthen return type and local "insn" from
	rtx to rtx_insn *.
	(s390_emit_tpf_eh_return): Likewise for local "insn".
	(s390_optimize_prologue): Likewise for locals "insn", "new_insn",
	"next_insn", introducing locals "s_pat", "rpat" to allow this.
	(s390_fix_long_loop_prediction): Likewise for param "insn" and
	local "cur_insn".
	(s390_non_addr_reg_read_p): Likewise for param "insn".
	(find_cond_jump): Likewise for return type and param "insn".
	(s390_swap_cmp): Likewise for param "insn".
	(s390_z10_optimize_cmp): Likewise for param "insn" and locals
	"prev_insn", "next_insn".
	(s390_reorg): Likewise for locals "insn", "target".
	(s390_z10_prevent_earlyload_conflicts): Likewise for local "insn".
	(s390_sched_variable_issue): For now, rename param "insn" to
	"uncast_insn", introducing a checked cast.
	(s390_sched_init): Replace NULL_RTX with NULL when dealing with
	insn.
	(s390_loop_unroll_adjust): Strengthen local "insn" from rtx to
	rtx_insn *.  Use for_each_rtx_in_insn rather than for_each_rtx.
---
 gcc/config/s390/s390-protos.h |   8 +--
 gcc/config/s390/s390.c        | 132 ++++++++++++++++++++++--------------------
 2 files changed, 72 insertions(+), 68 deletions(-)

diff --git a/gcc/config/s390/s390-protos.h b/gcc/config/s390/s390-protos.h
index 9bd08fa..dca26d8 100644
--- a/gcc/config/s390/s390-protos.h
+++ b/gcc/config/s390/s390-protos.h
@@ -56,11 +56,11 @@ extern bool s390_overlap_p (rtx, rtx, HOST_WIDE_INT);
 extern bool s390_offset_p (rtx, rtx, rtx);
 extern int tls_symbolic_operand (rtx);
 
-extern bool s390_match_ccmode (rtx, enum machine_mode);
+extern bool s390_match_ccmode (rtx_insn *, enum machine_mode);
 extern enum machine_mode s390_tm_ccmode (rtx, rtx, bool);
 extern enum machine_mode s390_select_ccmode (enum rtx_code, rtx, rtx);
 extern rtx s390_emit_compare (enum rtx_code, rtx, rtx);
-extern rtx s390_emit_jump (rtx, rtx);
+extern rtx_insn *s390_emit_jump (rtx, rtx);
 extern bool symbolic_reference_mentioned_p (rtx);
 extern bool tls_symbolic_reference_mentioned_p (rtx);
 extern bool legitimate_la_operand_p (rtx);
@@ -92,7 +92,7 @@ extern void s390_expand_atomic (enum machine_mode, enum rtx_code,
 extern void s390_expand_tbegin (rtx, rtx, rtx, bool);
 extern rtx s390_return_addr_rtx (int, rtx);
 extern rtx s390_back_chain_rtx (void);
-extern rtx s390_emit_call (rtx, rtx, rtx, rtx);
+extern rtx_insn *s390_emit_call (rtx, rtx, rtx, rtx);
 extern void s390_expand_logical_operator (enum rtx_code,
 					  enum machine_mode, rtx *);
 extern bool s390_logical_operator_ok_p (rtx *);
@@ -104,7 +104,7 @@ extern void print_operand (FILE *, rtx, int);
 extern void s390_output_pool_entry (rtx, enum machine_mode, unsigned int);
 extern int s390_label_align (rtx);
 extern int s390_agen_dep_p (rtx, rtx);
-extern rtx s390_load_got (void);
+extern rtx_insn *s390_load_got (void);
 extern rtx s390_get_thread_pointer (void);
 extern void s390_emit_tpf_eh_return (rtx);
 extern bool s390_legitimate_address_without_index_p (rtx);
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 09ab631..439bdc5 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -305,7 +305,7 @@ struct processor_costs zEC12_cost =
 extern int reload_completed;
 
 /* Kept up to date using the SCHED_VARIABLE_ISSUE hook.  */
-static rtx last_scheduled_insn;
+static rtx_insn *last_scheduled_insn;
 
 /* Structure used to hold the components of a S/390 memory
    address.  A legitimate address on S/390 is of the general
@@ -652,7 +652,7 @@ s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
    If REQ_MODE is VOIDmode, always return false.  */
 
 bool
-s390_match_ccmode (rtx insn, enum machine_mode req_mode)
+s390_match_ccmode (rtx_insn *insn, enum machine_mode req_mode)
 {
   int i;
 
@@ -1047,7 +1047,7 @@ s390_emit_compare_and_swap (enum rtx_code code, rtx old, rtx mem,
    NULL_RTX, emit an unconditional jump, else a conditional jump under
    condition COND.  */
 
-rtx
+rtx_insn *
 s390_emit_jump (rtx target, rtx cond)
 {
   rtx insn;
@@ -6029,7 +6029,8 @@ s390_split_branches (void)
 {
   rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
   int new_literal = 0, ret;
-  rtx insn, pat, tmp, target;
+  rtx_insn *insn;
+  rtx pat, tmp, target;
   rtx *label;
 
   /* We need correct insn addresses.  */
@@ -6291,20 +6292,20 @@ struct constant
 {
   struct constant *next;
   rtx value;
-  rtx label;
+  rtx_code_label *label;
 };
 
 struct constant_pool
 {
   struct constant_pool *next;
-  rtx first_insn;
-  rtx pool_insn;
+  rtx_insn *first_insn;
+  rtx_insn *pool_insn;
   bitmap insns;
-  rtx emit_pool_after;
+  rtx_insn *emit_pool_after;
 
   struct constant *constants[NR_C_MODES];
   struct constant *execute;
-  rtx label;
+  rtx_code_label *label;
   int size;
 };
 
@@ -6323,11 +6324,11 @@ s390_alloc_pool (void)
 
   pool->execute = NULL;
   pool->label = gen_label_rtx ();
-  pool->first_insn = NULL_RTX;
-  pool->pool_insn = NULL_RTX;
+  pool->first_insn = NULL;
+  pool->pool_insn = NULL;
   pool->insns = BITMAP_ALLOC (NULL);
   pool->size = 0;
-  pool->emit_pool_after = NULL_RTX;
+  pool->emit_pool_after = NULL;
 
   return pool;
 }
@@ -6336,7 +6337,7 @@ s390_alloc_pool (void)
    and chain it to the end of POOL_LIST.  */
 
 static struct constant_pool *
-s390_start_pool (struct constant_pool **pool_list, rtx insn)
+s390_start_pool (struct constant_pool **pool_list, rtx_insn *insn)
 {
   struct constant_pool *pool, **prev;
 
@@ -6354,7 +6355,7 @@ s390_start_pool (struct constant_pool **pool_list, rtx insn)
    placeholder insn representing the pool.  */
 
 static void
-s390_end_pool (struct constant_pool *pool, rtx insn)
+s390_end_pool (struct constant_pool *pool, rtx_insn *insn)
 {
   rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
 
@@ -6552,7 +6553,7 @@ static void
 s390_dump_pool (struct constant_pool *pool, bool remote_label)
 {
   struct constant *c;
-  rtx insn = pool->pool_insn;
+  rtx_insn *insn = pool->pool_insn;
   int i;
 
   /* Switch to rodata section.  */
@@ -6659,7 +6660,7 @@ static struct constant_pool *
 s390_mainpool_start (void)
 {
   struct constant_pool *pool;
-  rtx insn;
+  rtx_insn *insn;
 
   pool = s390_alloc_pool ();
 
@@ -6875,7 +6876,7 @@ s390_chunkify_start (void)
   int extra_size = 0;
   bitmap far_labels;
   rtx pending_ltrel = NULL_RTX;
-  rtx insn;
+  rtx_insn *insn;
 
   rtx (*gen_reload_base) (rtx, rtx) =
     TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
@@ -6968,7 +6969,7 @@ s390_chunkify_start (void)
 	  if (curr_pool->size < S390_POOL_CHUNK_MAX)
 	    continue;
 
-	  s390_end_pool (curr_pool, NULL_RTX);
+	  s390_end_pool (curr_pool, NULL);
 	  curr_pool = NULL;
 	}
       else
@@ -7002,7 +7003,7 @@ s390_chunkify_start (void)
 	           || curr_pool->size > S390_POOL_CHUNK_MAX
 		   || section_switch_p)
 	    {
-	      rtx label, jump, barrier, next, prev;
+	      rtx_insn *label, *jump, *barrier, *next, *prev;
 
 	      if (!section_switch_p)
 		{
@@ -7062,7 +7063,7 @@ s390_chunkify_start (void)
     }
 
   if (curr_pool)
-    s390_end_pool (curr_pool, NULL_RTX);
+    s390_end_pool (curr_pool, NULL);
   gcc_assert (!pending_ltrel);
 
   /* Find all labels that are branched into
@@ -7084,7 +7085,7 @@ s390_chunkify_start (void)
       if (LABEL_P (insn)
 	  && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
 	{
-	  rtx vec_insn = NEXT_INSN (insn);
+	  rtx_insn *vec_insn = NEXT_INSN (insn);
 	  if (! vec_insn || ! JUMP_TABLE_DATA_P (vec_insn))
 	    bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
 	}
@@ -7131,7 +7132,7 @@ s390_chunkify_start (void)
     {
       rtx new_insn = gen_reload_base (cfun->machine->base_reg,
 				      curr_pool->label);
-      rtx insn = curr_pool->first_insn;
+      rtx_insn *insn = curr_pool->first_insn;
       INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
     }
 
@@ -7170,7 +7171,7 @@ static void
 s390_chunkify_finish (struct constant_pool *pool_list)
 {
   struct constant_pool *curr_pool = NULL;
-  rtx insn;
+  rtx_insn *insn;
 
 
   /* Replace all literal pool references.  */
@@ -7226,16 +7227,16 @@ static void
 s390_chunkify_cancel (struct constant_pool *pool_list)
 {
   struct constant_pool *curr_pool = NULL;
-  rtx insn;
+  rtx_insn *insn;
 
   /* Remove all pool placeholder insns.  */
 
   for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
     {
       /* Did we insert an extra barrier?  Remove it.  */
-      rtx barrier = PREV_INSN (curr_pool->pool_insn);
-      rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
-      rtx label = NEXT_INSN (curr_pool->pool_insn);
+      rtx_insn *barrier = PREV_INSN (curr_pool->pool_insn);
+      rtx_insn *jump = barrier? PREV_INSN (barrier) : NULL;
+      rtx_insn *label = NEXT_INSN (curr_pool->pool_insn);
 
       if (jump && JUMP_P (jump)
 	  && barrier && BARRIER_P (barrier)
@@ -7257,7 +7258,7 @@ s390_chunkify_cancel (struct constant_pool *pool_list)
 
   for (insn = get_insns (); insn; )
     {
-      rtx next_insn = NEXT_INSN (insn);
+      rtx_insn *next_insn = NEXT_INSN (insn);
 
       if (NONJUMP_INSN_P (insn)
 	  && GET_CODE (PATTERN (insn)) == SET
@@ -7418,7 +7419,7 @@ static void
 s390_regs_ever_clobbered (char regs_ever_clobbered[])
 {
   basic_block cur_bb;
-  rtx cur_insn;
+  rtx_insn *cur_insn;
   unsigned int i;
 
   memset (regs_ever_clobbered, 0, 32);
@@ -7967,10 +7968,10 @@ s390_optimize_nonescaping_tx (void)
   basic_block tbegin_bb = NULL;
   basic_block tend_bb = NULL;
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
   bool result = true;
   int bb_index;
-  rtx tbegin_insn = NULL_RTX;
+  rtx_insn *tbegin_insn = NULL;
 
   if (!cfun->machine->tbegin_p)
     return;
@@ -8517,10 +8518,10 @@ restore_gprs (rtx base, int offset, int first, int last)
 /* Return insn sequence to load the GOT register.  */
 
 static GTY(()) rtx got_symbol;
-rtx
+rtx_insn *
 s390_load_got (void)
 {
-  rtx insns;
+  rtx_insn *insns;
 
   /* We cannot use pic_offset_table_rtx here since we use this
      function also for non-pic if __tls_get_offset is called and in
@@ -8589,7 +8590,7 @@ s390_save_gprs_to_fprs (void)
     {
       if (FP_REGNO_P (cfun_gpr_save_slot (i)))
 	{
-	  rtx insn =
+	  rtx_insn *insn =
 	    emit_move_insn (gen_rtx_REG (DImode, cfun_gpr_save_slot (i)),
 			    gen_rtx_REG (DImode, i));
 	  RTX_FRAME_RELATED_P (insn) = 1;
@@ -8611,7 +8612,7 @@ s390_restore_gprs_from_fprs (void)
     {
       if (FP_REGNO_P (cfun_gpr_save_slot (i)))
 	{
-	  rtx insn =
+	  rtx_insn *insn =
 	    emit_move_insn (gen_rtx_REG (DImode, i),
 			    gen_rtx_REG (DImode, cfun_gpr_save_slot (i)));
 	  df_set_regs_ever_live (i, true);
@@ -8660,7 +8661,7 @@ public:
 unsigned int
 pass_s390_early_mach::execute (function *fun)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   /* Try to get rid of the FPR clobbers.  */
   s390_optimize_nonescaping_tx ();
@@ -8953,7 +8954,7 @@ s390_emit_prologue (void)
 
   if (flag_pic && df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM))
     {
-      rtx insns = s390_load_got ();
+      rtx_insn *insns = s390_load_got ();
 
       for (insn = insns; insn; insn = NEXT_INSN (insn))
 	annotate_constant_pool_refs (&PATTERN (insn));
@@ -9932,7 +9933,7 @@ s390_expand_tbegin (rtx dest, rtx tdb, rtx retry, bool clobber_fprs_p)
       const int CC3 = 1 << 0;
       rtx jump;
       rtx count = gen_reg_rtx (SImode);
-      rtx leave_label = gen_label_rtx ();
+      rtx_code_label *leave_label = gen_label_rtx ();
 
       /* Exit for success and permanent failures.  */
       jump = s390_emit_jump (leave_label,
@@ -10715,12 +10716,12 @@ s390_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
                If this parameter is NULL_RTX the call is considered
                to be a sibling call.  */
 
-rtx
+rtx_insn *
 s390_emit_call (rtx addr_location, rtx tls_call, rtx result_reg,
 		rtx retaddr_reg)
 {
   bool plt_call = false;
-  rtx insn;
+  rtx_insn *insn;
   rtx call;
   rtx clobber;
   rtvec vec;
@@ -10850,7 +10851,8 @@ static GTY(()) rtx s390_tpf_eh_return_symbol;
 void
 s390_emit_tpf_eh_return (rtx target)
 {
-  rtx insn, reg;
+  rtx_insn *insn;
+  rtx reg;
 
   if (!s390_tpf_eh_return_symbol)
     s390_tpf_eh_return_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tpf_eh_return");
@@ -10871,7 +10873,7 @@ s390_emit_tpf_eh_return (rtx target)
 static void
 s390_optimize_prologue (void)
 {
-  rtx insn, new_insn, next_insn;
+  rtx_insn *insn, *new_insn, *next_insn;
 
   /* Do a final recompute of the frame-related data.  */
   s390_optimize_register_info ();
@@ -10961,12 +10963,12 @@ s390_optimize_prologue (void)
 
 	  if (cfun_frame_layout.first_save_gpr != -1)
 	    {
-	      new_insn 	= save_gprs (base,
+	      rtx s_pat = save_gprs (base,
 				     off + (cfun_frame_layout.first_save_gpr
 					    - first) * UNITS_PER_LONG,
 				     cfun_frame_layout.first_save_gpr,
 				     cfun_frame_layout.last_save_gpr);
-	      new_insn = emit_insn_before (new_insn, insn);
+	      new_insn = emit_insn_before (s_pat, insn);
 	      INSN_ADDRESSES_NEW (new_insn, -1);
 	    }
 
@@ -11020,7 +11022,7 @@ s390_optimize_prologue (void)
 
 	  if (cfun_frame_layout.first_restore_gpr != -1)
 	    {
-	      new_insn = restore_gprs (base,
+	      rtx rpat = restore_gprs (base,
 				       off + (cfun_frame_layout.first_restore_gpr
 					      - first) * UNITS_PER_LONG,
 				       cfun_frame_layout.first_restore_gpr,
@@ -11028,15 +11030,15 @@ s390_optimize_prologue (void)
 
 	      /* Remove REG_CFA_RESTOREs for registers that we no
 		 longer need to save.  */
-	      REG_NOTES (new_insn) = REG_NOTES (insn);
-	      for (rtx *ptr = &REG_NOTES (new_insn); *ptr; )
+	      REG_NOTES (rpat) = REG_NOTES (insn);
+	      for (rtx *ptr = &REG_NOTES (rpat); *ptr; )
 		if (REG_NOTE_KIND (*ptr) == REG_CFA_RESTORE
 		    && ((int) REGNO (XEXP (*ptr, 0))
 			< cfun_frame_layout.first_restore_gpr))
 		  *ptr = XEXP (*ptr, 1);
 		else
 		  ptr = &XEXP (*ptr, 1);
-	      new_insn = emit_insn_before (new_insn, insn);
+	      new_insn = emit_insn_before (rpat, insn);
 	      RTX_FRAME_RELATED_P (new_insn) = 1;
 	      INSN_ADDRESSES_NEW (new_insn, -1);
 	    }
@@ -11075,12 +11077,12 @@ s390_optimize_prologue (void)
    branch in a way which makes the static prediction always correct.
    The function returns true if it added an instruction.  */
 static bool
-s390_fix_long_loop_prediction (rtx insn)
+s390_fix_long_loop_prediction (rtx_insn *insn)
 {
   rtx set = single_set (insn);
   rtx code_label, label_ref, new_label;
   rtx uncond_jump;
-  rtx cur_insn;
+  rtx_insn *cur_insn;
   rtx tmp;
   int distance;
 
@@ -11137,7 +11139,7 @@ s390_fix_long_loop_prediction (rtx insn)
 /* Returns 1 if INSN reads the value of REG for purposes not related
    to addressing of memory, and 0 otherwise.  */
 static int
-s390_non_addr_reg_read_p (rtx reg, rtx insn)
+s390_non_addr_reg_read_p (rtx reg, rtx_insn *insn)
 {
   return reg_referenced_p (reg, PATTERN (insn))
     && !reg_used_in_mem_p (REGNO (reg), PATTERN (insn));
@@ -11146,8 +11148,8 @@ s390_non_addr_reg_read_p (rtx reg, rtx insn)
 /* Starting from INSN find_cond_jump looks downwards in the insn
    stream for a single jump insn which is the last user of the
    condition code set in INSN.  */
-static rtx
-find_cond_jump (rtx insn)
+static rtx_insn *
+find_cond_jump (rtx_insn *insn)
 {
   for (; insn; insn = NEXT_INSN (insn))
     {
@@ -11182,14 +11184,14 @@ find_cond_jump (rtx insn)
       break;
     }
 
-  return NULL_RTX;
+  return NULL;
 }
 
 /* Swap the condition in COND and the operands in OP0 and OP1 so that
    the semantics does not change.  If NULL_RTX is passed as COND the
    function tries to find the conditional jump starting with INSN.  */
 static void
-s390_swap_cmp (rtx cond, rtx *op0, rtx *op1, rtx insn)
+s390_swap_cmp (rtx cond, rtx *op0, rtx *op1, rtx_insn *insn)
 {
   rtx tmp = *op0;
 
@@ -11219,9 +11221,9 @@ s390_swap_cmp (rtx cond, rtx *op0, rtx *op1, rtx insn)
    operands of the compare.  The function return true whenever it
    added an insn.  */
 static bool
-s390_z10_optimize_cmp (rtx insn)
+s390_z10_optimize_cmp (rtx_insn *insn)
 {
-  rtx prev_insn, next_insn;
+  rtx_insn *prev_insn, *next_insn;
   bool insn_added_p = false;
   rtx cond, *op0, *op1;
 
@@ -11389,7 +11391,8 @@ s390_reorg (void)
   /* Generate out-of-pool execute target insns.  */
   if (TARGET_CPU_ZARCH)
     {
-      rtx insn, label, target;
+      rtx_insn *insn, *target;
+      rtx label;
 
       for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
 	{
@@ -11415,7 +11418,7 @@ s390_reorg (void)
       || s390_tune == PROCESSOR_2817_Z196
       || s390_tune == PROCESSOR_2827_ZEC12)
     {
-      rtx insn;
+      rtx_insn *insn;
       bool insn_added_p = false;
 
       /* The insn lengths and addresses have to be up to date for the
@@ -11483,7 +11486,7 @@ s390_z10_prevent_earlyload_conflicts (rtx *ready, int *nready_p)
   int nready = *nready_p;
   rtx tmp;
   int i;
-  rtx insn;
+  rtx_insn *insn;
   rtx set;
   enum attr_type flag;
   int distance;
@@ -11707,8 +11710,9 @@ s390_sched_reorder (FILE *file, int verbose,
    last_scheduled_insn in order to make it available for
    s390_sched_reorder.  */
 static int
-s390_sched_variable_issue (FILE *file, int verbose, rtx insn, int more)
+s390_sched_variable_issue (FILE *file, int verbose, rtx uncast_insn, int more)
 {
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   last_scheduled_insn = insn;
 
   if (s390_tune == PROCESSOR_2827_ZEC12
@@ -11770,7 +11774,7 @@ s390_sched_init (FILE *file ATTRIBUTE_UNUSED,
 		 int verbose ATTRIBUTE_UNUSED,
 		 int max_ready ATTRIBUTE_UNUSED)
 {
-  last_scheduled_insn = NULL_RTX;
+  last_scheduled_insn = NULL;
   s390_sched_state = 0;
 }
 
@@ -11798,7 +11802,7 @@ static unsigned
 s390_loop_unroll_adjust (unsigned nunroll, struct loop *loop)
 {
   basic_block *bbs;
-  rtx insn;
+  rtx_insn *insn;
   unsigned i;
   unsigned mem_count = 0;
 
@@ -11813,7 +11817,7 @@ s390_loop_unroll_adjust (unsigned nunroll, struct loop *loop)
     {
       for (insn = BB_HEAD (bbs[i]); insn != BB_END (bbs[i]); insn = NEXT_INSN (insn))
 	if (INSN_P (insn) && INSN_CODE (insn) != -1)
-            for_each_rtx (&insn, (rtx_function) check_dpu, &mem_count);
+            for_each_rtx_in_insn (&insn, (rtx_function) check_dpu, &mem_count);
     }
   free (bbs);
 
-- 
1.8.5.3

[PATCH 139/236] config/mep: Use rtx_insn and rtx_code_label

[David Malcolm]

gcc/
	* config/mep/mep-protos.h (mep_mulr_source): Strengthen first
	param from rtx to rtx_insn *.
	(mep_reuse_lo): Likewise for third param.
	(mep_use_post_modify_p): Likewise for first param.
	(mep_core_address_length): Likewise.
	(mep_cop_address_length): Likewise.
	(mep_final_prescan_insn): Likewise.
	(mep_store_data_bypass_p): Likewise for both params.
	(mep_mul_hilo_bypass_p): Likewise.
	(mep_ipipe_ldc_p): Likewise for param.

	* config/mep/mep.c (mep_mulr_source): Likewise for param "insn".
	(mep_rewrite_mult): Likewise.
	(mep_rewrite_mulsi3): Likewise.
	(mep_rewrite_maddsi3): Likewise.
	(mep_reuse_lo_p_1): Likewise.
	(mep_reuse_lo_p): Likewise.
	(mep_frame_expr): Likewise.
	(mep_make_parallel): Likewise for both params.
	(mep_use_post_modify_p_1): Likewise for param "set_insn" and
	local "insn".
	(mep_use_post_modify_p): Likewise for param "insn".
	(mep_core_address_length): Likewise.
	(mep_cop_address_length): Likewise.
	(mep_reg_set_in_function): Likewise for local "insn".
	(mep_asm_without_operands_p): Likewise.
	(F): Likewise for return type and param "x".
	(add_constant): Likewise for local "insn".
	(maybe_dead_move): Likewise for return type and local "insn".
	(mep_expand_prologue): Likewise for local "insn".
	(mep_final_prescan_insn): Likewise for param "insn".
	(mep_reorg_regmove): Likewise for param "insns" and locals "insn",
	"next", "follow", "x".
	(mep_insert_repeat_label_last): Likewise for return type, param
	"last_insn", and locals "next", "prev".  Strengthen param "label"
	from rtx to rtx_code_label *.
	(struct mep_doloop_begin): Strengthen field "insn" from rtx to
	rtx_insn *.
	(struct mep_doloop_end): Likewise for fields "insn" and
	"fallthrough".
	(mep_reorg_repeat): Likewise for param "insns" and local "insn".
	Strengthen local "repeat_label" from rtx to rtx_code_label *.
	(mep_invertable_branch_p): Strengthen param "insn" from rtx to
	rtx_insn *.
	(mep_invert_branch): Likewise for params "insn" and "after".
	(mep_reorg_erepeat): Likewise for param "insns" and locals
	"insn", "prev", "new_last", "barrier", "user".  Strengthen local
	"l" from rtx to rtx_code_label *.
	(mep_jmp_return_reorg): Strengthen param "insns" and local "insn"
	from rtx to rtx_insn *.
	(mep_reorg_addcombine): Likewise for param "insns" and locals
	"i", "n".
	(add_sp_insn_p): Likewise for param "insn".
	(mep_reorg_noframe): Likewise for param "insns" and locals
	"start_frame_insn", "end_frame_insn", "next".
	(mep_reorg): Likewise for local "insns".
	(mep_store_data_bypass_1): Likewise for param "prev".  Add checked
	cast.
	(mep_store_data_bypass_p): Likewise for params "prev", "insn".
	(mep_mul_hilo_bypass_p): Likewise.
	(mep_ipipe_ldc_p): Likewise for param "insn".
	(mep_make_bundle): Likewise for return type, param "cop" and local
	"insn", splitting out the latter into a new local "seq" for when it
	is a SEQUENCE rather than an insn.
	(core_insn_p): Likewise for param "insn".
	(mep_bundle_insns): Likewise for param "insns" and locals "insn",
	"last", "first", "note", "prev", "core_insn".
---
 gcc/config/mep/mep-protos.h |  18 ++---
 gcc/config/mep/mep.c        | 179 +++++++++++++++++++++++---------------------
 2 files changed, 103 insertions(+), 94 deletions(-)

diff --git a/gcc/config/mep/mep-protos.h b/gcc/config/mep/mep-protos.h
index c4b74e5..e1903c7 100644
--- a/gcc/config/mep/mep-protos.h
+++ b/gcc/config/mep/mep-protos.h
@@ -19,9 +19,9 @@ along with GCC; see the file COPYING3.  If not see
 <http://www.gnu.org/licenses/>.  */
 
 extern int mep_regno_reg_class (int);
-extern rtx mep_mulr_source (rtx, rtx, rtx, rtx);
-extern bool mep_reuse_lo_p (rtx, rtx, rtx, bool);
-extern bool mep_use_post_modify_p (rtx, rtx, rtx);
+extern rtx mep_mulr_source (rtx_insn *, rtx, rtx, rtx);
+extern bool mep_reuse_lo_p (rtx, rtx, rtx_insn *, bool);
+extern bool mep_use_post_modify_p (rtx_insn *, rtx, rtx);
 extern bool mep_allow_clip (rtx, rtx, int);
 extern bool mep_bit_position_p (rtx, bool);
 extern bool mep_split_mov (rtx *, int);
@@ -31,8 +31,8 @@ extern bool mep_multi_slot (rtx);
 extern bool mep_legitimate_address (enum machine_mode, rtx, int);
 extern int mep_legitimize_address (rtx *, rtx, enum machine_mode);
 extern int mep_legitimize_reload_address (rtx *, enum machine_mode, int, /*enum reload_type*/ int, int);
-extern int mep_core_address_length (rtx, int);
-extern int mep_cop_address_length (rtx, int);
+extern int mep_core_address_length (rtx_insn *, int);
+extern int mep_cop_address_length (rtx_insn *, int);
 extern bool mep_expand_mov (rtx *, enum machine_mode);
 extern bool mep_mov_ok (rtx *, enum machine_mode);
 extern void mep_split_wide_move (rtx *, enum machine_mode);
@@ -65,7 +65,7 @@ extern void mep_function_profiler (FILE *);
 extern const char *mep_emit_bb_trace_ret (void);
 extern void mep_print_operand_address (FILE *, rtx);
 extern void mep_print_operand (FILE *, rtx, int);
-extern void mep_final_prescan_insn (rtx, rtx *, int);
+extern void mep_final_prescan_insn (rtx_insn *, rtx *, int);
 extern void mep_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
 extern bool mep_return_in_memory (const_tree, const_tree);
 extern rtx mep_function_value (const_tree, const_tree);
@@ -79,9 +79,9 @@ extern void mep_output_aligned_common (FILE *, tree, const char *,
 				       int, int, int);
 extern void mep_emit_doloop (rtx *, int);
 extern bool mep_vliw_function_p (tree);
-extern bool mep_store_data_bypass_p (rtx, rtx);
-extern bool mep_mul_hilo_bypass_p (rtx, rtx);
-extern bool mep_ipipe_ldc_p (rtx);
+extern bool mep_store_data_bypass_p (rtx_insn *, rtx_insn *);
+extern bool mep_mul_hilo_bypass_p (rtx_insn *, rtx_insn *);
+extern bool mep_ipipe_ldc_p (rtx_insn *);
 extern bool mep_emit_intrinsic (int, const rtx *);
 extern bool mep_expand_unary_intrinsic (int, rtx *);
 extern bool mep_expand_binary_intrinsic (int, int, int, int, rtx *);
diff --git a/gcc/config/mep/mep.c b/gcc/config/mep/mep.c
index 544f267..3a58efb 100644
--- a/gcc/config/mep/mep.c
+++ b/gcc/config/mep/mep.c
@@ -153,10 +153,10 @@ static bool symbolref_p (rtx);
 static void encode_pattern_1 (rtx);
 static void encode_pattern (rtx);
 static bool const_in_range (rtx, int, int);
-static void mep_rewrite_mult (rtx, rtx);
-static void mep_rewrite_mulsi3 (rtx, rtx, rtx, rtx);
-static void mep_rewrite_maddsi3 (rtx, rtx, rtx, rtx, rtx);
-static bool mep_reuse_lo_p_1 (rtx, rtx, rtx, bool);
+static void mep_rewrite_mult (rtx_insn *, rtx);
+static void mep_rewrite_mulsi3 (rtx_insn *, rtx, rtx, rtx);
+static void mep_rewrite_maddsi3 (rtx_insn *, rtx, rtx, rtx, rtx);
+static bool mep_reuse_lo_p_1 (rtx, rtx, rtx_insn *, bool);
 static bool move_needs_splitting (rtx, rtx, enum machine_mode);
 static bool mep_expand_setcc_1 (enum rtx_code, rtx, rtx, rtx);
 static bool mep_nongeneral_reg (rtx);
@@ -171,9 +171,9 @@ static bool mep_reg_set_p (rtx, rtx);
 static bool mep_reg_set_in_function (int);
 static bool mep_interrupt_saved_reg (int);
 static bool mep_call_saves_register (int);
-static rtx F (rtx);
+static rtx_insn *F (rtx_insn *);
 static void add_constant (int, int, int, int);
-static rtx maybe_dead_move (rtx, rtx, bool);
+static rtx_insn *maybe_dead_move (rtx, rtx, bool);
 static void mep_reload_pointer (int, const char *);
 static void mep_start_function (FILE *, HOST_WIDE_INT);
 static bool mep_function_ok_for_sibcall (tree, tree);
@@ -198,14 +198,15 @@ static void mep_unique_section (tree, int);
 static unsigned int mep_section_type_flags (tree, const char *, int);
 static void mep_asm_named_section (const char *, unsigned int, tree);
 static bool mep_mentioned_p (rtx, rtx, int);
-static void mep_reorg_regmove (rtx);
-static rtx mep_insert_repeat_label_last (rtx, rtx, bool, bool);
-static void mep_reorg_repeat (rtx);
-static bool mep_invertable_branch_p (rtx);
-static void mep_invert_branch (rtx, rtx);
-static void mep_reorg_erepeat (rtx);
-static void mep_jmp_return_reorg (rtx);
-static void mep_reorg_addcombine (rtx);
+static void mep_reorg_regmove (rtx_insn *);
+static rtx_insn *mep_insert_repeat_label_last (rtx_insn *, rtx_code_label *,
+					       bool, bool);
+static void mep_reorg_repeat (rtx_insn *);
+static bool mep_invertable_branch_p (rtx_insn *);
+static void mep_invert_branch (rtx_insn *, rtx_insn *);
+static void mep_reorg_erepeat (rtx_insn *);
+static void mep_jmp_return_reorg (rtx_insn *);
+static void mep_reorg_addcombine (rtx_insn *);
 static void mep_reorg (void);
 static void mep_init_intrinsics (void);
 static void mep_init_builtins (void);
@@ -222,8 +223,8 @@ static int mep_issue_rate (void);
 static rtx mep_find_ready_insn (rtx *, int, enum attr_slot, int);
 static void mep_move_ready_insn (rtx *, int, rtx);
 static int mep_sched_reorder (FILE *, int, rtx *, int *, int);
-static rtx mep_make_bundle (rtx, rtx);
-static void mep_bundle_insns (rtx);
+static rtx_insn *mep_make_bundle (rtx, rtx_insn *);
+static void mep_bundle_insns (rtx_insn *);
 static bool mep_rtx_cost (rtx, int, int, int, int *, bool);
 static int mep_address_cost (rtx, enum machine_mode, addr_space_t, bool);
 static void mep_setup_incoming_varargs (cumulative_args_t, enum machine_mode,
@@ -623,7 +624,7 @@ const_in_range (rtx x, int minv, int maxv)
    at the end of the insn stream.  */
 
 rtx
-mep_mulr_source (rtx insn, rtx dest, rtx src1, rtx src2)
+mep_mulr_source (rtx_insn *insn, rtx dest, rtx src1, rtx src2)
 {
   if (rtx_equal_p (dest, src1))
     return src2;
@@ -644,7 +645,7 @@ mep_mulr_source (rtx insn, rtx dest, rtx src1, rtx src2)
    to (clobber (reg:SI HI_REGNO)).  */
 
 static void
-mep_rewrite_mult (rtx insn, rtx pattern)
+mep_rewrite_mult (rtx_insn *insn, rtx pattern)
 {
   rtx hi_clobber;
 
@@ -659,7 +660,7 @@ mep_rewrite_mult (rtx insn, rtx pattern)
    store the result in DEST if nonnull.  */
 
 static void
-mep_rewrite_mulsi3 (rtx insn, rtx dest, rtx src1, rtx src2)
+mep_rewrite_mulsi3 (rtx_insn *insn, rtx dest, rtx src1, rtx src2)
 {
   rtx lo, pattern;
 
@@ -677,7 +678,7 @@ mep_rewrite_mulsi3 (rtx insn, rtx dest, rtx src1, rtx src2)
    be deleted by a peephole2 if SRC3 is already in $lo.  */
 
 static void
-mep_rewrite_maddsi3 (rtx insn, rtx dest, rtx src1, rtx src2, rtx src3)
+mep_rewrite_maddsi3 (rtx_insn *insn, rtx dest, rtx src1, rtx src2, rtx src3)
 {
   rtx lo, pattern;
 
@@ -719,7 +720,7 @@ mep_rewrite_maddsi3 (rtx insn, rtx dest, rtx src1, rtx src2, rtx src3)
    if GPR is no longer used.  */
 
 static bool
-mep_reuse_lo_p_1 (rtx lo, rtx gpr, rtx insn, bool gpr_dead_p)
+mep_reuse_lo_p_1 (rtx lo, rtx gpr, rtx_insn *insn, bool gpr_dead_p)
 {
   do
     {
@@ -775,7 +776,7 @@ mep_reuse_lo_p_1 (rtx lo, rtx gpr, rtx insn, bool gpr_dead_p)
 /* A wrapper around mep_reuse_lo_p_1 that preserves recog_data.  */
 
 bool
-mep_reuse_lo_p (rtx lo, rtx gpr, rtx insn, bool gpr_dead_p)
+mep_reuse_lo_p (rtx lo, rtx gpr, rtx_insn *insn, bool gpr_dead_p)
 {
   bool result = mep_reuse_lo_p_1 (lo, gpr, insn, gpr_dead_p);
   extract_insn (insn);
@@ -856,7 +857,7 @@ mep_use_post_modify_for_set_p (rtx set, rtx gpr, rtx offset)
 /* Return the effect of frame-related instruction INSN.  */
 
 static rtx
-mep_frame_expr (rtx insn)
+mep_frame_expr (rtx_insn *insn)
 {
   rtx note, expr;
 
@@ -870,7 +871,7 @@ mep_frame_expr (rtx insn)
    new pattern in INSN1; INSN2 will be deleted by the caller.  */
 
 static void
-mep_make_parallel (rtx insn1, rtx insn2)
+mep_make_parallel (rtx_insn *insn1, rtx_insn *insn2)
 {
   rtx expr;
 
@@ -895,9 +896,9 @@ mep_make_parallel (rtx insn1, rtx insn2)
    be persuaded to do SET_INSN as a side-effect.  Return true if so.  */
 
 static bool
-mep_use_post_modify_p_1 (rtx set_insn, rtx reg, rtx offset)
+mep_use_post_modify_p_1 (rtx_insn *set_insn, rtx reg, rtx offset)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   insn = set_insn;
   do
@@ -924,7 +925,7 @@ mep_use_post_modify_p_1 (rtx set_insn, rtx reg, rtx offset)
 /* A wrapper around mep_use_post_modify_p_1 that preserves recog_data.  */
 
 bool
-mep_use_post_modify_p (rtx insn, rtx reg, rtx offset)
+mep_use_post_modify_p (rtx_insn *insn, rtx reg, rtx offset)
 {
   bool result = mep_use_post_modify_p_1 (insn, reg, offset);
   extract_insn (insn);
@@ -1235,7 +1236,7 @@ mep_legitimize_reload_address (rtx *x, enum machine_mode mode, int opnum,
 }
 
 int
-mep_core_address_length (rtx insn, int opn)
+mep_core_address_length (rtx_insn *insn, int opn)
 {
   rtx set = single_set (insn);
   rtx mem = XEXP (set, opn);
@@ -1282,7 +1283,7 @@ mep_core_address_length (rtx insn, int opn)
 }
 
 int
-mep_cop_address_length (rtx insn, int opn)
+mep_cop_address_length (rtx_insn *insn, int opn)
 {
   rtx set = single_set (insn);
   rtx mem = XEXP (set, opn);
@@ -2337,7 +2338,8 @@ mep_reg_set_p (rtx reg, rtx insn)
 static bool
 mep_reg_set_in_function (int regno)
 {
-  rtx reg, insn;
+  rtx reg;
+  rtx_insn *insn;
 
   if (mep_interrupt_p () && df_regs_ever_live_p(regno))
     return true;
@@ -2365,7 +2367,7 @@ mep_asm_without_operands_p (void)
 {
   if (cfun->machine->asms_without_operands == 0)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       push_topmost_sequence ();
       insn = get_insns ();
@@ -2536,8 +2538,8 @@ mep_elimination_offset (int from, int to)
   gcc_unreachable ();
 }
 
-static rtx
-F (rtx x)
+static rtx_insn *
+F (rtx_insn *x)
 {
   RTX_FRAME_RELATED_P (x) = 1;
   return x;
@@ -2551,7 +2553,7 @@ F (rtx x)
 static void
 add_constant (int dest, int src, int value, int mark_frame)
 {
-  rtx insn;
+  rtx_insn *insn;
   int hi, lo;
 
   if (src == dest && value == 0)
@@ -2611,10 +2613,10 @@ add_constant (int dest, int src, int value, int mark_frame)
 /* Move SRC to DEST.  Mark the move as being potentially dead if
    MAYBE_DEAD_P.  */
 
-static rtx
+static rtx_insn *
 maybe_dead_move (rtx dest, rtx src, bool ATTRIBUTE_UNUSED maybe_dead_p)
 {
-  rtx insn = emit_move_insn (dest, src);
+  rtx_insn *insn = emit_move_insn (dest, src);
 #if 0
   if (maybe_dead_p)
     REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, NULL);
@@ -2739,7 +2741,7 @@ mep_expand_prologue (void)
 	  F(maybe_dead_move (mem, gen_rtx_REG (rmode, i), maybe_dead_p));
 	else if (rmode == DImode)
 	  {
-	    rtx insn;
+	    rtx_insn *insn;
 	    int be = TARGET_BIG_ENDIAN ? 4 : 0;
 
 	    mem = gen_rtx_MEM (SImode,
@@ -2773,7 +2775,7 @@ mep_expand_prologue (void)
 	  }
 	else
 	  {
-	    rtx insn;
+	    rtx_insn *insn;
 	    maybe_dead_move (gen_rtx_REG (rmode, REGSAVE_CONTROL_TEMP),
 			     gen_rtx_REG (rmode, i),
 			     maybe_dead_p);
@@ -3370,7 +3372,7 @@ mep_print_operand (FILE *file, rtx x, int code)
 }
 
 void
-mep_final_prescan_insn (rtx insn, rtx *operands ATTRIBUTE_UNUSED,
+mep_final_prescan_insn (rtx_insn *insn, rtx *operands ATTRIBUTE_UNUSED,
 			int noperands ATTRIBUTE_UNUSED)
 {
   /* Despite the fact that MeP is perfectly capable of branching and
@@ -4890,9 +4892,10 @@ mep_compatible_reg_class (int r1, int r2)
 }
 
 static void
-mep_reorg_regmove (rtx insns)
+mep_reorg_regmove (rtx_insn *insns)
 {
-  rtx insn, next, pat, follow, *where;
+  rtx_insn *insn, *next, *follow;
+  rtx pat, *where;
   int count = 0, done = 0, replace, before = 0;
 
   if (dump_file)
@@ -4968,7 +4971,7 @@ mep_reorg_regmove (rtx insns)
 	    {
 	      if (dump_file)
 		{
-		  rtx x;
+		  rtx_insn *x;
 
 		  fprintf (dump_file, "----- Candidate for superfluous move deletion:\n\n");
 		  for (x = insn; x ;x = NEXT_INSN (x))
@@ -5012,11 +5015,11 @@ mep_reorg_regmove (rtx insns)
 
    Return the last instruction in the adjusted loop.  */
 
-static rtx
-mep_insert_repeat_label_last (rtx last_insn, rtx label, bool including,
-			      bool shared)
+static rtx_insn *
+mep_insert_repeat_label_last (rtx_insn *last_insn, rtx_code_label *label,
+			      bool including, bool shared)
 {
-  rtx next, prev;
+  rtx_insn *next, *prev;
   int count = 0, code, icode;
 
   if (dump_file)
@@ -5040,7 +5043,7 @@ mep_insert_repeat_label_last (rtx last_insn, rtx label, bool including,
 	if (INSN_P (prev))
 	  {
 	    if (GET_CODE (PATTERN (prev)) == SEQUENCE)
-	      prev = XVECEXP (PATTERN (prev), 0, 1);
+	      prev = as_a <rtx_insn *> (XVECEXP (PATTERN (prev), 0, 1));
 
 	    /* Other insns that should not be in the last two opcodes.  */
 	    icode = recog_memoized (prev);
@@ -5210,7 +5213,7 @@ struct mep_doloop_begin {
   struct mep_doloop_begin *next;
 
   /* The instruction itself.  */
-  rtx insn;
+  rtx_insn *insn;
 
   /* The initial counter value.  This is known to be a general register.  */
   rtx counter;
@@ -5222,10 +5225,10 @@ struct mep_doloop_end {
   struct mep_doloop_end *next;
 
   /* The instruction itself.  */
-  rtx insn;
+  rtx_insn *insn;
 
   /* The first instruction after INSN when the branch isn't taken.  */
-  rtx fallthrough;
+  rtx_insn *fallthrough;
 
   /* The location of the counter value.  Since doloop_end_internal is a
      jump instruction, it has to allow the counter to be stored anywhere
@@ -5288,9 +5291,9 @@ mep_repeat_loop_p (struct mep_doloop *loop)
 /* The main repeat reorg function.  See comment above for details.  */
 
 static void
-mep_reorg_repeat (rtx insns)
+mep_reorg_repeat (rtx_insn *insns)
 {
-  rtx insn;
+  rtx_insn *insn;
   struct mep_doloop *loops, *loop;
   struct mep_doloop_begin *begin;
   struct mep_doloop_end *end;
@@ -5351,7 +5354,8 @@ mep_reorg_repeat (rtx insns)
     if (mep_repeat_loop_p (loop))
       {
 	/* Case (1) or (2).  */
-	rtx repeat_label, label_ref;
+	rtx_code_label *repeat_label;
+	rtx label_ref;
 
 	/* Create a new label for the repeat insn.  */
 	repeat_label = gen_label_rtx ();
@@ -5435,7 +5439,7 @@ mep_reorg_repeat (rtx insns)
 
 
 static bool
-mep_invertable_branch_p (rtx insn)
+mep_invertable_branch_p (rtx_insn *insn)
 {
   rtx cond, set;
   enum rtx_code old_code;
@@ -5473,7 +5477,7 @@ mep_invertable_branch_p (rtx insn)
 }
 
 static void
-mep_invert_branch (rtx insn, rtx after)
+mep_invert_branch (rtx_insn *insn, rtx_insn *after)
 {
   rtx cond, set, label;
   int i;
@@ -5519,9 +5523,11 @@ mep_invert_branch (rtx insn, rtx after)
 }
 
 static void
-mep_reorg_erepeat (rtx insns)
+mep_reorg_erepeat (rtx_insn *insns)
 {
-  rtx insn, prev, l, x;
+  rtx_insn *insn, *prev;
+  rtx_code_label *l;
+  rtx x;
   int count;
 
   for (insn = insns; insn; insn = NEXT_INSN (insn))
@@ -5542,7 +5548,7 @@ mep_reorg_erepeat (rtx insns)
 
 	    if (prev == JUMP_LABEL (insn))
 	      {
-		rtx newlast;
+		rtx_insn *newlast;
 		if (dump_file)
 		  fprintf (dump_file, "found loop top, %d insns\n", count);
 
@@ -5554,7 +5560,7 @@ mep_reorg_erepeat (rtx insns)
 		       so, we know nobody inside the loop uses it.
 		       But we must be careful to put the erepeat
 		       *after* the label.  */
-		    rtx barrier;
+		    rtx_insn *barrier;
 		    for (barrier = PREV_INSN (prev);
 			 barrier && NOTE_P (barrier);
 			 barrier = PREV_INSN (barrier))
@@ -5598,7 +5604,7 @@ mep_reorg_erepeat (rtx insns)
 	      {
 		/* A label is OK if there is exactly one user, and we
 		   can find that user before the next label.  */
-		rtx user = 0;
+		rtx_insn *user = 0;
 		int safe = 0;
 		if (LABEL_NUSES (prev) == 1)
 		  {
@@ -5632,9 +5638,10 @@ mep_reorg_erepeat (rtx insns)
    always do this on its own.  */
 
 static void
-mep_jmp_return_reorg (rtx insns)
+mep_jmp_return_reorg (rtx_insn *insns)
 {
-  rtx insn, label, ret;
+  rtx_insn *insn;
+  rtx label, ret;
   int ret_code;
 
   for (insn = insns; insn; insn = NEXT_INSN (insn))
@@ -5668,9 +5675,9 @@ mep_jmp_return_reorg (rtx insns)
 
 
 static void
-mep_reorg_addcombine (rtx insns)
+mep_reorg_addcombine (rtx_insn *insns)
 {
-  rtx i, n;
+  rtx_insn *i, *n;
 
   for (i = insns; i; i = NEXT_INSN (i))
     if (INSN_P (i)
@@ -5706,7 +5713,7 @@ mep_reorg_addcombine (rtx insns)
 /* If this insn adjusts the stack, return the adjustment, else return
    zero.  */
 static int
-add_sp_insn_p (rtx insn)
+add_sp_insn_p (rtx_insn *insn)
 {
   rtx pat;
 
@@ -5731,10 +5738,10 @@ add_sp_insn_p (rtx insn)
 /* Check for trivial functions that set up an unneeded stack
    frame.  */
 static void
-mep_reorg_noframe (rtx insns)
+mep_reorg_noframe (rtx_insn *insns)
 {
-  rtx start_frame_insn;
-  rtx end_frame_insn = 0;
+  rtx_insn *start_frame_insn;
+  rtx_insn *end_frame_insn = 0;
   int sp_adjust, sp2;
   rtx sp;
 
@@ -5755,7 +5762,7 @@ mep_reorg_noframe (rtx insns)
 
   while (insns)
     {
-      rtx next = next_real_insn (insns);
+      rtx_insn *next = next_real_insn (insns);
       if (!next)
 	break;
 
@@ -5786,7 +5793,7 @@ mep_reorg_noframe (rtx insns)
 static void
 mep_reorg (void)
 {
-  rtx insns = get_insns ();
+  rtx_insn *insns = get_insns ();
 
   /* We require accurate REG_DEAD notes.  */
   compute_bb_for_insn ();
@@ -6673,7 +6680,7 @@ mep_store_find_set (rtx *x, void *prev)
    not the containing insn.  */
 
 static bool
-mep_store_data_bypass_1 (rtx prev, rtx pat)
+mep_store_data_bypass_1 (rtx_insn *prev, rtx pat)
 {
   /* Cope with intrinsics like swcpa.  */
   if (GET_CODE (pat) == PARALLEL)
@@ -6681,7 +6688,8 @@ mep_store_data_bypass_1 (rtx prev, rtx pat)
       int i;
 
       for (i = 0; i < XVECLEN (pat, 0); i++)
-	if (mep_store_data_bypass_p (prev, XVECEXP (pat, 0, i)))
+	if (mep_store_data_bypass_p (prev,
+				     as_a <rtx_insn *> (XVECEXP (pat, 0, i))))
 	  return true;
 
       return false;
@@ -6717,7 +6725,7 @@ mep_store_data_bypass_1 (rtx prev, rtx pat)
    has no true dependence on PREV.  */
 
 bool
-mep_store_data_bypass_p (rtx prev, rtx insn)
+mep_store_data_bypass_p (rtx_insn *prev, rtx_insn *insn)
 {
   return INSN_P (insn) ? mep_store_data_bypass_1 (prev, PATTERN (insn)) : false;
 }
@@ -6738,7 +6746,7 @@ mep_mul_hilo_bypass_1 (rtx *x, void *prev)
    between multiplication instructions PREV and INSN.  */
 
 bool
-mep_mul_hilo_bypass_p (rtx prev, rtx insn)
+mep_mul_hilo_bypass_p (rtx_insn *prev, rtx_insn *insn)
 {
   rtx pat;
 
@@ -6754,7 +6762,7 @@ mep_mul_hilo_bypass_p (rtx prev, rtx insn)
    read from PSW, LP, SAR, HI and LO.  */
 
 bool
-mep_ipipe_ldc_p (rtx insn)
+mep_ipipe_ldc_p (rtx_insn *insn)
 {
   rtx pat, src;
 
@@ -6794,10 +6802,11 @@ mep_ipipe_ldc_p (rtx insn)
 
    Emit the bundle in place of COP and return it.  */
 
-static rtx
-mep_make_bundle (rtx core, rtx cop)
+static rtx_insn *
+mep_make_bundle (rtx core, rtx_insn *cop)
 {
-  rtx insn;
+  rtx seq;
+  rtx_insn *insn;
 
   /* If CORE is an existing instruction, remove it, otherwise put
      the new pattern in an INSN harness.  */
@@ -6807,8 +6816,8 @@ mep_make_bundle (rtx core, rtx cop)
     core = make_insn_raw (core);
 
   /* Generate the bundle sequence and replace COP with it.  */
-  insn = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec (2, core, cop));
-  insn = emit_insn_after (insn, cop);
+  seq = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec (2, core, cop));
+  insn = emit_insn_after (seq, cop);
   remove_insn (cop);
 
   /* Set up the links of the insns inside the SEQUENCE.  */
@@ -6867,7 +6876,7 @@ mep_insn_dependent_p (rtx x, rtx y)
 }
 
 static int
-core_insn_p (rtx insn)
+core_insn_p (rtx_insn *insn)
 {
   if (GET_CODE (PATTERN (insn)) == USE)
     return 0;
@@ -6888,9 +6897,9 @@ core_insn_p (rtx insn)
    Called from mep_insn_reorg.  */
 
 static void
-mep_bundle_insns (rtx insns)
+mep_bundle_insns (rtx_insn *insns)
 {
-  rtx insn, last = NULL_RTX, first = NULL_RTX;
+  rtx_insn *insn, *last = NULL, *first = NULL;
   int saw_scheduling = 0;
 
   /* Only do bundling if we're in vliw mode.  */
@@ -6915,7 +6924,7 @@ mep_bundle_insns (rtx insns)
 
       else if (NONJUMP_INSN_P (insn) && GET_MODE (insn) == VOIDmode && first)
 	{
-	  rtx note, prev;
+	  rtx_insn *note, *prev;
 
 	  /* INSN is part of a bundle; FIRST is the first insn in that
 	     bundle.  Move all intervening notes out of the bundle.
@@ -6971,7 +6980,7 @@ mep_bundle_insns (rtx insns)
 
       if (TARGET_IVC2)
 	{
-	  rtx core_insn = NULL_RTX;
+	  rtx_insn *core_insn = NULL;
 
 	  /* IVC2 slots are scheduled by DFA, so we just accept
 	     whatever the scheduler gives us.  However, we must make
-- 
1.8.5.3

[PATCH 057/236] cfgcleanup.c: Use rtx_insn (also touches basic-block.h and ifcvt.c)

[David Malcolm]

gcc/
	* basic-block.h (flow_find_cross_jump): Strengthen params 3 and 4
	"f1" and "f2" from rtx * to rtx_insn **.
	(flow_find_head_matching_sequence): Likewise.

	* cfgcleanup.c (try_simplify_condjump): Strengthen local
	"cbranch_insn" from rtx to rtx_insn *.
	(thread_jump): Likewise for local "insn".
	(try_forward_edges): Likewise for local "last".
	(merge_blocks_move_predecessor_nojumps): Likewise for local "barrier".
	(merge_blocks_move_successor_nojumps): Likewise for locals "barrier",
	"real_b_end".
	(can_replace_by): Likewise for params "i1", "i2".
	(old_insns_match_p): Likewise.
	(merge_notes): Likewise.
	(walk_to_nondebug_insn): Likewise for param "i1".
	(flow_find_cross_jump): Strengthen params "f1" and "f2" from rtx *
	to rtx_insn **.  Strengthen locals "i1", "i2", "last1", "last2",
	"afterlast1", "afterlast2" from rtx to rtx_insn *.
	(flow_find_head_matching_sequence): Strengthen params "f1" and
	"f2" from rtx * to rtx_insn **.  Strengthen locals "i1", "i2",
	"last1", "last2", "beforelast1", "beforelast2" from rtx to
	rtx_insn *.
	(outgoing_edges_match): Likewise for locals "last1", "last2".
	(try_crossjump_to_edge): Likewise for local "insn".
	Replace call to for_each_rtx with for_each_rtx_in_insn.

	(try_crossjump_to_edge): Likewise for locals "newpos1", "newpos2".
	(try_head_merge_bb): Likewise for locals "e0_last_head_, "jump",
	"e0_last", "e_last", "head", "curr", "insn".  Strengthen locals
	"headptr", "currptr", "nextptr" from rtx * to rtx_insn **.
	(try_optimize_cfg): Strengthen local "last" from rtx to
	rtx_insn *.
	(delete_dead_jumptables): Likewise for locals "insn", "next",
	"label".

	* ifcvt.c (cond_exec_process_if_block): Likewise for locals
	"rtx then_last_head", "rtx else_last_head", "rtx then_first_tail",
	"rtx else_first_tail", to reflect the basic-block.h changes above.
---
 gcc/basic-block.h |  6 ++--
 gcc/cfgcleanup.c  | 82 ++++++++++++++++++++++++++++---------------------------
 gcc/ifcvt.c       |  8 +++---
 3 files changed, 49 insertions(+), 47 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 2eb6553..172908d 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -818,10 +818,10 @@ enum replace_direction { dir_none, dir_forward, dir_backward, dir_both };
 
 /* In cfgcleanup.c.  */
 extern bool cleanup_cfg (int);
-extern int flow_find_cross_jump (basic_block, basic_block, rtx *, rtx *,
-                                 enum replace_direction*);
+extern int flow_find_cross_jump (basic_block, basic_block, rtx_insn **,
+				 rtx_insn **, enum replace_direction*);
 extern int flow_find_head_matching_sequence (basic_block, basic_block,
-					     rtx *, rtx *, int);
+					     rtx_insn **, rtx_insn **, int);
 
 extern bool delete_unreachable_blocks (void);
 
diff --git a/gcc/cfgcleanup.c b/gcc/cfgcleanup.c
index e6a8084..0edb7b5 100644
--- a/gcc/cfgcleanup.c
+++ b/gcc/cfgcleanup.c
@@ -69,7 +69,7 @@ static bool block_was_dirty;
 static bool try_crossjump_to_edge (int, edge, edge, enum replace_direction);
 static bool try_crossjump_bb (int, basic_block);
 static bool outgoing_edges_match (int, basic_block, basic_block);
-static enum replace_direction old_insns_match_p (int, rtx, rtx);
+static enum replace_direction old_insns_match_p (int, rtx_insn *, rtx_insn *);
 
 static void merge_blocks_move_predecessor_nojumps (basic_block, basic_block);
 static void merge_blocks_move_successor_nojumps (basic_block, basic_block);
@@ -114,7 +114,7 @@ try_simplify_condjump (basic_block cbranch_block)
 {
   basic_block jump_block, jump_dest_block, cbranch_dest_block;
   edge cbranch_jump_edge, cbranch_fallthru_edge;
-  rtx cbranch_insn;
+  rtx_insn *cbranch_insn;
 
   /* Verify that there are exactly two successors.  */
   if (EDGE_COUNT (cbranch_block->succs) != 2)
@@ -264,7 +264,8 @@ mentions_nonequal_regs (rtx *x, void *data)
 static edge
 thread_jump (edge e, basic_block b)
 {
-  rtx set1, set2, cond1, cond2, insn;
+  rtx set1, set2, cond1, cond2;
+  rtx_insn *insn;
   enum rtx_code code1, code2, reversed_code2;
   bool reverse1 = false;
   unsigned i;
@@ -488,7 +489,7 @@ try_forward_edges (int mode, basic_block b)
 		    new_target = NULL;
 		  else
 		    {
-		      rtx last;
+		      rtx_insn *last;
 
 		      if (new_locus != UNKNOWN_LOCATION)
 			locus = new_locus;
@@ -659,7 +660,7 @@ try_forward_edges (int mode, basic_block b)
 static void
 merge_blocks_move_predecessor_nojumps (basic_block a, basic_block b)
 {
-  rtx barrier;
+  rtx_insn *barrier;
 
   /* If we are partitioning hot/cold basic blocks, we don't want to
      mess up unconditional or indirect jumps that cross between hot
@@ -703,7 +704,7 @@ merge_blocks_move_predecessor_nojumps (basic_block a, basic_block b)
 static void
 merge_blocks_move_successor_nojumps (basic_block a, basic_block b)
 {
-  rtx barrier, real_b_end;
+  rtx_insn *barrier, *real_b_end;
   rtx label;
   rtx_jump_table_data *table;
 
@@ -1014,7 +1015,7 @@ equal_different_set_p (rtx p1, rtx s1, rtx p2, rtx s2)
    - dir_both if both are the case.  */
 
 static enum replace_direction
-can_replace_by (rtx i1, rtx i2)
+can_replace_by (rtx_insn *i1, rtx_insn *i2)
 {
   rtx s1, s2, d1, d2, src1, src2, note1, note2;
   bool c1, c2;
@@ -1093,7 +1094,7 @@ merge_dir (enum replace_direction a, enum replace_direction b)
    - dir_both if both are the case.  */
 
 static enum replace_direction
-old_insns_match_p (int mode ATTRIBUTE_UNUSED, rtx i1, rtx i2)
+old_insns_match_p (int mode ATTRIBUTE_UNUSED, rtx_insn *i1, rtx_insn *i2)
 {
   rtx p1, p2;
 
@@ -1224,7 +1225,7 @@ old_insns_match_p (int mode ATTRIBUTE_UNUSED, rtx i1, rtx i2)
    flow_find_head_matching_sequence, ensure the notes match.  */
 
 static void
-merge_notes (rtx i1, rtx i2)
+merge_notes (rtx_insn *i1, rtx_insn *i2)
 {
   /* If the merged insns have different REG_EQUAL notes, then
      remove them.  */
@@ -1250,7 +1251,7 @@ merge_notes (rtx i1, rtx i2)
     DID_FALLTHRU.  Otherwise, stops at the head of the bb.  */
 
 static void
-walk_to_nondebug_insn (rtx *i1, basic_block *bb1, bool follow_fallthru,
+walk_to_nondebug_insn (rtx_insn **i1, basic_block *bb1, bool follow_fallthru,
                        bool *did_fallthru)
 {
   edge fallthru;
@@ -1293,10 +1294,10 @@ walk_to_nondebug_insn (rtx *i1, basic_block *bb1, bool follow_fallthru,
    store the head of the blocks in *F1 and *F2.  */
 
 int
-flow_find_cross_jump (basic_block bb1, basic_block bb2, rtx *f1, rtx *f2,
-                      enum replace_direction *dir_p)
+flow_find_cross_jump (basic_block bb1, basic_block bb2, rtx_insn **f1,
+		      rtx_insn **f2, enum replace_direction *dir_p)
 {
-  rtx i1, i2, last1, last2, afterlast1, afterlast2;
+  rtx_insn *i1, *i2, *last1, *last2, *afterlast1, *afterlast2;
   int ninsns = 0;
   enum replace_direction dir, last_dir, afterlast_dir;
   bool follow_fallthru, did_fallthru;
@@ -1312,7 +1313,7 @@ flow_find_cross_jump (basic_block bb1, basic_block bb2, rtx *f1, rtx *f2,
      need to be compared for equivalence, which we'll do below.  */
 
   i1 = BB_END (bb1);
-  last1 = afterlast1 = last2 = afterlast2 = NULL_RTX;
+  last1 = afterlast1 = last2 = afterlast2 = NULL;
   if (onlyjump_p (i1)
       || (returnjump_p (i1) && !side_effects_p (PATTERN (i1))))
     {
@@ -1428,10 +1429,10 @@ flow_find_cross_jump (basic_block bb1, basic_block bb2, rtx *f1, rtx *f2,
    non-zero, only count active insns.  */
 
 int
-flow_find_head_matching_sequence (basic_block bb1, basic_block bb2, rtx *f1,
-				  rtx *f2, int stop_after)
+flow_find_head_matching_sequence (basic_block bb1, basic_block bb2, rtx_insn **f1,
+				  rtx_insn **f2, int stop_after)
 {
-  rtx i1, i2, last1, last2, beforelast1, beforelast2;
+  rtx_insn *i1, *i2, *last1, *last2, *beforelast1, *beforelast2;
   int ninsns = 0;
   edge e;
   edge_iterator ei;
@@ -1446,7 +1447,7 @@ flow_find_head_matching_sequence (basic_block bb1, basic_block bb2, rtx *f1,
 
   i1 = BB_HEAD (bb1);
   i2 = BB_HEAD (bb2);
-  last1 = beforelast1 = last2 = beforelast2 = NULL_RTX;
+  last1 = beforelast1 = last2 = beforelast2 = NULL;
 
   while (true)
     {
@@ -1751,8 +1752,8 @@ outgoing_edges_match (int mode, basic_block bb1, basic_block bb2)
      stop when we see the NOTE_INSN_BASIC_BLOCK, as old_insns_match_p
      handles that case specially. old_insns_match_p does not handle
      other types of instruction notes.  */
-  rtx last1 = BB_END (bb1);
-  rtx last2 = BB_END (bb2);
+  rtx_insn *last1 = BB_END (bb1);
+  rtx_insn *last2 = BB_END (bb2);
   while (!NOTE_INSN_BASIC_BLOCK_P (last1) &&
          (DEBUG_INSN_P (last1) || NOTE_P (last1)))
     last1 = PREV_INSN (last1);
@@ -1884,11 +1885,11 @@ try_crossjump_to_edge (int mode, edge e1, edge e2,
   basic_block src1 = e1->src, src2 = e2->src;
   basic_block redirect_to, redirect_from, to_remove;
   basic_block osrc1, osrc2, redirect_edges_to, tmp;
-  rtx newpos1, newpos2;
+  rtx_insn *newpos1, *newpos2;
   edge s;
   edge_iterator ei;
 
-  newpos1 = newpos2 = NULL_RTX;
+  newpos1 = newpos2 = NULL;
 
   /* If we have partitioned hot/cold basic blocks, it is a bad idea
      to try this optimization.
@@ -1955,7 +1956,7 @@ try_crossjump_to_edge (int mode, edge e1, edge e2,
       SWAP (basic_block, osrc1, osrc2);
       SWAP (basic_block, src1, src2);
       SWAP (edge, e1, e2);
-      SWAP (rtx, newpos1, newpos2);
+      SWAP (rtx_insn *, newpos1, newpos2);
 #undef SWAP
     }
 
@@ -1986,7 +1987,7 @@ try_crossjump_to_edge (int mode, edge e1, edge e2,
 	  && label1 != label2)
 	{
 	  replace_label_data rr;
-	  rtx insn;
+	  rtx_insn *insn;
 
 	  /* Replace references to LABEL1 with LABEL2.  */
 	  rr.r1 = label1;
@@ -1998,7 +1999,7 @@ try_crossjump_to_edge (int mode, edge e1, edge e2,
 		 a block whose end is a tablejump, the tablejump referenced
 		 from the instruction is deleted too.  */
 	      if (insn != BB_END (osrc1))
-		for_each_rtx (&insn, replace_label, &rr);
+		for_each_rtx_in_insn (&insn, replace_label, &rr);
 	    }
 	}
     }
@@ -2286,12 +2287,13 @@ try_head_merge_bb (basic_block bb)
   basic_block final_dest_bb = NULL;
   int max_match = INT_MAX;
   edge e0;
-  rtx *headptr, *currptr, *nextptr;
+  rtx_insn **headptr, **currptr, **nextptr;
   bool changed, moveall;
   unsigned ix;
-  rtx e0_last_head, cond, move_before;
+  rtx_insn *e0_last_head;
+  rtx cond, move_before;
   unsigned nedges = EDGE_COUNT (bb->succs);
-  rtx jump = BB_END (bb);
+  rtx_insn *jump = BB_END (bb);
   regset live, live_union;
 
   /* Nothing to do if there is not at least two outgoing edges.  */
@@ -2381,13 +2383,13 @@ try_head_merge_bb (basic_block bb)
     }
 
   e0 = EDGE_SUCC (bb, 0);
-  e0_last_head = NULL_RTX;
+  e0_last_head = NULL;
   changed = false;
 
   for (ix = 1; ix < nedges; ix++)
     {
       edge e = EDGE_SUCC (bb, ix);
-      rtx e0_last, e_last;
+      rtx_insn *e0_last, *e_last;
       int nmatch;
 
       nmatch = flow_find_head_matching_sequence (e0->dest, e->dest,
@@ -2424,15 +2426,15 @@ try_head_merge_bb (basic_block bb)
   live = BITMAP_ALLOC (NULL);
   live_union = BITMAP_ALLOC (NULL);
 
-  currptr = XNEWVEC (rtx, nedges);
-  headptr = XNEWVEC (rtx, nedges);
-  nextptr = XNEWVEC (rtx, nedges);
+  currptr = XNEWVEC (rtx_insn *, nedges);
+  headptr = XNEWVEC (rtx_insn *, nedges);
+  nextptr = XNEWVEC (rtx_insn *, nedges);
 
   for (ix = 0; ix < nedges; ix++)
     {
       int j;
       basic_block merge_bb = EDGE_SUCC (bb, ix)->dest;
-      rtx head = BB_HEAD (merge_bb);
+      rtx_insn *head = BB_HEAD (merge_bb);
 
       while (!NONDEBUG_INSN_P (head))
 	head = NEXT_INSN (head);
@@ -2522,7 +2524,7 @@ try_head_merge_bb (basic_block bb)
 	    break;
 	  for (ix = 0; ix < nedges; ix++)
 	    {
-	      rtx curr = currptr[ix];
+	      rtx_insn *curr = currptr[ix];
 	      do
 		curr = NEXT_INSN (curr);
 	      while (!NONDEBUG_INSN_P (curr));
@@ -2535,7 +2537,7 @@ try_head_merge_bb (basic_block bb)
       if (!moveall)
 	for (ix = 0; ix < nedges; ix++)
 	  {
-	    rtx curr = currptr[ix];
+	    rtx_insn *curr = currptr[ix];
 	    do
 	      curr = NEXT_INSN (curr);
 	    while (!NONDEBUG_INSN_P (curr));
@@ -2589,7 +2591,7 @@ try_head_merge_bb (basic_block bb)
 static bool
 trivially_empty_bb_p (basic_block bb)
 {
-  rtx insn = BB_END (bb);
+  rtx_insn *insn = BB_END (bb);
 
   while (1)
     {
@@ -2687,7 +2689,7 @@ try_optimize_cfg (int mode)
 			}
 		      else
 			{
-			  rtx last = get_last_bb_insn (b);
+			  rtx_insn *last = get_last_bb_insn (b);
 			  if (last && BARRIER_P (last))
 			    FOR_EACH_EDGE (e, ei, b->preds)
 			      if ((e->flags & EDGE_FALLTHRU))
@@ -2961,7 +2963,7 @@ delete_dead_jumptables (void)
      between two adjacent basic blocks.  */
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn, next;
+      rtx_insn *insn, *next;
 
       for (insn = NEXT_INSN (BB_END (bb));
 	   insn && !NOTE_INSN_BASIC_BLOCK_P (insn);
@@ -2972,7 +2974,7 @@ delete_dead_jumptables (void)
 	      && LABEL_NUSES (insn) == LABEL_PRESERVE_P (insn)
 	      && JUMP_TABLE_DATA_P (next))
 	    {
-	      rtx label = insn, jump = next;
+	      rtx_insn *label = insn, *jump = next;
 
 	      if (dump_file)
 		fprintf (dump_file, "Dead jumptable %i removed\n",
diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index d27b5fa..3c127b1 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -455,10 +455,10 @@ cond_exec_process_if_block (ce_if_block * ce_info,
   rtx false_expr;		/* test for then block insns */
   int true_prob_val;		/* probability of else block */
   int false_prob_val;		/* probability of then block */
-  rtx then_last_head = NULL_RTX;	/* Last match at the head of THEN */
-  rtx else_last_head = NULL_RTX;	/* Last match at the head of ELSE */
-  rtx then_first_tail = NULL_RTX;	/* First match at the tail of THEN */
-  rtx else_first_tail = NULL_RTX;	/* First match at the tail of ELSE */
+  rtx_insn *then_last_head = NULL;	/* Last match at the head of THEN */
+  rtx_insn *else_last_head = NULL;	/* Last match at the head of ELSE */
+  rtx_insn *then_first_tail = NULL;	/* First match at the tail of THEN */
+  rtx_insn *else_first_tail = NULL;	/* First match at the tail of ELSE */
   int then_n_insns, else_n_insns, n_insns;
   enum rtx_code false_code;
   rtx note;
-- 
1.8.5.3

Re: [PATCH 057/236] cfgcleanup.c: Use rtx_insn (also touches basic-block.h and ifcvt.c)

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* basic-block.h (flow_find_cross_jump): Strengthen params 3 and 4
> 	"f1" and "f2" from rtx * to rtx_insn **.
> 	(flow_find_head_matching_sequence): Likewise.
>
> 	* cfgcleanup.c (try_simplify_condjump): Strengthen local
> 	"cbranch_insn" from rtx to rtx_insn *.
> 	(thread_jump): Likewise for local "insn".
> 	(try_forward_edges): Likewise for local "last".
> 	(merge_blocks_move_predecessor_nojumps): Likewise for local "barrier".
> 	(merge_blocks_move_successor_nojumps): Likewise for locals "barrier",
> 	"real_b_end".
> 	(can_replace_by): Likewise for params "i1", "i2".
> 	(old_insns_match_p): Likewise.
> 	(merge_notes): Likewise.
> 	(walk_to_nondebug_insn): Likewise for param "i1".
> 	(flow_find_cross_jump): Strengthen params "f1" and "f2" from rtx *
> 	to rtx_insn **.  Strengthen locals "i1", "i2", "last1", "last2",
> 	"afterlast1", "afterlast2" from rtx to rtx_insn *.
> 	(flow_find_head_matching_sequence): Strengthen params "f1" and
> 	"f2" from rtx * to rtx_insn **.  Strengthen locals "i1", "i2",
> 	"last1", "last2", "beforelast1", "beforelast2" from rtx to
> 	rtx_insn *.
> 	(outgoing_edges_match): Likewise for locals "last1", "last2".
> 	(try_crossjump_to_edge): Likewise for local "insn".
> 	Replace call to for_each_rtx with for_each_rtx_in_insn.
>
> 	(try_crossjump_to_edge): Likewise for locals "newpos1", "newpos2".
> 	(try_head_merge_bb): Likewise for locals "e0_last_head_, "jump",
> 	"e0_last", "e_last", "head", "curr", "insn".  Strengthen locals
> 	"headptr", "currptr", "nextptr" from rtx * to rtx_insn **.
> 	(try_optimize_cfg): Strengthen local "last" from rtx to
> 	rtx_insn *.
> 	(delete_dead_jumptables): Likewise for locals "insn", "next",
> 	"label".
>
> 	* ifcvt.c (cond_exec_process_if_block): Likewise for locals
> 	"rtx then_last_head", "rtx else_last_head", "rtx then_first_tail",
> 	"rtx else_first_tail", to reflect the basic-block.h changes above.
OK.  I noticed a for_each_rtx in here.  That block may need updating due 
to Richard S.'s changes.

Patches #58 & #59 are OK too.

jeff

[PATCH 091/236] lower-subreg.c: Use rtx_insn

[David Malcolm]

gcc/
	* lower-subreg.c (simple_move): Strengthen param "insn" from rtx
	to rtx_insn *.
	(resolve_reg_notes): Likewise.
	(resolve_simple_move): Likewise for return type, param "insn", and
	locals "insns", "minsn".
	(resolve_clobber): Strengthen param "insn" from rtx to rtx_insn *.
	(resolve_use): Likewise.
	(resolve_debug): Likewise.
	(find_decomposable_shift_zext): Likewise.
	(resolve_shift_zext): Likewise for return type, param "insn", and
	locals "insns", "in".  Eliminate use of NULL_RTX in favor of NULL.
	(decompose_multiword_subregs): Likewise for local "insn",
	"orig_insn", "decomposed_shift", "end".
---
 gcc/lower-subreg.c | 49 ++++++++++++++++++++++++++-----------------------
 1 file changed, 26 insertions(+), 23 deletions(-)

diff --git a/gcc/lower-subreg.c b/gcc/lower-subreg.c
index 916e4ad..3451a5e 100644
--- a/gcc/lower-subreg.c
+++ b/gcc/lower-subreg.c
@@ -321,7 +321,7 @@ simple_move_operand (rtx x)
    is called.  */
 
 static rtx
-simple_move (rtx insn, bool speed_p)
+simple_move (rtx_insn *insn, bool speed_p)
 {
   rtx x;
   rtx set;
@@ -800,7 +800,7 @@ adjust_decomposed_uses (rtx *px, void *data ATTRIBUTE_UNUSED)
    INSN.  */
 
 static void
-resolve_reg_notes (rtx insn)
+resolve_reg_notes (rtx_insn *insn)
 {
   rtx *pnote, note;
 
@@ -870,10 +870,11 @@ can_decompose_p (rtx x)
    we don't change anything, return INSN, otherwise return the start
    of the sequence of moves.  */
 
-static rtx
-resolve_simple_move (rtx set, rtx insn)
+static rtx_insn *
+resolve_simple_move (rtx set, rtx_insn *insn)
 {
-  rtx src, dest, real_dest, insns;
+  rtx src, dest, real_dest;
+  rtx_insn *insns;
   enum machine_mode orig_mode, dest_mode;
   unsigned int words;
   bool pushing;
@@ -915,7 +916,8 @@ resolve_simple_move (rtx set, rtx insn)
 	  || (GET_MODE_SIZE (orig_mode)
 	      != GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))))
     {
-      rtx reg, minsn, smove;
+      rtx reg, smove;
+      rtx_insn *minsn;
 
       reg = gen_reg_rtx (orig_mode);
       minsn = emit_move_insn (reg, src);
@@ -1062,7 +1064,8 @@ resolve_simple_move (rtx set, rtx insn)
 
   if (real_dest != NULL_RTX)
     {
-      rtx mdest, minsn, smove;
+      rtx mdest, smove;
+      rtx_insn *minsn;
 
       if (dest_mode == orig_mode)
 	mdest = dest;
@@ -1108,7 +1111,7 @@ resolve_simple_move (rtx set, rtx insn)
    component registers.  Return whether we changed something.  */
 
 static bool
-resolve_clobber (rtx pat, rtx insn)
+resolve_clobber (rtx pat, rtx_insn *insn)
 {
   rtx reg;
   enum machine_mode orig_mode;
@@ -1149,7 +1152,7 @@ resolve_clobber (rtx pat, rtx insn)
    whether we changed something.  */
 
 static bool
-resolve_use (rtx pat, rtx insn)
+resolve_use (rtx pat, rtx_insn *insn)
 {
   if (resolve_reg_p (XEXP (pat, 0)) || resolve_subreg_p (XEXP (pat, 0)))
     {
@@ -1165,7 +1168,7 @@ resolve_use (rtx pat, rtx insn)
 /* A VAR_LOCATION can be simplified.  */
 
 static void
-resolve_debug (rtx insn)
+resolve_debug (rtx_insn *insn)
 {
   for_each_rtx (&PATTERN (insn), adjust_decomposed_uses, NULL_RTX);
 
@@ -1180,7 +1183,7 @@ resolve_debug (rtx insn)
    if INSN is decomposable.  */
 
 static bool
-find_decomposable_shift_zext (rtx insn, bool speed_p)
+find_decomposable_shift_zext (rtx_insn *insn, bool speed_p)
 {
   rtx set;
   rtx op;
@@ -1236,33 +1239,33 @@ find_decomposable_shift_zext (rtx insn, bool speed_p)
    and 'set to zero' insn.  Return a pointer to the new insn when a
    replacement was done.  */
 
-static rtx
-resolve_shift_zext (rtx insn)
+static rtx_insn *
+resolve_shift_zext (rtx_insn *insn)
 {
   rtx set;
   rtx op;
   rtx op_operand;
-  rtx insns;
+  rtx_insn *insns;
   rtx src_reg, dest_reg, dest_upper, upper_src = NULL_RTX;
   int src_reg_num, dest_reg_num, offset1, offset2, src_offset;
 
   set = single_set (insn);
   if (!set)
-    return NULL_RTX;
+    return NULL;
 
   op = SET_SRC (set);
   if (GET_CODE (op) != ASHIFT
       && GET_CODE (op) != LSHIFTRT
       && GET_CODE (op) != ASHIFTRT
       && GET_CODE (op) != ZERO_EXTEND)
-    return NULL_RTX;
+    return NULL;
 
   op_operand = XEXP (op, 0);
 
   /* We can tear this operation apart only if the regs were already
      torn apart.  */
   if (!resolve_reg_p (SET_DEST (set)) && !resolve_reg_p (op_operand))
-    return NULL_RTX;
+    return NULL;
 
   /* src_reg_num is the number of the word mode register which we
      are operating on.  For a left shift and a zero_extend on little
@@ -1326,7 +1329,7 @@ resolve_shift_zext (rtx insn)
 
   if (dump_file)
     {
-      rtx in;
+      rtx_insn *in;
       fprintf (dump_file, "; Replacing insn: %d with insns: ", INSN_UID (insn));
       for (in = insns; in != insn; in = NEXT_INSN (in))
 	fprintf (dump_file, "%d ", INSN_UID (in));
@@ -1465,7 +1468,7 @@ decompose_multiword_subregs (bool decompose_copies)
   speed_p = optimize_function_for_speed_p (cfun);
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       FOR_BB_INSNS (bb, insn)
 	{
@@ -1545,7 +1548,7 @@ decompose_multiword_subregs (bool decompose_copies)
 
       FOR_EACH_BB_FN (bb, cfun)
 	{
-	  rtx insn;
+	  rtx_insn *insn;
 
 	  FOR_BB_INSNS (bb, insn)
 	    {
@@ -1572,7 +1575,7 @@ decompose_multiword_subregs (bool decompose_copies)
 		  set = simple_move (insn, speed_p);
 		  if (set)
 		    {
-		      rtx orig_insn = insn;
+		      rtx_insn *orig_insn = insn;
 		      bool cfi = control_flow_insn_p (insn);
 
 		      /* We can end up splitting loads to multi-word pseudos
@@ -1602,7 +1605,7 @@ decompose_multiword_subregs (bool decompose_copies)
 		    }
 		  else
 		    {
-		      rtx decomposed_shift;
+		      rtx_insn *decomposed_shift;
 
 		      decomposed_shift = resolve_shift_zext (insn);
 		      if (decomposed_shift != NULL_RTX)
@@ -1644,7 +1647,7 @@ decompose_multiword_subregs (bool decompose_copies)
 	 loads to appear.  */
       EXECUTE_IF_SET_IN_BITMAP (sub_blocks, 0, i, sbi)
 	{
-	  rtx insn, end;
+	  rtx_insn *insn, *end;
 	  edge fallthru;
 
 	  bb = BASIC_BLOCK_FOR_FN (cfun, i);
-- 
1.8.5.3

[PATCH 046/236] delete_related_insns returns an rtx_insn

[David Malcolm]

gcc/
	* rtl.h (delete_related_insns): Strengthen return type from rtx to
	rtx_insn *.

	* jump.c (delete_related_insns): Likewise, also for locals "next"
	and "prev".
---
 gcc/jump.c | 4 ++--
 gcc/rtl.h  | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/jump.c b/gcc/jump.c
index 1a150ac..b51ca17 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -1238,12 +1238,12 @@ mark_jump_label_asm (rtx asmop, rtx insn)
    Usage of this instruction is deprecated.  Use delete_insn instead and
    subsequent cfg_cleanup pass to delete unreachable code if needed.  */
 
-rtx
+rtx_insn *
 delete_related_insns (rtx insn)
 {
   int was_code_label = (LABEL_P (insn));
   rtx note;
-  rtx next = NEXT_INSN (insn), prev = PREV_INSN (insn);
+  rtx_insn *next = NEXT_INSN (insn), *prev = PREV_INSN (insn);
 
   while (next && INSN_DELETED_P (next))
     next = NEXT_INSN (next);
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 0ad200e..9c097b6 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2436,7 +2436,7 @@ extern enum rtx_code signed_condition (enum rtx_code);
 extern void mark_jump_label (rtx, rtx, int);
 
 /* In jump.c */
-extern rtx delete_related_insns (rtx);
+extern rtx_insn *delete_related_insns (rtx);
 
 /* In recog.c  */
 extern rtx *find_constant_term_loc (rtx *);
-- 
1.8.5.3

Re: [PATCH 046/236] delete_related_insns returns an rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* rtl.h (delete_related_insns): Strengthen return type from rtx to
> 	rtx_insn *.
>
> 	* jump.c (delete_related_insns): Likewise, also for locals "next"
> 	and "prev".
OK.
Jeff

Re: [PATCH 046/236] delete_related_insns returns an rtx_insn

[David Malcolm]

On Wed, 2014-08-13 at 12:10 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (delete_related_insns): Strengthen return type from rtx to
> > 	rtx_insn *.
> >
> > 	* jump.c (delete_related_insns): Likewise, also for locals "next"
> > 	and "prev".
> OK.
Thanks; committed to trunk as r214275.

[PATCH 158/236] Remove BB_FOOTER scaffolding

[David Malcolm]

gcc/
	* basic-block.h (struct rtl_bb_info): Strengthen field "footer_"
	from rtx to rtx_insn *.
	(BB_FOOTER): Replace function with access macro.
	(SET_BB_FOOTER): Delete.

	* cfgcleanup.c (try_optimize_cfg): Replace uses of SET_BB_FOOTER
	with BB_FOOTER.
	* cfgrtl.c (try_redirect_by_replacing_jump): Likewise.
	(emit_barrier_after_bb): Likewise.
	(record_effective_endpoints): Likewise.
	(relink_block_chain): Likewise.
	(fixup_fallthru_exit_predecessor): Likewise.
	(cfg_layout_duplicate_bb): Likewise.
	(cfg_layout_split_block): Likewise.
	(cfg_layout_delete_block): Likewise.
	(cfg_layout_merge_blocks): Likewise.
	(BB_FOOTER): Delete function.
	(SET_BB_FOOTER): Delete function.
	* combine.c (update_cfg_for_uncondjump): Replace uses of
	SET_BB_FOOTER with BB_FOOTER.

/
	* rtx-classes-status.txt: Remove SET_BB_FOOTER.
---
 gcc/basic-block.h      |  5 ++---
 gcc/cfgcleanup.c       |  6 +++---
 gcc/cfgrtl.c           | 43 ++++++++++++++-----------------------------
 gcc/combine.c          |  2 +-
 rtx-classes-status.txt |  2 +-
 5 files changed, 21 insertions(+), 37 deletions(-)

diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 18d3871..0f55a8b 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -127,7 +127,7 @@ struct GTY(()) rtl_bb_info {
   /* In CFGlayout mode points to insn notes/jumptables to be placed just before
      and after the block.   */
   rtx header_;
-  rtx footer_;
+  rtx_insn *footer_;
 };
 
 struct GTY(()) gimple_bb_info {
@@ -381,8 +381,7 @@ extern rtx& SET_BB_END (basic_block bb);
 extern rtx_insn *BB_HEADER (const_basic_block bb);
 extern rtx& SET_BB_HEADER (basic_block bb);
 
-extern rtx_insn *BB_FOOTER (const_basic_block bb);
-extern rtx& SET_BB_FOOTER (basic_block bb);
+#define BB_FOOTER(B)    (B)->il.x.rtl->footer_
 
 /* Special block numbers [markers] for entry and exit.
    Neither of them is supposed to hold actual statements.  */
diff --git a/gcc/cfgcleanup.c b/gcc/cfgcleanup.c
index 0edb7b5..6930c03 100644
--- a/gcc/cfgcleanup.c
+++ b/gcc/cfgcleanup.c
@@ -2676,13 +2676,13 @@ try_optimize_cfg (int mode)
 				{
 				  if (BB_FOOTER (b))
 				    {
-				      SET_BB_FOOTER (e->src) = BB_FOOTER (b);
-				      SET_BB_FOOTER (b) = NULL;
+				      BB_FOOTER (e->src) = BB_FOOTER (b);
+				      BB_FOOTER (b) = NULL;
 				    }
 				  else
 				    {
 				      start_sequence ();
-				      SET_BB_FOOTER (e->src) = emit_barrier ();
+				      BB_FOOTER (e->src) = emit_barrier ();
 				      end_sequence ();
 				    }
 				}
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 612eca7..1525a75 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -1064,7 +1064,7 @@ try_redirect_by_replacing_jump (edge e, basic_block target, bool in_cfglayout)
 		  if (PREV_INSN (insn))
 		    SET_NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
 		  else
-		    SET_BB_FOOTER (src) = NEXT_INSN (insn);
+		    BB_FOOTER (src) = NEXT_INSN (insn);
 		  if (NEXT_INSN (insn))
 		    SET_PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
 		}
@@ -1452,7 +1452,7 @@ emit_barrier_after_bb (basic_block bb)
   gcc_assert (current_ir_type () == IR_RTL_CFGRTL
               || current_ir_type () == IR_RTL_CFGLAYOUT);
   if (current_ir_type () == IR_RTL_CFGLAYOUT)
-    SET_BB_FOOTER (bb) = unlink_insn_chain (barrier, barrier);
+    BB_FOOTER (bb) = unlink_insn_chain (barrier, barrier);
 }
 
 /* Like force_nonfallthru below, but additionally performs redirection
@@ -3463,7 +3463,7 @@ record_effective_endpoints (void)
 						PREV_INSN (BB_HEAD (bb)));
       end = skip_insns_after_block (bb);
       if (NEXT_INSN (BB_END (bb)) && BB_END (bb) != end)
-	SET_BB_FOOTER (bb) = unlink_insn_chain (NEXT_INSN (BB_END (bb)), end);
+	BB_FOOTER (bb) = unlink_insn_chain (NEXT_INSN (BB_END (bb)), end);
       next_insn = NEXT_INSN (BB_END (bb));
     }
 
@@ -3623,7 +3623,7 @@ relink_block_chain (bool stay_in_cfglayout_mode)
     {
       bb->aux = NULL;
       if (!stay_in_cfglayout_mode)
-	SET_BB_HEADER (bb) = SET_BB_FOOTER (bb) = NULL;
+	SET_BB_HEADER (bb) = BB_FOOTER (bb) = NULL;
     }
 
   /* Maybe reset the original copy tables, they are not valid anymore
@@ -3991,8 +3991,8 @@ fixup_fallthru_exit_predecessor (void)
 	  bb = split_block (bb, NULL)->dest;
 	  bb->aux = c->aux;
 	  c->aux = bb;
-	  SET_BB_FOOTER (bb) = BB_FOOTER (c);
-	  SET_BB_FOOTER (c) = NULL;
+	  BB_FOOTER (bb) = BB_FOOTER (c);
+	  BB_FOOTER (c) = NULL;
 	}
 
       while (c->aux != bb)
@@ -4206,7 +4206,7 @@ cfg_layout_duplicate_bb (basic_block bb)
 	insn = NEXT_INSN (insn);
       insn = duplicate_insn_chain (BB_FOOTER (bb), insn);
       if (insn)
-	SET_BB_FOOTER (new_bb) = unlink_insn_chain (insn, get_last_insn ());
+	BB_FOOTER (new_bb) = unlink_insn_chain (insn, get_last_insn ());
     }
 
   return new_bb;
@@ -4314,8 +4314,8 @@ cfg_layout_split_block (basic_block bb, void *insnp)
   rtx insn = (rtx) insnp;
   basic_block new_bb = rtl_split_block (bb, insn);
 
-  SET_BB_FOOTER (new_bb) = BB_FOOTER (bb);
-  SET_BB_FOOTER (bb) = NULL;
+  BB_FOOTER (new_bb) = BB_FOOTER (bb);
+  BB_FOOTER (bb) = NULL;
 
   return new_bb;
 }
@@ -4446,7 +4446,7 @@ cfg_layout_delete_block (basic_block bb)
 	      if (PREV_INSN (insn))
 		SET_NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
 	      else
-		SET_BB_FOOTER (bb) = NEXT_INSN (insn);
+		BB_FOOTER (bb) = NEXT_INSN (insn);
 	      if (NEXT_INSN (insn))
 		SET_PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
 	    }
@@ -4581,7 +4581,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
   if (BB_FOOTER (b))
     {
       if (!BB_FOOTER (a))
-	SET_BB_FOOTER (a) = SET_BB_FOOTER (b);
+	BB_FOOTER (a) = BB_FOOTER (b);
       else
 	{
 	  rtx_insn *last = BB_FOOTER (a);
@@ -4591,7 +4591,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
 	  SET_NEXT_INSN (last) = BB_FOOTER (b);
 	  SET_PREV_INSN (BB_FOOTER (b)) = last;
 	}
-      SET_BB_FOOTER (b) = NULL;
+      BB_FOOTER (b) = NULL;
     }
 
   /* Move things from b->header before a->footer.
@@ -4600,7 +4600,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
    if (BB_HEADER (b))
      {
       if (! BB_FOOTER (a))
-	SET_BB_FOOTER (a) = BB_HEADER (b);
+	BB_FOOTER (a) = BB_HEADER (b);
       else
 	{
 	  rtx_insn *last = BB_HEADER (b);
@@ -4609,7 +4609,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
 	    last = NEXT_INSN (last);
 	  SET_NEXT_INSN (last) = BB_FOOTER (a);
 	  SET_PREV_INSN (BB_FOOTER (a)) = last;
-	  SET_BB_FOOTER (a) = BB_HEADER (b);
+	  BB_FOOTER (a) = BB_HEADER (b);
 	}
       SET_BB_HEADER (b) = NULL;
     }
@@ -5153,19 +5153,4 @@ rtx& SET_BB_HEADER (basic_block bb)
   return bb->il.x.rtl->header_;
 }
 
-/* BB_FOOTER as an rvalue. */
-
-rtx_insn *BB_FOOTER (const_basic_block bb)
-{
-  rtx insn = bb->il.x.rtl->footer_;
-  return as_a_nullable <rtx_insn *> (insn);
-}
-
-/* BB_FOOTER as an lvalue. */
-
-rtx& SET_BB_FOOTER (basic_block bb)
-{
-  return bb->il.x.rtl->footer_;
-}
-
 #include "gt-cfgrtl.h"
diff --git a/gcc/combine.c b/gcc/combine.c
index 9a922a7..4a73e0b 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -2396,7 +2396,7 @@ update_cfg_for_uncondjump (rtx_insn *insn)
 	    if (PREV_INSN (insn))
 	      SET_NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
 	    else
-	      SET_BB_FOOTER (bb) = NEXT_INSN (insn);
+	      BB_FOOTER (bb) = NEXT_INSN (insn);
 	    if (NEXT_INSN (insn))
 	      SET_PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
 	  }
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index 90d6efd..d26dd89 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -11,7 +11,7 @@ Phase 6: use extra rtx_def subclasses:             TODO
 TODO: "Scaffolding" to be removed
 =================================
 * DF_REF_INSN
-* SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
+* SET_BB_HEAD, SET_BB_END, SET_BB_HEADER
 * SET_BB_NOTE_LIST
 * SET_BND_TO
 * SET_DEP_PRO, SET_DEP_CON
-- 
1.8.5.3

[PATCH 043/236] peephole returns an rtx_insn

[David Malcolm]

gcc/
	* output.h (peephole): Strengthen return type from rtx to rtx_insn *.
	* rtl.h (delete_for_peephole): Likewise for both params.
	* genpeep.c (main): In generated "peephole" function, strengthen
	return type and local "insn" from rtx to rtx_insn *.  For now,
	rename param "ins1" to "uncast_ins1", adding "ins1" back as an
	rtx_insn *, with a checked cast.
	* jump.c (delete_for_peephole): Strengthen params "from", "to" and
	locals "insn", "next", "prev" from rtx to rtx_insn *.
---
 gcc/genpeep.c | 6 ++++--
 gcc/jump.c    | 8 ++++----
 gcc/output.h  | 2 +-
 gcc/rtl.h     | 2 +-
 4 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/gcc/genpeep.c b/gcc/genpeep.c
index a8afadb..bc2785e 100644
--- a/gcc/genpeep.c
+++ b/gcc/genpeep.c
@@ -378,8 +378,10 @@ from the machine description file `md'.  */\n\n");
   printf ("extern rtx peep_operand[];\n\n");
   printf ("#define operands peep_operand\n\n");
 
-  printf ("rtx\npeephole (rtx ins1)\n{\n");
-  printf ("  rtx insn ATTRIBUTE_UNUSED, x ATTRIBUTE_UNUSED, pat ATTRIBUTE_UNUSED;\n\n");
+  printf ("rtx_insn *\npeephole (rtx uncast_ins1)\n{\n");
+  printf ("  rtx_insn *ins1 = as_a <rtx_insn *> (uncast_ins1);\n");
+  printf ("  rtx_insn *insn ATTRIBUTE_UNUSED;\n");
+  printf ("  rtx x ATTRIBUTE_UNUSED, pat ATTRIBUTE_UNUSED;\n\n");
 
   /* Early out: no peepholes for insns followed by barriers.  */
   printf ("  if (NEXT_INSN (ins1)\n");
diff --git a/gcc/jump.c b/gcc/jump.c
index 0cac620..1a150ac 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -1388,14 +1388,14 @@ delete_related_insns (rtx insn)
    peephole insn that will replace them.  */
 
 void
-delete_for_peephole (rtx from, rtx to)
+delete_for_peephole (rtx_insn *from, rtx_insn *to)
 {
-  rtx insn = from;
+  rtx_insn *insn = from;
 
   while (1)
     {
-      rtx next = NEXT_INSN (insn);
-      rtx prev = PREV_INSN (insn);
+      rtx_insn *next = NEXT_INSN (insn);
+      rtx_insn *prev = PREV_INSN (insn);
 
       if (!NOTE_P (insn))
 	{
diff --git a/gcc/output.h b/gcc/output.h
index 2b32601..53d575a 100644
--- a/gcc/output.h
+++ b/gcc/output.h
@@ -281,7 +281,7 @@ extern void assemble_addr_to_section (rtx, section *);
 extern int get_pool_size (void);
 
 #ifdef HAVE_peephole
-extern rtx peephole (rtx);
+extern rtx_insn *peephole (rtx);
 #endif
 
 extern void output_shared_constant_pool (void);
diff --git a/gcc/rtl.h b/gcc/rtl.h
index f28a62a..0ad200e 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3035,7 +3035,7 @@ extern rtx reversed_comparison (const_rtx, enum machine_mode);
 extern enum rtx_code reversed_comparison_code (const_rtx, const_rtx);
 extern enum rtx_code reversed_comparison_code_parts (enum rtx_code, const_rtx,
 						     const_rtx, const_rtx);
-extern void delete_for_peephole (rtx, rtx);
+extern void delete_for_peephole (rtx_insn *, rtx_insn *);
 extern int condjump_in_parallel_p (const_rtx);
 
 /* In emit-rtl.c.  */
-- 
1.8.5.3

Re: [PATCH 043/236] peephole returns an rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* output.h (peephole): Strengthen return type from rtx to rtx_insn *.
> 	* rtl.h (delete_for_peephole): Likewise for both params.
> 	* genpeep.c (main): In generated "peephole" function, strengthen
> 	return type and local "insn" from rtx to rtx_insn *.  For now,
> 	rename param "ins1" to "uncast_ins1", adding "ins1" back as an
> 	rtx_insn *, with a checked cast.
> 	* jump.c (delete_for_peephole): Strengthen params "from", "to" and
> 	locals "insn", "next", "prev" from rtx to rtx_insn *.
OK
Jeff

Re: [PATCH 043/236] peephole returns an rtx_insn

[David Malcolm]

On Wed, 2014-08-13 at 12:06 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* output.h (peephole): Strengthen return type from rtx to rtx_insn *.
> > 	* rtl.h (delete_for_peephole): Likewise for both params.
> > 	* genpeep.c (main): In generated "peephole" function, strengthen
> > 	return type and local "insn" from rtx to rtx_insn *.  For now,
> > 	rename param "ins1" to "uncast_ins1", adding "ins1" back as an
> > 	rtx_insn *, with a checked cast.
> > 	* jump.c (delete_for_peephole): Strengthen params "from", "to" and
> > 	locals "insn", "next", "prev" from rtx to rtx_insn *.
> OK
Thanks; committed to trunk as r214264.

[PATCH 075/236] final.c: Use rtx_insn (also touches output.c and config/arc/arc.c)

[David Malcolm]

In particular, after this patch, the first param passed to the
FINAL_PRESCAN_INSN macro is strengthened from rtx to rtx_insn *.

gcc/
	* output.h (final_scan_insn): Strengthen return type from rtx to
	rtx_insn *.
	(final_forward_branch_p): Likewise for param.
	(current_output_insn): Likewise for this global.

	* final.c (rtx debug_insn): Likewise for this variable.
	(current_output_insn): Likewise.
	(get_attr_length_1): Rename param "insn" to "uncast_insn",
	adding "insn" back in as an rtx_insn * with a checked cast, so
	that macro ADJUST_INSN_LENGTH can be passed an rtx_insn * as the
	first param.
	(compute_alignments): Strengthen local "label" from rtx to
	rtx_insn *.
	(shorten_branches): Rename param from "first" to "uncast_first",
	introducing a new local rtx_insn * "first" using a checked cast to
	effectively strengthen "first" from rtx to rtx_insn * without
	affecting the type signature.  Strengthen locals "insn", "seq",
	"next", "label" from rtx to rtx_insn *.
	(change_scope): Strengthen param "orig_insn" and local "insn" from
	rtx to rtx_insn *.
	(final_start_function): Rename param from "first" to "uncast_first",
	introducing a new local rtx_insn * "first" using a checked cast to
	effectively strengthen "first" from rtx to rtx_insn * without
	affecting the type signature.  Strengthen local "insn" from rtx to
	rtx_insn *.
	(dump_basic_block_info): Strengthen param "insn" from rtx to
	rtx_insn *.
	(final): Rename param from "first" to "uncast_first",
	introducing a new local rtx_insn * "first" using a checked cast to
	effectively strengthen "first" from rtx to rtx_insn * without
	affecting the type signature.  Strengthen locals "insn", "next"
	from rtx to rtx_insn *.
	(output_alternate_entry_point): Strengthen param "insn" from rtx to
	rtx_insn *.
	(call_from_call_insn): Strengthen param "insn" from rtx to
	rtx_call_insn *.
	(final_scan_insn): Rename param from "insn" to "uncast_insn",
	introducing a new local rtx_insn * "insn" using a checked cast to
	effectively strengthen "insn" from rtx to rtx_insn * without
	affecting the type signature.  Strengthen return type and locals
	"next", "note", "prev", "new_rtx" from rtx to rtx_insn *.  Remove
	now-redundant checked cast to rtx_insn * from both invocations of
	debug_hooks->var_location.  Convert CALL_P into a dyn_cast,
	introducing a local "call_insn" for use when invoking
	call_from_call_insn.
	(notice_source_line): Strengthen param "insn" from rtx to
	rtx_insn *.
	(leaf_function_p): Likewise for local "insn".
	(final_forward_branch_p): Likewise.
	(leaf_renumber_regs): Likewise for param "first".
	(rest_of_clean_state): Likewise for locals "insn" and "next".
	(collect_fn_hard_reg_usage): Likewise for local "insn".
	(get_call_fndecl): Likewise for param "insn".
	(get_call_cgraph_rtl_info): Likewise.
	(get_call_reg_set_usage): Rename param from "insn" to "uncast_insn",
	introducing a new local rtx_insn * "insn" using a checked cast to
	effectively strengthen "insn" from rtx to rtx_insn * without
	affecting the type signature.

	* config/arc/arc.c (arc_final_prescan_insn): For now, add checked
	cast when assigning from param "insn" to current_output_insn.
	(arc_pad_return): Strengthen local "insn" from rtx to rtx_insn *
	so that we can assign it back to current_output_insn.
---
 gcc/config/arc/arc.c |  4 +--
 gcc/final.c          | 99 ++++++++++++++++++++++++++++------------------------
 gcc/output.h         |  6 ++--
 3 files changed, 58 insertions(+), 51 deletions(-)

diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 3b3e820..c502d10 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -3944,7 +3944,7 @@ arc_final_prescan_insn (rtx insn, rtx *opvec ATTRIBUTE_UNUSED,
       current_output_insn =
 	emit_insn_before (gen_nop (), NEXT_INSN (PREV_INSN (insn)));
       final_scan_insn (current_output_insn, asm_out_file, optimize, 1, NULL);
-      current_output_insn = insn;
+      current_output_insn = as_a <rtx_insn *> (insn);
     }
   /* Restore extraction data which might have been clobbered by arc_hazard.  */
   extract_constrain_insn_cached (insn);
@@ -8652,7 +8652,7 @@ arc_branch_size_unknown_p (void)
 void
 arc_pad_return (void)
 {
-  rtx insn = current_output_insn;
+  rtx_insn *insn = current_output_insn;
   rtx prev = prev_active_insn (insn);
   int want_long;
 
diff --git a/gcc/final.c b/gcc/final.c
index 1ae2c90..22d75c3 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -117,8 +117,8 @@ along with GCC; see the file COPYING3.  If not see
 #define SEEN_EMITTED	2
 
 /* Last insn processed by final_scan_insn.  */
-static rtx debug_insn;
-rtx current_output_insn;
+static rtx_insn *debug_insn;
+rtx_insn *current_output_insn;
 
 /* Line number of last NOTE.  */
 static int last_linenum;
@@ -208,14 +208,14 @@ static bool need_profile_function;
 static int asm_insn_count (rtx);
 static void profile_function (FILE *);
 static void profile_after_prologue (FILE *);
-static bool notice_source_line (rtx, bool *);
+static bool notice_source_line (rtx_insn *, bool *);
 static rtx walk_alter_subreg (rtx *, bool *);
 static void output_asm_name (void);
-static void output_alternate_entry_point (FILE *, rtx);
+static void output_alternate_entry_point (FILE *, rtx_insn *);
 static tree get_mem_expr_from_op (rtx, int *);
 static void output_asm_operand_names (rtx *, int *, int);
 #ifdef LEAF_REGISTERS
-static void leaf_renumber_regs (rtx);
+static void leaf_renumber_regs (rtx_insn *);
 #endif
 #ifdef HAVE_cc0
 static int alter_cond (rtx);
@@ -373,8 +373,9 @@ init_insn_lengths (void)
    get its actual length.  Otherwise, use FALLBACK_FN to calculate the
    length.  */
 static int
-get_attr_length_1 (rtx insn, int (*fallback_fn) (rtx))
+get_attr_length_1 (rtx uncast_insn, int (*fallback_fn) (rtx))
 {
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
   rtx body;
   int i;
   int length = 0;
@@ -710,7 +711,7 @@ compute_alignments (void)
     fprintf (dump_file, "freq_max: %i\n",freq_max);
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx label = BB_HEAD (bb);
+      rtx_insn *label = BB_HEAD (bb);
       int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
       edge e;
       edge_iterator ei;
@@ -898,15 +899,16 @@ make_pass_compute_alignments (gcc::context *ctxt)
    slots.  */
 
 void
-shorten_branches (rtx first)
+shorten_branches (rtx uncast_first)
 {
-  rtx insn;
+  rtx_insn *first = as_a_nullable <rtx_insn *> (uncast_first);
+  rtx_insn *insn;
   int max_uid;
   int i;
   int max_log;
   int max_skip;
 #define MAX_CODE_ALIGN 16
-  rtx seq;
+  rtx_insn *seq;
   int something_changed = 1;
   char *varying_length;
   rtx body;
@@ -943,7 +945,7 @@ shorten_branches (rtx first)
 
       if (LABEL_P (insn))
 	{
-	  rtx next;
+	  rtx_insn *next;
 	  bool next_is_jumptable;
 
 	  /* Merge in alignments computed by compute_alignments.  */
@@ -985,7 +987,7 @@ shorten_branches (rtx first)
 	}
       else if (BARRIER_P (insn))
 	{
-	  rtx label;
+	  rtx_insn *label;
 
 	  for (label = insn; label && ! INSN_P (label);
 	       label = NEXT_INSN (label))
@@ -1230,7 +1232,7 @@ shorten_branches (rtx first)
 #ifdef CASE_VECTOR_SHORTEN_MODE
 	      /* If the mode of a following jump table was changed, we
 		 may need to update the alignment of this label.  */
-	      rtx next;
+	      rtx_insn *next;
 	      bool next_is_jumptable;
 
 	      next = next_nonnote_insn (insn);
@@ -1605,9 +1607,9 @@ choose_inner_scope (tree s1, tree s2)
 /* Emit lexical block notes needed to change scope from S1 to S2.  */
 
 static void
-change_scope (rtx orig_insn, tree s1, tree s2)
+change_scope (rtx_insn *orig_insn, tree s1, tree s2)
 {
-  rtx insn = orig_insn;
+  rtx_insn *insn = orig_insn;
   tree com = NULL_TREE;
   tree ts1 = s1, ts2 = s2;
   tree s;
@@ -1728,9 +1730,10 @@ reemit_insn_block_notes (void)
      test and compare insns.  */
 
 void
-final_start_function (rtx first, FILE *file,
+final_start_function (rtx uncast_first, FILE *file,
 		      int optimize_p ATTRIBUTE_UNUSED)
 {
+  rtx_insn *first = as_a_nullable <rtx_insn *> (uncast_first);
   block_depth = 0;
 
   this_is_asm_operands = 0;
@@ -1768,11 +1771,11 @@ final_start_function (rtx first, FILE *file,
 #endif
 	 )
 	{
-	  rtx insn;
+	  rtx_insn *insn;
 	  for (insn = first; insn; insn = NEXT_INSN (insn))
 	    if (!NOTE_P (insn))
 	      {
-		insn = NULL_RTX;
+		insn = NULL;
 		break;
 	      }
 	    else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
@@ -1783,7 +1786,7 @@ final_start_function (rtx first, FILE *file,
 	      continue;
 	    else
 	      {
-		insn = NULL_RTX;
+		insn = NULL;
 		break;
 	      }
 
@@ -1909,7 +1912,7 @@ final_end_function (void)
    output file, and INSN is the instruction being emitted.  */
 
 static void
-dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
+dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb,
                        basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
 {
   basic_block bb;
@@ -1956,9 +1959,10 @@ dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
    For description of args, see `final_start_function', above.  */
 
 void
-final (rtx first, FILE *file, int optimize_p)
+final (rtx uncast_first, FILE *file, int optimize_p)
 {
-  rtx insn, next;
+  rtx_insn *first = as_a_nullable <rtx_insn *> (uncast_first);
+  rtx_insn *insn, *next;
   int seen = 0;
 
   /* Used for -dA dump.  */
@@ -2069,7 +2073,7 @@ get_insn_template (int code, rtx insn)
 
    The case fall-through in this function is intentional.  */
 static void
-output_alternate_entry_point (FILE *file, rtx insn)
+output_alternate_entry_point (FILE *file, rtx_insn *insn)
 {
   const char *name = LABEL_NAME (insn);
 
@@ -2096,7 +2100,7 @@ output_alternate_entry_point (FILE *file, rtx insn)
 
 /* Given a CALL_INSN, find and return the nested CALL. */
 static rtx
-call_from_call_insn (rtx insn)
+call_from_call_insn (rtx_call_insn *insn)
 {
   rtx x;
   gcc_assert (CALL_P (insn));
@@ -2134,14 +2138,16 @@ call_from_call_insn (rtx insn)
    debug information.  We force the emission of a line note after
    both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG.  */
 
-rtx
-final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
+rtx_insn *
+final_scan_insn (rtx uncast_insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 		 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
 {
 #ifdef HAVE_cc0
   rtx set;
 #endif
-  rtx next;
+  rtx_insn *next;
+
+  rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
 
   insn_counter++;
 
@@ -2343,7 +2349,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 	case NOTE_INSN_VAR_LOCATION:
 	case NOTE_INSN_CALL_ARG_LOCATION:
 	  if (!DECL_IGNORED_P (current_function_decl))
-	    debug_hooks->var_location (as_a <rtx_insn *> (insn));
+	    debug_hooks->var_location (insn);
 	  break;
 
 	default:
@@ -2633,7 +2639,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 	    for (i = 1; i < XVECLEN (body, 0); i++)
 	      {
 		rtx insn = XVECEXP (body, 0, i);
-		rtx next = NEXT_INSN (insn);
+		rtx_insn *next = NEXT_INSN (insn);
 		/* We loop in case any instruction in a delay slot gets
 		   split.  */
 		do
@@ -2842,12 +2848,12 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 
 	if (optimize_p && !flag_no_peephole && !nopeepholes)
 	  {
-	    rtx next = peephole (insn);
+	    rtx_insn *next = peephole (insn);
 	    /* When peepholing, if there were notes within the peephole,
 	       emit them before the peephole.  */
 	    if (next != 0 && next != NEXT_INSN (insn))
 	      {
-		rtx note, prev = PREV_INSN (insn);
+		rtx_insn *note, *prev = PREV_INSN (insn);
 
 		for (note = NEXT_INSN (insn); note != next;
 		     note = NEXT_INSN (note))
@@ -2927,7 +2933,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 	   needs to be reinserted.  */
 	if (templ == 0)
 	  {
-	    rtx prev;
+	    rtx_insn *prev;
 
 	    gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
 
@@ -2950,7 +2956,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 	   be split.  */
 	if (templ[0] == '#' && templ[1] == '\0')
 	  {
-	    rtx new_rtx = try_split (body, insn, 0);
+	    rtx_insn *new_rtx = try_split (body, insn, 0);
 
 	    /* If we didn't split the insn, go away.  */
 	    if (new_rtx == insn && PATTERN (new_rtx) == body)
@@ -2971,9 +2977,9 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 	    && targetm.asm_out.unwind_emit)
 	  targetm.asm_out.unwind_emit (asm_out_file, insn);
 
-	if (CALL_P (insn))
+	if (rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn))
 	  {
-	    rtx x = call_from_call_insn (insn);
+	    rtx x = call_from_call_insn (call_insn);
 	    x = XEXP (x, 0);
 	    if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
 	      {
@@ -2984,7 +2990,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
 		  assemble_external (t);
 	      }
 	    if (!DECL_IGNORED_P (current_function_decl))
-	      debug_hooks->var_location (as_a <rtx_insn *> (insn));
+	      debug_hooks->var_location (insn);
 	  }
 
 	/* Output assembler code from the template.  */
@@ -3011,7 +3017,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
    breakpoint location.  */
 
 static bool
-notice_source_line (rtx insn, bool *is_stmt)
+notice_source_line (rtx_insn *insn, bool *is_stmt)
 {
   const char *filename;
   int linenum;
@@ -4256,7 +4262,7 @@ asm_fprintf (FILE *file, const char *p, ...)
 int
 leaf_function_p (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   /* Some back-ends (e.g. s390) want leaf functions to stay leaf
      functions even if they call mcount.  */
@@ -4283,7 +4289,7 @@ leaf_function_p (void)
    output templates to customary add branch prediction hints.
  */
 int
-final_forward_branch_p (rtx insn)
+final_forward_branch_p (rtx_insn *insn)
 {
   int insn_id, label_id;
 
@@ -4333,9 +4339,9 @@ only_leaf_regs_used (void)
    available in leaf functions.  */
 
 static void
-leaf_renumber_regs (rtx first)
+leaf_renumber_regs (rtx_insn *first)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   /* Renumber only the actual patterns.
      The reg-notes can contain frame pointer refs,
@@ -4584,7 +4590,7 @@ make_pass_shorten_branches (gcc::context *ctxt)
 static unsigned int
 rest_of_clean_state (void)
 {
-  rtx insn, next;
+  rtx_insn *insn, *next;
   FILE *final_output = NULL;
   int save_unnumbered = flag_dump_unnumbered;
   int save_noaddr = flag_dump_noaddr;
@@ -4751,7 +4757,7 @@ make_pass_clean_state (gcc::context *ctxt)
 static void
 collect_fn_hard_reg_usage (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 #ifdef STACK_REGS
   int i;
 #endif
@@ -4800,7 +4806,7 @@ collect_fn_hard_reg_usage (void)
 /* Get the declaration of the function called by INSN.  */
 
 static tree
-get_call_fndecl (rtx insn)
+get_call_fndecl (rtx_insn *insn)
 {
   rtx note, datum;
 
@@ -4819,7 +4825,7 @@ get_call_fndecl (rtx insn)
    call targets that can be overwritten.  */
 
 static struct cgraph_rtl_info *
-get_call_cgraph_rtl_info (rtx insn)
+get_call_cgraph_rtl_info (rtx_insn *insn)
 {
   tree fndecl;
 
@@ -4838,9 +4844,10 @@ get_call_cgraph_rtl_info (rtx insn)
    in REG_SET.  Return DEFAULT_SET in REG_SET if not found.  */
 
 bool
-get_call_reg_set_usage (rtx insn, HARD_REG_SET *reg_set,
+get_call_reg_set_usage (rtx uncast_insn, HARD_REG_SET *reg_set,
 			HARD_REG_SET default_set)
 {
+  rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
   if (flag_use_caller_save)
     {
       struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn);
diff --git a/gcc/output.h b/gcc/output.h
index 53d575a..e4799cf 100644
--- a/gcc/output.h
+++ b/gcc/output.h
@@ -70,7 +70,7 @@ extern void final (rtx, FILE *, int);
 /* The final scan for one insn, INSN.  Args are same as in `final', except
    that INSN is the insn being scanned.  Value returned is the next insn to
    be scanned.  */
-extern rtx final_scan_insn (rtx, FILE *, int, int, int *);
+extern rtx_insn *final_scan_insn (rtx, FILE *, int, int, int *);
 
 /* Replace a SUBREG with a REG or a MEM, based on the thing it is a
    subreg of.  */
@@ -136,7 +136,7 @@ extern int leaf_function_p (void);
 /* Return 1 if branch is a forward branch.
    Uses insn_shuid array, so it works only in the final pass.  May be used by
    output templates to add branch prediction hints, for example.  */
-extern int final_forward_branch_p (rtx);
+extern int final_forward_branch_p (rtx_insn *);
 
 /* Return 1 if this function uses only the registers that can be
    safely renumbered.  */
@@ -321,7 +321,7 @@ extern const char *weak_global_object_name;
 extern rtx current_insn_predicate;
 
 /* Last insn processed by final_scan_insn.  */
-extern rtx current_output_insn;
+extern rtx_insn *current_output_insn;
 
 /* Nonzero while outputting an `asm' with operands.
    This means that inconsistencies are the user's fault, so don't die.
-- 
1.8.5.3

Re: [PATCH 075/236] final.c: Use rtx_insn (also touches output.c and config/arc/arc.c)

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> In particular, after this patch, the first param passed to the
> FINAL_PRESCAN_INSN macro is strengthened from rtx to rtx_insn *.
>
> gcc/
> 	* output.h (final_scan_insn): Strengthen return type from rtx to
> 	rtx_insn *.
> 	(final_forward_branch_p): Likewise for param.
> 	(current_output_insn): Likewise for this global.
>
> 	* final.c (rtx debug_insn): Likewise for this variable.
> 	(current_output_insn): Likewise.
> 	(get_attr_length_1): Rename param "insn" to "uncast_insn",
> 	adding "insn" back in as an rtx_insn * with a checked cast, so
> 	that macro ADJUST_INSN_LENGTH can be passed an rtx_insn * as the
> 	first param.
> 	(compute_alignments): Strengthen local "label" from rtx to
> 	rtx_insn *.
> 	(shorten_branches): Rename param from "first" to "uncast_first",
> 	introducing a new local rtx_insn * "first" using a checked cast to
> 	effectively strengthen "first" from rtx to rtx_insn * without
> 	affecting the type signature.  Strengthen locals "insn", "seq",
> 	"next", "label" from rtx to rtx_insn *.
> 	(change_scope): Strengthen param "orig_insn" and local "insn" from
> 	rtx to rtx_insn *.
> 	(final_start_function): Rename param from "first" to "uncast_first",
> 	introducing a new local rtx_insn * "first" using a checked cast to
> 	effectively strengthen "first" from rtx to rtx_insn * without
> 	affecting the type signature.  Strengthen local "insn" from rtx to
> 	rtx_insn *.
> 	(dump_basic_block_info): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(final): Rename param from "first" to "uncast_first",
> 	introducing a new local rtx_insn * "first" using a checked cast to
> 	effectively strengthen "first" from rtx to rtx_insn * without
> 	affecting the type signature.  Strengthen locals "insn", "next"
> 	from rtx to rtx_insn *.
> 	(output_alternate_entry_point): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(call_from_call_insn): Strengthen param "insn" from rtx to
> 	rtx_call_insn *.
> 	(final_scan_insn): Rename param from "insn" to "uncast_insn",
> 	introducing a new local rtx_insn * "insn" using a checked cast to
> 	effectively strengthen "insn" from rtx to rtx_insn * without
> 	affecting the type signature.  Strengthen return type and locals
> 	"next", "note", "prev", "new_rtx" from rtx to rtx_insn *.  Remove
> 	now-redundant checked cast to rtx_insn * from both invocations of
> 	debug_hooks->var_location.  Convert CALL_P into a dyn_cast,
> 	introducing a local "call_insn" for use when invoking
> 	call_from_call_insn.
> 	(notice_source_line): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(leaf_function_p): Likewise for local "insn".
> 	(final_forward_branch_p): Likewise.
> 	(leaf_renumber_regs): Likewise for param "first".
> 	(rest_of_clean_state): Likewise for locals "insn" and "next".
> 	(collect_fn_hard_reg_usage): Likewise for local "insn".
> 	(get_call_fndecl): Likewise for param "insn".
> 	(get_call_cgraph_rtl_info): Likewise.
> 	(get_call_reg_set_usage): Rename param from "insn" to "uncast_insn",
> 	introducing a new local rtx_insn * "insn" using a checked cast to
> 	effectively strengthen "insn" from rtx to rtx_insn * without
> 	affecting the type signature.
>
> 	* config/arc/arc.c (arc_final_prescan_insn): For now, add checked
> 	cast when assigning from param "insn" to current_output_insn.
> 	(arc_pad_return): Strengthen local "insn" from rtx to rtx_insn *
> 	so that we can assign it back to current_output_insn.
OK.  I didn't check all the uncast_XXX thingies, but at least some of 
them go away in later patches.   Presumably you verified the uncast_XXX 
thingies all go away in the end :-)

Patches #76-#91 are OK as well.

jeff

[PATCH 053/236] builtins.c: strengthen various rtx to rtx_insn * and other subclasses

[David Malcolm]

gcc/
	* builtins.c (expand_builtin_longjmp): Strengthen locals "insn"
	and "last" from rtx to rtx_insn *.
	(expand_builtin_nonlocal_goto): Likewise for local "insn".
	(expand_builtin_apply): Strengthen local "call_insn" from rtx to
	rtx_call_insn *.
	(expand_errno_check): Strengthen local "lab" from rtx to
	rtx_code_label *.
	(expand_builtin_mathfn): Strengthen local "insns" from rtx to
	rtx_insn *.
	(expand_builtin_mathfn_2): Likewise.
	(expand_builtin_mathfn_ternary): Likewise.
	(expand_builtin_mathfn_3): Likewise.
	(expand_builtin_interclass_mathfn): Likewise for local "last".
	(expand_builtin_int_roundingfn): Likewise for local "insns".
	(expand_builtin_int_roundingfn_2): Likewise.
	(expand_builtin_strlen): Likewise for local "before_strlen".
	(expand_builtin_strncmp): Likewise for local "seq".
	(expand_builtin_signbit): Likewise for local "last".
	(expand_builtin_atomic_compare_exchange): Strengthen local "label"
	from rtx to rtx_code_label *.
	(expand_stack_restore):  Strengthen local "prev" from rtx to
	rtx_insn *.
---
 gcc/builtins.c | 45 +++++++++++++++++++++++++++++----------------
 1 file changed, 29 insertions(+), 16 deletions(-)

diff --git a/gcc/builtins.c b/gcc/builtins.c
index 140d6ba..0443211 100644
--- a/gcc/builtins.c
+++ b/gcc/builtins.c
@@ -992,7 +992,8 @@ expand_builtin_setjmp_receiver (rtx receiver_label ATTRIBUTE_UNUSED)
 static void
 expand_builtin_longjmp (rtx buf_addr, rtx value)
 {
-  rtx fp, lab, stack, insn, last;
+  rtx fp, lab, stack;
+  rtx_insn *insn, *last;
   enum machine_mode sa_mode = STACK_SAVEAREA_MODE (SAVE_NONLOCAL);
 
   /* DRAP is needed for stack realign if longjmp is expanded to current
@@ -1136,7 +1137,8 @@ static rtx
 expand_builtin_nonlocal_goto (tree exp)
 {
   tree t_label, t_save_area;
-  rtx r_label, r_save_area, r_fp, r_sp, insn;
+  rtx r_label, r_save_area, r_fp, r_sp;
+  rtx_insn *insn;
 
   if (!validate_arglist (exp, POINTER_TYPE, POINTER_TYPE, VOID_TYPE))
     return NULL_RTX;
@@ -1600,7 +1602,8 @@ expand_builtin_apply (rtx function, rtx arguments, rtx argsize)
 {
   int size, align, regno;
   enum machine_mode mode;
-  rtx incoming_args, result, reg, dest, src, call_insn;
+  rtx incoming_args, result, reg, dest, src;
+  rtx_call_insn *call_insn;
   rtx old_stack_level = 0;
   rtx call_fusage = 0;
   rtx struct_value = targetm.calls.struct_value_rtx (cfun ? TREE_TYPE (cfun->decl) : 0, 0);
@@ -1995,7 +1998,7 @@ mathfn_built_in (tree type, enum built_in_function fn)
 static void
 expand_errno_check (tree exp, rtx target)
 {
-  rtx lab = gen_label_rtx ();
+  rtx_code_label *lab = gen_label_rtx ();
 
   /* Test the result; if it is NaN, set errno=EDOM because
      the argument was not in the domain.  */
@@ -2042,7 +2045,8 @@ static rtx
 expand_builtin_mathfn (tree exp, rtx target, rtx subtarget)
 {
   optab builtin_optab;
-  rtx op0, insns;
+  rtx op0;
+  rtx_insn *insns;
   tree fndecl = get_callee_fndecl (exp);
   enum machine_mode mode;
   bool errno_set = false;
@@ -2168,7 +2172,8 @@ static rtx
 expand_builtin_mathfn_2 (tree exp, rtx target, rtx subtarget)
 {
   optab builtin_optab;
-  rtx op0, op1, insns, result;
+  rtx op0, op1, result;
+  rtx_insn *insns;
   int op1_type = REAL_TYPE;
   tree fndecl = get_callee_fndecl (exp);
   tree arg0, arg1;
@@ -2277,7 +2282,8 @@ static rtx
 expand_builtin_mathfn_ternary (tree exp, rtx target, rtx subtarget)
 {
   optab builtin_optab;
-  rtx op0, op1, op2, insns, result;
+  rtx op0, op1, op2, result;
+  rtx_insn *insns;
   tree fndecl = get_callee_fndecl (exp);
   tree arg0, arg1, arg2;
   enum machine_mode mode;
@@ -2350,7 +2356,8 @@ static rtx
 expand_builtin_mathfn_3 (tree exp, rtx target, rtx subtarget)
 {
   optab builtin_optab;
-  rtx op0, insns;
+  rtx op0;
+  rtx_insn *insns;
   tree fndecl = get_callee_fndecl (exp);
   enum machine_mode mode;
   tree arg;
@@ -2509,7 +2516,7 @@ expand_builtin_interclass_mathfn (tree exp, rtx target)
   if (icode != CODE_FOR_nothing)
     {
       struct expand_operand ops[1];
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
       tree orig_arg = arg;
 
       /* Wrap the computation of the argument in a SAVE_EXPR, as we may
@@ -2727,7 +2734,8 @@ static rtx
 expand_builtin_int_roundingfn (tree exp, rtx target)
 {
   convert_optab builtin_optab;
-  rtx op0, insns, tmp;
+  rtx op0, tmp;
+  rtx_insn *insns;
   tree fndecl = get_callee_fndecl (exp);
   enum built_in_function fallback_fn;
   tree fallback_fndecl;
@@ -2863,7 +2871,8 @@ static rtx
 expand_builtin_int_roundingfn_2 (tree exp, rtx target)
 {
   convert_optab builtin_optab;
-  rtx op0, insns;
+  rtx op0;
+  rtx_insn *insns;
   tree fndecl = get_callee_fndecl (exp);
   tree arg;
   enum machine_mode mode;
@@ -3012,7 +3021,8 @@ expand_builtin_strlen (tree exp, rtx target,
       rtx pat;
       tree len;
       tree src = CALL_EXPR_ARG (exp, 0);
-      rtx src_reg, before_strlen;
+      rtx src_reg;
+      rtx_insn *before_strlen;
       enum machine_mode insn_mode = target_mode;
       enum insn_code icode = CODE_FOR_nothing;
       unsigned int align;
@@ -4183,7 +4193,8 @@ expand_builtin_strncmp (tree exp, ATTRIBUTE_UNUSED rtx target,
 rtx
 expand_builtin_saveregs (void)
 {
-  rtx val, seq;
+  rtx val;
+  rtx_insn *seq;
 
   /* Don't do __builtin_saveregs more than once in a function.
      Save the result of the first call and reuse it.  */
@@ -4898,7 +4909,7 @@ expand_builtin_signbit (tree exp, rtx target)
   icode = optab_handler (signbit_optab, fmode);
   if (icode != CODE_FOR_nothing)
     {
-      rtx last = get_last_insn ();
+      rtx_insn *last = get_last_insn ();
       target = gen_reg_rtx (TYPE_MODE (TREE_TYPE (exp)));
       if (maybe_emit_unop_insn (icode, target, temp, UNKNOWN))
 	return target;
@@ -5305,7 +5316,8 @@ static rtx
 expand_builtin_atomic_compare_exchange (enum machine_mode mode, tree exp, 
 					rtx target)
 {
-  rtx expect, desired, mem, oldval, label;
+  rtx expect, desired, mem, oldval;
+  rtx_code_label *label;
   enum memmodel success, failure;
   tree weak;
   bool is_weak;
@@ -5763,7 +5775,8 @@ expand_builtin_set_thread_pointer (tree exp)
 static void
 expand_stack_restore (tree var)
 {
-  rtx prev, sa = expand_normal (var);
+  rtx_insn *prev;
+  rtx sa = expand_normal (var);
 
   sa = convert_memory_address (Pmode, sa);
 
-- 
1.8.5.3

[PATCH 093/236] mode-switching.c: Use rtx_insn

[David Malcolm]

gcc/
	* mode-switching.c (struct seginfo): Strengthen field "insn_ptr"
	from rtx to rtx_insn *.
	(new_seginfo): Likewise for param "insn".
	(create_pre_exit): Likewise for locals "last_insn",
	"before_return_copy", "return_copy".
	(optimize_mode_switching): Likewise for locals "insn", "ins_pos",
	"mode_set".
---
 gcc/mode-switching.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/gcc/mode-switching.c b/gcc/mode-switching.c
index c06f113..4d590e2 100644
--- a/gcc/mode-switching.c
+++ b/gcc/mode-switching.c
@@ -70,7 +70,7 @@ along with GCC; see the file COPYING3.  If not see
 struct seginfo
 {
   int mode;
-  rtx insn_ptr;
+  rtx_insn *insn_ptr;
   int bbnum;
   struct seginfo *next;
   HARD_REG_SET regs_live;
@@ -88,7 +88,7 @@ static sbitmap *antic;
 static sbitmap *transp;
 static sbitmap *comp;
 
-static struct seginfo * new_seginfo (int, rtx, int, HARD_REG_SET);
+static struct seginfo * new_seginfo (int, rtx_insn *, int, HARD_REG_SET);
 static void add_seginfo (struct bb_info *, struct seginfo *);
 static void reg_dies (rtx, HARD_REG_SET *);
 static void reg_becomes_live (rtx, const_rtx, void *);
@@ -102,7 +102,7 @@ static void make_preds_opaque (basic_block, int);
    manner.  */
 
 static struct seginfo *
-new_seginfo (int mode, rtx insn, int bb, HARD_REG_SET regs_live)
+new_seginfo (int mode, rtx_insn *insn, int bb, HARD_REG_SET regs_live)
 {
   struct seginfo *ptr;
 
@@ -214,7 +214,8 @@ create_pre_exit (int n_entities, int *entity_map, const int *num_modes)
     if (eg->flags & EDGE_FALLTHRU)
       {
 	basic_block src_bb = eg->src;
-	rtx last_insn, ret_reg;
+	rtx_insn *last_insn;
+	rtx ret_reg;
 
 	gcc_assert (!pre_exit);
 	/* If this function returns a value at the end, we have to
@@ -231,11 +232,11 @@ create_pre_exit (int n_entities, int *entity_map, const int *num_modes)
 	    bool short_block = false;
 	    bool multi_reg_return = false;
 	    bool forced_late_switch = false;
-	    rtx before_return_copy;
+	    rtx_insn *before_return_copy;
 
 	    do
 	      {
-		rtx return_copy = PREV_INSN (last_insn);
+		rtx_insn *return_copy = PREV_INSN (last_insn);
 		rtx return_copy_pat, copy_reg;
 		int copy_start, copy_num;
 		int j;
@@ -452,7 +453,7 @@ create_pre_exit (int n_entities, int *entity_map, const int *num_modes)
 static int
 optimize_mode_switching (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   int e;
   basic_block bb;
   int need_commit = 0;
@@ -540,7 +541,7 @@ optimize_mode_switching (void)
 		break;
 	    if (e)
 	      {
-		rtx ins_pos = BB_HEAD (bb);
+		rtx_insn *ins_pos = BB_HEAD (bb);
 		if (LABEL_P (ins_pos))
 		  ins_pos = NEXT_INSN (ins_pos);
 		gcc_assert (NOTE_INSN_BASIC_BLOCK_P (ins_pos));
@@ -674,7 +675,7 @@ optimize_mode_switching (void)
 	      int mode;
 	      basic_block src_bb;
 	      HARD_REG_SET live_at_edge;
-	      rtx mode_set;
+	      rtx_insn *mode_set;
 
 	      eg->aux = 0;
 
@@ -734,7 +735,7 @@ optimize_mode_switching (void)
 	      next = ptr->next;
 	      if (ptr->mode != no_mode)
 		{
-		  rtx mode_set;
+		  rtx_insn *mode_set;
 
 		  rtl_profile_for_bb (bb);
 		  start_sequence ();
-- 
1.8.5.3

[PATCH 097/236] postreload-gcse.c: Use rtx_insn in various places

[David Malcolm]

gcc/
	* postreload-gcse.c (struct occr): Strengthen field "insn" from
	rtx to rtx_insn *.
	(struct unoccr): Likewise.
	(struct modifies_mem): Likewise.
	(alloc_mem): Likewise for local "insn".
	(insert_expr_in_table): Likewise for param "insn".
	(dump_expr_hash_table_entry): Likewise for local "insn".
	(oprs_unchanged_p): Likewise for param "insn".
	(load_killed_in_block_p): Likewise for local "setter".
	(record_last_reg_set_info): Likewise for param "insn".
	(record_last_reg_set_info_regno): Likewise.
	(record_last_mem_set_info): Likewise.
	(record_last_set_info): Likewise for local "last_set_insn".
	(record_opr_changes): Likewise for param "insn".
	(hash_scan_set): Likewise.
	(compute_hash_table): Likewise for local "insn".
	(get_avail_load_store_reg): Likewise for param "insn".
	(eliminate_partially_redundant_load): Likewise, also for locals
	"avail_insn", "next_pred_bb_end".  Replace use of NULL_RTX with
	RTX for insns.
	(eliminate_partially_redundant_loads): Likewise for local "insn".
---
 gcc/postreload-gcse.c | 62 +++++++++++++++++++++++++--------------------------
 1 file changed, 31 insertions(+), 31 deletions(-)

diff --git a/gcc/postreload-gcse.c b/gcc/postreload-gcse.c
index af2d731..73848b7 100644
--- a/gcc/postreload-gcse.c
+++ b/gcc/postreload-gcse.c
@@ -162,7 +162,7 @@ struct occr
   /* Next occurrence of this expression.  */
   struct occr *next;
   /* The insn that computes the expression.  */
-  rtx insn;
+  rtx_insn *insn;
   /* Nonzero if this [anticipatable] occurrence has been deleted.  */
   char deleted_p;
 };
@@ -175,7 +175,7 @@ struct unoccr
 {
   struct unoccr *next;
   edge pred;
-  rtx insn;
+  rtx_insn *insn;
 };
 
 static struct obstack unoccr_obstack;
@@ -194,7 +194,7 @@ static int *reg_avail_info;
 /* A list of insns that may modify memory within the current basic block.  */
 struct modifies_mem
 {
-  rtx insn;
+  rtx_insn *insn;
   struct modifies_mem *next;
 };
 static struct modifies_mem *modifies_mem_list;
@@ -218,12 +218,12 @@ static void alloc_mem (void);
 static void free_mem (void);
 
 /* Support for hash table construction and transformations.  */
-static bool oprs_unchanged_p (rtx, rtx, bool);
-static void record_last_reg_set_info (rtx, rtx);
-static void record_last_reg_set_info_regno (rtx, int);
-static void record_last_mem_set_info (rtx);
+static bool oprs_unchanged_p (rtx, rtx_insn *, bool);
+static void record_last_reg_set_info (rtx_insn *, rtx);
+static void record_last_reg_set_info_regno (rtx_insn *, int);
+static void record_last_mem_set_info (rtx_insn *);
 static void record_last_set_info (rtx, const_rtx, void *);
-static void record_opr_changes (rtx);
+static void record_opr_changes (rtx_insn *);
 
 static void find_mem_conflicts (rtx, const_rtx, void *);
 static int load_killed_in_block_p (int, rtx, bool);
@@ -231,7 +231,7 @@ static void reset_opr_set_tables (void);
 
 /* Hash table support.  */
 static hashval_t hash_expr (rtx, int *);
-static void insert_expr_in_table (rtx, rtx);
+static void insert_expr_in_table (rtx, rtx_insn *);
 static struct expr *lookup_expr_in_table (rtx);
 static void dump_hash_table (FILE *);
 
@@ -239,16 +239,16 @@ static void dump_hash_table (FILE *);
 static bool reg_killed_on_edge (rtx, edge);
 static bool reg_used_on_edge (rtx, edge);
 
-static rtx get_avail_load_store_reg (rtx);
+static rtx get_avail_load_store_reg (rtx_insn *);
 
 static bool bb_has_well_behaved_predecessors (basic_block);
 static struct occr* get_bb_avail_insn (basic_block, struct occr *);
-static void hash_scan_set (rtx);
+static void hash_scan_set (rtx_insn *);
 static void compute_hash_table (void);
 
 /* The work horses of this pass.  */
 static void eliminate_partially_redundant_load (basic_block,
-						rtx,
+						rtx_insn *,
 						struct expr *);
 static void eliminate_partially_redundant_loads (void);
 \f
@@ -261,7 +261,7 @@ alloc_mem (void)
 {
   int i;
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
 
   /* Find the largest UID and create a mapping from UIDs to CUIDs.  */
   uid_cuid = XCNEWVEC (int, get_max_uid () + 1);
@@ -322,7 +322,7 @@ free_mem (void)
    basic block.  */
 
 static void
-insert_expr_in_table (rtx x, rtx insn)
+insert_expr_in_table (rtx x, rtx_insn *insn)
 {
   int do_not_record_p;
   hashval_t hash;
@@ -443,7 +443,7 @@ dump_expr_hash_table_entry (expr **slot, FILE *file)
   occr = exprs->avail_occr;
   while (occr)
     {
-      rtx insn = occr->insn;
+      rtx_insn *insn = occr->insn;
       print_rtl_single (file, insn);
       fprintf (file, "\n");
       occr = occr->next;
@@ -491,7 +491,7 @@ reg_changed_after_insn_p (rtx x, int cuid)
    2) from INSN to the end of INSN's basic block if AFTER_INSN is true.  */
 
 static bool
-oprs_unchanged_p (rtx x, rtx insn, bool after_insn)
+oprs_unchanged_p (rtx x, rtx_insn *insn, bool after_insn)
 {
   int i, j;
   enum rtx_code code;
@@ -605,7 +605,7 @@ load_killed_in_block_p (int uid_limit, rtx x, bool after_insn)
 
   while (list_entry)
     {
-      rtx setter = list_entry->insn;
+      rtx_insn *setter = list_entry->insn;
 
       /* Ignore entries in the list that do not apply.  */
       if ((after_insn
@@ -641,7 +641,7 @@ load_killed_in_block_p (int uid_limit, rtx x, bool after_insn)
 /* Record register first/last/block set information for REGNO in INSN.  */
 
 static inline void
-record_last_reg_set_info (rtx insn, rtx reg)
+record_last_reg_set_info (rtx_insn *insn, rtx reg)
 {
   unsigned int regno, end_regno;
 
@@ -653,7 +653,7 @@ record_last_reg_set_info (rtx insn, rtx reg)
 }
 
 static inline void
-record_last_reg_set_info_regno (rtx insn, int regno)
+record_last_reg_set_info_regno (rtx_insn *insn, int regno)
 {
   reg_avail_info[regno] = INSN_CUID (insn);
 }
@@ -664,7 +664,7 @@ record_last_reg_set_info_regno (rtx insn, int regno)
    a CALL_INSN).  We merely need to record which insns modify memory.  */
 
 static void
-record_last_mem_set_info (rtx insn)
+record_last_mem_set_info (rtx_insn *insn)
 {
   struct modifies_mem *list_entry;
 
@@ -682,7 +682,7 @@ record_last_mem_set_info (rtx insn)
 static void
 record_last_set_info (rtx dest, const_rtx setter ATTRIBUTE_UNUSED, void *data)
 {
-  rtx last_set_insn = (rtx) data;
+  rtx_insn *last_set_insn = (rtx_insn *) data;
 
   if (GET_CODE (dest) == SUBREG)
     dest = SUBREG_REG (dest);
@@ -720,7 +720,7 @@ reset_opr_set_tables (void)
    This data is used by oprs_unchanged_p.  */
 
 static void
-record_opr_changes (rtx insn)
+record_opr_changes (rtx_insn *insn)
 {
   rtx note;
 
@@ -762,7 +762,7 @@ record_opr_changes (rtx insn)
    After reload we are interested in loads/stores only.  */
 
 static void
-hash_scan_set (rtx insn)
+hash_scan_set (rtx_insn *insn)
 {
   rtx pat = PATTERN (insn);
   rtx src = SET_SRC (pat);
@@ -830,7 +830,7 @@ compute_hash_table (void)
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       /* First pass over the instructions records information used to
 	 determine when registers and memory are last set.
@@ -888,7 +888,7 @@ reg_used_on_edge (rtx reg, edge e)
 /* Return the loaded/stored register of a load/store instruction.  */
 
 static rtx
-get_avail_load_store_reg (rtx insn)
+get_avail_load_store_reg (rtx_insn *insn)
 {
   if (REG_P (SET_DEST (PATTERN (insn))))
     /* A load.  */
@@ -953,11 +953,11 @@ get_bb_avail_insn (basic_block bb, struct occr *occr)
    a redundancy is also worth doing, assuming it is possible.  */
 
 static void
-eliminate_partially_redundant_load (basic_block bb, rtx insn,
+eliminate_partially_redundant_load (basic_block bb, rtx_insn *insn,
 				    struct expr *expr)
 {
   edge pred;
-  rtx avail_insn = NULL_RTX;
+  rtx_insn *avail_insn = NULL;
   rtx avail_reg;
   rtx dest, pat;
   struct occr *a_occr;
@@ -986,9 +986,9 @@ eliminate_partially_redundant_load (basic_block bb, rtx insn,
   /* Check potential for replacing load with copy for predecessors.  */
   FOR_EACH_EDGE (pred, ei, bb->preds)
     {
-      rtx next_pred_bb_end;
+      rtx_insn *next_pred_bb_end;
 
-      avail_insn = NULL_RTX;
+      avail_insn = NULL;
       avail_reg = NULL_RTX;
       pred_bb = pred->src;
       next_pred_bb_end = NEXT_INSN (BB_END (pred_bb));
@@ -1051,7 +1051,7 @@ eliminate_partially_redundant_load (basic_block bb, rtx insn,
 	  not_ok_count += pred->count;
 	  unoccr = (struct unoccr *) obstack_alloc (&unoccr_obstack,
 						    sizeof (struct unoccr));
-	  unoccr->insn = NULL_RTX;
+	  unoccr->insn = NULL;
 	  unoccr->pred = pred;
 	  unoccr->next = unavail_occrs;
 	  unavail_occrs = unoccr;
@@ -1153,7 +1153,7 @@ cleanup:
 static void
 eliminate_partially_redundant_loads (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   basic_block bb;
 
   /* Note we start at block 1.  */
-- 
1.8.5.3

[PATCH 183/236] Strengthen various insn emission functions

[David Malcolm]

gcc/
	* rtl.h (push_to_sequence): Strengthen param from rtx to
	rtx_insn *.
	(push_to_sequence2): Likewise for both params.
	(delete_insns_since): Likewise for param.
	(reorder_insns_nobb): Likewise for all three params.
	(set_new_first_and_last_insn): Likewise for both params.

	* emit-rtl.h (set_first_insn): Strengthen param "insn" from rtx to
	rtx_insn *.  Remove now-redundant cast.
	(set_last_insn): Likewise.

	* builtins.c (expand_builtin_return): Strengthen local
	"call_fusage" from rtx to rtx_insn *.
	* cfgrtl.c (create_basic_block_structure): Likewise for local
	"after".
	* emit-rtl.c (set_new_first_and_last_insn): Likewise for params
	"first", "last" and local "insn".
	(delete_insns_since): Likewise for param "from".
	(reorder_insns_nobb): Likewise for params "from", "to", "after"
	and local "x".
	(push_to_sequence): Likewise for param "first" and local "last".
	(push_to_sequence2): Likewise for params "first" and "last".
	* lra.c (emit_add3_insn): Likewise for local "last".
	(lra_emit_add): Likewise.
	* lra-constraints.c (process_address_1): Likewise for locals
	"insn", last".
	* modulo-sched.c (ps_first_note): Likewise for return type.
	* optabs.c (expand_binop_directly): Likewise for param "last".
---
 gcc/builtins.c        |  2 +-
 gcc/cfgrtl.c          |  2 +-
 gcc/emit-rtl.c        | 16 ++++++++--------
 gcc/emit-rtl.h        |  8 ++++----
 gcc/lra-constraints.c |  4 ++--
 gcc/lra.c             |  6 ++++--
 gcc/modulo-sched.c    |  2 +-
 gcc/optabs.c          |  2 +-
 gcc/rtl.h             | 10 +++++-----
 9 files changed, 27 insertions(+), 25 deletions(-)

diff --git a/gcc/builtins.c b/gcc/builtins.c
index 0443211..ba654b9 100644
--- a/gcc/builtins.c
+++ b/gcc/builtins.c
@@ -1770,7 +1770,7 @@ expand_builtin_return (rtx result)
   int size, align, regno;
   enum machine_mode mode;
   rtx reg;
-  rtx call_fusage = 0;
+  rtx_insn *call_fusage = 0;
 
   result = convert_memory_address (Pmode, result);
 
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index b20e871..ee55788 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -283,7 +283,7 @@ create_basic_block_structure (rtx_insn *head, rtx_insn *end, rtx_note *bb_note,
     {
       /* If we found an existing note, thread it back onto the chain.  */
 
-      rtx after;
+      rtx_insn *after;
 
       if (LABEL_P (head))
 	after = head;
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 64ae70f..0374a35 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -2483,9 +2483,9 @@ gen_label_rtx (void)
    Used for an inline-procedure after copying the insn chain.  */
 
 void
-set_new_first_and_last_insn (rtx first, rtx last)
+set_new_first_and_last_insn (rtx_insn *first, rtx_insn *last)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   set_first_insn (first);
   set_last_insn (last);
@@ -4152,7 +4152,7 @@ add_function_usage_to (rtx call_insn, rtx call_fusage)
    FROM becomes the new last instruction.  */
 
 void
-delete_insns_since (rtx from)
+delete_insns_since (rtx_insn *from)
 {
   if (from == 0)
     set_first_insn (0);
@@ -4172,10 +4172,10 @@ delete_insns_since (rtx from)
    called after delay-slot filling has been done.  */
 
 void
-reorder_insns_nobb (rtx from, rtx to, rtx after)
+reorder_insns_nobb (rtx_insn *from, rtx_insn *to, rtx_insn *after)
 {
 #ifdef ENABLE_CHECKING
-  rtx x;
+  rtx_insn *x;
   for (x = from; x != to; x = NEXT_INSN (x))
     gcc_assert (after != x);
   gcc_assert (after != to);
@@ -5296,9 +5296,9 @@ start_sequence (void)
    start_sequence for more information about how to use this function.  */
 
 void
-push_to_sequence (rtx first)
+push_to_sequence (rtx_insn *first)
 {
-  rtx last;
+  rtx_insn *last;
 
   start_sequence ();
 
@@ -5313,7 +5313,7 @@ push_to_sequence (rtx first)
    looping through the list.  */
 
 void
-push_to_sequence2 (rtx first, rtx last)
+push_to_sequence2 (rtx_insn *first, rtx_insn *last)
 {
   start_sequence ();
 
diff --git a/gcc/emit-rtl.h b/gcc/emit-rtl.h
index a7ecf1f..f339886 100644
--- a/gcc/emit-rtl.h
+++ b/gcc/emit-rtl.h
@@ -83,10 +83,10 @@ get_insns (void)
 /* Specify a new insn as the first in the chain.  */
 
 static inline void
-set_first_insn (rtx insn)
+set_first_insn (rtx_insn *insn)
 {
   gcc_checking_assert (!insn || !PREV_INSN (insn));
-  crtl->emit.x_first_insn = as_a_nullable <rtx_insn *> (insn);
+  crtl->emit.x_first_insn = insn;
 }
 
 /* Return the last insn emitted in current sequence or current function.  */
@@ -100,10 +100,10 @@ get_last_insn (void)
 /* Specify a new insn as the last in the chain.  */
 
 static inline void
-set_last_insn (rtx insn)
+set_last_insn (rtx_insn *insn)
 {
   gcc_checking_assert (!insn || !NEXT_INSN (insn));
-  crtl->emit.x_last_insn = as_a_nullable <rtx_insn *> (insn);
+  crtl->emit.x_last_insn = insn;
 }
 
 /* Return a number larger than any instruction's uid in this function.  */
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index d665a09..3f6e6ff 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -2873,8 +2873,8 @@ process_address_1 (int nop, rtx_insn **before, rtx_insn **after)
 	  new_reg = lra_create_new_reg (Pmode, NULL_RTX, cl, "addr");
 #ifdef HAVE_lo_sum
 	  {
-	    rtx insn;
-	    rtx last = get_last_insn ();
+	    rtx_insn *insn;
+	    rtx_insn *last = get_last_insn ();
 
 	    /* addr => lo_sum (new_base, addr), case (2) above.  */
 	    insn = emit_insn (gen_rtx_SET
diff --git a/gcc/lra.c b/gcc/lra.c
index a97ec77..627c60f 100644
--- a/gcc/lra.c
+++ b/gcc/lra.c
@@ -252,7 +252,8 @@ lra_delete_dead_insn (rtx_insn *insn)
 static rtx
 emit_add3_insn (rtx x, rtx y, rtx z)
 {
-  rtx insn, last;
+  rtx_insn *last;
+  rtx insn;
 
   last = get_last_insn ();
 
@@ -309,7 +310,8 @@ void
 lra_emit_add (rtx x, rtx y, rtx z)
 {
   int old;
-  rtx insn, last;
+  rtx insn;
+  rtx_insn *last;
   rtx a1, a2, base, index, disp, scale, index_scale;
   bool ok_p;
 
diff --git a/gcc/modulo-sched.c b/gcc/modulo-sched.c
index d413e7c..802848d 100644
--- a/gcc/modulo-sched.c
+++ b/gcc/modulo-sched.c
@@ -319,7 +319,7 @@ ps_rtl_insn (partial_schedule_ptr ps, int id)
    in the loop that was associated with ps_rtl_insn (PS, ID).
    If the instruction had some notes before it, this is the first
    of those notes.  */
-static rtx
+static rtx_insn *
 ps_first_note (partial_schedule_ptr ps, int id)
 {
   gcc_assert (id < ps->g->num_nodes);
diff --git a/gcc/optabs.c b/gcc/optabs.c
index f098616..bf8e438 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -1409,7 +1409,7 @@ static rtx
 expand_binop_directly (enum machine_mode mode, optab binoptab,
 		       rtx op0, rtx op1,
 		       rtx target, int unsignedp, enum optab_methods methods,
-		       rtx last)
+		       rtx_insn *last)
 {
   enum machine_mode from_mode = widened_mode (mode, op0, op1);
   enum insn_code icode = find_widening_optab_handler (binoptab, mode,
diff --git a/gcc/rtl.h b/gcc/rtl.h
index f982fd6..2c27b84 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2340,8 +2340,8 @@ extern rtx_insn *get_last_insn_anywhere (void);
 extern rtx get_first_nonnote_insn (void);
 extern rtx get_last_nonnote_insn (void);
 extern void start_sequence (void);
-extern void push_to_sequence (rtx);
-extern void push_to_sequence2 (rtx, rtx);
+extern void push_to_sequence (rtx_insn *);
+extern void push_to_sequence2 (rtx_insn *, rtx_insn *);
 extern void end_sequence (void);
 #if TARGET_SUPPORTS_WIDE_INT == 0
 extern double_int rtx_to_double_int (const_rtx);
@@ -3067,13 +3067,13 @@ extern int max_reg_num (void);
 extern int max_label_num (void);
 extern int get_first_label_num (void);
 extern void maybe_set_first_label_num (rtx);
-extern void delete_insns_since (rtx);
+extern void delete_insns_since (rtx_insn *);
 extern void mark_reg_pointer (rtx, int);
 extern void mark_user_reg (rtx);
 extern void reset_used_flags (rtx);
 extern void set_used_flags (rtx);
 extern void reorder_insns (rtx_insn *, rtx_insn *, rtx_insn *);
-extern void reorder_insns_nobb (rtx, rtx, rtx);
+extern void reorder_insns_nobb (rtx_insn *, rtx_insn *, rtx_insn *);
 extern int get_max_insn_count (void);
 extern int in_sequence_p (void);
 extern void init_emit (void);
@@ -3082,7 +3082,7 @@ extern void init_derived_machine_modes (void);
 extern void init_emit_once (void);
 extern void push_topmost_sequence (void);
 extern void pop_topmost_sequence (void);
-extern void set_new_first_and_last_insn (rtx, rtx);
+extern void set_new_first_and_last_insn (rtx_insn *, rtx_insn *);
 extern unsigned int unshare_all_rtl (void);
 extern void unshare_all_rtl_again (rtx_insn *);
 extern void unshare_all_rtl_in_chain (rtx);
-- 
1.8.5.3

[PATCH 105/236] reginfo.c: Use rtx_insn (also touches rtl.h)

[David Malcolm]

gcc/
	* rtl.h (reg_scan): Strengthen param "f" from rtx to rtx_insn *.
	* reginfo.c (reg_scan): Likewise, also for local "insn".
	(reg_scan_mark_refs): Likewise for param "insn".
	(init_subregs_of_mode): Likewise for local "insn".
---
 gcc/reginfo.c | 10 +++++-----
 gcc/rtl.h     |  2 +-
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/reginfo.c b/gcc/reginfo.c
index edb865e..ed92a41 100644
--- a/gcc/reginfo.c
+++ b/gcc/reginfo.c
@@ -1020,12 +1020,12 @@ setup_reg_classes (int regno,
    again just before loop.  It finds the first and last use of each
    pseudo-register.  */
 
-static void reg_scan_mark_refs (rtx, rtx);
+static void reg_scan_mark_refs (rtx, rtx_insn *);
 
 void
-reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
+reg_scan (rtx_insn *f, unsigned int nregs ATTRIBUTE_UNUSED)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   timevar_push (TV_REG_SCAN);
 
@@ -1046,7 +1046,7 @@ reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
    We should only record information for REGs with numbers
    greater than or equal to MIN_REGNO.  */
 static void
-reg_scan_mark_refs (rtx x, rtx insn)
+reg_scan_mark_refs (rtx x, rtx_insn *insn)
 {
   enum rtx_code code;
   rtx dest;
@@ -1257,7 +1257,7 @@ void
 init_subregs_of_mode (void)
 {
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
   bitmap_obstack srom_obstack;
   bitmap subregs_of_mode;
 
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 17da2be..4c1d20b 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3180,7 +3180,7 @@ extern void init_fake_stack_mems (void);
 extern void save_register_info (void);
 extern void init_reg_sets (void);
 extern void regclass (rtx, int);
-extern void reg_scan (rtx, unsigned int);
+extern void reg_scan (rtx_insn *, unsigned int);
 extern void fix_register (const char *, int, int);
 extern bool invalid_mode_change_p (unsigned int, enum reg_class);
 
-- 
1.8.5.3

[PATCH 152/236] config/tilegx: Use rtx_insn

[David Malcolm]

gcc/
	* config/tilegx/tilegx-protos.h (tilegx_output_cbranch_with_opcode):
	Strengthen param 1 from rtx to rtx_insn *.
	(tilegx_output_cbranch): Likewise.
	(tilegx_adjust_insn_length): Likewise.
	(tilegx_final_prescan_insn): Likewise for sole param.

	* config/tilegx/tilegx.c (tilegx_legitimize_tls_address): Likewise
	or local "last".
	(cbranch_predicted_p): Likewise for param "insn".
	(tilegx_output_simple_cbranch_with_opcode): Likewise.
	(tilegx_output_cbranch_with_opcode): Likewise.
	(tilegx_output_cbranch): Likewise.
	(frame_emit_load): Likewise for return type.
	(set_frame_related_p): Likewise for locals "seq", "insn".
	(emit_sp_adjust): Likewise for return type, and for local "insn".
	Introduce local "pat" for use in place of "insn" where the latter
	isn't an instruction.
	(tilegx_expand_epilogue): Strengthen locals "last_insn", "insn"
	from rtx to rtx_insn *.
	(tilegx_adjust_insn_length): Likewise for param "insn".
	(next_insn_to_bundle): Likewise for return type and params "r" and
	"end".
	(tilegx_gen_bundles): Likewise for locals "insn", "next", "prev",
	"end".
	(replace_insns): Likewise for params "old_insn", "new_insns".
	(replace_mov_pcrel_step1): Likewise for param "insn" and local
	"new_insns".
	(replace_mov_pcrel_step2): Likewise.
	(replace_mov_pcrel_step3): Likewise.
	(tilegx_fixup_pcrel_references): Likewise for locals "insn",
	"next_insn".
	(reorder_var_tracking_notes): Likewise for locals "insn", "next",
	"queue", "next_queue", "prev".
	(tilegx_output_mi_thunk): Likewise for local "insn".
	(tilegx_final_prescan_insn): Likewise for param "insn".
---
 gcc/config/tilegx/tilegx-protos.h |  8 ++---
 gcc/config/tilegx/tilegx.c        | 76 ++++++++++++++++++++-------------------
 2 files changed, 44 insertions(+), 40 deletions(-)

diff --git a/gcc/config/tilegx/tilegx-protos.h b/gcc/config/tilegx/tilegx-protos.h
index 0a9b461..a41cf4a 100644
--- a/gcc/config/tilegx/tilegx-protos.h
+++ b/gcc/config/tilegx/tilegx-protos.h
@@ -42,10 +42,10 @@ extern void tilegx_expand_umuldi3_highpart (rtx, rtx, rtx);
 extern bool tilegx_emit_setcc (rtx[], enum machine_mode);
 extern void tilegx_emit_conditional_branch (rtx[], enum machine_mode);
 extern rtx tilegx_emit_conditional_move (rtx);
-extern const char *tilegx_output_cbranch_with_opcode (rtx, rtx *,
+extern const char *tilegx_output_cbranch_with_opcode (rtx_insn *, rtx *,
 						      const char *,
 						      const char *, int);
-extern const char *tilegx_output_cbranch (rtx, rtx *, bool);
+extern const char *tilegx_output_cbranch (rtx_insn *, rtx *, bool);
 extern void tilegx_expand_tablejump (rtx, rtx);
 extern void tilegx_expand_builtin_vector_binop (rtx (*)(rtx, rtx, rtx),
 						enum machine_mode, rtx,
@@ -61,10 +61,10 @@ extern void tilegx_expand_epilogue (bool);
 extern int tilegx_initial_elimination_offset (int, int);
 extern rtx tilegx_return_addr (int, rtx);
 extern rtx tilegx_eh_return_handler_rtx (void);
-extern int tilegx_adjust_insn_length (rtx, int);
+extern int tilegx_adjust_insn_length (rtx_insn *, int);
 
 extern int tilegx_asm_preferred_eh_data_format (int, int);
-extern void tilegx_final_prescan_insn (rtx);
+extern void tilegx_final_prescan_insn (rtx_insn *);
 extern const char *tilegx_asm_output_opcode (FILE *, const char *);
 extern void tilegx_function_profiler (FILE *, int);
 
diff --git a/gcc/config/tilegx/tilegx.c b/gcc/config/tilegx/tilegx.c
index 7c251c7..be3e13e 100644
--- a/gcc/config/tilegx/tilegx.c
+++ b/gcc/config/tilegx/tilegx.c
@@ -1041,7 +1041,8 @@ tilegx_legitimize_tls_address (rtx addr)
 	}
       case TLS_MODEL_INITIAL_EXEC:
 	{
-	  rtx temp, temp2, temp3, got, last;
+	  rtx temp, temp2, temp3, got;
+	  rtx_insn *last;
 
 	  ret = gen_reg_rtx (Pmode);
 	  temp = gen_reg_rtx (Pmode);
@@ -1075,7 +1076,8 @@ tilegx_legitimize_tls_address (rtx addr)
 	}
       case TLS_MODEL_LOCAL_EXEC:
 	{
-	  rtx temp, temp2, last;
+	  rtx temp, temp2;
+	  rtx_insn *last;
 
 	  ret = gen_reg_rtx (Pmode);
 	  temp = gen_reg_rtx (Pmode);
@@ -2619,7 +2621,7 @@ tilegx_emit_conditional_move (rtx cmp)
 /* Return true if INSN is annotated with a REG_BR_PROB note that
    indicates it's a branch that's predicted taken.  */
 static bool
-cbranch_predicted_p (rtx insn)
+cbranch_predicted_p (rtx_insn *insn)
 {
   rtx x = find_reg_note (insn, REG_BR_PROB, 0);
 
@@ -2637,7 +2639,7 @@ cbranch_predicted_p (rtx insn)
 /* Output assembly code for a specific branch instruction, appending
    the branch prediction flag to the opcode if appropriate.  */
 static const char *
-tilegx_output_simple_cbranch_with_opcode (rtx insn, const char *opcode,
+tilegx_output_simple_cbranch_with_opcode (rtx_insn *insn, const char *opcode,
 					  int regop, bool reverse_predicted)
 {
   static char buf[64];
@@ -2651,7 +2653,7 @@ tilegx_output_simple_cbranch_with_opcode (rtx insn, const char *opcode,
 /* Output assembly code for a specific branch instruction, appending
    the branch prediction flag to the opcode if appropriate.  */
 const char *
-tilegx_output_cbranch_with_opcode (rtx insn, rtx *operands,
+tilegx_output_cbranch_with_opcode (rtx_insn *insn, rtx *operands,
 				   const char *opcode,
 				   const char *rev_opcode, int regop)
 {
@@ -2699,7 +2701,7 @@ tilegx_output_cbranch_with_opcode (rtx insn, rtx *operands,
 
 /* Output assembly code for a conditional branch instruction.  */
 const char *
-tilegx_output_cbranch (rtx insn, rtx *operands, bool reversed)
+tilegx_output_cbranch (rtx_insn *insn, rtx *operands, bool reversed)
 {
   enum rtx_code code = GET_CODE (operands[1]);
   const char *opcode;
@@ -3757,7 +3759,7 @@ frame_emit_store (int regno, int regno_note, rtx addr, rtx cfa,
 /* Emit a load in the stack frame to load REGNO from address ADDR.
    Add a REG_CFA_RESTORE note to CFA_RESTORES if CFA_RESTORES is
    non-null.  Return the emitted insn.  */
-static rtx
+static rtx_insn *
 frame_emit_load (int regno, rtx addr, rtx *cfa_restores)
 {
   rtx reg = gen_rtx_REG (DImode, regno);
@@ -3773,8 +3775,8 @@ frame_emit_load (int regno, rtx addr, rtx *cfa_restores)
 static rtx
 set_frame_related_p (void)
 {
-  rtx seq = get_insns ();
-  rtx insn;
+  rtx_insn *seq = get_insns ();
+  rtx_insn *insn;
 
   end_sequence ();
 
@@ -3810,14 +3812,15 @@ set_frame_related_p (void)
    large register and using 'add'.
 
    This happens after reload, so we need to expand it ourselves.  */
-static rtx
+static rtx_insn *
 emit_sp_adjust (int offset, int *next_scratch_regno, bool frame_related,
 		rtx reg_notes)
 {
   rtx to_add;
   rtx imm_rtx = GEN_INT (offset);
+  rtx pat;
+  rtx_insn *insn;
 
-  rtx insn;
   if (satisfies_constraint_J (imm_rtx))
     {
       /* We can add this using a single immediate add.  */
@@ -3832,11 +3835,11 @@ emit_sp_adjust (int offset, int *next_scratch_regno, bool frame_related,
 
   /* Actually adjust the stack pointer.  */
   if (TARGET_32BIT)
-    insn = gen_sp_adjust_32bit (stack_pointer_rtx, stack_pointer_rtx, to_add);
+    pat = gen_sp_adjust_32bit (stack_pointer_rtx, stack_pointer_rtx, to_add);
   else
-    insn = gen_sp_adjust (stack_pointer_rtx, stack_pointer_rtx, to_add);
+    pat = gen_sp_adjust (stack_pointer_rtx, stack_pointer_rtx, to_add);
 
-  insn = emit_insn (insn);
+  insn = emit_insn (pat);
   REG_NOTES (insn) = reg_notes;
 
   /* Describe what just happened in a way that dwarf understands.  */
@@ -4148,7 +4151,7 @@ tilegx_expand_epilogue (bool sibcall_p)
   rtx reg_save_addr[ROUND_ROBIN_SIZE] = {
     NULL_RTX, NULL_RTX, NULL_RTX, NULL_RTX
   };
-  rtx last_insn, insn;
+  rtx_insn *last_insn, *insn;
   unsigned int which_scratch;
   int offset, start_offset, regno;
   rtx cfa_restores = NULL_RTX;
@@ -4381,7 +4384,7 @@ tilegx_frame_pointer_required (void)
    by attributes in the machine-description file.  This is where we
    account for bundles.  */
 int
-tilegx_adjust_insn_length (rtx insn, int length)
+tilegx_adjust_insn_length (rtx_insn *insn, int length)
 {
   enum machine_mode mode = GET_MODE (insn);
 
@@ -4446,8 +4449,8 @@ tilegx_sched_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
 
 /* Skip over irrelevant NOTEs and such and look for the next insn we
    would consider bundling.  */
-static rtx
-next_insn_to_bundle (rtx r, rtx end)
+static rtx_insn *
+next_insn_to_bundle (rtx_insn *r, rtx_insn *end)
 {
   for (; r != end; r = NEXT_INSN (r))
     {
@@ -4457,7 +4460,7 @@ next_insn_to_bundle (rtx r, rtx end)
 	return r;
     }
 
-  return NULL_RTX;
+  return NULL;
 }
 
 
@@ -4470,10 +4473,10 @@ tilegx_gen_bundles (void)
   basic_block bb;
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn, next, prev;
-      rtx end = NEXT_INSN (BB_END (bb));
+      rtx_insn *insn, *next, *prev;
+      rtx_insn *end = NEXT_INSN (BB_END (bb));
 
-      prev = NULL_RTX;
+      prev = NULL;
       for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn;
 	   prev = insn, insn = next)
 	{
@@ -4519,7 +4522,7 @@ tilegx_gen_bundles (void)
 
 /* Replace OLD_INSN with NEW_INSN.  */
 static void
-replace_insns (rtx old_insn, rtx new_insns)
+replace_insns (rtx_insn *old_insn, rtx_insn *new_insns)
 {
   if (new_insns)
     emit_insn_before (new_insns, old_insn);
@@ -4549,12 +4552,12 @@ match_pcrel_step1 (rtx insn)
 
 /* Do the first replacement step in tilegx_fixup_pcrel_references.  */
 static void
-replace_mov_pcrel_step1 (rtx insn)
+replace_mov_pcrel_step1 (rtx_insn *insn)
 {
   rtx pattern = PATTERN (insn);
   rtx unspec;
   rtx opnds[2];
-  rtx new_insns;
+  rtx_insn *new_insns;
 
   gcc_assert (GET_CODE (pattern) == SET);
   opnds[0] = SET_DEST (pattern);
@@ -4617,13 +4620,13 @@ match_pcrel_step2 (rtx insn)
 
 /* Do the second replacement step in tilegx_fixup_pcrel_references.  */
 static void
-replace_mov_pcrel_step2 (rtx insn)
+replace_mov_pcrel_step2 (rtx_insn *insn)
 {
   rtx pattern = PATTERN (insn);
   rtx unspec;
   rtx addr;
   rtx opnds[3];
-  rtx new_insns;
+  rtx_insn *new_insns;
   rtx got_rtx = tilegx_got_rtx ();
 
   gcc_assert (GET_CODE (pattern) == SET);
@@ -4674,12 +4677,12 @@ replace_mov_pcrel_step2 (rtx insn)
 
 /* Do the third replacement step in tilegx_fixup_pcrel_references.  */
 static void
-replace_mov_pcrel_step3 (rtx insn)
+replace_mov_pcrel_step3 (rtx_insn *insn)
 {
   rtx pattern = PATTERN (insn);
   rtx unspec;
   rtx opnds[4];
-  rtx new_insns;
+  rtx_insn *new_insns;
   rtx got_rtx = tilegx_got_rtx ();
   rtx text_label_rtx = tilegx_text_label_rtx ();
 
@@ -4759,7 +4762,7 @@ replace_mov_pcrel_step3 (rtx insn)
 static void
 tilegx_fixup_pcrel_references (void)
 {
-  rtx insn, next_insn;
+  rtx_insn *insn, *next_insn;
   bool same_section_as_entry = true;
 
   for (insn = get_insns (); insn; insn = next_insn)
@@ -4810,8 +4813,8 @@ reorder_var_tracking_notes (void)
   basic_block bb;
   FOR_EACH_BB_FN (bb, cfun)
   {
-    rtx insn, next;
-    rtx queue = NULL_RTX;
+    rtx_insn *insn, *next;
+    rtx_insn *queue = NULL;
     bool in_bundle = false;
 
     for (insn = BB_HEAD (bb); insn != BB_END (bb); insn = next)
@@ -4826,7 +4829,7 @@ reorder_var_tracking_notes (void)
 	      {
 		while (queue)
 		  {
-		    rtx next_queue = PREV_INSN (queue);
+		    rtx_insn *next_queue = PREV_INSN (queue);
 		    SET_PREV_INSN (NEXT_INSN (insn)) = queue;
 		    SET_NEXT_INSN (queue) = NEXT_INSN (insn);
 		    SET_NEXT_INSN (insn) = queue;
@@ -4842,7 +4845,7 @@ reorder_var_tracking_notes (void)
 	  {
 	    if (in_bundle)
 	      {
-		rtx prev = PREV_INSN (insn);
+		rtx_insn *prev = PREV_INSN (insn);
 		SET_PREV_INSN (next) = prev;
 		SET_NEXT_INSN (prev) = next;
 
@@ -4916,7 +4919,8 @@ tilegx_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
 			HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
 			tree function)
 {
-  rtx this_rtx, insn, funexp, addend;
+  rtx this_rtx, funexp, addend;
+  rtx_insn *insn;
 
   /* Pretend to be a post-reload pass while generating rtl.  */
   reload_completed = 1;
@@ -5462,7 +5466,7 @@ static enum machine_mode insn_mode;
 
 /* Implement FINAL_PRESCAN_INSN.  This is used to emit bundles.  */
 void
-tilegx_final_prescan_insn (rtx insn)
+tilegx_final_prescan_insn (rtx_insn *insn)
 {
   /* Record this for tilegx_asm_output_opcode to examine.  */
   insn_mode = GET_MODE (insn);
-- 
1.8.5.3

[PATCH 060/236] cfgrtl.c: Use rtx subclasses

[David Malcolm]

gcc/
	* cfgrtl.c (can_delete_note_p): Require a const rtx_note * rather
	than a const_rtx.
	(can_delete_label_p): Require a const rtx_code_label * rather than
	a const_rtx.
	(delete_insn): Add checked cast to rtx_code_label * when we know
	we're dealing with LABEL_P (insn).  Strengthen local "bb_note" from
	rtx to rtx_insn *.
	(delete_insn_chain): Strengthen locals "prev" and "current" from
	rtx to rtx_insn *.  Add a checked cast when assigning from
	"finish" (strengthening the params will come later).  Add a
	checked cast to rtx_note * in region where we know
	NOTE_P (current).
	(rtl_delete_block): Strengthen locals "insn" and "end" from rtx to
	rtx_insn *.
	(compute_bb_for_insn): Likewise.
	(free_bb_for_insn): Likewise for local "insn".
	(compute_bb_for_insn): Likewise.
	(update_bb_for_insn_chain): Strengthen params "begin", "end" and
	local "insn" from rtx to rtx_insn *
	(flow_active_insn_p): Require a const rtx_insn * rather than a
	const_rtx.
	(contains_no_active_insn_p): Strengthen local "insn" from rtx to
	rtx_insn *.
	(can_fallthru): Likewise for locals "insn" and "insn2".
	(bb_note): Likewise for local "note".
	(first_insn_after_basic_block_note): Likewise for local "note" and
	for return type.
	(rtl_split_block): Likewise for locals "insn" and "next".
	(unique_locus_on_edge_between_p): Likewise for locals "insn" and
	"end".
	(rtl_merge_blocks): Likewise for locals "b_head", "b_end",
	"a_end", "del_first", "del_last", "b_debug_start", "b_debug_end",
	"prev", "tmp".
	(try_redirect_by_replacing_jump): Likewise for locals "insn" (both of
	them), "kill_from", "barrier", "new_insn".
	(patch_jump_insn): Likewise for params "insn", "old_label".
	(redirect_branch_edge): Likewise for locals "old_label", "insn".
	(force_nonfallthru_and_redirect): Likewise for locals "insn",
	"old_label", "new_label".
	(rtl_tidy_fallthru_edge): Likewise for local "q".
	(rtl_split_edge): Likewise for locals "before", "last".
	(commit_one_edge_insertion): Likewise for locals "before",
	"after", "insns", "tmp", "last", adding a checked cast where
	currently necessary.
	(commit_edge_insertions): Likewise.
	(rtl_dump_bb): Likewise for locals "insn", "last".
	(print_rtl_with_bb): Likewise for local "x".
	(rtl_verify_bb_insns): Likewise for local "x".
	(rtl_verify_bb_pointers): Likewise for local "insn".
	(rtl_verify_bb_insn_chain): Likewise for locals "x", "last_head",
	"head", "end".
	(rtl_verify_fallthru): Likewise for local "insn".
	(rtl_verify_bb_layout): Likewise for locals "x" and "rtx_first".
	(purge_dead_edges): Likewise for local "insn".
	(fixup_abnormal_edges): Likewise for locals "insn", "stop", "next".
	(skip_insns_after_block): Likewise for return type and for locals
	"insn", "last_insn", "next_head", "prev".
	(record_effective_endpoints): Likewise for locals "next_insn",
	"insn", "end".
	(fixup_reorder_chain): Likewise for locals "bb_end_insn" and "end".
	(verify_insn_chain): Likewise for locals "x", "prevx", "nextx".
	(cfg_layout_can_duplicate_bb_p): Likewise for local "insn".
	(duplicate_insn_chain): For now, add checked cast from rtx to
	rtx_insn * when returning insn.
	(cfg_layout_duplicate_bb): Likewise for local "insn".
	(cfg_layout_delete_block): Likewise for locals "insn", "next",
	"prev", "remaints".
	(cfg_layout_merge_blocks): Likewise for local "insn", "last".
	(rtl_block_empty_p): Likewise.
	(rtl_split_block_before_cond_jump): Likewise for locals "insn",
	"split_point", "last".
	(rtl_block_ends_with_call_p): Likewise for local "insn".
	(need_fake_edge_p): Strengthen param "insn" from const_rtx to
	const rtx_insn *.
	(rtl_flow_call_edges_add): Strengthen locals "insn", "prev_insn",
	"split_at_insn" from rtx to rtx_insn *.
	(rtl_lv_add_condition_to_bb): Likewise for locals "seq", "jump".
	(rtl_can_remove_branch_p): Strengthen local "insn" from const_rtx
	to const rtx_insn *.
	(rtl_account_profile_record): Likewise.
---
 gcc/cfgrtl.c | 192 ++++++++++++++++++++++++++++++-----------------------------
 1 file changed, 99 insertions(+), 93 deletions(-)

diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index e3bad95..612eca7 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -67,15 +67,15 @@ along with GCC; see the file COPYING3.  If not see
 static GTY(()) rtx cfg_layout_function_footer;
 static GTY(()) rtx cfg_layout_function_header;
 
-static rtx skip_insns_after_block (basic_block);
+static rtx_insn *skip_insns_after_block (basic_block);
 static void record_effective_endpoints (void);
 static rtx label_for_bb (basic_block);
 static void fixup_reorder_chain (void);
 
 void verify_insn_chain (void);
 static void fixup_fallthru_exit_predecessor (void);
-static int can_delete_note_p (const_rtx);
-static int can_delete_label_p (const_rtx);
+static int can_delete_note_p (const rtx_note *);
+static int can_delete_label_p (const rtx_code_label *);
 static basic_block rtl_split_edge (edge);
 static bool rtl_move_block_after (basic_block, basic_block);
 static int rtl_verify_flow_info (void);
@@ -95,7 +95,7 @@ static void rtl_make_forwarder_block (edge);
    so that we may simply delete it.  */
 
 static int
-can_delete_note_p (const_rtx note)
+can_delete_note_p (const rtx_note *note)
 {
   switch (NOTE_KIND (note))
     {
@@ -112,7 +112,7 @@ can_delete_note_p (const_rtx note)
 /* True if a given label can be deleted.  */
 
 static int
-can_delete_label_p (const_rtx label)
+can_delete_label_p (const rtx_code_label *label)
 {
   return (!LABEL_PRESERVE_P (label)
 	  /* User declared labels must be preserved.  */
@@ -133,11 +133,11 @@ delete_insn (rtx insn)
       /* Some labels can't be directly removed from the INSN chain, as they
 	 might be references via variables, constant pool etc.
 	 Convert them to the special NOTE_INSN_DELETED_LABEL note.  */
-      if (! can_delete_label_p (insn))
+      if (! can_delete_label_p (as_a <rtx_code_label *> (insn)))
 	{
 	  const char *name = LABEL_NAME (insn);
 	  basic_block bb = BLOCK_FOR_INSN (insn);
-	  rtx bb_note = NEXT_INSN (insn);
+	  rtx_insn *bb_note = NEXT_INSN (insn);
 
 	  really_delete = false;
 	  PUT_CODE (insn, NOTE);
@@ -240,16 +240,16 @@ delete_insn_and_edges (rtx insn)
 void
 delete_insn_chain (rtx start, rtx finish, bool clear_bb)
 {
-  rtx prev, current;
+  rtx_insn *prev, *current;
 
   /* Unchain the insns one by one.  It would be quicker to delete all of these
      with a single unchaining, rather than one at a time, but we need to keep
      the NOTE's.  */
-  current = finish;
+  current = as_a_nullable <rtx_insn *> (finish);
   while (1)
     {
       prev = PREV_INSN (current);
-      if (NOTE_P (current) && !can_delete_note_p (current))
+      if (NOTE_P (current) && !can_delete_note_p (as_a <rtx_note *> (current)))
 	;
       else
 	delete_insn (current);
@@ -391,7 +391,7 @@ cfg_layout_create_basic_block (void *head, void *end, basic_block after)
 static void
 rtl_delete_block (basic_block b)
 {
-  rtx insn, end;
+  rtx_insn *insn, *end;
 
   /* If the head of this block is a CODE_LABEL, then it might be the
      label for an exception handler which can't be reached.  We need
@@ -419,8 +419,8 @@ compute_bb_for_insn (void)
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx end = BB_END (bb);
-      rtx insn;
+      rtx_insn *end = BB_END (bb);
+      rtx_insn *insn;
 
       for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn))
 	{
@@ -436,7 +436,7 @@ compute_bb_for_insn (void)
 unsigned int
 free_bb_for_insn (void)
 {
-  rtx insn;
+  rtx_insn *insn;
   for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     if (!BARRIER_P (insn))
       BLOCK_FOR_INSN (insn) = NULL;
@@ -526,9 +526,9 @@ emit_insn_at_entry (rtx insn)
    (i.e. both BEGIN and END will be updated. */
 
 static void
-update_bb_for_insn_chain (rtx begin, rtx end, basic_block bb)
+update_bb_for_insn_chain (rtx_insn *begin, rtx_insn *end, basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   end = NEXT_INSN (end);
   for (insn = begin; insn != end; insn = NEXT_INSN (insn))
@@ -550,7 +550,7 @@ update_bb_for_insn (basic_block bb)
    even after reload.  */
 
 static bool
-flow_active_insn_p (const_rtx insn)
+flow_active_insn_p (const rtx_insn *insn)
 {
   if (active_insn_p (insn))
     return true;
@@ -574,7 +574,7 @@ flow_active_insn_p (const_rtx insn)
 bool
 contains_no_active_insn_p (const_basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun) || bb == ENTRY_BLOCK_PTR_FOR_FN (cfun)
       || !single_succ_p (bb))
@@ -618,8 +618,8 @@ forwarder_block_p (const_basic_block bb)
 bool
 can_fallthru (basic_block src, basic_block target)
 {
-  rtx insn = BB_END (src);
-  rtx insn2;
+  rtx_insn *insn = BB_END (src);
+  rtx_insn *insn2;
   edge e;
   edge_iterator ei;
 
@@ -666,7 +666,7 @@ could_fall_through (basic_block src, basic_block target)
 rtx_note *
 bb_note (basic_block bb)
 {
-  rtx note;
+  rtx_insn *note;
 
   note = BB_HEAD (bb);
   if (LABEL_P (note))
@@ -679,16 +679,16 @@ bb_note (basic_block bb)
 /* Return the INSN immediately following the NOTE_INSN_BASIC_BLOCK
    note associated with the BLOCK.  */
 
-static rtx
+static rtx_insn *
 first_insn_after_basic_block_note (basic_block block)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   /* Get the first instruction in the block.  */
   insn = BB_HEAD (block);
 
   if (insn == NULL_RTX)
-    return NULL_RTX;
+    return NULL;
   if (LABEL_P (insn))
     insn = NEXT_INSN (insn);
   gcc_assert (NOTE_INSN_BASIC_BLOCK_P (insn));
@@ -703,7 +703,7 @@ static basic_block
 rtl_split_block (basic_block bb, void *insnp)
 {
   basic_block new_bb;
-  rtx insn = (rtx) insnp;
+  rtx_insn *insn = (rtx_insn *) insnp;
   edge e;
   edge_iterator ei;
 
@@ -713,7 +713,7 @@ rtl_split_block (basic_block bb, void *insnp)
 
       if (insn)
 	{
-	  rtx next = insn;
+	  rtx_insn *next = insn;
 
 	  insn = PREV_INSN (insn);
 
@@ -765,7 +765,7 @@ static bool
 unique_locus_on_edge_between_p (basic_block a, basic_block b)
 {
   const location_t goto_locus = EDGE_SUCC (a, 0)->goto_locus;
-  rtx insn, end;
+  rtx_insn *insn, *end;
 
   if (LOCATION_LOCUS (goto_locus) == UNKNOWN_LOCATION)
     return false;
@@ -814,9 +814,9 @@ emit_nop_for_unique_locus_between (basic_block a, basic_block b)
 static void
 rtl_merge_blocks (basic_block a, basic_block b)
 {
-  rtx b_head = BB_HEAD (b), b_end = BB_END (b), a_end = BB_END (a);
-  rtx del_first = NULL_RTX, del_last = NULL_RTX;
-  rtx b_debug_start = b_end, b_debug_end = b_end;
+  rtx_insn *b_head = BB_HEAD (b), *b_end = BB_END (b), *a_end = BB_END (a);
+  rtx_insn *del_first = NULL, *del_last = NULL;
+  rtx_insn *b_debug_start = b_end, *b_debug_end = b_end;
   bool forwarder_p = (b->flags & BB_FORWARDER_BLOCK) != 0;
   int b_empty = 0;
 
@@ -855,7 +855,7 @@ rtl_merge_blocks (basic_block a, basic_block b)
   /* If there was a jump out of A, delete it.  */
   if (JUMP_P (a_end))
     {
-      rtx prev;
+      rtx_insn *prev;
 
       for (prev = PREV_INSN (a_end); ; prev = PREV_INSN (prev))
 	if (!NOTE_P (prev)
@@ -870,7 +870,7 @@ rtl_merge_blocks (basic_block a, basic_block b)
 	 the insn that set cc0.  */
       if (only_sets_cc0_p (prev))
 	{
-	  rtx tmp = prev;
+	  rtx_insn *tmp = prev;
 
 	  prev = prev_nonnote_insn (prev);
 	  if (!prev)
@@ -996,7 +996,7 @@ edge
 try_redirect_by_replacing_jump (edge e, basic_block target, bool in_cfglayout)
 {
   basic_block src = e->src;
-  rtx insn = BB_END (src), kill_from;
+  rtx_insn *insn = BB_END (src), *kill_from;
   rtx set;
   int fallthru = 0;
 
@@ -1052,7 +1052,7 @@ try_redirect_by_replacing_jump (edge e, basic_block target, bool in_cfglayout)
       /* Selectively unlink whole insn chain.  */
       if (in_cfglayout)
 	{
-	  rtx insn = BB_FOOTER (src);
+	  rtx_insn *insn = BB_FOOTER (src);
 
 	  delete_insn_chain (kill_from, BB_END (src), false);
 
@@ -1101,7 +1101,8 @@ try_redirect_by_replacing_jump (edge e, basic_block target, bool in_cfglayout)
   else
     {
       rtx target_label = block_label (target);
-      rtx barrier, label;
+      rtx_insn *barrier;
+      rtx label;
       rtx_jump_table_data *table;
 
       emit_jump_insn_after_noloc (gen_jump (target_label), insn);
@@ -1130,7 +1131,7 @@ try_redirect_by_replacing_jump (edge e, basic_block target, bool in_cfglayout)
 	      /* Move the jump before barrier so that the notes
 		 which originally were or were created before jump table are
 		 inside the basic block.  */
-	      rtx new_insn = BB_END (src);
+	      rtx_insn *new_insn = BB_END (src);
 
 	      update_bb_for_insn_chain (NEXT_INSN (BB_END (src)),
 				        PREV_INSN (barrier), src);
@@ -1173,7 +1174,7 @@ try_redirect_by_replacing_jump (edge e, basic_block target, bool in_cfglayout)
    doesn't work.  */
 
 static bool
-patch_jump_insn (rtx insn, rtx old_label, basic_block new_bb)
+patch_jump_insn (rtx_insn *insn, rtx_insn *old_label, basic_block new_bb)
 {
   rtx_jump_table_data *table;
   rtx tmp;
@@ -1288,9 +1289,9 @@ patch_jump_insn (rtx insn, rtx old_label, basic_block new_bb)
 static edge
 redirect_branch_edge (edge e, basic_block target)
 {
-  rtx old_label = BB_HEAD (e->dest);
+  rtx_insn *old_label = BB_HEAD (e->dest);
   basic_block src = e->src;
-  rtx insn = BB_END (src);
+  rtx_insn *insn = BB_END (src);
 
   /* We can only redirect non-fallthru edges of jump insn.  */
   if (e->flags & EDGE_FALLTHRU)
@@ -1576,9 +1577,10 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
 	}
       if (adjust_jump_target)
 	{
-	  rtx insn = BB_END (e->src), note;
-	  rtx old_label = BB_HEAD (e->dest);
-	  rtx new_label = BB_HEAD (target);
+	  rtx_insn *insn = BB_END (e->src);
+	  rtx note;
+	  rtx_insn *old_label = BB_HEAD (e->dest);
+	  rtx_insn *new_label = BB_HEAD (target);
 
 	  if (JUMP_LABEL (insn) == old_label)
 	    {
@@ -1736,7 +1738,7 @@ rtl_redirect_edge_and_branch_force (edge e, basic_block target)
 static void
 rtl_tidy_fallthru_edge (edge e)
 {
-  rtx q;
+  rtx_insn *q;
   basic_block b = e->src, c = b->next_bb;
 
   /* ??? In a late-running flow pass, other folks may have deleted basic
@@ -1814,7 +1816,7 @@ static basic_block
 rtl_split_edge (edge edge_in)
 {
   basic_block bb, new_bb;
-  rtx before;
+  rtx_insn *before;
 
   /* Abnormal edges cannot be split.  */
   gcc_assert (!(edge_in->flags & EDGE_ABNORMAL));
@@ -1833,7 +1835,7 @@ rtl_split_edge (edge edge_in)
   if (edge_in->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
     before = BB_HEAD (edge_in->dest);
   else
-    before = NULL_RTX;
+    before = NULL;
 
   /* If this is a fall through edge to the exit block, the blocks might be
      not adjacent, and the right place is after the source.  */
@@ -1904,7 +1906,7 @@ rtl_split_edge (edge edge_in)
 	  /* For asm goto even splitting of fallthru edge might
 	     need insn patching, as other labels might point to the
 	     old label.  */
-	  rtx last = BB_END (edge_in->src);
+	  rtx_insn *last = BB_END (edge_in->src);
 	  if (last
 	      && JUMP_P (last)
 	      && edge_in->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
@@ -1945,11 +1947,11 @@ insert_insn_on_edge (rtx pattern, edge e)
 void
 commit_one_edge_insertion (edge e)
 {
-  rtx before = NULL_RTX, after = NULL_RTX, insns, tmp, last;
+  rtx_insn *before = NULL, *after = NULL, *insns, *tmp, *last;
   basic_block bb;
 
   /* Pull the insns off the edge now since the edge might go away.  */
-  insns = e->insns.r;
+  insns = as_a_nullable <rtx_insn *> (e->insns.r);
   e->insns.r = NULL_RTX;
 
   /* Figure out where to put these insns.  If the destination has
@@ -2088,8 +2090,8 @@ commit_edge_insertions (void)
 static void
 rtl_dump_bb (FILE *outf, basic_block bb, int indent, int flags)
 {
-  rtx insn;
-  rtx last;
+  rtx_insn *insn;
+  rtx_insn *last;
   char *s_indent;
 
   s_indent = (char *) alloca ((size_t) indent + 1);
@@ -2156,7 +2158,7 @@ print_rtl_with_bb (FILE *outf, const_rtx rtx_first, int flags)
 	{
 	  FOR_EACH_BB_REVERSE_FN (bb, cfun)
 	    {
-	      rtx x;
+	      rtx_insn *x;
 
 	      start[INSN_UID (BB_HEAD (bb))] = bb;
 	      end[INSN_UID (BB_END (bb))] = bb;
@@ -2584,7 +2586,7 @@ rtl_verify_edges (void)
 static int
 rtl_verify_bb_insns (void)
 {
-  rtx x;
+  rtx_insn *x;
   int err = 0;
   basic_block bb;
 
@@ -2653,7 +2655,7 @@ rtl_verify_bb_pointers (void)
   /* Check the general integrity of the basic blocks.  */
   FOR_EACH_BB_REVERSE_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       if (!(bb->flags & BB_RTL))
 	{
@@ -2734,8 +2736,8 @@ rtl_verify_bb_insn_chain (void)
 {
   basic_block bb;
   int err = 0;
-  rtx x;
-  rtx last_head = get_last_insn ();
+  rtx_insn *x;
+  rtx_insn *last_head = get_last_insn ();
   basic_block *bb_info;
   const int max_uid = get_max_uid ();
 
@@ -2743,8 +2745,8 @@ rtl_verify_bb_insn_chain (void)
 
   FOR_EACH_BB_REVERSE_FN (bb, cfun)
     {
-      rtx head = BB_HEAD (bb);
-      rtx end = BB_END (bb);
+      rtx_insn *head = BB_HEAD (bb);
+      rtx_insn *end = BB_END (bb);
 
       for (x = last_head; x != NULL_RTX; x = PREV_INSN (x))
 	{
@@ -2830,7 +2832,7 @@ rtl_verify_fallthru (void)
       e = find_fallthru_edge (bb->succs);
       if (!e)
 	{
-	  rtx insn;
+	  rtx_insn *insn;
 
 	  /* Ensure existence of barrier in BB with no fallthru edges.  */
 	  for (insn = NEXT_INSN (BB_END (bb)); ; insn = NEXT_INSN (insn))
@@ -2848,7 +2850,7 @@ rtl_verify_fallthru (void)
       else if (e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun)
 	       && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
 	{
-	  rtx insn;
+	  rtx_insn *insn;
 
 	  if (e->src->next_bb != e->dest)
 	    {
@@ -2882,9 +2884,9 @@ rtl_verify_bb_layout (void)
 {
   basic_block bb;
   int err = 0;
-  rtx x;
+  rtx_insn *x;
   int num_bb_notes;
-  const rtx rtx_first = get_insns ();
+  rtx_insn * const rtx_first = get_insns ();
   basic_block last_bb_seen = ENTRY_BLOCK_PTR_FOR_FN (cfun), curr_bb = NULL;
 
   num_bb_notes = 0;
@@ -2981,7 +2983,8 @@ bool
 purge_dead_edges (basic_block bb)
 {
   edge e;
-  rtx insn = BB_END (bb), note;
+  rtx_insn *insn = BB_END (bb);
+  rtx note;
   bool purged = false;
   bool found;
   edge_iterator ei;
@@ -3243,7 +3246,7 @@ fixup_abnormal_edges (void)
 
       if (e && !CALL_P (BB_END (bb)) && !can_throw_internal (BB_END (bb)))
 	{
-	  rtx insn;
+	  rtx_insn *insn;
 
 	  /* Get past the new insns generated.  Allow notes, as the insns
 	     may be already deleted.  */
@@ -3255,7 +3258,7 @@ fixup_abnormal_edges (void)
 
 	  if (CALL_P (insn) || can_throw_internal (insn))
 	    {
-	      rtx stop, next;
+	      rtx_insn *stop, *next;
 
 	      e = find_fallthru_edge (bb->succs);
 
@@ -3327,12 +3330,12 @@ unlink_insn_chain (rtx first, rtx last)
    associated with BB (e.g., barriers). If there are any such insns,
    we return the last one. Otherwise, we return the end of BB.  */
 
-static rtx
+static rtx_insn *
 skip_insns_after_block (basic_block bb)
 {
-  rtx insn, last_insn, next_head, prev;
+  rtx_insn *insn, *last_insn, *next_head, *prev;
 
-  next_head = NULL_RTX;
+  next_head = NULL;
   if (bb->next_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
     next_head = BB_HEAD (bb->next_bb);
 
@@ -3431,9 +3434,9 @@ label_for_bb (basic_block bb)
 static void
 record_effective_endpoints (void)
 {
-  rtx next_insn;
+  rtx_insn *next_insn;
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
 
   for (insn = get_insns ();
        insn
@@ -3453,7 +3456,7 @@ record_effective_endpoints (void)
   next_insn = get_insns ();
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx end;
+      rtx_insn *end;
 
       if (PREV_INSN (BB_HEAD (bb)) && next_insn != BB_HEAD (bb))
 	SET_BB_HEADER (bb) = unlink_insn_chain (next_insn,
@@ -3702,7 +3705,7 @@ fixup_reorder_chain (void)
        bb->aux)
     {
       edge e_fall, e_taken, e;
-      rtx bb_end_insn;
+      rtx_insn *bb_end_insn;
       rtx ret_label = NULL_RTX;
       basic_block nb;
       edge_iterator ei;
@@ -3878,7 +3881,7 @@ fixup_reorder_chain (void)
 	      edge e2;
 	      edge_iterator ei2;
 	      basic_block dest, nb;
-	      rtx end;
+	      rtx_insn *end;
 
 	      insn = BB_END (e->src);
 	      end = PREV_INSN (BB_HEAD (e->src));
@@ -3941,7 +3944,7 @@ fixup_reorder_chain (void)
 DEBUG_FUNCTION void
 verify_insn_chain (void)
 {
-  rtx x, prevx, nextx;
+  rtx_insn *x, *prevx, *nextx;
   int insn_cnt1, insn_cnt2;
 
   for (prevx = NULL, insn_cnt1 = 1, x = get_insns ();
@@ -4069,7 +4072,7 @@ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
   /* Do not duplicate blocks containing insns that can't be copied.  */
   if (targetm.cannot_copy_insn_p)
     {
-      rtx insn = BB_HEAD (bb);
+      rtx_insn *insn = BB_HEAD (bb);
       while (1)
 	{
 	  if (INSN_P (insn) && targetm.cannot_copy_insn_p (insn))
@@ -4169,7 +4172,7 @@ duplicate_insn_chain (rtx from, rtx to)
     }
   insn = NEXT_INSN (last);
   delete_insn (last);
-  return as_a <rtx_insn *> (insn);
+  return as_a_nullable <rtx_insn *> (insn);
 }
 
 /* Create a duplicate of the basic block BB.  */
@@ -4177,7 +4180,7 @@ duplicate_insn_chain (rtx from, rtx to)
 static basic_block
 cfg_layout_duplicate_bb (basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
   basic_block new_bb;
 
   insn = duplicate_insn_chain (BB_HEAD (bb), BB_END (bb));
@@ -4415,7 +4418,8 @@ cfg_layout_redirect_edge_and_branch_force (edge e, basic_block dest)
 static void
 cfg_layout_delete_block (basic_block bb)
 {
-  rtx insn, next, prev = PREV_INSN (BB_HEAD (bb)), *to, remaints;
+  rtx_insn *insn, *next, *prev = PREV_INSN (BB_HEAD (bb)), *remaints;
+  rtx *to;
 
   if (BB_HEADER (bb))
     {
@@ -4548,7 +4552,7 @@ static void
 cfg_layout_merge_blocks (basic_block a, basic_block b)
 {
   bool forwarder_p = (b->flags & BB_FORWARDER_BLOCK) != 0;
-  rtx insn;
+  rtx_insn *insn;
 
   gcc_checking_assert (cfg_layout_can_merge_blocks_p (a, b));
 
@@ -4580,7 +4584,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
 	SET_BB_FOOTER (a) = SET_BB_FOOTER (b);
       else
 	{
-	  rtx last = BB_FOOTER (a);
+	  rtx_insn *last = BB_FOOTER (a);
 
 	  while (NEXT_INSN (last))
 	    last = NEXT_INSN (last);
@@ -4599,7 +4603,7 @@ cfg_layout_merge_blocks (basic_block a, basic_block b)
 	SET_BB_FOOTER (a) = BB_HEADER (b);
       else
 	{
-	  rtx last = BB_HEADER (b);
+	  rtx_insn *last = BB_HEADER (b);
  
 	  while (NEXT_INSN (last))
 	    last = NEXT_INSN (last);
@@ -4679,7 +4683,7 @@ rtl_make_forwarder_block (edge fallthru ATTRIBUTE_UNUSED)
 static bool
 rtl_block_empty_p (basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (bb == ENTRY_BLOCK_PTR_FOR_FN (cfun)
       || bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
@@ -4698,9 +4702,9 @@ rtl_block_empty_p (basic_block bb)
 static basic_block
 rtl_split_block_before_cond_jump (basic_block bb)
 {
-  rtx insn;
-  rtx split_point = NULL;
-  rtx last = NULL;
+  rtx_insn *insn;
+  rtx_insn *split_point = NULL;
+  rtx_insn *last = NULL;
   bool found_code = false;
 
   FOR_BB_INSNS (bb, insn)
@@ -4725,7 +4729,7 @@ rtl_split_block_before_cond_jump (basic_block bb)
 static bool
 rtl_block_ends_with_call_p (basic_block bb)
 {
-  rtx insn = BB_END (bb);
+  rtx_insn *insn = BB_END (bb);
 
   while (!CALL_P (insn)
 	 && insn != BB_HEAD (bb)
@@ -4748,7 +4752,7 @@ rtl_block_ends_with_condjump_p (const_basic_block bb)
    Helper function for rtl_flow_call_edges_add.  */
 
 static bool
-need_fake_edge_p (const_rtx insn)
+need_fake_edge_p (const rtx_insn *insn)
 {
   if (!INSN_P (insn))
     return false;
@@ -4807,7 +4811,7 @@ rtl_flow_call_edges_add (sbitmap blocks)
   if (check_last_block)
     {
       basic_block bb = EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb;
-      rtx insn = BB_END (bb);
+      rtx_insn *insn = BB_END (bb);
 
       /* Back up past insns that must be kept in the same block as a call.  */
       while (insn != BB_HEAD (bb)
@@ -4834,8 +4838,8 @@ rtl_flow_call_edges_add (sbitmap blocks)
   for (i = NUM_FIXED_BLOCKS; i < last_bb; i++)
     {
       basic_block bb = BASIC_BLOCK_FOR_FN (cfun, i);
-      rtx insn;
-      rtx prev_insn;
+      rtx_insn *insn;
+      rtx_insn *prev_insn;
 
       if (!bb)
 	continue;
@@ -4849,7 +4853,7 @@ rtl_flow_call_edges_add (sbitmap blocks)
 	  if (need_fake_edge_p (insn))
 	    {
 	      edge e;
-	      rtx split_at_insn = insn;
+	      rtx_insn *split_at_insn = insn;
 
 	      /* Don't split the block between a call and an insn that should
 		 remain in the same block as the call.  */
@@ -4904,7 +4908,8 @@ rtl_lv_add_condition_to_bb (basic_block first_head ,
 			    basic_block second_head ATTRIBUTE_UNUSED,
 			    basic_block cond_bb, void *comp_rtx)
 {
-  rtx label, seq, jump;
+  rtx label;
+  rtx_insn *seq, *jump;
   rtx op0 = XEXP ((rtx)comp_rtx, 0);
   rtx op1 = XEXP ((rtx)comp_rtx, 1);
   enum rtx_code comp = GET_CODE ((rtx)comp_rtx);
@@ -4969,7 +4974,8 @@ rtl_can_remove_branch_p (const_edge e)
 {
   const_basic_block src = e->src;
   const_basic_block target = EDGE_SUCC (src, EDGE_SUCC (src, 0) == e)->dest;
-  const_rtx insn = BB_END (src), set;
+  const rtx_insn *insn = BB_END (src);
+  rtx set;
 
   /* The conditions are taken from try_redirect_by_replacing_jump.  */
   if (target == EXIT_BLOCK_PTR_FOR_FN (cfun))
@@ -5007,7 +5013,7 @@ static void
 rtl_account_profile_record (basic_block bb, int after_pass,
 			    struct profile_record *record)
 {
-  rtx insn;
+  rtx_insn *insn;
   FOR_BB_INSNS (bb, insn)
     if (INSN_P (insn))
       {
-- 
1.8.5.3

Re: [PATCH 060/236] cfgrtl.c: Use rtx subclasses

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* cfgrtl.c (can_delete_note_p): Require a const rtx_note * rather
> 	than a const_rtx.
> 	(can_delete_label_p): Require a const rtx_code_label * rather than
> 	a const_rtx.
> 	(delete_insn): Add checked cast to rtx_code_label * when we know
> 	we're dealing with LABEL_P (insn).  Strengthen local "bb_note" from
> 	rtx to rtx_insn *.
> 	(delete_insn_chain): Strengthen locals "prev" and "current" from
> 	rtx to rtx_insn *.  Add a checked cast when assigning from
> 	"finish" (strengthening the params will come later).  Add a
> 	checked cast to rtx_note * in region where we know
> 	NOTE_P (current).
> 	(rtl_delete_block): Strengthen locals "insn" and "end" from rtx to
> 	rtx_insn *.
> 	(compute_bb_for_insn): Likewise.
> 	(free_bb_for_insn): Likewise for local "insn".
> 	(compute_bb_for_insn): Likewise.
> 	(update_bb_for_insn_chain): Strengthen params "begin", "end" and
> 	local "insn" from rtx to rtx_insn *
> 	(flow_active_insn_p): Require a const rtx_insn * rather than a
> 	const_rtx.
> 	(contains_no_active_insn_p): Strengthen local "insn" from rtx to
> 	rtx_insn *.
> 	(can_fallthru): Likewise for locals "insn" and "insn2".
> 	(bb_note): Likewise for local "note".
> 	(first_insn_after_basic_block_note): Likewise for local "note" and
> 	for return type.
> 	(rtl_split_block): Likewise for locals "insn" and "next".
> 	(unique_locus_on_edge_between_p): Likewise for locals "insn" and
> 	"end".
> 	(rtl_merge_blocks): Likewise for locals "b_head", "b_end",
> 	"a_end", "del_first", "del_last", "b_debug_start", "b_debug_end",
> 	"prev", "tmp".
> 	(try_redirect_by_replacing_jump): Likewise for locals "insn" (both of
> 	them), "kill_from", "barrier", "new_insn".
> 	(patch_jump_insn): Likewise for params "insn", "old_label".
> 	(redirect_branch_edge): Likewise for locals "old_label", "insn".
> 	(force_nonfallthru_and_redirect): Likewise for locals "insn",
> 	"old_label", "new_label".
> 	(rtl_tidy_fallthru_edge): Likewise for local "q".
> 	(rtl_split_edge): Likewise for locals "before", "last".
> 	(commit_one_edge_insertion): Likewise for locals "before",
> 	"after", "insns", "tmp", "last", adding a checked cast where
> 	currently necessary.
> 	(commit_edge_insertions): Likewise.
> 	(rtl_dump_bb): Likewise for locals "insn", "last".
> 	(print_rtl_with_bb): Likewise for local "x".
> 	(rtl_verify_bb_insns): Likewise for local "x".
> 	(rtl_verify_bb_pointers): Likewise for local "insn".
> 	(rtl_verify_bb_insn_chain): Likewise for locals "x", "last_head",
> 	"head", "end".
> 	(rtl_verify_fallthru): Likewise for local "insn".
> 	(rtl_verify_bb_layout): Likewise for locals "x" and "rtx_first".
> 	(purge_dead_edges): Likewise for local "insn".
> 	(fixup_abnormal_edges): Likewise for locals "insn", "stop", "next".
> 	(skip_insns_after_block): Likewise for return type and for locals
> 	"insn", "last_insn", "next_head", "prev".
> 	(record_effective_endpoints): Likewise for locals "next_insn",
> 	"insn", "end".
> 	(fixup_reorder_chain): Likewise for locals "bb_end_insn" and "end".
> 	(verify_insn_chain): Likewise for locals "x", "prevx", "nextx".
> 	(cfg_layout_can_duplicate_bb_p): Likewise for local "insn".
> 	(duplicate_insn_chain): For now, add checked cast from rtx to
> 	rtx_insn * when returning insn.
> 	(cfg_layout_duplicate_bb): Likewise for local "insn".
> 	(cfg_layout_delete_block): Likewise for locals "insn", "next",
> 	"prev", "remaints".
> 	(cfg_layout_merge_blocks): Likewise for local "insn", "last".
> 	(rtl_block_empty_p): Likewise.
> 	(rtl_split_block_before_cond_jump): Likewise for locals "insn",
> 	"split_point", "last".
> 	(rtl_block_ends_with_call_p): Likewise for local "insn".
> 	(need_fake_edge_p): Strengthen param "insn" from const_rtx to
> 	const rtx_insn *.
> 	(rtl_flow_call_edges_add): Strengthen locals "insn", "prev_insn",
> 	"split_at_insn" from rtx to rtx_insn *.
> 	(rtl_lv_add_condition_to_bb): Likewise for locals "seq", "jump".
> 	(rtl_can_remove_branch_p): Strengthen local "insn" from const_rtx
> 	to const rtx_insn *.
> 	(rtl_account_profile_record): Likewise.
> ---

OK.

Jeff

[PATCH 190/236] Remove insn_addresses_new from 'various scheduling strengthenings'

[David Malcolm]

---
 gcc/insn-addr.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/insn-addr.h b/gcc/insn-addr.h
index e255ac4..aec09fd 100644
--- a/gcc/insn-addr.h
+++ b/gcc/insn-addr.h
@@ -38,7 +38,7 @@ extern int insn_current_address;
 #define INSN_ADDRESSES_SIZE() (insn_addresses_.length ())
 
 static inline void
-insn_addresses_new (rtx_insn *insn, int insn_addr)
+insn_addresses_new (rtx insn, int insn_addr)
 {
   unsigned insn_uid = INSN_UID ((insn));
 
-- 
1.8.5.3

Re: [PATCH 190/236] Remove insn_addresses_new from 'various scheduling strengthenings'

[David Malcolm]

On Wed, 2014-08-06 at 13:22 -0400, David Malcolm wrote:
> ---
>  gcc/insn-addr.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/gcc/insn-addr.h b/gcc/insn-addr.h
> index e255ac4..aec09fd 100644
> --- a/gcc/insn-addr.h
> +++ b/gcc/insn-addr.h
> @@ -38,7 +38,7 @@ extern int insn_current_address;
>  #define INSN_ADDRESSES_SIZE() (insn_addresses_.length ())
>  
>  static inline void
> -insn_addresses_new (rtx_insn *insn, int insn_addr)
> +insn_addresses_new (rtx insn, int insn_addr)
>  {
>    unsigned insn_uid = INSN_UID ((insn));

Oops; this one undoes part of patch 189.  I think I meant to squash
these two together, since without 190, 189 breaks the build on s390 in a
few places.

Re: [PATCH 190/236] Remove insn_addresses_new from 'various scheduling strengthenings'

[Jeff Law]

On 08/13/14 13:32, David Malcolm wrote:
> On Wed, 2014-08-06 at 13:22 -0400, David Malcolm wrote:
>> ---
>>   gcc/insn-addr.h | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/gcc/insn-addr.h b/gcc/insn-addr.h
>> index e255ac4..aec09fd 100644
>> --- a/gcc/insn-addr.h
>> +++ b/gcc/insn-addr.h
>> @@ -38,7 +38,7 @@ extern int insn_current_address;
>>   #define INSN_ADDRESSES_SIZE() (insn_addresses_.length ())
>>
>>   static inline void
>> -insn_addresses_new (rtx_insn *insn, int insn_addr)
>> +insn_addresses_new (rtx insn, int insn_addr)
>>   {
>>     unsigned insn_uid = INSN_UID ((insn));
>
> Oops; this one undoes part of patch 189.  I think I meant to squash
> these two together, since without 190, 189 breaks the build on s390 in a
> few places.
NP.    Track that however you want.  No need to repost everything right 
now.  Though I do request that you post final versions for archival 
purposes.

Jeff

[PATCH 198/236] PHASE 5: Additional rtx subclasses

[David Malcolm]

/
	* rtx-classes-status.txt: Update.
---
 rtx-classes-status.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index 5667ae9..e51b0f3 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -4,8 +4,8 @@ exists to be modified by marker commits.
 Phase 1: initial "scaffolding" commits:            DONE
 Phase 2: per-file commits in main source dir:      DONE
 Phase 3: per-file commits within "config" subdirs: DONE
-Phase 4: removal of "scaffolding":                 IN PROGRESS
-Phase 5: additional rtx_def subclasses:            TODO
+Phase 4: removal of "scaffolding":                 DONE
+Phase 5: additional rtx_def subclasses:            IN PROGRESS
 Phase 6: use extra rtx_def subclasses:             TODO
 
 TODO: "Scaffolding" to be removed
-- 
1.8.5.3

[PATCH 064/236] cprop.c: Use rtx_insn

[David Malcolm]

gcc/
	* cprop.c (struct occr): Strengthen field "insn" from rtx to
	rtx_insn *.
	(reg_available_p): Likewise for param "insn".
	(insert_set_in_table): Likewise.
	(hash_scan_set): Likewise.
	(hash_scan_insn): Likewise.
	(make_set_regs_unavailable): Likewise.
	(compute_hash_table_work): Likewise for local "insn".
	(reg_not_set_p): Strengthen param "insn" from const_rtx to
	const rtx_insn *.
	(mark_oprs_set): Strengthen param "insn" from rtx to rtx_insn *.
	(try_replace_reg): Likewise.
	(find_avail_set): Likewise.
	(cprop_jump): Likewise for params "setcc", "jump".
	(constprop_register): Likewise for param "insn".
	(cprop_insn): Likewise.
	(do_local_cprop): Likewise.
	(local_cprop_pass): Likewise for local "insn".
	(bypass_block): Likewise for params "setcc" and "jump".
	(bypass_conditional_jumps): Likewise for locals "setcc" and
	"insn".
	(one_cprop_pass): Likewise for local "insn".
---
 gcc/cprop.c | 50 ++++++++++++++++++++++++++------------------------
 1 file changed, 26 insertions(+), 24 deletions(-)

diff --git a/gcc/cprop.c b/gcc/cprop.c
index aef3ee8..1378161 100644
--- a/gcc/cprop.c
+++ b/gcc/cprop.c
@@ -60,7 +60,7 @@ struct occr
   /* Next occurrence of this expression.  */
   struct occr *next;
   /* The insn that computes the expression.  */
-  rtx insn;
+  rtx_insn *insn;
 };
 
 typedef struct occr *occr_t;
@@ -154,7 +154,7 @@ cprop_alloc (unsigned long size)
    of INSN's basic block.  */
 
 static int
-reg_available_p (const_rtx x, const_rtx insn ATTRIBUTE_UNUSED)
+reg_available_p (const_rtx x, const rtx_insn *insn ATTRIBUTE_UNUSED)
 {
   return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x));
 }
@@ -179,8 +179,8 @@ hash_set (int regno, int hash_table_size)
    IMPLICIT is true if it's an implicit set, false otherwise.  */
 
 static void
-insert_set_in_table (rtx dest, rtx src, rtx insn, struct hash_table_d *table,
-		     bool implicit)
+insert_set_in_table (rtx dest, rtx src, rtx_insn *insn,
+		     struct hash_table_d *table, bool implicit)
 {
   bool found = false;
   unsigned int hash;
@@ -264,7 +264,8 @@ cprop_constant_p (const_rtx x)
    IMPLICIT is true if it's an implicit set, false otherwise.  */
 
 static void
-hash_scan_set (rtx set, rtx insn, struct hash_table_d *table, bool implicit)
+hash_scan_set (rtx set, rtx_insn *insn, struct hash_table_d *table,
+	       bool implicit)
 {
   rtx src = SET_SRC (set);
   rtx dest = SET_DEST (set);
@@ -307,7 +308,7 @@ hash_scan_set (rtx set, rtx insn, struct hash_table_d *table, bool implicit)
 /* Process INSN and add hash table entries as appropriate.  */
 
 static void
-hash_scan_insn (rtx insn, struct hash_table_d *table)
+hash_scan_insn (rtx_insn *insn, struct hash_table_d *table)
 {
   rtx pat = PATTERN (insn);
   int i;
@@ -372,7 +373,7 @@ dump_hash_table (FILE *file, const char *name, struct hash_table_d *table)
 /* Record as unavailable all registers that are DEF operands of INSN.  */
 
 static void
-make_set_regs_unavailable (rtx insn)
+make_set_regs_unavailable (rtx_insn *insn)
 {
   struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
   df_ref *def_rec;
@@ -402,7 +403,7 @@ compute_hash_table_work (struct hash_table_d *table)
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
 
       /* Reset tables used to keep track of what's not yet invalid [since
 	 the end of the block].  */
@@ -522,7 +523,7 @@ reset_opr_set_tables (void)
    start of the basic block containing INSN].  */
 
 static int
-reg_not_set_p (const_rtx x, const_rtx insn ATTRIBUTE_UNUSED)
+reg_not_set_p (const_rtx x, const rtx_insn *insn ATTRIBUTE_UNUSED)
 {
   return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x));
 }
@@ -531,7 +532,7 @@ reg_not_set_p (const_rtx x, const_rtx insn ATTRIBUTE_UNUSED)
    This data is used by reg_not_set_p.  */
 
 static void
-mark_oprs_set (rtx insn)
+mark_oprs_set (rtx_insn *insn)
 {
   struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
   df_ref *def_rec;
@@ -727,7 +728,7 @@ find_used_regs (rtx *xptr, void *data ATTRIBUTE_UNUSED)
    Return nonzero if successful.  */
 
 static int
-try_replace_reg (rtx from, rtx to, rtx insn)
+try_replace_reg (rtx from, rtx to, rtx_insn *insn)
 {
   rtx note = find_reg_equal_equiv_note (insn);
   rtx src = 0;
@@ -801,7 +802,7 @@ try_replace_reg (rtx from, rtx to, rtx insn)
    NULL no such set is found.  */
 
 static struct expr *
-find_avail_set (int regno, rtx insn)
+find_avail_set (int regno, rtx_insn *insn)
 {
   /* SET1 contains the last set found that can be returned to the caller for
      use in a substitution.  */
@@ -871,7 +872,7 @@ find_avail_set (int regno, rtx insn)
    if a change was made.  */
 
 static int
-cprop_jump (basic_block bb, rtx setcc, rtx jump, rtx from, rtx src)
+cprop_jump (basic_block bb, rtx_insn *setcc, rtx_insn *jump, rtx from, rtx src)
 {
   rtx new_rtx, set_src, note_src;
   rtx set = pc_set (jump);
@@ -903,7 +904,7 @@ cprop_jump (basic_block bb, rtx setcc, rtx jump, rtx from, rtx src)
 				      setcc_src);
     }
   else
-    setcc = NULL_RTX;
+    setcc = NULL;
 
   new_rtx = simplify_replace_rtx (set_src, from, src);
 
@@ -984,7 +985,7 @@ cprop_jump (basic_block bb, rtx setcc, rtx jump, rtx from, rtx src)
    it and INSN is the instruction where this will be happening.  */
 
 static int
-constprop_register (rtx from, rtx src, rtx insn)
+constprop_register (rtx from, rtx src, rtx_insn *insn)
 {
   rtx sset;
 
@@ -1020,7 +1021,7 @@ constprop_register (rtx from, rtx src, rtx insn)
    Return nonzero if a change was made.  */
 
 static int
-cprop_insn (rtx insn)
+cprop_insn (rtx_insn *insn)
 {
   unsigned i;
   int changed = 0, changed_this_round;
@@ -1160,7 +1161,7 @@ local_cprop_find_used_regs (rtx *xptr, void *data)
 /* Try to perform local const/copy propagation on X in INSN.  */
 
 static bool
-do_local_cprop (rtx x, rtx insn)
+do_local_cprop (rtx x, rtx_insn *insn)
 {
   rtx newreg = NULL, newcnst = NULL;
 
@@ -1229,7 +1230,7 @@ static int
 local_cprop_pass (void)
 {
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
   bool changed = false;
   unsigned i;
 
@@ -1491,9 +1492,10 @@ reg_killed_on_edge (const_rtx reg, const_edge e)
    these inserted insns when performing its transformations.  */
 
 static int
-bypass_block (basic_block bb, rtx setcc, rtx jump)
+bypass_block (basic_block bb, rtx_insn *setcc, rtx_insn *jump)
 {
-  rtx insn, note;
+  rtx_insn *insn;
+  rtx note;
   edge e, edest;
   int change;
   int may_be_loop_header = false;
@@ -1659,8 +1661,8 @@ bypass_conditional_jumps (void)
 {
   basic_block bb;
   int changed;
-  rtx setcc;
-  rtx insn;
+  rtx_insn *setcc;
+  rtx_insn *insn;
   rtx dest;
 
   /* Note we start at block 1.  */
@@ -1677,7 +1679,7 @@ bypass_conditional_jumps (void)
       /* Check for more than one predecessor.  */
       if (!single_pred_p (bb))
 	{
-	  setcc = NULL_RTX;
+	  setcc = NULL;
 	  FOR_BB_INSNS (bb, insn)
 	    if (DEBUG_INSN_P (insn))
 	      continue;
@@ -1825,7 +1827,7 @@ one_cprop_pass (void)
   if (set_hash_table.n_elems > 0)
     {
       basic_block bb;
-      rtx insn;
+      rtx_insn *insn;
 
       alloc_cprop_mem (last_basic_block_for_fn (cfun),
 		       set_hash_table.n_elems);
-- 
1.8.5.3

[PATCH 197/236] Tweak to ira-lives.c

[David Malcolm]

gcc/
	* ira-lives.c (find_call_crossed_cheap_reg): Strengthen local
	"prev" from rtx to rtx_insn *.
---
 gcc/ira-lives.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ira-lives.c b/gcc/ira-lives.c
index 4875399..98bbd4d 100644
--- a/gcc/ira-lives.c
+++ b/gcc/ira-lives.c
@@ -1068,7 +1068,7 @@ find_call_crossed_cheap_reg (rtx_insn *insn)
     {
       basic_block bb = BLOCK_FOR_INSN (insn);
       rtx reg = SET_SRC (exp);
-      rtx prev = PREV_INSN (insn);
+      rtx_insn *prev = PREV_INSN (insn);
       while (prev && !(INSN_P (prev)
 		       && BLOCK_FOR_INSN (prev) != bb))
 	{
-- 
1.8.5.3

[PATCH 014/236] VINSN_INSN_RTX scaffolding

[David Malcolm]

For now, convert into VINSN_INSN_RTX a pair of functions.  We will
eventually change them back to a macro once the relevant field is of type
rtx_insn *.

gcc/
	* sel-sched-ir.h (VINSN_INSN_RTX): struct vinsn_def's "insn_rtx"
	field will eventually be an rtx_insn *.  To help with transition,
	for now, convert from an access macro into a pair of functions:
	VINSN_INSN_RTX, returning an rtx_insn *, and...
	(SET_VINSN_INSN_RTX): New function, for use where VINSN_INSN_RTX
	is used as an lvalue.

	* sel-sched-ir.c (vinsn_init): Replace VINSN_INSN_RTX with
	SET_VINSN_INSN_RTX where it's used as an lvalue.
	(VINSN_INSN_RTX): New function.
	(SET_VINSN_INSN_RTX): New function.

/
	* rtx-classes-status.txt: Add SET_VINSN_INSN_RTX.
---
 gcc/sel-sched-ir.c     | 13 ++++++++++++-
 gcc/sel-sched-ir.h     |  3 ++-
 rtx-classes-status.txt |  1 +
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index c1a8a48..18ffa6c 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -1179,7 +1179,7 @@ vinsn_init (vinsn_t vi, insn_t insn, bool force_unique_p)
   hash_rtx_callback_function hrcf;
   int insn_class;
 
-  VINSN_INSN_RTX (vi) = insn;
+  SET_VINSN_INSN_RTX (vi) = insn;
   VINSN_COUNT (vi) = 0;
   vi->cost = -1;
 
@@ -6446,4 +6446,15 @@ sel_remove_loop_preheader (void)
     SET_LOOP_PREHEADER_BLOCKS (loop_outer (current_loop_nest),
 			       preheader_blocks);
 }
+
+rtx_insn *VINSN_INSN_RTX (vinsn_t vi)
+{
+  return as_a_nullable <rtx_insn *> (vi->insn_rtx);
+}
+
+rtx& SET_VINSN_INSN_RTX (vinsn_t vi)
+{
+  return vi->insn_rtx;
+}
+
 #endif
diff --git a/gcc/sel-sched-ir.h b/gcc/sel-sched-ir.h
index f63d571..7aef287 100644
--- a/gcc/sel-sched-ir.h
+++ b/gcc/sel-sched-ir.h
@@ -645,7 +645,8 @@ struct vinsn_def
   bool may_trap_p;
 };
 
-#define VINSN_INSN_RTX(VI) ((VI)->insn_rtx)
+extern rtx_insn *VINSN_INSN_RTX (vinsn_t);
+extern rtx& SET_VINSN_INSN_RTX (vinsn_t);
 #define VINSN_PATTERN(VI) (PATTERN (VINSN_INSN_RTX (VI)))
 
 #define VINSN_ID(VI) (&((VI)->id))
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index 2a8773f..fe04611 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -14,3 +14,4 @@ TODO: "Scaffolding" to be removed
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
 * SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
+* SET_VINSN_INSN_RTX
-- 
1.8.5.3

Re: [PATCH 014/236] VINSN_INSN_RTX scaffolding

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
> For now, convert into VINSN_INSN_RTX a pair of functions.  We will
> eventually change them back to a macro once the relevant field is of type
> rtx_insn *.
>
> gcc/
> 	* sel-sched-ir.h (VINSN_INSN_RTX): struct vinsn_def's "insn_rtx"
> 	field will eventually be an rtx_insn *.  To help with transition,
> 	for now, convert from an access macro into a pair of functions:
> 	VINSN_INSN_RTX, returning an rtx_insn *, and...
> 	(SET_VINSN_INSN_RTX): New function, for use where VINSN_INSN_RTX
> 	is used as an lvalue.
>
> 	* sel-sched-ir.c (vinsn_init): Replace VINSN_INSN_RTX with
> 	SET_VINSN_INSN_RTX where it's used as an lvalue.
> 	(VINSN_INSN_RTX): New function.
> 	(SET_VINSN_INSN_RTX): New function.
>
> /
> 	* rtx-classes-status.txt: Add SET_VINSN_INSN_RTX.
OK.
Jeff

Re: [PATCH 014/236] VINSN_INSN_RTX scaffolding

[David Malcolm]

[-- Attachment #1: Type: text/plain, Size: 1254 bytes --]

On Tue, 2014-08-12 at 15:21 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> > For now, convert into VINSN_INSN_RTX a pair of functions.  We will
> > eventually change them back to a macro once the relevant field is of type
> > rtx_insn *.
> >
> > gcc/
> > 	* sel-sched-ir.h (VINSN_INSN_RTX): struct vinsn_def's "insn_rtx"
> > 	field will eventually be an rtx_insn *.  To help with transition,
> > 	for now, convert from an access macro into a pair of functions:
> > 	VINSN_INSN_RTX, returning an rtx_insn *, and...
> > 	(SET_VINSN_INSN_RTX): New function, for use where VINSN_INSN_RTX
> > 	is used as an lvalue.
> >
> > 	* sel-sched-ir.c (vinsn_init): Replace VINSN_INSN_RTX with
> > 	SET_VINSN_INSN_RTX where it's used as an lvalue.
> > 	(VINSN_INSN_RTX): New function.
> > 	(SET_VINSN_INSN_RTX): New function.
> >
> > /
> > 	* rtx-classes-status.txt: Add SET_VINSN_INSN_RTX.
> OK.

Thanks.

Fixed up the as_a_nullable to safe_as_a, and committed to trunk as
r214165, having verified bootstrap&regrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone with 9 targets.

Am attaching what I committed.

FWIW these functions becomes a macro again in patch #174.

[-- Attachment #2: r214165.patch --]
[-- Type: text/x-patch, Size: 2917 bytes --]

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 214164)
+++ ChangeLog	(revision 214165)
@@ -1,5 +1,9 @@
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
 
+	* rtx-classes-status.txt (TODO): Add SET_VINSN_INSN_RTX.
+
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
 	* rtx-classes-status.txt (TODO): Add SET_DEP_PRO, SET_DEP_CON.
 
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
Index: rtx-classes-status.txt
===================================================================
--- rtx-classes-status.txt	(revision 214164)
+++ rtx-classes-status.txt	(revision 214165)
@@ -18,3 +18,4 @@
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
 * SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
+* SET_VINSN_INSN_RTX
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog	(revision 214164)
+++ gcc/ChangeLog	(revision 214165)
@@ -1,5 +1,19 @@
 2014-08-19  David Malcolm  <dmalcolm@redhat.com>
 
+	* sel-sched-ir.h (VINSN_INSN_RTX): struct vinsn_def's "insn_rtx"
+	field will eventually be an rtx_insn *.  To help with transition,
+	for now, convert from an access macro into a pair of functions:
+	VINSN_INSN_RTX, returning an rtx_insn *, and...
+	(SET_VINSN_INSN_RTX): New function, for use where VINSN_INSN_RTX
+	is used as an lvalue.
+
+	* sel-sched-ir.c (vinsn_init): Replace VINSN_INSN_RTX with
+	SET_VINSN_INSN_RTX where it's used as an lvalue.
+	(VINSN_INSN_RTX): New function.
+	(SET_VINSN_INSN_RTX): New function.
+
+2014-08-19  David Malcolm  <dmalcolm@redhat.com>
+
 	* sched-int.h (DEP_PRO): struct _dep's "pro" and "con" fields will
 	eventually be rtx_insn *, but to help with transition, for now,
 	convert from an access macro into a pair of functions: DEP_PRO
Index: gcc/sel-sched-ir.c
===================================================================
--- gcc/sel-sched-ir.c	(revision 214164)
+++ gcc/sel-sched-ir.c	(revision 214165)
@@ -1179,7 +1179,7 @@
   hash_rtx_callback_function hrcf;
   int insn_class;
 
-  VINSN_INSN_RTX (vi) = insn;
+  SET_VINSN_INSN_RTX (vi) = insn;
   VINSN_COUNT (vi) = 0;
   vi->cost = -1;
 
@@ -6441,4 +6441,15 @@
     SET_LOOP_PREHEADER_BLOCKS (loop_outer (current_loop_nest),
 			       preheader_blocks);
 }
+
+rtx_insn *VINSN_INSN_RTX (vinsn_t vi)
+{
+  return safe_as_a <rtx_insn *> (vi->insn_rtx);
+}
+
+rtx& SET_VINSN_INSN_RTX (vinsn_t vi)
+{
+  return vi->insn_rtx;
+}
+
 #endif
Index: gcc/sel-sched-ir.h
===================================================================
--- gcc/sel-sched-ir.h	(revision 214164)
+++ gcc/sel-sched-ir.h	(revision 214165)
@@ -645,7 +645,8 @@
   bool may_trap_p;
 };
 
-#define VINSN_INSN_RTX(VI) ((VI)->insn_rtx)
+extern rtx_insn *VINSN_INSN_RTX (vinsn_t);
+extern rtx& SET_VINSN_INSN_RTX (vinsn_t);
 #define VINSN_PATTERN(VI) (PATTERN (VINSN_INSN_RTX (VI)))
 
 #define VINSN_ID(VI) (&((VI)->id))

[PATCH 126/236] config/alpha/alpha.c: Use rtx_insn

[David Malcolm]

gcc/
	* config/alpha/alpha.c (alpha_emit_set_const): Strengthen local
	"insn" from rtx to rtx_insn *.
	(alpha_gp_save_rtx): Likewise for local "seq".
	(alpha_instantiate_decls): Likewise for local "top".
	(get_some_local_dynamic_name): Likewise for local "insn".
	(alpha_does_function_need_gp): Likewise.
	(set_frame_related_p): Likewise for return type and for locals
	"seq" and "insn".
	(emit_frame_store_1): Likewise for local "insn".
	(alpha_expand_prologue): Likewise for locals "insn", "seq".
	(alpha_end_function): Likewise for local "insn".
	(alpha_output_mi_thunk_osf): Likewise.
	(alphaev4_insn_pipe): Likewise for param "insn".
	(alphaev5_insn_pipe): Likewise.
	(alphaev4_next_group): Likewise for return type and param 1
	"insn".
	(alphaev5_next_group): Likewise.
	(alpha_align_insns): Likewise for return type and param 1 of
	callback param "next_group", and for locals "i", "next", "prev",
	"where", "where2", "insn".
---
 gcc/config/alpha/alpha.c | 59 ++++++++++++++++++++++++++----------------------
 1 file changed, 32 insertions(+), 27 deletions(-)

diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index efef1e9..2764f79 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -1881,7 +1881,8 @@ alpha_emit_set_const (rtx target, enum machine_mode mode,
       result = alpha_emit_set_const_1 (target, mode, c, i, no_output);
       if (result)
 	{
-	  rtx insn, set;
+	  rtx_insn *insn;
+	  rtx set;
 
 	  if (no_output)
 	    return result;
@@ -4827,7 +4828,8 @@ alpha_return_addr (int count, rtx frame ATTRIBUTE_UNUSED)
 rtx
 alpha_gp_save_rtx (void)
 {
-  rtx seq, m = cfun->machine->gp_save_rtx;
+  rtx_insn *seq;
+  rtx m = cfun->machine->gp_save_rtx;
 
   if (m == NULL)
     {
@@ -4865,7 +4867,7 @@ alpha_instantiate_decls (void)
 static int
 alpha_ra_ever_killed (void)
 {
-  rtx top;
+  rtx_insn *top;
 
   if (!has_hard_reg_initial_val (Pmode, REG_RA))
     return (int)df_regs_ever_live_p (REG_RA);
@@ -5011,7 +5013,7 @@ get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
 static const char *
 get_some_local_dynamic_name (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (cfun->machine->some_ld_name)
     return cfun->machine->some_ld_name;
@@ -7479,7 +7481,7 @@ alpha_find_lo_sum_using_gp (rtx insn)
 static int
 alpha_does_function_need_gp (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   /* The GP being variable is an OSF abi thing.  */
   if (! TARGET_ABI_OSF)
@@ -7522,16 +7524,16 @@ alpha_does_function_need_gp (void)
 /* Helper function to set RTX_FRAME_RELATED_P on instructions, including
    sequences.  */
 
-static rtx
+static rtx_insn *
 set_frame_related_p (void)
 {
-  rtx seq = get_insns ();
-  rtx insn;
+  rtx_insn *seq = get_insns ();
+  rtx_insn *insn;
 
   end_sequence ();
 
   if (!seq)
-    return NULL_RTX;
+    return NULL;
 
   if (INSN_P (seq))
     {
@@ -7563,7 +7565,8 @@ static void
 emit_frame_store_1 (rtx value, rtx base_reg, HOST_WIDE_INT frame_bias,
 		    HOST_WIDE_INT base_ofs, rtx frame_reg)
 {
-  rtx addr, mem, insn;
+  rtx addr, mem;
+  rtx_insn *insn;
 
   addr = plus_constant (Pmode, base_reg, base_ofs);
   mem = gen_frame_mem (DImode, addr);
@@ -7824,8 +7827,9 @@ alpha_expand_prologue (void)
       /* Register frame procedures save the fp.  */
       if (alpha_procedure_type == PT_REGISTER)
 	{
-	  rtx insn = emit_move_insn (gen_rtx_REG (DImode, vms_save_fp_regno),
-				     hard_frame_pointer_rtx);
+	  rtx_insn *insn =
+	    emit_move_insn (gen_rtx_REG (DImode, vms_save_fp_regno),
+			    hard_frame_pointer_rtx);
 	  add_reg_note (insn, REG_CFA_REGISTER, NULL);
 	  RTX_FRAME_RELATED_P (insn) = 1;
 	}
@@ -7841,7 +7845,7 @@ alpha_expand_prologue (void)
       /* If we have to allocate space for outgoing args, do it now.  */
       if (crtl->outgoing_args_size != 0)
 	{
-	  rtx seq
+	  rtx_insn *seq
 	    = emit_move_insn (stack_pointer_rtx,
 			      plus_constant
 			      (Pmode, hard_frame_pointer_rtx,
@@ -8281,7 +8285,7 @@ alpha_expand_epilogue (void)
 void
 alpha_end_function (FILE *file, const char *fnname, tree decl ATTRIBUTE_UNUSED)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   /* We output a nop after noreturn calls at the very end of the function to
      ensure that the return address always remains in the caller's code range,
@@ -8324,7 +8328,8 @@ alpha_output_mi_thunk_osf (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
 			   tree function)
 {
   HOST_WIDE_INT hi, lo;
-  rtx this_rtx, insn, funexp;
+  rtx this_rtx, funexp;
+  rtx_insn *insn;
 
   /* We always require a valid GP.  */
   emit_insn (gen_prologue_ldgp ());
@@ -8779,7 +8784,7 @@ enum alphaev5_pipe {
 };
 
 static enum alphaev4_pipe
-alphaev4_insn_pipe (rtx insn)
+alphaev4_insn_pipe (rtx_insn *insn)
 {
   if (recog_memoized (insn) < 0)
     return EV4_STOP;
@@ -8828,7 +8833,7 @@ alphaev4_insn_pipe (rtx insn)
 }
 
 static enum alphaev5_pipe
-alphaev5_insn_pipe (rtx insn)
+alphaev5_insn_pipe (rtx_insn *insn)
 {
   if (recog_memoized (insn) < 0)
     return EV5_STOP;
@@ -8888,8 +8893,8 @@ alphaev5_insn_pipe (rtx insn)
 
    LEN is, of course, the length of the group in bytes.  */
 
-static rtx
-alphaev4_next_group (rtx insn, int *pin_use, int *plen)
+static rtx_insn *
+alphaev4_next_group (rtx_insn *insn, int *pin_use, int *plen)
 {
   int len, in_use;
 
@@ -8986,8 +8991,8 @@ alphaev4_next_group (rtx insn, int *pin_use, int *plen)
 
    LEN is, of course, the length of the group in bytes.  */
 
-static rtx
-alphaev5_next_group (rtx insn, int *pin_use, int *plen)
+static rtx_insn *
+alphaev5_next_group (rtx_insn *insn, int *pin_use, int *plen)
 {
   int len, in_use;
 
@@ -9171,7 +9176,7 @@ alphaev5_next_nop (int *pin_use)
 
 static void
 alpha_align_insns (unsigned int max_align,
-		   rtx (*next_group) (rtx, int *, int *),
+		   rtx_insn *(*next_group) (rtx_insn *, int *, int *),
 		   rtx (*next_nop) (int *))
 {
   /* ALIGN is the known alignment for the insn group.  */
@@ -9179,7 +9184,7 @@ alpha_align_insns (unsigned int max_align,
   /* OFS is the offset of the current insn in the insn group.  */
   int ofs;
   int prev_in_use, in_use, len, ldgp;
-  rtx i, next;
+  rtx_insn *i, *next;
 
   /* Let shorten branches care for assigning alignments to code labels.  */
   shorten_branches (get_insns ());
@@ -9237,7 +9242,7 @@ alpha_align_insns (unsigned int max_align,
       else if ((int) align < len)
 	{
 	  unsigned int new_log_align = len > 8 ? 4 : 3;
-	  rtx prev, where;
+	  rtx_insn *prev, *where;
 
 	  where = prev = prev_nonnote_insn (i);
 	  if (!where || !LABEL_P (where))
@@ -9266,7 +9271,7 @@ alpha_align_insns (unsigned int max_align,
       else if (ofs + len > (int) align)
 	{
 	  int nop_count = (align - ofs) / 4;
-	  rtx where;
+	  rtx_insn *where;
 
 	  /* Insert nops before labels, branches, and calls to truly merge
 	     the execution of the nops with the previous instruction group.  */
@@ -9275,7 +9280,7 @@ alpha_align_insns (unsigned int max_align,
 	    {
 	      if (LABEL_P (where))
 		{
-		  rtx where2 = prev_nonnote_insn (where);
+		  rtx_insn *where2 = prev_nonnote_insn (where);
 		  if (where2 && JUMP_P (where2))
 		    where = where2;
 		}
@@ -9302,7 +9307,7 @@ alpha_align_insns (unsigned int max_align,
 static void
 alpha_pad_function_end (void)
 {
-  rtx insn, next;
+  rtx_insn *insn, *next;
 
   for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
     {
-- 
1.8.5.3

[PATCH 176/236] cselib and incdec

[David Malcolm]

gcc/
	* rtl.h (for_each_inc_dec): Strengthen param 1 from rtx * to
	rtx_insn **.
	(check_for_inc_dec): Strengthen param "insn" from rtx to
	rtx_insn *.

	* cselib.h (cselib_process_insn): Likewise.

	* cselib.c (cselib_record_sets): Likewise.
	(cselib_process_insn): Likewise.

	* dse.c (struct insn_info): Likewise for field "insn".
	(check_for_inc_dec_1): Likewise for local "insn".
	(check_for_inc_dec): Likewise for param "insn".
	(scan_insn): Likewise.
	(dse_step1): Likewise for local "insn".

	* rtlanal.c (for_each_inc_dec): Strengthen param 1 from rtx * to
	rtx_insn **.  Use for_each_rtx_in_insn rather than for_each_rtx.
---
 gcc/cselib.c  |  6 +++---
 gcc/cselib.h  |  2 +-
 gcc/dse.c     | 10 +++++-----
 gcc/rtl.h     |  4 ++--
 gcc/rtlanal.c |  6 +++---
 5 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/gcc/cselib.c b/gcc/cselib.c
index 00a04ba..c453904 100644
--- a/gcc/cselib.c
+++ b/gcc/cselib.c
@@ -67,7 +67,7 @@ static cselib_val *cselib_lookup_mem (rtx, int);
 static void cselib_invalidate_regno (unsigned int, enum machine_mode);
 static void cselib_invalidate_mem (rtx);
 static void cselib_record_set (rtx, cselib_val *, cselib_val *);
-static void cselib_record_sets (rtx);
+static void cselib_record_sets (rtx_insn *);
 
 struct expand_value_data
 {
@@ -2468,7 +2468,7 @@ cselib_record_autoinc_cb (rtx mem ATTRIBUTE_UNUSED, rtx op ATTRIBUTE_UNUSED,
 
 /* Record the effects of any sets and autoincs in INSN.  */
 static void
-cselib_record_sets (rtx insn)
+cselib_record_sets (rtx_insn *insn)
 {
   int n_sets = 0;
   int i;
@@ -2626,7 +2626,7 @@ fp_setter_insn (rtx insn)
 /* Record the effects of INSN.  */
 
 void
-cselib_process_insn (rtx insn)
+cselib_process_insn (rtx_insn *insn)
 {
   int i;
   rtx x;
diff --git a/gcc/cselib.h b/gcc/cselib.h
index 785f3b6..62374c0 100644
--- a/gcc/cselib.h
+++ b/gcc/cselib.h
@@ -75,7 +75,7 @@ extern cselib_val *cselib_lookup_from_insn (rtx, enum machine_mode,
 extern void cselib_init (int);
 extern void cselib_clear_table (void);
 extern void cselib_finish (void);
-extern void cselib_process_insn (rtx);
+extern void cselib_process_insn (rtx_insn *);
 extern bool fp_setter_insn (rtx);
 extern enum machine_mode cselib_reg_set_mode (const_rtx);
 extern int rtx_equal_for_cselib_p (rtx, rtx);
diff --git a/gcc/dse.c b/gcc/dse.c
index 167920c..0dc6b22 100644
--- a/gcc/dse.c
+++ b/gcc/dse.c
@@ -380,7 +380,7 @@ struct insn_info
   bool contains_cselib_groups;
 
   /* The insn. */
-  rtx insn;
+  rtx_insn *insn;
 
   /* The list of mem sets or mem clobbers that are contained in this
      insn.  If the insn is deletable, it contains only one mem set.
@@ -904,7 +904,7 @@ emit_inc_dec_insn_before (rtx mem ATTRIBUTE_UNUSED,
 static bool
 check_for_inc_dec_1 (insn_info_t insn_info)
 {
-  rtx insn = insn_info->insn;
+  rtx_insn *insn = insn_info->insn;
   rtx note = find_reg_note (insn, REG_INC, NULL_RTX);
   if (note)
     return for_each_inc_dec (&insn, emit_inc_dec_insn_before, insn_info) == 0;
@@ -917,7 +917,7 @@ check_for_inc_dec_1 (insn_info_t insn_info)
    and add a parameter to this function so that it can be passed down in
    insn_info.fixed_regs_live.  */
 bool
-check_for_inc_dec (rtx insn)
+check_for_inc_dec (rtx_insn *insn)
 {
   struct insn_info insn_info;
   rtx note;
@@ -2444,7 +2444,7 @@ copy_fixed_regs (const_bitmap in)
    non-register target.  */
 
 static void
-scan_insn (bb_info_t bb_info, rtx insn)
+scan_insn (bb_info_t bb_info, rtx_insn *insn)
 {
   rtx body;
   insn_info_t insn_info = (insn_info_t) pool_alloc (insn_info_pool);
@@ -2710,7 +2710,7 @@ dse_step1 (void)
 
       if (bb->index >= NUM_FIXED_BLOCKS)
 	{
-	  rtx insn;
+	  rtx_insn *insn;
 
 	  cse_store_info_pool
 	    = create_alloc_pool ("cse_store_info_pool",
diff --git a/gcc/rtl.h b/gcc/rtl.h
index 3b7ff48..82431f4 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2624,7 +2624,7 @@ extern int for_each_rtx_in_insn (rtx_insn **, rtx_function, void *);
    for_each_inc_dec.  */
 typedef int (*for_each_inc_dec_fn) (rtx mem, rtx op, rtx dest, rtx src,
 				    rtx srcoff, void *arg);
-extern int for_each_inc_dec (rtx *, for_each_inc_dec_fn, void *arg);
+extern int for_each_inc_dec (rtx_insn **, for_each_inc_dec_fn, void *arg);
 
 typedef int (*rtx_equal_p_callback_function) (const_rtx *, const_rtx *,
                                               rtx *, rtx *);
@@ -3029,7 +3029,7 @@ extern int exp_equiv_p (const_rtx, const_rtx, int, bool);
 extern unsigned hash_rtx (const_rtx x, enum machine_mode, int *, int *, bool);
 
 /* In dse.c */
-extern bool check_for_inc_dec (rtx insn);
+extern bool check_for_inc_dec (rtx_insn *insn);
 
 /* In jump.c */
 extern int comparison_dominates_p (enum rtx_code, enum rtx_code);
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 9481d52..5c5e643 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -3120,7 +3120,7 @@ for_each_inc_dec_find_mem (rtx *r, void *d)
   return 0;
 }
 
-/* Traverse *X looking for MEMs, and for autoinc operations within
+/* Traverse *INSN looking for MEMs, and for autoinc operations within
    them.  For each such autoinc operation found, call FN, passing it
    the innermost enclosing MEM, the operation itself, the RTX modified
    by the operation, two RTXs (the second may be NULL) that, once
@@ -3131,7 +3131,7 @@ for_each_inc_dec_find_mem (rtx *r, void *d)
    for_each_inc_dec.  */
 
 int
-for_each_inc_dec (rtx *x,
+for_each_inc_dec (rtx_insn **insn,
 		  for_each_inc_dec_fn fn,
 		  void *arg)
 {
@@ -3141,7 +3141,7 @@ for_each_inc_dec (rtx *x,
   data.arg = arg;
   data.mem = NULL;
 
-  return for_each_rtx (x, for_each_inc_dec_find_mem, &data);
+  return for_each_rtx_in_insn (insn, for_each_inc_dec_find_mem, &data);
 }
 
 \f
-- 
1.8.5.3

[PATCH 160/236] function.c and shrink-wrap.*: more rtx_insn

[David Malcolm]

gcc/
	* function.c (thread_prologue_and_epilogue_insns): Likewise for
	locals "returnjump", "epilogue_end", "insn", "next".

	* shrink-wrap.h (get_unconverted_simple_return): Strengthen param
	"returnjump" from rtx * to rtx_insn **.
	* shrink-wrap.c (get_unconverted_simple_return): Likewise.
---
 gcc/function.c    | 11 ++++++-----
 gcc/shrink-wrap.c |  2 +-
 gcc/shrink-wrap.h |  2 +-
 3 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/gcc/function.c b/gcc/function.c
index c5619e9..771ced9 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -5583,8 +5583,9 @@ thread_prologue_and_epilogue_insns (void)
   vec<edge> unconverted_simple_returns = vNULL;
   bitmap_head bb_flags;
 #endif
-  rtx returnjump;
-  rtx seq ATTRIBUTE_UNUSED, epilogue_end ATTRIBUTE_UNUSED;
+  rtx_insn *returnjump;
+  rtx seq ATTRIBUTE_UNUSED;
+  rtx_insn *epilogue_end ATTRIBUTE_UNUSED;
   rtx prologue_seq ATTRIBUTE_UNUSED, split_prologue_seq ATTRIBUTE_UNUSED;
   edge e, entry_edge, orig_entry_edge, exit_fallthru_edge;
   edge_iterator ei;
@@ -5595,8 +5596,8 @@ thread_prologue_and_epilogue_insns (void)
 
   inserted = false;
   seq = NULL_RTX;
-  epilogue_end = NULL_RTX;
-  returnjump = NULL_RTX;
+  epilogue_end = NULL;
+  returnjump = NULL;
 
   /* Can't deal with multiple successors of the entry block at the
      moment.  Function should always have at least one entry
@@ -5886,7 +5887,7 @@ epilogue_done:
 #ifdef HAVE_epilogue
   if (epilogue_end)
     {
-      rtx insn, next;
+      rtx_insn *insn, *next;
 
       /* Similarly, move any line notes that appear after the epilogue.
          There is no need, however, to be quite so anal about the existence
diff --git a/gcc/shrink-wrap.c b/gcc/shrink-wrap.c
index 785ca21..8f77ab3 100644
--- a/gcc/shrink-wrap.c
+++ b/gcc/shrink-wrap.c
@@ -790,7 +790,7 @@ try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
 edge
 get_unconverted_simple_return (edge exit_fallthru_edge, bitmap_head bb_flags,
 			       vec<edge> *unconverted_simple_returns,
-			       rtx *returnjump)
+			       rtx_insn **returnjump)
 {
   if (optimize)
     {
diff --git a/gcc/shrink-wrap.h b/gcc/shrink-wrap.h
index 5576d36..66bd26d 100644
--- a/gcc/shrink-wrap.h
+++ b/gcc/shrink-wrap.h
@@ -42,7 +42,7 @@ extern void dup_block_and_redirect (basic_block bb, basic_block copy_bb,
 extern void try_shrink_wrapping (edge *entry_edge, edge orig_entry_edge,
 				 bitmap_head *bb_flags, rtx prologue_seq);
 extern edge get_unconverted_simple_return (edge, bitmap_head,
-					   vec<edge> *, rtx *);
+					   vec<edge> *, rtx_insn **);
 extern void convert_to_simple_return (edge entry_edge, edge orig_entry_edge,
 				      bitmap_head bb_flags, rtx returnjump,
 				      vec<edge> unconverted_simple_returns);
-- 
1.8.5.3

[PATCH 062/236] combine-stack-adj.c: Use rtx_insn

[David Malcolm]

gcc/
	* combine-stack-adj.c (struct csa_reflist): Strengthen field
	"insn" from rtx to rtx_insn *.
	(single_set_for_csa): Likewise for param "insn".
	(record_one_stack_ref): Likewise.
	(try_apply_stack_adjustment): Likewise.
	(struct record_stack_refs_data): Likewise for field "insn".
	(maybe_move_args_size_note): Likewise for params "last" and "insn".
	(prev_active_insn_bb): Likewise for return type and param "insn".
	(next_active_insn_bb): Likewise.
	(force_move_args_size_note): Likewise for params "prev" and "last"
	and locals "test", "next_candidate", "prev_candidate".
	(combine_stack_adjustments_for_block): Strengthen locals
	"last_sp_set", "last2_sp_set", "insn", "next" from rtx to
	rtx_insn *.
---
 gcc/combine-stack-adj.c | 49 ++++++++++++++++++++++++++-----------------------
 1 file changed, 26 insertions(+), 23 deletions(-)

diff --git a/gcc/combine-stack-adj.c b/gcc/combine-stack-adj.c
index 11434dd..29bd3d3 100644
--- a/gcc/combine-stack-adj.c
+++ b/gcc/combine-stack-adj.c
@@ -73,16 +73,17 @@ along with GCC; see the file COPYING3.  If not see
 struct csa_reflist
 {
   HOST_WIDE_INT sp_offset;
-  rtx insn, *ref;
+  rtx_insn *insn;
+  rtx *ref;
   struct csa_reflist *next;
 };
 
 static int stack_memref_p (rtx);
-static rtx single_set_for_csa (rtx);
+static rtx single_set_for_csa (rtx_insn *);
 static void free_csa_reflist (struct csa_reflist *);
-static struct csa_reflist *record_one_stack_ref (rtx, rtx *,
+static struct csa_reflist *record_one_stack_ref (rtx_insn *, rtx *,
 						 struct csa_reflist *);
-static int try_apply_stack_adjustment (rtx, struct csa_reflist *,
+static int try_apply_stack_adjustment (rtx_insn *, struct csa_reflist *,
 				       HOST_WIDE_INT, HOST_WIDE_INT);
 static void combine_stack_adjustments_for_block (basic_block);
 static int record_stack_refs (rtx *, void *);
@@ -122,7 +123,7 @@ stack_memref_p (rtx x)
    tying fp and sp adjustments.  */
 
 static rtx
-single_set_for_csa (rtx insn)
+single_set_for_csa (rtx_insn *insn)
 {
   int i;
   rtx tmp = single_set (insn);
@@ -171,7 +172,7 @@ free_csa_reflist (struct csa_reflist *reflist)
    predicate stack_memref_p or a REG representing the stack pointer.  */
 
 static struct csa_reflist *
-record_one_stack_ref (rtx insn, rtx *ref, struct csa_reflist *next_reflist)
+record_one_stack_ref (rtx_insn *insn, rtx *ref, struct csa_reflist *next_reflist)
 {
   struct csa_reflist *ml;
 
@@ -194,7 +195,7 @@ record_one_stack_ref (rtx insn, rtx *ref, struct csa_reflist *next_reflist)
    on success.  */
 
 static int
-try_apply_stack_adjustment (rtx insn, struct csa_reflist *reflist,
+try_apply_stack_adjustment (rtx_insn *insn, struct csa_reflist *reflist,
 			    HOST_WIDE_INT new_adjust, HOST_WIDE_INT delta)
 {
   struct csa_reflist *ml;
@@ -240,7 +241,7 @@ try_apply_stack_adjustment (rtx insn, struct csa_reflist *reflist,
    references in the insn and discard all other stack pointer references.  */
 struct record_stack_refs_data
 {
-  rtx insn;
+  rtx_insn *insn;
   struct csa_reflist *reflist;
 };
 
@@ -297,7 +298,7 @@ record_stack_refs (rtx *xp, void *data)
    AFTER is true iff LAST follows INSN in the instruction stream.  */
 
 static void
-maybe_move_args_size_note (rtx last, rtx insn, bool after)
+maybe_move_args_size_note (rtx_insn *last, rtx_insn *insn, bool after)
 {
   rtx note, last_note;
 
@@ -319,35 +320,36 @@ maybe_move_args_size_note (rtx last, rtx insn, bool after)
 
 /* Return the next (or previous) active insn within BB.  */
 
-static rtx
-prev_active_insn_bb (basic_block bb, rtx insn)
+static rtx_insn *
+prev_active_insn_bb (basic_block bb, rtx_insn *insn)
 {
   for (insn = PREV_INSN (insn);
        insn != PREV_INSN (BB_HEAD (bb));
        insn = PREV_INSN (insn))
     if (active_insn_p (insn))
       return insn;
-  return NULL_RTX;
+  return NULL;
 }
 
-static rtx
-next_active_insn_bb (basic_block bb, rtx insn)
+static rtx_insn *
+next_active_insn_bb (basic_block bb, rtx_insn *insn)
 {
   for (insn = NEXT_INSN (insn);
        insn != NEXT_INSN (BB_END (bb));
        insn = NEXT_INSN (insn))
     if (active_insn_p (insn))
       return insn;
-  return NULL_RTX;
+  return NULL;
 }
 
 /* If INSN has a REG_ARGS_SIZE note, if possible move it to PREV.  Otherwise
    search for a nearby candidate within BB where we can stick the note.  */
 
 static void
-force_move_args_size_note (basic_block bb, rtx prev, rtx insn)
+force_move_args_size_note (basic_block bb, rtx_insn *prev, rtx_insn *insn)
 {
-  rtx note, test, next_candidate, prev_candidate;
+  rtx note;
+  rtx_insn *test, *next_candidate, *prev_candidate;
 
   /* If PREV exists, tail-call to the logic in the other function.  */
   if (prev)
@@ -425,10 +427,11 @@ static void
 combine_stack_adjustments_for_block (basic_block bb)
 {
   HOST_WIDE_INT last_sp_adjust = 0;
-  rtx last_sp_set = NULL_RTX;
-  rtx last2_sp_set = NULL_RTX;
+  rtx_insn *last_sp_set = NULL;
+  rtx_insn *last2_sp_set = NULL;
   struct csa_reflist *reflist = NULL;
-  rtx insn, next, set;
+  rtx_insn *insn, *next;
+  rtx set;
   struct record_stack_refs_data data;
   bool end_of_block = false;
 
@@ -574,7 +577,7 @@ combine_stack_adjustments_for_block (basic_block bb)
 	      delete_insn (last_sp_set);
 	      free_csa_reflist (reflist);
 	      reflist = NULL;
-	      last_sp_set = NULL_RTX;
+	      last_sp_set = NULL;
 	      last_sp_adjust = 0;
 	      continue;
 	    }
@@ -603,8 +606,8 @@ combine_stack_adjustments_for_block (basic_block bb)
 	    }
 	  free_csa_reflist (reflist);
 	  reflist = NULL;
-	  last2_sp_set = NULL_RTX;
-	  last_sp_set = NULL_RTX;
+	  last2_sp_set = NULL;
+	  last_sp_set = NULL;
 	  last_sp_adjust = 0;
 	}
     }
-- 
1.8.5.3

[PATCH 208/236] resource.c: Use rtx_sequence

[David Malcolm]

gcc/
	* resource.c (mark_referenced_resources): Strengthen local
	"sequence" from rtx to rtx_sequence *, adding a checked cast, and
	using methods of rtx_sequence to clarify the code.
	(find_dead_or_set_registers): Within the switch statement, convert
	a GET_CODE check to a dyn_cast, introducing local "seq".  Within
	the JUMP_P handling, introduce another local "seq", adding a
	checked cast to rtx_sequence *.  In both cases, use methods of
	rtx_sequence to clarify the code.
	(mark_set_resources): Within SEQUENCE case, introduce local "seq"
	via a checked cast, and use methods of rtx_sequence to simplify
	the code.
---
 gcc/resource.c | 35 +++++++++++++++++++----------------
 1 file changed, 19 insertions(+), 16 deletions(-)

diff --git a/gcc/resource.c b/gcc/resource.c
index ef08976..dfd10f6 100644
--- a/gcc/resource.c
+++ b/gcc/resource.c
@@ -309,15 +309,15 @@ mark_referenced_resources (rtx x, struct resources *res,
 	     into the delay slot of this CALL.  If so, the USE's for them
 	     don't count and should be skipped.  */
 	  rtx_insn *insn = PREV_INSN (x);
-	  rtx sequence = 0;
+	  rtx_sequence *sequence = 0;
 	  int seq_size = 0;
 	  int i;
 
 	  /* If we are part of a delay slot sequence, point at the SEQUENCE.  */
 	  if (NEXT_INSN (insn) != x)
 	    {
-	      sequence = PATTERN (NEXT_INSN (insn));
-	      seq_size = XVECLEN (sequence, 0);
+	      sequence = as_a <rtx_sequence *> (PATTERN (NEXT_INSN (insn)));
+	      seq_size = sequence->len ();
 	      gcc_assert (GET_CODE (sequence) == SEQUENCE);
 	    }
 
@@ -356,7 +356,7 @@ mark_referenced_resources (rtx x, struct resources *res,
 		{
 		  for (i = 1; i < seq_size; i++)
 		    {
-		      rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
+		      rtx slot_pat = PATTERN (sequence->element (i));
 		      if (GET_CODE (slot_pat) == SET
 			  && rtx_equal_p (SET_DEST (slot_pat),
 					  XEXP (XEXP (link, 0), 0)))
@@ -473,13 +473,14 @@ find_dead_or_set_registers (rtx target, struct resources *res,
 	    }
 	  else if (GET_CODE (PATTERN (insn)) == CLOBBER)
 	    continue;
-	  else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
+	  else if (rtx_sequence *seq =
+		     dyn_cast <rtx_sequence *> (PATTERN (insn)))
 	    {
 	      /* An unconditional jump can be used to fill the delay slot
 		 of a call, so search for a JUMP_INSN in any position.  */
-	      for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
+	      for (i = 0; i < seq->len (); i++)
 		{
-		  this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
+		  this_jump_insn = seq->element (i);
 		  if (JUMP_P (this_jump_insn))
 		    break;
 		}
@@ -536,17 +537,18 @@ find_dead_or_set_registers (rtx target, struct resources *res,
 		  if (GET_CODE (PATTERN (insn)) == SEQUENCE
 		      && INSN_ANNULLED_BRANCH_P (this_jump_insn))
 		    {
-		      for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
-			INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
-			  = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
+		      rtx_sequence *seq = as_a <rtx_sequence *> (PATTERN (insn));
+		      for (i = 1; i < seq->len (); i++)
+			INSN_FROM_TARGET_P (seq->element (i))
+			  = ! INSN_FROM_TARGET_P (seq->element (i));
 
 		      target_set = set;
 		      mark_set_resources (insn, &target_set, 0,
 					  MARK_SRC_DEST_CALL);
 
-		      for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
-			INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
-			  = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
+		      for (i = 1; i < seq->len (); i++)
+			INSN_FROM_TARGET_P (seq->element (i))
+			  = ! INSN_FROM_TARGET_P (seq->element (i));
 
 		      mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
 		    }
@@ -712,13 +714,14 @@ mark_set_resources (rtx x, struct resources *res, int in_dest,
 
     case SEQUENCE:
       {
-        rtx control = XVECEXP (x, 0, 0);
+        rtx_sequence *seq = as_a <rtx_sequence *> (x);
+        rtx control = seq->element (0);
         bool annul_p = JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control);
 
         mark_set_resources (control, res, 0, mark_type);
-        for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
+        for (i = seq->len () - 1; i >= 0; --i)
 	  {
-	    rtx elt = XVECEXP (x, 0, i);
+	    rtx elt = seq->element (i);
 	    if (!annul_p && INSN_FROM_TARGET_P (elt))
 	      mark_set_resources (elt, res, 0, mark_type);
 	  }
-- 
1.8.5.3

[PATCH 210/236] varasm.c: Use rtx_sequence

[David Malcolm]

gcc/
	* varasm.c (mark_constants): Convert a GET_CODE check into a
	dyn_cast, strengthening local "seq" from rtx to rtx_sequence *.
	Use methods of rtx_sequence to clarify the code.
---
 gcc/varasm.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/gcc/varasm.c b/gcc/varasm.c
index 8c65c1c..2b05915 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -3957,13 +3957,12 @@ mark_constants (rtx_insn *insn)
   /* Insns may appear inside a SEQUENCE.  Only check the patterns of
      insns, not any notes that may be attached.  We don't want to mark
      a constant just because it happens to appear in a REG_EQUIV note.  */
-  if (GET_CODE (PATTERN (insn)) == SEQUENCE)
+  if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
     {
-      rtx seq = PATTERN (insn);
-      int i, n = XVECLEN (seq, 0);
+      int i, n = seq->len ();
       for (i = 0; i < n; ++i)
 	{
-	  rtx subinsn = XVECEXP (seq, 0, i);
+	  rtx subinsn = seq->element (i);
 	  if (INSN_P (subinsn))
 	    for_each_rtx (&PATTERN (subinsn), mark_constant, NULL);
 	}
-- 
1.8.5.3

[PATCH 059/236] cfgloopanal.c: Use rtx_insn

[David Malcolm]

gcc/
	* cfgloopanal.c (num_loop_insns): Strengthen local "insn" from
	rtx to rtx_insn *.
	(average_num_loop_insns): Likewise.
	(init_set_costs): Likewise for local "seq".
	(seq_cost): Likewise for param "seq", from const_rtx to const
	rtx_insn *.
---
 gcc/cfgloopanal.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/cfgloopanal.c b/gcc/cfgloopanal.c
index e01b9cc..7ea1a5f 100644
--- a/gcc/cfgloopanal.c
+++ b/gcc/cfgloopanal.c
@@ -174,7 +174,7 @@ num_loop_insns (const struct loop *loop)
 {
   basic_block *bbs, bb;
   unsigned i, ninsns = 0;
-  rtx insn;
+  rtx_insn *insn;
 
   bbs = get_loop_body (loop);
   for (i = 0; i < loop->num_nodes; i++)
@@ -198,7 +198,7 @@ average_num_loop_insns (const struct loop *loop)
 {
   basic_block *bbs, bb;
   unsigned i, binsns, ninsns, ratio;
-  rtx insn;
+  rtx_insn *insn;
 
   ninsns = 0;
   bbs = get_loop_body (loop);
@@ -305,7 +305,7 @@ get_loop_level (const struct loop *loop)
 /* Returns estimate on cost of computing SEQ.  */
 
 static unsigned
-seq_cost (const_rtx seq, bool speed)
+seq_cost (const rtx_insn *seq, bool speed)
 {
   unsigned cost = 0;
   rtx set;
@@ -328,7 +328,7 @@ void
 init_set_costs (void)
 {
   int speed;
-  rtx seq;
+  rtx_insn *seq;
   rtx reg1 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER);
   rtx reg2 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER + 1);
   rtx addr = gen_raw_REG (Pmode, FIRST_PSEUDO_REGISTER + 2);
-- 
1.8.5.3

[PATCH 113/236] sched-rgn.c: Use rtx_insn in a couple of places

[David Malcolm]

gcc/
	* sched-rgn.c (is_cfg_nonregular): Strengthen locals "insn" and
	"next" from rtx to rtx_insn *.
	(find_conditional_protection): Likewise for local "next".
	(is_conditionally_protected): Likewise for local "insn1".
	(is_pfree): Likewise for locals "insn1", "insn2".
---
 gcc/sched-rgn.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/gcc/sched-rgn.c b/gcc/sched-rgn.c
index f8660f8..68cab02 100644
--- a/gcc/sched-rgn.c
+++ b/gcc/sched-rgn.c
@@ -256,7 +256,7 @@ static int
 is_cfg_nonregular (void)
 {
   basic_block b;
-  rtx insn;
+  rtx_insn *insn;
 
   /* If we have a label that could be the target of a nonlocal goto, then
      the cfg is not well structured.  */
@@ -278,7 +278,8 @@ is_cfg_nonregular (void)
   FOR_EACH_BB_FN (b, cfun)
     FOR_BB_INSNS (b, insn)
       {
-	rtx note, next, set, dest;
+	rtx note, set, dest;
+	rtx_insn *next;
 
 	/* If this function has a computed jump, then we consider the cfg
 	   not well structured.  */
@@ -1877,7 +1878,7 @@ find_conditional_protection (rtx insn, int load_insn_bb)
   /* Iterate through DEF-USE forward dependences.  */
   FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
     {
-      rtx next = DEP_CON (dep);
+      rtx_insn *next = DEP_CON (dep);
 
       if ((CONTAINING_RGN (BLOCK_NUM (next)) ==
 	   CONTAINING_RGN (BB_TO_BLOCK (load_insn_bb)))
@@ -1913,7 +1914,7 @@ is_conditionally_protected (rtx load_insn, int bb_src, int bb_trg)
 
   FOR_EACH_DEP (load_insn, SD_LIST_BACK, sd_it, dep)
     {
-      rtx insn1 = DEP_PRO (dep);
+      rtx_insn *insn1 = DEP_PRO (dep);
 
       /* Must be a DEF-USE dependence upon non-branch.  */
       if (DEP_TYPE (dep) != REG_DEP_TRUE
@@ -1969,7 +1970,7 @@ is_pfree (rtx load_insn, int bb_src, int bb_trg)
 
   FOR_EACH_DEP (load_insn, SD_LIST_BACK, back_sd_it, back_dep)
     {
-      rtx insn1 = DEP_PRO (back_dep);
+      rtx_insn *insn1 = DEP_PRO (back_dep);
 
       if (DEP_TYPE (back_dep) == REG_DEP_TRUE)
 	/* Found a DEF-USE dependence (insn1, load_insn).  */
@@ -1979,7 +1980,7 @@ is_pfree (rtx load_insn, int bb_src, int bb_trg)
 
 	  FOR_EACH_DEP (insn1, SD_LIST_FORW, fore_sd_it, fore_dep)
 	    {
-	      rtx insn2 = DEP_CON (fore_dep);
+	      rtx_insn *insn2 = DEP_CON (fore_dep);
 
 	      if (DEP_TYPE (fore_dep) == REG_DEP_TRUE)
 		{
-- 
1.8.5.3

[PATCH 037/236] sel_bb_{head|end} return rtx_insn

[David Malcolm]

gcc/
	* sel-sched-ir.h (exit_insn): Strengthen from rtx to rtx_insn *.
	(sel_bb_head): Strengthen return type insn_t (currently just an
	rtx) to rtx_insn *.
	(sel_bb_end): Likewise.

	* sel-sched-ir.c (exit_insn): Strengthen from rtx to rtx_insn *.
	(sel_bb_head): Strengthen return type and local "head" from
	insn_t (currently just an rtx) to rtx_insn *.
	(sel_bb_end): Likewise for return type.
	(free_nop_and_exit_insns): Replace use of NULL_RTX with NULL when
	working with insn.
---
 gcc/sel-sched-ir.c | 14 +++++++-------
 gcc/sel-sched-ir.h | 10 +++++-----
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index d7352b7..43569ee 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -132,7 +132,7 @@ static vec<rtx_note *> bb_note_pool;
 rtx nop_pattern = NULL_RTX;
 /* A special instruction that resides in EXIT_BLOCK.
    EXIT_INSN is successor of the insns that lead to EXIT_BLOCK.  */
-rtx exit_insn = NULL_RTX;
+rtx_insn *exit_insn = NULL;
 
 /* TRUE if while scheduling current region, which is loop, its preheader
    was removed.  */
@@ -4535,10 +4535,10 @@ static struct
 /* Functions to work with control-flow graph.  */
 
 /* Return basic block note of BB.  */
-insn_t
+rtx_insn *
 sel_bb_head (basic_block bb)
 {
-  insn_t head;
+  rtx_insn *head;
 
   if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
     {
@@ -4553,7 +4553,7 @@ sel_bb_head (basic_block bb)
       head = next_nonnote_insn (note);
 
       if (head && (BARRIER_P (head) || BLOCK_FOR_INSN (head) != bb))
-	head = NULL_RTX;
+	head = NULL;
     }
 
   return head;
@@ -4567,11 +4567,11 @@ sel_bb_head_p (insn_t insn)
 }
 
 /* Return last insn of BB.  */
-insn_t
+rtx_insn *
 sel_bb_end (basic_block bb)
 {
   if (sel_bb_empty_p (bb))
-    return NULL_RTX;
+    return NULL;
 
   gcc_assert (bb != EXIT_BLOCK_PTR_FOR_FN (cfun));
 
@@ -5858,7 +5858,7 @@ setup_nop_and_exit_insns (void)
 void
 free_nop_and_exit_insns (void)
 {
-  exit_insn = NULL_RTX;
+  exit_insn = NULL;
   nop_pattern = NULL_RTX;
 }
 
diff --git a/gcc/sel-sched-ir.h b/gcc/sel-sched-ir.h
index ab1f42f..16e7806 100644
--- a/gcc/sel-sched-ir.h
+++ b/gcc/sel-sched-ir.h
@@ -809,7 +809,7 @@ extern flist_t fences;
 extern rtx nop_pattern;
 
 /* An insn that 'contained' in EXIT block.  */
-extern rtx exit_insn;
+extern rtx_insn *exit_insn;
 
 /* Provide a separate luid for the insn.  */
 #define INSN_INIT_TODO_LUID (1)
@@ -1012,8 +1012,8 @@ struct succs_info
 /* Some needed definitions.  */
 extern basic_block after_recovery;
 
-extern insn_t sel_bb_head (basic_block);
-extern insn_t sel_bb_end (basic_block);
+extern rtx_insn *sel_bb_head (basic_block);
+extern rtx_insn *sel_bb_end (basic_block);
 extern bool sel_bb_empty_p (basic_block);
 extern bool in_current_region_p (basic_block);
 
@@ -1583,9 +1583,9 @@ extern bool insn_at_boundary_p (insn_t);
 
 /* Basic block and CFG functions.  */
 
-extern insn_t sel_bb_head (basic_block);
+extern rtx_insn *sel_bb_head (basic_block);
 extern bool sel_bb_head_p (insn_t);
-extern insn_t sel_bb_end (basic_block);
+extern rtx_insn *sel_bb_end (basic_block);
 extern bool sel_bb_end_p (insn_t);
 extern bool sel_bb_empty_p (basic_block);
 
-- 
1.8.5.3

Re: [PATCH 037/236] sel_bb_{head|end} return rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* sel-sched-ir.h (exit_insn): Strengthen from rtx to rtx_insn *.
> 	(sel_bb_head): Strengthen return type insn_t (currently just an
> 	rtx) to rtx_insn *.
> 	(sel_bb_end): Likewise.
>
> 	* sel-sched-ir.c (exit_insn): Strengthen from rtx to rtx_insn *.
> 	(sel_bb_head): Strengthen return type and local "head" from
> 	insn_t (currently just an rtx) to rtx_insn *.
> 	(sel_bb_end): Likewise for return type.
> 	(free_nop_and_exit_insns): Replace use of NULL_RTX with NULL when
> 	working with insn.
OK.
Jeff

Re: [PATCH 037/236] sel_bb_{head|end} return rtx_insn

[David Malcolm]

On Wed, 2014-08-13 at 12:00 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* sel-sched-ir.h (exit_insn): Strengthen from rtx to rtx_insn *.
> > 	(sel_bb_head): Strengthen return type insn_t (currently just an
> > 	rtx) to rtx_insn *.
> > 	(sel_bb_end): Likewise.
> >
> > 	* sel-sched-ir.c (exit_insn): Strengthen from rtx to rtx_insn *.
> > 	(sel_bb_head): Strengthen return type and local "head" from
> > 	insn_t (currently just an rtx) to rtx_insn *.
> > 	(sel_bb_end): Likewise for return type.
> > 	(free_nop_and_exit_insns): Replace use of NULL_RTX with NULL when
> > 	working with insn.
> OK.
Thanks; committed to trunk as r214247.

[PATCH 129/236] config/avr: Use rtx_insn

[David Malcolm]

gcc/
	* config/avr/avr-protos.h (output_movqi): Strengthen first param
	from rtx to rtx_insn *.
	(output_movhi): Likewise.
	(output_movsisf): Likewise.
	(avr_out_tstsi): Likewise.
	(avr_out_tsthi): Likewise.
	(avr_out_tstpsi): Likewise.
	(avr_out_compare): Likewise.
	(avr_out_compare64): Likewise.
	(avr_out_movpsi): Likewise.
	(ashlqi3_out): Likewise.
	(ashlhi3_out): Likewise.
	(ashlsi3_out): Likewise.
	(ashrqi3_out): Likewise.
	(ashrhi3_out): Likewise.
	(ashrsi3_out): Likewise.
	(lshrqi3_out): Likewise.
	(lshrhi3_out): Likewise.
	(lshrsi3_out): Likewise.
	(avr_out_ashlpsi3): Likewise.
	(avr_out_ashrpsi3): Likewise.
	(avr_out_lshrpsi3): Likewise.
	(avr_out_fract): Likewise.
	(avr_out_sbxx_branch): Likewise.
	(avr_out_round): Likewise.
	(avr_out_xload): Likewise.
	(avr_out_movmem): Likewise.
	(adjust_insn_length): Likewise.
	(avr_out_lpm): Likewise.
	(reg_unused_after): Likewise.
	(_reg_unused_after): Likewise.
	(avr_jump_mode): Likewise for second param.
	(jump_over_one_insn): Likewise for first param.
	(avr_final_prescan_insn): Likewise.
	(out_shift_with_cnt): Likewise for second param.

	* config/avr/avr.c (get_sequence_length): Likewise for param
	"insns" and local "insn".
	(emit_push_byte): Likewise for local "insn".
	(emit_push_sfr): Likewise.
	(avr_prologue_setup_frame): Likewise for locals "insn",
	"fp_plus_insns", "sp_plus_insns".
	(avr_expand_epilogue): Likewise for local "fp_plus_insns",
	"sp_plus_insns".
	(avr_jump_mode): Likewise for param "insn".
	(avr_final_prescan_insn): Likewise.
	(avr_find_unused_d_reg): Likewise.
	(avr_out_lpm_no_lpmx): Likewise.
	(avr_out_lpm): Likewise.
	(avr_out_xload): Likewise.
	(output_movqi): Likewise.
	(output_movhi): Likewise.
	(out_movqi_r_mr): Likewise.
	(out_movhi_r_mr): Likewise.
	(out_movsi_r_mr): Likewise.
	(out_movsi_mr_r): Likewise.
	(output_movsisf): Likewise.
	(avr_out_load_psi): Likewise.
	(avr_out_store_psi): Likewise.
	(avr_out_movpsi): Likewise.
	(out_movqi_mr_r): Likewise.
	(avr_out_movhi_mr_r_xmega): Likewise.
	(out_movhi_mr_r): Likewise.
	(compare_condition): Likewise for param "insn" and local "next".
	(compare_sign_p): Likewise for param "insn".
	(compare_diff_p): Likewise.
	(compare_eq_p): Likewise.
	(avr_out_compare): Likewise.
	(avr_out_compare64): Likewise.
	(avr_out_tsthi): Likewise.
	(avr_out_tstpsi): Likewise.
	(avr_out_tstsi): Likewise.
	(out_shift_with_cnt): Likewise.
	(ashlqi3_out): Likewise.
	(ashlhi3_out): Likewise.
	(avr_out_ashlpsi3): Likewise.
	(ashlsi3_out): Likewise.
	(ashrqi3_out): Likewise.
	(ashrhi3_out): Likewise.
	(avr_out_ashrpsi3): Likewise.
	(ashrsi3_out): Likewise.
	(lshrqi3_out): Likewise.
	(lshrhi3_out): Likewise.
	(avr_out_lshrpsi3): Likewise.
	(lshrsi3_out): Likewise.
	(avr_out_fract): Likewise.
	(avr_out_round): Likewise.
	(avr_adjust_insn_length): Likewise.
	(reg_unused_after): Likewise.
	(_reg_unused_after): Likewise.
	(avr_compare_pattern): Likewise.
	(avr_reorg_remove_redundant_compare): Likewise for param "insn1"
	and locals "branch1", "branch2", "insn2", "jump".
	(avr_reorg): Likewise for local "insn".
	(avr_2word_insn_p): Likewise for param "insn".
	(jump_over_one_insn_p): Likewise.
	(avr_out_sbxx_branch): Likewise.
	(avr_out_movmem): Likewise.
---
 gcc/config/avr/avr-protos.h |  69 ++++++++++----------
 gcc/config/avr/avr.c        | 153 +++++++++++++++++++++++---------------------
 2 files changed, 114 insertions(+), 108 deletions(-)

diff --git a/gcc/config/avr/avr-protos.h b/gcc/config/avr/avr-protos.h
index c5ce784..9fa9324 100644
--- a/gcc/config/avr/avr-protos.h
+++ b/gcc/config/avr/avr-protos.h
@@ -45,36 +45,36 @@ extern void avr_init_cumulative_args (CUMULATIVE_ARGS*, tree, rtx, tree);
 
 #ifdef RTX_CODE
 extern int avr_hard_regno_call_part_clobbered (unsigned, enum machine_mode);
-extern const char *output_movqi (rtx insn, rtx operands[], int *l);
-extern const char *output_movhi (rtx insn, rtx operands[], int *l);
-extern const char *output_movsisf (rtx insn, rtx operands[], int *l);
-extern const char *avr_out_tstsi (rtx, rtx*, int*);
-extern const char *avr_out_tsthi (rtx, rtx*, int*);
-extern const char *avr_out_tstpsi (rtx, rtx*, int*);
-extern const char *avr_out_compare (rtx, rtx*, int*);
-extern const char *avr_out_compare64 (rtx, rtx*, int*);
+extern const char *output_movqi (rtx_insn *insn, rtx operands[], int *l);
+extern const char *output_movhi (rtx_insn *insn, rtx operands[], int *l);
+extern const char *output_movsisf (rtx_insn *insn, rtx operands[], int *l);
+extern const char *avr_out_tstsi (rtx_insn *, rtx*, int*);
+extern const char *avr_out_tsthi (rtx_insn *, rtx*, int*);
+extern const char *avr_out_tstpsi (rtx_insn *, rtx*, int*);
+extern const char *avr_out_compare (rtx_insn *, rtx*, int*);
+extern const char *avr_out_compare64 (rtx_insn *, rtx*, int*);
 extern const char *ret_cond_branch (rtx x, int len, int reverse);
-extern const char *avr_out_movpsi (rtx, rtx*, int*);
+extern const char *avr_out_movpsi (rtx_insn *, rtx*, int*);
 
-extern const char *ashlqi3_out (rtx insn, rtx operands[], int *len);
-extern const char *ashlhi3_out (rtx insn, rtx operands[], int *len);
-extern const char *ashlsi3_out (rtx insn, rtx operands[], int *len);
+extern const char *ashlqi3_out (rtx_insn *insn, rtx operands[], int *len);
+extern const char *ashlhi3_out (rtx_insn *insn, rtx operands[], int *len);
+extern const char *ashlsi3_out (rtx_insn *insn, rtx operands[], int *len);
 
-extern const char *ashrqi3_out (rtx insn, rtx operands[], int *len);
-extern const char *ashrhi3_out (rtx insn, rtx operands[], int *len);
-extern const char *ashrsi3_out (rtx insn, rtx operands[], int *len);
+extern const char *ashrqi3_out (rtx_insn *insn, rtx operands[], int *len);
+extern const char *ashrhi3_out (rtx_insn *insn, rtx operands[], int *len);
+extern const char *ashrsi3_out (rtx_insn *insn, rtx operands[], int *len);
 
-extern const char *lshrqi3_out (rtx insn, rtx operands[], int *len);
-extern const char *lshrhi3_out (rtx insn, rtx operands[], int *len);
-extern const char *lshrsi3_out (rtx insn, rtx operands[], int *len);
+extern const char *lshrqi3_out (rtx_insn *insn, rtx operands[], int *len);
+extern const char *lshrhi3_out (rtx_insn *insn, rtx operands[], int *len);
+extern const char *lshrsi3_out (rtx_insn *insn, rtx operands[], int *len);
 
-extern const char *avr_out_ashlpsi3 (rtx, rtx*, int*);
-extern const char *avr_out_ashrpsi3 (rtx, rtx*, int*);
-extern const char *avr_out_lshrpsi3 (rtx, rtx*, int*);
+extern const char *avr_out_ashlpsi3 (rtx_insn *, rtx*, int*);
+extern const char *avr_out_ashrpsi3 (rtx_insn *, rtx*, int*);
+extern const char *avr_out_lshrpsi3 (rtx_insn *, rtx*, int*);
 
 extern bool avr_rotate_bytes (rtx operands[]);
 
-extern const char* avr_out_fract (rtx, rtx[], bool, int*);
+extern const char* avr_out_fract (rtx_insn *, rtx[], bool, int*);
 extern rtx avr_to_int_mode (rtx);
 
 extern void avr_expand_prologue (void);
@@ -84,36 +84,37 @@ extern int avr_epilogue_uses (int regno);
 extern int avr_starting_frame_offset (void);
 
 extern void avr_output_addr_vec_elt (FILE *stream, int value);
-extern const char *avr_out_sbxx_branch (rtx insn, rtx operands[]);
+extern const char *avr_out_sbxx_branch (rtx_insn *insn, rtx operands[]);
 extern const char* avr_out_bitop (rtx, rtx*, int*);
 extern const char* avr_out_plus (rtx, rtx*, int* =NULL, int* =NULL, bool =true);
-extern const char* avr_out_round (rtx, rtx*, int* =NULL);
+extern const char* avr_out_round (rtx_insn *, rtx*, int* =NULL);
 extern const char* avr_out_addto_sp (rtx*, int*);
-extern const char* avr_out_xload (rtx, rtx*, int*);
-extern const char* avr_out_movmem (rtx, rtx*, int*);
+extern const char* avr_out_xload (rtx_insn *, rtx*, int*);
+extern const char* avr_out_movmem (rtx_insn *, rtx*, int*);
 extern const char* avr_out_insert_bits (rtx*, int*);
 extern bool avr_popcount_each_byte (rtx, int, int);
 extern bool avr_has_nibble_0xf (rtx);
 
 extern int extra_constraint_Q (rtx x);
-extern int avr_adjust_insn_length (rtx insn, int len);
+extern int avr_adjust_insn_length (rtx_insn *insn, int len);
 extern const char* output_reload_inhi (rtx*, rtx, int*);
 extern const char* output_reload_insisf (rtx*, rtx, int*);
 extern const char* avr_out_reload_inpsi (rtx*, rtx, int*);
-extern const char* avr_out_lpm (rtx, rtx*, int*);
+extern const char* avr_out_lpm (rtx_insn *, rtx*, int*);
 extern void avr_notice_update_cc (rtx body, rtx insn);
-extern int reg_unused_after (rtx insn, rtx reg);
-extern int _reg_unused_after (rtx insn, rtx reg);
-extern int avr_jump_mode (rtx x, rtx insn);
+extern int reg_unused_after (rtx_insn *insn, rtx reg);
+extern int _reg_unused_after (rtx_insn *insn, rtx reg);
+extern int avr_jump_mode (rtx x, rtx_insn *insn);
 extern int test_hard_reg_class (enum reg_class rclass, rtx x);
-extern int jump_over_one_insn_p (rtx insn, rtx dest);
+extern int jump_over_one_insn_p (rtx_insn *insn, rtx dest);
 
 extern int avr_hard_regno_mode_ok (int regno, enum machine_mode mode);
-extern void avr_final_prescan_insn (rtx insn, rtx *operand, int num_operands);
+extern void avr_final_prescan_insn (rtx_insn *insn, rtx *operand,
+				    int num_operands);
 extern int avr_simplify_comparison_p (enum machine_mode mode,
 				      RTX_CODE op, rtx x);
 extern RTX_CODE avr_normalize_condition (RTX_CODE condition);
-extern void out_shift_with_cnt (const char *templ, rtx insn,
+extern void out_shift_with_cnt (const char *templ, rtx_insn *insn,
 				rtx operands[], int *len, int t_len);
 extern enum reg_class avr_mode_code_base_reg_class (enum machine_mode, addr_space_t, RTX_CODE, RTX_CODE);
 extern bool avr_regno_mode_code_ok_for_base_p (int, enum machine_mode, addr_space_t, RTX_CODE, RTX_CODE);
diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
index 2b6b487..bdc061c 100644
--- a/gcc/config/avr/avr.c
+++ b/gcc/config/avr/avr.c
@@ -123,14 +123,14 @@ static avr_addr_t avr_addr;
 
 /* Prototypes for local helper functions.  */
 
-static const char* out_movqi_r_mr (rtx, rtx[], int*);
-static const char* out_movhi_r_mr (rtx, rtx[], int*);
-static const char* out_movsi_r_mr (rtx, rtx[], int*);
-static const char* out_movqi_mr_r (rtx, rtx[], int*);
-static const char* out_movhi_mr_r (rtx, rtx[], int*);
-static const char* out_movsi_mr_r (rtx, rtx[], int*);
-
-static int get_sequence_length (rtx insns);
+static const char* out_movqi_r_mr (rtx_insn *, rtx[], int*);
+static const char* out_movhi_r_mr (rtx_insn *, rtx[], int*);
+static const char* out_movsi_r_mr (rtx_insn *, rtx[], int*);
+static const char* out_movqi_mr_r (rtx_insn *, rtx[], int*);
+static const char* out_movhi_mr_r (rtx_insn *, rtx[], int*);
+static const char* out_movsi_mr_r (rtx_insn *, rtx[], int*);
+
+static int get_sequence_length (rtx_insn *insns);
 static int sequent_regs_live (void);
 static const char *ptrreg_to_str (int);
 static const char *cond_string (enum rtx_code);
@@ -950,9 +950,9 @@ sequent_regs_live (void)
 /* Obtain the length sequence of insns.  */
 
 int
-get_sequence_length (rtx insns)
+get_sequence_length (rtx_insn *insns)
 {
-  rtx insn;
+  rtx_insn *insn;
   int length;
 
   for (insn = insns, length = 0; insn; insn = NEXT_INSN (insn))
@@ -977,7 +977,8 @@ avr_incoming_return_addr_rtx (void)
 static void
 emit_push_byte (unsigned regno, bool frame_related_p)
 {
-  rtx mem, reg, insn;
+  rtx mem, reg;
+  rtx_insn *insn;
 
   mem = gen_rtx_POST_DEC (HImode, stack_pointer_rtx);
   mem = gen_frame_mem (QImode, mem);
@@ -998,7 +999,7 @@ emit_push_byte (unsigned regno, bool frame_related_p)
 static void
 emit_push_sfr (rtx sfr, bool frame_related_p, bool clr_p)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   gcc_assert (MEM_P (sfr));
 
@@ -1022,7 +1023,7 @@ emit_push_sfr (rtx sfr, bool frame_related_p, bool clr_p)
 static void
 avr_prologue_setup_frame (HOST_WIDE_INT size, HARD_REG_SET set)
 {
-  rtx insn;
+  rtx_insn *insn;
   bool isr_p = cfun->machine->is_interrupt || cfun->machine->is_signal;
   int live_seq = sequent_regs_live ();
 
@@ -1138,7 +1139,8 @@ avr_prologue_setup_frame (HOST_WIDE_INT size, HARD_REG_SET set)
 
           int irq_state = -1;
           HOST_WIDE_INT size_cfa = size, neg_size;
-          rtx fp_plus_insns, fp, my_fp;
+          rtx_insn *fp_plus_insns;
+          rtx fp, my_fp;
 
           gcc_assert (frame_pointer_needed
                       || !isr_p
@@ -1247,7 +1249,7 @@ avr_prologue_setup_frame (HOST_WIDE_INT size, HARD_REG_SET set)
 
           if (avr_sp_immediate_operand (gen_int_mode (-size, HImode), HImode))
             {
-              rtx sp_plus_insns;
+              rtx_insn *sp_plus_insns;
 
               start_sequence ();
 
@@ -1489,7 +1491,7 @@ avr_expand_epilogue (bool sibcall_p)
 
       int irq_state = -1;
       rtx fp, my_fp;
-      rtx fp_plus_insns;
+      rtx_insn *fp_plus_insns;
       HOST_WIDE_INT size_max;
 
       gcc_assert (frame_pointer_needed
@@ -1542,7 +1544,7 @@ avr_expand_epilogue (bool sibcall_p)
 
       if (avr_sp_immediate_operand (gen_int_mode (size, HImode), HImode))
         {
-          rtx sp_plus_insns;
+          rtx_insn *sp_plus_insns;
 
           start_sequence ();
 
@@ -2398,7 +2400,7 @@ avr_notice_update_cc (rtx body ATTRIBUTE_UNUSED, rtx insn)
    3 - absolute jump (only for ATmega[16]03).  */
 
 int
-avr_jump_mode (rtx x, rtx insn)
+avr_jump_mode (rtx x, rtx_insn *insn)
 {
   int dest_addr = INSN_ADDRESSES (INSN_UID (GET_CODE (x) == LABEL_REF
                                             ? XEXP (x, 0) : x));
@@ -2522,7 +2524,7 @@ ret_cond_branch (rtx x, int len, int reverse)
 /* Output insn cost for next insn.  */
 
 void
-avr_final_prescan_insn (rtx insn, rtx *operand ATTRIBUTE_UNUSED,
+avr_final_prescan_insn (rtx_insn *insn, rtx *operand ATTRIBUTE_UNUSED,
                         int num_operands ATTRIBUTE_UNUSED)
 {
   if (avr_log.rtx_costs)
@@ -2780,7 +2782,7 @@ avr_xload_libgcc_p (enum machine_mode mode)
    Return a QImode d-register or NULL_RTX if nothing found.  */
 
 static rtx
-avr_find_unused_d_reg (rtx insn, rtx exclude)
+avr_find_unused_d_reg (rtx_insn *insn, rtx exclude)
 {
   int regno;
   bool isr_p = (avr_interrupt_function_p (current_function_decl)
@@ -2826,7 +2828,7 @@ avr_find_unused_d_reg (rtx insn, rtx exclude)
    version of LPM instruction is available.  */
 
 static const char*
-avr_out_lpm_no_lpmx (rtx insn, rtx *xop, int *plen)
+avr_out_lpm_no_lpmx (rtx_insn *insn, rtx *xop, int *plen)
 {
   rtx dest = xop[0];
   rtx addr = xop[1];
@@ -2925,7 +2927,7 @@ avr_out_lpm_no_lpmx (rtx insn, rtx *xop, int *plen)
    Return "".  */
 
 const char*
-avr_out_lpm (rtx insn, rtx *op, int *plen)
+avr_out_lpm (rtx_insn *insn, rtx *op, int *plen)
 {
   rtx xop[7];
   rtx dest = op[0];
@@ -3096,7 +3098,7 @@ avr_out_lpm (rtx insn, rtx *op, int *plen)
 /* Worker function for xload_8 insn.  */
 
 const char*
-avr_out_xload (rtx insn ATTRIBUTE_UNUSED, rtx *op, int *plen)
+avr_out_xload (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *op, int *plen)
 {
   rtx xop[4];
 
@@ -3118,7 +3120,7 @@ avr_out_xload (rtx insn ATTRIBUTE_UNUSED, rtx *op, int *plen)
 
 
 const char*
-output_movqi (rtx insn, rtx operands[], int *plen)
+output_movqi (rtx_insn *insn, rtx operands[], int *plen)
 {
   rtx dest = operands[0];
   rtx src = operands[1];
@@ -3165,7 +3167,7 @@ output_movqi (rtx insn, rtx operands[], int *plen)
 
 
 const char *
-output_movhi (rtx insn, rtx xop[], int *plen)
+output_movhi (rtx_insn *insn, rtx xop[], int *plen)
 {
   rtx dest = xop[0];
   rtx src = xop[1];
@@ -3245,7 +3247,7 @@ output_movhi (rtx insn, rtx xop[], int *plen)
 }
 
 static const char*
-out_movqi_r_mr (rtx insn, rtx op[], int *plen)
+out_movqi_r_mr (rtx_insn *insn, rtx op[], int *plen)
 {
   rtx dest = op[0];
   rtx src = op[1];
@@ -3305,7 +3307,7 @@ out_movqi_r_mr (rtx insn, rtx op[], int *plen)
 }
 
 static const char*
-out_movhi_r_mr (rtx insn, rtx op[], int *plen)
+out_movhi_r_mr (rtx_insn *insn, rtx op[], int *plen)
 {
   rtx dest = op[0];
   rtx src = op[1];
@@ -3425,7 +3427,7 @@ out_movhi_r_mr (rtx insn, rtx op[], int *plen)
 }
 
 static const char*
-out_movsi_r_mr (rtx insn, rtx op[], int *l)
+out_movsi_r_mr (rtx_insn *insn, rtx op[], int *l)
 {
   rtx dest = op[0];
   rtx src = op[1];
@@ -3586,7 +3588,7 @@ out_movsi_r_mr (rtx insn, rtx op[], int *l)
 }
 
 static const char*
-out_movsi_mr_r (rtx insn, rtx op[], int *l)
+out_movsi_mr_r (rtx_insn *insn, rtx op[], int *l)
 {
   rtx dest = op[0];
   rtx src = op[1];
@@ -3741,7 +3743,7 @@ out_movsi_mr_r (rtx insn, rtx op[], int *l)
 }
 
 const char *
-output_movsisf (rtx insn, rtx operands[], int *l)
+output_movsisf (rtx_insn *insn, rtx operands[], int *l)
 {
   int dummy;
   rtx dest = operands[0];
@@ -3821,7 +3823,7 @@ output_movsisf (rtx insn, rtx operands[], int *l)
 /* Handle loads of 24-bit types from memory to register.  */
 
 static const char*
-avr_out_load_psi (rtx insn, rtx *op, int *plen)
+avr_out_load_psi (rtx_insn *insn, rtx *op, int *plen)
 {
   rtx dest = op[0];
   rtx src = op[1];
@@ -3952,7 +3954,7 @@ avr_out_load_psi (rtx insn, rtx *op, int *plen)
 /* Handle store of 24-bit type from register or zero to memory.  */
 
 static const char*
-avr_out_store_psi (rtx insn, rtx *op, int *plen)
+avr_out_store_psi (rtx_insn *insn, rtx *op, int *plen)
 {
   rtx dest = op[0];
   rtx src = op[1];
@@ -4046,7 +4048,7 @@ avr_out_store_psi (rtx insn, rtx *op, int *plen)
 /* Move around 24-bit stuff.  */
 
 const char *
-avr_out_movpsi (rtx insn, rtx *op, int *plen)
+avr_out_movpsi (rtx_insn *insn, rtx *op, int *plen)
 {
   rtx dest = op[0];
   rtx src = op[1];
@@ -4105,7 +4107,7 @@ avr_out_movpsi (rtx insn, rtx *op, int *plen)
 
 
 static const char*
-out_movqi_mr_r (rtx insn, rtx op[], int *plen)
+out_movqi_mr_r (rtx_insn *insn, rtx op[], int *plen)
 {
   rtx dest = op[0];
   rtx src = op[1];
@@ -4172,7 +4174,7 @@ out_movqi_mr_r (rtx insn, rtx op[], int *plen)
    but with low byte first.  */
 
 static const char*
-avr_out_movhi_mr_r_xmega (rtx insn, rtx op[], int *plen)
+avr_out_movhi_mr_r_xmega (rtx_insn *insn, rtx op[], int *plen)
 {
   rtx dest = op[0];
   rtx src = op[1];
@@ -4281,7 +4283,7 @@ avr_out_movhi_mr_r_xmega (rtx insn, rtx op[], int *plen)
 
 
 static const char*
-out_movhi_mr_r (rtx insn, rtx op[], int *plen)
+out_movhi_mr_r (rtx_insn *insn, rtx op[], int *plen)
 {
   rtx dest = op[0];
   rtx src = op[1];
@@ -4415,9 +4417,9 @@ avr_frame_pointer_required_p (void)
 /* Returns the condition of compare insn INSN, or UNKNOWN.  */
 
 static RTX_CODE
-compare_condition (rtx insn)
+compare_condition (rtx_insn *insn)
 {
-  rtx next = next_real_insn (insn);
+  rtx_insn *next = next_real_insn (insn);
 
   if (next && JUMP_P (next))
     {
@@ -4435,7 +4437,7 @@ compare_condition (rtx insn)
 /* Returns true iff INSN is a tst insn that only tests the sign.  */
 
 static bool
-compare_sign_p (rtx insn)
+compare_sign_p (rtx_insn *insn)
 {
   RTX_CODE cond = compare_condition (insn);
   return (cond == GE || cond == LT);
@@ -4446,7 +4448,7 @@ compare_sign_p (rtx insn)
    that needs to be swapped (GT, GTU, LE, LEU).  */
 
 static bool
-compare_diff_p (rtx insn)
+compare_diff_p (rtx_insn *insn)
 {
   RTX_CODE cond = compare_condition (insn);
   return (cond == GT || cond == GTU || cond == LE || cond == LEU) ? cond : 0;
@@ -4455,7 +4457,7 @@ compare_diff_p (rtx insn)
 /* Returns true iff INSN is a compare insn with the EQ or NE condition.  */
 
 static bool
-compare_eq_p (rtx insn)
+compare_eq_p (rtx_insn *insn)
 {
   RTX_CODE cond = compare_condition (insn);
   return (cond == EQ || cond == NE);
@@ -4474,7 +4476,7 @@ compare_eq_p (rtx insn)
                   Don't output anything.  */
 
 const char*
-avr_out_compare (rtx insn, rtx *xop, int *plen)
+avr_out_compare (rtx_insn *insn, rtx *xop, int *plen)
 {
   /* Register to compare and value to compare against. */
   rtx xreg = xop[0];
@@ -4631,7 +4633,7 @@ avr_out_compare (rtx insn, rtx *xop, int *plen)
 /* Prepare operands of compare_const_di2 to be used with avr_out_compare.  */
 
 const char*
-avr_out_compare64 (rtx insn, rtx *op, int *plen)
+avr_out_compare64 (rtx_insn *insn, rtx *op, int *plen)
 {
   rtx xop[3];
 
@@ -4645,7 +4647,7 @@ avr_out_compare64 (rtx insn, rtx *op, int *plen)
 /* Output test instruction for HImode.  */
 
 const char*
-avr_out_tsthi (rtx insn, rtx *op, int *plen)
+avr_out_tsthi (rtx_insn *insn, rtx *op, int *plen)
 {
   if (compare_sign_p (insn))
     {
@@ -4669,7 +4671,7 @@ avr_out_tsthi (rtx insn, rtx *op, int *plen)
 /* Output test instruction for PSImode.  */
 
 const char*
-avr_out_tstpsi (rtx insn, rtx *op, int *plen)
+avr_out_tstpsi (rtx_insn *insn, rtx *op, int *plen)
 {
   if (compare_sign_p (insn))
     {
@@ -4694,7 +4696,7 @@ avr_out_tstpsi (rtx insn, rtx *op, int *plen)
 /* Output test instruction for SImode.  */
 
 const char*
-avr_out_tstsi (rtx insn, rtx *op, int *plen)
+avr_out_tstsi (rtx_insn *insn, rtx *op, int *plen)
 {
   if (compare_sign_p (insn))
     {
@@ -4729,7 +4731,7 @@ avr_out_tstsi (rtx insn, rtx *op, int *plen)
    T_LEN is the length of this template.  */
 
 void
-out_shift_with_cnt (const char *templ, rtx insn, rtx operands[],
+out_shift_with_cnt (const char *templ, rtx_insn *insn, rtx operands[],
 		    int *plen, int t_len)
 {
   bool second_label = true;
@@ -4843,7 +4845,7 @@ out_shift_with_cnt (const char *templ, rtx insn, rtx operands[],
 /* 8bit shift left ((char)x << i)   */
 
 const char *
-ashlqi3_out (rtx insn, rtx operands[], int *len)
+ashlqi3_out (rtx_insn *insn, rtx operands[], int *len)
 {
   if (GET_CODE (operands[2]) == CONST_INT)
     {
@@ -4940,7 +4942,7 @@ ashlqi3_out (rtx insn, rtx operands[], int *len)
 /* 16bit shift left ((short)x << i)   */
 
 const char *
-ashlhi3_out (rtx insn, rtx operands[], int *len)
+ashlhi3_out (rtx_insn *insn, rtx operands[], int *len)
 {
   if (GET_CODE (operands[2]) == CONST_INT)
     {
@@ -5197,7 +5199,7 @@ ashlhi3_out (rtx insn, rtx operands[], int *len)
 /* 24-bit shift left */
 
 const char*
-avr_out_ashlpsi3 (rtx insn, rtx *op, int *plen)
+avr_out_ashlpsi3 (rtx_insn *insn, rtx *op, int *plen)
 {
   if (plen)
     *plen = 0;
@@ -5260,7 +5262,7 @@ avr_out_ashlpsi3 (rtx insn, rtx *op, int *plen)
 /* 32bit shift left ((long)x << i)   */
 
 const char *
-ashlsi3_out (rtx insn, rtx operands[], int *len)
+ashlsi3_out (rtx_insn *insn, rtx operands[], int *len)
 {
   if (GET_CODE (operands[2]) == CONST_INT)
     {
@@ -5349,7 +5351,7 @@ ashlsi3_out (rtx insn, rtx operands[], int *len)
 /* 8bit arithmetic shift right  ((signed char)x >> i) */
 
 const char *
-ashrqi3_out (rtx insn, rtx operands[], int *len)
+ashrqi3_out (rtx_insn *insn, rtx operands[], int *len)
 {
   if (GET_CODE (operands[2]) == CONST_INT)
     {
@@ -5421,7 +5423,7 @@ ashrqi3_out (rtx insn, rtx operands[], int *len)
 /* 16bit arithmetic shift right  ((signed short)x >> i) */
 
 const char *
-ashrhi3_out (rtx insn, rtx operands[], int *len)
+ashrhi3_out (rtx_insn *insn, rtx operands[], int *len)
 {
   if (GET_CODE (operands[2]) == CONST_INT)
     {
@@ -5584,7 +5586,7 @@ ashrhi3_out (rtx insn, rtx operands[], int *len)
 /* 24-bit arithmetic shift right */
 
 const char*
-avr_out_ashrpsi3 (rtx insn, rtx *op, int *plen)
+avr_out_ashrpsi3 (rtx_insn *insn, rtx *op, int *plen)
 {
   int dest = REGNO (op[0]);
   int src = REGNO (op[1]);
@@ -5643,7 +5645,7 @@ avr_out_ashrpsi3 (rtx insn, rtx *op, int *plen)
 /* 32-bit arithmetic shift right  ((signed long)x >> i) */
 
 const char *
-ashrsi3_out (rtx insn, rtx operands[], int *len)
+ashrsi3_out (rtx_insn *insn, rtx operands[], int *len)
 {
   if (GET_CODE (operands[2]) == CONST_INT)
     {
@@ -5740,7 +5742,7 @@ ashrsi3_out (rtx insn, rtx operands[], int *len)
 /* 8-bit logic shift right ((unsigned char)x >> i) */
 
 const char *
-lshrqi3_out (rtx insn, rtx operands[], int *len)
+lshrqi3_out (rtx_insn *insn, rtx operands[], int *len)
 {
   if (GET_CODE (operands[2]) == CONST_INT)
     {
@@ -5835,7 +5837,7 @@ lshrqi3_out (rtx insn, rtx operands[], int *len)
 /* 16-bit logic shift right ((unsigned short)x >> i) */
 
 const char *
-lshrhi3_out (rtx insn, rtx operands[], int *len)
+lshrhi3_out (rtx_insn *insn, rtx operands[], int *len)
 {
   if (GET_CODE (operands[2]) == CONST_INT)
     {
@@ -6092,7 +6094,7 @@ lshrhi3_out (rtx insn, rtx operands[], int *len)
 /* 24-bit logic shift right */
 
 const char*
-avr_out_lshrpsi3 (rtx insn, rtx *op, int *plen)
+avr_out_lshrpsi3 (rtx_insn *insn, rtx *op, int *plen)
 {
   int dest = REGNO (op[0]);
   int src = REGNO (op[1]);
@@ -6146,7 +6148,7 @@ avr_out_lshrpsi3 (rtx insn, rtx *op, int *plen)
 /* 32-bit logic shift right ((unsigned int)x >> i) */
 
 const char *
-lshrsi3_out (rtx insn, rtx operands[], int *len)
+lshrsi3_out (rtx_insn *insn, rtx operands[], int *len)
 {
   if (GET_CODE (operands[2]) == CONST_INT)
     {
@@ -7050,7 +7052,7 @@ avr_out_addto_sp (rtx *op, int *plen)
    is stored in either the carry or T bit.  */
 
 const char*
-avr_out_fract (rtx insn, rtx operands[], bool intsigned, int *plen)
+avr_out_fract (rtx_insn *insn, rtx operands[], bool intsigned, int *plen)
 {
   size_t i;
   rtx xop[6];
@@ -7566,7 +7568,7 @@ avr_out_fract (rtx insn, rtx operands[], bool intsigned, int *plen)
    preparing operands for calls to `avr_out_plus' and `avr_out_bitop'.  */
 
 const char*
-avr_out_round (rtx insn ATTRIBUTE_UNUSED, rtx *xop, int *plen)
+avr_out_round (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *xop, int *plen)
 {
   enum machine_mode mode = GET_MODE (xop[0]);
   enum machine_mode imode = int_mode_for_mode (mode);
@@ -7776,7 +7778,7 @@ avr_rotate_bytes (rtx operands[])
    LEN is the initially computed length of the insn.  */
 
 int
-avr_adjust_insn_length (rtx insn, int len)
+avr_adjust_insn_length (rtx_insn *insn, int len)
 {
   rtx *op = recog_data.operand;
   enum attr_adjust_len adjust_len;
@@ -7868,7 +7870,7 @@ avr_adjust_insn_length (rtx insn, int len)
 /* Return nonzero if register REG dead after INSN.  */
 
 int
-reg_unused_after (rtx insn, rtx reg)
+reg_unused_after (rtx_insn *insn, rtx reg)
 {
   return (dead_or_set_p (insn, reg)
 	  || (REG_P(reg) && _reg_unused_after (insn, reg)));
@@ -7879,7 +7881,7 @@ reg_unused_after (rtx insn, rtx reg)
    not live past labels.  It may live past calls or jumps though.  */
 
 int
-_reg_unused_after (rtx insn, rtx reg)
+_reg_unused_after (rtx_insn *insn, rtx reg)
 {
   enum rtx_code code;
   rtx set;
@@ -9788,7 +9790,7 @@ avr_normalize_condition (RTX_CODE condition)
 /* Helper function for `avr_reorg'.  */
 
 static rtx
-avr_compare_pattern (rtx insn)
+avr_compare_pattern (rtx_insn *insn)
 {
   rtx pattern = single_set (insn);
 
@@ -9844,12 +9846,15 @@ avr_compare_pattern (rtx insn)
    basic blocks.  */
 
 static bool
-avr_reorg_remove_redundant_compare (rtx insn1)
+avr_reorg_remove_redundant_compare (rtx_insn *insn1)
 {
-  rtx comp1, ifelse1, xcond1, branch1;
-  rtx comp2, ifelse2, xcond2, branch2, insn2;
+  rtx comp1, ifelse1, xcond1;
+  rtx_insn *branch1;
+  rtx comp2, ifelse2, xcond2;
+  rtx_insn *branch2, *insn2;
   enum rtx_code code;
-  rtx jump, target, cond;
+  rtx_insn *jump;
+  rtx target, cond;
 
   /* Look out for:  compare1 - branch1 - compare2 - branch2  */
 
@@ -9987,7 +9992,7 @@ avr_reorg_remove_redundant_compare (rtx insn1)
 static void
 avr_reorg (void)
 {
-  rtx insn = get_insns();
+  rtx_insn *insn = get_insns();
 
   for (insn = next_real_insn (insn); insn; insn = next_real_insn (insn))
     {
@@ -10133,7 +10138,7 @@ test_hard_reg_class (enum reg_class rclass, rtx x)
    and thus is suitable to be skipped by CPSE, SBRC, etc.  */
 
 static bool
-avr_2word_insn_p (rtx insn)
+avr_2word_insn_p (rtx_insn *insn)
 {
   if ((avr_current_device->dev_attribute & AVR_ERRATA_SKIP)
       || !insn
@@ -10179,7 +10184,7 @@ avr_2word_insn_p (rtx insn)
 
 
 int
-jump_over_one_insn_p (rtx insn, rtx dest)
+jump_over_one_insn_p (rtx_insn *insn, rtx dest)
 {
   int uid = INSN_UID (GET_CODE (dest) == LABEL_REF
 		      ? XEXP (dest, 0)
@@ -10733,7 +10738,7 @@ avr_hard_regno_rename_ok (unsigned int old_reg,
    Operand 3: label to jump to if the test is true.  */
 
 const char*
-avr_out_sbxx_branch (rtx insn, rtx operands[])
+avr_out_sbxx_branch (rtx_insn *insn, rtx operands[])
 {
   enum rtx_code comp = GET_CODE (operands[0]);
   bool long_jump = get_attr_length (insn) >= 4;
@@ -11241,7 +11246,7 @@ avr_emit_movmemhi (rtx *xop)
 */
 
 const char*
-avr_out_movmem (rtx insn ATTRIBUTE_UNUSED, rtx *op, int *plen)
+avr_out_movmem (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *op, int *plen)
 {
   addr_space_t as = (addr_space_t) INTVAL (op[0]);
   enum machine_mode loop_mode = GET_MODE (op[1]);
-- 
1.8.5.3

[PATCH 154/236] config/v850: Use rtx_insn

[David Malcolm]

gcc/
	* config/v850/v850-protos.h (v850_adjust_insn_length): Strengthen
	first param from rtx to rtx_insn *.
	* config/v850/v850.c (v850_adjust_insn_length): Likewise for param
	"insn".
---
 gcc/config/v850/v850-protos.h | 2 +-
 gcc/config/v850/v850.c        | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/v850/v850-protos.h b/gcc/config/v850/v850-protos.h
index ba504cb..77eb827 100644
--- a/gcc/config/v850/v850-protos.h
+++ b/gcc/config/v850/v850-protos.h
@@ -39,7 +39,7 @@ extern char * construct_restore_jr          (rtx);
 extern char * construct_dispose_instruction (rtx);
 extern char * construct_prepare_instruction (rtx);
 extern int    ep_memory_operand             (rtx, enum machine_mode, int);
-extern int    v850_adjust_insn_length       (rtx, int);
+extern int    v850_adjust_insn_length       (rtx_insn *, int);
 extern const char * v850_gen_movdi          (rtx *);
 extern rtx    v850_gen_compare              (enum rtx_code, enum machine_mode,
 					     rtx, rtx);
diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c
index eb19326..1f8780f 100644
--- a/gcc/config/v850/v850.c
+++ b/gcc/config/v850/v850.c
@@ -3091,7 +3091,7 @@ v850_memory_move_cost (enum machine_mode mode,
 }
 
 int
-v850_adjust_insn_length (rtx insn, int length)
+v850_adjust_insn_length (rtx_insn *insn, int length)
 {
   if (TARGET_V850E3V5_UP)
     {
-- 
1.8.5.3

[PATCH 135/236] config/i386/i386: Use rtx_insn

[David Malcolm]

gcc/
	* config/i386/i386-protos.h (ix86_avoid_lea_for_add): Strengthen
	param 1 "insn" from rtx to rtx_insn *.
	(ix86_use_lea_for_mov): Likewise.
	(ix86_avoid_lea_for_addr): Likewise.
	(ix86_split_lea_for_addr): Likewise.
	(ix86_lea_for_add_ok): Likewise.
	(ix86_output_call_insn): Likewise.

	* config/i386/i386.c (ix86_va_start): Likewise for local "seq".
	(ix86_get_drap_rtx): Likewise for locals "seq", "insn".
	(ix86_output_function_epilogue): Likewise for locals "insn",
	"deleted_debug_label".
	(legitimize_tls_address): Likewise for local "insn".
	(get_some_local_dynamic_name): Likewise.
	(increase_distance): Likewise for params "prev", "next".
	(distance_non_agu_define_in_bb): Likewise for params "insn",
	"start" and locals "prev", "next".
	(distance_non_agu_define): Likewise for param "insn".
	(distance_agu_use_in_bb): Likewise for params "insn", "start" and
	locals "next", "prev".
	(distance_agu_use): Likewise for param "insn".
	(ix86_lea_outperforms): Likewise.
	(ix86_ok_to_clobber_flags): Likewise.
	(ix86_avoid_lea_for_add): Likewise.
	(ix86_use_lea_for_mov): Likewise.
	(ix86_avoid_lea_for_addr): Likewise.
	(find_nearest_reg_def): Likewise, also for locals "prev", "start".
	(ix86_split_lea_for_addr): Likewise for param "insn".
	(ix86_lea_for_add_ok): Likewise for param "insn".
	(ix86_expand_carry_flag_compare): Likewise for local
	"compare_seq".
	(ix86_expand_int_movcc): Likewise.
	(ix86_output_call_insn): Likewise for param "insn".
	(ix86_output_call_insn): Likewise for local "i".
	(x86_output_mi_thunk): Introduce local "insn", using it in place
	of "tmp" when dealing with insns.
	(ix86_avoid_jump_mispredicts): Likewise for locals "insn",
	"start".
	(ix86_pad_returns): Likewise for locals "ret", "prev".
	(ix86_count_insn_bb): Likewise for local "insn".
	(ix86_pad_short_function): Likewise for locals "ret", "insn".
	(ix86_seh_fixup_eh_fallthru): Likewise for locals "insn", "next".
	(ix86_vector_duplicate_value): Likewise for local "insn", "seq".
	(expand_vec_perm_interleave2): Likewise for local "seq".
	(expand_vec_perm_vperm2f128_vblend): Likewise.
	(ix86_loop_unroll_adjust): Likewise for local "insn".  Convert
	call to for_each_rtx with for_each_rtx_in_insn.
---
 gcc/config/i386/i386-protos.h |  12 ++---
 gcc/config/i386/i386.c        | 103 ++++++++++++++++++++++--------------------
 2 files changed, 61 insertions(+), 54 deletions(-)

diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
index 39462bd..0670962 100644
--- a/gcc/config/i386/i386-protos.h
+++ b/gcc/config/i386/i386-protos.h
@@ -93,11 +93,11 @@ extern void ix86_expand_binary_operator (enum rtx_code,
 extern void ix86_expand_vector_logical_operator (enum rtx_code,
 						 enum machine_mode, rtx[]);
 extern bool ix86_binary_operator_ok (enum rtx_code, enum machine_mode, rtx[]);
-extern bool ix86_avoid_lea_for_add (rtx, rtx[]);
-extern bool ix86_use_lea_for_mov (rtx, rtx[]);
-extern bool ix86_avoid_lea_for_addr (rtx, rtx[]);
-extern void ix86_split_lea_for_addr (rtx, rtx[], enum machine_mode);
-extern bool ix86_lea_for_add_ok (rtx, rtx[]);
+extern bool ix86_avoid_lea_for_add (rtx_insn *, rtx[]);
+extern bool ix86_use_lea_for_mov (rtx_insn *, rtx[]);
+extern bool ix86_avoid_lea_for_addr (rtx_insn *, rtx[]);
+extern void ix86_split_lea_for_addr (rtx_insn *, rtx[], enum machine_mode);
+extern bool ix86_lea_for_add_ok (rtx_insn *, rtx[]);
 extern bool ix86_vec_interleave_v2df_operator_ok (rtx operands[3], bool high);
 extern bool ix86_dep_by_shift_count (const_rtx set_insn, const_rtx use_insn);
 extern bool ix86_agi_dependent (rtx set_insn, rtx use_insn);
@@ -302,7 +302,7 @@ extern int asm_preferred_eh_data_format (int, int);
 extern enum attr_cpu ix86_schedule;
 #endif
 
-extern const char * ix86_output_call_insn (rtx insn, rtx call_op);
+extern const char * ix86_output_call_insn (rtx_insn *insn, rtx call_op);
 
 #ifdef RTX_CODE
 /* Target data for multipass lookahead scheduling.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 540bc76..89b2d2d 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -8378,7 +8378,8 @@ ix86_va_start (tree valist, rtx nextarg)
       scratch_regno = split_stack_prologue_scratch_regno ();
       if (scratch_regno != INVALID_REGNUM)
 	{
-	  rtx reg, seq;
+	  rtx reg;
+	  rtx_insn *seq;
 
 	  reg = gen_reg_rtx (Pmode);
 	  cfun->machine->split_stack_varargs_pointer = reg;
@@ -10183,7 +10184,7 @@ ix86_get_drap_rtx (void)
       unsigned int regno = find_drap_reg ();
       rtx drap_vreg;
       rtx arg_ptr;
-      rtx seq, insn;
+      rtx_insn *seq, *insn;
 
       arg_ptr = gen_rtx_REG (Pmode, regno);
       crtl->drap_reg = arg_ptr;
@@ -11769,8 +11770,8 @@ ix86_output_function_epilogue (FILE *file ATTRIBUTE_UNUSED,
   /* Mach-O doesn't support labels at the end of objects, so if
      it looks like we might want one, insert a NOP.  */
   {
-    rtx insn = get_last_insn ();
-    rtx deleted_debug_label = NULL_RTX;
+    rtx_insn *insn = get_last_insn ();
+    rtx_insn *deleted_debug_label = NULL;
     while (insn
 	   && NOTE_P (insn)
 	   && NOTE_KIND (insn) != NOTE_INSN_DELETED_LABEL)
@@ -13471,7 +13472,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
 	  if (TARGET_64BIT)
 	    {
 	      rtx rax = gen_rtx_REG (Pmode, AX_REG);
-	      rtx insns;
+	      rtx_insn *insns;
 
 	      start_sequence ();
 	      emit_call_insn
@@ -13524,7 +13525,8 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
 	  if (TARGET_64BIT)
 	    {
 	      rtx rax = gen_rtx_REG (Pmode, AX_REG);
-	      rtx insns, eqv;
+	      rtx_insn *insns;
+	      rtx eqv;
 
 	      start_sequence ();
 	      emit_call_insn
@@ -14754,7 +14756,7 @@ get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
 static const char *
 get_some_local_dynamic_name (void)
 {
-  rtx insn;
+  rtx_insn *insn;
 
   if (cfun->machine->some_ld_name)
     return cfun->machine->some_ld_name;
@@ -17759,7 +17761,7 @@ ix86_emit_cfi ()
    go to next cycle if there is some dependecy.  */
 
 static unsigned int
-increase_distance (rtx prev, rtx next, unsigned int distance)
+increase_distance (rtx_insn *prev, rtx_insn *next, unsigned int distance)
 {
   df_ref *use_rec;
   df_ref *def_rec;
@@ -17827,12 +17829,12 @@ insn_uses_reg_mem (unsigned int regno, rtx insn)
 
 static int
 distance_non_agu_define_in_bb (unsigned int regno1, unsigned int regno2,
-			       rtx insn, int distance,
-			       rtx start, bool *found)
+			       rtx_insn *insn, int distance,
+			       rtx_insn *start, bool *found)
 {
   basic_block bb = start ? BLOCK_FOR_INSN (start) : NULL;
-  rtx prev = start;
-  rtx next = NULL;
+  rtx_insn *prev = start;
+  rtx_insn *next = NULL;
 
   *found = false;
 
@@ -17874,7 +17876,7 @@ distance_non_agu_define_in_bb (unsigned int regno1, unsigned int regno2,
 
 static int
 distance_non_agu_define (unsigned int regno1, unsigned int regno2,
-			 rtx insn)
+			 rtx_insn *insn)
 {
   basic_block bb = BLOCK_FOR_INSN (insn);
   int distance = 0;
@@ -17951,12 +17953,12 @@ distance_non_agu_define (unsigned int regno1, unsigned int regno2,
 
 static int
 distance_agu_use_in_bb (unsigned int regno,
-			rtx insn, int distance, rtx start,
+			rtx_insn *insn, int distance, rtx_insn *start,
 			bool *found, bool *redefined)
 {
   basic_block bb = NULL;
-  rtx next = start;
-  rtx prev = NULL;
+  rtx_insn *next = start;
+  rtx_insn *prev = NULL;
 
   *found = false;
   *redefined = false;
@@ -18010,7 +18012,7 @@ distance_agu_use_in_bb (unsigned int regno,
    a use is found within LEA_SEARCH_THRESHOLD or REGNO0 is set.  */
 
 static int
-distance_agu_use (unsigned int regno0, rtx insn)
+distance_agu_use (unsigned int regno0, rtx_insn *insn)
 {
   basic_block bb = BLOCK_FOR_INSN (insn);
   int distance = 0;
@@ -18084,7 +18086,7 @@ distance_agu_use (unsigned int regno0, rtx insn)
    SPLIT_COST cycles higher latency than lea latency.  */
 
 static bool
-ix86_lea_outperforms (rtx insn, unsigned int regno0, unsigned int regno1,
+ix86_lea_outperforms (rtx_insn *insn, unsigned int regno0, unsigned int regno1,
 		      unsigned int regno2, int split_cost, bool has_scale)
 {
   int dist_define, dist_use;
@@ -18138,7 +18140,7 @@ ix86_lea_outperforms (rtx insn, unsigned int regno0, unsigned int regno1,
    false otherwise.  */
 
 static bool
-ix86_ok_to_clobber_flags (rtx insn)
+ix86_ok_to_clobber_flags (rtx_insn *insn)
 {
   basic_block bb = BLOCK_FOR_INSN (insn);
   df_ref *use;
@@ -18170,7 +18172,7 @@ ix86_ok_to_clobber_flags (rtx insn)
    move and add to avoid AGU stalls.  */
 
 bool
-ix86_avoid_lea_for_add (rtx insn, rtx operands[])
+ix86_avoid_lea_for_add (rtx_insn *insn, rtx operands[])
 {
   unsigned int regno0, regno1, regno2;
 
@@ -18198,7 +18200,7 @@ ix86_avoid_lea_for_add (rtx insn, rtx operands[])
    instruction.  */
 
 bool
-ix86_use_lea_for_mov (rtx insn, rtx operands[])
+ix86_use_lea_for_mov (rtx_insn *insn, rtx operands[])
 {
   unsigned int regno0, regno1;
 
@@ -18220,7 +18222,7 @@ ix86_use_lea_for_mov (rtx insn, rtx operands[])
    instructions to avoid AGU stalls. */
 
 bool
-ix86_avoid_lea_for_addr (rtx insn, rtx operands[])
+ix86_avoid_lea_for_addr (rtx_insn *insn, rtx operands[])
 {
   unsigned int regno0, regno1, regno2;
   int split_cost;
@@ -18324,10 +18326,10 @@ ix86_emit_binop (enum rtx_code code, enum machine_mode mode,
 /* Return true if regno1 def is nearest to the insn.  */
 
 static bool
-find_nearest_reg_def (rtx insn, int regno1, int regno2)
+find_nearest_reg_def (rtx_insn *insn, int regno1, int regno2)
 {
-  rtx prev = insn;
-  rtx start = BB_HEAD (BLOCK_FOR_INSN (insn));
+  rtx_insn *prev = insn;
+  rtx_insn *start = BB_HEAD (BLOCK_FOR_INSN (insn));
 
   if (insn == start)
     return false;
@@ -18355,7 +18357,7 @@ find_nearest_reg_def (rtx insn, int regno1, int regno2)
    at lea position.  */
 
 void
-ix86_split_lea_for_addr (rtx insn, rtx operands[], enum machine_mode mode)
+ix86_split_lea_for_addr (rtx_insn *insn, rtx operands[], enum machine_mode mode)
 {
   unsigned int regno0, regno1, regno2;
   struct ix86_address parts;
@@ -18475,7 +18477,7 @@ ix86_split_lea_for_addr (rtx insn, rtx operands[], enum machine_mode mode)
    used soon, LEA is better and otherwise ADD is better.  */
 
 bool
-ix86_lea_for_add_ok (rtx insn, rtx operands[])
+ix86_lea_for_add_ok (rtx_insn *insn, rtx operands[])
 {
   unsigned int regno0 = true_regnum (operands[0]);
   unsigned int regno1 = true_regnum (operands[1]);
@@ -20083,7 +20085,8 @@ ix86_expand_carry_flag_compare (enum rtx_code code, rtx op0, rtx op1, rtx *pop)
 
   if (SCALAR_FLOAT_MODE_P (mode))
     {
-      rtx compare_op, compare_seq;
+      rtx compare_op;
+      rtx_insn *compare_seq;
 
       gcc_assert (!DECIMAL_FLOAT_MODE_P (mode));
 
@@ -20201,7 +20204,8 @@ bool
 ix86_expand_int_movcc (rtx operands[])
 {
   enum rtx_code code = GET_CODE (operands[1]), compare_code;
-  rtx compare_seq, compare_op;
+  rtx_insn *compare_seq;
+  rtx compare_op;
   enum machine_mode mode = GET_MODE (operands[0]);
   bool sign_bit_compare_p = false;
   rtx op0 = XEXP (operands[1], 0);
@@ -24968,7 +24972,7 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1,
 /* Output the assembly for a call instruction.  */
 
 const char *
-ix86_output_call_insn (rtx insn, rtx call_op)
+ix86_output_call_insn (rtx_insn *insn, rtx call_op)
 {
   bool direct_p = constant_call_address_operand (call_op, VOIDmode);
   bool seh_nop_p = false;
@@ -24993,7 +24997,7 @@ ix86_output_call_insn (rtx insn, rtx call_op)
      circumstances.  Determine if we have one of those.  */
   if (TARGET_SEH)
     {
-      rtx i;
+      rtx_insn *i;
 
       for (i = NEXT_INSN (insn); i ; i = NEXT_INSN (i))
 	{
@@ -38774,6 +38778,7 @@ x86_output_mi_thunk (FILE *file,
   rtx this_param = x86_this_parameter (function);
   rtx this_reg, tmp, fnaddr;
   unsigned int tmp_regno;
+  rtx_insn *insn;
 
   if (TARGET_64BIT)
     tmp_regno = R10_REG;
@@ -38924,10 +38929,10 @@ x86_output_mi_thunk (FILE *file,
 
   /* Emit just enough of rest_of_compilation to get the insns emitted.
      Note that use_thunk calls assemble_start_function et al.  */
-  tmp = get_insns ();
-  shorten_branches (tmp);
-  final_start_function (tmp, file, 1);
-  final (tmp, file, 1);
+  insn = get_insns ();
+  shorten_branches (insn);
+  final_start_function (insn, file, 1);
+  final (insn, file, 1);
   final_end_function ();
 }
 
@@ -39068,7 +39073,7 @@ min_insn_size (rtx insn)
 static void
 ix86_avoid_jump_mispredicts (void)
 {
-  rtx insn, start = get_insns ();
+  rtx_insn *insn, *start = get_insns ();
   int nbytes = 0, njumps = 0;
   int isjump = 0;
 
@@ -39174,8 +39179,8 @@ ix86_pad_returns (void)
   FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR_FOR_FN (cfun)->preds)
     {
       basic_block bb = e->src;
-      rtx ret = BB_END (bb);
-      rtx prev;
+      rtx_insn *ret = BB_END (bb);
+      rtx_insn *prev;
       bool replace = false;
 
       if (!JUMP_P (ret) || !ANY_RETURN_P (PATTERN (ret))
@@ -39223,7 +39228,7 @@ ix86_pad_returns (void)
 static int
 ix86_count_insn_bb (basic_block bb)
 {
-  rtx insn;
+  rtx_insn *insn;
   int insn_count = 0;
 
   /* Count number of instructions in this block.  Return 4 if the number
@@ -39304,7 +39309,7 @@ ix86_pad_short_function (void)
 
   FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR_FOR_FN (cfun)->preds)
     {
-      rtx ret = BB_END (e->src);
+      rtx_insn *ret = BB_END (e->src);
       if (JUMP_P (ret) && ANY_RETURN_P (PATTERN (ret)))
 	{
 	  int insn_count = ix86_count_insn (e->src);
@@ -39312,7 +39317,7 @@ ix86_pad_short_function (void)
 	  /* Pad short function.  */
 	  if (insn_count < 4)
 	    {
-	      rtx insn = ret;
+	      rtx_insn *insn = ret;
 
 	      /* Find epilogue.  */
 	      while (insn
@@ -39344,7 +39349,7 @@ ix86_seh_fixup_eh_fallthru (void)
 
   FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR_FOR_FN (cfun)->preds)
     {
-      rtx insn, next;
+      rtx_insn *insn, *next;
 
       /* Find the beginning of the epilogue.  */
       for (insn = BB_END (e->src); insn != NULL; insn = PREV_INSN (insn))
@@ -39557,14 +39562,15 @@ static bool
 ix86_vector_duplicate_value (enum machine_mode mode, rtx target, rtx val)
 {
   bool ok;
-  rtx insn, dup;
+  rtx_insn *insn;
+  rtx dup;
 
   /* First attempt to recognize VAL as-is.  */
   dup = gen_rtx_VEC_DUPLICATE (mode, val);
   insn = emit_insn (gen_rtx_SET (VOIDmode, target, dup));
   if (recog_memoized (insn) < 0)
     {
-      rtx seq;
+      rtx_insn *seq;
       /* If that fails, force VAL into a register.  */
 
       start_sequence ();
@@ -43214,7 +43220,7 @@ expand_vec_perm_interleave2 (struct expand_vec_perm_d *d)
   unsigned i, nelt = d->nelt, nelt2 = nelt / 2;
   unsigned HOST_WIDE_INT contents;
   unsigned char remap[2 * MAX_VECT_LEN];
-  rtx seq;
+  rtx_insn *seq;
   bool ok, same_halves = false;
 
   if (GET_MODE_SIZE (d->vmode) == 16)
@@ -43763,7 +43769,7 @@ expand_vec_perm_vperm2f128_vblend (struct expand_vec_perm_d *d)
 {
   struct expand_vec_perm_d dfirst, dsecond;
   unsigned i, j, msk, nelt = d->nelt, nelt2 = nelt / 2;
-  rtx seq;
+  rtx_insn *seq;
   bool ok;
   rtx (*blend) (rtx, rtx, rtx, rtx) = NULL;
 
@@ -46741,7 +46747,7 @@ static unsigned
 ix86_loop_unroll_adjust (unsigned nunroll, struct loop *loop)
 {
   basic_block *bbs;
-  rtx insn;
+  rtx_insn *insn;
   unsigned i;
   unsigned mem_count = 0;
 
@@ -46754,7 +46760,8 @@ ix86_loop_unroll_adjust (unsigned nunroll, struct loop *loop)
     {
       for (insn = BB_HEAD (bbs[i]); insn != BB_END (bbs[i]); insn = NEXT_INSN (insn))
         if (NONDEBUG_INSN_P (insn))
-            for_each_rtx (&insn, (rtx_function) ix86_loop_memcount, &mem_count);
+            for_each_rtx_in_insn (&insn, (rtx_function) ix86_loop_memcount,
+				  &mem_count);
     }
   free (bbs);
 
-- 
1.8.5.3

[PATCH 038/236] find_first_parameter_load returns an rtx_insn

[David Malcolm]

gcc/
	* rtl.h (find_first_parameter_load): Strengthen return type from
	rtx to rtx_insn *.
	* rtlanal.c (find_first_parameter_load): Strengthen return type
	from rtx to rtx_insn *.  Add checked cast for now, to postpone
	strengthening the params.
---
 gcc/rtl.h     | 2 +-
 gcc/rtlanal.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/rtl.h b/gcc/rtl.h
index 2cce7d4..a97a81e 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -2617,7 +2617,7 @@ extern int auto_inc_p (const_rtx);
 extern int in_expr_list_p (const_rtx, const_rtx);
 extern void remove_node_from_expr_list (const_rtx, rtx *);
 extern int loc_mentioned_in_p (rtx *, const_rtx);
-extern rtx find_first_parameter_load (rtx, rtx);
+extern rtx_insn *find_first_parameter_load (rtx, rtx);
 extern bool keep_with_call_p (const_rtx);
 extern bool label_is_jump_target_p (const_rtx, const_rtx);
 extern int insn_rtx_cost (rtx, bool);
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index d62f44b..493c812 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -3684,7 +3684,7 @@ parms_set (rtx x, const_rtx pat ATTRIBUTE_UNUSED, void *data)
    found if CSE has eliminated some of them (e.g., an argument
    to the outer function is passed down as a parameter).
    Do not skip BOUNDARY.  */
-rtx
+rtx_insn *
 find_first_parameter_load (rtx call_insn, rtx boundary)
 {
   struct parms_set_data parm;
@@ -3746,7 +3746,7 @@ find_first_parameter_load (rtx call_insn, rtx boundary)
 	    break;
 	}
     }
-  return first_set;
+  return as_a_nullable <rtx_insn *> (first_set);
 }
 
 /* Return true if we should avoid inserting code between INSN and preceding
-- 
1.8.5.3

Re: [PATCH 038/236] find_first_parameter_load returns an rtx_insn

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> gcc/
> 	* rtl.h (find_first_parameter_load): Strengthen return type from
> 	rtx to rtx_insn *.
> 	* rtlanal.c (find_first_parameter_load): Strengthen return type
> 	from rtx to rtx_insn *.  Add checked cast for now, to postpone
> 	strengthening the params.
OK.
jeff

Re: [PATCH 038/236] find_first_parameter_load returns an rtx_insn

[David Malcolm]

On Wed, 2014-08-13 at 12:01 -0600, Jeff Law wrote:
> On 08/06/14 11:20, David Malcolm wrote:
> > gcc/
> > 	* rtl.h (find_first_parameter_load): Strengthen return type from
> > 	rtx to rtx_insn *.
> > 	* rtlanal.c (find_first_parameter_load): Strengthen return type
> > 	from rtx to rtx_insn *.  Add checked cast for now, to postpone
> > 	strengthening the params.
> OK.

Thanks; committed to trunk as r214251, with trivial as_a_nullable ->
safe_as_a fixup.

[PATCH 167/236] final accepts an rtx_insn

[David Malcolm]

All in-tree users of "final" now pass in an rtx_insn * for the first
param.

gcc/
	* output.h (final): Strengthen param 1 from rtx to rtx_insn *.
	* final.c (final): Likewise.  Rename param back from
	"uncast_first" to "first" and eliminate the checked cast from rtx
	to rtx_insn *.
---
 gcc/final.c  | 3 +--
 gcc/output.h | 2 +-
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/gcc/final.c b/gcc/final.c
index 0ef0bbb..6937d0d 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -1958,9 +1958,8 @@ dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb,
    For description of args, see `final_start_function', above.  */
 
 void
-final (rtx uncast_first, FILE *file, int optimize_p)
+final (rtx_insn *first, FILE *file, int optimize_p)
 {
-  rtx_insn *first = as_a_nullable <rtx_insn *> (uncast_first);
   rtx_insn *insn, *next;
   int seen = 0;
 
diff --git a/gcc/output.h b/gcc/output.h
index 05e7666..b4c8c47 100644
--- a/gcc/output.h
+++ b/gcc/output.h
@@ -65,7 +65,7 @@ extern void final_start_function (rtx, FILE *, int);
 extern void final_end_function (void);
 
 /* Output assembler code for some insns: all or part of a function.  */
-extern void final (rtx, FILE *, int);
+extern void final (rtx_insn *, FILE *, int);
 
 /* The final scan for one insn, INSN.  Args are same as in `final', except
    that INSN is the insn being scanned.  Value returned is the next insn to
-- 
1.8.5.3

[PATCH 079/236] gcse.c: Use rtx_insn

[David Malcolm]

gcc/
	* gcse.c (struct occr): Strengthen field "insn" from rtx to
	rtx_insn *.
	(test_insn): Likewise for this global.
	(oprs_unchanged_p): Strengthen param "insn" from const_rtx to
	const rtx_insn *.
	(oprs_anticipatable_p): Likewise.
	(oprs_available_p): Likewise.
	(insert_expr_in_table): Strengthen param "insn" from  rtx to
	rtx_insn *.
	(hash_scan_set): Likewise.
	(hash_scan_clobber): Likewise.
	(hash_scan_call): Likewise.
	(hash_scan_insn): Likewise.
	(compute_hash_table_work): Likewise for local "insn".
	(process_insert_insn): Likewise for return type and local "pat".
	(insert_insn_end_basic_block): Likewise for locals "new_insn",
	"pat", "pat_end", "maybe_cc0_setter".
	(pre_edge_insert): Likewise for local "insn".
	(pre_insert_copy_insn): Likewise for param "insn".
	(pre_insert_copies): Likewise for local "insn".
	(struct set_data): Likewise for field "insn".
	(single_set_gcse): Likewise for param "insn".
	(gcse_emit_move_after): Likewise.
	(pre_delete): Likewise for local "insn".
	(update_bb_reg_pressure): Likewise for param "from" and local
	"insn".
	(should_hoist_expr_to_dom): Likewise for param "from".
	(hoist_code): Likewise for local "insn".
	(get_pressure_class_and_nregs): Likewise for param "insn".
	(calculate_bb_reg_pressure): Likewise for local "insn".
	(compute_ld_motion_mems): Likewise.
---
 gcc/gcse.c | 92 ++++++++++++++++++++++++++++++++------------------------------
 1 file changed, 47 insertions(+), 45 deletions(-)

diff --git a/gcc/gcse.c b/gcc/gcse.c
index 163a529..0889e45 100644
--- a/gcc/gcse.c
+++ b/gcc/gcse.c
@@ -296,7 +296,7 @@ struct occr
   /* Next occurrence of this expression.  */
   struct occr *next;
   /* The insn that computes the expression.  */
-  rtx insn;
+  rtx_insn *insn;
   /* Nonzero if this [anticipatable] occurrence has been deleted.  */
   char deleted_p;
   /* Nonzero if this [available] occurrence has been copied to
@@ -462,16 +462,16 @@ static void *gcalloc (size_t, size_t) ATTRIBUTE_MALLOC;
 static void *gcse_alloc (unsigned long);
 static void alloc_gcse_mem (void);
 static void free_gcse_mem (void);
-static void hash_scan_insn (rtx, struct hash_table_d *);
-static void hash_scan_set (rtx, rtx, struct hash_table_d *);
-static void hash_scan_clobber (rtx, rtx, struct hash_table_d *);
-static void hash_scan_call (rtx, rtx, struct hash_table_d *);
+static void hash_scan_insn (rtx_insn *, struct hash_table_d *);
+static void hash_scan_set (rtx, rtx_insn *, struct hash_table_d *);
+static void hash_scan_clobber (rtx, rtx_insn *, struct hash_table_d *);
+static void hash_scan_call (rtx, rtx_insn *, struct hash_table_d *);
 static int want_to_gcse_p (rtx, int *);
-static int oprs_unchanged_p (const_rtx, const_rtx, int);
-static int oprs_anticipatable_p (const_rtx, const_rtx);
-static int oprs_available_p (const_rtx, const_rtx);
-static void insert_expr_in_table (rtx, enum machine_mode, rtx, int, int, int,
-				  struct hash_table_d *);
+static int oprs_unchanged_p (const_rtx, const rtx_insn *, int);
+static int oprs_anticipatable_p (const_rtx, const rtx_insn *);
+static int oprs_available_p (const_rtx, const rtx_insn *);
+static void insert_expr_in_table (rtx, enum machine_mode, rtx_insn *, int, int,
+				  int, struct hash_table_d *);
 static unsigned int hash_expr (const_rtx, enum machine_mode, int *, int);
 static void record_last_reg_set_info (rtx, int);
 static void record_last_mem_set_info (rtx);
@@ -493,7 +493,7 @@ static struct edge_list *compute_pre_data (void);
 static int pre_expr_reaches_here_p (basic_block, struct expr *,
 				    basic_block);
 static void insert_insn_end_basic_block (struct expr *, basic_block);
-static void pre_insert_copy_insn (struct expr *, rtx);
+static void pre_insert_copy_insn (struct expr *, rtx_insn *);
 static void pre_insert_copies (void);
 static int pre_delete (void);
 static int pre_gcse (struct edge_list *);
@@ -505,12 +505,12 @@ static void compute_code_hoist_vbeinout (void);
 static void compute_code_hoist_data (void);
 static int should_hoist_expr_to_dom (basic_block, struct expr *, basic_block,
 				     sbitmap, int, int *, enum reg_class,
-				     int *, bitmap, rtx);
+				     int *, bitmap, rtx_insn *);
 static int hoist_code (void);
 static enum reg_class get_regno_pressure_class (int regno, int *nregs);
-static enum reg_class get_pressure_class_and_nregs (rtx insn, int *nregs);
+static enum reg_class get_pressure_class_and_nregs (rtx_insn *insn, int *nregs);
 static int one_code_hoisting_pass (void);
-static rtx process_insert_insn (struct expr *);
+static rtx_insn *process_insert_insn (struct expr *);
 static int pre_edge_insert (struct edge_list *, struct expr **);
 static int pre_expr_reaches_here_p_work (basic_block, struct expr *,
 					 basic_block, char *);
@@ -526,7 +526,7 @@ static void trim_ld_motion_mems (void);
 static void update_ld_motion_stores (struct expr *);
 static void clear_modify_mem_tables (void);
 static void free_modify_mem_tables (void);
-static rtx gcse_emit_move_after (rtx, rtx, rtx);
+static rtx gcse_emit_move_after (rtx, rtx, rtx_insn *);
 static bool is_too_expensive (const char *);
 
 #define GNEW(T)			((T *) gmalloc (sizeof (T)))
@@ -830,7 +830,7 @@ want_to_gcse_p (rtx x, int *max_distance_ptr)
 
 /* Used internally by can_assign_to_reg_without_clobbers_p.  */
 
-static GTY(()) rtx test_insn;
+static GTY(()) rtx_insn *test_insn;
 
 /* Return true if we can assign X to a pseudo register such that the
    resulting insn does not result in clobbering a hard register as a
@@ -891,7 +891,7 @@ can_assign_to_reg_without_clobbers_p (rtx x)
    or from INSN to the end of INSN's basic block (if AVAIL_P != 0).  */
 
 static int
-oprs_unchanged_p (const_rtx x, const_rtx insn, int avail_p)
+oprs_unchanged_p (const_rtx x, const rtx_insn *insn, int avail_p)
 {
   int i, j;
   enum rtx_code code;
@@ -1066,7 +1066,7 @@ load_killed_in_block_p (const_basic_block bb, int uid_limit, const_rtx x,
    the start of INSN's basic block up to but not including INSN.  */
 
 static int
-oprs_anticipatable_p (const_rtx x, const_rtx insn)
+oprs_anticipatable_p (const_rtx x, const rtx_insn *insn)
 {
   return oprs_unchanged_p (x, insn, 0);
 }
@@ -1075,7 +1075,7 @@ oprs_anticipatable_p (const_rtx x, const_rtx insn)
    INSN to the end of INSN's basic block.  */
 
 static int
-oprs_available_p (const_rtx x, const_rtx insn)
+oprs_available_p (const_rtx x, const rtx_insn *insn)
 {
   return oprs_unchanged_p (x, insn, 1);
 }
@@ -1121,7 +1121,8 @@ expr_equiv_p (const_rtx x, const_rtx y)
    be moved.  */
 
 static void
-insert_expr_in_table (rtx x, enum machine_mode mode, rtx insn, int antic_p,
+insert_expr_in_table (rtx x, enum machine_mode mode, rtx_insn *insn,
+		      int antic_p,
 		      int avail_p, int max_distance, struct hash_table_d *table)
 {
   int found, do_not_record_p;
@@ -1226,7 +1227,7 @@ insert_expr_in_table (rtx x, enum machine_mode mode, rtx insn, int antic_p,
 /* Scan SET present in INSN and add an entry to the hash TABLE.  */
 
 static void
-hash_scan_set (rtx set, rtx insn, struct hash_table_d *table)
+hash_scan_set (rtx set, rtx_insn *insn, struct hash_table_d *table)
 {
   rtx src = SET_SRC (set);
   rtx dest = SET_DEST (set);
@@ -1345,14 +1346,14 @@ hash_scan_set (rtx set, rtx insn, struct hash_table_d *table)
 }
 
 static void
-hash_scan_clobber (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED,
+hash_scan_clobber (rtx x ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED,
 		   struct hash_table_d *table ATTRIBUTE_UNUSED)
 {
   /* Currently nothing to do.  */
 }
 
 static void
-hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED,
+hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx_insn *insn ATTRIBUTE_UNUSED,
 		struct hash_table_d *table ATTRIBUTE_UNUSED)
 {
   /* Currently nothing to do.  */
@@ -1361,7 +1362,7 @@ hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED,
 /* Process INSN and add hash table entries as appropriate.  */
 
 static void
-hash_scan_insn (rtx insn, struct hash_table_d *table)
+hash_scan_insn (rtx_insn *insn, struct hash_table_d *table)
 {
   rtx pat = PATTERN (insn);
   int i;
@@ -1561,7 +1562,7 @@ compute_hash_table_work (struct hash_table_d *table)
 
   FOR_EACH_BB_FN (current_bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
       unsigned int regno;
 
       /* First pass over the instructions records information used to
@@ -2117,13 +2118,13 @@ pre_expr_reaches_here_p (basic_block occr_bb, struct expr *expr, basic_block bb)
 \f
 /* Generate RTL to copy an EXPR to its `reaching_reg' and return it.  */
 
-static rtx
+static rtx_insn *
 process_insert_insn (struct expr *expr)
 {
   rtx reg = expr->reaching_reg;
   /* Copy the expression to make sure we don't have any sharing issues.  */
   rtx exp = copy_rtx (expr->expr);
-  rtx pat;
+  rtx_insn *pat;
 
   start_sequence ();
 
@@ -2156,10 +2157,10 @@ static void
 insert_insn_end_basic_block (struct expr *expr, basic_block bb)
 {
   rtx insn = BB_END (bb);
-  rtx new_insn;
+  rtx_insn *new_insn;
   rtx reg = expr->reaching_reg;
   int regno = REGNO (reg);
-  rtx pat, pat_end;
+  rtx_insn *pat, *pat_end;
 
   pat = process_insert_insn (expr);
   gcc_assert (pat && INSN_P (pat));
@@ -2185,7 +2186,7 @@ insert_insn_end_basic_block (struct expr *expr, basic_block bb)
 	insn = XEXP (note, 0);
       else
 	{
-	  rtx maybe_cc0_setter = prev_nonnote_insn (insn);
+	  rtx_insn *maybe_cc0_setter = prev_nonnote_insn (insn);
 	  if (maybe_cc0_setter
 	      && INSN_P (maybe_cc0_setter)
 	      && sets_cc0_p (PATTERN (maybe_cc0_setter)))
@@ -2293,7 +2294,7 @@ pre_edge_insert (struct edge_list *edge_list, struct expr **index_map)
 		       reach the deleted occurrence in BB.  */
 		    if (!bitmap_bit_p (inserted[e], j))
 		      {
-			rtx insn;
+			rtx_insn *insn;
 			edge eg = INDEX_EDGE (edge_list, e);
 
 			/* We can't insert anything on an abnormal and
@@ -2350,7 +2351,7 @@ pre_edge_insert (struct edge_list *edge_list, struct expr **index_map)
      MEM          <- reaching_reg.  */
 
 static void
-pre_insert_copy_insn (struct expr *expr, rtx insn)
+pre_insert_copy_insn (struct expr *expr, rtx_insn *insn)
 {
   rtx reg = expr->reaching_reg;
   int regno = REGNO (reg);
@@ -2473,7 +2474,7 @@ pre_insert_copies (void)
 
 	    for (avail = expr->avail_occr; avail != NULL; avail = avail->next)
 	      {
-		rtx insn = avail->insn;
+		rtx_insn *insn = avail->insn;
 
 		/* No need to handle this one if handled already.  */
 		if (avail->copied_p)
@@ -2504,7 +2505,7 @@ pre_insert_copies (void)
 
 struct set_data
 {
-  rtx insn;
+  rtx_insn *insn;
   const_rtx set;
   int nsets;
 };
@@ -2540,7 +2541,7 @@ record_set_data (rtx dest, const_rtx set, void *data)
 }
 
 static const_rtx
-single_set_gcse (rtx insn)
+single_set_gcse (rtx_insn *insn)
 {
   struct set_data s;
   rtx pattern;
@@ -2565,7 +2566,7 @@ single_set_gcse (rtx insn)
    in INSN.  */
 
 static rtx
-gcse_emit_move_after (rtx dest, rtx src, rtx insn)
+gcse_emit_move_after (rtx dest, rtx src, rtx_insn *insn)
 {
   rtx new_rtx;
   const_rtx set = single_set_gcse (insn);
@@ -2620,7 +2621,7 @@ pre_delete (void)
 	/* We only need to search antic_occr since we require ANTLOC != 0.  */
 	for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
 	  {
-	    rtx insn = occr->insn;
+	    rtx_insn *insn = occr->insn;
 	    rtx set;
 	    basic_block bb = BLOCK_FOR_INSN (insn);
 
@@ -2952,9 +2953,10 @@ compute_code_hoist_data (void)
    NOTE: Register pressure won't be increased in this function.  */
 
 static int
-update_bb_reg_pressure (basic_block bb, rtx from)
+update_bb_reg_pressure (basic_block bb, rtx_insn *from)
 {
-  rtx dreg, insn;
+  rtx dreg;
+  rtx_insn *insn;
   basic_block succ_bb;
   df_ref *op, op_ref;
   edge succ;
@@ -3038,7 +3040,7 @@ static int
 should_hoist_expr_to_dom (basic_block expr_bb, struct expr *expr,
 			  basic_block bb, sbitmap visited, int distance,
 			  int *bb_size, enum reg_class pressure_class,
-			  int *nregs, bitmap hoisted_bbs, rtx from)
+			  int *nregs, bitmap hoisted_bbs, rtx_insn *from)
 {
   unsigned int i;
   edge pred;
@@ -3234,7 +3236,7 @@ hoist_code (void)
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
       int to_head;
 
       to_head = 0;
@@ -3428,7 +3430,7 @@ hoist_code (void)
 		 to hoist to BB and make the transformations.  */
 	      FOR_EACH_VEC_ELT (occrs_to_hoist, j, occr)
 		{
-		  rtx insn;
+		  rtx_insn *insn;
 		  const_rtx set;
 
 		  gcc_assert (!occr->deleted_p);
@@ -3511,7 +3513,7 @@ get_regno_pressure_class (int regno, int *nregs)
 /* Return pressure class and number of hard registers (through *NREGS)
    for destination of INSN. */
 static enum reg_class
-get_pressure_class_and_nregs (rtx insn, int *nregs)
+get_pressure_class_and_nregs (rtx_insn *insn, int *nregs)
 {
   rtx reg;
   enum reg_class pressure_class;
@@ -3564,7 +3566,7 @@ calculate_bb_reg_pressure (void)
 {
   int i;
   unsigned int j;
-  rtx insn;
+  rtx_insn *insn;
   basic_block bb;
   bitmap curr_regs_live;
   bitmap_iterator bi;
@@ -3943,7 +3945,7 @@ compute_ld_motion_mems (void)
 {
   struct ls_expr * ptr;
   basic_block bb;
-  rtx insn;
+  rtx_insn *insn;
 
   pre_ldst_mems = NULL;
   pre_ldst_table.create (13);
-- 
1.8.5.3

[PATCH 050/236] auto-inc-dec.c: strengthen various rtx to rtx_insn *

[David Malcolm]

Note to self: verified the compile on pdp11-aout

gcc/
	* auto-inc-dec.c (struct inc_insn): Strengthen field "insn" from
	rtx to rtx_insn *.
	(struct mem_insn): Likewise for field "insn".
	(reg_next_use): Strengthen from rtx * to rtx_insn **.
	(reg_next_inc_use): Likewise.
	(reg_next_def): Likewise.
	(move_dead_notes): Strengthen params "to_insn" and "from_insn"
	from rtx to rtx_insn *.
	(move_insn_before): Likewise for param "next_insn" and local "insns".
	(attempt_change): Likewise for local "mov_insn".
	(try_merge): Likewise for param "last_insn".
	(get_next_ref): Likewise for return type and local "insn".
	Strengthen param "next_array" from rtx * to rtx_insn **.
	(parse_add_or_inc): Strengthen param "insn" from rtx to
	rtx_insn *.
	(find_inc): Likewise for locals "insn" and "other_insn" (three of
	the latter).
	(merge_in_block): Likewise for locals "insn", "curr",
	"other_insn".
	(pass_inc_dec::execute): Update allocations of the arrays to
	reflect the stronger types.
---
 gcc/auto-inc-dec.c | 54 +++++++++++++++++++++++++++---------------------------
 1 file changed, 27 insertions(+), 27 deletions(-)

diff --git a/gcc/auto-inc-dec.c b/gcc/auto-inc-dec.c
index 0314d18..739fc87 100644
--- a/gcc/auto-inc-dec.c
+++ b/gcc/auto-inc-dec.c
@@ -295,7 +295,7 @@ init_decision_table (void)
 
 static struct inc_insn
 {
-  rtx insn;           /* The insn being parsed.  */
+  rtx_insn *insn;     /* The insn being parsed.  */
   rtx pat;            /* The pattern of the insn.  */
   bool reg1_is_const; /* True if reg1 is const, false if reg1 is a reg.  */
   enum form form;
@@ -355,7 +355,7 @@ dump_inc_insn (FILE *file)
 
 static struct mem_insn
 {
-  rtx insn;           /* The insn being parsed.  */
+  rtx_insn *insn;     /* The insn being parsed.  */
   rtx pat;            /* The pattern of the insn.  */
   rtx *mem_loc;       /* The address of the field that holds the mem */
                       /* that is to be replaced.  */
@@ -397,9 +397,9 @@ dump_mem_insn (FILE *file)
    must be compared with the current block.
 */
 
-static rtx *reg_next_use = NULL;
-static rtx *reg_next_inc_use = NULL;
-static rtx *reg_next_def = NULL;
+static rtx_insn **reg_next_use = NULL;
+static rtx_insn **reg_next_inc_use = NULL;
+static rtx_insn **reg_next_def = NULL;
 
 
 /* Move dead note that match PATTERN to TO_INSN from FROM_INSN.  We do
@@ -408,7 +408,7 @@ static rtx *reg_next_def = NULL;
    does not appear that there are any other kinds of relevant notes.  */
 
 static void
-move_dead_notes (rtx to_insn, rtx from_insn, rtx pattern)
+move_dead_notes (rtx_insn *to_insn, rtx_insn *from_insn, rtx pattern)
 {
   rtx note;
   rtx next_note;
@@ -436,10 +436,10 @@ move_dead_notes (rtx to_insn, rtx from_insn, rtx pattern)
 /* Create a mov insn DEST_REG <- SRC_REG and insert it before
    NEXT_INSN.  */
 
-static rtx
-insert_move_insn_before (rtx next_insn, rtx dest_reg, rtx src_reg)
+static rtx_insn *
+insert_move_insn_before (rtx_insn *next_insn, rtx dest_reg, rtx src_reg)
 {
-  rtx insns;
+  rtx_insn *insns;
 
   start_sequence ();
   emit_move_insn (dest_reg, src_reg);
@@ -469,7 +469,7 @@ attempt_change (rtx new_addr, rtx inc_reg)
      handled mov free.  */
 
   basic_block bb = BLOCK_FOR_INSN (mem_insn.insn);
-  rtx mov_insn = NULL;
+  rtx_insn *mov_insn = NULL;
   int regno;
   rtx mem = *mem_insn.mem_loc;
   enum machine_mode mode = GET_MODE (mem);
@@ -611,7 +611,7 @@ try_merge (void)
 
   /* The width of the mem being accessed.  */
   int size = GET_MODE_SIZE (GET_MODE (mem));
-  rtx last_insn = NULL;
+  rtx_insn *last_insn = NULL;
   enum machine_mode reg_mode = GET_MODE (inc_reg);
 
   switch (inc_insn.form)
@@ -738,10 +738,10 @@ try_merge (void)
    NEXT_ARRAY) or defines (if reg_next_def is passed in NEXT_ARRAY)
    REGNO in BB.  */
 
-static rtx
-get_next_ref (int regno, basic_block bb, rtx *next_array)
+static rtx_insn *
+get_next_ref (int regno, basic_block bb, rtx_insn **next_array)
 {
-  rtx insn = next_array[regno];
+  rtx_insn *insn = next_array[regno];
 
   /* Lazy about cleaning out the next_arrays.  */
   if (insn && BLOCK_FOR_INSN (insn) != bb)
@@ -787,7 +787,7 @@ reverse_inc (void)
    processed.  */
 
 static bool
-parse_add_or_inc (rtx insn, bool before_mem)
+parse_add_or_inc (rtx_insn *insn, bool before_mem)
 {
   rtx pat = single_set (insn);
   if (!pat)
@@ -966,9 +966,9 @@ find_address (rtx *address_of_x)
 static bool
 find_inc (bool first_try)
 {
-  rtx insn;
+  rtx_insn *insn;
   basic_block bb = BLOCK_FOR_INSN (mem_insn.insn);
-  rtx other_insn;
+  rtx_insn *other_insn;
   df_ref *def_rec;
 
   /* Make sure this reg appears only once in this insn.  */
@@ -1039,9 +1039,9 @@ find_inc (bool first_try)
     {
       /* Make sure that there is no insn that assigns to inc_insn.res
 	 between the mem_insn and the inc_insn.  */
-      rtx other_insn = get_next_ref (REGNO (inc_insn.reg_res),
-				     BLOCK_FOR_INSN (mem_insn.insn),
-				     reg_next_def);
+      rtx_insn *other_insn = get_next_ref (REGNO (inc_insn.reg_res),
+					   BLOCK_FOR_INSN (mem_insn.insn),
+					   reg_next_def);
       if (other_insn != inc_insn.insn)
 	{
 	  if (dump_file)
@@ -1130,7 +1130,7 @@ find_inc (bool first_try)
 	 then we just abandon this.  */
 
       int luid = DF_INSN_LUID (inc_insn.insn);
-      rtx other_insn;
+      rtx_insn *other_insn;
 
       /* Make sure this reg appears only once in this insn.  */
       if (count_occurrences (PATTERN (mem_insn.insn), mem_insn.reg1, 1) != 1)
@@ -1333,8 +1333,8 @@ find_mem (rtx *address_of_x)
 static void
 merge_in_block (int max_reg, basic_block bb)
 {
-  rtx insn;
-  rtx curr;
+  rtx_insn *insn;
+  rtx_insn *curr;
   int success_in_block = 0;
 
   if (dump_file)
@@ -1379,7 +1379,7 @@ merge_in_block (int max_reg, basic_block bb)
 			 clear of c because the inc insn is going to move
 			 into the mem_insn.insn.  */
 		      int luid = DF_INSN_LUID (mem_insn.insn);
-		      rtx other_insn
+		      rtx_insn *other_insn
 			= get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_use);
 
 		      if (other_insn && luid > DF_INSN_LUID (other_insn))
@@ -1517,9 +1517,9 @@ pass_inc_dec::execute (function *fun ATTRIBUTE_UNUSED)
   df_note_add_problem ();
   df_analyze ();
 
-  reg_next_use = XCNEWVEC (rtx, max_reg);
-  reg_next_inc_use = XCNEWVEC (rtx, max_reg);
-  reg_next_def = XCNEWVEC (rtx, max_reg);
+  reg_next_use = XCNEWVEC (rtx_insn *, max_reg);
+  reg_next_inc_use = XCNEWVEC (rtx_insn *, max_reg);
+  reg_next_def = XCNEWVEC (rtx_insn *, max_reg);
   FOR_EACH_BB_FN (bb, fun)
     merge_in_block (max_reg, bb);
 
-- 
1.8.5.3

Re: [PATCH 050/236] auto-inc-dec.c: strengthen various rtx to rtx_insn *

[Jeff Law]

On 08/06/14 11:20, David Malcolm wrote:
> Note to self: verified the compile on pdp11-aout
>
> gcc/
> 	* auto-inc-dec.c (struct inc_insn): Strengthen field "insn" from
> 	rtx to rtx_insn *.
> 	(struct mem_insn): Likewise for field "insn".
> 	(reg_next_use): Strengthen from rtx * to rtx_insn **.
> 	(reg_next_inc_use): Likewise.
> 	(reg_next_def): Likewise.
> 	(move_dead_notes): Strengthen params "to_insn" and "from_insn"
> 	from rtx to rtx_insn *.
> 	(move_insn_before): Likewise for param "next_insn" and local "insns".
> 	(attempt_change): Likewise for local "mov_insn".
> 	(try_merge): Likewise for param "last_insn".
> 	(get_next_ref): Likewise for return type and local "insn".
> 	Strengthen param "next_array" from rtx * to rtx_insn **.
> 	(parse_add_or_inc): Strengthen param "insn" from rtx to
> 	rtx_insn *.
> 	(find_inc): Likewise for locals "insn" and "other_insn" (three of
> 	the latter).
> 	(merge_in_block): Likewise for locals "insn", "curr",
> 	"other_insn".
> 	(pass_inc_dec::execute): Update allocations of the arrays to
> 	reflect the stronger types.
OK.
Jeff

[PATCH 118/236] stmt.c: Use rtx_insn

[David Malcolm]

gcc/
	* stmt.c (expand_case): Strengthen local "before_case" from rtx to
	rtx_insn *.
	(expand_sjlj_dispatch_table): Likewise.
---
 gcc/stmt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/stmt.c b/gcc/stmt.c
index 722d34f..af74142 100644
--- a/gcc/stmt.c
+++ b/gcc/stmt.c
@@ -1260,7 +1260,7 @@ expand_case (gimple stmt)
      type, so we should never get a zero here.  */
   gcc_assert (count > 0);
 
-  rtx before_case = get_last_insn ();
+  rtx_insn *before_case = get_last_insn ();
 
   /* Decide how to expand this switch.
      The two options at this point are a dispatch table (casesi or
@@ -1304,7 +1304,7 @@ expand_sjlj_dispatch_table (rtx dispatch_index,
   int ncases = dispatch_table.length ();
 
   do_pending_stack_adjust ();
-  rtx before_case = get_last_insn ();
+  rtx_insn *before_case = get_last_insn ();
 
   /* Expand as a decrement-chain if there are 5 or fewer dispatch
      labels.  This covers more than 98% of the cases in libjava,
-- 
1.8.5.3

[PATCH 173/236] insn_t becomes an rtx_insn *

[David Malcolm]

gcc/
	* sel-sched-ir.h (insn_t): Strengthen from rtx to rtx_insn *.
	(BND_TO): Delete this function and...
	(SET_BND_TO): ...this functions in favor of...
	(BND_TO): ...reinstating this macro.
	(struct _fence): Strengthen field "executing_insns" from
	vec<rtx, va_gc> * to vec<rtx_insn *, va_gc> *.  Strengthen fields
	"last_scheduled_insn" and "sched_next" from rtx to rtx_insn *.
	(_succ_iter_cond): Update param "succp" from rtx * to insn_t *
	and param "insn" from rtx to insn_t.
	(create_vinsn_from_insn_rtx): Strengthen first param from rtx to
	rtx_insn *.

	* sched-int.h (insn_vec_t): Strengthen from vec<rtx> to
	vec<rtx_insn *> .
	(rtx_vec_t): Likewise.
	(struct sched_deps_info_def): Strengthen param of "start_insn"
	callback from rtx to rtx_insn *.  Likewise for param "insn2" of
	"note_mem_dep" callback and first param of "note_dep" callback.

	* haifa-sched.c (add_to_speculative_block): Strengthen param
	"insn" from rtx to rtx_insn *.
	(clear_priorities): Likewise.
	(calc_priorities): Likewise for local "insn".

	* sched-deps.c (haifa_start_insn): Likewise for param "insn".
	Remove redundant checked cast.
	(haifa_note_mem_dep): Likewise for param "pending_insn".
	(haifa_note_dep): Likewise for param "elem".
	(note_mem_dep): Likewise for param "e".
	(sched_analyze_1): Add checked casts.
	(sched_analyze_2): Likewise.

	* sel-sched-dump.c (dump_insn_vector): Strengthen local "succ"
	from rtx to rtx_insn *.
	(debug): Update param from vec<rtx> & to vec<rtx_insn *>, and
	from vec<rtx> * to vec<rtx_insn *> *.

	* sel-sched-ir.c (blist_add): Remove use of SET_BND_TO
	scaffolding.
	(flist_add): Strengthen param "executing_insns" from
	vec<rtx, va_gc> * to vec<rtx_insn *, va_gc> *.
	(advance_deps_context): Remove now-redundant checked cast.
	(init_fences): Replace uses of NULL_RTX with NULL.
	(merge_fences): Strengthen params "last_scheduled_insn" and
	"sched_next" from rtx to rtx_insn * and "executing_insns" from
	vec<rtx, va_gc> * to vec<rtx_insn *, va_gc> *.
	(add_clean_fence_to_fences): Replace uses of NULL_RTX with NULL.
	(get_nop_from_pool): Add local "nop_pat" so that "nop" can be
	an instruction, rather than doing double-duty as a pattern.
	(return_nop_to_pool): Update for change of insn_t.
	(deps_init_id): Remove now-redundant checked cast.
	(struct sched_scan_info_def): Strengthen param of "init_insn"
	callback from rtx to insn_t.
	(sched_scan): Strengthen local "insn" from rtx to rtx_insn *.
	(init_global_and_expr_for_insn): Replace uses of NULL_RTX with
	NULL.
	(get_seqno_by_succs): Strengthen param "insn" and locals "tmp",
	"end" from rtx to rtx_insn *.
	(create_vinsn_from_insn_rtx): Likewise for param "insn_rtx".
	(rtx insn_rtx, bool force_unique_p)
	(BND_TO): Delete function.
	(SET_BND_TO): Delete function.

	* sel-sched.c (advance_one_cycle): Strengthen local "insn" from
	rtx to rtx_insn *.
	(extract_new_fences_from): Replace uses of NULL_RTX with NULL.
	(replace_dest_with_reg_in_expr): Strengthen local "insn_rtx" from
	rtx to rtx_insn *.
	(undo_transformations): Likewise for param "insn".
	(update_liveness_on_insn): Likewise.
	(compute_live_below_insn): Likewise for param "insn" and local
	"succ".
	(update_data_sets): Likewise for param "insn".
	(fill_vec_av_set): Replace uses of NULL_RTX with NULL.
	(convert_vec_av_set_to_ready): Drop now-redundant checked cast.
	(invoke_aftermath_hooks): Strengthen param "best_insn" from rtx to
	rtx_insn *.
	(move_cond_jump): Likewise for param "insn".
	(move_cond_jump): Drop use of SET_BND_TO.
	(compute_av_set_on_boundaries): Likewise.
	(update_fence_and_insn): Replace uses of NULL_RTX with NULL.
	(update_and_record_unavailable_insns): Strengthen local "bb_end"
	from rtx to rtx_insn *.
	(maybe_emit_renaming_copy): Likewise for param "insn".
	(maybe_emit_speculative_check): Likewise.
	(handle_emitting_transformations): Likewise.
	(remove_insn_from_stream): Likewise.
	(code_motion_process_successors): Strengthen local "succ" from rtx
	to insn_t.

/
	* rtx-classes-status.txt: Delete SET_BND_TO.
---
 gcc/haifa-sched.c      | 10 ++++-----
 gcc/sched-deps.c       | 21 ++++++++++--------
 gcc/sched-int.h        | 10 ++++-----
 gcc/sel-sched-dump.c   |  6 ++---
 gcc/sel-sched-ir.c     | 59 ++++++++++++++++++++++----------------------------
 gcc/sel-sched-ir.h     | 15 ++++++-------
 gcc/sel-sched.c        | 42 +++++++++++++++++------------------
 rtx-classes-status.txt |  1 -
 8 files changed, 79 insertions(+), 85 deletions(-)

diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 132d9a2..28b99de 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -877,7 +877,7 @@ static int haifa_speculate_insn (rtx, ds_t, rtx *);
 static void generate_recovery_code (rtx_insn *);
 static void process_insn_forw_deps_be_in_spec (rtx, rtx, ds_t);
 static void begin_speculative_block (rtx_insn *);
-static void add_to_speculative_block (rtx);
+static void add_to_speculative_block (rtx_insn *);
 static void init_before_recovery (basic_block *);
 static void create_check_block_twin (rtx_insn *, bool);
 static void fix_recovery_deps (basic_block);
@@ -888,7 +888,7 @@ static void fix_jump_move (rtx);
 static void move_block_after_check (rtx);
 static void move_succs (vec<edge, va_gc> **, basic_block);
 static void sched_remove_insn (rtx_insn *);
-static void clear_priorities (rtx, rtx_vec_t *);
+static void clear_priorities (rtx_insn *, rtx_vec_t *);
 static void calc_priorities (rtx_vec_t);
 static void add_jump_dependencies (rtx, rtx);
 
@@ -7356,7 +7356,7 @@ static void haifa_init_insn (rtx);
 
 /* Generates recovery code for BE_IN speculative INSN.  */
 static void
-add_to_speculative_block (rtx insn)
+add_to_speculative_block (rtx_insn *insn)
 {
   ds_t ts;
   sd_iterator_def sd_it;
@@ -8322,7 +8322,7 @@ sched_remove_insn (rtx_insn *insn)
    Store in vector pointed to by ROOTS_PTR insns on which priority () should
    be invoked to initialize all cleared priorities.  */
 static void
-clear_priorities (rtx insn, rtx_vec_t *roots_ptr)
+clear_priorities (rtx_insn *insn, rtx_vec_t *roots_ptr)
 {
   sd_iterator_def sd_it;
   dep_t dep;
@@ -8358,7 +8358,7 @@ static void
 calc_priorities (rtx_vec_t roots)
 {
   int i;
-  rtx insn;
+  rtx_insn *insn;
 
   FOR_EACH_VEC_ELT (roots, i, insn)
     priority (insn);
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index 89b8519..f299891 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -1801,11 +1801,11 @@ static rtx_insn *cur_insn = NULL;
 /* Implement hooks for haifa scheduler.  */
 
 static void
-haifa_start_insn (rtx insn)
+haifa_start_insn (rtx_insn *insn)
 {
   gcc_assert (insn && !cur_insn);
 
-  cur_insn = as_a <rtx_insn *> (insn);
+  cur_insn = insn;
 }
 
 static void
@@ -1833,7 +1833,7 @@ haifa_note_reg_use (int regno)
 }
 
 static void
-haifa_note_mem_dep (rtx mem, rtx pending_mem, rtx pending_insn, ds_t ds)
+haifa_note_mem_dep (rtx mem, rtx pending_mem, rtx_insn *pending_insn, ds_t ds)
 {
   if (!(ds & SPECULATIVE))
     {
@@ -1855,7 +1855,7 @@ haifa_note_mem_dep (rtx mem, rtx pending_mem, rtx pending_insn, ds_t ds)
 }
 
 static void
-haifa_note_dep (rtx elem, ds_t ds)
+haifa_note_dep (rtx_insn *elem, ds_t ds)
 {
   dep_def _dep;
   dep_t dep = &_dep;
@@ -1888,7 +1888,7 @@ note_reg_clobber (int r)
 }
 
 static void
-note_mem_dep (rtx m1, rtx m2, rtx e, ds_t ds)
+note_mem_dep (rtx m1, rtx m2, rtx_insn *e, ds_t ds)
 {
   if (sched_deps_info->note_mem_dep)
     sched_deps_info->note_mem_dep (m1, m2, e, ds);
@@ -2501,7 +2501,7 @@ sched_analyze_1 (struct deps_desc *deps, rtx x, rtx_insn *insn)
 	    {
 	      if (anti_dependence (XEXP (pending_mem, 0), t)
 		  && ! sched_insns_conditions_mutex_p (insn, XEXP (pending, 0)))
-		note_mem_dep (t, XEXP (pending_mem, 0), XEXP (pending, 0),
+		note_mem_dep (t, XEXP (pending_mem, 0), as_a <rtx_insn *> (XEXP (pending, 0)),
 			      DEP_ANTI);
 
 	      pending = XEXP (pending, 1);
@@ -2514,7 +2514,8 @@ sched_analyze_1 (struct deps_desc *deps, rtx x, rtx_insn *insn)
 	    {
 	      if (output_dependence (XEXP (pending_mem, 0), t)
 		  && ! sched_insns_conditions_mutex_p (insn, XEXP (pending, 0)))
-		note_mem_dep (t, XEXP (pending_mem, 0), XEXP (pending, 0),
+		note_mem_dep (t, XEXP (pending_mem, 0),
+			      as_a <rtx_insn *> (XEXP (pending, 0)),
 			      DEP_OUTPUT);
 
 	      pending = XEXP (pending, 1);
@@ -2646,7 +2647,8 @@ sched_analyze_2 (struct deps_desc *deps, rtx x, rtx_insn *insn)
 		if (read_dependence (XEXP (pending_mem, 0), t)
 		    && ! sched_insns_conditions_mutex_p (insn,
 							 XEXP (pending, 0)))
-		  note_mem_dep (t, XEXP (pending_mem, 0), XEXP (pending, 0),
+		  note_mem_dep (t, XEXP (pending_mem, 0),
+				as_a <rtx_insn *> (XEXP (pending, 0)),
 				DEP_ANTI);
 
 		pending = XEXP (pending, 1);
@@ -2660,7 +2662,8 @@ sched_analyze_2 (struct deps_desc *deps, rtx x, rtx_insn *insn)
 		if (true_dependence (XEXP (pending_mem, 0), VOIDmode, t)
 		    && ! sched_insns_conditions_mutex_p (insn,
 							 XEXP (pending, 0)))
-		  note_mem_dep (t, XEXP (pending_mem, 0), XEXP (pending, 0),
+		  note_mem_dep (t, XEXP (pending_mem, 0),
+				as_a <rtx_insn *> (XEXP (pending, 0)),
 				sched_deps_info->generate_spec_deps
 				? BEGIN_DATA | DEP_TRUE : DEP_TRUE);
 
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index 9f2a3e4..7ac0c8e 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -41,8 +41,8 @@ enum sched_pressure_algorithm
 };
 
 typedef vec<basic_block> bb_vec_t;
-typedef vec<rtx> insn_vec_t;
-typedef vec<rtx> rtx_vec_t;
+typedef vec<rtx_insn *> insn_vec_t;
+typedef vec<rtx_insn *> rtx_vec_t;
 
 extern void sched_init_bbs (void);
 
@@ -1241,7 +1241,7 @@ struct sched_deps_info_def
   void (*compute_jump_reg_dependencies) (rtx, regset);
 
   /* Start analyzing insn.  */
-  void (*start_insn) (rtx);
+  void (*start_insn) (rtx_insn *);
 
   /* Finish analyzing insn.  */
   void (*finish_insn) (void);
@@ -1269,10 +1269,10 @@ struct sched_deps_info_def
 
   /* Note memory dependence of type DS between MEM1 and MEM2 (which is
      in the INSN2).  */
-  void (*note_mem_dep) (rtx mem1, rtx mem2, rtx insn2, ds_t ds);
+  void (*note_mem_dep) (rtx mem1, rtx mem2, rtx_insn *insn2, ds_t ds);
 
   /* Note a dependence of type DS from the INSN.  */
-  void (*note_dep) (rtx, ds_t ds);
+  void (*note_dep) (rtx_insn *, ds_t ds);
 
   /* Nonzero if we should use cselib for better alias analysis.  This
      must be 0 if the dependency information is used after sched_analyze
diff --git a/gcc/sel-sched-dump.c b/gcc/sel-sched-dump.c
index 8dc82c9..d2169c8 100644
--- a/gcc/sel-sched-dump.c
+++ b/gcc/sel-sched-dump.c
@@ -534,7 +534,7 @@ void
 dump_insn_vector (rtx_vec_t succs)
 {
   int i;
-  rtx succ;
+  rtx_insn *succ;
 
   FOR_EACH_VEC_ELT (succs, i, succ)
     if (succ)
@@ -996,7 +996,7 @@ debug_blist (blist_t bnds)
 
 /* Dump a rtx vector REF.  */
 DEBUG_FUNCTION void
-debug (vec<rtx> &ref)
+debug (vec<rtx_insn *> &ref)
 {
   switch_dump (stderr);
   dump_insn_vector (ref);
@@ -1005,7 +1005,7 @@ debug (vec<rtx> &ref)
 }
 
 DEBUG_FUNCTION void
-debug (vec<rtx> *ptr)
+debug (vec<rtx_insn *> *ptr)
 {
   if (ptr)
     debug (*ptr);
diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 8493481..a15bfc0 100644
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -207,7 +207,7 @@ blist_add (blist_t *lp, insn_t to, ilist_t ptr, deps_t dc)
   _list_add (lp);
   bnd = BLIST_BND (*lp);
 
-  SET_BND_TO (bnd) = to;
+  BND_TO (bnd) = to;
   BND_PTR (bnd) = ptr;
   BND_AV (bnd) = NULL;
   BND_AV1 (bnd) = NULL;
@@ -262,7 +262,7 @@ init_fence_for_scheduling (fence_t f)
 /* Add new fence consisting of INSN and STATE to the list pointed to by LP.  */
 static void
 flist_add (flist_t *lp, insn_t insn, state_t state, deps_t dc, void *tc,
-           insn_t last_scheduled_insn, vec<rtx, va_gc> *executing_insns,
+           insn_t last_scheduled_insn, vec<rtx_insn *, va_gc> *executing_insns,
            int *ready_ticks, int ready_ticks_size, insn_t sched_next,
            int cycle, int cycle_issued_insns, int issue_more,
            bool starts_cycle_p, bool after_stall_p)
@@ -516,7 +516,7 @@ void
 advance_deps_context (deps_t dc, insn_t insn)
 {
   sched_deps_info = &advance_deps_context_sched_deps_info;
-  deps_analyze_insn (dc, as_a <rtx_insn *> (insn));
+  deps_analyze_insn (dc, insn);
 }
 \f
 
@@ -614,11 +614,11 @@ init_fences (insn_t old_fence)
 		 state_create (),
 		 create_deps_context () /* dc */,
 		 create_target_context (true) /* tc */,
-		 NULL_RTX /* last_scheduled_insn */,
+		 NULL /* last_scheduled_insn */,
                  NULL, /* executing_insns */
                  XCNEWVEC (int, ready_ticks_size), /* ready_ticks */
                  ready_ticks_size,
-                 NULL_RTX /* sched_next */,
+                 NULL /* sched_next */,
 		 1 /* cycle */, 0 /* cycle_issued_insns */,
 		 issue_rate, /* issue_more */
 		 1 /* starts_cycle_p */, 0 /* after_stall_p */);
@@ -637,7 +637,8 @@ init_fences (insn_t old_fence)
 static void
 merge_fences (fence_t f, insn_t insn,
 	      state_t state, deps_t dc, void *tc,
-              rtx last_scheduled_insn, vec<rtx, va_gc> *executing_insns,
+              rtx_insn *last_scheduled_insn,
+	      vec<rtx_insn *, va_gc> *executing_insns,
               int *ready_ticks, int ready_ticks_size,
 	      rtx sched_next, int cycle, int issue_more, bool after_stall_p)
 {
@@ -802,9 +803,10 @@ merge_fences (fence_t f, insn_t insn,
    other parameters.  */
 static void
 add_to_fences (flist_tail_t new_fences, insn_t insn,
-               state_t state, deps_t dc, void *tc, rtx last_scheduled_insn,
-               vec<rtx, va_gc> *executing_insns, int *ready_ticks,
-               int ready_ticks_size, rtx sched_next, int cycle,
+               state_t state, deps_t dc, void *tc,
+	       rtx_insn *last_scheduled_insn,
+               vec<rtx_insn *, va_gc> *executing_insns, int *ready_ticks,
+               int ready_ticks_size, rtx_insn *sched_next, int cycle,
                int cycle_issued_insns, int issue_rate,
 	       bool starts_cycle_p, bool after_stall_p)
 {
@@ -866,9 +868,9 @@ add_clean_fence_to_fences (flist_tail_t new_fences, insn_t succ, fence_t fence)
   add_to_fences (new_fences,
                  succ, state_create (), create_deps_context (),
                  create_target_context (true),
-                 NULL_RTX, NULL,
+                 NULL, NULL,
                  XCNEWVEC (int, ready_ticks_size), ready_ticks_size,
-                 NULL_RTX, FENCE_CYCLE (fence) + 1,
+                 NULL, FENCE_CYCLE (fence) + 1,
                  0, issue_rate, 1, FENCE_AFTER_STALL_P (fence));
 }
 
@@ -1036,16 +1038,17 @@ static vinsn_t nop_vinsn = NULL;
 insn_t
 get_nop_from_pool (insn_t insn)
 {
+  rtx nop_pat;
   insn_t nop;
   bool old_p = nop_pool.n != 0;
   int flags;
 
   if (old_p)
-    nop = nop_pool.v[--nop_pool.n];
+    nop_pat = nop_pool.v[--nop_pool.n];
   else
-    nop = nop_pattern;
+    nop_pat = nop_pattern;
 
-  nop = emit_insn_before (nop, insn);
+  nop = emit_insn_before (nop_pat, insn);
 
   if (old_p)
     flags = INSN_INIT_TODO_SSID;
@@ -1069,7 +1072,7 @@ return_nop_to_pool (insn_t nop, bool full_tidying)
   INSN_DELETED_P (nop) = 0;
 
   if (nop_pool.n == nop_pool.s)
-    nop_pool.v = XRESIZEVEC (rtx, nop_pool.v,
+    nop_pool.v = XRESIZEVEC (rtx_insn *, nop_pool.v,
                              (nop_pool.s = 2 * nop_pool.s + 1));
   nop_pool.v[nop_pool.n++] = nop;
 }
@@ -2753,7 +2756,7 @@ deps_init_id (idata_t id, insn_t insn, bool force_unique_p)
 
   sched_deps_info = &deps_init_id_sched_deps_info;
 
-  deps_analyze_insn (dc, as_a <rtx_insn *> (insn));
+  deps_analyze_insn (dc, insn);
 
   free_deps (dc);
 
@@ -2779,7 +2782,7 @@ struct sched_scan_info_def
 
   /* This hook makes scheduler frontend to initialize its internal data
      structures for the passed insn.  */
-  void (*init_insn) (rtx);
+  void (*init_insn) (insn_t);
 };
 
 /* A driver function to add a set of basic blocks (BBS) to the
@@ -2803,7 +2806,7 @@ sched_scan (const struct sched_scan_info_def *ssi, bb_vec_t bbs)
   if (ssi->init_insn)
     FOR_EACH_VEC_ELT (bbs, i, bb)
       {
-	rtx insn;
+	rtx_insn *insn;
 
 	FOR_BB_INSNS (bb, insn)
 	  ssi->init_insn (insn);
@@ -2942,7 +2945,7 @@ init_global_and_expr_for_insn (insn_t insn)
 
   if (NOTE_INSN_BASIC_BLOCK_P (insn))
     {
-      init_global_data.prev_insn = NULL_RTX;
+      init_global_data.prev_insn = NULL;
       return;
     }
 
@@ -2959,7 +2962,7 @@ init_global_and_expr_for_insn (insn_t insn)
       init_global_data.prev_insn = insn;
     }
   else
-    init_global_data.prev_insn = NULL_RTX;
+    init_global_data.prev_insn = NULL;
 
   if (GET_CODE (PATTERN (insn)) == ASM_INPUT
       || asm_noperands (PATTERN (insn)) >= 0)
@@ -3983,10 +3986,10 @@ sel_luid_for_non_insn (rtx x)
 /*  Find the proper seqno for inserting at INSN by successors.
     Return -1 if no successors with positive seqno exist.  */
 static int
-get_seqno_by_succs (rtx insn)
+get_seqno_by_succs (rtx_insn *insn)
 {
   basic_block bb = BLOCK_FOR_INSN (insn);
-  rtx tmp = insn, end = BB_END (bb);
+  rtx_insn *tmp = insn, *end = BB_END (bb);
   int seqno;
   insn_t succ = NULL;
   succ_iterator si;
@@ -5761,7 +5764,7 @@ create_insn_rtx_from_pattern (rtx pattern, rtx label)
 /* Create a new vinsn for INSN_RTX.  FORCE_UNIQUE_P is true when the vinsn
    must not be clonable.  */
 vinsn_t
-create_vinsn_from_insn_rtx (rtx insn_rtx, bool force_unique_p)
+create_vinsn_from_insn_rtx (rtx_insn *insn_rtx, bool force_unique_p)
 {
   gcc_assert (INSN_P (insn_rtx) && !INSN_IN_STREAM_P (insn_rtx));
 
@@ -6461,14 +6464,4 @@ rtx& SET_VINSN_INSN_RTX (vinsn_t vi)
   return vi->insn_rtx;
 }
 
-rtx_insn *BND_TO (bnd_t bnd)
-{
-  return as_a_nullable <rtx_insn *> (bnd->to);
-}
-
-insn_t& SET_BND_TO (bnd_t bnd)
-{
-  return bnd->to;
-}
-
 #endif
diff --git a/gcc/sel-sched-ir.h b/gcc/sel-sched-ir.h
index abff203..118e001 100644
--- a/gcc/sel-sched-ir.h
+++ b/gcc/sel-sched-ir.h
@@ -60,7 +60,7 @@ typedef _list_t _xlist_t;
 #define _XLIST_NEXT(L) (_LIST_NEXT (L))
 
 /* Instruction.  */
-typedef rtx insn_t;
+typedef rtx_insn *insn_t;
 
 /* List of insns.  */
 typedef _list_t ilist_t;
@@ -233,8 +233,7 @@ struct _bnd
   deps_t dc;
 };
 typedef struct _bnd *bnd_t;
-extern rtx_insn *BND_TO (bnd_t bnd);
-extern insn_t& SET_BND_TO (bnd_t bnd);
+#define BND_TO(B) ((B)->to)
 
 /* PTR stands not for pointer as you might think, but as a Path To Root of the
    current instruction group from boundary B.  */
@@ -279,7 +278,7 @@ struct _fence
   tc_t tc;
 
   /* A vector of insns that are scheduled but not yet completed.  */
-  vec<rtx, va_gc> *executing_insns;
+  vec<rtx_insn *, va_gc> *executing_insns;
 
   /* A vector indexed by UIDs that caches the earliest cycle on which
      an insn can be scheduled on this fence.  */
@@ -289,13 +288,13 @@ struct _fence
   int ready_ticks_size;
 
   /* Insn, which has been scheduled last on this fence.  */
-  rtx last_scheduled_insn;
+  rtx_insn *last_scheduled_insn;
 
   /* The last value of can_issue_more variable on this fence.  */
   int issue_more;
 
   /* If non-NULL force the next scheduled insn to be SCHED_NEXT.  */
-  rtx sched_next;
+  rtx_insn *sched_next;
 
   /* True if fill_insns processed this fence.  */
   BOOL_BITFIELD processed_p : 1;
@@ -1255,7 +1254,7 @@ _succ_iter_start (insn_t *succp, insn_t insn, int flags)
 }
 
 static inline bool
-_succ_iter_cond (succ_iterator *ip, rtx *succp, rtx insn,
+_succ_iter_cond (succ_iterator *ip, insn_t *succp, insn_t insn,
                  bool check (edge, succ_iterator *))
 {
   if (!ip->bb_end)
@@ -1661,7 +1660,7 @@ extern void sel_unregister_cfg_hooks (void);
 
 /* Expression transformation routines.  */
 extern rtx_insn *create_insn_rtx_from_pattern (rtx, rtx);
-extern vinsn_t create_vinsn_from_insn_rtx (rtx, bool);
+extern vinsn_t create_vinsn_from_insn_rtx (rtx_insn *, bool);
 extern rtx_insn *create_copy_of_insn_rtx (rtx);
 extern void change_vinsn_in_expr (expr_t, vinsn_t);
 
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index 9cd23ef..a6065fd 100644
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -572,7 +572,7 @@ advance_one_cycle (fence_t fence)
 {
   unsigned i;
   int cycle;
-  rtx insn;
+  rtx_insn *insn;
 
   advance_state (FENCE_STATE (fence));
   cycle = ++FENCE_CYCLE (fence);
@@ -630,7 +630,7 @@ extract_new_fences_from (flist_t old_fences, flist_tail_t new_fences,
 			 int orig_max_seqno)
 {
   bool was_here_p = false;
-  insn_t insn = NULL_RTX;
+  insn_t insn = NULL;
   insn_t succ;
   succ_iterator si;
   ilist_iterator ii;
@@ -965,7 +965,7 @@ create_insn_rtx_with_lhs (vinsn_t vi, rtx lhs_rtx)
 static void
 replace_dest_with_reg_in_expr (expr_t expr, rtx new_reg)
 {
-  rtx insn_rtx;
+  rtx_insn *insn_rtx;
   vinsn_t vinsn;
 
   insn_rtx = create_insn_rtx_with_lhs (EXPR_VINSN (expr), new_reg);
@@ -1901,7 +1901,7 @@ identical_copy_p (rtx insn)
 /* Undo all transformations on *AV_PTR that were done when
    moving through INSN.  */
 static void
-undo_transformations (av_set_t *av_ptr, rtx insn)
+undo_transformations (av_set_t *av_ptr, rtx_insn *insn)
 {
   av_set_iterator av_iter;
   expr_t expr;
@@ -3196,7 +3196,7 @@ compute_live (insn_t insn)
 
 /* Update liveness sets for INSN.  */
 static inline void
-update_liveness_on_insn (rtx insn)
+update_liveness_on_insn (rtx_insn *insn)
 {
   ignore_first = true;
   compute_live (insn);
@@ -3204,9 +3204,9 @@ update_liveness_on_insn (rtx insn)
 
 /* Compute liveness below INSN and write it into REGS.  */
 static inline void
-compute_live_below_insn (rtx insn, regset regs)
+compute_live_below_insn (rtx_insn *insn, regset regs)
 {
-  rtx succ;
+  rtx_insn *succ;
   succ_iterator si;
 
   FOR_EACH_SUCC_1 (succ, si, insn, SUCCS_ALL)
@@ -3215,7 +3215,7 @@ compute_live_below_insn (rtx insn, regset regs)
 
 /* Update the data gathered in av and lv sets starting from INSN.  */
 static void
-update_data_sets (rtx insn)
+update_data_sets (rtx_insn *insn)
 {
   update_liveness_on_insn (insn);
   if (sel_bb_head_p (insn))
@@ -3962,7 +3962,7 @@ fill_vec_av_set (av_set_t av, blist_t bnds, fence_t fence,
   if (FENCE_SCHED_NEXT (fence))
     {
       gcc_assert (sched_next_worked == 1);
-      FENCE_SCHED_NEXT (fence) = NULL_RTX;
+      FENCE_SCHED_NEXT (fence) = NULL;
     }
 
   /* No need to stall if this variable was not initialized.  */
@@ -4022,7 +4022,7 @@ convert_vec_av_set_to_ready (void)
       insn_t insn = VINSN_INSN_RTX (vi);
 
       ready_try[n] = 0;
-      ready.vec[n] = as_a <rtx_insn *> (insn);
+      ready.vec[n] = insn;
     }
 }
 
@@ -4288,7 +4288,7 @@ calculate_privileged_insns (void)
    number is ISSUE_MORE.  FENCE and BEST_INSN are the current fence
    and the insn chosen for scheduling, respectively.  */
 static int
-invoke_aftermath_hooks (fence_t fence, rtx best_insn, int issue_more)
+invoke_aftermath_hooks (fence_t fence, rtx_insn *best_insn, int issue_more)
 {
   gcc_assert (INSN_P (best_insn));
 
@@ -4929,7 +4929,7 @@ remove_insns_that_need_bookkeeping (fence_t fence, av_set_t *av_ptr)
       ...
 */
 static void
-move_cond_jump (rtx insn, bnd_t bnd)
+move_cond_jump (rtx_insn *insn, bnd_t bnd)
 {
   edge ft_edge;
   basic_block block_from, block_next, block_new, block_bnd, bb;
@@ -4962,7 +4962,7 @@ move_cond_jump (rtx insn, bnd_t bnd)
 
   /* Jump is moved to the boundary.  */
   next = PREV_INSN (insn);
-  SET_BND_TO (bnd) = insn;
+  BND_TO (bnd) = insn;
 
   ft_edge = find_fallthru_edge_from (block_from);
   block_next = ft_edge->dest;
@@ -5103,7 +5103,7 @@ compute_av_set_on_boundaries (fence_t fence, blist_t bnds, av_set_t *av_vliw_p)
 	{
   	  gcc_assert (FENCE_INSN (fence) == BND_TO (bnd));
 	  FENCE_INSN (fence) = bnd_to;
-	  SET_BND_TO (bnd) = bnd_to;
+	  BND_TO (bnd) = bnd_to;
 	}
 
       av_set_clear (&BND_AV (bnd));
@@ -5380,7 +5380,7 @@ update_fence_and_insn (fence_t fence, insn_t insn, int need_stall)
       SCHED_GROUP_P (insn) = 0;
     }
   else
-    FENCE_SCHED_NEXT (fence) = NULL_RTX;
+    FENCE_SCHED_NEXT (fence) = NULL;
   if (INSN_UID (insn) < FENCE_READY_TICKS_SIZE (fence))
     FENCE_READY_TICKS (fence) [INSN_UID (insn)] = 0;
 
@@ -5714,7 +5714,7 @@ update_and_record_unavailable_insns (basic_block book_block)
   av_set_iterator i;
   av_set_t old_av_set = NULL;
   expr_t cur_expr;
-  rtx bb_end = sel_bb_end (book_block);
+  rtx_insn *bb_end = sel_bb_end (book_block);
 
   /* First, get correct liveness in the bookkeeping block.  The problem is
      the range between the bookeeping insn and the end of block.  */
@@ -5882,7 +5882,7 @@ track_scheduled_insns_and_blocks (rtx insn)
 /* Emit a register-register copy for INSN if needed.  Return true if
    emitted one.  PARAMS is the move_op static parameters.  */
 static bool
-maybe_emit_renaming_copy (rtx insn,
+maybe_emit_renaming_copy (rtx_insn *insn,
                           moveop_static_params_p params)
 {
   bool insn_emitted  = false;
@@ -5922,7 +5922,7 @@ maybe_emit_renaming_copy (rtx insn,
    Return true if we've  emitted one.  PARAMS is the move_op static
    parameters.  */
 static bool
-maybe_emit_speculative_check (rtx insn, expr_t expr,
+maybe_emit_speculative_check (rtx_insn *insn, expr_t expr,
                               moveop_static_params_p params)
 {
   bool insn_emitted = false;
@@ -5951,7 +5951,7 @@ maybe_emit_speculative_check (rtx insn, expr_t expr,
    insn such as renaming/speculation.  Return true if one of such
    transformations actually happened, and we have emitted this insn.  */
 static bool
-handle_emitting_transformations (rtx insn, expr_t expr,
+handle_emitting_transformations (rtx_insn *insn, expr_t expr,
                                  moveop_static_params_p params)
 {
   bool insn_emitted = false;
@@ -6010,7 +6010,7 @@ need_nop_to_preserve_insn_bb (rtx insn)
 /* Remove INSN from stream.  When ONLY_DISCONNECT is true, its data
    is not removed but reused when INSN is re-emitted.  */
 static void
-remove_insn_from_stream (rtx insn, bool only_disconnect)
+remove_insn_from_stream (rtx_insn *insn, bool only_disconnect)
 {
   /* If there's only one insn in the BB, make sure that a nop is
      inserted into it, so the basic block won't disappear when we'll
@@ -6358,7 +6358,7 @@ code_motion_process_successors (insn_t insn, av_set_t orig_ops,
 {
   int res = 0;
   succ_iterator succ_i;
-  rtx succ;
+  insn_t succ;
   basic_block bb;
   int old_index;
   unsigned old_succs;
diff --git a/rtx-classes-status.txt b/rtx-classes-status.txt
index 84d53ba..29d445f 100644
--- a/rtx-classes-status.txt
+++ b/rtx-classes-status.txt
@@ -12,7 +12,6 @@ TODO: "Scaffolding" to be removed
 =================================
 * DF_REF_INSN
 * SET_BB_HEAD, SET_BB_END, SET_BB_HEADER
-* SET_BND_TO
 * SET_DEP_PRO, SET_DEP_CON
 * SET_NEXT_INSN, SET_PREV_INSN
 * SET_VINSN_INSN_RTX
-- 
1.8.5.3

[PATCH 083/236] init-regs.c: rtx_insn

[David Malcolm]

gcc/
	* init-regs.c (initialize_uninitialized_regs): Strengthen locals
	"insn" and "move_insn" from rtx to rtx_insn *.
---
 gcc/init-regs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/init-regs.c b/gcc/init-regs.c
index 59c5bc9..d170da6 100644
--- a/gcc/init-regs.c
+++ b/gcc/init-regs.c
@@ -61,7 +61,7 @@ initialize_uninitialized_regs (void)
 
   FOR_EACH_BB_FN (bb, cfun)
     {
-      rtx insn;
+      rtx_insn *insn;
       bitmap lr = DF_LR_IN (bb);
       bitmap ur = DF_LIVE_IN (bb);
       bitmap_clear (already_genned);
@@ -96,7 +96,7 @@ initialize_uninitialized_regs (void)
 	      if (bitmap_bit_p (lr, regno)
 		  && (!bitmap_bit_p (ur, regno)))
 		{
-		  rtx move_insn;
+		  rtx_insn *move_insn;
 		  rtx reg = DF_REF_REAL_REG (use);
 
 		  bitmap_set_bit (already_genned, regno);
-- 
1.8.5.3

Re: [PATCH 000/236] Introduce rtx subclasses

[Trevor Saunders]

On Wed, Aug 06, 2014 at 01:19:39PM -0400, David Malcolm wrote:
> This is the patch series I spoke about at Cauldron in the talk
> "A proposal for typesafe RTL"; slides here:
> http://dmalcolm.fedorapeople.org/presentations/cauldron-2014/rtl
> 
> They can also be seen at:
> https://dmalcolm.fedorapeople.org/gcc/patch-backups/rtx-classes/v20/
> 
> The aim of the patch series is to improve the type-safety and
> readability of the backend by introducing subclasses of rtx (actually
> rtx_def) for *instructions*, and also for EXPR_LIST, INSN_LIST, SEQUENCE.
> 
> That way we can document directly in the code the various places that
> manipulate insn chains vs other kinds of rtx node.

makes sense, thanks for doing this.

>   * having a subclass for EXPR_LIST allows for replacing this kind of
>     thing:
> 
>       for (x = forced_labels; x; x = XEXP (x, 1))
>         if (XEXP (x, 0))
>            set_label_offsets (XEXP (x, 0), NULL_RTX, 1);
> 
>     with the following, which captures that it's an EXPR_LIST, and makes
>     it clearer that we're simply walking a singly-linked list:
> 
>       for (rtx_expr_list *x = forced_labels; x; x = x->next ())
>         if (x->element ())
>           set_label_offsets (x->element (), NULL_RTX, 1);

much nicer, I guess this may help us eventually make these classes stop
being rtxen and so save some memory.

>   * there's a NULL_RTX define in rtl.h.   In an earlier version of the
>     patch I added a NULL_INSN define, but in this version I simply use
>     NULL, and I'm in two minds about whether a NULL_INSN is desirable
>     (would we have a NULL_FOO for all of the subclasses?).  I like having
>     a strong distinction between arbitrary RTL nodes vs instructions,
>     so maybe there's a case for NULL_INSN, but not for the subclasses?

tbh I don't understand the point of NULL_RTX / TREE.  I tend to think
there's no point in multiple names for NULL.  After all we don't have a
NULL_INT or NULL_FLOAT, but float * and int * are pretty different.

>   * "pointerness" of the types.  "rtx" is a typedef to "rtx_def *" i.e.
>     there's an implicit pointer.  In the discussion about using C++
>     classes for gimple statements:
>        https://gcc.gnu.org/ml/gcc-patches/2014-04/msg01427.html
>     Richi said:
> 
> > To followup myself here, it's because 'tree' is a typedef to a pointer
> > and thus 'const tree' is different from 'const tree_node *'.
> >
> > Not sure why we re-introduced the 'mistake' of making 'tree' a pointer
> > when we introduced 'gimple'.  If we were to make 'gimple' the class
> > type itself we can use gimple *, const gimple * and also const gimple &
> > (when a NULL pointer is not expected).

I guess it came from the time when gimple was a union in C, so you'd
have to write union gimple_seq * which is a bit weird.

>     So in the following patches the pointerness is explicit: the patches
>     refer to:
>        rtx_insn *insn;
>     rather than just:
>        rtx_insn insn;
>     and so one can write:
>        const rtx_insn *insn
>     and the "constness" applies to the insn, not to the pointer.
> 
>     But we could go either way here: the class could be "rtx_insn_def",
>     with "rtx_insn" a typedef to an "rtx_insn_def *" etc with:

personally I prefer it the way it is.

>   * Should as_a <rtx_insn *> accept a NULL pointer?  It's possible to make
>     the is_a_helper cope with NULL, but this adds an extra conditional.

I'd prefer it didn't accept NULL.

>     I instead added an as_a_nullable<> cast, so that you can explicitly
>     add a check against NULL before checking the code of the rtx node.

The name seems a little awkward (what exactly is nullable?) but I don't
have a better one.

> As for the performance of a regular build i.e. with as_a<>
> checks *enabled*; looking at the wallclock time taken for a bootstrap and
> regression test, for my s390 builds (with -j3) I saw:

I'm curious did you look at --enable-checking=rtl ? Did you manage to
remove some of those checks or is that future work?

> 
> s390 control:
>   "make" time: 68 mins
>   "make check" time: 122 mins
>   total time: 190 mins
> 
> s390 experiment:
>   "make" time: 70 mins
>   "make check" time: 126 mins
>   total time: 196 mins
> 
> showing a 3% increase, presumably due to the as_a and as_a_nullable
> checks.
> 
> i.e. a release build shows no change in performance; a debug build shows
> a 3% increase in time taken to bootstrap and regression test.  I believe
> the debug build could be sped up with further patches to eliminate the
> checked casts.

sounds reasonable especially if this takes over some of the role of rtl
checking.

It all looks reasonable from my skim of this series.

Trev

Re: [PATCH 000/236] Introduce rtx subclasses

[Jeff Law]

On 08/06/14 11:19, David Malcolm wrote:
>
> The aim of the patch series is to improve the type-safety and
> readability of the backend by introducing subclasses of rtx (actually
> rtx_def) for *instructions*, and also for EXPR_LIST, INSN_LIST, SEQUENCE.
>
> That way we can document directly in the code the various places that
> manipulate insn chains vs other kinds of rtx node.
Right.  And by catching this stuff at compile time developers working on 
RTL bits should become at least a tiny bit more efficient.

>
> The class hierarchy looks like this (using indentation to show
> inheritance, and indicating the invariants):
>
> class rtx_def;
>    class rtx_expr_list;           /* GET_CODE (X) == EXPR_LIST */
>    class rtx_insn_list;           /* GET_CODE (X) == INSN_LIST */
>    class rtx_sequence;            /* GET_CODE (X) == SEQUENCE */
>    class rtx_insn;                /* INSN_CHAIN_CODE_P (GET_CODE (X)) */
>      class rtx_real_insn;         /* INSN_P (X) */
>        class rtx_debug_insn;      /* DEBUG_INSN_P (X) */
>        class rtx_nonjump_insn;    /* NONJUMP_INSN_P (X) */
>        class rtx_jump_insn;       /* JUMP_P (X) */
>        class rtx_call_insn;       /* CALL_P (X) */
>      class rtx_jump_table_data;   /* JUMP_TABLE_DATA_P (X) */
>      class rtx_barrier;           /* BARRIER_P (X) */
>      class rtx_code_label;        /* LABEL_P (X) */
>      class rtx_note;              /* NOTE_P (X) */
So I think the only real question here is do we want to distinguish 
between rtx_real_insn and the others?

When I see "rtx_real_insn" my first thought is something that's going to 
turn into an instruction.  But that's not true in this hierarchy due to 
rtx_debug_insn.

So throughout the work-to-date, did you find much use for rtx_real_insn?

>
> The patch series also contains some cleanups using inline methods:
>
>    * being able to get rid of this boilerplate everywhere that jump tables
>      are handled:
>
>        if (GET_CODE (PATTERN (table)) == ADDR_VEC)
>          vec = XVEC (PATTERN (table), 0);
>        else
>          vec = XVEC (PATTERN (table), 1);
>
>     in favor of a helper method (inlined):
>
>        vec = table->get_labels ();
Right.  I suspect there's other cleanups like this all over the place 
that we could do and probably should in the interest of readability.




>
>    * having a subclass for EXPR_LIST allows for replacing this kind of
>      thing:
>
>        for (x = forced_labels; x; x = XEXP (x, 1))
>          if (XEXP (x, 0))
>             set_label_offsets (XEXP (x, 0), NULL_RTX, 1);
>
>      with the following, which captures that it's an EXPR_LIST, and makes
>      it clearer that we're simply walking a singly-linked list:
>
>        for (rtx_expr_list *x = forced_labels; x; x = x->next ())
>          if (x->element ())
>            set_label_offsets (x->element (), NULL_RTX, 1);
And would could argue here that we really just want to utilize some 
standard list container.  I'm not sure what we're getting by rolling our 
own.  When we discussed this a few weeks ago, I probably should have 
pushed a bit harder on that.  But I think we can/should table that 
discussion.  What you've done is a clear step forward and I think should 
be reviewed on those merits.  If someone wants to go another step 
forward and use standard containers, that can be dealt with independently.


>
> There are some surface details to the patches:
>
>    * class names.  The subclass names correspond to the lower_case name
>      from rtl.def, with an "rtx_" prefix.  "rtx_insn" and "rtx_real_insn"
>      don't correspond to concrete node kinds, and hence I had to invent
>      the names.  (In an earlier version of the patches these were
>      "rtx_base_insn" and "rtx_insn" respectively, but the former occurred
>      much more than the latter and so it seemed better to use the shorter
>      spelling for the common case).
I can live with the existing class names.

>
>    * there's a NULL_RTX define in rtl.h.   In an earlier version of the
>      patch I added a NULL_INSN define, but in this version I simply use
>      NULL, and I'm in two minds about whether a NULL_INSN is desirable
>      (would we have a NULL_FOO for all of the subclasses?).  I like having
>      a strong distinction between arbitrary RTL nodes vs instructions,
>      so maybe there's a case for NULL_INSN, but not for the subclasses?
No strong opinion here.  I think we added NULL_TREE/NULL_RTX.  I could 
possibly see extending that to the overall concept of "insn chain 
things", but I think doing one for each subclass would probably be overkill.

>
>    * I added an "rtx_real_insn" subclass for the INSN_P predicate, adding
>      the idea of a PATTERN, a basic_block, and a location - but I hardly
>      use this anywhere.  That said, it seems to be a real concept in the
>      code, so I added it.
So DEBUG_INSN has a pattern and that's how it got into rtx_real_insn. 
Hmmm.  Would agree it's a real concept in the code, but as much as I 
hate bikeshedding on names, this is one that just doesn't fit well.  If 
you didn't use it much, maybe it's fixable without an enormous amount of 
renaming work.

>
>      So in the following patches the pointerness is explicit: the patches
>      refer to:
>         rtx_insn *insn;
>      rather than just:
>         rtx_insn insn;
>      and so one can write:
>         const rtx_insn *insn
>      and the "constness" applies to the insn, not to the pointer.
Seems like the right direction to me.


>
>    * Should as_a <rtx_insn *> accept a NULL pointer?  It's possible to make
>      the is_a_helper cope with NULL, but this adds an extra conditional.
>      I instead added an as_a_nullable<> cast, so that you can explicitly
>      add a check against NULL before checking the code of the rtx node.
>      But maybe it's cleaner to simply have is_a_helper<rtx_insn *> cope
>      with NULL?
I'd think not.


>
> Some deeper questions:
>
>    * should rtx_insn eventually be a separate class from rtx, separating
>      insn chain nodes from rtx nodes?  I don't know if that's a worthwhile
>      longterm goal, but this patch series gets us somewhere closer to
>      being able to achieve that.  (actually getting there would be a much
>      more invasive set of patches).
I think so and it generally matches what we've done with gimple.  One 
could even argue that the insn chain itself really should just be a 
standard container class, but I think that's much further out.

>
> To keep this reviewable, and to try to mitigate bitrot, I've chopped it up
> into numerous relatively small patches.  The aim is that at every patch,
> the code correctly builds on all supported configurations.  That said,
> there's a complicated dependency graph of types in gcc's code, so to
> tame that, the patch series is divided into 6 phases:
So from a staging standpoint I think you should install as we go rather 
than waiting for the entire set to be approved.  My worry is that given 
the size, by the time we get it reviewed & updated, there'll have been 
more bitrot and you end up iterating quite a bit just because it takes 
time to fixup details in your patchkit and the code is continually 
changing under you.


>
>    * phase 1 adds "scaffolding": in various places, strengthen the return
>      types from internal APIs and macros so as to promise an rtx_insn *
>      rather than a plain rtx.  For example, the DEP_PRO/DEP_CON macros
>      in sched-int.h which lookup fields within struct _dep become inline
>      functions that return rtx_insn * (using checked casts).  In this way,
>      stronger type information can be used by subsequent patches whilst
>      avoiding the chicken-and-egg issue since writes to the fields can
>      still be arbitrary rtx nodes, according to the type system at least.
Right.

>
>    * phase 2: an alphabetical tour of the backend: a series of patches,
>      from alias.c through web.c, each patch touching one file,
>      strengthening the types within it as much as we can at that point.
>      The patches sometimes make use of the alphabetic ordering in order to
>      use APIs that have already been strengthened to work on rtx_insn.
OK.  Good to know that patch later patch in this part may depend on the 
API guarantees from an earlier patch.

>
>    * phase 3: similar to phase 2, but for the various config
>      subdirectories.
Right.  I'd think in phase 3, each backend ought to be independent.  So 
various backend changes ought to be able to go in, even if there's 
something contentious in a different config directory.

>    * phase 4: tears down the scaffolding, replacing checked casts as much
>      as possible by strengthening core fields of core types.  For example,
>      we eventually reach the point in sched-int.h where the fields "pro"
>      and "con" within struct _dep can become rtx_insn *, and hence
>      DEP_PRO/DEP_CON can be converted back to plain macros, without needing
>      the checked cast.
Right.


>
>    * phase 5: all of the above was for instructions; this phase adds three
>      subclasses for other node kinds.  I experimented with subclasses for
>      various node kinds; these three seemed most appropriate: EXPR_LIST,
>      INSN_LIST, SEQUENCE.  I kept these as a separate phase as Jeff asked
>      me to separate them from the instruction patches, to avoid
>      complicating things, but I think these three are also a worthwhile
>      cleanup with relatively little complexity.
Ok.  Wished we'd talked more about this, but it's not the end of the world.

>
>    * phase 6: (new since my Cauldron talk): this phase freely uses
>      EXPR_LIST, INSN_LIST, SEQUENCE to do cleanups that were awkward
>      without them.  In particular, by the end of this phase, NEXT_INSN()
>      and PREV_INSN() require rtx_insn * rather than plain rtx.
Woo Wooo!

So out of curiosity, any thoughts on what other big things are out there 
that need to be fixed.  I'm keen to keep this stuff moving as much as 
possible.

>
> The patches (and my control for testing) has been on top of r211061, which
> being from 2014-05-29 is now two months old, but hopefully is still
> reviewable; naturally I'll perform bootstrap and regression testing for
> each patch in turn before committing.
It's still reviewable, though you'll likely find some minor changes will 
be needed just due to churn.  The iterator/for_each_rtx work comes 
immediately to mind, but I'm sure there'll be others.

A part of me really wonders if the 6 phases above should have been 
submitted independently.  ie, once the scaffolding was done why not go 
ahead and get that reviewed & installed, then move on to phase2 patches. 
  I bring it up more for future work of a similar nature.

I realize that you had to do a fair amount of the later work to ensure 
the scaffolding was right and so that we could see what the end result 
would likely look like.  But something feels like it could be staged better.

Anyway...


>
> Performance
> ===========
>
> I tested the performance with --enable-checking=release using
> two large files (kdecore.cc, bigcode.c), comparing a control build
> to a patched build.
>
> There were no significant differences in compilation time:
OK.  A bit of a surprise, but then again perhaps not because we don't 
enable RTL checking by default.  And I suspect a goodly amount of the 
RTL checking overhead is in the operands, not on the chain itself.


>>
>
> As for the performance of a regular build i.e. with as_a<>
> checks *enabled*; looking at the wallclock time taken for a bootstrap and
> regression test, for my s390 builds (with -j3) I saw:
>
> s390 control:
>    "make" time: 68 mins
>    "make check" time: 122 mins
>    total time: 190 mins
>
> s390 experiment:
>    "make" time: 70 mins
>    "make check" time: 126 mins
>    total time: 196 mins
>
> showing a 3% increase, presumably due to the as_a and as_a_nullable
> checks.
You want to be real careful benchmarking on ppc/s390 hardware as they're 
partitioned and what goes on in a different partition can affect your 
partition.


>
> i.e. a release build shows no change in performance; a debug build shows
> a 3% increase in time taken to bootstrap and regression test.  I believe
> the debug build could be sped up with further patches to eliminate the
> checked casts.
Yea.  As I've mentioned, my vision is to try and push out the casts as 
much as reasonably possible.

Re: [PATCH 000/236] Introduce rtx subclasses

[David Malcolm]

On Tue, 2014-08-12 at 14:39 -0600, Jeff Law wrote:
> On 08/06/14 11:19, David Malcolm wrote:
> >
> > The aim of the patch series is to improve the type-safety and
> > readability of the backend by introducing subclasses of rtx (actually
> > rtx_def) for *instructions*, and also for EXPR_LIST, INSN_LIST, SEQUENCE.
> >
> > That way we can document directly in the code the various places that
> > manipulate insn chains vs other kinds of rtx node.
> Right.  And by catching this stuff at compile time developers working on 
> RTL bits should become at least a tiny bit more efficient.
> >
> > The class hierarchy looks like this (using indentation to show
> > inheritance, and indicating the invariants):
> >
> > class rtx_def;
> >    class rtx_expr_list;           /* GET_CODE (X) == EXPR_LIST */
> >    class rtx_insn_list;           /* GET_CODE (X) == INSN_LIST */
> >    class rtx_sequence;            /* GET_CODE (X) == SEQUENCE */
> >    class rtx_insn;                /* INSN_CHAIN_CODE_P (GET_CODE (X)) */
> >      class rtx_real_insn;         /* INSN_P (X) */
> >        class rtx_debug_insn;      /* DEBUG_INSN_P (X) */
> >        class rtx_nonjump_insn;    /* NONJUMP_INSN_P (X) */
> >        class rtx_jump_insn;       /* JUMP_P (X) */
> >        class rtx_call_insn;       /* CALL_P (X) */
> >      class rtx_jump_table_data;   /* JUMP_TABLE_DATA_P (X) */
> >      class rtx_barrier;           /* BARRIER_P (X) */
> >      class rtx_code_label;        /* LABEL_P (X) */
> >      class rtx_note;              /* NOTE_P (X) */
> So I think the only real question here is do we want to distinguish 
> between rtx_real_insn and the others?
> 
> When I see "rtx_real_insn" my first thought is something that's going to 
> turn into an instruction.  But that's not true in this hierarchy due to 
> rtx_debug_insn.
> 
> So throughout the work-to-date, did you find much use for rtx_real_insn?

Essentially zero in the work-to-date.

Of the 13 new subclasses of rtx, I only make major use of about half of
them; here are the frequencies (as reported by grep -w in my current
working copy):

      class rtx_def;   /* ~26000 for "rtx" */
        class rtx_expr_list;           /* 73 */
        class rtx_insn_list;           /* 130 */
        class rtx_sequence;            /* 71 */
        class rtx_insn;                /* ~4300 */
          class rtx_real_insn;         /* 17 */
            class rtx_debug_insn;      /* 9 */
            class rtx_nonjump_insn;    /* 5 */
            class rtx_jump_insn;       /* 9 */
            class rtx_call_insn;       /* 25 */
          class rtx_jump_table_data;   /* 41 */
          class rtx_barrier;           /* 25 */
          class rtx_code_label;        /* 176 */
          class rtx_note;              /* 63 */

i.e. rtx_real_insn is basically unused, as are rtx_debug_insn,
rtx_nonjump_insn and rtx_jump_insn.

I think there's a case for keeping the concrete subclasses (those last
three), but we can drop rtx_real_insn.

I did some analysis of the operands of the various subclasses:

     class rtx_def;
       class rtx_expr_list;           /* "ee" */
       class rtx_insn_list;           /* "ue" */
       class rtx_sequence;            /* "E"  */
       class rtx_insn;
         class rtx_real_insn;
                                      /*  01234567 */
           class rtx_debug_insn;      /* "uuBeiie" */
           class rtx_nonjump_insn;    /* "uuBeiie" */
           class rtx_jump_insn;       /* "uuBeiie0" */
           class rtx_call_insn;       /* "uuBeiiee" */
         class rtx_jump_table_data;   /* "uuBe0000" */
         class rtx_barrier;           /* "uu00000"  */
         class rtx_code_label;        /* "uuB00is"  */
         class rtx_note;              /* "uuB0ni"  */
/*                                        01234567
                                          ││││││││
            XEXP (insn, 0):   PREV_INSN()─┘│││││││
            XEXP (insn, 1):    NEXT_INSN()─┘││││││
          XBBDEF (insn, 2):BLOCK_FOR_INSN()─┘│││││
            XEXP (insn, 3):        PATTERN()─┘││││
           XUINT (insn, 4):   INSN_LOCATION()─┘│││
            XINT (insn, 5):        INSN_CODE()─┘││
            XEXP (insn, 6):         REG_NOTES()─┘│
  XEXP(INSN, 7): CALL_INSN_FUNCTION_USAGE(INSN) ─┘ */

with an rtx_real_insn you're guaranteed at least a "uuBeiie".  But
nothing is using that in the patches as they stand, so we can simply
drop the class.

Perhaps the class hierarchy diagram in coretypes.h should gain the above
operand annotation?


> > The patch series also contains some cleanups using inline methods:
> >
> >    * being able to get rid of this boilerplate everywhere that jump tables
> >      are handled:
> >
> >        if (GET_CODE (PATTERN (table)) == ADDR_VEC)
> >          vec = XVEC (PATTERN (table), 0);
> >        else
> >          vec = XVEC (PATTERN (table), 1);
> >
> >     in favor of a helper method (inlined):
> >
> >        vec = table->get_labels ();
> Right.  I suspect there's other cleanups like this all over the place 
> that we could do and probably should in the interest of readability.

(nods)

> >    * having a subclass for EXPR_LIST allows for replacing this kind of
> >      thing:
> >
> >        for (x = forced_labels; x; x = XEXP (x, 1))
> >          if (XEXP (x, 0))
> >             set_label_offsets (XEXP (x, 0), NULL_RTX, 1);
> >
> >      with the following, which captures that it's an EXPR_LIST, and makes
> >      it clearer that we're simply walking a singly-linked list:
> >
> >        for (rtx_expr_list *x = forced_labels; x; x = x->next ())
> >          if (x->element ())
> >            set_label_offsets (x->element (), NULL_RTX, 1);
> And would could argue here that we really just want to utilize some 
> standard list container.  I'm not sure what we're getting by rolling our 
> own.  When we discussed this a few weeks ago, I probably should have 
> pushed a bit harder on that.  But I think we can/should table that 
> discussion.  What you've done is a clear step forward and I think should 
> be reviewed on those merits.  If someone wants to go another step 
> forward and use standard containers, that can be dealt with independently.

(nods)

> >
> > There are some surface details to the patches:
> >
> >    * class names.  The subclass names correspond to the lower_case name
> >      from rtl.def, with an "rtx_" prefix.  "rtx_insn" and "rtx_real_insn"
> >      don't correspond to concrete node kinds, and hence I had to invent
> >      the names.  (In an earlier version of the patches these were
> >      "rtx_base_insn" and "rtx_insn" respectively, but the former occurred
> >      much more than the latter and so it seemed better to use the shorter
> >      spelling for the common case).
> I can live with the existing class names.

(nods)

> >
> >    * there's a NULL_RTX define in rtl.h.   In an earlier version of the
> >      patch I added a NULL_INSN define, but in this version I simply use
> >      NULL, and I'm in two minds about whether a NULL_INSN is desirable
> >      (would we have a NULL_FOO for all of the subclasses?).  I like having
> >      a strong distinction between arbitrary RTL nodes vs instructions,
> >      so maybe there's a case for NULL_INSN, but not for the subclasses?
> No strong opinion here.  I think we added NULL_TREE/NULL_RTX.  I could 
> possibly see extending that to the overall concept of "insn chain 
> things", but I think doing one for each subclass would probably be overkill.

In the absence of strong opinions, maybe we should proceed with the
patches as written i.e. *without* a NULL_INSN define.


> >    * I added an "rtx_real_insn" subclass for the INSN_P predicate, adding
> >      the idea of a PATTERN, a basic_block, and a location - but I hardly
> >      use this anywhere.  That said, it seems to be a real concept in the
> >      code, so I added it.
> So DEBUG_INSN has a pattern and that's how it got into rtx_real_insn. 
> Hmmm.  Would agree it's a real concept in the code, but as much as I 
> hate bikeshedding on names, this is one that just doesn't fit well.  If 
> you didn't use it much, maybe it's fixable without an enormous amount of 
> renaming work.

I now think my comment above is incorrect, based on re-reading the
operands in rtl.def and my chart above.  So let's just drop
rtx_real_insn; it shouldn't affect the patches much.

> >      So in the following patches the pointerness is explicit: the patches
> >      refer to:
> >         rtx_insn *insn;
> >      rather than just:
> >         rtx_insn insn;
> >      and so one can write:
> >         const rtx_insn *insn
> >      and the "constness" applies to the insn, not to the pointer.
> Seems like the right direction to me.

(nods)

> >    * Should as_a <rtx_insn *> accept a NULL pointer?  It's possible to make
> >      the is_a_helper cope with NULL, but this adds an extra conditional.
> >      I instead added an as_a_nullable<> cast, so that you can explicitly
> >      add a check against NULL before checking the code of the rtx node.
> >      But maybe it's cleaner to simply have is_a_helper<rtx_insn *> cope
> >      with NULL?
> I'd think not.

FWIW I seem to recall Andrew MacLeod saying that in at least one
iteration of his tree separation patches that he'd written an
is_a_helper<T> for some T that coped with NULL.

> > Some deeper questions:
> >
> >    * should rtx_insn eventually be a separate class from rtx, separating
> >      insn chain nodes from rtx nodes?  I don't know if that's a worthwhile
> >      longterm goal, but this patch series gets us somewhere closer to
> >      being able to achieve that.  (actually getting there would be a much
> >      more invasive set of patches).
> I think so and it generally matches what we've done with gimple.  

OK

> One could even argue that the insn chain itself really should just be a 
> standard container class, but I think that's much further out.

Interesting.

> > To keep this reviewable, and to try to mitigate bitrot, I've chopped it up
> > into numerous relatively small patches.  The aim is that at every patch,
> > the code correctly builds on all supported configurations.  That said,
> > there's a complicated dependency graph of types in gcc's code, so to
> > tame that, the patch series is divided into 6 phases:
> So from a staging standpoint I think you should install as we go rather 
> than waiting for the entire set to be approved.  My worry is that given 
> the size, by the time we get it reviewed & updated, there'll have been 
> more bitrot and you end up iterating quite a bit just because it takes 
> time to fixup details in your patchkit and the code is continually 
> changing under you.

OK.


> >    * phase 1 adds "scaffolding": in various places, strengthen the return
> >      types from internal APIs and macros so as to promise an rtx_insn *
> >      rather than a plain rtx.  For example, the DEP_PRO/DEP_CON macros
> >      in sched-int.h which lookup fields within struct _dep become inline
> >      functions that return rtx_insn * (using checked casts).  In this way,
> >      stronger type information can be used by subsequent patches whilst
> >      avoiding the chicken-and-egg issue since writes to the fields can
> >      still be arbitrary rtx nodes, according to the type system at least.
> Right.
> 
> >
> >    * phase 2: an alphabetical tour of the backend: a series of patches,
> >      from alias.c through web.c, each patch touching one file,
> >      strengthening the types within it as much as we can at that point.
> >      The patches sometimes make use of the alphabetic ordering in order to
> >      use APIs that have already been strengthened to work on rtx_insn.
> OK.  Good to know that patch later patch in this part may depend on the 
> API guarantees from an earlier patch.
> 
> >
> >    * phase 3: similar to phase 2, but for the various config
> >      subdirectories.
> Right.  I'd think in phase 3, each backend ought to be independent.  So 
> various backend changes ought to be able to go in, even if there's 
> something contentious in a different config directory.

Yes: I *think* all of these ones are independent from each other.

> >    * phase 4: tears down the scaffolding, replacing checked casts as much
> >      as possible by strengthening core fields of core types.  For example,
> >      we eventually reach the point in sched-int.h where the fields "pro"
> >      and "con" within struct _dep can become rtx_insn *, and hence
> >      DEP_PRO/DEP_CON can be converted back to plain macros, without needing
> >      the checked cast.
> Right.
> 
> 
> >
> >    * phase 5: all of the above was for instructions; this phase adds three
> >      subclasses for other node kinds.  I experimented with subclasses for
> >      various node kinds; these three seemed most appropriate: EXPR_LIST,
> >      INSN_LIST, SEQUENCE.  I kept these as a separate phase as Jeff asked
> >      me to separate them from the instruction patches, to avoid
> >      complicating things, but I think these three are also a worthwhile
> >      cleanup with relatively little complexity.
> Ok.  Wished we'd talked more about this, but it's not the end of the world.

The impression I got of the mood in the room at my Cauldron talk was
that people were broadly happy with these three classes; albeit perhaps
as a stepping stone to using other container classes...

> >    * phase 6: (new since my Cauldron talk): this phase freely uses
> >      EXPR_LIST, INSN_LIST, SEQUENCE to do cleanups that were awkward
> >      without them.  In particular, by the end of this phase, NEXT_INSN()
> >      and PREV_INSN() require rtx_insn * rather than plain rtx.
> Woo Wooo!

...which is why I used them in the big push for the params of
NEXT_INSN/PREV_INSN in phase 6.

> So out of curiosity, any thoughts on what other big things are out there 
> that need to be fixed.  I'm keen to keep this stuff moving as much as 
> possible.

Arguably PATTERN() should require an rtx_insn * rather than a plain rtx,
but it would be an involved patch.

Other followups would be to reduce the number of as_a <rtx_insn *> in
the code; for example grepping for "uncast_" shows quite a few, a
pattern where I strengthen the type of a parameter as seen within the
function without needing to strengthen the param itself, where:

   void foo (rtx insn)
   {
	/* do things with insn */
   }

becomes:

   void foo (rtx uncast_insn)
   {
	rtx_insn *insn = as_a_nullable <rtx_insn *> (uncast_insn);
	/* do things with insn */
   }

which is something of a shortcut to doing it "properly" as:

   void foo (rtx_insn *insn)
   {
	/* do things with insn */
   }

Major (ab)users of the above right now are e.g. the emit_*_{before|
after}() functions in emit-rtl.c.


> > The patches (and my control for testing) has been on top of r211061, which
> > being from 2014-05-29 is now two months old, but hopefully is still
> > reviewable; naturally I'll perform bootstrap and regression testing for
> > each patch in turn before committing.
> It's still reviewable, though you'll likely find some minor changes will 
> be needed just due to churn.  The iterator/for_each_rtx work comes 
> immediately to mind, but I'm sure there'll be others.

That one occurred to me also.

> A part of me really wonders if the 6 phases above should have been 
> submitted independently.  ie, once the scaffolding was done why not go 
> ahead and get that reviewed & installed, then move on to phase2 patches. 
>   I bring it up more for future work of a similar nature.
> 
> I realize that you had to do a fair amount of the later work to ensure 
> the scaffolding was right and so that we could see what the end result 
> would likely look like.  But something feels like it could be staged better.

FWIW What you're seeing is the end result of a *lot* of 
"git rebase -i", where I was splitting, combining, and reordering
patches: the phases didn't exist as fully-formed entities until I was
ready to send the patches.

Though I appreciate things were suboptimal here.

> Anyway...
> 
> 
> >
> > Performance
> > ===========
> >
> > I tested the performance with --enable-checking=release using
> > two large files (kdecore.cc, bigcode.c), comparing a control build
> > to a patched build.
> >
> > There were no significant differences in compilation time:
> OK.  A bit of a surprise, but then again perhaps not because we don't 
> enable RTL checking by default.  And I suspect a goodly amount of the 
> RTL checking overhead is in the operands, not on the chain itself.
> 
> 
> >>
> >
> > As for the performance of a regular build i.e. with as_a<>
> > checks *enabled*; looking at the wallclock time taken for a bootstrap and
> > regression test, for my s390 builds (with -j3) I saw:
> >
> > s390 control:
> >    "make" time: 68 mins
> >    "make check" time: 122 mins
> >    total time: 190 mins
> >
> > s390 experiment:
> >    "make" time: 70 mins
> >    "make check" time: 126 mins
> >    total time: 196 mins
> >
> > showing a 3% increase, presumably due to the as_a and as_a_nullable
> > checks.
> You want to be real careful benchmarking on ppc/s390 hardware as they're 
> partitioned and what goes on in a different partition can affect your 
> partition.

Ah.  This suggests my testing may need redoing.  I'll try to redo this
on a dedicated x86_64 box.

> > i.e. a release build shows no change in performance; a debug build shows
> > a 3% increase in time taken to bootstrap and regression test.  I believe
> > the debug build could be sped up with further patches to eliminate the
> > checked casts.
> Yea.  As I've mentioned, my vision is to try and push out the casts as 
> much as reasonably possible.

(nods)

Thanks
Dave

Re: [PATCH 000/236] Introduce rtx subclasses

[Jeff Law]

On 08/12/14 18:26, David Malcolm wrote:
> Essentially zero in the work-to-date.
>
> Of the 13 new subclasses of rtx, I only make major use of about half of
> them; here are the frequencies (as reported by grep -w in my current
> working copy):
>
>        class rtx_def;   /* ~26000 for "rtx" */
>          class rtx_expr_list;           /* 73 */
>          class rtx_insn_list;           /* 130 */
>          class rtx_sequence;            /* 71 */
>          class rtx_insn;                /* ~4300 */
>            class rtx_real_insn;         /* 17 */
>              class rtx_debug_insn;      /* 9 */
>              class rtx_nonjump_insn;    /* 5 */
>              class rtx_jump_insn;       /* 9 */
>              class rtx_call_insn;       /* 25 */
>            class rtx_jump_table_data;   /* 41 */
>            class rtx_barrier;           /* 25 */
>            class rtx_code_label;        /* 176 */
>            class rtx_note;              /* 63 */
>
> i.e. rtx_real_insn is basically unused, as are rtx_debug_insn,
> rtx_nonjump_insn and rtx_jump_insn.
>
> I think there's a case for keeping the concrete subclasses (those last
> three), but we can drop rtx_real_insn.
Let's go with that.  I wouldn't be surprised if we find more cases where 
we want the more concrete classes in the future, so I'm not worried 
about their low usage at this point.

And we can always re-introduce the real-insn concept in the future if we 
find the need.  I guess I'm rather biased against deep inheritance 
hierarchies after working on projects with unnecessarily deep 
hierarchies in the past.


>
> with an rtx_real_insn you're guaranteed at least a "uuBeiie".  But
> nothing is using that in the patches as they stand, so we can simply
> drop the class.
And that's the one property I think argues to keep the intermediate 
class.  But with nothing using it right now, let's drop.

>
> Perhaps the class hierarchy diagram in coretypes.h should gain the above
> operand annotation?
Sure.  Feel free to add that tidbit whenever you feel.

>> No strong opinion here.  I think we added NULL_TREE/NULL_RTX.  I could
>> possibly see extending that to the overall concept of "insn chain
>> things", but I think doing one for each subclass would probably be overkill.
>
> In the absence of strong opinions, maybe we should proceed with the
> patches as written i.e. *without* a NULL_INSN define.
OK.  We can revisit if/when we make things in the chain separate from rtxs.

>
>> So out of curiosity, any thoughts on what other big things are out there
>> that need to be fixed.  I'm keen to keep this stuff moving as much as
>> possible.
>
> Arguably PATTERN() should require an rtx_insn * rather than a plain rtx,
> but it would be an involved patch.
Yea.  That's a good one.  Probably a series unto itself at some point.



>
> Other followups would be to reduce the number of as_a <rtx_insn *> in
> the code; for example grepping for "uncast_" shows quite a few, a
> pattern where I strengthen the type of a parameter as seen within the
> function without needing to strengthen the param itself, where:
Yea.  These are reasonable to attack independently.


>
>> A part of me really wonders if the 6 phases above should have been
>> submitted independently.  ie, once the scaffolding was done why not go
>> ahead and get that reviewed & installed, then move on to phase2 patches.
>>    I bring it up more for future work of a similar nature.
>>
>> I realize that you had to do a fair amount of the later work to ensure
>> the scaffolding was right and so that we could see what the end result
>> would likely look like.  But something feels like it could be staged better.
>
> FWIW What you're seeing is the end result of a *lot* of
> "git rebase -i", where I was splitting, combining, and reordering
> patches: the phases didn't exist as fully-formed entities until I was
> ready to send the patches.
>
> Though I appreciate things were suboptimal here.
Understood.  Just looking for a way where we an move this kind of work 
forward without the level of pain on your side and without having to 
wait for a 236 series patchset before it can be contributed.  Maybe we 
just have to accept that this kind of work is going to be difficult to 
stage for reviews.  Dunno, just feels like we ought to be able to make 
it simpler for both of us and have smaller hunks staging in earlier.

Jeff

Re: [PATCH 000/236] Introduce rtx subclasses

[David Malcolm]

On Tue, 2014-08-12 at 20:26 -0400, David Malcolm wrote:
> On Tue, 2014-08-12 at 14:39 -0600, Jeff Law wrote:
> > On 08/06/14 11:19, David Malcolm wrote:
> > >
> > > The aim of the patch series is to improve the type-safety and
> > > readability of the backend by introducing subclasses of rtx (actually
> > > rtx_def) for *instructions*, and also for EXPR_LIST, INSN_LIST, SEQUENCE.
> > >
> > > That way we can document directly in the code the various places that
> > > manipulate insn chains vs other kinds of rtx node.
> > Right.  And by catching this stuff at compile time developers working on 
> > RTL bits should become at least a tiny bit more efficient.

[...snip...]

> > > Performance
> > > ===========
> > >
> > > I tested the performance with --enable-checking=release using
> > > two large files (kdecore.cc, bigcode.c), comparing a control build
> > > to a patched build.
> > >
> > > There were no significant differences in compilation time:
> > OK.  A bit of a surprise, but then again perhaps not because we don't 
> > enable RTL checking by default.  And I suspect a goodly amount of the 
> > RTL checking overhead is in the operands, not on the chain itself.
> > 
> > 
> > >>
> > >
> > > As for the performance of a regular build i.e. with as_a<>
> > > checks *enabled*; looking at the wallclock time taken for a bootstrap and
> > > regression test, for my s390 builds (with -j3) I saw:
> > >
> > > s390 control:
> > >    "make" time: 68 mins
> > >    "make check" time: 122 mins
> > >    total time: 190 mins
> > >
> > > s390 experiment:
> > >    "make" time: 70 mins
> > >    "make check" time: 126 mins
> > >    total time: 196 mins
> > >
> > > showing a 3% increase, presumably due to the as_a and as_a_nullable
> > > checks.
> > You want to be real careful benchmarking on ppc/s390 hardware as they're 
> > partitioned and what goes on in a different partition can affect your 
> > partition.
> 
> Ah.  This suggests my testing may need redoing.  I'll try to redo this
> on a dedicated x86_64 box.

I've now redone timed bootstrap testing on a dedicated x86_64 box (64
core Opteron with 128GB, with -j64).  These were "regular" builds i.e.
without setting --enable-checking.

Unpatched build:
   "make" time: 15 mins
   "make check" time: 115 mins
   total time: 130 mins

Patched build (with the full patchkit):
   "make" time: 16 mins
   "make check" time: 116 mins
   total time: 132 mins

(and equal results from the regrtest)

> > > i.e. a release build shows no change in performance; a debug build shows
> > > a 3% increase in time taken to bootstrap and regression test.  I believe
> > > the debug build could be sped up with further patches to eliminate the
> > > checked casts.
> > Yea.  As I've mentioned, my vision is to try and push out the casts as 
> > much as reasonably possible.

(FWIW, I have been working on further optimizations to remove checked
casts, but the above is without those optimizations)

Re: [PATCH 000/236] Introduce rtx subclasses

[David Malcolm]

On Wed, 2014-08-06 at 13:19 -0400, David Malcolm wrote:
> This is the patch series I spoke about at Cauldron in the talk
> "A proposal for typesafe RTL"; slides here:
> http://dmalcolm.fedorapeople.org/presentations/cauldron-2014/rtl
> 
> They can also be seen at:
> https://dmalcolm.fedorapeople.org/gcc/patch-backups/rtx-classes/v20/

[...snip...]

> The patches (and my control for testing) has been on top of r211061, which
> being from 2014-05-29 is now two months old, but hopefully is still
> reviewable; naturally I'll perform bootstrap and regression testing for
> each patch in turn before committing.

FWIW I've now rebased the patches against today's trunk (specifically
r213914) and I've backed up the results to:
https://dmalcolm.fedorapeople.org/gcc/patch-backups/rtx-classes/v21/

Still TODO:
  * rename as_a_nullable<> to safe_as_a<>
  * eliminate rtx_real_insn
  * make various scaffolding functions be inline, updating gdbinit.in as
appropriate.

[...snip...]

Dave

Re: [PATCH 000/236] Introduce rtx subclasses

[David Malcolm]

On Wed, 2014-08-13 at 20:13 -0400, David Malcolm wrote:
> On Wed, 2014-08-06 at 13:19 -0400, David Malcolm wrote:
> > This is the patch series I spoke about at Cauldron in the talk
> > "A proposal for typesafe RTL"; slides here:
> > http://dmalcolm.fedorapeople.org/presentations/cauldron-2014/rtl
> > 
> > They can also be seen at:
> > https://dmalcolm.fedorapeople.org/gcc/patch-backups/rtx-classes/v20/
> 
> [...snip...]
> 
> > The patches (and my control for testing) has been on top of r211061, which
> > being from 2014-05-29 is now two months old, but hopefully is still
> > reviewable; naturally I'll perform bootstrap and regression testing for
> > each patch in turn before committing.
> 
> FWIW I've now rebased the patches against today's trunk (specifically
> r213914) and I've backed up the results to:
> https://dmalcolm.fedorapeople.org/gcc/patch-backups/rtx-classes/v21/
> 
> Still TODO:
>   * rename as_a_nullable<> to safe_as_a<>
>   * eliminate rtx_real_insn
>   * make various scaffolding functions be inline, updating gdbinit.in as
> appropriate.
> 
> [...snip...]

Likewise; latest WIP:
https://dmalcolm.fedorapeople.org/gcc/patch-backups/rtx-classes/v22/
has:
  * the renaming of as_a_nullable<> to safe_as_a<>
  * the elimination of rtx_real_insn

Still TODO:
* make various scaffolding functions be inline, updating gdbinit.in as