From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21997 invoked by alias); 2 May 2015 21:02:31 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 21913 invoked by uid 89); 2 May 2015 21:02:30 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.4 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: paperclip.tbsaunde.org Received: from tbsaunde.org (HELO paperclip.tbsaunde.org) (66.228.47.254) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sat, 02 May 2015 21:02:29 +0000 Received: from iceball.corp.tor1.mozilla.com (unknown [23.233.68.71]) by paperclip.tbsaunde.org (Postfix) with ESMTPSA id 2B80DC072 for ; Sat, 2 May 2015 21:02:29 +0000 (UTC) From: tbsaunde+gcc@tbsaunde.org To: gcc-patches@gcc.gnu.org Subject: [PATCH 07/13] make some functions in config/ take a rtx_insn * Date: Sat, 02 May 2015 21:02:00 -0000 Message-Id: <1430600503-14069-8-git-send-email-tbsaunde+gcc@tbsaunde.org> In-Reply-To: <1430600503-14069-1-git-send-email-tbsaunde+gcc@tbsaunde.org> References: <1430600503-14069-1-git-send-email-tbsaunde+gcc@tbsaunde.org> X-IsSubscribed: yes X-SW-Source: 2015-05/txt/msg00161.txt.bz2 From: Trevor Saunders gcc/ChangeLog: 2015-05-02 Trevor Saunders to rtx_insn *. * config/i386/i386.c: Change the type of some arguments to rtx_insn *. * config/arm/arm.c: Likewise. --- gcc/ChangeLog | 7 +++++++ gcc/config/arm/arm.c | 2 +- gcc/config/i386/i386.c | 16 ++++++++-------- 3 files changed, 16 insertions(+), 9 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 17ad3df..a1c86e0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2015-05-02 Trevor Saunders + to rtx_insn *. + * config/i386/i386.c: Change the type of some arguments to + rtx_insn *. + * config/arm/arm.c: Likewise. + +2015-05-02 Trevor Saunders + * lra-constraints.c: Change type of some arguments to rtx_insn *. 2015-05-02 Trevor Saunders diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 666ef42..8a0ee38 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -16603,7 +16603,7 @@ dump_minipool (rtx_insn *scan) /* Return the cost of forcibly inserting a barrier after INSN. */ static int -arm_barrier_cost (rtx insn) +arm_barrier_cost (rtx_insn *insn) { /* Basing the location of the pool on the loop depth is preferable, but at the moment, the basic block information seems to be diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index d569244..cd7bb56 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -10488,7 +10488,7 @@ static GTY(()) rtx queued_cfa_restores; in the register and on the stack. */ static void -ix86_add_cfa_restore_note (rtx insn, rtx reg, HOST_WIDE_INT cfa_offset) +ix86_add_cfa_restore_note (rtx_insn *insn, rtx reg, HOST_WIDE_INT cfa_offset) { if (!crtl->shrink_wrapped && cfa_offset <= cfun->machine->fs.red_zone_offset) @@ -11931,7 +11931,7 @@ ix86_emit_restore_regs_using_mov (HOST_WIDE_INT cfa_offset, m->fs.drap_valid = true; } else - ix86_add_cfa_restore_note (NULL_RTX, reg, cfa_offset); + ix86_add_cfa_restore_note (NULL, reg, cfa_offset); cfa_offset -= UNITS_PER_WORD; } @@ -11956,7 +11956,7 @@ ix86_emit_restore_sse_regs_using_mov (HOST_WIDE_INT cfa_offset, set_mem_align (mem, 128); emit_move_insn (reg, mem); - ix86_add_cfa_restore_note (NULL_RTX, reg, cfa_offset); + ix86_add_cfa_restore_note (NULL, reg, cfa_offset); cfa_offset -= 16; } @@ -18274,7 +18274,7 @@ increase_distance (rtx_insn *prev, rtx_insn *next, unsigned int distance) static bool insn_defines_reg (unsigned int regno1, unsigned int regno2, - rtx insn) + rtx_insn *insn) { df_ref def; @@ -50505,7 +50505,7 @@ dispatch_violation (void) /* Return true if insn is a branch instruction. */ static bool -is_branch (rtx insn) +is_branch (rtx_insn *insn) { return (CALL_P (insn) || JUMP_P (insn)); } @@ -50513,7 +50513,7 @@ is_branch (rtx insn) /* Return true if insn is a prefetch instruction. */ static bool -is_prefetch (rtx insn) +is_prefetch (rtx_insn *insn) { return NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == PREFETCH; } @@ -50679,7 +50679,7 @@ find_constant (rtx in_rtx, imm_info *imm_values) bit immediates. */ static int -get_num_immediates (rtx insn, int *imm, int *imm32, int *imm64) +get_num_immediates (rtx_insn *insn, int *imm, int *imm32, int *imm64) { imm_info imm_values = {0, 0, 0}; @@ -50694,7 +50694,7 @@ get_num_immediates (rtx insn, int *imm, int *imm32, int *imm64) immediate. */ static bool -has_immediate (rtx insn) +has_immediate (rtx_insn *insn) { int num_imm_operand; int num_imm32_operand; -- 2.4.0