From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 37617 invoked by alias); 27 May 2015 20:16:14 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 37484 invoked by uid 89); 27 May 2015 20:16:13 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wi0-f172.google.com Received: from mail-wi0-f172.google.com (HELO mail-wi0-f172.google.com) (209.85.212.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 27 May 2015 20:16:04 +0000 Received: by wicmc15 with SMTP id mc15so104682137wic.1 for ; Wed, 27 May 2015 13:16:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=Vu6CbE+mzQynA48IsOO4r2lBTEgiMz2UXJU2R4zmKYc=; b=MAMHYCVYKhMkPYCwzDQQU0VVROrhW9LHBozvmnW0k5RiO0wMKPsHFGUBSmX/hBCuN7 7ZxlUCH0fs69TOusJ6i6aB+/pOh8FHvevm7ne4Xbu5OFHyFaUANuSeXXJRYRLGZe/Nuf GqK+NezRZAgr5Z5+xBUJbrOM/yiCv7cAlzFCHwf/j1EIH1REQOz9ppHMudbDXCeOicTX a/QeVqMkCXtg/Pab4DTeUe1Tt0fpOI7rV3PnX4qwA8o6AcQJyA+h72OzlXlwXPGVYrEB LnYOMcmVy245GERndihzEnqVjCXEwkiu9vV882J0KvvPJQZCBXJOXKMS2nRFSSxjVDI8 /9cw== X-Gm-Message-State: ALoCoQnhfWtfTpxBl3uCNHCvuF9N83oTKYwVkP0KKsfiivmF0HoeJ+11VVfZ4vYGrKwfg/yEyZXL X-Received: by 10.180.90.202 with SMTP id by10mr9201528wib.62.1432757761645; Wed, 27 May 2015 13:16:01 -0700 (PDT) Received: from babel.clyon.hd.free.fr (vig38-2-82-225-222-175.fbx.proxad.net. [82.225.222.175]) by mx.google.com with ESMTPSA id u7sm76992wif.3.2015.05.27.13.16.00 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 27 May 2015 13:16:01 -0700 (PDT) From: Christophe Lyon To: gcc-patches@gcc.gnu.org Subject: [Patch ARM-AArch64/testsuite Neon intrinsics 08/20] Add vrshrn_n tests. Date: Wed, 27 May 2015 20:16:00 -0000 Message-Id: <1432757747-4891-9-git-send-email-christophe.lyon@linaro.org> In-Reply-To: <1432757747-4891-1-git-send-email-christophe.lyon@linaro.org> References: <1432757747-4891-1-git-send-email-christophe.lyon@linaro.org> X-IsSubscribed: yes X-SW-Source: 2015-05/txt/msg02545.txt.bz2 diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrshrn_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrshrn_n.c new file mode 100644 index 0000000..a2b40b8 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrshrn_n.c @@ -0,0 +1,143 @@ +#include +#include "arm-neon-ref.h" +#include "compute-ref-data.h" + +/* Expected results with input=0. */ +VECT_VAR_DECL(expected_0,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_0,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_0,int,32,2) [] = { 0x0, 0x0 }; +VECT_VAR_DECL(expected_0,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_0,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_0,uint,32,2) [] = { 0x0, 0x0 }; + +/* Expected results. */ +VECT_VAR_DECL(expected,int,8,8) [] = { 0xf8, 0xf9, 0xf9, 0xfa, + 0xfa, 0xfb, 0xfb, 0xfc }; +VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff8, 0xfff9, 0xfff9, 0xfffa }; +VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffc, 0xfffffffc }; +VECT_VAR_DECL(expected,uint,8,8) [] = { 0xfc, 0xfc, 0xfd, 0xfd, + 0xfd, 0xfd, 0xfe, 0xfe }; +VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfffe, 0xfffe, 0xfffe, 0xfffe }; +VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffffe, 0xfffffffe }; + +/* Expected results with large shift amount. */ +VECT_VAR_DECL(expected_sh_large,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_sh_large,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_sh_large,int,32,2) [] = { 0x0, 0x0 }; +VECT_VAR_DECL(expected_sh_large,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0, + 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_sh_large,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 }; +VECT_VAR_DECL(expected_sh_large,uint,32,2) [] = { 0x0, 0x0 }; + +#define TEST_MSG "VRSHRN_N" +void exec_vrshrn_n (void) +{ + /* Basic test: v2=vrshrn_n(v1,v), then store the result. */ +#define TEST_VRSHRN_N(T1, T2, W, N, W2, V) \ + VECT_VAR(vector_res, T1, W2, N) = \ + vrshrn_n_##T2##W(VECT_VAR(vector, T1, W, N), \ + V); \ + vst1_##T2##W2(VECT_VAR(result, T1, W2, N), VECT_VAR(vector_res, T1, W2, N)) + + /* vector is twice as large as vector_res. */ + DECL_VARIABLE(vector, int, 16, 8); + DECL_VARIABLE(vector, int, 32, 4); + DECL_VARIABLE(vector, int, 64, 2); + DECL_VARIABLE(vector, uint, 16, 8); + DECL_VARIABLE(vector, uint, 32, 4); + DECL_VARIABLE(vector, uint, 64, 2); + + DECL_VARIABLE(vector_res, int, 8, 8); + DECL_VARIABLE(vector_res, int, 16, 4); + DECL_VARIABLE(vector_res, int, 32, 2); + DECL_VARIABLE(vector_res, uint, 8, 8); + DECL_VARIABLE(vector_res, uint, 16, 4); + DECL_VARIABLE(vector_res, uint, 32, 2); + + clean_results (); + + /* Fill input vector with 0, to check behavior on limits. */ + VDUP(vector, q, int, s, 16, 8, 0); + VDUP(vector, q, int, s, 32, 4, 0); + VDUP(vector, q, int, s, 64, 2, 0); + VDUP(vector, q, uint, u, 16, 8, 0); + VDUP(vector, q, uint, u, 32, 4, 0); + VDUP(vector, q, uint, u, 64, 2, 0); + + /* Choose shift amount arbitrarily. */ + TEST_VRSHRN_N(int, s, 16, 8, 8, 1); + TEST_VRSHRN_N(int, s, 32, 4, 16, 1); + TEST_VRSHRN_N(int, s, 64, 2, 32, 2); + TEST_VRSHRN_N(uint, u, 16, 8, 8, 2); + TEST_VRSHRN_N(uint, u, 32, 4, 16, 3); + TEST_VRSHRN_N(uint, u, 64, 2, 32, 3); + +#define CMT " (with input = 0)" + CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0, CMT); + CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0, CMT); + CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0, CMT); + CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0, CMT); + CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0, CMT); + CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0, CMT); + + + /* Test again, with predefined input values. */ + VLOAD(vector, buffer, q, int, s, 16, 8); + VLOAD(vector, buffer, q, int, s, 32, 4); + VLOAD(vector, buffer, q, int, s, 64, 2); + VLOAD(vector, buffer, q, uint, u, 16, 8); + VLOAD(vector, buffer, q, uint, u, 32, 4); + VLOAD(vector, buffer, q, uint, u, 64, 2); + + /* Choose shift amount arbitrarily. */ + TEST_VRSHRN_N(int, s, 16, 8, 8, 1); + TEST_VRSHRN_N(int, s, 32, 4, 16, 1); + TEST_VRSHRN_N(int, s, 64, 2, 32, 2); + TEST_VRSHRN_N(uint, u, 16, 8, 8, 2); + TEST_VRSHRN_N(uint, u, 32, 4, 16, 3); + TEST_VRSHRN_N(uint, u, 64, 2, 32, 3); + +#undef CMT +#define CMT "" + CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT); + CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT); + CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT); + CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT); + CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT); + CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT); + + + /* Fill input arbitrary values. */ + VDUP(vector, q, int, s, 16, 8, 30); + VDUP(vector, q, int, s, 32, 4, 0); + VDUP(vector, q, int, s, 64, 2, 0); + VDUP(vector, q, uint, u, 16, 8, 0xFFF0); + VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFF0); + VDUP(vector, q, uint, u, 64, 2, 0); + + /* Choose large shift amount arbitrarily. */ + TEST_VRSHRN_N(int, s, 16, 8, 8, 7); + TEST_VRSHRN_N(int, s, 32, 4, 16, 14); + TEST_VRSHRN_N(int, s, 64, 2, 32, 31); + TEST_VRSHRN_N(uint, u, 16, 8, 8, 7); + TEST_VRSHRN_N(uint, u, 32, 4, 16, 16); + TEST_VRSHRN_N(uint, u, 64, 2, 32, 3); + +#undef CMT +#define CMT " (with large shift amount)" + CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_sh_large, CMT); + CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_sh_large, CMT); + CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_sh_large, CMT); + CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh_large, CMT); + CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh_large, CMT); + CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh_large, CMT); +} + +int main (void) +{ + exec_vrshrn_n (); + return 0; +} -- 2.1.4