From: Charles Baylis <charles.baylis@linaro.org>
To: Ramana.Radhakrishnan@arm.com, kyrylo.tkachov@arm.com
Cc: gcc-patches@gcc.gnu.org
Subject: [PATCH 0/3] [ARM] PR63870 improve error messages for NEON vldN_lane/vstN_lane
Date: Thu, 02 Jul 2015 15:40:00 -0000 [thread overview]
Message-ID: <1435851584-16430-1-git-send-email-charles.baylis@linaro.org> (raw)
These patches are a port of the changes do the same thing for AArch64 (see
https://gcc.gnu.org/ml/gcc-patches/2015-06/msg01984.html)
The first patch ports over some infrastructure, and the second converts the
vldN_lane and vstN_lane intrinsics. The changes required for vget_lane and
vset_lane will be done in a future patch.
The third patch includes the test cases from the AArch64 version, except that
the xfails for arm targets have been removed. If this series gets approved
before the AArch64 patch, I will commit the tests with xfail for aarch64
targets.
OK for trunk?
Charles Baylis (3):
[ARM] PR63870 Add qualifiers for NEON builtins
[ARM] PR63870 Mark lane indices of vldN/vstN with appropriate
qualifier
[ARM] PR63870 Add test cases
gcc/config/arm/arm-builtins.c | 69 ++++++++++++++++------
gcc/config/arm/arm-protos.h | 4 ++
gcc/config/arm/arm.c | 20 +++++++
gcc/config/arm/arm.h | 3 +
gcc/config/arm/neon.md | 49 +++++++--------
.../advsimd-intrinsics/vld2_lane_f32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2_lane_f64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld2_lane_p8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2_lane_s16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2_lane_s32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2_lane_s64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld2_lane_s8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2_lane_u16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2_lane_u32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2_lane_u64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld2_lane_u8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2q_lane_f32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2q_lane_f64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld2q_lane_p8_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld2q_lane_s16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2q_lane_s32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2q_lane_s64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld2q_lane_s8_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld2q_lane_u16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2q_lane_u32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld2q_lane_u64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld2q_lane_u8_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld3_lane_f32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3_lane_f64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld3_lane_p8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3_lane_s16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3_lane_s32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3_lane_s64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld3_lane_s8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3_lane_u16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3_lane_u32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3_lane_u64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld3_lane_u8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3q_lane_f32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3q_lane_f64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld3q_lane_p8_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld3q_lane_s16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3q_lane_s32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3q_lane_s64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld3q_lane_s8_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld3q_lane_u16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3q_lane_u32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld3q_lane_u64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld3q_lane_u8_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld4_lane_f32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4_lane_f64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld4_lane_p8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4_lane_s16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4_lane_s32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4_lane_s64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld4_lane_s8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4_lane_u16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4_lane_u32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4_lane_u64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld4_lane_u8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4q_lane_f32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4q_lane_f64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld4q_lane_p8_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld4q_lane_s16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4q_lane_s32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4q_lane_s64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld4q_lane_s8_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld4q_lane_u16_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4q_lane_u32_indices_1.c | 15 +++++
.../advsimd-intrinsics/vld4q_lane_u64_indices_1.c | 16 +++++
.../advsimd-intrinsics/vld4q_lane_u8_indices_1.c | 16 +++++
.../advsimd-intrinsics/vst2_lane_f32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2_lane_f64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst2_lane_p8_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2_lane_s16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2_lane_s32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2_lane_s64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst2_lane_s8_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2_lane_u16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2_lane_u32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2_lane_u64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst2_lane_u8_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2q_lane_f32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2q_lane_f64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst2q_lane_p8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst2q_lane_s16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2q_lane_s32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2q_lane_s64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst2q_lane_s8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst2q_lane_u16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2q_lane_u32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst2q_lane_u64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst2q_lane_u8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst3_lane_f32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3_lane_f64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst3_lane_p8_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3_lane_s16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3_lane_s32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3_lane_s64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst3_lane_s8_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3_lane_u16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3_lane_u32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3_lane_u64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst3_lane_u8_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3q_lane_f32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3q_lane_f64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst3q_lane_p8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst3q_lane_s16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3q_lane_s32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3q_lane_s64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst3q_lane_s8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst3q_lane_u16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3q_lane_u32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst3q_lane_u64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst3q_lane_u8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst4_lane_f32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4_lane_f64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst4_lane_p8_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4_lane_s16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4_lane_s32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4_lane_s64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst4_lane_s8_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4_lane_u16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4_lane_u32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4_lane_u64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst4_lane_u8_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4q_lane_f32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4q_lane_f64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst4q_lane_p8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst4q_lane_s16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4q_lane_s32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4q_lane_s64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst4q_lane_s8_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst4q_lane_u16_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4q_lane_u32_indices_1.c | 14 +++++
.../advsimd-intrinsics/vst4q_lane_u64_indices_1.c | 15 +++++
.../advsimd-intrinsics/vst4q_lane_u8_indices_1.c | 15 +++++
137 files changed, 2071 insertions(+), 42 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c
--
1.9.1
next reply other threads:[~2015-07-02 15:40 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-02 15:40 Charles Baylis [this message]
2015-07-02 15:40 ` [PATCH 2/3] [ARM] PR63870 NEON error messages Charles Baylis
2015-07-02 15:40 ` [PATCH 3/3] " Charles Baylis
2015-07-02 15:40 ` [PATCH 1/3] " Charles Baylis
2015-07-06 10:18 ` Alan Lawrence
2015-07-07 12:30 ` Alan Lawrence
2015-07-07 19:03 ` Charles Baylis
2015-07-03 13:01 ` [PATCH 0/3] [ARM] PR63870 improve error messages for NEON vldN_lane/vstN_lane Alan Lawrence
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