* [PATCH 3/3] [ARM] PR63870 NEON error messages
2015-07-02 15:40 [PATCH 0/3] [ARM] PR63870 improve error messages for NEON vldN_lane/vstN_lane Charles Baylis
2015-07-02 15:40 ` [PATCH 1/3] [ARM] PR63870 NEON error messages Charles Baylis
2015-07-02 15:40 ` [PATCH 2/3] " Charles Baylis
@ 2015-07-02 15:40 ` Charles Baylis
2015-07-03 13:01 ` [PATCH 0/3] [ARM] PR63870 improve error messages for NEON vldN_lane/vstN_lane Alan Lawrence
3 siblings, 0 replies; 8+ messages in thread
From: Charles Baylis @ 2015-07-02 15:40 UTC (permalink / raw)
To: Ramana.Radhakrishnan, kyrylo.tkachov; +Cc: gcc-patches
gcc/testsuite/ChangeLog:
<DATE> Charles Baylis <charles.baylis@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c: New test.
Change-Id: I55478568525838da2ff05d8145e08b45e7a74a47
---
.../aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld2q_lane_f32_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld2q_lane_f64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c | 16 ++++++++++++++++
.../advsimd-intrinsics/vld2q_lane_s16_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld2q_lane_s32_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld2q_lane_s64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c | 16 ++++++++++++++++
.../advsimd-intrinsics/vld2q_lane_u16_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld2q_lane_u32_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld2q_lane_u64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld3q_lane_f32_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld3q_lane_f64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c | 16 ++++++++++++++++
.../advsimd-intrinsics/vld3q_lane_s16_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld3q_lane_s32_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld3q_lane_s64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c | 16 ++++++++++++++++
.../advsimd-intrinsics/vld3q_lane_u16_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld3q_lane_u32_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld3q_lane_u64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld4q_lane_f32_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld4q_lane_f64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c | 16 ++++++++++++++++
.../advsimd-intrinsics/vld4q_lane_s16_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld4q_lane_s32_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld4q_lane_s64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c | 16 ++++++++++++++++
.../advsimd-intrinsics/vld4q_lane_u16_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld4q_lane_u32_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vld4q_lane_u64_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c | 16 ++++++++++++++++
.../aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst2q_lane_f32_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst2q_lane_f64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vst2q_lane_s16_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst2q_lane_s32_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst2q_lane_s64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vst2q_lane_u16_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst2q_lane_u32_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst2q_lane_u64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst3q_lane_f32_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst3q_lane_f64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vst3q_lane_s16_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst3q_lane_s32_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst3q_lane_s64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vst3q_lane_u16_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst3q_lane_u32_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst3q_lane_u64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c | 14 ++++++++++++++
.../aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst4q_lane_f32_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst4q_lane_f64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vst4q_lane_s16_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst4q_lane_s32_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst4q_lane_s64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c | 15 +++++++++++++++
.../advsimd-intrinsics/vst4q_lane_u16_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst4q_lane_u32_indices_1.c | 14 ++++++++++++++
.../advsimd-intrinsics/vst4q_lane_u64_indices_1.c | 15 +++++++++++++++
.../aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c | 15 +++++++++++++++
132 files changed, 1968 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c
new file mode 100644
index 0000000..d1895f0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+float32x2x2_t
+f_vld2_lane_f32 (float32_t * p, float32x2x2_t v)
+{
+ float32x2x2_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2_lane_f32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2_lane_f32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c
new file mode 100644
index 0000000..19dd5f4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+float64x1x2_t
+f_vld2_lane_f64 (float64_t * p, float64x1x2_t v)
+{
+ float64x1x2_t res;
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld2_lane_f64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld2_lane_f64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c
new file mode 100644
index 0000000..df3ce8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+poly8x8x2_t
+f_vld2_lane_p8 (poly8_t * p, poly8x8x2_t v)
+{
+ poly8x8x2_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2_lane_p8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2_lane_p8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c
new file mode 100644
index 0000000..ad56c8b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int16x4x2_t
+f_vld2_lane_s16 (int16_t * p, int16x4x2_t v)
+{
+ int16x4x2_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2_lane_s16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2_lane_s16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c
new file mode 100644
index 0000000..8b7455d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int32x2x2_t
+f_vld2_lane_s32 (int32_t * p, int32x2x2_t v)
+{
+ int32x2x2_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2_lane_s32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2_lane_s32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c
new file mode 100644
index 0000000..de0a2c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+int64x1x2_t
+f_vld2_lane_s64 (int64_t * p, int64x1x2_t v)
+{
+ int64x1x2_t res;
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld2_lane_s64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld2_lane_s64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c
new file mode 100644
index 0000000..ad414a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int8x8x2_t
+f_vld2_lane_s8 (int8_t * p, int8x8x2_t v)
+{
+ int8x8x2_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2_lane_s8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2_lane_s8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c
new file mode 100644
index 0000000..a80b54d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint16x4x2_t
+f_vld2_lane_u16 (uint16_t * p, uint16x4x2_t v)
+{
+ uint16x4x2_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2_lane_u16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2_lane_u16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c
new file mode 100644
index 0000000..76db072
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint32x2x2_t
+f_vld2_lane_u32 (uint32_t * p, uint32x2x2_t v)
+{
+ uint32x2x2_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2_lane_u32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2_lane_u32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c
new file mode 100644
index 0000000..3539a3f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+uint64x1x2_t
+f_vld2_lane_u64 (uint64_t * p, uint64x1x2_t v)
+{
+ uint64x1x2_t res;
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld2_lane_u64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld2_lane_u64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c
new file mode 100644
index 0000000..20e8465
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint8x8x2_t
+f_vld2_lane_u8 (uint8_t * p, uint8x8x2_t v)
+{
+ uint8x8x2_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2_lane_u8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2_lane_u8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c
new file mode 100644
index 0000000..0c3c947
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+float32x4x2_t
+f_vld2q_lane_f32 (float32_t * p, float32x4x2_t v)
+{
+ float32x4x2_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2q_lane_f32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2q_lane_f32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c
new file mode 100644
index 0000000..5d2eb2d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+float64x2x2_t
+f_vld2q_lane_f64 (float64_t * p, float64x2x2_t v)
+{
+ float64x2x2_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2q_lane_f64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2q_lane_f64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c
new file mode 100644
index 0000000..b48aca4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+poly8x16x2_t
+f_vld2q_lane_p8 (poly8_t * p, poly8x16x2_t v)
+{
+ poly8x16x2_t res;
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld2q_lane_p8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld2q_lane_p8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c
new file mode 100644
index 0000000..c3062c9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int16x8x2_t
+f_vld2q_lane_s16 (int16_t * p, int16x8x2_t v)
+{
+ int16x8x2_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c
new file mode 100644
index 0000000..bfb4f0a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int32x4x2_t
+f_vld2q_lane_s32 (int32_t * p, int32x4x2_t v)
+{
+ int32x4x2_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c
new file mode 100644
index 0000000..84d453a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+int64x2x2_t
+f_vld2q_lane_s64 (int64_t * p, int64x2x2_t v)
+{
+ int64x2x2_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c
new file mode 100644
index 0000000..ec37d1b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+int8x16x2_t
+f_vld2q_lane_s8 (int8_t * p, int8x16x2_t v)
+{
+ int8x16x2_t res;
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c
new file mode 100644
index 0000000..3588131
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint16x8x2_t
+f_vld2q_lane_u16 (uint16_t * p, uint16x8x2_t v)
+{
+ uint16x8x2_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c
new file mode 100644
index 0000000..7f27214
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint32x4x2_t
+f_vld2q_lane_u32 (uint32_t * p, uint32x4x2_t v)
+{
+ uint32x4x2_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c
new file mode 100644
index 0000000..828f7d3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+uint64x2x2_t
+f_vld2q_lane_u64 (uint64_t * p, uint64x2x2_t v)
+{
+ uint64x2x2_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c
new file mode 100644
index 0000000..08fe749
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+uint8x16x2_t
+f_vld2q_lane_u8 (uint8_t * p, uint8x16x2_t v)
+{
+ uint8x16x2_t res;
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c
new file mode 100644
index 0000000..6d13e2b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+float32x2x3_t
+f_vld3_lane_f32 (float32_t * p, float32x2x3_t v)
+{
+ float32x2x3_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3_lane_f32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3_lane_f32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c
new file mode 100644
index 0000000..63d5551
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+float64x1x3_t
+f_vld3_lane_f64 (float64_t * p, float64x1x3_t v)
+{
+ float64x1x3_t res;
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld3_lane_f64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld3_lane_f64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c
new file mode 100644
index 0000000..a6a9666
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+poly8x8x3_t
+f_vld3_lane_p8 (poly8_t * p, poly8x8x3_t v)
+{
+ poly8x8x3_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3_lane_p8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3_lane_p8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c
new file mode 100644
index 0000000..69fd90d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int16x4x3_t
+f_vld3_lane_s16 (int16_t * p, int16x4x3_t v)
+{
+ int16x4x3_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3_lane_s16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3_lane_s16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c
new file mode 100644
index 0000000..01816e8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int32x2x3_t
+f_vld3_lane_s32 (int32_t * p, int32x2x3_t v)
+{
+ int32x2x3_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3_lane_s32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3_lane_s32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c
new file mode 100644
index 0000000..f2a6dbd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+int64x1x3_t
+f_vld3_lane_s64 (int64_t * p, int64x1x3_t v)
+{
+ int64x1x3_t res;
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld3_lane_s64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld3_lane_s64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c
new file mode 100644
index 0000000..5d5f845
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int8x8x3_t
+f_vld3_lane_s8 (int8_t * p, int8x8x3_t v)
+{
+ int8x8x3_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3_lane_s8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3_lane_s8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c
new file mode 100644
index 0000000..8be04ed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint16x4x3_t
+f_vld3_lane_u16 (uint16_t * p, uint16x4x3_t v)
+{
+ uint16x4x3_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3_lane_u16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3_lane_u16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c
new file mode 100644
index 0000000..bf890d3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint32x2x3_t
+f_vld3_lane_u32 (uint32_t * p, uint32x2x3_t v)
+{
+ uint32x2x3_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3_lane_u32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3_lane_u32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c
new file mode 100644
index 0000000..926718e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+uint64x1x3_t
+f_vld3_lane_u64 (uint64_t * p, uint64x1x3_t v)
+{
+ uint64x1x3_t res;
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld3_lane_u64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld3_lane_u64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c
new file mode 100644
index 0000000..d129bba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint8x8x3_t
+f_vld3_lane_u8 (uint8_t * p, uint8x8x3_t v)
+{
+ uint8x8x3_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3_lane_u8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3_lane_u8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c
new file mode 100644
index 0000000..0c276c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+float32x4x3_t
+f_vld3q_lane_f32 (float32_t * p, float32x4x3_t v)
+{
+ float32x4x3_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3q_lane_f32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3q_lane_f32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c
new file mode 100644
index 0000000..2c666c6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+float64x2x3_t
+f_vld3q_lane_f64 (float64_t * p, float64x2x3_t v)
+{
+ float64x2x3_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3q_lane_f64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3q_lane_f64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c
new file mode 100644
index 0000000..2041472
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+poly8x16x3_t
+f_vld3q_lane_p8 (poly8_t * p, poly8x16x3_t v)
+{
+ poly8x16x3_t res;
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld3q_lane_p8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld3q_lane_p8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c
new file mode 100644
index 0000000..7b7b2b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int16x8x3_t
+f_vld3q_lane_s16 (int16_t * p, int16x8x3_t v)
+{
+ int16x8x3_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c
new file mode 100644
index 0000000..c8db256
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int32x4x3_t
+f_vld3q_lane_s32 (int32_t * p, int32x4x3_t v)
+{
+ int32x4x3_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c
new file mode 100644
index 0000000..e350971
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+int64x2x3_t
+f_vld3q_lane_s64 (int64_t * p, int64x2x3_t v)
+{
+ int64x2x3_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c
new file mode 100644
index 0000000..1b1c682
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+int8x16x3_t
+f_vld3q_lane_s8 (int8_t * p, int8x16x3_t v)
+{
+ int8x16x3_t res;
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c
new file mode 100644
index 0000000..adbc42f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint16x8x3_t
+f_vld3q_lane_u16 (uint16_t * p, uint16x8x3_t v)
+{
+ uint16x8x3_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c
new file mode 100644
index 0000000..c79388a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint32x4x3_t
+f_vld3q_lane_u32 (uint32_t * p, uint32x4x3_t v)
+{
+ uint32x4x3_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c
new file mode 100644
index 0000000..7513140
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+uint64x2x3_t
+f_vld3q_lane_u64 (uint64_t * p, uint64x2x3_t v)
+{
+ uint64x2x3_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c
new file mode 100644
index 0000000..5fec76e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+uint8x16x3_t
+f_vld3q_lane_u8 (uint8_t * p, uint8x16x3_t v)
+{
+ uint8x16x3_t res;
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c
new file mode 100644
index 0000000..183036f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+float32x2x4_t
+f_vld4_lane_f32 (float32_t * p, float32x2x4_t v)
+{
+ float32x2x4_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4_lane_f32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4_lane_f32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c
new file mode 100644
index 0000000..655c27f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+float64x1x4_t
+f_vld4_lane_f64 (float64_t * p, float64x1x4_t v)
+{
+ float64x1x4_t res;
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld4_lane_f64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld4_lane_f64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c
new file mode 100644
index 0000000..7bc5140
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+poly8x8x4_t
+f_vld4_lane_p8 (poly8_t * p, poly8x8x4_t v)
+{
+ poly8x8x4_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4_lane_p8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4_lane_p8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c
new file mode 100644
index 0000000..5881a89
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int16x4x4_t
+f_vld4_lane_s16 (int16_t * p, int16x4x4_t v)
+{
+ int16x4x4_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4_lane_s16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4_lane_s16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c
new file mode 100644
index 0000000..02282d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int32x2x4_t
+f_vld4_lane_s32 (int32_t * p, int32x2x4_t v)
+{
+ int32x2x4_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4_lane_s32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4_lane_s32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c
new file mode 100644
index 0000000..162b5c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+int64x1x4_t
+f_vld4_lane_s64 (int64_t * p, int64x1x4_t v)
+{
+ int64x1x4_t res;
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld4_lane_s64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld4_lane_s64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c
new file mode 100644
index 0000000..4949410
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int8x8x4_t
+f_vld4_lane_s8 (int8_t * p, int8x8x4_t v)
+{
+ int8x8x4_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4_lane_s8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4_lane_s8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c
new file mode 100644
index 0000000..16d54e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint16x4x4_t
+f_vld4_lane_u16 (uint16_t * p, uint16x4x4_t v)
+{
+ uint16x4x4_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4_lane_u16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4_lane_u16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c
new file mode 100644
index 0000000..c65bd30
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint32x2x4_t
+f_vld4_lane_u32 (uint32_t * p, uint32x2x4_t v)
+{
+ uint32x2x4_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4_lane_u32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4_lane_u32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c
new file mode 100644
index 0000000..e8f2884
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+uint64x1x4_t
+f_vld4_lane_u64 (uint64_t * p, uint64x1x4_t v)
+{
+ uint64x1x4_t res;
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld4_lane_u64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld4_lane_u64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c
new file mode 100644
index 0000000..cb7f487
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint8x8x4_t
+f_vld4_lane_u8 (uint8_t * p, uint8x8x4_t v)
+{
+ uint8x8x4_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4_lane_u8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4_lane_u8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c
new file mode 100644
index 0000000..8d7d03e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+float32x4x4_t
+f_vld4q_lane_f32 (float32_t * p, float32x4x4_t v)
+{
+ float32x4x4_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4q_lane_f32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4q_lane_f32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c
new file mode 100644
index 0000000..d0ce4e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+float64x2x4_t
+f_vld4q_lane_f64 (float64_t * p, float64x2x4_t v)
+{
+ float64x2x4_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4q_lane_f64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4q_lane_f64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c
new file mode 100644
index 0000000..bb1cb31
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+poly8x16x4_t
+f_vld4q_lane_p8 (poly8_t * p, poly8x16x4_t v)
+{
+ poly8x16x4_t res;
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld4q_lane_p8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld4q_lane_p8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c
new file mode 100644
index 0000000..d96fe0e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int16x8x4_t
+f_vld4q_lane_s16 (int16_t * p, int16x8x4_t v)
+{
+ int16x8x4_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c
new file mode 100644
index 0000000..446ff43
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+int32x4x4_t
+f_vld4q_lane_s32 (int32_t * p, int32x4x4_t v)
+{
+ int32x4x4_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c
new file mode 100644
index 0000000..df02f39
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+int64x2x4_t
+f_vld4q_lane_s64 (int64_t * p, int64x2x4_t v)
+{
+ int64x2x4_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c
new file mode 100644
index 0000000..d7573c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+int8x16x4_t
+f_vld4q_lane_s8 (int8_t * p, int8x16x4_t v)
+{
+ int8x16x4_t res;
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c
new file mode 100644
index 0000000..05be38b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint16x8x4_t
+f_vld4q_lane_u16 (uint16_t * p, uint16x8x4_t v)
+{
+ uint16x8x4_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u16 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c
new file mode 100644
index 0000000..572c6d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+uint32x4x4_t
+f_vld4q_lane_u32 (uint32_t * p, uint32x4x4_t v)
+{
+ uint32x4x4_t res;
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u32 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c
new file mode 100644
index 0000000..a6828df
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+uint64x2x4_t
+f_vld4q_lane_u64 (uint64_t * p, uint64x2x4_t v)
+{
+ uint64x2x4_t res;
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u64 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c
new file mode 100644
index 0000000..8b5eb43
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c
@@ -0,0 +1,16 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+uint8x16x4_t
+f_vld4q_lane_u8 (uint8_t * p, uint8x16x4_t v)
+{
+ uint8x16x4_t res;
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u8 (p, v, -1);
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c
new file mode 100644
index 0000000..a0ea45b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2_lane_f32 (float32_t * p, float32x2x2_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2_lane_f32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2_lane_f32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c
new file mode 100644
index 0000000..2eca26f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst2_lane_f64 (float64_t * p, float64x1x2_t v)
+{
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst2_lane_f64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst2_lane_f64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c
new file mode 100644
index 0000000..3692d7d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2_lane_p8 (poly8_t * p, poly8x8x2_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2_lane_p8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2_lane_p8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c
new file mode 100644
index 0000000..94ac769
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2_lane_s16 (int16_t * p, int16x4x2_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2_lane_s16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2_lane_s16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c
new file mode 100644
index 0000000..3ef5687
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2_lane_s32 (int32_t * p, int32x2x2_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2_lane_s32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2_lane_s32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c
new file mode 100644
index 0000000..1e3c202
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst2_lane_s64 (int64_t * p, int64x1x2_t v)
+{
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst2_lane_s64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst2_lane_s64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c
new file mode 100644
index 0000000..a96b1b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2_lane_s8 (int8_t * p, int8x8x2_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2_lane_s8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2_lane_s8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c
new file mode 100644
index 0000000..970be4a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2_lane_u16 (uint16_t * p, uint16x4x2_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2_lane_u16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2_lane_u16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c
new file mode 100644
index 0000000..4c8e2f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2_lane_u32 (uint32_t * p, uint32x2x2_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2_lane_u32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2_lane_u32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c
new file mode 100644
index 0000000..dfb0de2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst2_lane_u64 (uint64_t * p, uint64x1x2_t v)
+{
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst2_lane_u64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst2_lane_u64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c
new file mode 100644
index 0000000..4877ea2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2_lane_u8 (uint8_t * p, uint8x8x2_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2_lane_u8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2_lane_u8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c
new file mode 100644
index 0000000..75f7dd6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2q_lane_f32 (float32_t * p, float32x4x2_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2q_lane_f32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2q_lane_f32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c
new file mode 100644
index 0000000..9a23056
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst2q_lane_f64 (float64_t * p, float64x2x2_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2q_lane_f64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2q_lane_f64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c
new file mode 100644
index 0000000..c3f2433
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst2q_lane_p8 (poly8_t * p, poly8x16x2_t v)
+{
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst2q_lane_p8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst2q_lane_p8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c
new file mode 100644
index 0000000..82ae1e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2q_lane_s16 (int16_t * p, int16x8x2_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2q_lane_s16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2q_lane_s16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c
new file mode 100644
index 0000000..27208bd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2q_lane_s32 (int32_t * p, int32x4x2_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2q_lane_s32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2q_lane_s32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c
new file mode 100644
index 0000000..a66d55b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst2q_lane_s64 (int64_t * p, int64x2x2_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2q_lane_s64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2q_lane_s64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c
new file mode 100644
index 0000000..7a3338b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst2q_lane_s8 (int8_t * p, int8x16x2_t v)
+{
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst2q_lane_s8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst2q_lane_s8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c
new file mode 100644
index 0000000..999ee70
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2q_lane_u16 (uint16_t * p, uint16x8x2_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2q_lane_u16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2q_lane_u16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c
new file mode 100644
index 0000000..fd4422d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst2q_lane_u32 (uint32_t * p, uint32x4x2_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2q_lane_u32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2q_lane_u32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c
new file mode 100644
index 0000000..78863b5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst2q_lane_u64 (uint64_t * p, uint64x2x2_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2q_lane_u64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2q_lane_u64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c
new file mode 100644
index 0000000..e7463e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst2q_lane_u8 (uint8_t * p, uint8x16x2_t v)
+{
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst2q_lane_u8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst2q_lane_u8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c
new file mode 100644
index 0000000..0cec880
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3_lane_f32 (float32_t * p, float32x2x3_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3_lane_f32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3_lane_f32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c
new file mode 100644
index 0000000..d63aa1f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst3_lane_f64 (float64_t * p, float64x1x3_t v)
+{
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst3_lane_f64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst3_lane_f64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c
new file mode 100644
index 0000000..0122b75
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3_lane_p8 (poly8_t * p, poly8x8x3_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3_lane_p8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3_lane_p8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c
new file mode 100644
index 0000000..2c57d2b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3_lane_s16 (int16_t * p, int16x4x3_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3_lane_s16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3_lane_s16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c
new file mode 100644
index 0000000..c0b3a5b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3_lane_s32 (int32_t * p, int32x2x3_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3_lane_s32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3_lane_s32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c
new file mode 100644
index 0000000..2c2d043
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst3_lane_s64 (int64_t * p, int64x1x3_t v)
+{
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst3_lane_s64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst3_lane_s64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c
new file mode 100644
index 0000000..b93d69a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3_lane_s8 (int8_t * p, int8x8x3_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3_lane_s8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3_lane_s8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c
new file mode 100644
index 0000000..ce6025d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3_lane_u16 (uint16_t * p, uint16x4x3_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3_lane_u16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3_lane_u16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c
new file mode 100644
index 0000000..5696034
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3_lane_u32 (uint32_t * p, uint32x2x3_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3_lane_u32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3_lane_u32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c
new file mode 100644
index 0000000..9a36915
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst3_lane_u64 (uint64_t * p, uint64x1x3_t v)
+{
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst3_lane_u64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst3_lane_u64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c
new file mode 100644
index 0000000..9004f3d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3_lane_u8 (uint8_t * p, uint8x8x3_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3_lane_u8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3_lane_u8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c
new file mode 100644
index 0000000..d1ffc04
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3q_lane_f32 (float32_t * p, float32x4x3_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3q_lane_f32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3q_lane_f32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c
new file mode 100644
index 0000000..e165f2a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst3q_lane_f64 (float64_t * p, float64x2x3_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3q_lane_f64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3q_lane_f64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c
new file mode 100644
index 0000000..7fb3c96
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst3q_lane_p8 (poly8_t * p, poly8x16x3_t v)
+{
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst3q_lane_p8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst3q_lane_p8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c
new file mode 100644
index 0000000..de8ae54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3q_lane_s16 (int16_t * p, int16x8x3_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3q_lane_s16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3q_lane_s16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c
new file mode 100644
index 0000000..6502bcf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3q_lane_s32 (int32_t * p, int32x4x3_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3q_lane_s32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3q_lane_s32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c
new file mode 100644
index 0000000..c6d8236
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst3q_lane_s64 (int64_t * p, int64x2x3_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3q_lane_s64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3q_lane_s64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c
new file mode 100644
index 0000000..2b48619
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst3q_lane_s8 (int8_t * p, int8x16x3_t v)
+{
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst3q_lane_s8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst3q_lane_s8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c
new file mode 100644
index 0000000..6d68051
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3q_lane_u16 (uint16_t * p, uint16x8x3_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3q_lane_u16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3q_lane_u16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c
new file mode 100644
index 0000000..78b28a0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst3q_lane_u32 (uint32_t * p, uint32x4x3_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3q_lane_u32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3q_lane_u32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c
new file mode 100644
index 0000000..fe4f52e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst3q_lane_u64 (uint64_t * p, uint64x2x3_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3q_lane_u64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3q_lane_u64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c
new file mode 100644
index 0000000..74e49db
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst3q_lane_u8 (uint8_t * p, uint8x16x3_t v)
+{
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst3q_lane_u8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst3q_lane_u8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c
new file mode 100644
index 0000000..00a8a50
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4_lane_f32 (float32_t * p, float32x2x4_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4_lane_f32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4_lane_f32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c
new file mode 100644
index 0000000..7cb45ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst4_lane_f64 (float64_t * p, float64x1x4_t v)
+{
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst4_lane_f64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst4_lane_f64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c
new file mode 100644
index 0000000..8b7fef3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4_lane_p8 (poly8_t * p, poly8x8x4_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4_lane_p8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4_lane_p8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c
new file mode 100644
index 0000000..e62691c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4_lane_s16 (int16_t * p, int16x4x4_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4_lane_s16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4_lane_s16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c
new file mode 100644
index 0000000..ced39ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4_lane_s32 (int32_t * p, int32x2x4_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4_lane_s32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4_lane_s32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c
new file mode 100644
index 0000000..fe77b4d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst4_lane_s64 (int64_t * p, int64x1x4_t v)
+{
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst4_lane_s64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst4_lane_s64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c
new file mode 100644
index 0000000..b287a59
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4_lane_s8 (int8_t * p, int8x8x4_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4_lane_s8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4_lane_s8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c
new file mode 100644
index 0000000..2144dc4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4_lane_u16 (uint16_t * p, uint16x4x4_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4_lane_u16 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4_lane_u16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c
new file mode 100644
index 0000000..576036c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4_lane_u32 (uint32_t * p, uint32x2x4_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4_lane_u32 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4_lane_u32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c
new file mode 100644
index 0000000..b6040b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst4_lane_u64 (uint64_t * p, uint64x1x4_t v)
+{
+ /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst4_lane_u64 (p, v, 1);
+ /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst4_lane_u64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c
new file mode 100644
index 0000000..4ed80cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4_lane_u8 (uint8_t * p, uint8x8x4_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4_lane_u8 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4_lane_u8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c
new file mode 100644
index 0000000..ca01289
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4q_lane_f32 (float32_t * p, float32x4x4_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4q_lane_f32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4q_lane_f32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c
new file mode 100644
index 0000000..e2b7fb8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst4q_lane_f64 (float64_t * p, float64x2x4_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4q_lane_f64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4q_lane_f64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c
new file mode 100644
index 0000000..fb8f4ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst4q_lane_p8 (poly8_t * p, poly8x16x4_t v)
+{
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst4q_lane_p8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst4q_lane_p8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c
new file mode 100644
index 0000000..4855b73
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4q_lane_s16 (int16_t * p, int16x8x4_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4q_lane_s16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4q_lane_s16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c
new file mode 100644
index 0000000..29a8a69
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4q_lane_s32 (int32_t * p, int32x4x4_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4q_lane_s32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4q_lane_s32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c
new file mode 100644
index 0000000..297cae8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst4q_lane_s64 (int64_t * p, int64x2x4_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4q_lane_s64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4q_lane_s64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c
new file mode 100644
index 0000000..10c70cc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst4q_lane_s8 (int8_t * p, int8x16x4_t v)
+{
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst4q_lane_s8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst4q_lane_s8 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c
new file mode 100644
index 0000000..d0063ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4q_lane_u16 (uint16_t * p, uint16x8x4_t v)
+{
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4q_lane_u16 (p, v, 8);
+ /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4q_lane_u16 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c
new file mode 100644
index 0000000..89b4c52
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c
@@ -0,0 +1,14 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+void
+f_vst4q_lane_u32 (uint32_t * p, uint32x4x4_t v)
+{
+ /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4q_lane_u32 (p, v, 4);
+ /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4q_lane_u32 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c
new file mode 100644
index 0000000..ba697c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst4q_lane_u64 (uint64_t * p, uint64x2x4_t v)
+{
+ /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4q_lane_u64 (p, v, 2);
+ /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4q_lane_u64 (p, v, -1);
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c
new file mode 100644
index 0000000..61f8ce2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c
@@ -0,0 +1,15 @@
+#include <arm_neon.h>
+
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+/* { dg-skip-if "" { arm*-*-* } } */
+
+void
+f_vst4q_lane_u8 (uint8_t * p, uint8x16x4_t v)
+{
+ /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst4q_lane_u8 (p, v, 16);
+ /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst4q_lane_u8 (p, v, -1);
+ return;
+}
--
1.9.1
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